NATIONAL INSTITUTE OF TECHNOLOGY, ROURKELA

DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING

MID-SEM EXAM AUTUMN 2017; COURSE: MICROPROCESSOR AND MICROCONTROLLERS (CS341)
PROGRAMME: B.TECH & DUAL (CSE/EC/EI); DURATION: 2 HOURS; FULL MARKS: 30
INSTRUCTIONS: Answer Any FIVE out of 6 Questions. All parts of a question (a, b, etc.,) should be answered at one place.
Answer should be brief and to-the-point and be supplemented with neat sketches. All the diagrams must be drawn using
pencils. Unnecessary long answers may result in loss of marks. Any missing or wrong data may be assumed suitably
giving proper justification.
Q. No. Description MARKS
1 Consider the following assembly language program in 8085. Assume that all the memory addresses [3+3]
and data values are specified in hexadecimal and the stack grows upward in the increasing order of
addresses. Compute the interrupt vector location for the interrupt RST 7.5 which arrives while
executing the instruction MVI E, FF H stored at memory location 3062 H (as shown below). Assume that
the instruction CALL 2050 H is stored at the interrupt vector address for interrupt RST 7.5. Illustrate all
the execution steps clearly showing the contents of registers such as PC, SP, HL, DE and PSW and
contents of memory locations 8053, 8054 and top of stack values when the following program is
executed. What is the change in values of the registers, memory locations and top of the stack, if the
stack grows downward in the increasing order of addresses?
Memory Address Mnemonics Memory Address Mnemonics
3050 LXI H, 8050 H 2050 LXI SP, 8004 H
3053 MVI A, 11 H 2051 PUSH D
3055 STA 8050 H 2052 POP D
3058 MVI A, 22 H 2053 RET
305A STA 8051 H
305D LHLD 8050 H
3060 MVI D, 45 H
3062 MVI E, FF H  Arrival of Interrupt RST 7.5
3064 DAD H
3065 SHLD 8053 H
3068 HLT
2 Two 8085 programs are given below (P1 and P2). Answer as directed with adequate explanation. [3X2]
(P1):The program execution begins at 4000H. Determine the contents of SP on completion of RET
execution.

(P2):The starting address of this program is 7FFFH. What would happen if it is executed from 8000H?
 3 Two 8085 programs are given below (P3 and P4). Answer as directed with adequate explanation. [3X2]
(P3): If the program execution begins at FF00H, write the sequence of instructions those are executed
until a HLT instruction is encountered. Assume all flags are initially reset. Which of the three ports will
be loaded with data and what is the bit pattern of the data?

(P4): Registers values before the execution of first instruction are: A = 11H, BC = 1234H, DE = CDEFH
and HL = 1100H. Also the flags are reset at the beginning. State the status of each flag for each of the
following instructions, with sufficient explanation.

4 (a) Interface two units of 8k×8 EPROMs with 8085 using a decoder such that the starting address [4+2]
assigned to the EPROMs would be 8000H and C000H, respectively.
(b) 8085 is to be interfaced with one 16k×8 EPROM chip and one 16k×8 RAM chip. Both chips are having
one active low chip enable signal (𝐶𝐸 ). The address line A15 of 8085 is directly connected to the (𝐶𝐸 )
of the EPROM chip. The same A15 line is inverted and connected to the (𝐶𝐸 ) of the RAM chip. Find
all possible address ranges that can be assigned to each chip. Justify your answer.
5 (a) Write the assembly language program lines to enable all the interrupts in 8085 after reset. [ 2+4]
(b) Specify the types of addressing modes and number of memory accesses required for the following
instructions: (i) DAA, (ii) RET, (iii) PCHL, & (iv) SHLD 3000H
6 (a) Explain the operation performed by the instructions "MVI A,00H" and "XRA A". [1+4+1]
(b) If they have a same outcome then compare them with respect to space consumed in bytes and time taken
by means of timing diagrams.
(c) During opcode fetch and memory read cycles 8085 performs memory read operations but they require 4
and 3 T-states, respectively. Justify the statement.