Applied Electronics II

Chapter 2: Differential Amplifier

School of Electrical and Computer Engineering

Addis Ababa Institute of Technology
Addis Ababa University
Ermias T.

April 2017

Chapter 2: Differential Amplifier () SECE April 2017 1 / 29

 Overview
1 Introduction
2 The MOS Differential Pair
Operation with a Common-Mode Input Voltage
Operation with a Differential Input Voltage
Large-Signal Operation
3 Small-Signal Operation of the MOS Differential Pair
Differential Gain
The Differential Half-Circuit
The Differential Amplifier with Current-Source Loads
Cascode Differential Amplifier
Common-Mode Gain and Common-Rejection ratio (CMRR)
Differential versus Single-Ended Output
Current Source, Biasing Techniques
4 Exercise

Chapter 2: Differential Amplifier () SECE April 2017 2 / 29

 Introduction

Introduction
The purpose of a differential amplifier is to amplify the difference
between two signals.
The differential-pair of differential-amplifier configuration is widely
used in IC circuit design.
One example is input stage of op-amp.
Another example is emitter-coupled logic (ECL).
Technology was invented in 1940’s for use in vacuum tubes the
basic differential-amplifier configuration was later implemented
with discrete bipolar transistors.
However, the configuration became most useful with invention of
modern transistor / MOS technologies.

V1 Differntial
Vo
Amplifier
V2

Chapter 2: Differential Amplifier () SECE April 2017 3 / 29

 The MOS Differential Pair

The MOS Differential Pair

Two matched transistors (Q1 and Q2 ) joined and biased by a constant
current source I. MOSFET’s should not enter triode region of
operation.

Figure: The basic MOS differential-pair configuration.

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 The MOS Differential Pair Operation with a Common-Mode Input Voltage

Operation with a Common-Mode Input Voltage

Consider case when two gate terminals are joined together.
Connected to a common-mode voltage (VCM ).
vG1 = vG2 = VCM
Q1 and Q2 are matched.
Current I will divide equally between the two transistors.
ID1 = ID2 = I/2, VS = VCM − VGS
where VGS is the gate-to-source voltage.

Chapter 2: Differential Amplifier () SECE April 2017 5 / 29

 The MOS Differential Pair Operation with a Common-Mode Input Voltage

Operation with a Common-Mode Input Voltage

Neglecting channel-length modulation, VGS and I/2 are related by
I 1 0W
= kn (VGS − Vt )2
2 2 L
in terms of the overdrive voltage VOV ,
s
I 1 0W 2 I
= kn VOV or VOV = 0
2 2 L kn W
L

The voltage at each drain will be

I
vD1 = vD2 = VDD − RD
2
As long as Q1 and Q2 remain in the saturation region, the current I
will divide equally and the voltages at the drains will not change. Thus
the differential pair does not respond to (i.e., it rejects) common-mode
input signals.
Chapter 2: Differential Amplifier () SECE April 2017 6 / 29
 The MOS Differential Pair Operation with a Common-Mode Input Voltage

Operation with a Common-Mode Input Voltage

An important specification of a differential amplifier is its input

common-mode range.This is the range of VCM over which the
differential pair operates properly.
The highest value of VCM is limited by the requirement that Q1 and
Q2 remain in saturation, which means vDS ≥ VOV

I
max(VCM ) = Vt + VDD − RD
2
The lowest value of VCM is determined by the need to allow for a
sufficient voltage across the current source I for it to operate properly.
If a voltage VCS is needed across the current source, then

min(VCM ) = −VSS + VCS + Vt + VOV

Chapter 2: Differential Amplifier () SECE April 2017 7 / 29

 The MOS Differential Pair Operation with a Differential Input Voltage

Operation with a Differential Input Voltage

If vid is applied to Q1 and Q2 is grounded, following conditions
apply:
vid = vGS1 − vGS2 > 0
iD1 > iD2
if vid is positive, vGS1 will be greater than vGS2 and hence iD1 will
be greater than iD2 and the difference output voltage (vD2 − vD1 )
will be positive.

Chapter 2: Differential Amplifier () SECE April 2017 8 / 29

 The MOS Differential Pair Operation with a Differential Input Voltage

Operation with a Differential Input Voltage

The differential pair responds to difference-mode or differential
input signals by providing a corresponding differential output signal
between the two drains.
To find the vid that causes the entire bias current I to flow in one of
the two transistors.
vGS1 reaches the value that corresponds to iD1 = I,
vGS2 is reduced to a value equal to the threshold voltage Vt , at
which point vS = −Vt .
The vGS1 can be found as
 
1 0 W
I= kn (vGS1 − Vt )2
2 L
q √
vGS1 = Vt + 2I/kn0 (W/L) = Vt + 2VOV

Chapter 2: Differential Amplifier () SECE April 2017 9 / 29

 The MOS Differential Pair Operation with a Differential Input Voltage

Operation with a Differential Input Voltage

The corresponding max(vid ) is

max(vid )= vGS1 + vS
√ √
max(vid )= Vt + 2VOV − Vt = 2VOV
To steer the current completely
√ to one side of the pair, a difference
input voltage vid of at least 2VOV (4VT for bipolar) is needed.

Chapter 2: Differential Amplifier () SECE April 2017 10 / 29

 The MOS Differential Pair Large-Signal Operation

Large-Signal Operation
Objective is to derive expressions for drain current iD1 and iD2 in
terms of differential signal vid = vG1 − vG2 .
Assumption taken
Differential pair is perfectly matched
Channel-length Modulation is Neglected (λ = 0)
The circuit maintains Q1 and Q2 in the saturation region of
operation at all times.
Load Independence
Step 1 Expression drain currents for Q1 and Q2 .
1 0W 1 0W
iD1 = kn (vGS1 − Vt )2 and iD2 = kn (vGS2 − Vt )2
2 L 2 L
Step 2 Take the square roots of both sides of both
r r
p 1 0W p 1 0W
iD1 = k (vGS1 − Vt ) and iD2 = k (vGS2 − Vt )
2 nL 2 nL
Chapter 2: Differential Amplifier () SECE April 2017 11 / 29
 The MOS Differential Pair Large-Signal Operation

Large-Signal Operation
Step 3 (vGS1 − vGS2 = vG1 − vG2 = vid ) Subtract and perform
appropriate substitution .
r
p p 1 0W
iD1 − iD2 = k vid
2 nL
Step 4 Squaring both sides and substituting for iD1 + iD2 = I
p 1 0W 2
2 iD1 iD2 = I − kn vid
2 L
Step 5 Replacing iD2 = I − iD1 , squaring
q both sides and solving the
0 W


quadratic and substituting VOV = I/ kn L
 s
vid /2 2
  
I I vid
iD1 = + 1−
2 VOV 2 VOV
s
vid /2 2
    
I I vid
iD2 = − 1−
2 VOV 2 VOV
Chapter 2: Differential Amplifier () SECE April 2017 12 / 29
 The MOS Differential Pair Large-Signal Operation

Large-Signal Operation
2
The Transfer characteristics are nonlinear due to the term involving vid

Figure: Normalized plots of the currents in a MOSFET differential pair.

Since Linear amplification is desirable vid will be as small as possible.
For a given value of VOV , the only option is to keep vid /2 much
smaller than VOV .
Chapter 2: Differential Amplifier () SECE April 2017 13 / 29
 The MOS Differential Pair Large-Signal Operation

Large-Signal Operation
The approximation is
    
I I vid I I vid 
iD1 u + and iD2 u −
2 VOV 2 2 VOV 2

Figure: The linear range of operation of the MOS differential pair can be
extended by operating the transistor at a higher value of VOV .
Chapter 2: Differential Amplifier () SECE April 2017 14 / 29
 Small-Signal Operation of the MOS Differential Pair

Small-Signal Operation of the MOS Differential Pair

Figure: Small-signal analysis of MOS deferential amplifier.

Chapter 2: Differential Amplifier () SECE April 2017 15 / 29
 Small-Signal Operation of the MOS Differential Pair Differential Gain

Differential Gain
From Figure (a) vG1 = VCM + 12 vid and vG2 = VCM − 12 vid causes a
virtual signal ground to appear on the common-source
(common-emitter) connection
where VCM denotes a common-mode dc voltage
where vid denotes a differential input applied complementarily (or
balanced)
Also note that each of Q1 and Q2 is biased at a dc current of I/2 and
is operating at an overdrive voltage VOV .
Assuming vid /2  VOV , the drain current will be
     
I vid I vid
id1 = and id2 = −
VOV 2 VOV 2

The transconductance of MOSFET is

2ID 2(I/2) I
gm = = =
VOV VOV VOV

Chapter 2: Differential Amplifier () SECE April 2017 16 / 29

 Small-Signal Operation of the MOS Differential Pair Differential Gain

Combining the equations

v  v 
id id
id1 = gm and id2 = −gm
2 2
The output can be taken between the drain and the ground, refereed as
single-ended outputs vo1 and vo2 .
v  v 
id id
vo1 = −id1 × RD = −gm RD and vo2 = −id2 × RD = gm RD
2 2
The output can e taken between the two drain terminals, refereed as
differential output vod
vod = vo2 − vo1 = gm vid RD
The differential gain
vod
= gm RD
Av =
vid
When the output resistance of the MOSFET is taken into account
vod
Av = = gm [RD k ro ]
vid
Chapter 2: Differential Amplifier () SECE April 2017 17 / 29
 Small-Signal Operation of the MOS Differential Pair The Differential Half-Circuit

The Differential Half-Circuit

The performance can be determined by considering only half the circuit

since the circuit is symmetrical and balanced. It is easier for analysis.

Q1 is biased at I/2 and is

operating at VOV .
This circuit may be used to
determine the differential
voltage gain of the differential
amplifier
Av = gm [RD k ro ]
Figure: Half-circuit of the differential
amplifier.

Chapter 2: Differential Amplifier () SECE April 2017 18 / 29

 Small-Signal Operation of the MOS Differential Pair The Differential Amplifier with Current-Source Loads

The Differential Amplifier with Current-Source Loads

To obtain higher gain, the passive resistances (RD ) can be replaced with
current sources. The current sources are realized with PMOS and biased to
conduct I/2.
Av = gm1 [ro1 k ro3 ]

Chapter 2: Differential Amplifier () SECE April 2017 19 / 29

 Small-Signal Operation of the MOS Differential Pair Cascode Differential Amplifier

Cascode Differential Amplifier

Gain can be increased via cascode configuration.

The differential
Gain

Av = gm1 [Ron k Rop ]

where

Ron = [gm3 ro3 ]ro1

Rop = [gm5 ro5 ]ro7

Chapter 2: Differential Amplifier () SECE April 2017 20 / 29

 Common-Mode Gain and Common-Rejection ratio
Small-Signal Operation of the MOS Differential Pair (CMRR)

Common-Mode Gain and CMRR

Chapter 2: Differential Amplifier () SECE April 2017 21 / 29

 Common-Mode Gain and Common-Rejection ratio
Small-Signal Operation of the MOS Differential Pair (CMRR)

Common-Mode Gain and CMRR

In practice there is no ideal current source or symmetrical matching.
Non-ideal current source: Assuming the current source have a finite
output resistance RSS , and a small common-mode signal vicm is add on
VCM . In the ideal case the drain voltage will not change or the
common-mode gain is zero.
since RSS is very large we can assume Q1 and Q2 are operate at a bias
current of I/2.
i vicm
vicm = + 2iRSS and i=
gm 1/gm + 2RSS
The drain voltage
RD
vo1 = vo2 = −RD i = − vicm
1/gm + 2RSS
since 2RSS  1/gm
vo1 vo2 RD
= u−
vicm vicm 2RSS
Chapter 2: Differential Amplifier () SECE April 2017 22 / 29
 Common-Mode Gain and Common-Rejection ratio
Small-Signal Operation of the MOS Differential Pair (CMRR)

Common-Mode Gain and CMRR

vo1 and vo2 are corrupted by vicm ,still common-mode signal is rejected
vod = vo2 − vo1 = 0
Effect of RD Mismatch:Assume Q1 load is RD and Q2 load is
(RD + ∆RD ). The drain voltage
RD RD + ∆RD
vo1 u − vicm and vo2 u − vicm
2RSS 2RSS
Thus
∆RD
vod = vo2 − vo1 = − vicm
2RSS
The common-mode gain
  
vod ∆RD RD ∆RD
Acm = =− =−
vicm 2RSS 2RSS RD
∴ Mismatch in the drain resistances causes the differential amplifier to
have a finite common-mode gain.
Chapter 2: Differential Amplifier () SECE April 2017 23 / 29
 Common-Mode Gain and Common-Rejection ratio
Small-Signal Operation of the MOS Differential Pair (CMRR)

Common-Mode Gain and CMRR

Common-mode rejection ratio (CMRR)

|Ad |
CM M R =
|Acm |

CMMR for drain resistance mismatch of ∆RD

2gm RSS
CM M R =
∆RD /RD

For high CMMR ↑ RSS

Effect of gm Mismatch: Assume gm1 = gm + 21 ∆gm , gm2 = gm − 12 ∆gm
from the figure on the next slide
     
1 1 gm2
i1 = i2 and i1 + i2 = i1 1 +
gm1 gm2 gm1

Chapter 2: Differential Amplifier () SECE April 2017 24 / 29

 Common-Mode Gain and Common-Rejection ratio
Small-Signal Operation of the MOS Differential Pair (CMRR)

Common-Mode Gain and CMRR

Chapter 2: Differential Amplifier () SECE April 2017 25 / 29

 Common-Mode Gain and Common-Rejection ratio
Small-Signal Operation of the MOS Differential Pair (CMRR)

Common-Mode Gain and CMRR

 
gm2
vicm = i1 /gm1 + (i1 + i2 )RSS = i1 /gm1 + i1 1+ RSS
gm1
rearranging to expressi1 and i2 in terms of vicm
gm1 vicm gm2 vicm
i1 = and i2 =
1 + (gm1 + gm2 )RSS 1 + (gm1 + gm2 )RSS
The differential output voltage vod = vo2 − vo1 = −i2 RD + i1 RD
(gm1 − gm2 )RD ∆gm RD
vod = vicm = vicm
1 + (gm1 + gm2 )RSS 1 + 2gm RSS
The common-mode gain
  
∆gm RD RD ∆gm
Av = u
1 + 2gm RSS 2RSS gm
The corresponding CMMR
∆gm
CM M R = (2gm RSS )/( )
gm
Chapter 2: Differential Amplifier () SECE April 2017 26 / 29
 Small-Signal Operation of the MOS Differential Pair Differential versus Single-Ended Output

Differential versus Single-Ended Output

Differential Output:
It decreases the common-mode gain and increases the
common-mode rejection ratio (CMRR) dramatically
It increases the differential gain by a factor of 2 (6 dB) because
the output is the difference between two voltages of equal
magnitude and opposite sign.
Single-Ended Output:
Needed to connect it to an off-chip load.
Advantage of Differential Amplifier:
The differential transmission of the signal on the chip also
minimizes its susceptibility to corruption with noise and
interference.
Enables us to bias the amplifier and to couple amplifier stages
together without the need for bypass and coupling capacitors.
Chapter 2: Differential Amplifier () SECE April 2017 27 / 29
 Small-Signal Operation of the MOS Differential Pair Current Source, Biasing Techniques

Current Source, Biasing Techniques

The current source is implemented using a current mirror. Q3 and Q4
is the current mirror implementation.

Chapter 2: Differential Amplifier () SECE April 2017 28 / 29

 Exercise

Exercise

The following questions in the text book are exercises to be done for
the tutorial session.
8.1
8.6
8.17
8.21
8.25
Reading Assignment
BJT Differential Amplifier

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