Laptop Mitac 8599 Taiwan Service Manual

SERVICE MANUAL FOR
8599
BY: Star Meng

Repair Technology Research Department /EDVD
Jun.2004
8599 N/B Maintenance
Contents
1. Hardware Engineering Specification ……………………………………………………………………… 4
1.1 Introduction ……………………………………………………………………………………………………………….. 4

1.2 Hardware System………………………………………………………………………………………………………….. 7
1.3 Electrical Characteristic …………………………………………………………………………………………………. 37
1.4 Appendix 1 : SiS963L GPIO Definition …………………………………………………………………………………. 42
1.5 Appendix 2 : Keyboard Controller Pins Definition …………………………………………………………………….. 43
1.6 Appendix 3: Audio Performance ………………………………………………………………………………………… 45
2. System View and Disassembly …………………………………………………………………………….. 46
2.1 System View ………………………………………………………………………………………………………………. 46

2.2 System Disassembly ………………………………………………………………………………………………………. 49
3. Definition & Location of Connectors / Switches ………………………………………………………….. 69
3.1 Mother Board ……………………………………………………………………………………………………………... 69
4. Definition & Location of Major Components …………………………………………………………….. 72
4.1 Mother Board ……………………………………………………………………………………………………………... 72
5. Pin Description of Major Component …….………………………………………………………………. 73
5.1 Inter Pentium 4 Processor mFC-PGA 478 Pins ………………………………………………………………………… 73

5.2 SiS M661FX (IGUI Host Memory Controller) ………………………………………………………………………… 78
5.3 SiS963L (MuTIOL®Media I/O South Bridge) …………………………………………………………………………. 83
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Contents
6. System Block Diagram …………………………………………………………………………………….. 89
7. Maintenance Diagnostics ………………………………………………………………………………….. 90
7.1 Introduction ………………………………………………………………………………………………………………. 90

7.2 Error Codes ………………………………………………………………………………………………………………. 91
7.3 Debug Tool ………………………………………………………………………………………………………………… 93
8. Trouble Shooting …………………………………………………………………………………………… 94
8.1 No Power ………………………………………………………………………………………………………………….. 96

8.2 Battery Can not Be Charged …………………………………………………………………………………………….. 99
8.3 No Display ………………………………………………………………………………………………………………… 101
8.4 LCD No Display or Picture Abnormal ………………………………………………………………………………….. 105
8.5 External Monitor No Display or Color Abnormal ……………………………………………………………………… 107
8.6 TV Test Error …………………………………………………………………………………………………………….. 109
8.7 Memory Test Error ………………………………………………………………………………………………………. 111
8.8 Keyboard (K/B) Touch-Pad (T/P) Test Error ………………………………………………………………………….. 113
8.9 Hard Driver Test Error ………………………………………………………………………………………………….. 115
8.10 CD-ROM Driver Test Error ……………………………………………………………………………………………. 117
8.11 USB Port Test Error ……………………………………………………………………………………………………. 119
8.12 PC Card Socket Test Error …………………………………………………………………………………………….. 123
8.13 Mini-PCI Socket Test Error ………………………………………………………………………………………….. 125
8.14 Audio Failure ……………………………………………………………………………………………………………. 127
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Contents
8.15 LAN Test Error ………….……………………………………………………………………………………………… 130
9. Spare Parts List ……………………………………………………………………………………………. 132
10. System Exploded Views ………………………………………………………………………………….. 143
11. Circuit Diagram ………………………………………………………………………………………….. 144
12. Reference Material ……………………………………………………………………………………….. 172
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1. Hardware Engineering Specification

1.1 Introduction
1.1.1 General Description
This document describes the system hardware engineer specification for 8599 portable notebook computer system.The
8599 notebook computer is a new mainstream high performance easy assembly notebook in the MiTAC notebook
family.
1.1.2 System Overview (1)

Table 1. Hardware Specification
CPU - Intel DT NW P4 2.4G,2.5G,2.53G,2.6G,2.66G,2.8G,3.06Ghz(p) w/z HT - FSB 800/533 MHz
- Intel DT NW Celeron 2.0G~2.8G w/z - FSB 400MHz
- Intel DT Prescott Celeron 2.4G,2.53G,2.66G,2.8G,3.06G,3.2G w/z - FSB 533MHz
- Intel Northwood Mobile P4 2.40G,2.66G,2.80G,3.06G
- Thermal ceiling 81.8W
Core logic - SiS M661FX + SiS963L
L2 Cache - 512KB OD for N/W DT & Mobile P4,128KB for N/W Celeron,256KB for Prescott Celeron
System BIOS -Insyde 256KB(P) Flash EPROM (Include System BIOS and VGA BIOS)
-ACPI 1.0b;DMI 2.3.1 compliant
-Plug & Play capability
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Continue to the previous page
Memory - 0MB on board;Expandable up to 1024MB

- Expandable with combination of optional 128MB/256MB/512MB memory
- 184-pin DDR 266/333/400 DROM Memory Module x 2
ROM Drive - 12.7mm Height
- CD/DVD ROM Drive
- Combo Drive
- Super Combo Drive
HDD - 2.5” 8.45/9.5 mm height:10/15/20/40GB
- Support Ultra-DMA 66/100 function
- User removable by latch,design reserve for screw fix
Ext.FDD - Support External FDD w/z USB 1/F; 3.5” Format for 720KB/1.2MB/1.44MB
Display - 15” XGA/TFT display; Resolution:1024x768
Video Controller - SiS M661FX Int. w/64MB SMA
Keyboard - 19mm key pitch/ 3.0mm key stroke/ 307mm length
- Windows Logo Key x 1; Application Key x 1
Pointing Device - Glide pad with 2x buttons and direction Scroll button
PCMCIA - Type II x 1 without ZV
- Cardbus Support
Indictor - 3 LEDs for Power/battery/charge status (on display Housing/cover)
- 1 LEDs for Radio wave status Power LED (BTO: Wireless LAN only)
- 5 LEDs for HDD Access,ODD Access, Num lock, Cap lock and Scroll Lock
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Audio System - Sound Blaster Pro compatible

- Built-in mono microphone
- AC97 2.2 Codec
- 2X 2W Speakers
I/O Port - USB port (2.0, backward compatible with USB 1.1) x 6
- RJ-11 port x 1
- RJ-45 port x 1
- DC input x 1
- VGA monitor port x 1
- Audio-out x 1
- Mic-in x 1
- S-Video TV-Out x 1 (NTSC/PAL)
Communication - Built-in 56Kbps V.90 modem
- Built-in 10/100 based-T LAN
- One Mini-PCI slot and antenna reserved for wireless LAN
Battery - 8 cell (2000mAH/3.7V) Li-ION smart battery
AC adapter - Universal AC adapter 90W(P); Input: 100-240V,50/60hZ AC (support power on charge)
Dimensions - 332x285x42 (max) (P)
Weight - 3.5kg (P)
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1.2 Hardware System
1.2.1 CPU Module

The Intel®Northwood DT Pentium®4 processor, Intel’s most advanced, most powerful processor, is based on the
new Intel®NetBurst™micro-architecture. The Pentium 4 processor is designed to deliver performance across
applications and usages where end users can truly appreciate and experience the performance. These applications
include Internet audio and streaming video,image processing, video content creation, speech, 3D, CAD, games,
multi-media, and multi-tasking user environments. The Intel Northwood DT Pentium 4processor delivers this
world-class performance for consumer enthusiast and business professional DT users as well as for entry-level
workstation users.
Highlights of the Northwood DT Pentium 4 Processor:
Available at speeds ranging from2.26G/2.4G/2.5G/ 2.53G/2.66G/2.8G/3.06G Hz

Featuring the new Intel NetBurst™micro-architecture
Fully compatible with existing Intel Architecture-based software
Internet Streaming SIMD Extensions 2
Intel®MMX™media enhancement technology
Memory cache ability up to 4 GB of addressable memory space and system memory scalability up to 64GB of
physical memory
Support for uni-processor designs
Based upon Intel’s 0.13 micron manufacturing process
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Intel Pentium 4 Processor Product Feature:
The Intel NetBurst™micro-architecture delivers a number of new and innovative features including Hyper
Pipelined Technology, 400 or 533 MHz System Bus, Execution Trace Cache, and Rapid Execution Engine as
well as a number of enhanced features Advanced Transfer Cache, Advanced Dynamic Execution, Enhanced
Floating-point and Multi-media Unit, and Streaming SIMD Extensions 2. Many of these new innovations and
advances were made possible with improvements in processor technology, process technology, and circuit
design that could not previously be implemented in high-volume, manufacturability solutions. The features and
resulting benefits of the new micro-architecture are defined below.
Hyper Pipelined Technology
The hyper-pipelined technology of the NetBurst™micro-architecture doubles the pipeline depth compared to
theP6 micro-architecture used on today’s Pentium III processors. One of the key pipelines, the branch
prediction / recovery pipeline, is implemented in 20 stages in the NetBurst™micro-architecture, compared to 10
stages in the P6 micro-architecture. This technology significantly increases the performance, frequency, and
scalability of the processor.
400/533 MHz System Bus:
The Northwood DT Pentium 4 processor supports Intel’s highest performance desktop system bus by delivering
3.2 or 4.3GBof data per second into and out of the processor. This is accomplished through a physical signaling
scheme of quad pumping the data transfers over a100/133-MHz clocked system bus and a buffering scheme
allowing for sustained 400/533-MHz data transfers. This compares to 1.06 GB/s delivered on the Pentium III
processor’s 133-MHz system bus.
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Level 1 Execution Trace Cache:
In addition to the 8KB data cache, the Pentium 4 processor includes an Execution Trace Cache that stores up
to12K decoded micro-ops in the order of program execution. This increases performance by removing the
decoder from the main execution loop and makes more efficient usage of the cache storage space since
instructions that are branched around are not stored. The result is a means to deliver a high volume of
instructions to the processor’s execution units and a reduction in the overall time required to recover from
branches that have been mis-predicted.
Rapid Execution Engine:
Two Arithmetic Logic Units (ALUs) on the Pentium 4 processor are clocked at twice the core processor
frequency. This allows basic integer instructions such as Add, Subtract, Logical AND,Logical OR, etc. to
execute in half a clock cycle. For example, the Rapid Execution Engine on a 1.50 GHz Pentium 4 processor
runs at 3 GHz.
512KB, Level 2 Advanced Transfer Cache:
The Level 2 Advanced Transfer Cache (ATC) is 512KB in size and delivers a much higher data throughput
channel between the Level 2 cache and the processor core. The Advanced Transfer Cache consists of a 256-
bit(32-byte) interface that transfers data on each core clock. As a result,the Northwood DT Pentium 4 processor
1.6 GHz can deliver a data transfer rate of 48 GB/s.This compares to a transfer rate of 16 GB/s on the Pentium
III processor at 1 GHz. Features of the ATC include:
Non-Blocking, full speed, on-die Level 2 cache

8-way set associativity
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256-bit data bus to the level 2 cache

Data clocked into and out of the cache every clock cycle
Advanced Dynamic Execution:
The Advanced Dynamic Execution engine is a very deep, out-of-order speculative execution engine that keeps
the execution units executing instructions. The Pentium 4 processor can also view 126 instructions in flight and
handle up to 48 loads and 24 stores in the pipeline. It also includes an enhanced branch prediction algorithm
that has the net effect of reducing the number of branch mis-predictions by about 33% over the P6 generation
processor’s branch prediction capability. It does this by implementing a 4KB branch target buffer that stores
more detail on the history of past branches, as well as by implementing a more advanced branch prediction
algorithm.
Enhanced Floating-Point and Multimedia Unit:
The Pentium 4 processor expands the floating-point registers to a full 128-bit and adds an additional register
for data movement which improves performance on both floating-point and multimedia applications..
Internet Streaming SIMD Extensions 2 (SSE2):
With the introduction of SSE2, the NetBurst™micro-architecture now extends the SIMD capabilities that MMX
technology and SSE technology delivered by adding 144 new instructions. These instructions include 128-bit
SIMD integer arithmetic and 128-bit SIMD double-precision floating-point operations. These new instructions
reduce the overall number of instructions required to execute a particular program task and as a result can
contribute to an overall performance increase. They accelerate a broad range of applications, including video,
speech,and image, photo processing, encryption, financial,engineering and scientific applications.
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Features Used for Test and Performance / Thermal Monitoring:
Built-in Self Test (BIST) provides single stuck-at fault coverage of the microcode and large logic arrays, as
well as testing of the instruction cache, data cache, Translation Look aside Buffers (TLBs), and ROMs.
IEEE 1149.1 Standard Test Access Port and Boundary Scan mechanism enables testing of the Pentium 4
processor and system connections through a standard interface.
Internal performance counters can be used for performance monitoring and event counting.
Includes a new Thermal Monitor feature that allows motherboards to be cost effectively designed to
expected application power usages rather than theoretical maximums.
1.2.2 SiS M661FX Graphics/Memory Controller

The SiSM661FX chipset features a SiS Real256E GPU, an AGP-8X port, and a Shared Memory Architecture
DDR400 unified memory controller, supporting Intel Hyper Threading Technology Pentium 4 microprocessors series
with FSB 800MHZ. The integrated Real256E GPU features a high performance 3D / 2D Graphics engine, a video
accelerator, a MPEG1/II motion compensation decoder, and a video link(Muxed with AGP port) to support the TV-out
& digital flat panel. The SiSM661FX, adopting the SMA, eliminates the need and thus the cost of the frame buffer
memory by organizing the frame buffer,32MB or 64MB, in the system memory. The SiSM661FX, via the second-
generation 1GB/s Multi-threaded I/O link, interconnects the SiS963 Media I/O that integrates one EHCI compliant
USB2.0 host controller, 2 OHCI compliant USB 1.1 host controllers, dual ATA-133 IDE controllers, AC-97 V2.2
compliant audio controller, and the 10/100M bit Ethernet MAC controller with standard MII interface. Figure 1
illustrates a Pentium 4 PC system diagrams based on SiSM661FX and SiS963 chipsets.
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The SiSM661FX Host Interface features the AGTL & AGTL+ compliant bus driver technology with integrated on-die
termination to support Intel Pentium 4 series processors with FSB 800MHz. The AGP interface supports the external
AGP slot with AGP 4X/8X capability and Fast Write Transactions. The SiSM661FX incorporates the second
generation 1GB/s MuTIOL1G interface, comprising the transaction layer, link layer, and physical layer, to bridge the
SiS963 Media I/O. As seen in table 1, the SiSM661FX comprises two PCI devices sitting on the bus 0, and one PCI
device on the Bus 1.The device 0 stands for the SiSM661FX entity with device ID 0661h, and IDSEL equal to AD11.
The device 1 functions a virtual PCI to PCI bridge to connect the AGP device, with device ID equal to 0002h, and
IDSEL equal to AD12. The device 0 in the bus 1 represents the integrated Real256E GPU, with device ID equal to
6330h. The integrated GUI device 6330h cannot work concurrently with an external AGP graphics device. When an
external AGP device is installed in the system, the built-in GUI will be disabled. Figure 2 illustrates a graphic
subsystem based on the integrated GUI in SiSM661FX.
The integrated Real256E GPU features a high performance 3D accelerator with 2 Pixel / 4 Texture, and a 128 bit 2D
accelerator with 1T pipeline BITBLT engine. Two 12 bit DDR digital video links interfaced to SiS 301/2 Video
Bridge is incorporated to expand the SiSM661FX functionality to support the secondary display, in addition to the
default primary CRT display. The SiS301 Video Bridge features an NTSC/PAL video encoder with Macro Vision Ver.
7.1.L1 option for TV display, a TMDS transmitter with Bi-linear scaling capability to support up to UXGA TFT LCD
panel, and an analog RGB port to support the secondary CRT. The primary CRT display and the extended secondary
display, namely TV, TFT LCD, or 2'nd CRT, features the Dual Display Capability in the sense that both can generate
the display in independent resolutions, color depths, and frame rates. Table 2 details the capability of the video overlay
capability in SiSM661FX+SiS301/302 subsystem. In a summary, in the mirror mode, two separate H/W video overlay
engines, and two separate subpicture engines work simultaneously to deliver high quality video overlay with
subpicture in the respective display consoles simultaneously, say in the LCD, and CRT for the presentation application.
However, in the dual display mode, only one H/W video overlay, and one subpicture engine can be enabled to overlay
the video display and the subpicture in one display while the support of the second video overlay with subpicture in.
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the second display can only be realized through software engine.
Two separate buses, the 64 bit Host-to-GUI bus, and the 128 bit IGUI-to-Memory Controller bus are devised to ensure
concurrency of Host-to-GUI, and GUI-to-MC streaming. In the DDR-400 memory subsystem, the 128 bit IGUI-to-
MC bus attains 3.2 GB/s, around 52% wider bandwidth than the AGP 8X one. The DDR-400 unified memory
controller mainly comprises the Memory Arbiter, the M-data/M-Command Queues, and the Memory Interface. The
Memory Arbiter arbitrates a plenty of memory access requests from the GUI or AGP controller, Host Controller, and
the I/O bus masters based a default optimized priority list with the capability of dynamically prioritizing the I/O bus
master requests to offer a privileged service to 1) the isochronous downstream transfer to guarantee the min. latency,
& timely deliver, or 2) the PCI master downstream transfer to curb the latency within the max. tolerant period of 10us.
Prior to the memory access requests pushed into the M-data queue, any command complaint to the paging mechanism
is generated and pushed into the M-CMD queue. The M-data/M-CMD queue further orders and forwards these
queuing requests to the Memory Interface in an effort to utilizing the memory bandwidth to its utmost by scheduling
the command requests in the background when the data request streamlines in the foreground.
Features :
PC2001 Compliance
High Performance Host Interface

- Supports Intel Pentium 4 processor family with data transfer rate
- Supports Hyper-Threading Technology
- Supports 12 outstanding transactions and out-of-order completion
- Supports Quasi-synchronous/asynchronous Host-to-DRAM timing
- Supports Master delivery System bus Interrupt
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- Supports zero-wait state for contiguous CPU write data

- Supports 128K/256K/512K/1M/2M/4M/8M/16M TSEG SMRAM
- Supports Defer Function to maximize bus utilization
- Supports Dynamic Bus Inversion
- AGTL+ & AGTL compliant bus driver with auto compensation
64 Bit High Performance DDR400/DDR333/DDR266 Memory Controller

- Supports DDR400/DDR333/DDR266 SDRAM
- Supports up to 2 un-buffered DIMM DDR400
- Supports up to 3 un-buffered DIMM DDR333
- Up to 1 GB per DIMM with maximum memory size up to 3 GB
- Supports 32Mb, 64Mb, 128Mb, 256Mb, 512Mb, 1Gb SDRAM technology with page size from 2KB up to 32 KB
- Supports up to 24 open pages
- Sustains DDR SDRAM CAS Latency at options of 2, 2.5, & 3 clocks
- Auto-compensation SSTL-2.5v driver optimizing for performance and stability
- Supports Suspend to DRAM function
- Programmable shared frame buffer size 32MB or 64MB for display memory
- 128KB SMRAM space re-mapping to A0000h, B0000h, or E0000h
Integrated A.G.P. Compliant Target/66MHz Host-to-PCI Bridge

- Universal AGP v3.0 Compliant
- Support 1.5V AGP Interface Only
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- Supports Graphic Window Size from 4MBytes to 512MBytes

- Supports Pipelined Process in CPU-to-A.G.P. Access
- Supports 8 Way, 16 Entries Page Table Cache for GART to Enhance A.G.P. Controller Read/Write Performance
- Supports PCI-to-PCI Bridge Function for Memory Write from 33Mhz PCI Bus to A.G.P. device
- Supports AGP 8X/4X Interface w/ Fast Write Transaction
- Supports Hardware Enforced Coherence Outside GART Range for A.G.P. Transaction
- Supports Data Bus Inversion and Calibration Cycle
High Throughput SiS MuTIOL® 1G Interconnecting to SiS963 MuTIOL 1G Media I/O

- Bi-directional 16 bit data bus
- Perform 1GB/s bandwidth in 133MHz x 4 mode
- Distributed arbitration strategy with long contiguous data streaming
- Packet based, pipelining, and split transaction scheme
Dedicated Isochronous Response Queue

- Priority promotion for upstream Isochronous DMA memory read requests originated from real-time I/O device
controllers, such as USB or audio/modem
- Dedicated Isochronous response queue serving Isochronous downstream transfers responsive to the memory read
requests originated from real-time I/O device controllers, such as USB or audio/modem. Offers privilege service
to guarantee minimum latency & timely delivery
High Performance & High Quality 3D Graphics Accelerator

- Built-in a high performance 256-bit 3D engine
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-- Built-in 32-bit floating point format VLIW triangle setup engine

-- Built-in 2 pixel rendering pipelines and 4 texture units
-- Built-in hardware stereo auto rendering engine
-- Supports Ultra-AGPIITM up to 2.7GB/s bandwidth
-- Up to 133 MHz 3D engine clock speed
-- Peak polygon rate: 11.6 M polygon/sec @ 1 pixel/polygon with Gouraud shaded, point-sampled, linear and
bilinear texture mapping
-- Peak fill rate: 333 M pixel/sec, 666 M texture/sec @ 10,000 pixel/polygon with Gouraud shaded and two
bilinear textured, Z buffered and alpha blended
- Built-in a high quality 3D engine
-- Supports flat, and Gouraud shading
-- Supports high quality dithering
-- Supports Z-test, stencil test, Alpha-test, and scissors clipping test
-- Supports 16 ROPs
-- Supports Z-buffer, stencil buffer
-- Supports 16/24/32 bits integer Z buffer format and 32 bits floating point Z format
-- Supports 16/32 BPP render buffer format
-- Supports 1/2/4/8 stencil buffer format
-- Supports per-pixel texture perspective correction
-- Supports point-sampled, linear, bi-linear, and dual bi-linear texture filtering
-- Supports up to 2 pixels with 4 bi-linear texels within single cycles
-- Supports up to 2048x2048 texture size
-- Supports rectangle structure texture
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-- Supports 16/24/32 bpp RGB/ARGB texture format

-- Supports DTX1, DTX2, DTX3 texture compression formats
-- Supports texture transparency, blending, wrapping, mirror, and clamping
-- Supports fogging, alpha blending
-- Supports vertex fogging and fog table
-- Supports specular lighting
-- Supports 2X/4X multi-sampling full scene anti-aliasing
-- Supports back face culling
-- Supports auto-stereo rendering
High Performance 2D Graphics Accelerator

- Built-in hardware command queue
- Built-in Direct Draw Accelerator
- Built-in GDI 2000 Accelerator
- Built-in an 1T pipelined 128-bit BITBLT graphics engine with the following functions:
-- 256 raster operations
-- Rectangle fill
-- Trapezoid fill
-- Color expansion
-- Enhanced color expansion
-- Line-drawing with styled pattern
-- NT fractional point line-drawing with styled pattern
-- Multiple scan line
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-- Built-in 256 bytes pattern registers

-- Built-in 8x8 mask registers
-- Rectangle clipping
-- Transparent BitBlt with source and destination keys (16 ROPs)
-- Gradient color fill
-- Anti-aliasing text drawing
-- Alpha blended Bitblt
-- YUV to RGB color transform Bitblt
-- Source data in command queue Bitbl
-- YUV420 to YUV422 format conversion Bitblt
- Supports memory-mapped, zero wait-state, burst engine write
- Built-in 64x64x2 bit-mapped mono hardware cursor
- Built-in 64x64x16 bit-mapped blended color hardware cursor
- Maximum 128MB frame buffer with linear addressing
- Built-in engine write-buffer with byte-merge
- Supports Ultra-AGPIITM 2.7GB/s for DDR333 and 3.2GB/s for DDR400 data read for all 2D Graphics engine
functions
- Built-in source read-buffer to minimize engine wait-state
- Built-in destination read-buffer to minimize engine wait-state
Complete TV-OUT/Digital Flat Panel Solution

- Built-in secondary CRT controller to support independent display of secondary CRT, LCD and TV-out
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- AGP signals multiplexed with two 165MHz dot clock 12-bit DDR digital video link connecting to SiS video
bridge (SiS301, and SiS302) supporting
-- NTSC/PAL video output with max. resolution 1024x768x32@60NI
-- Digital LCD monitor with max. resolution 1600x1200x32@60NI
-- The secondary CRT with max. resolution 1600x1200x32@60NI
-- The Independent dual view support of the CRT+LCD, CRT+TV, LCD+TV combinations.
MPG-2/1 Video Decoder

- MPEG-2 ISO/IEC 13818-2 MP@HL and MPEG-1 ISO/IEC 11172-2 standards compliant
- Built-in advanced hardware DVD acceleration logic
- Support AGP bus master/LFB-mode code fetching
- Half pixel resolution in motion compensation
- Supports up to 20 Mbit/sec bit rate decoding
- Support VCD, DVD and HDTV (all ATSC modes) decoding
- Direct DVD to TV playback
Video Accelerator
- Supports video windows with overlay function
- Supports YUV-to-RGB color space conversion
- Supports bi-linear video interpolation with integer increments of 1/2048
- Supports graphics and video overlay function
-- Independent graphics and video formats
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-- 16 color-key and/or chroma-key operations

-- Support YUV or RGB format chroma key
-- Rectangular video window mode
-- Video only mode
-- VCD, DVD and up to HDTV playback mode
-- Supports reading-back of current refresh scan line
- Supports tearing free double buffer flipping
- Supports RGB555, RGB565, YUV422, and YUV420 video playback format
- Supports filtered horizontal up and down scaling playback
- Supports de-interlaced function to improve field-display sources display quality
- Supports DVD sub-picture playback overlay
- Supports DVD playback auto-flipping
- Built-in video playback line buffers to support 1920x1080 video playback
- Supports DVD sub-picture playback overlay
- Built-in video line buffers and sub-picture buffers for DVD quality video
- Built-in independent Gamma correction RAM
- Supports DCI Drivers
- Supports Direct Draw Drivers
High Integration
- Built-in CRT FIFOs to support ultra high resolution graphics modes and reduce CPU wait-state
- Built-in programmable 24-bit true-color RAMDAC up to 333 MHz pixel clock
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-- Built-in reference voltage generator and monitor sense circuit

-- Supports downloadable 24 bits RAMDAC for gamma correction in high color and true color modes
-- Support programmable 4 levels DAC current ratio (700, 750, 800, 850 mv)
-- Support programmable pedestal level (0, 0.75mv)
-- Support programmable 4 levels slew rate control
- Built-in two clock generators for CRT, 2D, 3D and MPEG Engine
- Built-in TV Encoder Interface
Power Management
- Supports VESA Display Power Management Signaling (DPMS) compliant VGA monitor for power management
- Supports direct I/O command to force graphics controller into standby/suspend/off state
- Power down internal Gamma/Palette SRAM in direct color mode
- Supports PCI power management configuration registers for supporting ACPI power down controller
- Power down all internal macro cells such as SRAM, DAC, clock generator when power saving mode
- Supports clock stopping for video accelerator, 2D, 3D and MPEG decoder when disabled
- Supports auto clock throttling for 2D engine, 3D engine
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1.2.3 SiS963L MuTIOL 1G Media I/O

The SiS963L MuTIOL 1G Media I/O integrates one Universal Serial Bus 2.0 Host Controllers, the Audio Controller
with AC 97 Interface, the Ethernet MAC Controller w/ standard MII interface, two Universal Serial Bus 1.1 Host
Controllers, the IDE Master/Slave controllers, and SiS MuTIOL 1G technology. The PCI to LPC bridge, I/O
Advanced Programmable Interrupt Controller, legacy system I/O and legacy power management functionalities are
integrated as well.
The high-speed host controller implements an EHCI compliant interface that provides 480Mb/s bandwidth for six
USB 2.0 ports. The two USB1.1 host controllers implement an OHCI compliant interface and each USB1.1 host
controller provides 12Mb/s bandwidth for three USB 1.1 ports. The totally six USB ports can be automatically routed
to support a High-speed USB 2.0 device or Full- or Low-speed USB 1.1 device. Besides, each port can be optionally
configured as the wake-up source. Legacy USB devices as well as over current detection are also implemented. The
Integrated AC97 v2.2 compliance Audio Controller that features a 6-channels of audio speaker out and HSP v.90
modem support. Additionally, the AC97 interface supports 4 separate SDATAIN pins that is capable of supporting
multiple audio codecs with one separate modem codec.
The integrated Fast Ethernet MAC Controller features an IEEE 802.3 and IEEE 802.3x compliant MAC with external
LAN physical layer chip supporting full duplex 10 Base-T, 100 Base-T Ethernet, or with external Home networking
physical layer chip supporting 1Mb/s & 10Mb/s Home networking. Additionally, 5 wake-up Frames, Magic Packet
and link status changed wake-up function in G1/G2 states are supported. For storing Mac address, two schemes are
provided: 1. Store in internal APC register or 2. Store in external EEPROM.
The integrated IDE Master/Slave controllers features Dual Independent IDE channels supporting PIO mode 0,1,2,3,4,
and Ultra DMA 33/66/100/133. It provides two separate data paths for the dual IDE channels that sustain the high data
transfer rate in the multitasking environment.
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SiS963L supports 6 PCI masters and complies with PCI 2.2 specification. It also incorporates the legacy system I/O
like: two 8237A compatible DMA controllers, three 8254 compatible programmable 16-bit counters, hardwired
keyboard controller and PS2 mouse interface, Real Time clock with 512B CMOS SRAM and two 8259A compatible
Interrupt controllers. Besides, the I/O APIC managing up to 24 interrupts with both Serial and FSB interrupt delivery
modes is supported.
The integrated power management module incorporates the ACPI 1.0b compliance functions, the APM 1.2
compliance functions, and the PCI bus power management interface spec. v1.1. Numerous power-up events and power
down events are also supported. 25 general purposed I/O pins are provided to give an easy to use logic for specific
application. In addition, the SiS963L supports Deeper Sleep power state for Intel Mobile processor. For AMD
processor, the SiS963L use the CPUSTP# signal to reduce processor voltage during C3 and S1 state.
A high bandwidth and mature SiS MuTIOL 1G technology is incorporated to connect SiS MuTIOL 1G North Bridge
and SiS963L MuTIOL1G Media I/O together. SiS MuTIOL 1G technology is developed into three layers, the Multi-
threaded I/O Channels Layer delivering 1.2GB bandwidth to connect embedded DMA Master devices and external
PCI masters to interface to Multi-threaded I/O Channels layer, the Multi-threaded I/O Packet Layer in SiS963L to
transfer data w/ 1GB/s bandwidth from/to Multi-threaded I/O Channels layer to/from SiS MuTIOL 1G North Bridge,
and the Multi-threaded I/O Packet Layer in SiS MuTIOL 1G North Bridge to transfer data w/ 1GB/s from/to memory
sub-system to/from the Multi-threaded I/O Packet Layer in SiS963L.
23
Features :
Meet PC2001 Requirements
Support AMD Hammer CPU and HyperTransport Technology.
Support Watchdog Timer Hardware Requirements for Microsoft Windows .NET Server
High performance SiS MuTIOL 1G Technology Interconnecting SiS North bridge and South bridge chips
- Bi-directional 16-bit data bus
- Perform 1GB/s bandwidth in 133MHz x 4 mode
- Distributed arbitration strategy with long contiguous data streaming
- Packet based, pipelining, and split transaction scheme
Integrated Multi-threaded I/O link ensures concurrency of upstream/down stream data transfer
with1.2GB/s bandwidth
Multiple DMA Bus Architecture

- Concurrent Servicing of all DMA Devices: Dual IDE Controllers, two USB 1.1 HC, One USB 2.0 HC, MAC
Controller, Audio/Modem DMA Controller
- Separate 32 Bit Input and Output Data Bus Scheme for each DMA Device
- Advanced Performance Merits of Split & Pipelined Transaction and Concurrent
- Execution among Multi-I/O Devices
- Support isochronous request and continuous packet transmission
24
Integrated MuTIOL 1G to PCI Bridge

- PCI 2.2 Specification Compliance
- Supports up to 6 PCI Masters
- Two Prefetch cache Buffers support 2 delayed transactions
- Each PCI request can be programmed at one of four level priority
- Write Promotion Mechanism to Guarantee the 10 µs Time Limit of PCI Memory Write
Dual IDE Master/Slave Controller

- Integrated Multithreaded I/O Link Mastering with Read Pipelined Streaming
- Dual Independent IDE Channels Each with 32 DW FIFO
- Native and Compatibility Mode
- PIO Mode 0, 1, 2, 3, 4 and Multiword DMA Mode 0, 1, 2
- Ultra DMA 33/66/100/133
- ATA/ATAPI 48-bit addressing compliance and support greater than 137Gbytes device.
- Silicon Integrated Series Termination Resistors
- Silicon Integrated IDE Bus pull up / down resistors
- PCI 2.2 Specification Compliance
- Bus master programming interface (SFF-8038i) specification compliance
Universal Serial Bus Host Controller

- Integrated Multithreaded IO Link Mastering
- Two Independent OHCI USB 1.1 Host Controllers and One EHCI USB 2.0 Host Controller, support up to six ports
25
- Supports wake-up from S1-S3

- Legacy Keyboard/Mouse support
- Supports only one Debug port at port 0(first port), it is at USB 2.0 transfer rate.
Integrated Fast Ethernet MAC Controller

- Multithread I/O link Mastering with Read/Write Concurrent transaction
- IEEE 802.3 and 802.3x Standard Compatible
- Supports Enhanced Software and Automatic Polling schemes to access PHY registers
- Supports full duplex 10base-T, 100base-Tx, 1 Mb/s & 10 Mb/s Home Networking
- Support ACPI v1.0b and PCI Power Management v1.1 Standard
- Support 5 Wake-up Frame, Magic Packet, and Link Status changed wake-up function at G1/G2 state
- Integrated 128-bit multicast hash table
- Support 2K bytes transmit and receive Data FIFO
- MAC address store scheme from external 4-pin EEPROM or Internal APC register
Integrated Audio Controller with AC97 Interface.

- AC97 v2.2 compliance
- 6 Channels of AC97 speaker outputs and V.90 HSP-Modem
- 4 Separate SDATAIN pins supporting multiple Audio Codecs and one Modem Codec
- Supports Audio and Modem function with Multithreaded I/O link mastering
- Supports two Consumer Audio Digital interface: traditional Consumer Digital Audio Out and AC97 V2.2
Compliance Consumer Audio Digital Interface
26
- Supports VRA Mode for both AC97 Audio Link and Consumer Audio Digital Interface
Advanced Power Management

- Meets ACPI 1.0b Requirements
- Meets APM 1.2 Requirements
- ACPI Sleep States Include S1, S3, S4, S5
- CPU Power States Include C0, C1, C2 C3, C4
- Supports Intel Deeper Sleep Power State for Intel mobile processor.
- Reduce AMD processor voltage during S1/C3 state
- Power Button with Override only wake up by Power Button
- RTC Day-of-Month, Month-of-Year Alarm
- 24-bit Power Management Timer
- LED Blinking in S0, S1 and S3 States
- ACPI System Wake-up Events
- ACPI S1 Wake-up Events: Power Button, PS/2 keyboard Hot-Key/Any-key and Mouse, RTC Alarm, Modem,
Ring-In, LAN, PME#, AC’97 Wake-Up, USB Wake-Up, and 1394 Wake-up
- ACPI S3 Wake-up Events: Power Button, PS/2 keyboard Hot-Key/Any-key and Mouse, RTC Alarm, Modem,
Ring-In, GPIO7, LAN, PME#, AC’97 Wake-Up, USB Wake-Up, and 1394 Wake-up.
- ACPI S4/S5 Wake-up Events: Power Button, PS/2 keyboard Hot-Key/Any-Key and Mouse, RTC Alarm, Modem,
Ring-In, GPIO7, LAN, PME#, AC’97 Wake-Up, and P1394 Wake-up.
- Software Watchdog Timer
- PCI Bus Power Management Interface Spec. 1.1
27
- Support PCI CLKRUN and STP_PCI function (for Mobile only)

- Support RTC32KHz output from GPIO18 (for Mobile only)
- Integrated 32-bit Random Number Generator
- Support one GTL-level input signal used to instantly power off the system
- Support one GTL-level input signal used to assert SMI#/SCI#
Integrated DMA Controller

- Two 8237A Compatible DMA Controllers
- 8/16- bit DMA Data Transfer
Integrated Interrupt Controller

- Two 8259A Compatible Interrupt Controllers for up to 15 interrupts
- Programmable Level or Edge Triggered Interrupts
- Support Serial Interrupt
- Support 8 PCI interrupts for internal device
- Support Message Interrupt Delivery Mode
- Integrated I/O APIC in Serial Mode or FSB Interrupt Delivery Model for up to 24 Interrupts
Three 8254 Compatible Programmable 16-bit Counters

- System Timer Interrupt
- Generate Refresh Request
- Speaker Tone Output
28
Integrated Keyboard Controller

- Hardwired Logic Provides Instant Response
- Supports PS/2 Mouse Interface
- System Sleep and Power-Up by Hot-Key
- KBC and PS2 Mouse Can Be Individually Disabled
Integrated High-Performance Event Timer

- Support three timers operating at 32- or 64-bit mode
Integrated PCI to LPC Bridge

- LPC 1.0 Compliance
- Support Two Master/DMA devices
Integrated Real Time Clock (RTC) with 512B CMOS SRAM

- Supports ACPI Day-of-Month and Month-of-Year Alarm
Universal Serial Bus Host Controller
NAND Tree for Ball Connectivity Testing
371-Balls BGA Package
1.8V Core with Mixed 1.5V, 1.8V, 2.65V and 3.3V I/O CMOS Technology
29
1.2.4 Memory
64MB 400/33/266MHz DIMM DDR Memory expandable to 1024 MB (2 DDR slot )
Support 184pin DDR DIMM Memory
Table 2. Memory Expansion Capacity
Slot1 Slot2 Slot3

256MB 0MB 256MB
256MB 256MB 512MB
512MB 0MB 512MB
512MB 256MB 768MB
512MB 512MB 1024MB
1.2.5 I/O Ports

Audio Ports
- Microphone In & Line Out

- Built in 2 high quality internal speaker (2W)
- Built in 1 mono microphone
30
RJ-11
- Connection to Modem Daughter Board Connector
Table 3. Modem Port
Pin Signal Name Direction Description

1 NC - No Connect
2 LINE + I/O Phone Line Positive
3 LINE - I/O Phone Line Negative
4 NC - No Connect
Figure 1 . Modem Connector
RJ-45
- Connection to On-Board NIC controller
Table 4. LAN Port

1 TX+ Out Transmit Data Ring
2 TX- Out Transmit Data Tip
3 RX+ IN Receive Data Ring
4 TERM1 - Internal termination resistor
6 RX IN Receive Data Tip
7 TERM3 - Internal termination resistor Figure 2 . LAN Connector
31
USB Ports
- Six industry standard USB 2.0 ports
Table 5. USB Port

1 VCC - USB Device Power (+5VDC)
2 DATA- I/O Balanced Data Negative
3 DATA+ I/O Balanced Data Positive
4 GND - Ground
Figure 3 . USB Connector
7 Pins S-VIDEO Port for TV-Out
- Support up 1024*768 resolution

- Support PAL and NTSC system
- Support composite Output by a transfer cable(RCA)
Table 6. S-Video Port
Pin Signal Name Direction

1 GND -
2 NC -
3 GND -
4 LUMA O
5 NC -
6 CRMA O
7 COMP O
32
CRT Ports
- Standard VGA compatible port

- DDC1 and DDC2B compliant (RCA)
Table 7. CRT Connector
PIN SIGNAL DESCRIPTION

1 RED Red analog video output
2 GREEN Green analog video output
3 BLUE Blue analog video output
4 Monitor Sense Monitor Sense
5 GND Ground
6 GND Ground
7 GND Ground
8 GND Ground
Figure 4 . CRT Connector
9 VCC +5VDC
10 GND Ground
11 Monitor Sense Monitor Sense
12 CRT DATA Data from DDC monitor
13 HSYNC Horizontal Sync control
14 VSYNC Vertical Sync control
15 CRT CLK Clock to DDC monitor
33
1.2.6 PC Card Slot

One Type II/I slot supporting the 1997 PC Card standard,and including full R2 (16-bit) and 32-bit Cardbus data
transfer
TI PCI1410A (PCMCIA Controller) & TI TPS2211A (Power Switch)
1.2.7 Graphical Subsystem

Integrate Real256E GPU +SIS301LV Video Bridge
1.2.8 Display
Internal LCD Display is 15” TFT XGA panel
External Video refresh rate of up to 85Hz supported
- Vertical refresh frequencies to meet VESA requirements
- Simultaneous video in specified video modes – switchable with hot key
1.2.9 LEDs Indiactor

CDROM & HDD & NUM & CAP & SCROLL & WLAN
AC & BAT & CHARGE
34
1.2.10 Read Only Memory (BIOS Flash)

Fully compatible with industry standard software including Windows 2000 & Windows XP
Fully supports APM V1.2 and latest ACPI specification
2Mb Flash BIOS
Inside BIOS core
1.2.11 Power Management Features

Local standby mode (Individual devices such as HDD, graphics controller,LCD etc.. )
CPU Idle mode (Including ACPI modes C1 and C2)
Suspend mode (Including S1 and S3 ACPI modes)
Fully APM V1.2 compliant
Fully ACPI V1.1 compliant
Hibernate for Windows XP
Thermal management
Fully US EPA Energy Start compliant
35
1.2.12 Keyboard Controller

Winboard W83L950D
1.2.13 Buttons
Power on bin
1.2.14 Modem
Table 8. Modem Daughter Board Connector
PIN SIGNAL NAME PIN SIGNAL NAME

1 MONO_OUT 2 NC
3 GND 4 MODEM_SPK
5 NC 6 NC
7 NC 8 GND
9 NC 10 +5V
11 NC 12 NC
13 NC 14 NC
15 GND 16 Pull Up to +3V
17 +3V 18 +5V
19 GND 20 GND
21 +3V 22 ACSYNC
23 ACSDOUT 24 MSDIN
25 -ACRST 26 MSDIN
27 GND 28 GND
29 GND 30 ACBITCLK
36
1.3 Electrical Characteristic

1.3.1 Power On Sequence
8599 Power on Sequence Flow Chart
Press Power Button
CPU
Power BTN#(1)
Main power(6)
VCCPVID(7) PS ON#(5) Embeded Controller
SISPWRBTN#((4) W83L950D
DC TO DC Converter
LDO +12VS/+5VS/+3VS/+1.5VS/
+5VS PWR_ON(2)
VDD_MEN2.5/+1.8VS/+1.5VS/ H8_PWROK(9)
+1.25_DDR
CPU_CORE_EN(8)
South Bridge AUXOK(3) DC to DC Converter
SIS963L +2.5V_DDR/1.8V/+3V/
+5V/+12V/+1.5V
DC TO DC Converter
+VCC_CORE
Standby_Power
PCIRST#(10)
MAIN_POWER System
CPUPWRGD(11) North Bridge

CPURST#(12) SiS M661FX
37
1.3.2 Power Off Sequence

8599 Power off Sequence Flow Chart
MAINPWR(5)
CPU PS ON#(1)
Embeded Controller
W83L950D
SISPWRBTN#(4)
DC TO DC Converter H8_PWROK(2)
+12VS/+5VS/+3VS/+1.5VS/
South Bridge
VDD_MEN2.5/+1.8VS/+1.5VS/ S3AUXSW#(6)
SIS963L
+1.25_DDR
PCIRST#(3)
MAIN_POWER System
CPURST#(4) North Bridge

SiS M661FX
38
1.3.3 Suspend To RAM Sequence

8599 STR Sequence Flow Chart
SLP#(6) Sleep Event (1)

H_STPCLK#(2) CPU
CPURST# (10)
Self-Refresh (3)
North Bridge DDR SO-DIMM
CKE[0:5] (4)
SiS M661FX
PCIRST# (9)
DC TO DC Coverter
South Bridge
+12VS/+5VS/+3VS/+1.5VS/VDD_MEM2.5/
SiS963L
+1.8VS/+1.25_DDR
H8_ PS_ON#(7) S3AUXSW#(5)

PWROK(8)
Embeded Controller MAINPWR(11)

W83L950D
39
1.3.4 Resume from Suspend To RAM Sequence

8599 Resume From STR Sequence Flow Chart
Wakeup Event (1)

CPU
CPURST# (6)
Self-refresh (3)
North Bridge
SIS M661FX CKE#[0:5] (7) DDR SO-DIMM
PCIRST# (5)
South Bridge
SIS 963L DC To DC Converter
+12VS/+5VS/+3VS/+1.5VS/VDD_MEM2.5/
+1.8VS/+1.5VS/+1.25_DDR
H8_PWROK (4) PS_ON# (2) S3AUXSW# (7)
MAINPWR (3)
Embeded Controller
W83L950D
40
1.3.5 Power Consumption Of Suspend Mode

Suspend to RAM < 40mA
Suspend to Disk / Soft-Off /Mechanical Off < 1mA
41
1.4 Appendix 1: SiS963L GPIO Definitions

Pin Name Pin Function Signal Name Type Define Power Plan
GPIO0 GPIO ENBKL_NAME O MAIN
GPIO1 GPIO FLASH O MAIN
GPIO2 GPIO SB_THRM# I MAIN
GPIO3 GPIO EXTSMI# I MAIN
GPIO4 GPIO CLKRUN# I/O MAIN
GPIO5 GPIO MPCI_PD# I MAIN
GPIO6 GPIO SPK_OFF# O MAIN
GPIO7 GPIO GPWAK# T/P AUX
GPIO8 GPIO WAKE_UP# I AUX
GPIO9 GPIO SCI# I AUX
GPIO10 GPIO CRT_IN# I AUX
GPIO11 GPIO STP_PCI# O AUX
GPIO12 GPIO CPU_STP# O AUX
GPIO13 GPIO DPRSLPVR O AUX
GPIO14 GPIO LCD_ID0 I AUX
GPIO15 GPIO GMUXSEL T/P AUX
GPIO16 GPO CPUPERF# O AUX
GPIO17 GPO N/A T/P AUX
GPIO18 GPO N/A T/P AUX
GPIO19 GPIO SMBCLK I/O AUX
GPIO20 GPIO SMBDATA I/O AUX
GPIO21 GPI GPIO21_EESK AUX
GPIO22 GPI GPIO22_EEDI AUX
GPIO23 GPI GPIO23_EEDO AUX
GPIO24 GPI GPIO24_EECS AUX
APICD0 NC MAIN(GTL LEVEL
APICD1 NC MAIN(GTL LEVEL
APICCLK NC MAIN
OC5 GPI AUX 42
1.5 Appendix 2: Keyboard Controller Pin Definitions (1)

Pin Port Signal Name Type Description
39~54 GP17~GP0 KO[0..15] O Keyboard Matrix
55~62 GP37~GP30 KI[7..0] O Keyboard Matrix
65~68 GP85~GP82 LAD[0..3] I/O LPC BUS
70 GP80 PCI_KBCLK I LPC CLK
69 GP81 SERIRQ O Serial IRQ
64 GP86 KBCLRST# I LPC Reset
63 GP87 LFRAME# I/O LPC FRAME
17 GP50 MAINPWR O We use this signal to control "VS" power on/off. HI:ON,LOW:OFF
15 GP52 SUSB# I STR Indicator signal
14 GP53 ADEN# I ADAPTOR IN
23 GP42 SW_+5VA O Switch +5VA
22 GP43 COVER_SW# I LCD Cover switch
19 GP46 SCI O Connect to South Bridge (SiS963L) to system configuration interrupt (ACPI mode)
3 GP76 BAT_DATA I/O SMBUS DATA for LM86 themal sensor & BATT THERMAL
2 GP77 BAT_CLK I/O SMBUS CLK for LM87 themal sensor & BATT THERMAL
27 GP40 FAN0 O Control CPU FAN ON & Tum ON/OFF Duty
26 GP41 FAN1 O Control System D/D FAN (Second FAN) ON & Tum ON/OFF Duty
13 GP54 FAN0_SPD0 I Return FAN0 (CPU FAN) Speed
12 GP55 FAN0_SPD1 I Return FAN0 (Second FAN) Speed
16 GP51 BATT_DEAD# I Indicated the battery capacity is not enough to power on system
18 GP47 PWRON O Control System Power ON/OFF
21 GP44 NUM# O Keyboard Number Lock indicator
20 GP45 CAP# O Keyboard CAPs Lock indicator
9 GP70 T_DATA I/O Conneter to touch Pad DATA
8 GP71 LEARNING# I Battery discharge control
7 GP72 SIS_PWRBTN# O Power Button Signal to SiS963L
6 GP73 T_CLK I/O Connect to Touch Pad clock
43
1.5 Appendix 2: Keyboard Controller Pin Definitions (2)

Pin Port Signal Name Type Description
5 GP74 PWROK O System Power Good
4 GP75 PSON#_SB I System inter S4~S5,Positive Logic
38 GP20 SB_THRM# O TO SiS963L,Regustang the sysytem toenter power mangmentmode,Clock Throtting
37 GP21 WAKE_UP# O Connect to South Bridge (SiS963L) to wake up system
36 GP22 BATT_G# O The indicator when battery in charging
35 GP23 BATT_R# O The indicator when battery in charging
34 GP24 EXTSM# O Connect to South Bridge (SiS963L) to system management interrupt (Non-ACPI mode)
33 GP25 BATT_POWER# O The indicater when power supply from Battery
32 GP26 SCROLL# O Keyboard scroll lock indicator
31 GP27 AC_POWER# O The indicator when power supply from AC-Adapter
11 GP56 BLADJ O Back/Light Adijust Control
10 GP57 CHG_I O Supply current to Battery
1 GP60 PWRBTN# I Power Switch Signal to KBC
80 GP61 VRMPWRGD I CPU Power Good
79 GP62 +3V I
78 GP63 BAT_TEMP I Report Battery Thermal
77 GP64 BAT_VOLT I Report Battery Voltage
76 GP65 I_LIMIT I FOR BATTERY CHARGE I limit
75 GP66 I_CHG I Battery charge current
74 GP67 I_DISCHG I Battery discharge current
25 RESET# RESET# I KBC Reset
28 XIN XIN
29 XOUT XOUT
72 VREF +3VA
71 VCC +KBC_VDDA
44
1.6 Appendix 3: Audio Performance

8599 meet all the following items
Table 9. Digital Playback (PC-D-A) for Line Output

Test Items Mobile System
Full Scale Output Voltage ≧0.7Vrms (3.3V audio)
Sample Frequency Accuracy ≦0.1%
Frequency Response (44.1ks/sec) 20Hz～15kHz
Frequency Response (48ks/sec) 20Hz～15kHz
Dynamic Range (SNR) ≧70dBFSA
THD+N ≦-55dBFS
Cross-talk ≧50dB
Table 10. Analog Pass-through(A-A) for Microphone Input to Line Output

Frequency Response 100Hz～12kHz
THD+N ≦-50dBFS
Table 11. Digital Recording(A-D-PC) for Microphone Input

Full Scale Input Voltage ≧100mVrms
Sample Frequency Accuracy ≦0.1%
Frequency Response(22.05ks/sec) 100Hz～8.8kHz
THD+N ≦-50dBFS
45
2. System View and Disassembly

2.1 System View
2.1.1 Front View

1 Top Cover Latch

1
2.1.2 Left-side View

1 Lock

2 Ventilation Openings

1
2
46
2.1.3 Right-side View

1 CD/DVD driver
2 Line out jack 8

10 9
7

3 MIC in jack

4 USB port *2

5 RJ-45 connector

4
2 3 5

6 RJ-11 connector
1 6

7 AC Power Indicator

8 Battery Power Indicator

9 Battery Charge Indicator

10 PC Card slot
2.1.4 Rear View

1 VGA port

2 S-Video output connector

3 Ventilation Openings
1 2
3
4
5

4 USB port *4

5 Power connector
47
2.1.5 Bottom View

1

1 Wireless Card cover

2 CPU
2
2.1.6 Top-open View

1 LCD Screen
2 Stereo set
3 Keyboard
1

4 Caps Lock

5 Wireless Card Indicator

2

6 CD/DVD-Rom Indicator
2
11
7 HDD Indicator
3
8 Num Lock
9 Caps Lock

10 Scroll Lock 9
4 10
6
5 8

11 Power Button 7
48
2.2 System Disassembly

The section discusses at length each major component for disassembly/reassembly and show corresponding
illustrations. Use the chart below to determine the disassembly sequence for removing components from the
notebook.
NOTE: Before you start to install/replace these modules, disconnect all peripheral devices and make sure the
notebook is not turned on or connected to AC power.
2.2.1 Battery Pack
2.2.2 Keyboard
Modular Components 2.2.3 CPU
2.2.4 HDD Module
2.2.5 DVD-ROM Drive
2.2.6 DIMM module
2.2.7 Modem Card
NOTEBOOK
2.2.7 LCD Assembly

LCD Assembly Components 2.2.8 Inverter Board
2.2.9 LCD Panel
2.2.10 System Board

Base Unit Components
2.2.11 Touch Pad
49
2.2.1 Battery Pack

Disassembly
1. Carefully put the notebook upside down.
2. Remove the four screws, then remove the CPU cover. (Figure 2-1)
3. Put up the battery pack, then free the battery pack. (Figure 2-2)
Figure 2-1 Remove the four screws Figure 2-2 Remove the battery pack
Reassembly
1. Replace the battery pack into the compartment. The battery pack should be correctly connected when you hear a
clicking sound.
2. Replace the CPU cover and secure the four screws.
50
2.2.2 Keyboard
Disassembly
1. Remove the battery pack. (Refer to section 2.2.1 Disassembly)
2. Open the top cover.
3. Loosen the five latches locking the keyboard. (Figure 2-3)
Figure 2-3 Loosen the five latches
51
4. Slightly lift up the keyboard and disconnect the cable from the mother board, then separate the keyboard.
(Figure 2-4)
Figure 2-4 Lift up the keyboard and disconnect the cable
Reassembly
1. Reconnect the keyboard cable and fit the keyboard back.
2. Replace the keyboard into place and fasten the five latches.
3. Replace the battery pack. (Refer to section 2.2.1 reassembly)
52
2.2.3 CPU
Disassembly
1. Remove the battery pack. (Refer to section 2.2.1 Disassembly)
2. Remove five screws that secure the heatsink upon the CPU. (Figure 2-5)
3. Disconnect the fan’s power cord from system board. (Figure 2-6)
Figure 2-5 Remove five screws Figure 2-6 Disconnect the cable
53
4. To remove the existing CPU, lift the socket arm up to the vertical position. (Figure 2-7)
CPU socket stopper
Figure 2-7 Free the CPU
Reassembly
1. Carefully, align the arrowhead corner of the CPU with the beveled corner of the socket, then insert CPU pins into
the holes. Place the lever back to the horizontal position and push the lever to the left.
2. Reconnect the fan’s power cord to the system board, fit the heatsink onto the top of the CPU and secure with five
screws.
3. Replace the battery pack. (See section 2.2.1 reassembly)
54
2.2.4 HDD Module

Disassembly
1. Carefully put the notebook upside down. Remove the battery pack. (Refer to section 2.2.1 Disassembly)
2. Remove two screws fastening the HDD module and slightly lift up HDD module. (Figure 2-8)
3. Remove four screws to separate the hard disk drive from the bracket, free the hard disk driver. (Figure 2-9)
Figure 2-8 Remove HDD module Figure 2-9 Free the HDD driver
Reassembly
1. Attach the bracket to hard disk drive and secure with four screws.
2. Slide the HDD module into the compartment and secure with two screws.
55
2.2.5 CD/DVD-ROM Drive

Disassembly
2. Remove two screws fastening the CD/DVD-ROM drive. (Figure 2-10)
3. Insert a small rod, such as a straightened paper clip, into CD/DVD-ROM drive’s manual eject hole () and push
firmly to release the tray. Then gently pull out the CD/DVD-ROM drive by holding the tray that pops out().
(Figure 2-10)
Figure 2-10 Remove the CD/DVD-

ROM drive
Reassembly
1. Push the CD/DVD-ROM drive into the compartment and secure with one screw.
56
2.2.6 DIMM Module

Disassembly
2. To remove the memory module, pull the retaining clips outwards to the unlocked and lift the DIMM module up.
(Figure 2-11)
Figure 2-11 Remove the DIMM module
Reassembly
1. Replace DIMM module and lock it retaining clips.
57
2.2.7 Modem Card

Disassembly
1. Remove the battery, keyboard, CPU, hard disk driver, CD/DVD-ROM driver. (Refer to sections 2.2.1, 2.2.2,
2.2.3, 2.2.4, 2.2.5 Disassembly)
2. Remove the four screws. (Figure 2-12)
3. Remove the eleven screws and put up the housing. (Figure 2-13)
Figure 2-12 Remove eleven screws Figure 2-13 Free the housing
58
4. Remove three screws and free the bottom shielding. (Figure 2-14)
5. Disconnect the cable and remove the two screws. (Figure 2-15)
Figure 2-14 Free the bottom shielding Figure 2-15 Free the Modem Card
Reassembly
1. Replace the modem card and secure two screws.
2. Reconnect the cable to the system board.
3. Replace the bottom shielding and secure the three screws.
4. Fit the top cover and the housing, then secure the fifteen screws.
5. Replace CD/DVD-ROM, HDD, CPU, keyboard and battery pack. (See sections 2.2.5, 2.2.4, 2.2.3, 2.2.2 and 2.2.1
Reassembly)
59
2.2.8 LCD ASSY

Disassembly
1. Remove the battery pack and keyboard. (See sections 2.2.1 and 2.2.2 Disassembly)
2. Remove two hinge covers. (Figure 2-16)
3. Carefully put the notebook upside down. Remove the two screws fastening the wireless cover. (Figure 2-17)
Figure 2-16 Remove two hinge covers Figure 2-17 Remove the two screws
60
4. Disconnect the LCD cable from the system board and detach the antenna. (Figure 2-18)
5. Remove the four screws and put up the LCD assembly, then free the LCD assembly. (Figure 2-19)
Figure 2-18 Disconnect the LCD cable Figure 2-19 Free the LCD assembly
Reassembly
1. Attach the LCD assembly to the base unit and secure with four screws, then fit the antenna.
2. Reconnect the one cable to the system board, Then replace the wireless cover and secure two screws.
3. Replace the two hinge covers.
4. Replace the keyboard and battery pack. (Refer to sections 2.2.2 and 2.2.1 Reassembly)
61
2.2.9 Inverter Board

Disassembly
1. Remove the battery, keyboard and LCD assembly. (Refer to section 2.2.1, 2.2.2 and 2.2.8 Disassembly)
2. Remove two screws and rubbers on the corners of the LCD panel. (Figure 2-20)
3. Insert a flat screwdriver to the lower part of the LCD cover and gently pry the frame out. Repeat the process until
the cover is completely separated from the housing.
4. Remove the one screw fastening the inverter board. (Figure 2-21)
Figure 2-20 Remove LCD cover Figure 2-21 Remove the one screw
62
5. To remove the inverter board on the lower part of the LCD housing , disconnect two cables. (Figure 2-22)
Figure 2-22 Remove the inverter board
Reassembly
1. Reconnect the two cables. Fit the inverter board back into place and secure with one screw.
2. Replace the LCD cover and secure with two screws and rubbers.
3. Replace the LCD assembly. (Refer to section 2.2.8 Reassembly)
63
2.2.10 LCD Panel

Disassembly
1. Remove the battery, keyboard and LCD assembly. (Refer to sections 2.2.1, 2.2.2 and 2.2.8 Disassembly)
2. Remove the LCD cover. (Refer for two steps 2,3 of section 2.2.9 Disassembly)
3. Remove the eight screws fastening the LCD panel and detach the cable, Then lift it up. (Figure 2-23)
4. Remove the five screws fastening the LCD brackets. (Figure 2-24)
Figure 2-23 Remove the eight screws Figure 2-24 Remove the five screws
and detach the cable
64
5. Disconnect the cable and free the LCD panel. (Figure 2-25)
Figure 2-25 Free the LCD panel
Reassembly
1. Reconnect the cable, then replace the LCD brackets and secure with five screws.
2. Fit the LCD panel back into place and secure with eight screws, then reconnect the cable to the inverter board.
3. Replace the LCD cover and secure with two screws and rubbers. (Refer to section 2.2.9 Reassembly)
4. Replace the LCD assembly. (Refer to section 2.2.8 Reassembly)
65
2.2.11 System Board

Disassembly
1. Remove the battery, keyboard, CPU, hard disk drive, CD/DVD-ROM drive, DIMM module, modem card and
LCD assembly. (Refer to sections 2.2.1, 2.2.2, 2.2.3, 2.2.4, 2.2.5, 2.2.6, 2.2.7 and 2.2.8 Disassembly)
2. Disconnect the heatsink’s cable from the system board and remove two screws fastening the heatsink.
(Figure 2-26)
3. Disconnect the speaker’s cable and the touch pad’s cable from the system board.To free the system board, please
remove one screw and four hex nuts that fastening the system board. (Figure 2-27)
Figure 2-26 Free the heatsink Figure 2-27 Free the system board
66
Reassembly
1. Replace the system board into the top cover and secure with one screw and four hex nuts.
2. Reconnect the touch pad’s cable, the speaker’s cable.
3. Replace the heatsink and secure the two screws, then reconnect the cable to the system board.
4. Replace the modem card. (See sections 2.2.7 reassembly)
5. Replace the LCD assembly, DIMM module, CD/DVD-ROM, HDD, CPU, keyboard and battery pack. (See
sections 2.2.8, 2.2.6, 2.2.5, 2.2.4, 2.2.3, 2.2.2 and 2.2.1 Reassembly)
67
2.2.12 Touch Pad

Disassembly
1. Remove the system board. (See section 2.2.11 Disassembly)
2. Remove the two screws and disconnect the cable, then free the touch pad. (Figure 2-28)
Figure 2-28 Free the touch pad
Reassembly
1. Replace the touch pad and reconnect the cable.
2. Replace the touch pad shielding and secure with two screws.
3. Reassemble the notebook. (See the previous sections Reassembly)
68
3. Definition & Location of Connectors / Switches

3.1 Mother Board (Side A) - 1
J9 J7
PJ1 : AC Power Jack
J5
PJ2 : Battery Connector
J2
J1 : S-Video Port
J13
J509
J6
J2 : External VGA Connector
J3, J4, J9 : USB Port Connector

J1
J5 : MDC Jump Wire Connector
J12
J6 : LCD Connector + Inverter
J7 : RJ11 & RJ45 Connector
J8 : Internal Left Speak Connector

J3 J10 : CPU Fan Connector
J4 J12 : NB Fan Connector
J13 : Mini-PCI Socket

J10 PJ1
J8
------ To next page ------
PJ2
69

3.1 Mother Board (Side A) - 2
J14 J11
------ Continued to previous page ------
J11 : MIC In Jack
J14 : Line Out Jack

J509
J15 J15 : MDC Board Connector
J16 : Primary EIDE Connector
J18 : Extend DDR SDRAM Socket
J21 J19 : RTC Battery Connector
J20 : Touch-Pad Connector
J21 : Secondary IDE Connector
J18
J19 J20
J16
70

3.1 Mother Board (Side B)
J501 : Internal Keyboard Connector
SW501
J502 : PCMCIA Card Socket
J502
J509
SW501 : Power Button
J501 SW502 : Touch-Pad Up Button
SW503 : Touch-Pad Right Button
SW504 : Touch-Pad Left Button
SW505 : Touch-Pad Down Button

SW503
SW502
SW505
SW504
71
4. Definition & Location of Major Components

4.1 Mother Board (Side A)
U5 : ICS1883AF LAN Controller

U10
U22 U5 U6 : Intel P4 Process Socket
U17 U11
U9 : TV/ LVDS Encoder (SiS301LV)
J509
U9 U10 : GMT G1422 Amplifer
U20 U13 U11 : VIA VI1616 Audio Codec
U12 : SiS M661FX NB
U13 : ICS952007 Clock Generator

U12
U17 : KBC (W83L950D)
U6
U19 : DDR Buffer Clock
U23
U20 : SiS963L SB
U22 : Ti PCI1410A CardBus
U23 : LPC BIOS ROM

U19
72
5. Pin Descriptions of Major Components

5.1 Intel Pentium 4 Processor mFC-PGA 478 Pins - 1
Name Type Description Name Type Description
AP[1:0]# Input/ AP[1:0]# (Address Parity) are driven by the request initiator along A[35:3]# Input/ A[35:3]# (Address) define a 2 36 -byte physical memory address
Output with ADS#,A[35:3]#, and the transaction type on the REQ[4:0]#. A Output space. In sub-phase 1 of the address phase, these pins transmit the
correct parity signal is high if an even number of covered signals address of a transaction. In sub-phase 2, these pins transmit
are low and low if an odd number of covered signals are low. This transaction type information. These signals
allows parity to be high when all the covered signals are high. must connect the appropriate pins of all agents on the Pentium 4
AP[1:0]# should connect the appropriate pins of all Pentium 4 processor in the 478-pin package system bus. A[35:3]# are
processor in the 478-pin package system bus agents. The following protected by parity signals AP[1:0]#. A[35:3]# are source
table defines synchronous signals and are latched into the receiving buffers by
ADSTB[1:0]#. On the active-to-inactive transition of RESET#, the
Request Signals subphase 1 subphase 2 processor samples a subset of the A[35:3]# pins to determine
power-on configuration. See Section 7.1 for more details.
A[35:24]# AP0# AP1# A20M# Input If A20M# (Address-20 Mask) is asserted, the processor masks
A[23:3]# AP1# AP0# physical address bit 20 (A20#) before looking up a line in any
REQ[4:0]# AP1# AP0# internal cache and before driving a read/write transaction on the
bus. Asserting A20M# emulates the 8086 processor's address
BCLK[1:0] Input The differential pair BCLK (Bus Clock) determines the system bus wrap-around at the 1-Mbyte boundary. Assertion of A20M# is only
frequency. All processor system bus agents must receive these supported in real mode.
signals to drive their outputs and latch their inputs. A20M# is an asynchronous signal. However, to ensure recognition
All external timing parameters are specified with respect to the of this signal following an Input/Output write instruction, it must be
rising edge of BCLK0 crossing V CROSS . valid along with the TRDY# assertion of the corresponding
BINIT# Input/ BINIT# (Bus Initialization) may be observed and driven by all Input/Output Write bus transaction.
Output processor system bus agents and if used, must connect the ADS# Input/ ADS# (Address Strobe) is asserted to indicate the validity of the
appropriate pins of all such agents. If the BINIT# driver is enabled Output transaction address on the A[35:3]# and REQ[4:0]# pins. All bus
during power-on configuration, BINIT# is asserted agents observe the ADS# activation to begin parity checking,
to signal any bus condition that prevents reliable future operation. protocol checking, address decode, internal snoop, or deferred reply
If BINIT# observation is enabled during power-on configuration, ID match operations associated with the new transaction.
and BINIT# is sampled asserted, symmetric agents reset their bus ADSTB[1:0]# Input/ Address strobes are used to latch A[35:3]# and REQ[4:0]# on their
LOCK# activity and bus request arbitration state machines. The bus Output rising and falling edges. Strobes are associated with signals as
agents do not reset their IOQ and transaction tracking state shown below.
machines upon observation of BINIT# activation. Once the BINIT#
assertion has been observed, the bus agents will re-arbitrate for the
Signals Associated Strobe
system bus and attempt completion of their bus queue and IOQ
entries. REQ[4:0]#, A[16:3]# ADSTB0#
If BINIT# observation is disabled during power-on configuration, a A[35:17]# ADSTB1#
central agent may handle an assertion of BINIT# as appropriate to
the error handling architecture of the system.
BNR# (Block Next Request) is used to assert a bus stall by any bus
Input/
BNR# agent who is unable to accept new bus transactions. During a bus
Output
stall, the current bus owner cannot issue any new transactions.
73

HIT# Input/ HIT# (Snoop Hit) and HITM# (Hit Modified) convey DBSY# Input/ DBSY# (Data Bus Busy) is asserted by the agent responsible for
Output transaction snoop operation results. Any system bus agent may Output driving data on the processor system bus to indicate that the data
assert both HIT# and HITM# together to indicate that it requires bus is in use. The data bus isreleased after DBSY# is deasserted.
Input/ a snoop stall, which can be continued by reasserting This signal must connect the appropriate pins on all processor
HITM# Output HIT# and HITM# together. system bus agents.
IERR# Output IERR# (Internal Error) is asserted by a processor as the result of DEFER# Input DEFER# is asserted by an agent to indicate that a transaction
an internal error. Assertion of IERR# is usually accompanied by cannot be guaranteed in-order completion. Assertion of
a SHUTDOWN transaction on the processor system bus. This DEFER# is normally the responsibility of the addressed
transaction may optionally be converted to an external error memory or Input/Output agent. This signal must connect the
signal (e.g., NMI) by system core logic. The processor will keep appropriate pins of all processor system bus agents.
IERR# asserted until the assertion of RESET#, BINIT#, or DP[3:0]# Input/ DP[3:0]# (Data parity) provide parity protection for the
INIT#. Output D[63:0]# signals. They are driven by the agent responsible for
This signals does not have on-die termination. Refer to driving D[63:0]#, and must connect the appropriate pins of all
Section 2.5 fortermination requirements. Pentium 4 processor in the 478-pin package system bus gents.
IGNNE# Input IGNNE# (Ignore Numeric Error) is asserted to force the DSTBN[3:0]# Input/ Data strobe used to latch in D[63:0]#.
processor to ignore a numeric error and continue to execute Output
noncontrol floating-point instructions. If IGNNE# is deasserted, Signals Associated Strobe
the processor generates an exception on a noncontrol
floating-point instruction if a previous floating-point instruction D[15:0]#, DBI0# DSTBN0#
caused an error.IGNNE# has no effect when the NE bit in D[31:16]#, DBI1# DSTBN1#
control register 0 (CR0) is set. IGNNE# is an asynchronous D[47:32]#, DBI2# DSTBN2#
signal. However, to ensure recognition of this signal following D[63:48]#, DBI3# DSTBN3#
an Input/Output write instruction, it must be valid along with the
DSTBP[3:0]# Input/ Data strobe used to latch in D[63:0]#.
TRDY# assertion of the corresponding Input/Output Write bus
Output
transaction.
INIT# Input INIT# (Initialization), when asserted, resets integer registers Signals Associated Strobe
inside the processor without affecting its internal caches or D[15:0]#, DBI0# DSTBP0#
floating-point registers. The processor then begins execution at D[31:16]#, DBI1# DSTBP1#
the power-on Reset vector configured during power-on
D[47:32]#, DBI2# DSTBP2#
configuration. The processor continues to handle snoop requests
during INIT# assertion. INIT# is an asynchronous signal and D[63:48]#, DBI3# DSTBP3#
must connect the appropriate pins of all processor system bus FERR# Output FERR# (Floating-point Error) is asserted when the processor
agents. If INIT# is sampled active on the active to inactive detects an unmasked floating-point error. FERR# is similar to
transition of RESET#, then the processor executes its Built-in the ERROR# signal on the Intel 387 coprocessor, and is
Self-Test (BIST). included for compatibility with systems using MSDOS*-type
ITPCLKOUT[1:0] Output The ITPCLKOUT[1:0] pins do not provide any output for the floating-point error reporting.
Pentium® 4 processor in the 478-pin package. Refer to Section GTLREF Input GTLREF determines the signal reference level for AGTL+ input
2.5 for additional details and termination requirements. pins. GTLREF should be set at 2/3 VCC. GTLREF is used by the
ITP_CLK[1:0] Input ITP_CLK[1:0] are copies of BCLK that are used only in AGTL+ receivers to determine if a signal is a logical 0 or
processor systems where no debug port is implemented on the logical 1. Refer to the Intel® Pentium® 4 Processor in the
system board. ITP_CLK[1:0] are used as BCLK[1:0] references 478-pin Package and Intel® 850 Chipset Platform Design
for a debug port implemented on an interposer. If a debug port Guide for more information.
is implemented in the system, ITP_CLK[1:0] are no connects in
the system. These are not processor signals.
74

PWRGOOD Input PWRGOOD (Power Good) is a processor input. The processor LINT[1:0] Input LINT[1:0] (Local APIC Interrupt) must connect the appropriate
requires this signal to be a clean indication that the clocks and pins of all APIC Bus agents. When the APIC is disabled, the
power supplies are stable and within their specifications. LINT0 signal becomes INTR, a maskable interrupt request
‘Clean’ implies that the signal will remain low (capable of signal, and LINT1 becomes NMI, a nonmaskable interrupt.
sinking leakage current), without glitches, from the time that the INTR and NMI are backward compatible with the signals of
power supplies are turned on until they come within those names on the Pentium processor. Both signals are
specification. The signal must then transition monotonically to a asynchronous.
high state. Figure 11 illustrates the relationship of PWRGOOD Both of these signals must be software configured via BIOS
to the RESET# signal. PWRGOOD can be driven inactive at programming of the APIC register space to be used either as
any time, but clocks and power must again be stable before a NMI/INTR or LINT[1:0]. Because the APIC is enabled by
subsequent rising edge of PWRGOOD. It must also meet the default after Reset, operation of these pins as LINT[1:0] is the
minimum pulse width specification in Table 16, and be followed default configuration.
by a 1 to 10 ms RESET# pulse. The PWRGOOD signal must be LOCK# Input/ LOCK# indicates to the system that a transaction must occur
supplied to the processor; it is used to protect internal circuits Output atomically. This signal must connect the appropriate pins of all
against voltage sequencing issues. It should be driven high processor system bus agents. For a locked sequence of
throughout boundary scan operation. transactions, LOCK# is asserted from the beginning of the
RESET# Input Asserting the RESET# signal resets the processor to a known first transaction to the end of the last transaction.
state and invalidates its internal caches without writing back any When the priority agent asserts BPRI# to arbitrate for ownership
of their contents. For a power-on Reset, RESET# must stay of the processor system bus, it will wait until it observes
active for at least one millisecond after VCC and BCLK have LOCK# deasserted. This enables symmetric agents to retain
reached their proper specifications. On observing active ownership of the processor system bus throughout the bus
RESET#, all system bus agents will deassert their outputs within locked operation and ensure the atomicity of lock.
two clocks. RESET# must not be kept asserted for more than 10 MCERR# Input/ MCERR# (Machine Check Error) is asserted to indicate an
ms while PWRGOOD is asserted. Output unrecoverable error without a bus protocol violation. It may be
A number of bus signals are sampled at the active-to-inactive driven by all processor system bus agents.
transition of RESET# for power-on configuration. These MCERR# assertion conditions are configurable at a system
configuration options are described in the Section 7.1. level. Assertion options are defined by the following options:
This signal does not have on-die termination and must be Enabled or disabled.
terminated on the system board. Asserted, if configured, for internal errors along with IERR#.
RS[2:0]# Input RS[2:0]# (Response Status) are driven by the response agent Asserted, if configured, by the request initiator of a bus
(the agent responsible for completion of the current transaction), transaction after it observes an error.
and must connect the appropriate pins of all processor system Asserted by any bus agent when it observes an error in a bus
bus agents. transaction.
RSP# Input RSP# (Response Parity) is driven by the response agent (the For more details regarding machine check architecture, please
agent responsible for completion of the current transaction) refer to the IA-32 Software Developer’s Manual, Volume 3:
during assertion of RS[2:0]#, the signals for which RSP# System Programming Guide.
provides parity protection. It must connect to the appropriate PROCHOT# Output PROCHOT# will go active when the processor temperature
pins of all processor system bus agents. monitoring sensor detects that the processor has reached its
A correct parity signal is high if an even number of covered maximum safe operating temperature.
signals are low and low if an odd number of covered signals are This indicates that the processor Thermal Control Circuit has
low. While RS[2:0]# = 000, RSP# is also high, since this been activated, if enabled. See Section 7.3 for more details.
indicates it is not being driven by any agent guaranteeing
correct parity.
75

REQ[4:0]# Input/ REQ[4:0]# (Request Command) must connect the appropriate TDI Input TDI (Test Data In) transfers serial test data into the processor.
Output pins of all processor system bus agents. They are asserted by the TDI provides the serial input needed for JTAG specification
current bus owner to define the currently active transaction type. support.
These signals are source synchronous to ADSTB0#. Refer to the TDO Output TDO (Test Data Out) transfers serial test data out of the
AP[1:0]# signal description for a details on parity checking of processor. TDO provides the serial output needed for JTAG
these signals. specification support.
SKTOCC# Output SKTOCC# (Socket Occupied) will be pulled to ground by the TESTHI[12:8] Input TESTHI[12:8] and TESTHI[5:0] must be connected to a VCC
processor. System board designers may use this pin to determine TESTHI[5:0] power source through a resistor for proper processor operation.
if the processor is present. See Section 2.5 for more details.
SLP# Input SLP# (Sleep), when asserted in Stop-Grant state, causes the THERMDA Other Thermal Diode Anode. See Section 7.3.1.
processor to enter the Sleep state. During Sleep state, the THERMDC Other Thermal Diode Cathode. See Section 7.3.1.
processor stops providing internal clock signals to all units,
leaving only the Phase-Locked Loop (PLL) still operating. THERMTRIP# Output Assertion of THERMTRIP# (Thermal Trip) indicates the
Processors in this state will not recognize snoops or interrupts. processor junction temperature has reached a level beyond
The processor will recognize only assertion of the RESET# which permanent silicon damage may occur. Measurement of
signal, deassertion of SLP#, and removal of the BCLK input the temperature is accomplished through an internal thermal
while in Sleep state. If SLP# is deasserted, the processor exits sensor which is configured to trip at approximately 135°C.Upon
Sleep state and returns to Stop-Grant state, restarting its internal assertion of THERMTRIP#, the processor will shut off its
clock signals to the bus and processor core units. If the BCLK internal clocks (thus halting program execution) in an attempt to
input is stopped while in the Sleep state the processor will exit reduce the processor junction temperature. To protect the
the Sleep state and transition to the Deep Sleep state. processor, its core voltage (VCC) must be removed following
SMI# Input SMI# (System Management Interrupt) is asserted the assertion of THERMTRIP#. See Figure 12 and Table 16 for
asynchronously by system logic. On accepting a System the appropriate power down sequence and timing requirements.
Management Interrupt, the processor saves the current state and Once activated, THERMTRIP# remains latched until RESET#
enter System Management Mode (SMM). An SMI is asserted. While the assertion of the RESET# signal will
Acknowledge transaction is issued, and the processor begins de-assert THERMTRIP# , if the processor’s junction
program execution from the SMM handler. temperature remains at or above the trip level, THERMTRIP#
If SMI# is asserted during the deassertion of RESET# the will again be asserted after RESET# is de-asserted.
processor will tristate its outputs. TMS Input TMS (Test Mode Select) is a JTAG specification support signal
STPCLK# Input STPCLK# (Stop Clock), when asserted, causes the processor to used by debug tools.
enter a low power Stop-Grant state. The processor issues a TRDY# Input TRDY# (Target Ready) is asserted by the target to indicate that
Stop-Grant Acknowledge transaction, and stops providing it is ready to receive a write or implicit writeback data transfer.
internal clock signals to all processor core units except the TRDY# must connect the appropriate pins of all system bus
system bus and APIC units. The processor continues to snoop agents.
bus transactions and service interrupts while in Stop-Grant state. TRST# Input TRST# (Test Reset) resets the Test Access Port (TAP) logic.
When STPCLK# is deasserted, the processor restarts its internal TRST# must be driven low during power on Reset. This can be
clock to all units and resumes execution. The assertion of done with a 680 . pull-down resistor.
STPCLK# has no effect on the bus clock; STPCLK# is an VCCA Input VCCA provides isolated power for the internal processor core
asynchronous input. PLLs. Refer to the Intel® Pentium® 4 Processor in the 478-pin
TCK Input TCK (Test Clock) provides the clock input for the processor Package and Intel® 850 Chipset Platform Design Guide for
Test Bus (also knownas the Test Access Port). complete implementation details.
76

Name Type Description
VCCIOPLL Input VCCIOPLL provides isolated power for internal processor system
bus PLLs. Follow he guidelines for VCCA, and refer to the Intel®
Pentium® 4 Processor in the 478-pin Package and Intel® 850
Chipset Platform Design Guide for complete implementation
details.
VCCSENSE Output VCCSENSE is an isolated low impedance connection to processor
core power(VCC). It can be used to sense or measure power near
the silicon with little noise.
VCCVID Input There is no imput voltage requirement for VCCVID for designs
intended tosupport only the Pentium 4 processor in the 478-pin
package. Refer to the Intel® Pentium® 4 Processor in the
478-pin Package and Intel® 850 Chipset Platform Design
Guide for more information.
VID[4:0] Output VID[4:0] (Voltage ID) pins can be used to support automatic
selection of power supply voltages (Vcc). These pins are not
signals, but are either an open circuit or a short circuit to VSS
on the processor. The combination of opens and shorts
defines the voltage required by the processor. The VID pins are
needed to cleanly support processor voltage specification
variations. See Table 2 for definitions of these pins. The power
supply must supply the voltage that is requested by these pins,
or disable itself.
VSSA Input VSSA is the isolated ground for internal PLLs.
VSSSENSE Output VSSSENSE is an isolated low impedance connection to processor
core VSS. It can be used to sense or measure ground near the
silicon with little noise
TMS Input TMS (Test Mode Select) is a JTAG specification support signal
used by debug tools.
TRDY# Input TRDY# (Target Ready) is asserted by the target to indicate that
it is ready to receive a write or implicit writeback data transfer.
TRDY# must connect the appropriate pins of all system bus
agents.
TRST# Input TRST# (Test Reset) resets the Test Access Port (TAP) logic.
TRST# must be driven low during power on Reset. This can be
done with a 680 . pull-down resistor.
VCCA Input VCCA provides isolated power for the internal processor core
PLLs. Refer to the Intel® Pentium® 4 Processor in the 478-pin
Package and Intel® 850 Chipset Platform Design Guide for
complete implementation details.
77
5.2 SiS M661FX (IGUI Host Memory Controller) - 1

Host Bus Interface Host Bus Interface (Continued)
Ball Name Ball Attr Description Ball Name Ball Attr Description
CPUCLK I Host differential clock input. HITM# I/O Hits a Modified Cache Line:
CPUCLK# 0.71V – M 0.9~1.8V – M Hit Modified indicates the snoop cycle hits a
CPURST# O Host Bus Reset: modified line in the L1/L2 cache of CPU.
0.9~1.8V – M CPURST# is used to keep all the bus agents in the DEFER# O Defer Transaction Completion:
same initial state before valid cycles issued. 0.9~1.8V – M SiSM661FX will use this signal to indicate a retry
CPUPWRGD O CPUPWRGD is used to inform CPU that main or defer response to host bus.
0.9~1.8V – M power is stable RS[2:0]# O Response Status:
ADS# I/O Address Strobe : 0.9~1.8V – M RS[2:0]# are driven by the response agent to
0.9~1.8V – M Address Strobe is driven by CPU or SiSM661FX indicate the transaction response type. The
to indicate the start of a CPU bus cycle. following shows the response type.
HASTB[1:0]# I/O Source synchronous address strobe used to latch RS[2:0]# Response
0.9~1.8V – M HREQ[4:0]# & HA[31:3]# at both falling and 000 Idle State
rising edge. 001 Retry
HREQ[4:0]# & HA[16:3]# are latched by 010 Defer
HASTB0# HA[31:17]# are latched by HASTB1# 011 Reserved
HREQ[4:0]# I/O Request Command: 100 Reserved
0.9~1.8V – M HREQ[4:0]# are used to define each transaction 101 No data
type during the clock when ADS# is asserted and 110 Implicit Write-back
the clock after ADS# is asserted. 111 Normal
HA[31:3]# I/O Host Address Bus HTRDY# O Target Ready:
0.9~1.8V – M 0.9~1.8V – M During write cycles, response agent will drive
BREQ0# O Symmetric Agent Bus Request: TRDY# to indicate it is ready to accept data.
0.9~1.8V – M BREQ0# is driven by the symmetric agent to DRDY# I/O Data Ready:
request for the bus. 0.9~1.8V – M DRDY# is driven by the bus owner whenever the
BPRI# O Priority Agent Bus Request: data is valid on the bus.
0.9~1.8V – M BPRI# is driven by the priority agent that wants to DBSY# I/O Data Bus Busy:
request the bus. 0.9~1.8V – M Whenever the data is not valid on the bus with
BPRI# has higher priority than BREQ0# to access DRDY# is deserted, DBSY# deasserted to hold the
a bus. bus.
BNR# I/O Block Next Request: HD[63:0]# I/O Host Data Bus
0.9~1.8V – M This signal can be driven asserted by any bus agent 0.9~1.8V – M
to block further requests being pipelined. DBI[3:0]# I/O Dynamic Bus Inversion: An active DBI# will
HLOCK# I Host Lock : 0.9~1.8V – M invert it’s corresponding data group signals.
0.9~1.8V – M CPU asserts HLOCK# to indicate the current bus DBI0# is referenced by HD[15:0]#
cycle is locked. DBI1# is referenced by HD[31:16]#
HIT# I/O Keeping a Non-Modified Cache Line DBI2# is referenced by HD[47:32]#
0.9~1.8V – M DBI3# is referenced by HD[63:48]#
78

Host Bus Interface (Continued) DRAM Controller
HDSTBP[3:0]# I/O Source synchronous data strobe used to latch data DRAMTEST I Test Clock Input
0.9~1.8V – M at falling edge 2.5V - M
HD[15:0]#, DBI0# are latched by HDSTBP0# FWDSDCLKO O SDRAM Forward Clock Output
HD[31:16]#, DBI1# are latched by HDSTBP1# 2.5V – M
HD[47:32]#, DBI2# are latched by HDSTBP2# MA[14:0] O System Memory Address Bus
HD[63:48]#, DBI3# are latched by HDSTBP3# 2.5V - M
HDSTBN[3:0]# I/O Source synchronous data strobe used to latch data SRAS# O SDRAM Row Address Strobe
0.9~1.8V– M at falling edge 2.5V - M
HD[15:0]#, DBI0# are latched by HDSTBN0# SCAS# O SDRAM Column Address Strobe
HD[31:16]#, DBI1# are latched by HDSTBN1# 2.5V - M
HD[47:32]#, DBI2# are latched by HDSTBN2# SWE# O SDRAM Write Enable
HD[63:48]#, DBI3# are latched by HDSTBN3# 2.5V - M
HCOMP_N I GTL N-MOS Compensation Input CS[5:0]# O SDRAM Chip Select
M 2.5V - M CS[5:0]# multiplexed with DQS[5:0]
HCOMP_P I GTL P- MOS Compensation Input DQM#[7:0] O SDRAM Input/Output Data Mask
M 2.5V - M
HVREF[4:0] I AGTL+ I/O reference voltage DQS[7:0] I/O 2.5V - M DDR Data Strobe
HCOMPVREF_N M 2.5V - M
MD[63:0] I/O System Memory Data Bus
2.5V - M
CKE[5:0] O SDRAM Clock Enable
2.5V – AUX
MuTIOL® 1G Interface S3AUXSW# O (open-drain) Aux power switch for ACPI-S3 state, low active.
Pin Name Pin Attr Description 2.5V - AUX
ZCLK I SiS MuTIOL ? 1? G clock DDRVREF[A:B] I DDR I/O Reference Voltage
3.3V - M M
ZUREQ/ZDREQ I/O SiS MuTIOL ? 1? G Control pins DDRCOMP_P I P-MOS Compensation Input
1.8V - M M
ZSTB[1:0] I/O SiS MuTIOL ? 1? G Strobe DDRCOMP_N I N-MOS Compensation Input
1.8V - M M
ZSTB[1:0]# I/O Strobe Compliment
1.8V - M
ZAD[16:0] I/O Address/Data/DBI Pins
1.8V - M
ZVREF I SiS MuTIOL ? 1? G Reference Voltage
M
ZCMP_N I N-MOS Compensation Input
M
ZCMP_P I P-MOS Compensation Input
M
79

AGP Interface AGP Interface (Continued)
AGPCLK I AGP Clock AD_STB[1:0] I/O AD Bus Strobe
3.3V – M 1.5V - M
AFRAME# I/O AGP Frame# AD_STB[1:0]# I/O AD Bus Strobe Compliment
1.5V - M 1.5V - M
AIRDY# I/O AGP Initiator Ready SB_STB I Side Band Strobe
1.5V - M 1.5V - M
ATRDY# I/O AGP Target Ready SB_STB# I Side Band Strobe Compliment
1.5V - M 1.5V - M
ASTOP# I/O AGP Stop# GC_DET# I AGP v3.0 strap
1.5V - M 1.5V - M
ADEVSEL# I/O AGP Device Select AGPCOMP_P I P-MOS Compensation Input
1.5V - M M
ASERR# I AGP System Error AGPCOMP_N I N-MOS Compensation Input
1.5V - M M
AREQ# I AGP Bus Request AGPVREF I AGP Reference Voltage
1.5V - M M
AGNT# O AGP Bus Grant
1.5V - M
ADBI_LO I/O DBI of AAD[15:0]
1.5V - M
AAD[31:0] I/O AGP Address/Data Bus
1.5V - M
AC/BE[3:0]# I/O AGP Command/Byte Enable
1.5V - M Stereo Glasses interface
APAR I/O AGP Parity Ball Name Ball Attr Description
1.5V - M CSYNC O Reserved
ST[2:0] O AGP Status Bus 3.3V - M
1.5V - M RSYNC O Reserved
PIPE# I AGP Pipeline Request in v2.0 3.3V - M
1.5V - M DBI of AAD[31:16] in v3.0 LSYNC O Reserved
SBA[7:0] I/O Side Band Address 3.3V - M
1.5V - M
RBF# I Read Buffer Full
1.5V - M
WBF# I Write Buffer Full
1.5V - M
80

Digital Video Link Interface Test Mode / Hardware Trap / Power Management
VBCLK I Channel B/A Clock Input DLLEN# I/O Hardware Trap pin (refer to section 5)
1.8V - M VBCLK multiplexed with SBA0 3.3V/5V– M
VBHCLK O VB Programming Interface Clock TRAP2 I Hardware Trap pin (refer to section 5)
1.8V - M VBHCLK multiplexed with RBF# 3.3V/5V– AUX
VBCAD I/O VB Programming Interface Data TRAP[1:0] I Hardware Trap pins (refer to section 5)
1.8V - M VBCAD multiplexed with AREQ# 3.3V/5V– M
VBCTL[1:0] O VB Data Control ENTEST I Test Mode enable pin
1.8V -M VBCTL[1:0] multiplexed with AAD[29:28] 3.3V/5V– M
VGPIO[3:2] I/O VB GPIO pins TESTMODE[2:0] I Test Mode select pin
1.8V - M VGPIO[3:2] multiplexed with IPE#/WBF# 3.3V/5V– M Nand Tree Test: 100
VBHSYNC I/O Channel B H-Sync AUXOK I Auxiliary Power OK :
1.8V - M VBHSYNC multiplexed with AAD30 3.3V – AUXI This signal is supplied from the power source of
VBVSYNC I/O Channel B V-Sync resume well. It is also used to reset the logic in
1.8V - M VBVSYNC multiplexed with AAD31 resume power well. If there is no auxiliary power
VBDE I/O Channel B Data Valid source on the system, this pin should be tied
1.8V - M VBDE multiplexed with AAD27 together
VBGCLK I/O Channel B Clock Output. with PWROK.
1.8V - M This clock is used to trigger dual edge data PCIRST# I PCI Bus Reset :
transfer. Perfect duty cycle is required. 3.3V – AUXI PCIRST# is supplied from SiS963 MuTIOL ? 1? G
VBGCLK multiplexed with AD_STB1 Media IO.
VBGCLK# I/O Channel B Differential Clock Output. (To support PWROK I Main Power OK :
1.8V - M Chrontel). 3.3V – AUXI A high-level input to this signal indicates the
VBGCLK# multiplexed with AD_STB1# power being supplied to the system is in stable
VBD[11:0] I/O Channel B Data operating state. During the period of PWROK
1.8V - M VBD[11:0] multiplexed with AAD being low, CPURST and PCIRST# will all be
VAHSYNC I/O Channel A H-Sync asserted until after PWROK goes high for 24 ms.
1.8V - M VAHSYNC multiplexed with AAD18
VAVSYNC I/O Channel A V-Sync
1.8V - M VAVSYNC multiplexed with AAD17
VADE I/O Channel A Data Valid
1.8V - M VADE multiplexed with AAD16
VAGCLK I/O Channel A Clock Output.
1.8V - M This clock is used to trigger dual edge data 1.8V –
M transfer. Perfect duty cycle is required.
VAGCLK multiplexed with AD_STB0
VAGCLK# I/O Channel A Differential Clock Output. (To support
1.8V - M Chrontel).
VAGCLK# multiplexed with AD_STB0#
VAD[11:0] I/O Channel A Data
1.8V - M VAD[11:0] multiplexed with AAD
81

VGA interface
Ball Name Ball Attr Description
VOSCI I 14.318MHzReference Clock Input
3.3V - M
HSYNC O Horizontal Sync
3.3V – M
VSYNC O Vertical Sync
3.3V - M
INTA# O Internal VGA Interrupt Pin
3.3V – M
VGPIO[1:0] I/O Internal VGA GPIO pins
3.3V/5V- M
VCOMP AI Compensation Pin
Analog - M
VRSET AI Reference Resistor
Analog - M
VVBWN AI Voltage Reference
Analog - M
ROUT AO Red Signal Output
Analog - M
GOUT AO Green Signal Output
Analog - M
BOUT AO Blue Signal Output
Analog - M
82
5.3 SiS963L(MuTIOL®Media I/O South Bridge) - 1

Host Bus Interface MuTIOL 1G Connect Interface
Name Pin Attr Description Name Pin Attr Description
FERR# I Floating Point Error: CPU will assert this signal upon ZCLK I MuTIOL 1G I/O Connect Clock
0.8V/2.65V -M a floating point error occurring. 3.3V - M
IGNNE# OD Ignore Numeric Error: IGNNE# is asserted to inform ZUREQ I/O MuTIOL 1G I/O Conect Controll pins
0.8V/2.65V -M CPU to ignore a numeric error. 1.8V - M
NMI OD Non-Maskable Interrupt: A rising edge on NMI will ZDREQ I/O MuTIOL 1G I/O Conect Controll pins
0.8V/2.65V -M trigger a non-maskable interrupt to CPU. 1.8V - M
INTR OD Interrupt Request: High-level voltage of this signal ZSTB[1:0] I/O MuTIOL 1G I/O Connect Strobe
0.8V/2.65V -M conveys to CPU that there is outstanding interrupt(s) 1.8V - M
needed to be serviced. ZSTB[1:0]# I/O MuTIOL 1G Strobe Compliment
APICD1 / I/OD APIC Data: APICD[1:0] 1.8V - M
GPIOFF# I These two signals are used to send and receive APIC ZAD[16:0] I/O MuTIOL 1G Address/Data pins
APICD0 / I/OD data. 1.8V - M
THERM2# I GPIO OFF: Turn off the system when input a low level ZVREF I -M MuTIOL 1G I/O reference voltage
0.8V/2.65V -M signal.
ZCMP_N I -M MuTIOL 1G N-MOS Compensation Input
Thermal 2: Assert a SMI#/SCI# when input a low level
signal. ZCMP_P I -M MuTIOL 1G P-MOS Compensation input
CPUSLP# OD CPU Sleep: The CPUSLP# can be used to force CPU
0.8V/2.65V -M enter the Sleep state.
STPCLK# OD Stop Clock: STPCLK# will be asserted to inhibit or
0.8V/2.65V -M throttle CPU activities upon a pre-defined
power management event occurs.
LPC Interface
SMI# OD System Management Interrupt: SMI# will be asserted
Name Pin Attr Description
0.8V/2.65V -M when a pre-defined power management event occurs.
INIT# OD Initialization: INIT is used to re-start the CPU without LAD[3:0] I/O LPC Address/Data Bus:
0.8V/2.65V -M flushing its internal caches and registers. In Pentium III 3.3V/5V-M LPC controller drives these four pins to transmit LPC
platform it is active high. This signal requires an external command, address, and data to LPC device.
pull-up resistor tied to VTT. LDRQ# I LPC DMA Request 0:
APICCK/ I APIC Clock: This signal is used to determine when 3.3V/5V-M This pin is used by LPC device to request DMA cycle.
LDTREQ# / 2.5V/3.3V -M valid data is being sent over the APCI bus. LDRQ1# I LPC DMA Request 1:
AGPBUSY# LDTREQ# / AGPBUSY# (LDTREQ# for K8 use (GPIO1) 3.3V/5V-M This pin is used by LPC device to request DMA cycle.
only) LFRAME# O LPC Frame:
When a low active signal inputs, it will wake up system 3.3V -M This pin is used to notify LPC device that a start or a
from C3/S1. abort LPC cycle will occur.
A20M# OD Address 20 Mask: When A20M# is asserted, the CPU SIRQ I/O Serial IRQ:
0.8V/2.65V- M A20 signal will be forced to “0” 3.3V/5V -M This signal is used as the serial IRQ line signal.
83

PCI Interface PCI Interface (Continued)
PCICLK I PCI Clock: The PCICLK input provides the FRAME# I/O Frame#:FRAME# is an output when the SiS963L is a
3.3V/5V -M fundamental timing and the internal operating 3.3V/5V -M PCI bus master. The SiS963L drives FRAME# to
frequency for the SiS963L. It runs at the same frequency indicate the beginning and duration of an access. When
and skew of the PCI the SiS963L is a PCI slave device, FRAME# is an input
local bus. signal.
C/BE[3:0]# I/O PCI Bus Command and Byte Enables: PCI Bus TRDY# I/O Target Ready: TRDY# is an output when the SiS963L
3.3V/5V -M Command and Byte Enables define the PCI command 3.3V/5V -M is a PCI slave. The assertion of TRDY#
during the address phase of a PCI cycle, and the PCI indicates the target agent's ability to complete the current
byte enables during the data phases. data phase of the transaction. For a read cycle, TRDY#
C/BE[3:0]# are outputs when the SiS963L is a PCI bus indicates that the target has driven valid data onto the
master and inputs when it is a PCI slave. PCI bus. For a write cycle, TRDY# indicates that the
PLOCK# I/O PCI Lock: When PLOCK# is sampled asserted at the target is prepared to accept data from the PCI bus. When
3.3V/5V -M beginning of a PCI cycle, SiS963L considers itself being the SiS963L is a PCI master, it is an input pin.
locked and remains in the locked state until PLOCK# is STOP# I/O Stop#:STOP# indicates that the bus master must start
sampled and negated at the following PCI cycle. 3.3V/5V -M terminating its current PCI bus cycle at the next clock
AD[31:0] I/O PCI Address /Data Bus: In address phase: edge and release control of the PCI bus. STOP# is used
3.3V/5V -M 1.When the SiS963L is a PCI bus master, AD[31:0] are for disconnection, retry, and target-abortion sequences
output signals. on the PCI bus.
2.When the SiS963L is a PCI target, AD[31:0] are input DEVSEL# I/O Device Select: As a PCI target, SiS963L asserts
signals. In data phase: 3.3V/5V -M DEVSEL# by doing positive or subtractive
1.When the SiS963L is a target of a memory read/write decoding. SiS963L positively asserts DEVSEL# when
cycle, AD[31:0] are floating. the DRAM address is being accessed by a PCI master,
2.When the SiS963L is a target of a configuration or an PCI configuration registers or embedded controllers’
I/O cycle, AD[31:0] are output signals in a read cycle, registers are being addressed, or the BIOS memory
and input signals in a write cycle. space is being accessed. The low 16K I/O space and low
PAR I/O Parity: SiS963L drives out Even Parity covering 16M memory space are responded subtractively. The
3.3V/5V -M AD[31:0] and C/BE[3:0]#. It does not check the input DEVESEL# is an input pin when SiS963L is acting as a
parity signal. PCI master. It is asserted by the addressed agent to claim
IRDY# I/O Initiator Ready: IRDY# is an output when the SiS963L the current transaction.
3.3V/5V -M is a PCI bus master. The assertion of PREQ[4:0]# I PCI Bus Request:
IRDY# indicates the current PCI bus master's ability to 3.3V/5V -M PCI Bus Master Request Signals
complete the current data phase of the transaction. For a PGNT[4:0]# O PCI Bus Grant:
read cycle, IRDY# indicates that the PCI bus master is 3.3V –M PCI Bus Master Grant Signals
prepared to accept the read data on the following rising PREQ5# / I PCI Bus Request:
edge of the PCI clock. For a write cycle, IRDY# GPIO5 I/O PCI Bus Master Request Signal
indicates that the bus master has driven valid data on the 3.3V/5V- M
PCI bus. When the SiS963L is a PCI slave, IRDY# is an
input pin.
84

PCI Interface (Continued) IDE Interface
PGNT5# / O PCI Bus Grant: IDA[15:0] I/O Primary Channel Data Bus
GPIO6 I/O PCI Bus Master Grant Signal 3.3V/5V -M
3.3V- M IDB[15:0] I/O Secondary Channel Data Bus
INT[A:D]# I PCI interrupt A,B,C,D: 3.3V/5V -M
3.3V/5V –M The PCI interrupts will be connected to the inputs of the IDECSA[1:0]# O Primary Channel CS[1:0]
internal Interrupt controller through the rerouting logic 3.3V -M
associated with each PCI interrupt. IDECSB[1:0]# O Secondary Channel CS[1:0]
PCIRST# O PCI Bus Reset: 3.3V -M
3.3V –M PCIRST# will be asserted during the period when IIOR[A:B]# O Primary/Secondary Channel IOR# Signals
PWROK is low, and will be kept on asserting until about 3.3V -M
24ms after PWROK goes high. IIOW[A:B]# O Primary/Secondary Channel IOW# Signals
SERR# I System Error: 3.3V -M
3.3V/5V –M When sampled active low, a non-maskable interrupt ICHRDY[A:B] I Primary/Secondary Channel ICHRDY# Signals
(NMI) can be generated to CPU if enabled. 3.3V/5V -M
IDREQ[A:B] I Primary/Secondary Channel DMA Request Signals
3.3V/5V -M
IDACK[A:B]# O Primary/Secondary Channel DMACK# Signals
3.3V -M
IIRQ[A:B] I Primary/Secondary Channel Interrupt Signals
Keyboard Controller Interface 3.3V/5V -M
Name Pin Attr Description IDSAA[2:0] O Primary Channel Address [2:0]
KBDAT I/OD Keyboard Dada: 3.3V -M
(GPIO15) 3.3V/5V -AUX When the internal keyboard controller is enabled, this IDSAB[2:0] O Secondary Channel Address [2:0]
pin is used as the keyboard data signal. 3.3V -M
KBCLK I/OD Keyboard Clock: CBLID[A:B] I Primary/Secondary Ultra-66 Cable ID
(GPIO16) 3.3V/5V -AUX When the internal keyboard controller is enabled, this 3.3V/5V -M
pin is used as the keyboard clock signal.
PMDAT I/OD PS2 Mouse Data:
(GPIO17) 3.3V/5V -AUX When the internal keyboard and PS2 mouse controllers
are enabled, this pin is used as PS2 mouse data signal.
PMCLK I/OD PS2 Mouse Clock:
(GPIO18) 3.3V/5V -AUX When the internal keyboard and PS2 mouse controllers
are enabled, this pin is used as the PS2 mouse clock
signal.
85

Power Management Interface Power Management Interface (Continued)
ACPILED OD ACPILED : GPWAK# I General Purpose Wake-Up Signal:
<=5V -AUX ACPILED can be used to control the blinking of an LED (GPIO7) 3.3V/5V -AUX Used to wake up the system from S1/S3/S4/S5.
at the frequency of 1 Hz RING I Ring Indication:
to indicate the system is at power saving mode. (GPIO8) 3.3V/5V -AUX An active RING pulse and lasting for more than 4ms
EXTSMI# I External SMI#: will cause a wakeup event for system to wake from
(GPIO3) I/O EXTSMI# can be used to generate wakeup event, sleep S1~S5.
3.3V/5V -M event, or SCI/SMI# event to the ACPI compatible power AC_SDIN2, 3 I AUDIO Wake-Up Signal:
management unit. (GPIO9, 10) 3.3V/5V -AUX Used to wake up the system from S1/S3/S4/S5.
PME# I PME# : STP_PCI# / O Stop PCI Clock: (for Mobile only) Used to stop the
3.3V/5V -AUX When the system is in power-down mode, an active low AGPSTOP# OD system PCI clock. Used to support PCI CLKRUN#
event on PME# will cause the PSON# to go low and (GPIO11) 3.3V/5V –AUX protocol. AGP Clock Stop: (for Mobile only, if
hence turn on the power supply. When the system is in GPIO14 is used to be S3AUXSW#)
suspend mode, an active PME# event will cause the AGPSTOP# is used to stop the AGP_CLOCK output
system wakeup and generate an SCI/SMI#. from clock generator during C3/S1 state.
PSON# OD ATX Power ON/OFF control: CPUSTP# OD CPU Clock Stop (for Mobile only):
<=5V -AUX PSON# is used to control the on/off state of the ATX (GPIO12) 1.5V/5V -AUX For Intel Mobile processor, this signal can be used to
power supply. When the ATX power supply is in the stop the clock to the processor.
OFF state, an activated power-on event will force the This signal connected to the DPSLP# signal of Pentium
power supply to ON state. 4 processor that can let the processor enter the Deep
AUXOK I Auxiliary Power OK: Sleep state as well (recommended). For AMD processor,
3.3V -AUX This signal is supplied from the AUX power source. It is this signal can be to reduce processor voltage during
also used to reset the logic in AUX power well. If there C3/S1 state.
is no auxiliary power source on the system, this pin DPRSLPVR O Deeper Sleep (for Mobile only):
should be tied together with PWROK. (GPIO13) 3.3V/5V -AUX Used to lower the voltage of VRM during CPU entered
PWRBTN# I Power Button: the deeper power saving mode. Because this signal will
3.3V/5V -AUX This signal is from the power button switch and will be be at input mode after the Clear RTC operation, an
monitored by the ACPI-compatible power management external pulled down resistor is required for this signal.
unit to switch the system between working and sleeping When this signal is high, the voltage regulator outputs
states. the Deeper Sleep voltage.
THERM# I Thermal Alarm: When this signal is low (default), the voltage regulator
(GPIO2) 3.3V/5V -M When a low active signal inputs, it will assert a output the Normal voltage. DPRSLP# can be used to
SMI#/SCI# event and assert CPU throttling. lower the Intel processor voltage during C3/S1 state.
EXTSMI# I External SMI#: AGPSTOP# / OD AGP Clock Stop (for Mobile only):
(GPIO3) 3.3V/5V -M EXTSMI# can be used to generate wakeup event, sleep S3AUXSW# 3.3V/5V -AUX AGPSTOP# is used to stop the AGP_CLOCK output
event, or SCI/SMI# event to the ACPI compatible (GPIO14) from clock generator during C3/S1 state.
power management unit. S3AUXSW#:(for SiS755 and SiSR658 use only) The
CLKRUN# I/O Clock Run: (for Mobile only) signal will keep low in S3 state.
(GPIO4) 3.3V/5V –M Used by PCI and LPC peripherals to request the system
PCI clock to re-start, or prevent PCI clock stopping. An
external pull-up to the MAIN power is required.
86

Power Management Interface (Continued) RTC Interface
VR_HILO# O Voltage Regulator HI / LO (for Mobile only): BATOK I Battery Power OK:
(GPIO15) 3.3V/5V -AUX This ping is used to select an appropriate VID for 3.3V -RTC When the internal RTC is enabled, this signal is used to
voltage regulator. indicate that the power of RTC well is stable. It is also
A low level indicates the Battery Optimal mode. A high used to reset the logic in RTC well. If the internal
level indicates the Maximum Performance mode. RTC is disabled, this pin should be tied low.
LO_HI# OD LO_HI# (for Mobile only): OSC32KHI I RTC 32.768 KHz Input:
(GPIO16) 1.5V/5V -AUX This pin is connected to the processor. A high level 3.3V-RTC When internal RTC is enabled, this pin provides the
indicates the Battery Optimal mode. A low level 32.768 KHz clock signal from external crystal or
indicates the Maximum Performance mode. oscillator.
VGATEM# OD VGATEM# (for Mobile only): OSC32KHO O RTC 32.768 KHz Output:
(GPIO17) 1.5V/5V -AUX Output pin, it is used to mask the PWRGOOD of 3.3V -RTC When internal RTC is enabled, this pin should be
processor core voltage regulator. connected with the other end of the 32.768 KHz crystal
RTC32KHZ O RTC32KHz output: (Mobile only) or left unconnected if an external oscillator is used.
(GPIO18) 3.3V/5V -AUX Support RTC32KHz clock output in S0~S5. PWROK I Main Power OK:
THERM2# I Thermal Alarm2: (GTL level) 3.3V-RTC A high-level input to this signal indicates the power
(APICD0) 0.8V/2.65V -M When a low active signal inputs, it will assert a being supplied to the system is in stable operating state.
SMI#/SCI# event. During the period of PWROK being low, PCIRST# will
GPIOFF# I GPIO OFF: (GTL level) all be asserted until after PWROK goes high for 12 ms.
(APICD1) 0.8V/2.65V -M When a low level signal inputs, it will turn off the
system. Then, the system can only be woken up again by
PWRBTN#.
Hardware Trap Signals

Name Pin Attr Description
General Purpose I/O IPB_OUT0 O IPB_OUTO:
Name Pin Attr Description 3.3V -AUX Hardware Trap to select MuTIOL 1G clock PLL
GPIO[6:0] I/O GPIO: enable/disable
3.3V/5V -M Can be a General Purpose Input or Output. IPB_OUT1 O IPB_OUT1:
GPIO[15:7] I/O GPIO: 3.3V – AUX Hardware Trap to select MuTIOL 1G operation mode
3.3V/5V - AUX Can be a General Purpose Input or Output.
GPIO[18:16] O GPO:
3.3V/5V – AUX Can be a General Purpose Output.
GPIO[20:19] OD GPIO:
3.3V/5V – AUX Can be a General Purpose Input or Output.
GPIO[24:21] I GPI:
3.3V/5V - AUX Can be a General Purpose Input.
87

AC’97 Interface USB Interface
AC_BIT_CLK I AC’97 Bit Clock: OSC12MHI I UTMI 12MHz Clock Input:
3.3V/5V -M This signal is a 12.288MHz serial data clock, which is 3.3V/5V -AUX This pin provides the 12MHz clock signal input form
generated by primary Codec. external crystal or oscillator.
AC_RESET# O AC’97 Reset: OSC12MHO O UTMI 12Mhz Clock Output:
3.3V -AUX Hardware reset signal for external Codecs. 3.3V/5V -AUX This pin should be connected with the other end of
AC_SDIN0 I AC’97 Serial Data Input : the 12Mhz crystal or left unconnected if an external
3.3V/5V -AUX Serial data input from primary Codec. oscillator is used
AC_SDIN1 I AC’97 Serial Data Input: USBCLK48M I USB 48 MHz clock input:
3.3V/5V -AUX Serial data input from secondary Codec. When Modem 3.3V/5V -M This signal provides the fundamental clock for the USB
Codec is used, this pin dedicate to Modem Serial data Controller.
input. OC[0:5]# I/O USB Port 0-5 Overcurrent Detection:
AC_SDIN[3:2] I AC’97 Serial Data Input: 3.3V/5V - AUX OC[0:5]# are used to detect the overcurrent condition of
(GPIO[10:9]) 3.3V/5V -AUX Serial data input from third and forth Audio Codec. USB Ports 0-5.
AC_SDOUT O AC’97 Serial Data Output: UV[3,0]+, I/O USB Port [3:0] Differential:
3.3V -M Serial data output to Codecs. UV[3,0]- 3.3V - AUX These differential pairs are used to transmit
AC_SYNC O AC’97 Synchronization: Data/Address /Command signals for ports 3 and 0. (USB
3.3V -M This is a 48KHz signal, which is used to synchronize the controller 0)
Codecs. UV[4,1]+, I/O USB Port [4:1] Differential:
UV[4,1]- 3.3V - AUX These differential pairs are used to transmit
Data/Address/Command signals for ports 4 and 1. (USB
controller 1)
UV[5,2]+, I/O USB Port [5,2] Differential:
UV[5,2]- 3.3V - AUX These differential pairs are used to transmit
Data/Address/Command signals for ports 5 and 2. (USB
controller 2)
Legacy I/O and Miscellaneous Signals USBREF I USB reference resistor input:
Name Pin Attr Description 3.3V – AUX A resistor should be connected to USBVSS from this pin
SPK O Speaker output: for IO impedance calibration.
3.3V -M The SPK is connected to the system speaker.
ENTEST I SiS963L Test Mode Enable Pin
3.3V/5V -M
OSCI I 14.318 MHz. Clock In
3.3V -M
88
6. System Block Diagram

U6
Pentium 4
Prescott/Northwood
Processor
FSB 800MHz
CRT
U12
Memory Bus 266/333/400MHz
Mini-PCI Socket
TFT LCD
North Bridge
U9 184 pin DDR SO-DIMM Socket * 2
Type III A SiS M661FX
TV-Encoder
S-VIDEO SiS301LV
MuTIOL
interface
PCI Interface
1GHz
U5
RJ-45 Jack
USB2.0 * 6 U20 LAN PHY
U22
Ti PCI1410A HDD South Bridge AC Link Cable
M.D.C RJ-11 Jack
PCMCIA &
CDROM SiS963L
Card Reader
External
U11 Microphone
Audio Codec
LPC Interface Cable
U21 Internal
Fan1/Fan2
Power Switch Speaker
Power Button U17 U10 External

Cover Switch U23 Amplifier Speaker
W83L950D
BIOS
PCMCIA/CARDBUS Touch Pad
Socket
KBC PLCC 32
Keyboard
89
7. Maintenance Diagnostics
7.1 Introduction
Each time the computer is turned on, the system bios runs a series of internal checks on the hardware. This power-
on self test (post) allows the computer to detect problems as early as the power-on stage. Error messages of post
can alert you to the problems of your computer.
If an error is detected during these tests, you will see an error message displayed on the screen. If the error occurs
before the display is initialized,then the screen cannot display the error message. Error codes or system beeps are
used to identify a post error that occurs when the screen is not available.
The value for the diagnostic port (378H) is written at the beginning of the test. Therefore, if the test failed, the user
can determine where the problem occurred by reading the last value written to port 378H by the 378H port debug
board plug at Mini PCI Slot.
90
7.2 Error Codes (1)

Following is a list of error codes in sequent display on the PIO debug board.
Code POST Routine Description Code POST Routine Description

10h Some type of lone reset 20h Test keyboard
11h Turn off FAST A20 for POST 21h Test keyboard controller
12h Signal power on reset 22h Check if CMOS RAM valid
13h Initialize the chipset 23h Test battery fail & CMOS X-SUM
14h Search for ISA Bus VGA adapter 24h Test the DMA controller
15h Reset counter / Timer 1 25h Initialize 8237A controller
16h User register config through CMOS 26h Initialize int vectors
17h Size memory 27h RAM quick sizing
18h Dispatch to RAM test 28h Protected mode entered safely
19h Check sum the ROM 29h RAM test completed
1Ah Reset PIC’s 2Ah Protected mode exit successful

1Bh Initialize video adapter(s) 2Bh Setup shadow
1Ch Initialize video (6845Regs) 2Ch Going to initialize video
1Dh Initialize color adapter 2Dh Search for monochrome adapter
1Eh Initialize monochrome adapter 2Eh Search for color adapter
1Fh Test 8237A page registers 2Fh Sign on messages displayed

91
7.2 Error Codes (2)

Following is a list of error codes in sequent display on the PIO debug board.
Code POST Routine Description Code POST Routine Description

30h Special init of keyboard ctlr 40h Configure the COMM and LPT ports
31h Test if keyboard Present 41h Initialize the floppies
32h Test keyboard Interrupt 42h Initialize the hard disk
33h Test keyboard command byte 43h Initialize option ROMs
34h Test, blank and count all RAM 44h OEM’s init of power management
35h Protected mode entered safely(2) 45h Update NUMLOCK status
36h RAM test complete 46h Test for coprocessor installed
37h Protected mode exit successful 47h OEM functions before boot
38h Update output port 48h Dispatch to operate system boot
39h Setup cache controller 49h Jump into bootstrap code
3Ah Test if 18.2Hz periodic working 50h ACPI init

3Bh Test for RTC ticking 51h PM init & Geyserville CPU init
3Ch Initialize the hardware vectors 52h USB HC init
3Dh Search and init the mouse
3Eh Update NUMLOCK status
3Fh Special init of COMM and LPT ports

92
7.3 Debug Tool

7.3.1 Diagnostic Tool for Mini PCI Slot :
P/N:411906900001
Description: PWA-MPDOG;MINI PCI DOGKELLER CARD
Note: Order it from MIC/TSSC
93
8. Trouble Shooting
8.1 No Power (*1) 8.9 Hard Drive Test Error
8.2 Battery Can not Be Charged 8.10 CD-ROM Driver Test Error
8.3 No Display (*2) 8.11 USB Port Test Error
8.4 LCD No Display or Picture Abnormal 8.12 PC Card Socket Test Error
8.5 External Monitor No Display or Color Abnormal 8.13 Mini-PCI Socket Test Error
8.6 TV Test Error 8.14 Audio Failure
8.7 Memory Test Error 8.15 LAN Test Error
8.8 Keyboard (K/B) Touch-Pad (T/P) Test Error
94
*1: No power definition

Base on ACPI Spec. We define the no power as while we press the power button, the system can’t leave S5 status
or none the PG signal send out from power supply.
Judge condition:
Check whether there are any voltage feedback control to turn off the power.
Check whether no CPU power will cause system can’t leave S5 status.
If there are not any diagram match these condition, we should stop analyzing the schematic in power supply sending
out the PG signal. If yes, we should add the effected analysis into no power chapter.
*2: No display definition

Base on the digital IC three basic working conditions: working power, reset, Clock. We define the no display as
while system leave S5 status but can’t get into S0 status.
Judge condition:
Check which power will cause no display.

Check which reset signal will cause no display.
Check which Clock signal will cause no display
Base on these three conditions to analyze the schematic and edit the no display chapter.
Keyword:
S5: Soft Off
S0: Working
For detail please refer the ACPI specification
95
8.1 No Power (1)

When power button is pressed ,nothing happens ,power indicator does not light up.
PF1,PL1,PL2 P24 Main Voltage Map

P23 PL6,PD4 PD1,PD3 P23 JS2,PU3,PL7,PD42 PQ17 P24
Power In ALWAYS +5VA +5VAS
PJ1 P24
P24 PU4 L56 P20
PQ7 PQ13,PL7
PQ8 +5V +3VA +KBC_VDDA
PR48 PL15,PU14 PD14
P23 PR47 P25
PD5 P23 PU16,PT1 PU17,PU18 P25 PQ34
ADINP DVMAIN +12V +12VS JO3
+5VS_AMP P19
PU19 P25
U21
PU22 +5VS VCCA P16
PU23 U3
PD7 CHARGE VCCPVID P5
PQ43 U1 P18
R240
PR108,PU18 P25
USB[1,4]VCC5
PQ42 Z1XAVDD P7
PL19 +5V P18 L55
U2
PR136 P22 P24 USB[0,3]VCC5 Z4XAVDD P7
R161
U7 P21
DLLAVDD P7
PQ38,PQ39,PQ36 USB[2,5]VCC5 R171
BATT PU15 DDRAVDD P7
PU13 P25 R157
PL14,PR95 P25
DISCHARGE +3VS A1XAVDD P7
+3V R170
L59 P14
A4XAVDD P7
USBPVDD R158
C1XAVDD P7
R262 P14
R156
PU9 USBVDD C4XAVDD P7
PL11 L35
NOTE : P23 : Page 23 on M/B Board P25 P12 +TVPLL_VCC P8
circuit diagram. PR71 P26 PQ26 R303
+1.8V +1.8VS IDEAVDD L28
+LPLL_VDD P8
PF1 : Through by part PF1. L32
PU12 +DAC_VDD
PL13,PU11 P8
PU10 R163 P9
R257
PL12 +DDRVREF SZ1XAVDD P12
P26
PR72 PQ30 P25 L58
+2.5V_DDR VDD_MEM2.5 SZ4XAVDD P12
PU8 P26 PJO1 P26

+1.25V_DDR_P +1.25V_DDR
96
8.1 No Power (2)

No Power
Check the following parts for cold solder or one of the following
parts on the Mother Board may be defective, use an oscilloscope
to check the following signal or replace the parts one at a time and
test after each replacement.
Battery
Is the
Notebook connected No Connect Parts Signal
to power (Either AC adaptor AC adaptor PJ2 PL22 PR146 PQ39 BATT ADINP
or battery)? or battery PU22 PU23 PQ43 PQ35 BATT_T ADINP_1
PD7 PL19 PQ42 PR125 BAT_V ADINP_2
PD16 PR136 PU21 DVMAIN ADEN#
Yes PL21 PR139 PQ38
Where
From Power Source
Try another known good battery Problem(First use
or AC adapter. AC to power it)
Power Yes Replace the faulty parts on the Mother Board may be defective, use an oscilloscope
OK? AC adaptor or to check the following signal or replace the parts one at a time and
Battery. test after each replacement.
AC Adaptor
No
Parts Signal
PJ1 PD4 PD1 PQ2 DVMAIN ALWAYS
PF1 PQ7 PD3 PR14 SW_+5V PWR_ON
Replace Board-level PL1 PQ8 JL503 PD2 LEARNING +5VA
Motherboard Troubleshooting PL2 PR47 JL1 PU3
PL6 PR48 PR2 PQ12
97
8.1 No Power (3)

PD1
BAV70LT1
PD3
BAV70LT1
ALWAYS
P23 PL1 JL503
120Z/100M
ADINP_1
PL2 JL1
120Z/100M
ADINP_2
PF1 PL6 8
PJ1 TR/SFT-10A
120Z/100M 3 7
PR48
0.06 DCP3 DVMAIN
ADINP
1 2 6
1 5 DVMAIN
PR47 PD5
D
S
PC2 PC4 PC10 PQ4 PR19 0.06 SM840B
G
0.1U 0.1U 0.1U RLZ24D 470K
3
4
2
PQ7 PR54 PR55 PC22 PC24

AQ4407 10K 10K 0.1U 1000P
PC28
0.1U
8
3 7
2 6
PR14 1 5
470K
D
S
PR109
G
169K +3VA
PR2 PQ8 P20
PQ2 47K AQ4407
2N7002 LEARNING# LEARNING# 8 U17
PR3
PR107
100K
ADEN# 14 KBC
100K
PQ35 PR112 PR111
W83L950D
DTC144WK 100K 1M
PQ36 8
+5VA 2N7002 7 3
+5VA
ALWAYS 6
5
2
1
S
G
4
PQ39
PR45 AQ4407
470K
P24
8
BATT 7 3
6 2
PQ12
SI2301DS +5VA
5 1 PJ2
S
G
4
PQ38
AQ4407
P24
+5V
Battery Connector
PL7 PC27
120Z/100M 0.1U PQ13 PF2 PL16
SI2301DS PR126 TR/SFT-10A
JS2 G 0.02 120Z/100M
2
8 6
ALWAYS IN 5VTAP
2 1 PL17
SENSE OUT S D PR122
7 5 0.02 120Z/100M
F/B ERR- PC132
3 4 0.1U
SW_+5VA SHUTDN GND PC14 PC21 PL18
PD2 0.1U 10U 120Z/100M
PC8
0.1U PU3
LP2951-02BM
98
8.2 Battery Can not Be Charged (1)

When the battery is installed but the battery status indicate LED display abnormal.
Battery can not Charge
Board-level
Troubleshooting
Is the
notebook connected No
Connect
to power (AC adaptor)? AC adaptor.
Yes Replace parts on the mother-board may be defective, use an oscilloscope
Motherboard to check the following signal or replace the parts one at a time and
test after each replacement.2
Parts Signal
1. Make sure that the battery is good.
2. Make sure that the battery is installed properly. U17 PR146 ADINP
PU22 PR139 ADINP_1
PD7 PR140 ADINP_2
PL21 RP36 LI_OVP
PL20 D15 I_LIMIT
PU23 RP125 CHG_I
PD16 PU21 DBATT
Battery charge Yes PL19 RP129 BAT_T
Correct it.
OK? PR136 RP130 BAT_C
PQ43 PQ40 BAT_D
No PQ42 BATT_DEAD
99
8.2 Battery Can not Be Charged (2)

When the battery is installed but the battery status indicate LED display abnormal.
PD7 PL21
SM840B 120Z/100M
ADINP
PL20
PU23
120Z/100M
SI4814 PQ43 PQ42
2
1
+ + AQ6405 AQ6405
PC156 PC160 PC159 D2
0.1U 100U 100U 6 6
PL19 5 5
PR136
8 10µH 0.035 2 4 4 2 BATT
PR139 D1 5 1 1
S
10 G2
27
P22 6
D
ADINP_1 24
G
7 PC164
PR146
10 10U
26
PU22 PR134
3
ADINP_2 470K
PC145 PC148
21 3
1U 1U
MAX1772 G1
PR148 PR150
20 1 1 PR128
14 S1 A 100K
PQ41
4
2N7002
PR151 PC161
18
17
13
19
LI_OVP
100K 0.1U
PR156
0
+3VA +5VAS
DBATT +3VA
PC155 +KBC_VDDA
CHG_I
1U DBATT PC154 PC158

0.1U PR125 PR129
0.1U 630K 100K
8
D15
+5VA
BAV70LT1 BATT BATT_DEAD
3
10
+ 1
RP36 2
PR137 -
P20 33*4 10K PJ2 PU21A
LMV393M
4
78 BAT_TEMP BAT_T
U17 1 8 6
P24
PR130
100K
PC137
0.1U
PL18
Battery Connector
C224 PR141 PC141 PC143 120Z/100M
0.1U 10K PR119 PR123
1000P 0.1U
KBC 499K
PF2 PL17
1M
PR126
0.02
TR/SFT-10A 120Z/100M
+5VAS
77 BAT_VOLT 2 7 BAT_V 2
W83L950D PC132 PR122

PL16
120Z/100M
C223 PC131 PR115 0.02
0.1U 0.1U 75K 0.1U PR133
4.7K PR124
4 12.1K
8
RP36 5
33*4
2
3
PR145 +
5 7
BAT_C 0 6
BAT_CLK 3 6 -
PU21B
DBATT PR132
4
PR143 402K PR127 PC136
0 PQ40
BAT_DATA 4 5 BAT_D 30.9K 0.1U
SCK431LCK-5
100
8.3 No Display (1)

There is no display on both LCD and VGA monitor after power on although the LCD and monitor is known-good.
No Display
Monitor No
or LCD module Replace monitor
OK? or LCD.
Board-level
Yes Troubleshooting
Make sure that CPU module,DIMM

memory are installed properly.
Display Yes Yes

Correct it. If 378 Port According error
OK? Replace Have error code Cord to repair
Motherboard
No
No
1. Try another known good CPU
module, DIMM module And BIOS.
2. Remove all of I/O device (HDD, Check system clock and reset
CD-ROM…….) from motherboard circuit.
except LCD or monitor.
1. Replace faulty part.

Display Yes
2. Connect the I/O device to the To be continued
OK? M/B one at a time to find out Clock and reset checking
which part is causing the problem.
No
101
8.3 No Display (2)

System Clock Check
+3VS +3VS +12VS
R133
10K
R226 R227
1K 1K R213 R178 R177
BSEL0 10K FS2 4 4.7K 4.7K G
P4 35 SMBCLK
U6 R216
14
D S
BSEL1 10K FS3
P11 Q16 G
34 2N7002 P12 P13 P14
P4 CPU HCLK_CPU R175 33 40 D S
SMBDATA
Q12
R176 33 39 2N7002
PGA487 HCLK_CPU# 10 R215 22 ZCLK1
U20
15 FS4 R217 33 CLK_SBPCI
P6
HCLK_SIS661FX R173 33 44 U13 SiS963L
3 R212 33 REFCLK1
FS1/REF1
U12 HCLK_SIS661FX# R174 33 43
26 R186 22 USBCLK_SB
AGP_CLK R179 22 31
SB
45 CPU_STP#
SiS M661FX
ZCLK0 R214 22 9 Clock
+3VS
NB REFCLK0 R201 33 FS0 2
+3VS
R169 +VCC_CORE
Generator 10K
33 R134
P8 VTT_PWRGD
U9 14.318MHZ_TV R200 33 10K Bit2 Bit7 Bit6 Bit5 Bit4 CPU SDRAM ZCLK AGP PCI
R135
Q17 10K FS4 FS3 FS2 FS1 FS0 MHz MHz MHz MHz MHz
SiS301LV ICS952007 MMBT3904L 0 0 0 0 0 100.00 100.00 133.33 66.66 33.33
Q13 0 0 0 0 1 100.99 133.99 134.65 67.33 33.66
MMBT3904L
R206 33 23 0 0 0 1 0 103.00 103.00 137.33 66.67 34.33
P21 J13
CLK_MINIPCI
0 0 0 1 1 100.00 100.00 133.33 66.67 33.33

R126 R180
0 22
0 0 1 0 0 133.33 133.33 133.33 66.66 33.33
CLK_SIO 26
Mini-PCI R220 0 0 1 0 1 134.65 134.65 134.65 67.32 33.66
17 33 PCICLK_CARD
0 0 1 1 0 137.33 137.33 137.33 68.66 34.33
R219 33 16
0 0 1 1 1 133.33 133.33 133.33 66.67 33.33
P20U17 0 1 0 0 0 200.00 200.00 133.33 66.67 33.33
PCI_KBCLK P16 0 1 0 0 1 201.98 201.98 134.65 67.33 33.66
KBC U22
6
X3 0 1 0 1 0 206.00 206.00 137.33 68.67 34.33

W83L950D 0 1 0 1 1 200.00 200.00 133.33 66.67 33.33
PCMCIA 0 1 1 0 0 166.66 166.66 133.33 66.66 33.33
C195 14.318MHZ C196
22P 22P 0 1 1 0 1 168.31 168.31 134.65 67.32 33.66
0 1 1 1 0 171.66 171.66 137.33 68.66 34.33
0 1 1 1 1 166.66 166.66 133.33 66.66 33.33
102
8.3 No Display (3)

DDR Clock Check
VDD_MEM2.5
L61
120Z/100M
3,12,23
J18
L60
120Z/100M
10
P11 +2.5V_DDR P9
C254 C233 C253 C255
0.1U 0.1U 0.1U 1000P +DDR_VREF
2 R279 0 CLK_DDR 0
1 R278 0 CLK_DDR 0#
P6 U12 R223
22 FWDSDCLKO 8
4 R281 0 CLK_DDR 1
SiS M661FX U19
C189 5 R282 0 CLK_DDR 1#
NB 10P
+12VS +3VS 13 R284 0 CLK_DDR 2

Clock
14 R285 0 CLK_DDR 2#
R133
10K 17 R253 0 CLK_DDR 3
Buffer
R178
4.7K
R177 P11 U13
16 R254 0 CLK_DDR 3#
G 4.7K
24 R252 0
SMBCLK
D S
35 ICS93772 CLK_DDR 4
Q16
Clock 25 R251 0 CLK_DDR 4#
2N7002 G
Generator 26 R249 0 CLK_DDR 5
SMBDATA D S 34
Q12 ICS952007 27 R258 0 CLK_DDR 5#
2N7002
ASMBCLK 7
P13 U20
SiS963L ASMBCLK 22
SB
103
8.3 No Display (4)

System Reset Check
R349
P4 U6 CPUPWRGD_C
0_DFS
CPUPWRGD_N P16
P6 U12 U22 P21 P8 U9
J13
CPU CPURST# CPURST# PCMCIA TV/LVDS
Mini-PCI
Controller Encoder
Pentium4 +3VA
PWROK
SiS M661FX
20
26
123
R241
33 NBRST#
PCIRST#
PCIRST#
PCIRST#
U18 NB
IMP811 R260
10K
25 RESET# 2 3
+5VS
AUXOK
RESET# MN
1 4
GND VCC +3VS
P20 C230 NBRST#
R331
0.1U 10K
P12 P13 R327
10K
IDERST#
5 PWROK PWROK
U17 Q33
R299 DTC144TKA
18 PWR_ON R314
Power 33
100K PCIRST# PCIRST# Q32
80 VRMPWRGD
KBC Module DTC144TKA
R245
33
U20
64 LPC_RST# LPC_RST#
W83L950D 7 SIS_PWRBTN# SIS_PWRBTN#

+3V
4 PSON#_SB PSON#_SB
P15 J16 P15 J21
D19
RLS4148 Primary Secondary
SW501 SiS963L
1 POWERBTN#
EIDE EIDE
1 2
3 4 R301 Connector Connector
5 AUXOK 1K
P19 11 AC97_RST# AC97_RST#

U11 SB C272
+
C275
+
C274 R305
Audio Codec J15 0.1U 10U 10U 100K
VT1616
P17
MDC
104
8.4 LCD No Display or Picture Abnormal (1)

There is no display or picture abnormal on LCD or monitor.
VGA Controller Failure
Board-level
Troubleshooting
1. Confirm LCD is good and check the cable
are connected properly.
2. Try another known good LCD
One of the following parts on the mother-board may be

Replace defective, use an oscilloscope to check the following signal or
Yes Motherboard replace the parts one at a time and test after each replacement.
Display Replace faulty LCD
OK?
Parts: Signals:
No U12 +3VS
U9 DVMAIN
J6 LCDVCC
Remove all the I/O device & cable from U17 IXOUT2
motherboard except extended LCD. L2 LCD_ID[0:2]
L3 TXOUT[0:2]+
L22 TXOUT[0:2]-
RP1 TXCLK+
RP2 TXCLK-
Connect the I/O device & cable Q4 +12VS
Yes Q5 ENPBLT
Display to the M/B one at a time to find
R26 ENAVDD
OK? out which part is causing the BLADJ
problem.
No
105
8.4 LCD No Display or Picture Abnormal (2)

There is no display or picture abnormal on LCD or monitor.
L35
120Z/100M
54
TVPLL_VCC +3VS
P8 C74
0.1U J6
L2
120Z/100M
34 TXOUT0- 14 29
DVMAIN
U9 33 TXOUT0+ 12 30
31 TXOUT1- 13 C7
0.1U
TV/LVDS Encoder P10
30 TXOUT1+ 11 RP2
1K*4
28 TXOUT2- 7 1 8
SiS301LV 18 2 7
+3VS
27 TXOUT2+ 5
20 3 6
25 TXCLK- 8 22 4 5
LCD Connector + Inverter

24 TXCLK+ 6
127 ENAVDD
+3VS
Q5
DTC144TKA R26 L22
128
+5VS 470K 120Z/100M
P20U17
+12VS 26 BLADJ BLADJ 11
G C26
Q4
AO3400 0.1U
KBC
1,2
ENABLK Q6 (W83L950D)
D
S
DTC144TKA
C33 C9 C8 C23
0.1U 1000P 0.1U 1000P
Q7
P13 ENBKL_MASK
DTC144TKA
L3
U20 ENPBLT
120Z/100M
25
3
4
9
R93
SiS963L 10K 10
15
SB LCD_ID0 LCD_ID0 17 16
27
28
GND1
P6 U12 LCD_ID1 LCD_ID1 19 GND2
LCD_ID2 LCD_ID2 21
SiS M661FX
NB
4
3
2
1
RP1
10K*4
5
6
7
8
106
8.5 External Monitor No Display or Color Abnormal (1)

There is no display or picture abnormal on monitor.
VGA Controller Failure
Board-level
1. Confirm monitor is good and check the cable Troubleshooting
2. Try another known good monitor
Replace
Motherboard
Yes Replace faulty
Display One of the following parts on the mother-board may be
OK? monitor. defective, use an oscilloscope to check the following signal or
replace the parts one at a time and test after each replacement.
No
Parts: Signals:
Remove all the I/O device & cable from U12 L7 +3VS
motherboard except extended monitor. J2 L8 +5VS
R153 L9 +3V
R136 L10 CRT_RED
Q18 L11 CRT_GREEN
Q19 R4 CRT_BLUE
Connect the I/O device & cable Q15 R3 CRT_DDDA
Display Yes to the M/B one at a time to find Q11 JL501 CRT_HSYNC
L5 JL502 CRT_VSYNC
OK? out which part is causing the
L6 CRT_DDCK
problem.
No
107
8.5 External Monitor No Display or Color Abnormal (2)

There is no display or picture abnormal on monitor.
+3V J2
R4
+5VS R3 10K
1K
CRT_IN# 5
+3VS +5VS CRT_IN#
C1
From SB Page 13
100P P10
R136 R153
G GND_CRT15
2.2K 2.2K
P6 CRT_DDDA S D L8 120Z/100M 12
G Q18
2N7002
CRT_HSYNC S D HSYNC_CON L10 120Z/100M 13
Q19 G
External VGA Connector

2N7002
CRT_ VSYNC S VSYNC_CON L9 120Z/100M 14
U12 D
Q15 G
2N7002
CRT_ DDCK S D L11 120Z/100M 15
Q11
2N7002
4
3
2
1
SiS M661FX CP2
22P*4
5
6
7
8
NB GND_CRT15
CRT_ RED L5 120Z/100M 1
CRT_ GREEN L6 120Z/100M 2
CRT_BLUE L7 120Z/100M 3
X
3
2
1
4
CP1 16,17
22P*4
6
7
8
5
GND_CRT15
108
8.6 TV Test Error (1)

There is no display or picture abnormal on TV.
TV Controller Failure
Board-level
Troubleshooting
Confirm TV is good and check the cable
One of the following parts on the mother-board may be

defective, use an oscilloscope to check the following
signal or replace the parts one at a time and test after
Display Yes each replacement.
Replace faulty cable
OK?
Parts: Signals:
No
U9 TV_COMP
J1 TV_CRMA
RP4 TV_LUMA
Replace Motherboard. L12
L14
L13
L1
109
8.6 TV Test Error (2)

There is no display or picture abnormal on TV.
J1
P8
P10
43 TV_LUMA L12 2.7uH 4
U9 45 TV_CRMA L14 2.7uH 6
S-VIDEO
TV/LVDS Encoder 41 TV_COMP L13 2.7uH 7
SiS301LV 1
4
3
2
1
RP4 C68 C65 C70 C4 C5 C6

75*4 270P 270P 270P 270P 270P 270P
3
GND1
5
6
7
8
L1 GND2
JP_BEAD_DFS
GND_TV
110
8.7 Memory Test Error (1)

Extend DDRAM is failure or system hangs up.
Memory Test Error
1. If your system installed with expansion

DDR SO-DIMM module then check
them for proper installation.
2. Make sure that your DDR SO-DIMM
sockets are OK. Board-level
3. Then try another known good DDR Troubleshooting
SO-DIMM modules. One of the following components or signals on the motherboard
may be defective ,Use an oscilloscope to check the signals or
replace the parts one at A time and test after each replacement.
Yes
Test Replace the faulty DDR
OK? SDRAM module.
Parts: Signals:
No U12 +1.25V_DDR DDR_RAS#
U19 +2.5V_DDR DDR_CAS#
If your system host bus clock running at U13 +DDR_VREF DDR_WE#
J18 DDR_CKE [0:3] SMBDATA
266/333/400 MHZ then make sure that DDR Replace
R287 DDR_CS[0:3]# SMBCLK
SO-DIMM module meet require of PC Motherboard R133 DDR_MA [0:12] HCLK_SISM661FX
2100/2700/3200. Q12 DDR_MD [0:63] HCLK_SISM661FX#
Q16 DDR_DQS [0:7] CLK_DDR [0:5]
R251~R254 DDR_BA [0,1] CLK_DDR [0:5]#
R49 DDR_DQM [0:7]
Yes Replace the faulty DDR R58
Test
OK? SDRAM module.
No
111
8.7 Memory Test Error (2)

Extend DDRAM is failure or system hangs up.
+1.25V_DDR J18
RP9,RP11,RP13,RP15,RP17,RP19,RP21,
RP23,RP26,RP29,RP31,RP33,RP34,RP38 +2.5V_DDR
R290 RP42,RP44,RP45,RP48,RP50,RP52,
33 RP54,RP56,RP60,RP62,RP65,RP67
33*4 +DDRVREF
CKE [0:3] CKE [0:3]
DDR_BA0 R287 10 BA0

P9
P6
DDR_MA [0:12],DDR_CS[0:3]# MA [0:12],CS[0:3]#
DDR_MD [0:63] MD [0:63]
DDR_DQS [0:7], DDR_BA 1 DQS [0:7], BA 1
DDR_DM [0:7], NB_WE# DM [0:7], WE#
DDR_RAS#, NB_CAS# RAS#, CAS#
RP8,RP10,RP12,RP14,RP16,RP18,RP20,RP22,RP25 RAS#, CAS#

RP28,RP30,RP32,RP35,RP37,RP41,RP43,RP47,RP46
U12 +12VS RP49,RP51,RP53,RP55,RP57,RP61,RP63,RP66 DM [0:7], WE#
10*8
DDR SODIMM
DQS [0:7], BA 1
+3VS
R133 MD[0:63]
10K
SiS M661FX MA[0:12],CS[0:3]#
CKE [0:3]
R177 R178
G 4.7K 4.7K
NB SMBDATA
D S
ASMBDATA SMBDATA
Q12 G
SMBCLK 2N7002 ASMBCLK SMBCLK
D S
Q16
2N7002
2 R279 0 CLK_DDR 0
1 R278 0 CLK_DDR 0#
P11
ASMBCLK 7 4 R281 0 CLK_DDR 1
+2.5V_DDR 5 R282 0 CLK_DDR 1#

ASMBDATA 22 U19 13 R284 0 CLK_DDR 2
+DDRVREF 14 R285 0 CLK_DDR 2#
R163
49.9 17 R253 0 CLK_DDR 3
Clock
16 R254 0 CLK_DDR 3#
R162 Buffer 24 R252 0 CLK_DDR 4

49.9
25 R251 0 CLK_DDR 4#
ICS93772 26 R249 0 CLK_DDR 5
27 R258 0 CLK_DDR 5#
112
8.8 Keyboard (K/B) Touch-Pad (T/P) Test Error (1)

Error message of keyboard or touch-pad failure is shown or any key does not work.
Keyboard or Touch-Pad
Test Error
Board-level
Troubleshooting
Is K/B or
T/P cable connected to Yes
Correct it.
notebook One of the following parts or signals on the motherboard
properly? may be defective, use an oscilloscope to check the signals or
replace the parts one at a time and test after each replacement.
Replace
No Motherboard
Parts Signals
Try another known good Keyboard U17 RP49 +5VS

U20 RP27 +3VA
or Touch-pad.(Internal or external)
J20 RP24 +KBC_VDDA
J501 R344 LAD[0:3]
SW503 X4 SERIRQ
SW504 R247 PCI_KBCLK
L63 SW502 KO[0:15]
Test Yes Replace the faulty L64 SW505 KI[0:7]
Ok? Keyboard or L56 T_CLK
Touch-Pad T_DATA
XIN
No XOUT
113
8.8 Keyboard (K/B) Touch-Pad (T/P) Test Error (2)

Error message of keyboard or touch-pad failure is shown or any key does not work.
+3V
J501
39~53 KO[1:15] 2~16
+KBC_VDDA P20 54 KO0 1

71
RP27 P20
C219 62 KI0 1 8 10K*4 17
0.1U
61 KI1 2 7 18
P13
60 KI2 3 6 19
U20 LAD[0:3]
65~68 59 KI3 4 5 20
RP24
10K*4
SiS963L SERIRQ 69 58 KI4 1 8 21
57 KI5 2 7 22
SB 56 25,26
KI6 3 6 23
+3VS U17 55 KI7 4 5 24
L46
120Z/100M KBC SW502
36
P11 U13
1
3
2
4
C138
0.1U (W83L950D) UP 5 Internal Keyboard Connector
6
Clock R219
33
SW505
16 PCI_KBCLK 70
X3
7 Generator 1
3
2
4
DOWN 5 +5VS
ICS952007 +3VA J20
14.31818MHz
C195 C196 POWRBTN# 9 L64 120Z/100M 1
1 T_DATA 2
22P 22P
6 T_CLK L63 120Z/100M 3
+3V P15 C291
0.1U
R250 SW504
10K
COVER_SW# 4
SW501 22 2
4
1
3
2 1 SW_LEFT 5
4 3 6
5
R344
10K SW503
2 1 5
SW_RIGHT 4 3
SW506 5
3 1
4 2
Touch-pad Connector
114
8.9 Hard Drive Test Error (1)

Either an error message is shown, or the driver motor continues spinning, while reading data is from or
writing data is to hard drive.
Hard Driver
Test Error
Board-level
Troubleshooting
1. Check if BIOS setup is OK?

2. Try another working drive.
One of the following parts or signals on the motherboard may be

defective, use an oscilloscope to check the signals or replace the parts
Yes one at a time and test after each replacement.
Re-boot
Replace the faulty parts.
OK?
Parts: Signals:
No Replace
Motherboard U20 +5VS IDE_PIORDY
J16 +3VS IDE_PDDACK#
Check the system drive for proper R327 PCIRST# IDE_IRQ14
R331 IDERST# IDE_PDA1
installation.
Q32 IDE_PDD[0:15] IDE_PDA0
Q33 IDE_PDDREQ IDE_PDCS1#
JS4 IDE_PDIOW# IDE_PDA2
R346 IDE_PDIOR# IDE_PDCS3#
R337
Yes D507
Re - Test End
OK?
No
115
8.9 Hard Drive Test Error (2)

Either an error message is shown, or the driver motor continues spinning, while reading data is from or
writing data is to hard drive.
+5VS
J16
JS4
41,42
+5VS +5VS C93 C94

0.1U 0.1U
+3VS P15
R331
R337 D507 R346
10K
150 CL-190G 0
R327 HDD_LED# 40
10K
Q33
P12 DTC144TKA IDERST# 2
PCIRST# Q32
DTC144TKA
Primary EIDE Connector

IDE_PDD[0:6,8:15] 3,5~18
IDE_PDD7 4
R297
U20 5.6K
IDE_PDDREQ 22
SiS963L IDE_PIORDY 28
IDE_IRQ14 32
SB
IDE_PDIOW# 24
1
IDE_PDIOR# 26
20
IDE_PDDACK# 30
21
IDE_PDA[0:2] 34~36
23
IDE_PDCS3# 37 25
IDE_PDCS1# 38 29
39
27
44
R210
470
116
8.10 CD-ROM Drive Test Error (1)

An error message is shown when reading data from CD-ROM drive.
CD-ROM Driver
Test Error
Board-level
Troubleshooting
1. Try another known good compact disk.
2. Check install for correctly.
One of the following parts or signals on the motherboard may be

Yes defective, use an oscilloscope to check the signals or replace the parts
Test one at a time and test after each replacement.
OK? Replace the faulty parts.
No Replace Parts: Signals:

Motherboard U20 +5VS IDE_IRQ15
J21 +3VS IDE_SDA1
Check the CD-ROM driver for proper
R327 PCIRST# IDE_SDA0
installation. R331 IDERST# IDE_SDCS1#
Q32 IDE_SDD[0:15] IDE_SDA2
Q33 IDE_SDDREQ IDE_SDCS3#
JS5 IDE_SDIOW# CDROM_COMM
R347 IDE_SDIOR# CDROM_LEFT
Yes R338 IDE_SIORDY CDROM_RIGHT
Re - Test End
D507 IDE_SDDACK#
OK?
No
117
8.10 CD-ROM Drive Test Error (2)

An error message is shown when reading data from CD-ROM drive.
+5VS
J21
JS5
38,40,42
+5VS +5VS C313 C314

0.1U 0.1U
+3VS P15
R331
10K R338 D508 R347
150 CL-190G 0
R327 CDROM_LED# 37
10K
Q33
P12 DTC144TKA IDERST# 5
PCIRST# Q32
DTC144TKA
Secondary EIDE Connector

IDE_SDD[0:6,8:15] 6,8~22
IDE_SDD7 7
U20 R328
5.6K
SiS963L IDE_SDDREQ 22
IDE_SIORDY 27
SB IDE_IRQ15 29
4
IDE_SDIOW# 25 23
26
IDE_SDIOR# 24
43
IDE_SDDACK# 30
44
IDE_SDA[0:2] 31,33,34
45
IDE_SDCS3# 36 46
IDE_SDCS1# 35 48
GND1
GND2
118
8.11 USB Port Test Error (1)

An error occurs when a USB I/O device is installed.
USB Test Error

Board-level
Troubleshooting
Check if the USB device is installed

properly.
Check the following parts for cold solder or one of the following parts
on the mother-board may be defective, use an oscilloscope to check the
following signal or replace the parts one at a time and test after each
replacement.
Test Yes
Correct it
OK? Replace
No Motherboard Parts: Signals:
U20 R63 +3V USBPVDD
U13 R64 +5V USBPVSS
U1 L15~L18 USBP[0:5]+ USB_OC#[0:5]
Replace another known good USB device. U2 R6 USBP[0:5]- USBCLK_SB
U7 R15~R20 USB0VCC5 USB12M_SB
J3 R263~R274 USB1VCC5
J4 R276 USB2VCC5
J9 L59 USB3VCC5
L33 R194 USB4VCC5
L34 R196 USB5VCC5
Re-test Yes
Correct it R81 R262 USBVDD
OK? R82 USBVSS
No
119

U2
RT9701-CBL
3 1 USB3VCC5
+5V VIN0 VOUT0
VIN0
GND
C24 4 5 USB0VCC5 +
VIN1
VIN1 VOUT1 C14
1U C18
R18 0.1U 220U
2
10K
USB_0C#3
GND_USB GND_USB
J4
R17
P14
C20
1000P 560K
J7
B1 P18
R270 L17
P11 R186 0 90Z/100M
U13 26
22 USBCLK_SB
USBP3_N USBP3- B2
2 3
R269
0
USB2.0 Connector
USBP3_P USBP3+ 1 4 B3
Clock
R194
Generator 22
U20
27 USB12M_SB
R264 L18
ICS952007 USBP0_N 0
USBP0-
90Z/100M
A2
SiS963L 2 3
R263
USBP0_P 0 USBP0+ 1 4 A3
SB
A1
C10 C15 +
R6
0.1U 220U
10K
A4,B4,GND[1:4]
USB_0C#0
GND_USB GND_USB JS502

C11
R15
1000P
560K
GND_USB
120

U1
RT9701-CBL
3 1 USB4VCC5
+5V VIN0 VOUT0
VIN0
GND
C22 4 5 USB1VCC5 +
VIN1
VIN1 VOUT1 C12
1U C17
R16 0.1U 220U
2
10K
USB_0C#4
GND_USB GND_USB
J3
R19
P14
C21
1000P 560K
J7
B1 P18
R272 L15
P11 R186 0 90Z/100M
U13 26
22 USBCLK_SB
USBP4_N USBP4- B2
2 3
R271
0
USB2.0 Connector
Clock
R194
Generator 22
U20
27 USB12M_SB
R266 L16
ICS952007 USBP1_N 0
USBP1-
90Z/100M
A2
SiS963L 2 3
R265
SB
A1
C19 C13 +
R20
0.1U 220U
10K
A4,B4,GND[1:4]
USB_0C#1

C27
R22
1000P
560K
GND_USB
121

U7
RT9701-CBL
3 1 USB2VCC5
+5V VIN0 VOUT0
VIN0
GND
C58 4 5 USB5VCC5 +
VIN1
VIN1 VOUT1 C63
1U C69
R81 0.1U 220U
2
10K
USB_0C#2
GND_USB GND_USB
J9
R82
P14
C64
1000P 560K
J7
B1 P18
R267 L33
P11 R186 0 90Z/100M
U13 26
22 USBCLK_SB
USBP2_N USBP2- B2
2 3
R268
0
USB2.0 Connector
Clock
R194
Generator 22
U20
27 USB12M_SB
R273 L34
ICS952007 USBP5_N 0
USBP5-
90Z/100M
A2
SiS963L 2 3
R274
SB
A1
C43 C52 +
R63
0.1U 220U
10K
A4,B4,GND[1:4]
USB_0C#5

C51
R64
1000P
560K
GND_USB
122
8.12 PC Card Socket Test Error (1)

An error occurs when a PC card device is installed.
PC-Card Socket
Test Error
Board-level
Troubleshooting
1. Check if the PC CARD device is installed

properly.
2. Confirm PC card driver is installed ok.
parts on the mother-board may be defective, use an oscilloscope
Test Yes Replace test after each replacement.
OK? Correct it Motherboard
No Parts: Signals
U22 +3VS PCI_INTB#
U20 VCCA PCI_GNT0#
Try another known good
U13 VPPA PCI_SERR#
PC card device. J502 PCI_AD[0:31] PCI_PERR#
R299 PCIRST# PCICLK_CARD
R220 PCI_C/BE#[0:3] PCI_PAR
R320 PCI_FRAME# PCI_REQ0
Yes R324 PCI_IRDY# CLKRUN#
Re-test Change the faulty R322 PCI_TRDY# PCI_LOCK#
OK? part then end. R318 PCI_DEVSEL# SERIRQ
PCI_STOP#
No
123
8.12 PC Card Socket Test Error (2)

+5VS +12VS +3V3
3,4,16
5,6
J502
9
63…
+3VS AUX_VCC
73 VCCEN#0 11~13 17,51
1 VCCA
SDAT VCCD0 AVCC[A,B,C] VCC[0,1]
PCI_AD [0:31]
SCLK
74 VCCEN#1 2
VCCD1
U21 AVPP
10 VPPA 18,52
VCC[0,1]
R320 P16
71 VPPEN0 15
P12 PCI_AD20
100 13 SLAT VDDP0
TPS221A R322
72 VPPEN1 14 10K
VPP_VCC VDDP1 P16 P16
IDSEL 58
119 CRST#
PCI_C/BE# [0:3] 12,27,37,48
CAD [0:31]
PCI_REQ0# 1
Card Bus PCMCIA Socket

PCI_FRAME# 28
106 CGNT# 15
U20
29
U22
PCI_ IRDY# 132 CINT# 16
103 CBLOCK# 48
PCI_ TRDY# 31 PCMCIA
SiS963L
88,99,112,125 CCBE# [0:3]
PCI_ DEVSEL# 32
(Ti PCI1410A) 123 CREQ#
60
PCI_ STOP# 33
SB 111 CFRAME# 54
110 CIRDY# 20
21
PCI _CLK CARD
From Page 11 U17 109 CTRDY# 53
107 CDEVSEL# 50
PCI_ INTB# 60
105 CSTOP# 49
PCIRST# R299 33 20
PCI_ GNT0# 2 101 CPAR 13
PCI_ SERR# 35 104 CPERR# 14
PCI_ PERR# 34 133 CSERR# 59
124
8.13 Mini-PCI Socket Test Error (1)

Mini-PCI Socket
Test Error
Board-level
Troubleshooting
1. Check if the Mini-PCI CARD device
is installed properly.
2. Confirm Mini-PCI driver is installed ok.
Test Yes Replace test after each replacement.
OK? Correct it
Motherboard
No
Parts: Signals
Try another known good U20 +5VS PCI_SERR#
Mini-PCI card device. J13 +3VS PCI_PERR#
R339 PCI_AD[0:31] PCI_INTD#
D503 LAD[0:3] PCIRST#
Q10 PCI_C/BE#[0:3] PCI_GNT2#
RP5 MPCI_PD PCI_PAR
Re-test Yes Change the faulty R120 PCI_INTC# PCI_FRAME#
OK? part then end. R220 CLK_MINIPCI PCI_TRDY#
R299 PCI_REQ2# PCI_STOP#
No PCI_IRDY# PCI_DEVSEL#
CLKRUN#
125
8.13 Mini-PCI Socket Test Error (2)

Wireless LED
+3VS
Q10
+5VS DTC144TKA
R339 D503 J13
150 CL-190G
88,89…
P12 PCI_AD[0:31]
P21
MPCI_PD 13
PCI_REQ2# 29
PCIRST# R299 33 26
PCI_FRAME# 64
Mini-PCI Connector
U20
PCI_TRDY# 66
PCI_STOP# 68
SiS963L
PCI_DEVSEL# 72
PCI_IRDY# 61
SB CLKRUN# 65
PCI_SERR# 67
PCI_PERR# 71
+3VS +3V JS3

24,124
R117
10K
MPCIACT# 122
126
8.14 Audio Failure (1)

No sound from speaker after audio driver is installed.
Audio Drive Failure
Board-level
Troubleshooting
1. Check if speaker cables are connected
properly.
2. Make sure all the drivers are installed
properly.
Check the following parts for cold solder or one of the following parts on the
motherboard may be defective,use an oscilloscope to check the following signal
or replace parts one at a time and test after each replacement.
Replace
Test Yes Motherboard 1. If no sound cause of line out, 2. If no sound cause 3. If no sound cause of
OK? Correct it. check the following parts & of MIC, check CD-ROM, check the
signals: the following following parts & signals:
No parts & signals:
Parts: Signals: Parts: Signals: Parts: Signals:

1. Try another known good speaker,
CD-ROM. U11 R147 AOUT_R U11 AVDDAD U11 CDROM_RIGHT
U20 R150 AOUT_L J11 MIC1 J21 CDROM_LEFT
2. Exchange another known good
U10 R191 ROUT+ MIC501 MIC2 R141 CDROM_COMM
Audio/touch pad/card Read board. J8 R188 ROUT- R160 R138
J14 JO3 LOUT+ R204 JL12
Q20 L45 LOUT- L39 C121
D23 L49 LINE_OUT_L L62 C119
L26 L41 LINE_OUT_R R100
Re-test Yes L27 R152 SPK_OFF C111
Correct it. L29 R196 C112
OK?
L31
No
127
8.14 Audio Failure (2) – Audio IN

AVDDAD
+3VS
L50
120Z/100M R160
1,9 2.2K
DVCC[1,2]
C179 C166 C172
0.1U 0.1U 0.1U
4,7
DGND[1,2] R204 J11
2.2K
6
+12VS U15 AGND
AVDDAD
7
L78L05ACU L53 C112 L39
120Z/100M BEAD_600Z/100M 5
1U AGND
3 1 25,38 21 MIC 4
O I AVCC[1,2] MIC1
3
GND
C190 C194 C185 C176 C175

0.1U 0.1U 10U 0.1U 0.1U
26,42
P19 C107 External MIC Jack
1000P
2
AGND[1,2] R100
0_DFS
AGND_C
AGND AGND 1
MIC501
47 EAPD AGND
AC97_RST# 11 To next page
2
P13 U11
AC97_SDIN R308 22 8 L62
BEAD_600Z/100M Internal MIC
AC97_SYNC R306 22 10
U20 AC97_SDOUT R307 22 5 J21

AC97_BITCLK R310 22 6
Audio Codec 20 C119 1U R138 330 CDROM_RIGHT 2
SIS963L SPK_OFF 18 C121 1U R141 330 CDROM_LEFT 1 P15

To next page
19 C120 1U CDROM_COMM 3
VT1616 R139 R140
SB SBSPKR 100K 100K
AVDDAD
AVDDAD
JL12 CDROM
Connector
R195
10K AGND
R205 C126 35 35 AOUT_L
C174
47K 1U LINE_OUT_L
0.1U PCBEEP 12
PC_BEEP To next page L51
36 36 AOUT_R
P16 U22 LINE_OUT_R 120Z/100M
Q21
PCMCIA CARDSPK#
MMBT3904L
2
XTAL_IN XTAL_IN
3
L36
Ti U14 AGND 120Z/100M GND
R321 R148 AHC1G86DBV
PCI1410A 10K 10K
R187 1M L52
R159 C137 120Z/100M
AGND GND
MINIPCI_SPKR# 47K 1U
X2 L40
From J13 Page 21 C160 C143
24.576MHZ 120Z/100M
22P 22P AGND GND
AGND_C GND
128
8.14 Audio Failure (3) – Audio OUT

SPK_OFF# EAPD SHUTDOWN
R193 20K
HI HI LOW
R189 47K HI LOW HI
LOW HI HI
+5VS R151 47K
LOW LOW HI
R149 20K
+5VS_AMP JO3
J8
4,17
VDD[0,1] 3 SPKR_LOUT+ L27 120Z/100M 3
+OUTA
C164 C171 C173 C181
18 SPKR_ROUT+ L31 120Z/100M 1
10U 0.1U 1000P 0.1U
+OUTB
P19 5 SPKR_LOUT- L26 120Z/100M 4 P19

-OUTA
AGND 16 SPKR_ROUT- L29 120Z/100M 2

-OUTB
C117
1U R150 20K C136 L45
9
AOUT_L -INA2 220U BEAD_600Z/100M Internal Speaker Connector
U10 +
From previous page R147 33K 6
-INA R144 C109
C165 1K 100P
1U
R188 33K 15
AOUT_R -INB
Amplifier L41 6
J14
AGND AGND_C
From previous page R191 20K 11 120Z/100M
-INB2 7
C170 L49 5
220U BEAD_600Z/100M
+5VS_AMP + 4
LM4873MTE 3
R185 C108
1K 100P
+5VS_AMP Line Out Jack
R152 AGND AGND_C AGND_C
R196 100K
R145
100K SHUTDOWN 1 20 100K
D33 SHUTDOWN HP-IN
R143
BAT54A
2 10 100K
Q20 C321 HP_SENSE
EAPD 3 2N7002 MUXCTRL
From previous page 10P
1 C113
SPK_OFF# 0.1U
AGND
AGND
AGND
129
8.15 LAN Test Error (1)

An error occurs when a LAN device is installed.
LAN Test Error
Board-level
Troubleshooting
1. Check if the driver is installed properly.

2. Check if the notebook connect with the
LAN properly.
test after each replacement.
Test Yes
OK? Correct it. Parts: Signals
U20 R300 +3V RXIN+
U5 R292 LAN_MRXD[0:3] RXIN-
No U4 R295 LAN_MRXDV TXD+
X1 L24 LAN_MRXER TXD-
L19 L25 LAN_MRXC
L23 R66 LAN_MTXE
Replace R298 R68 LAN_MTXC
Motherboard R294 R53 LAN_DCLK
R288 R51 LAN_DADAIO
R291 R65 LAN_COL
R69 LAN_CRS
130
8.15 LAN Test Error (2)

An error occurs when a LAN device is installed.
+3V
24,33,45,48
7,13,14,20,
R35 C40
10K 0.1U
1
P0AC
LAN_MRX[D0:D3] 28~31
RXD[0:3]
R45 R42
62 62
P13 LAN_MTXD0 R294 22 39
TXD0 L25 J7
LAN_MTXD1 R288 22 40 P17 18 RXIN+
90Z/100M
1 16 PJRX+ 3
TXD1 TP_RXP
LAN_MTXD2
4 1 P17 14
P17
R291 22 41 PJRX- 6
TXD2 19 RXIN- 3 2 3
TP_RXN
LAN Connector
LAN_MTXD3 R300 22 42 11 PJTX+ 1
TXD3 U4
U20 LAN_MRXC R53 22 38
9 PJTX- 2
RXCLK C44
4.7P L24
LAN_MRXER 35
RXER 90Z/100M
LF_H41S 10 PJ4 4.5
LAN_MRXDV 32
U5 TP_TXP
12
11 TXD+ 6
RXDV 1 4 15 PJ7 7,8
SiS963L 13
LAN_COL 43 12 TXD- 2 3 8
COL LANPHY TP_TXN
LAN_CRS 44 R49
R34 R29 R48 R47 R46
CRS L23
62 62 75 75 75 75
120nH
SB LAN_MTXE R298 22 38
TXEN
ICS1883AF
LAN_MTXC R51 22 37
TXCLK +3V
R292 R65 C41
22 22 1000P
LAN_DCLK 27
MDC
R295 R69 100TCSR R55
22 22 10K
LAN_DATAIO 26 10TCSR
MDIO
16 16
100TCSR
+3V 22 15
RESETN 15
R66 10TCSR
1.5K
R52 R56
REF_OUT REF-IN 2K 1.5K
46 47
R68
10K X1
25MHZ
2 1
C49
1U
C39 C38
22P 22P
131
9. Spare Parts List

Spare Part List 1
Part Number Description Location(S) Part Number Description Location(S)
221679920001 CARTON;NON-BRAND,8640C 242600000439 LABEL;25*6,HI-TEMP,COMMON
221679950001 PARTITION;IN CARTON,8640C 242600000452 LABEL;BLANK,7MM*7MM,PRC
221679950002 CARD BOARD;TOP/BTM,PALLET,8640C 242600000452 LABEL;BLANK,7MM*7MM,PRC
221679950003 CARD BOARD;FRAME,PALLET,8640C 242664800013 LABEL;CAUTION,INVERT BD,PITCHING
221679950004 PARTITION;PALLET,8640C 242668300028 LABEL;32*7MM,POLYESTER FILM,HOPE
222600020049 PE BAG;50*70MM,W/SEAL,COMMON 242669600005 LABEL;LOT NUMBER,RACE
222600020310 PE BAG;70X100MM,W/SEAL,COMMON 242670800113 BFM-WORLD MARK;WINXP,7521N
222670820003 PE BAG;L560*W345,7521N 242679900005 LABEL;BAR CODE,(25*10MM)*12pcs,8
222671330003 PE BAG;LCD BRACKET,STINGRAY 242682900001 LABEL;AGENCY-GLOBAL,8599
222678500002 PE BUBBLE BAG;BATTERY,280*170,MS 242682900005 LABEL;BATT 14.8V/4AH,LI,PANA,MSL
224670830002 PALLET;1250*1080*130,7521N 271002103301 RES;10K ,1/10W,5% ,0805,SMT PR114,PR54,PR55
225600000054 TAPE;INSULATING,POLYESTER FILM,1 271002104301 RES;100K ,1/10W,5% ,0805,SMT PR110
225600000061 TAPE;ADHENSIVE,DOUBLE-FACE,W20,U 271002331301 RES;330 ,1/10W,5% ,0805,SMT FR3,FR4,R14,R15
225682900001 CONDUCTIVE TAPE;DC,M/B,8599 271013102301 RES;1K ,1/4W ,5% ,1206,SMT PR166,PR167
227675400003 EPE PAD;K/B,8355 271013221301 RES;220 ,1/4W,5% ,1206,SMT PR118,PR157,PR158,PR159
227682900001 END CAP;R,8599 271044060301 RES;.006 ,1.5W,5% ,2512,SMT
227682900002 END CAP;L,8599 271044061101 RES;.06,2W,1%,2512,SMT,乾坤
242600000001 LABEL;PAL,20*5MM,COMMON 271045057101 RES;.005 ,1W,1% ,2512,SMT PR72
242600000088 LABEL;BAR CODE,125*65,COMMON 271045107101 RES;.01 ,1W ,1% ,2512,SMT PR108,PR71
242600000145 LABEL;10*10,BLANK,COMMON 271045157101 RES;.015 ,1W ,1% ,2512,SMT PR95
242600000145 LABEL;10*10,BLANK,COMMON 271045357101 RES;.035,1W,1%,2512,SMT PR136
242600000232 LABEL;6*6MM,GAL,BLANK,COMMON 271046068101 RES;.006 ,1.5W ,1% ,2512,SMT;PWR RM4
242600000378 LABEL;27*7MM,HI-TEMP 260'C 271046069101 RES;.06,2W,1%,2512,SMT PR47,PR48
242600000433 LABEL;BLANK,11*5MM,COMMON 271061000002 RES;0 ,1/16W,0402,SMT PC106,PC86,PR12,PR143,PR145,P
242600000439 LABEL;25*6,HI-TEMP,COMMON 271061100501 RES;10 ,1/16W,5% ,0402,SMT PR52,PR59,PR63,R182,R199,R222
132
9. Spare Parts List

Spare Part List 2
271061101103 RES;100 ,1/16W,1% ,0402,SMT R120,R124,R130,R320,R325,R326 271061473102 RES;47K ,1/16W,1% ,0402,SMT R151,R189
271061102105 RES;1K ,1/16W,1% ,0402,SMT PR105,PR92,R1,R144,R185,R2,R2 271061473501 RES;47K ,1/16W,5% ,0402,SMT PR131,PR2,R159,R315,R318
271061103102 RES;10K ,1/16W,1% ,0402,SMT PR10,PR137,PR141,PR8,R146,R16 271061474501 RES;470K ,1/16W,5% ,0402,SMT PR121,PR14,PR19,PR56,PR62,PR
271061103501 RES;10K ,1/16W,5% ,0402,SMT PR20,PR25,PR7,R117,R133,R134, 271061475111 RES;475 ,1/16W,1% ,0402,SMT R168
271061104102 RES;100K ,1/16W,1% ,0402,SMT PR115,PR130 271061475211 RES;4.75K,1/16W,1% ,0402,SMT PR104,PR75
271061104501 RES;100K ,1/16W,5% ,0402,SMT PR107,PR112,PR129,PR3,PR32,P 271061499012 RES;49.9 ,1/16W,1% ,0402,SMT R162,R163,R164,R165,R166,R167
271061105501 RES;1M ,1/16W,5% ,0402,SMT PR106,PR111,PR113,PR70,PR85,P 271061512102 RES;5.1K ,1/16W,1% ,0402,SMT PR38
271061121312 RES;12.1K,1/16W,1% ,0402,SMT PR124 271061562501 RES;5.6K ,1/16W,5% ,0402,SMT R297,R328
271061130111 RES;130 ,1/16W,1% ,0402,SMT R131 271061564101 RES;560K ,1/16W,1% ,0402,SMT R15,R17,R19,R22,R64,R82
271061151102 RES;150 ,1/16W, 1%,0402,SMT R110,R211,R224,R230,R232,R234 271061620101 RES;62 ,1/16W,1% ,0402,SMT R103,R104,R105,R106,R107,R108
271061152302 RES;15K ,1/16W,5% ,0402,SMT R317 271061681501 RES;680 ,1/16W,5% ,0402,SMT R102
271061152501 RES;1.5K ,1/16W,5% ,0402,SMT R333,R56,R66 271061753101 RES;75,1/16W,1%,0402,SMT R122,R46,R47,R48,R49
271061202102 RES;2K ,1/16W,1% ,0402,SMT R52 271071000002 RES;0 ,1/16W,5% ,0603,SMT PR13,PR138,PR140,PR156,PR6
271061203102 RES;20K ,1/16W,1% ,0402,SMT PR102,PR34,PR76,PR81,PR96,R1 271071010301 RES;1 ,1/16W,5% ,0603,SMT PR148,PR150
271061220501 RES;22 ,1/16W,5% ,0402,SMT R127,R128,R179,R180,R186,R194 271071100302 RES;10 ,1/16W,5% ,0603,SMT PR117,PR120,PR139,PR146,R21
271061222501 RES;2.2K ,1/16W,5% ,0402,SMT R136,R153,R160,R91,R92 271071101301 RES;100 ,1/16W,5% ,0603,SMT R11,R12,R13,R17,R18,R35,R36,R4
271061243101 RES;24K ,1/16W,1% ,0402,SMT R73 271071102102 RES;1K ,1/16W,1% ,0603,SMT PR149,PR160,PR79,PR99
271061261211 RES;26.1K,1/16W,1%,0402,SMT PR77 271071102302 RES;1K ,1/16W,5% ,0603,SMT R11
271061272102 RES;2.7K ,1/16W,1% ,0402,SMT R204 271071103302 RES;10K ,1/16W,5% ,0603,SMT R1,R37,R38
271061273501 RES;27K ,1/16W,5% ,0402,SMT PR37 271071104101 RES;100K ,1/16W,1% ,0603,SMT R2,R3
271061330501 RES;33 ,1/16W,5% ,0402,SMT R173,R174,R175,R176,R200,R201 271071104101 RES;100K ,1/16W,1% ,0603,SMT PR128,PR142,PR151,PR153
271061333101 RES;33K ,1/16W,1% ,0402,SMT R147,R188 271071104302 RES;100K ,1/16W,5% ,0603,SMT R7
271061402011 RES;40.2 ,1/16W,1% ,0402,SMT R235,R236 271071105101 RES;1M ,1/16W,1% ,0603,SMT PR123
271061471501 RES;470 ,1/16W,5% ,0402,SMT PR1,R210 271071105301 RES;1M ,1/16W,5% ,0603,SMT R16,R39
271061472501 RES;4.7K ,1/16W,5% ,0402,SMT R142,R155,R177,R178,R192,R246 271071106301 RES;10M ,1/16W,5% ,0603,SMT R312
133
9. Spare Parts List

Spare Part List 3
271071107311 RES;107K ,1/16W,1% ,0603,SMT PR103 271071411102 RES;412,1/16W,1% ,0603,SMT R283
271071125301 RES;1.2M ,1/16W,5% ,0603,SMT PR29 271071422211 RES;42.2K,1/16W,1% ,0603,SMT PR5
271071131101 RES;130 ,1/16W,1% ,0603,SMT R14A 271071432111 RES;4.32K,1/16W,1% ,0603,SMT R10
271071140101 RES;14 ,1/16W,1% ,0603,SMT R132 271071432211 RES;43.2K,1/16W,1% ,0603,SMT R1
271071147011 RES;147 ,1/16W,1% ,0603,SMT R71 271071453211 RES;45.3K,1/16W,1% ,0603,SMT PR83
271071162211 RES;16.2K,1/16W,1% ,0603,SMT PR42 271071472101 RES;4.7K ,1/16W,1% ,0603,SMT PR133
271071169011 RES;169 ,1/16W,1% ,0603,SMT R137,R54 271071474301 RES;470K ,1/16W,5% ,0603,SMT PR134,PR31,PR45
271071169311 RES;169K ,1/16W,1% ,0603,SMT PR109 271071475011 RES;475 ,1/16W,1% ,0603,SMT PR33
271071182214 RES;18.2K,1/16W,1%,0603,SMT PR147 271071475811 RES;47.5 ,1/16W,1% ,0603,SMT PR41
271071183101 RES;18K ,1/16W,1% ,0603,SMT PR144 271071499311 RES;499K ,1/16W,1% ,0603,SMT PR119
271071201101 RES;200 ,1/16W,1% ,0603,SMT R228,R231 271071549211 RES;54.9K,1/16W,1% ,0603,SMT PR49
271071202301 RES;2K ,1/16W,5% ,0603,SMT R12 271071560101 RES;56 ,1/16W,1% ,0603,SMT R233,R238,R259,R275
271071221311 RES;221K ,1/16W,1% ,0603,SMT PR154 271071563101 RES;56K ,1/16W,1% ,0603,SMT R6
271071223302 RES;22K ,1/16W,5% ,0603,SMT PR30 271071604111 RES;6.04K,1/16W,1% ,0603,SMT R72
271071224301 RES;220K ,1/16W,5% ,0603,SMT R41 271071619011 RES;619 ,1/16W,1% ,0603,SMT PR23,PR26,PR28
271071270301 RES;27 ,1/16W,5% ,0603,SMT R119 271071634211 RES;63.4K,1/16W,1% ,0603,SMT PR94
271071274211 RES;27.4K,1/16W,1% ,0603,SMT PR39 271071634311 RES;634K ,1/16W,1% ,0603,SMT PR125
271071287111 RES;2.87K,1/16W,1% ,0603,SMT PR40 271071753301 RES;75K ,1/16W,5% ,0603,SMT R8
271071301311 RES;301K ,1/16W,1% ,0603,SMT R13,R3 271071806111 RES;8.06K,1/16W,1% ,0603,SMT PR101,PR78
271071309211 RES;30.9K,1/16W,1% ,0603,SMT PR127 271071806211 RES;80.6K,1/16W,1% ,0603,SMT PR27
271071324211 RES;32.4K,1/16W,1% ,0603,SMT PR24,PR51,PR58,PR64 271072474101 RES;470K ,1/10W,1% ,0603,SMT R4,R5,R9
271071330302 RES;33 ,1/16W,5% ,0603,SMT PR135 271586026101 RES;.02 ,2W,1%,2512,SMT PR122,PR126
271071333301 RES;33K ,1/16W,5% ,0603,SMT R2 271611000301 RP;0*4 ,8P ,1/16W,5% ,0612,SMT RP5
271071390302 RES;39 ,1/16W,5% ,0603,SMT R118 271611100301 RP;10*4 ,8P ,1/16W,5% ,0612,SMT RP10,RP12,RP14,RP16,RP18,RP2
271071402311 RES;402K ,1/16W,1% ,0603,SMT PR132 271611102301 RP;1K*4 ,8P ,1/16W,5% ,0612,SMT RP2
134
9. Spare Parts List

Spare Part List 4
271611103301 RP;10K*4 ,8P ,1/16W,5% ,0612,SMT RP1,RP24,RP27,RP3,RP39,RP40 272075103401 CAP;.01U ,CR,50V ,10%,0603,X7R,S PC151,PC153,PC32,PC45,PC60
271611330301 RP;33*4 ,8P ,1/16W,5% ,0612,SMT RP11,RP13,RP15,RP17,RP19,RP2 272075103401 CAP;.01U ,CR,50V ,10%,0603,X7R,S C11,C13,C3,C8
271611750301 RP;75*4 ,8P ,1/16W,5% ,0612,SMT RP4,RP7 272075103408 CAP ;0.1U CR 50V 10% 0603 X7R S C15,C16,C35,C37,C38,C39
271611822301 RP;8.2K*4,8P ,1/16W,5% ,0612,SMT RP58,RP59,RP6,RP64 272075103706 CAP; 0.1U CR 50V +80-20% 0603 Y C28,C30,C31,C32,C33,C34
272001106705 CAP;10U,10V,+80-20%,0805,Y5V,SMT C146,C159,C164,C185,C320 272075104701 CAP;.1U ,50V,+80-20%,0603,Y5V,S PC10,PC101,PC103,PC108,PC112
272002105701 CAP;1U ,CR,16V ,-20+80%,0805,Y5 PC29,PC46,PC61 272075120301 CAP;12P ,CR,50V ,5% ,0603,NPO,S C281,C282
272002225701 CAP;2.2U ,CR,16V ,+80-20%,0805,Y PC38 272075152401 CAP;1500P,CR,50V,10%,0603,X7R,SM PC110,PC81
272003105701 CAP;1U ,CR,25V ,+80%-20%,0805, PC145,PC148,PC19 272075181301 CAP;180P ,50V ,5% ,0603,NPO,SMT PC74
272005104401 CAP;.1U ,CR,50V,10%,0805,X7R,IN PC37,PC51,PC53 272075220301 CAP;22P ,50V ,5% ,0603,COG,SMT C143,C160,C195,C196,C217,C221
272005104705 CAP ;1U CR 50V +80-20% 0805 Y5V C17,C18 272075221401 CAP;220P ,CR,50V ,10%,0603,X7R,S PC11
272011106404 CAP;10U,6.3V,10%,1206,X7R,SMT C129,C29,C302,C318,C319,C32,C4 272075222401 CAP;2200P,50V ,10%,0603,X7R,SMT C5
272011106701 CAP;10U ,10V,+80-20%,1206,Y5V,S C100,C225,C274,C275,C279,C346 272075223702 CAP; 0.22U CR 50V +80-20% 0603 C29,C40,C41
272011226401 CAP;22U,6.3V,+-20%,1206,X5R,SMT C288 272075471401 CAP;470P ,50V,10%,0603,X7R,SMT C36
272012105401 CAP;1U ,CR,16V ,10%,1206,X7R,S C14A,C14B 272075471409 CAP; 0.0047U CR 50V 10% 0603 X7 C19
272023475401 CAP;4.7U ,25V ,10%,1210,X5R,SMT C1 272075479301 CAP;4.7P,50V,5%,0603,NPO,SMT C44
272030102301 CAP;100P,3KV,5%,1808,NPO,SMT,PWR C20 272102104401 CAP;.1U ,CR,10V,10%,0402,X5R,SM C501,C502,C503,C504,C505,C506
272030102405 CAP;1000P,CR,3KV,10%,1808,X7R,TU C2,C3,C41 272102105701 CAP;1U ,CR,6.3V ,80-20%,0402,Y C101,C110,C111,C112,C117,C118
272071105403 CAP;1U ,10V ,10%,0603,X5R,SMT C10,C4 272102153401 CAP;.015U ,CR,16V,10%,0402,X7R,S PC89
272071105701 CAP;1U ,CR,10V ,80-20%,0603,Y5 PC12,PC128,PC129,PC130,PC142 272105100303 CAP;10P ,CR,50V ,5%,0402,NPO,SM C189,C229,C264,C266,C30,C31,C3
272071332401 CAP;.33U ,10V ,10%,0603,X7R,SMT C2 272105101401 CAP;100P ,50V ,5%,0402,COG,SMT C1,C108,C109,C57,PC109,PC116,
272072104402 CAP;.1U ,CR,16V,10%,0603,X7R,SM C12,C17,C6 272105102408 CAP;1000P,CR,50V,10%,0402,X7R,SM C107,C11,C131,C150,C173,C20,C2
272072393401 CAP;.039U,CR,16V ,10%,0603,X7R,S PC13 272105103702 CAP;.01U ,50V,+80-20%,0402,SMT C183,C184,C191,C193,C228,C237
272072683404 CAP;.068U ,16V ,10%,0603,X7R,SMT C16 272105104701 CAP;.1U ,16V,+80-20%,0402,SMT C10,C102,C103,C104,C105,C106,C
272073223401 CAP;.022U,CR,25V ,10%,0603,X7R,S C9 272105222301 CAP;220P ,50V ,5% ,0402,NPO,SMT C35
272073472301 CAP;4700P,CR,50V ,5% ,0603,X7R,S C15A 272105222501 CAP;2200P,50V ,+/-20%,0402,X7R,S C67
135
9. Spare Parts List

Spare Part List 5
272105271403 CAP;270P ,50V,+-10%,0402,X7R,SMT C154,C157,C289,C316,C4,C5,C6,C 283467540002 IC;EEPROM,M93C46-WMN6T,64*16 BIT U16
272421225501 CAP;220U,TPE,4V,20%,7343,SMT PC166 283467640002 IC;FLASH,256K*8, PLCC32, LPC, ST
272431156501 CAP;150U,6.3V,TPE,20%,7343,SMT PC165 283468290001 IC;FLASH,256K*8,PLCC32,SST49LF02
272625220401 CP;22P*4 ,8P,50V ,10%,1206,NPO,S CP1,CP2 283468290002 IC;FLASH,256K*8,PLCC32,PM49FL002
272990100301 CAP;10P,3000V,+- 5%,NPO,SMT C19 284500301004 IC;SIS301LV,TV ENCODER/LVDS,128P U9
272993106001 CAP;10U,25V,2.2mm,X5R,KYOCERA,SM PC105,PC120,PC121,PC125,PC13 284500661001 IC;SISM661FX,N.B,BGA 839P U12
273000130019 FERRITE CHIP;120OHM/100MHZ,1608, L10,L11,L12,L13,L14,L2,L22,L26 284500781001 IC;G781,TEMPERATURE MTR,SO8 U8
273000130038 FERRITE CHIP;600OHM/100MHZ,1608, L39,L45,L49,L62 284500963004 IC;SIS963L,S.B.,BGA 371P U20
273000130062 INDUCTOR;120nH,10%,0603,SMT L23 284501410007 IC;PCI1410A,PCI/CARDBUS,PQFP,144 U22
273000130106 FERRITE CHIP;600OHM/100MHZ,.2A,1 284501616002 IC;VT1616,6-CHANNEL CODEC WITH S U11
273000150013 FERRITE CHIP;120OHM/100MHZ,2012, PL1,PL13,PL15,PL16,PL17,PL18 284501883001 IC;ICS1883AF,LAN PHY,SMT,SSOP48 U5
273000150106 INDUCTOR;4.7UH,10%,2012,30mA,SMT L20,L21 284583950002 IC;W83L950D-Ver.C,LPC_KBC,LQFP,8
273000150313 CHOKE COIL;90OHM/100MHZ,20%,2012 L15,L16,L17,L18,L24,L25,L33,L3 284593772002 IC;ICS93772CF,DDR ZERO DELAY CLO U19
273000150326 INDUCTOR;4R7,2012,15mA;SMT,MAG.L 284595200701 IC;ICS952007,CLOCK GEN,SSOP,48P U13
273000500095 CHOCK COIL;0.5UH.1.0mOHM,25%,30A PL10,PL8,PL9 286100358001 IC;LMV358M,DUAL AMP.,LOW VOLT.,S PU2
273000500096 CHOCK COIL;4.7UH.20mOHM,25%,4.5A PL14 286100393004 IC;LMV393,DUAL COMPARTOR,SSOP,8P PU21
273000500111 CHOCK COIL;3UH,14mOHM,7.5A,10039 PL11,PL12 286101422001 IC;G1422,AMPLIFIER,2W,TSSOP,20P, U10
273000500115 CHOKE COIL;400uH MIN,120mΩ MAX; L19 286300431014 IC;SC431LCSK-.5,.5%,ADJ REG,SOT2 PQ40
273000990012 INDUCTOR;10UH,CDRH127,SUMIDA,SMT PL19 286301414001 IC;MM1414,PROTECTION,TSOP-20A,PR IC7
273000990031 INDUCTOR;10UH,CDRH127B,SUMIDA,SM PT1 286301772001 IC;MAX1772,PWM,QSOP,28P PU22
273001050028 XSFORMER;10/100 BASE,LF-H41S,SMT U4 286302211001 IC;TPS2211,POWER DISTRI SW,SSOP1 U21
273001050127 XFMR;CI8.5,30T/2150T,300mH,SMT,o T1 286302211004 IC;TPS2211A,POWER INTERFACE SW,S
281101015001 IC;MP1015EM-Z,CCFL CTRL,TSSOP20, U1 286302951015 IC;LP2951ACM,VOLTAGE REGULATOR,S PU3
282574186002 IC;74AHCT1G86,SINGLE,XOR,SOT23,S U14 286302996001 IC;G2996,DDR,GMT,SOP8FD,SMT PU8
283467540001 IC;EEPROM,M24C02-WMN6T,2K,SO8,SM IC6 286303728002 IC;LTC3728LX,PWM CTRL,LTC,5X5 QF PU11,PU14
136
9. Spare Parts List

Spare Part List 6
286304377001 IC; MAX4377F,I-SENSEAMP ,MSOP8,S PU20 288200144001 TRANS;DTC144WK,NPN,SOT-23,SMT PQ12,PQ35
286306207001 IC;ISL6207CB,PWM DRIVER,SO8,SMT PU5,PU6,PU7 288200144003 TRANS;DTC144TKA,N-MOSFET,SOT-23 PQ18,Q10,Q14,Q22,Q23,Q26,Q29
286306247001 IC;ISL6247,PWM CONTROLLER,40-QFN PU1 288200144008 TRANS;DTA144EKA,PNP,SMT Q8
286307805019 IC;AZ78L05,VOL REGULATOR,SOT-89, U15 288200610001 TRANS;TP0610T,P-MOSFET,SOT-23 PQ9
286308800006 IC;AME8800AEEV,VOL REG.,SOT23-5, PU4 288200717001 DIODE;RB717F,SCHOTTKY,40V,SOT323 SD2
286309181002 IC;RT9181, 150mA LDO with POG,SO U3 288202240001 TRANS;MUN2240T1,NPN,SOT-23,ON
286309701001 IC;RT9701,POWER DISTRI SW,SOT23- U1,U2,U7 288203400001 TRANS;AO3400,N-MOSFET,SOT-23 PQ26,PQ30,Q4
286317812001 IC;HA178L12UA,VOLT REGULATOR,SC- PU17 288203401001 TRANS;AO3401,P-MOSFET,SOT-23 PQ13,PQ17,PQ34
286369229301 IC;G692L293T,RESET CIRCUIT,2.93V U18 288203403001 TRANS;AO3403,P-MOSFET,SOT-23,ALP Q8,Q9
286387506001 IC;S-875061EUP VOLT DETECTOR S IC5 288203904010 TRANS;MMBT3904L,NPN,Tr35NS,TO236 PQ6,Q13,Q17,Q21,Q31,Q34
288100024004 DIODE;ZMD24,ZENER,24V,1W,5%,SMT PD4 288203906018 TRANS;MMBT3906L,PNP,Tr35NS,TO236 Q30
288100032013 DIODE;BAS32L,VRRM75V,MELF,SOD-80 PD8 288204407001 TRANS;AO4407,P-MOS,.01OHM,SO8,SM PQ38,PQ39,PQ7,PQ8
288100056003 DIODE;BAW56,70V,215mA,SOT-23 PD16 288204409001 TRANS;AO4409,P-MOSFET,SO-8P,MSL, Q10,Q14
288100056005 DIODE;UDZ5.6B,ZENER,5.6V,UMD2,SM ZD3,ZD4 288204410010 TRANS;AO4410,N-MOSFET,ID=18A,0.0 PU10
288100056005 DIODE;UDZ5.6B,ZENER,5.6V,UMD2,SM PD2 288204422001 TRANS;AO4422,24mOHM,N-MOSFET,SOI PU13,PU19
288100070006 DIODE;BAV70LT1,70V,225MW,SOT-23, 288204800001 TRANS;SI4800DY,N-MOS,.0185OHM,SO PU16
288100112003 DIODE;EC11FS2-TE12L,SCHOTTKY,200 PD14 288204814001 TRANS;SI4814,26.5mOHM,N_MOS ,SMT PU15,PU23,PU9
288100541002 DIODE;BAT54ALT1,COM. ANODE,SOT-2 D33,PD11,PD13 288204832001 TRANS;SI4832DY,N-MOSFET,.028OHM, PU18
288100701002 DIODE;BAV70LT1,70V,225MW,SOT-23 D15,PD1,PD3 288204892001 TRANS;SI4892DY,N-MOSFET,SO8 PU12
288100840001 DIODE;SM840B,40V,8A,STD-202 PD5,PD7 288205003004 TRANS;SUD50N03-11,N-MOS,TO252 PQ15,PQ16,PQ20,PQ21,PQ23,PQ
288101004024 DIODE;EC10QS04,RECT,40V,1A,CHIP, PD12 288206035005 TRANS;FDD6035AL,46A,30V,16mOHM,T PQ14,PQ19,PQ22
288103104001 DIODE;EC31QS04-TE12L,40V,3A,SMT PD10,PD6,PD9 288206405001 TRANS;AO6405,87mOHM ,P-MOS,SMT PQ42,PQ43
288104148001 DIODE;RLS4148,200MA,500MW,MELF,S D19,D20,D21 288227002001 TRANS;2N7002LT1,N-CHANNEL FET,SO PQ1,PQ10,PQ11,PQ2,PQ27,PQ28
288110355001 DIODE;1SS355,80V,100mA,SOD-23,SM D3 291000000203 CON;HDR,MA,2P*1,3.5MM,R/A,SMT,SM J2
288111544001 DIODE; 1SR-154-400 400V 1.0A D4 291000000708 CON;BATTERY,7P,FM,2.5MM,BTG-07AR CON1
137
9. Spare Parts List

Spare Part List 7
291000001206 CON;MINI PCI SOCKET,P124,QTC,C10 297040105010 SW;PUSH BUTTOM,5P,SPST,12V/50MA, SW501,SW502,SW503,SW504,SW
291000010209 CON;HDR,MA,2P*1,1.25MM,H4.2,ST,S 310111103013 THERMISTOR;10K,1%,RA,DISK,103AT- RT2
291000010410 BFM-SC,CON;HDR,MA,4P*1,1.25MM,ST 310111103025 THERMISTOR;10K,1%,RA,DISK,103AT-
291000013016 CON;HDR,MA,15P*2,1MM,H4.25,ST,SM J6 310111103031 THERMISTOR;10K,1%,150MM,BN35-3H1
291000020204 CON;HDR,MA,2P*1,3.5MM,R/A,SMT,SM 312271006358 EC;100U,25V,RA,M,D6.3*7,SGX,SANY PC159,PC160,PC63,PC64
291000020222 CON;HDR,MA,2P*1,1.25MM,H4.2,ST,S J10,J12,J19,J5 312272205359 EC;22U ,20V,20%,RA,D6.3*5,OS-CO PC25,PC26,PC58
291000020415 CON;HDR,MA,4P*1,1.25MM,ST,SMT,38 J8 312272206101 EC;220U ,6.3V,M,6.3*5,-55+105',D C12,C13,C136,C14,C15,C170,C52,
291000143011 CON;FPC/FFC,15P*2,.8MM,BD/BD,ST, J15 312272206102 EC;220U ,10V,M,6.3*9,-55+105',DI
291000150606 CON;FPC/FFC,6P,0.5MM,R/A,SMT J20 312273361501 EC;330U ,6.3V ,RA,M,6.3*7,+105C
291000150607 CON;FPC/FFC,6P,0.5MM,R/A,SMT,200 312276806151 EC;680U ,6.3V,20%,D10,105'C,OS-C PC127
291000152610 CON;FPC/FFC,26P,1MM,H=2.0,R/A,85 312276806158 EC;680U,6.3V,20%,RA,10*10.5,105
291000152614 CON;FPC/FFC,26P,1MM,H=2.0,R/A,SM J501 312278206151 EC;820U ,4V,+-20%,100*10.5,SP.OS PC72,PC95
291000611255 MINIPCI SOCKET;124P,0.8MM,H=9.2, J13 312278206161 EC;820U ,2.5V,+-20%,8X12.5,OS-CO PC41,PC42,PC49,PC50,PC56,PC5
291000614795 IC SOCKET;BGA-mPGA478B,478P,AMP U6 314100143505 XTAL;14.31818MHZ,30PPM,32PF,49S, X3
291000616805 CON;PCMCIA CARD,68P,TAI-SOL,246- J502 314100143506 XTAL;14.31818MHZ,30PPM,32PF,AT49
291000811001 CON;PHONE JACK,10P,R/A,RJ45,RJ11 J7 314100245504 XTAL;24.576MHZ,30PPM,16PF,49S,11 X2
291000811011 CON;PHONE JACK,10P,R/A,RJ45,RJ11 314100250502 XTAL;25MHZ,30PPM,20PF,49S,11.5*3 X1,X6
291000923002 CON;MDC,15P*2,.8MM,BD/BD,ST,SMT, 314100327214 XTAL;32.768KHZ,12.5PF,20PPM,3*8, X7
294011200016 LED;GREEN,H0.8,0603,CL-190G,SMT D501,D502,D503,D504,D505,D50 314149800402 XTAL;8MHZ,30PPM,HC-49/S,6B080002 X4
294011200200 LED;GREEN/RED,H0.8,W1.9,19-22SRV D509 316678100001 PCB;PWA-INVERTER BD (DA-1A10-A); R0C
295000010116 FUSE;FAST, 10A, 86VDC, 6125,SMT PF1,PF2 316682900001 PCB;PWA-8599/M BD R06
295000010154 FUSE;FAST,1.25A,63V,1206,SMT,043 F1 316682900003 PCB;PWA-8599/BATT ,PR AND GA BD
297030100015 SW;TOGGLE,SPST,5V/1mA,4P,SMT,TAI SW506 323768290002 DDR SDRAM MODULE;256MB,184PIN,DD
297030105003 SW;TOGGLE,SPST,5V/1mA,MPU-101-80 324180786744 IC;CPU,Celeron,2.8G,FSB 400,MICR
297040100027 SW;PUSH BUTTOM,5P,SPST,12V/50MA, 331000000083 CON;HOLDER,PCMCIA,TAI-SOL,246-00
138
9. Spare Parts List

Spare Part List 8
331000007038 CON;BAT,7P,2.5mm,OCT,tBTD-007001 PJ2 333050000120 SHRINK TUBE;600V,105'C,D0.8*9MM,
331000007044 CON;BAT,7P,2.5mm,ALLTOP,C10368 335152000044 CFM-BAT;FUSE THERMAL 98'C
331000008090 CON;USB,MA,ST,4P*2,SMT,020122MR0 335152000085 FUSE; 128 DC-7A/50V 139 ℃only UC F2
331000008091 CON;USB,MA,ST,4P*2,SMT,1-1470748 J3,J4,J9 335152000094 FUSE;LR4-900,POLY SWITCH
331000050004 CON;CD-ROM,50P,0.8MM,H-10.4,R/A, J21 335152000100 FUSE; THERMAL,SF91E-1/94 ℃,10A/2
331000050005 CON;CD-ROM,50P,0.8MM,H-10.4,R/A, 338536010006 BATTERY;LI,3.6V/2.0AH,18650,PANA
331030044021 CON;HDR,FM,22P*2,2.0MM,SMT,C1783 J16 339115000046 MICROPHONE;-62dB+-2dB,D6.0*H2.7, MIC501
331030044023 CON;HDR,FM,22P*2,2.0MM,SMT,2001 339115000059 MICROPHONE;-44dB+-3dB,D6.0*H5.0,
331650047804 IC SOCKET;BGA-PGA478B-SKT,MOLEX, 339115000060 MICROPHONE; -62+/-3dB,60*27mm;HO
331660018441 DIMM SOCKET;DOUBLE STACK DDR,202 J18 340682900001 HOUSING ASSY;LCD,8599
331678100001 CONNECTOR;7 PIN,1.25mm,SMT,ACES, J1 340682900002 COVER ASSY;LCD,8599
331720015071 CON;D,FM,15P,2.29,R/A,SUYIN J2 340682900003 HINGE;R,8599
331840005013 CON;STEREO JACK,5P,R/A,28MF60-07 J11 340682900004 HINGE;L,8599
331840005014 CON;STEREO JACK,5P,R/A,28MF60-05 J14 340682900005 HINGE;R,SZS,8599
331870007010 CON;MINI DIN,7P,R/A,W/GROUND,030 J1 340682900006 HINGE;L,SZS,8599
331910002006 CON;POWER JACK,2P,20VDC,5A,DIP PJ1 340682900007 COVER ASSY;TOP,8599
332110020027 WIRE;#20,UL1007,50MM,BLACK,PRC VL-VL 340682900009 BRACKET ASSY;TOUCH-PAD,8599
332110020097 WIRE;#20,UL1007,74MM,BLACK,YIYI; 340682900010 SPEAKER ASSY; 28*4.3,2W,FENG-CHI
332110020175 WIRE;#20,UL1007,L=103MM,RED, PWR CN10 340682900011 SPEAKER ASSY; 28*4.3,2W,VECO,859
332110026097 WIRE;#26,UL1007,55MM,BLACK,PRC 340682900013 HEATSINK ASSY;CPU,NORTHWOOD,MPT,
332110026155 WIRE;26#,UL1061,L=115MM,YELLOW, CN9 340682900014 HEATSINK ASSY;CPU,NORTHWOOD,ALRO
332110026156 WIRE;#26,UL1061,L=136.5MM,WHITE, CN8 340682900015 HOUSING ASSY;BOTTOM,8599
332810000197 PWR CORD;125V/7A,3P,BLACK,AMERIC 340682900016 SHIELDING ASSY;BOTTOM,8599
333020000008 SHRINK TUBE;600V,125 ℃,Φ2.5mm,L 340682900017 COVER ASSY;CPU,8599
333025000004 SHRINK TUBE;300V,125,I.D=2.5,T=0 340682900018 COVER ASSY;MINIPCI,8599
139
9. Spare Parts List

Spare Part List 9
340682900019 HAETSINK ASSY;SYSTEM,M/B,MPT,859 346502800004 INSULATOR;BATT ASSY,BATT+,BATT-,
340682900020 HAETSINK ASSY;SYSTEM,M/B,ALRO,85 346503100001 INSULATOR;BATT ASSY,THERMAL FUSE
340682900021 SHIELDING ASSY;HDD,8599 346503100005 INSULATOR;5,BATTERY ASSY,7521Li
340682900023 COMBO BEZEL ASSY; QSI,SBW-242B,8 346503200202 INSULATOR;BATT ASSY,ONE ROUND,BL
341682900003 BRACKET;LCD,R,8599 346503400503 INSULATOR;BATT ASSY,W7L13,8175
341682900004 BRACKET;LCD,L,8599 346673420003 MYLAR;15*10*0.8,8640P
342502900001 CONTACT PLATE;W4L27T0.15,7068 346677300001 INSULATOR;FIBER,UL94V-0,D=17.5mm
342503200003 CONTACT PLATE;W4L18T0.15,7521/GR 346678600005 INSULATOR;FIBER,UL94V-0,64X15,T=
342503400005 CONTACT PLATE;W5L24T0.13,7170LI, 346682900005 INSULATOR;CARD BUS,8599
342682900009 BRACKET;ROM,8599 346682900006 INSULATOR;SOUTH BRIDGE,8599
342682900010 CONTACT PLATE;W5L28T0.15MM,BATTE 346682900007 NYLON;BATTERY PULL,8599
342682900011 CONTACT PLATE;W5L37.75T0.15MM,1/ 346682900009 AL-FOIL;T/P BRACKET,8599
342682900012 CONTACT PLATE;W4L18.5T0.15MM,1/2 346682900010 AL-FOIL;T/P SWITCH,MB,8599
342682900015 FINGER;EMI SMD FINGER,H=5.5,8599 346682900013 SPONGE;M/B,8599
344672300025 DUMMY CARD;PCMCIA,MANGUSTA 346682900014 INSULATOR;AL-FOIL,INVERTER,8599
344682900012 COVER;HINGE,8599 346684400001 INSULATOR;RIBRE,101*15*0.25MM,BA
344682900016 COVER;BATTERY,8599 346684400002 INSULATOR;RIBRE,63*15*0.25MM,BAT
344682900017 HOUSING;BATTERY,8599 347104030012 GASKET;1,04,030,012
345668900016 SPONGE;BIOS BATT,M722 347104030030 GASKET;1,04,030,030
345675400023 RUBBER;DOWN LCD,8355 347104045125 GASKET;1,04,045,125
345682900005 SPONGE;DUAL DDR,M/B,8599 347105020090 GASKET;1,05,020,090
345682900006 SPONGE;SPSPEND SWITCH,M/B,8599 347105060030 GASKET;1,05,060,030
345682900009 SPONGE;HINGE COVER,8599 347105060060 GASKET;1,05,060,060
345682900013 INSULATOR;S-VIDEO,M/B,8599 347108010012 GASKET;1,08,010,012
345684500004 RUBBER;SYSTEM HEATSINK,TARZAN 347108080090 GASKET;1,08,080,090
140
9. Spare Parts List

Spare Part List 10
347108150024 GASKET;1,08,150,024 377102651002 S-STANDOFF;M2.6DP5H12.5L4,NIW,NY
347110020025 GASKET;1,10,020,025 377244010002 STANDOFF;#4-40DP3.5H5L5.5,NIW
347110035035 GASKET;1,10,035,035 411678100001 PWA;PWA-INVERTER BD,DA-1A10-A,PW
347110040012 GASKET;1,10,040,012 411678100002 PWA;PWA-INVERTER BD,SMT,DA-1A10-
347110080025 GASKET;1,10,080,025 411682900001 PWA;PWA-8599,MOTHER BD
361200001018 CLEANNER;YC-336,LIQUID,STENCIL/P 411682900002 PWA;PWA-8599,MOTHER BD,T/U
361200003047 SOLDER PASTE;NO CLEAN,RMA,CK3000 411682900003 PWA;PWA-8599,MOTHER BD,SMT
361400003005 ADHESIVE;HEAT,TRANSFER,HTA-48(W) 411684410001 PWA;PWA-BATT,PCB BD,LI,4.0Ah,2P4
361400003030 ADHESIVE;ABS+PC PACK,G485,CEMIDA 411684410002 PWA;PWA-BATT,BATT BD,SMT,BL-4240
361400003037 SOLDER CREAM;SH-6309,SHENMAO,63/ 412678800001 PCB ASSY;FAX MODEM 56K,1456VQL4A
370102010205 SPC-SCREW;M2L2(t0.3),N/W/WLK 413000020386 LCD;HSD150PX14-A,TFT15",XGA,HANN
370102010256 SPC-SCREW;M2L2.5,K-HD(t0.5) NLK, 416268290011 LT PF;HANNSTAR,XGA,HSD150PX14-A,
370102610603 SPC-SCREW;M2.6L6,K-HD,NIB/NLK 421311310001 CABLE ASSY;PHONE LINE,6P2C,W/Z C
370103010405 SPC-SCREW;M3L4,NIW,K-HD,T0.3 421675400012 WIRE ASSY;BIOS,BATTERY,8355
370103010414 SPC-SCREW;M3L4,KHD,NIW/NLK,D5.3, 421676400001 WIRE ASSY,MDC-MODEM,APOLLON
370103010604 SPC-SCREW;M3L6,NIB,K-HD,t0.8,NYL 421682900004 WIRE ASSY;HSD150PX14-A,8599
371102010310 SCREW;M2L3,K-HD(+),D3.8,t=0.75,N 421682900007 WIRE ASSY;ANTENNA,8599
371102010310 SCREW;M2L3,K-HD(+),D3.8,t=0.75,N 421682900014 WIRE ASSY;HSD150PX14-A,GREATLAND
371102010610 SCREW;M2L6,K-HD(+),t0.75,NIB 422682900001 FFC ASSY;TOUCH-PAD,TENN-RICH,859
371102010610 SCREW;M2L6,K-HD(+),t0.75,NIB 422682900002 FFC ASSY;TOUCH-PAD,HONG-FU,8599
371102610308 SCREW;M2.6L3,D3.5,t=0.5,K-HD,NIW 422682900003 FFC ASSY;TOUCH-PAD,CEI,8599
371102610406 SCREW;M2.6L4,K-HEAD(+),NIB 431682900001 CASE KIT;ID1,256KB 8599
371102610607 SCREW;M2.6L6,K-HEAD(+),NIB 441682900010 LCD ASSY;HANNSTAR,XGA,HSD150PX14
373101712351 T-SCREW;B,M1.7,L2.35,K-HD,2,NIB 441684410001 BATT ASS'Y;14.8V,4.0Ah,LI,BL-424
377102650901 S-STANDOFF;M2.6DP3.5H9L1.1,NIW MTG2,MTG3 441684410002 BATT ASS'Y;14.8V,4.0Ah,LI,BL-424
141
9. Spare Parts List

Spare Part List 11
441684410004 BATT ASSY;14.8V,4.0Ah,LI,CASE CL 600100010009 SOLDER WIRE;63/37,0.8,CM,N/C,PRC
441684410005 BATT ASSY;14.8V,4.0Ah,LI,CORE PA 624200010140 LABEL;5*20,BLANK,COMMON
441684410006 CONTACT PLATE ASSY;W5L45T0.13,FU 624200010140 LABEL;5*20,BLANK,COMMON
441684410007 CONTACT PLATE ASSY;PTC,S-TUBE,BL
441999900330 BATT ASSY OPTION;LI,8-CELL,ID1,8
442680900051 TOUCHPAD MODULE;SYNAPTICS,TM42PU
442682900021 AC ADPT ASSY;19V,6.32A,DELTA ADP
451682900001 HDD ME KIT;8599
451682900003 LCD ME KIT;15",XGA,Hannstar,8599
451682900005 ROM ME KIT;8599
451682900006 LABEL KIT;N-B,w/o Intel Inside L
451682900007 HOUSING KIT;8599
461677400001 PACKING KIT;DA-1A05-A;PWR
461682900002 PACKING KIT;COMPACT,N-B,8599
481682900001 F/W ASSY;SYS/VGA BIOS,8599 U23
481682900002 F/W ASSY;KBD CTRL,8599 U17
523402379051 HDD DRIVE;40GB,2.5",MHT2040AT,V4
523430061010 DVD COMBO DRIVE;24X10X8X24,SBW-2
523468290002 COMBO ASSY;SBW-242B,8599
523468290005 HDD ASSY;FUJITSU,MHS2040AT,8599
526268290006 LTXNX;8599/5RYB/40C/1UI9/A1D2A/X
531010570032 KBD;88,UI,5035,BTC,8599
561568290002 MANUAL;QSG,EN,8599
600100010009 SOLDER WIRE;63/37,0.8,CM,N/C,PRC
600100010009 SOLDER WIRE;63/37,0.8,CM,N/C,PRC P/N:526268290006
142
8 7 6 5 4 3 2 1
MODEL : 8599 Revision 06

Contexts POWER STATES IDSEL
Title Page STATE
IDSEL CHIP
COVER SHEET & SCREW HOLE 1 VOTAGE POWER ON STR STD MEC-OFF REMARK AD11 SiS 963
SIGNAL PCI to PCI
D
System Block Diagram 2 AD12 Bridge D
H8_SUSB - HIGH LOW LOW LOW
Power Block Diagram 3 H8_SUSC - HIGH HIGH LOW LOW AD13 AC'97 Codec
Prescott/Northwood (1/2) 4 ADP +19V O O O O AD14 USB
Prescott/Northwood (2/2) 5 BATTERY +12V O O O O AD15 MII
SIS M661FX(1/2) 6 +VCC_CORE +1.75V O X X X AD20 Ti PCI1410A
SIS M661FX(2/2) 7 +12V +12V O O X X AD21 MiniPCI
TV/LVDS ENCODER(SiS301LV) 8 +12VS +12V O X X X
DDR DIMMs 9 +5V +5V O O X X
LCD&VGA Interface 10 +5VS +5V O X X X
Clock Generator/Buffer 11 +3V +3.3V O O X X
SIS963L (1/3) 12 +3VS +3.3V O X X X
SIS963L (2/3) 13 +2.5V_DDR +2.5V O O X X
SIS963L (3/3) 14 +1.8V +1.8V O O X X BUS MASTER
IDE Interface 15 REQ/GNT CHIP
+1.8VS +1.8V O X X X -REQ0/-GNT0 Ti PCI1410
C C
PCMCIA (Ti PCI1410A) 16 +1.25VS_DDR +1.25V O X X X -REQ2/-GNT2 MINI PCI

LAN PHY (ICS1883AF) & MDC 17 +5VA +5V O O O O
USB 2.0 & Flash ROM 18 +3VA +3.3V O O O O
AUDIO CODEC 19 +3VAS +3.3V O O O X
PCIINT
KBC (W83L950D) 20
PCIINT CHIP
MiNi-PCI & USB 2.0 21 INTA# SiS 301LV
Charge board 22 INTB# PCMCIA (PCI1410A)
DC Connector 23 INTC# MINI PCI
INTD# MINI PCI
Battery Connector 24
+5V,+3V,+1.8V,+1.5V 25
+2.5V,1.25V,1.8VS 26
CPU_CORE1 27
Board Stackup-up
CPU_CORE2 28 COMP
B
29 GND B
30 IN-1
31 IN-2
32 POWER
33 SOLDER
34
DRAW DESIGN CHECK ISSUED
A A
Title
COVER SHEET
Size Document Rev
R06
Number 411682900001
Date: Monday, April 12, 2004 Sheet 1 of 28
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Intel
D
8599 SYSTEM BLOCK DIAGRAM Northwood P4 DT 2.8Ghz D
Northwood Celeron DT 2.8Ghz

Prescott Celeron DT 3.2Ghz
Northwood Mobile-P4 3.06 Ghz
CPU
uFCBGA 478 pin
FSB 184 Pin DDR DIMM Socket*2

800Mz
CRT
DDR DIMM
DDR SDRAM PC2700/PC3200
SiS M661FX Memory Bus 333/400MHz
SiS 301LV
C
TFT LCD TV&LVDS ENCODER

NB C
839-Balls BGA
Mini-PCI socket LQFP 128
Type III A
124pin S-VIDEO
MuTIOL
interface
1GHz
PCI interface PCI interface MII interface ICS 1883

SSOP 48 RJ45
SiS 963L
Primery EIDE AC' link
(HDD) SB Cable
371-Balls BGA MDC RJ11
IC CARD
TI Socket Type Secondary EIDE
II (CDROM/DVD/CD-RW) External
B
PCI1410A B
VIA VT1616 Microphone

PCMCIA
Audio Codec
PQFP 48 Cable Internal
PQFP 144 TP2211A USB 2.0 LPC Speaker
Power Switch interface
SSOP 16
BIOS
GMT G1422
PLCC 32 External
Cover Switch Amplifier Speaker
TSSOP 20
KeyBoard
Touch PAD
W83L950D
KBC
Power Button LQFP 80
A A
Fan 1/ Fan 2
Title
SystemBlock DIAGRAM
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
+5V_AMP +1.8V
POWER BLOCK DIAGRAM OF THE 8599 5V DC to DC Convertor
Regulator
FAN5234 APL1117
+1.5VS +1.5V
MAINPWR
5V DC to DC Convertor
Regulator
D
FAN5234 APL1117 D
CPU_CORE_EN
PWR_ON +3V +3VS
Shut Down
MOSFET
3.3V&5V +5V +5VS
Self- DVMAIN DC to DC Convertor Shut Down
I_Limit Diode MOSFET
ADAPTOR discharge Protector LTC3728
SWITCH Rsense +12V +12VS
Shut Down
Regulator MOSFET
HA178L12UA
learning
Vcc Core DC to DC Convertor CPU_CORE
C C
Discharge Adaptor / Battery

Change ISL6247
Battery Switch
Pack
LTC3728 VDD_MEM2.5
+2.5V_DDR
SWITCH
+2.5V_DDR DC to DC Converter SI4800
+1.8VS
Diode
Protector Regulator
+1.2VS SI4800-1.8V
+1.2VS DC to DC Convertor +1.25V_DDR
Charge
Regulator
FAN1655 +5VA
B
Always B
Regulator
LP2951-5V
ADINP
High +3VA
Low Choke Rsense +5VA
Regulator
Side AME8800
LI_OVP DCIN +5VAS
SW SWITCH
CHARGING
SI2301
H8 D/A ADINP_2
CC
I_LIMIT ADINP_1
A/D PWM
Charge IC CC CHARGE Li-ovp
A
CHG_I
MAX1772 SWITCH A
D/A CV
MUST BE MEET ICH2
POWER ON SEQUENCE
Title
Power Block Diagram
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Prescott/Northwood (1/2)
HD#[0..63]
[6] HD#[0..63]
U6B
HD#31 H25 M23 HD#32
HA#[3..31] HD#30 D#31 D#32 HD#33
D K23 D#30 D#33 N22 D
[6] HA#[3..31] U6A HD#29 HD#34 TP502 TP503
J24 D#29 D#34 P21
HA#3 K2 G1 H_ADS# HD#28 L22 M24 HD#35
HA#4 A#3 ADS# H_ADS# [6] HD#27 D#28 D#35 HD#36
K4 A#4 AP#0 AC1 M21 D#27 D#36 N23
HA#5 L6 V5 HD#26 H24 M26 HD#37
HA#6 A#5 AP#1 HD#25 D#26 D#37 HD#38
1
K1 A#6 BINIT# AA3 G26 D#25 D#38 N26
HA#7 H_BNR# HD#24 HD#39 U6C
L3 A#7 BNR# G2 H_BNR# [6] L21 D#24 D#39 N25
HA#8 M6 HD#23 D26 R21 HD#40 HCLK_CPU AF22 AD6 BSEL0
A#8 D#23 D#40 [11] HCLK_CPU BCLK0 BSEL0 BSEL1 BSEL0 [11]
HA#9 L2 L25 HD#22 F26 P24 HD#41 HCLK_CPU# AF23 AD5
A#9 DP#3 D#22 D#41 [11] HCLK_CPU# BCLK1 BSEL1 CPUPERF# BSEL1 [11]
HA#10 M3 K26 HD#21 E25 R25 HD#42 1 AC26 A6
HA#11 A#10 DP#2 HD#20 D#21 D#42 HD#43 TP506 ITP_CLK0 TESTHI11 H_COMP0 CPUPERF# [13]
M4 A#11 DP#1 K25 F24 D#20 D#43 R24 1 AD26 ITP_CLK1 COMP0 L24
HA#12 N1 J26 HD#19 F23 T26 HD#44 TP505 P1 H_COMP1
HA#13 A#12 DP#0 HD#18 D#19 D#44 HD#45 H_A20M# COMP1
M1 A#13 G23 D#18 D#45 T25 [13] H_A20M# C6 A20M#
HA#14 N2 U6 TESTHI8 HD#17 E24 T22 HD#46 H_FERR# B6 AB4 H_BPM#5
HA#15 A#14 TESTHI8 TESTHI9 HD#16 D#17 D#46 HD#47 [13] H_FERR# H_IGNNE# FERR# BPM#5 H_BPM#4
N4 A#15 TESTHI9 W4 H22 D#16 D#47 T23 B2 IGNNE# BPM#4 AA5
HA#16 N5 Y3 TESTHI10 HD#15 D25 U26 HD#48 [13] H_IGNNE# Y6 H_BPM#3
HA#17 A#16 TESTHI10 H_BR#0 HD#14 D#15 D#48 HD#49 H_INTR BPM#3 H_BPM#2
T1 A#17 BR#0 H6 H_BR#0 [6] J21 D#14 D#49 U24 [13] H_INTR D1 LINT0 BPM#2 AC4
HA#18 R2 HD#13 D23 U23 HD#50 H_NMI E5 AB5 H_BPM#1
HA#19 A#18 H_BPRI# HD#12 D#13 D#50 HD#51 [13] H_NMI H_SMI# LINT1 BPM#1 H_BPM#0
P3 A#19 BPRI# D2 H_BPRI# [6] C26 D#12 D#51 V25 B5 SMI# BPM#0 AC6
HA#20 P4 HD#11 H21 U21 HD#52 [13] H_SMI# H_STPCLK# Y4
HA#21 A#20 H_DBSY# HD#10 D#11 D#52 HD#53 [13] H_STPCLK# STPCLK# TESTHI0
R3 A#21 DBSY# H5 H_DBSY# [6] G22 D#10 D#53 V22 TESTHI0 AD24
HA#22 T2 E2 H_DEFER# HD#9 B25 V24 HD#54 CPU_VID4 AE1 AE25 DBR# 1 TP501
A#22 DEFER# H_DEFER# [6] D#9 D#54 [28] CPU_VID4 CPU_VID3 VID4 DBR# DPSLP#
HA#23 U1 H2 H_DRDY# HD#8 C24 W26 HD#55 AE2 AD25
A#23 DRDY# H_DRDY# [6] D#8 D#55 [28] CPU_VID3 CPU_VID2 VID3 TESTHI12 DPSLP# [13]
HA#24 P6 F3 H_HIT# HD#7 C23 Y26 HD#56 AE3
A#24 HIT# H_HIT# [6] D#7 D#56 [28] CPU_VID2 CPU_VID1 VID2
HA#25 U3 E3 H_HITM# HD#6 B24 W25 HD#57 AE4 AA6 H_GTLREF
A#25 HITM# H_HITM# [6] D#6 D#57 [28] CPU_VID1 CPU_VID0 VID1 GTLREF3
HA#26 T4 R75 62 0402 1% HD#5 D22 Y23 HD#58 AE5 F6 1 TP509
A#26 D#5 D#58 [28] CPU_VID0 VID0 GTLREF2
HA#27 V2 AC3 1 2 HD#4 C21 Y24 HD#59 AA21 1 TP507
A#27 IERR# +VCC_CORE D#4 D#59 GTLREF1
HA#28 R6 HD#3 A25 Y21 HD#60 F20 1 TP508
HA#29 A#28 H_INIT# HD#2 D#3 D#60 HD#61 GTLREF0
W1 A#29 INIT# W5 H_INIT# [13,18] A23 D#2 D#61 AA25 +VCC_CORE AF2 VCC
HA#30 T5 HD#1 B22 AA22 HD#62 VCCVIDLB AF3 AC23 TESTHI5
HA#31 A#30 H_LOCK# HD#0 D#1 D#62 HD#63 RSVD TESTHI5 TESTHI4
U4 A#31 LOCK# G4 H_LOCK# [6] B21 D#0 D#63 AA24 VCCPVID AF4 VCCVID TESTHI4 AC24
H_ADSTB#1 R5 DBI#[0..3] PLL_VCCA AD20 AC20 TESTHI3
[6] H_ADSTB#1 ADSTB#1 [6] DBI#[0..3] H_DSTBP#[0..3] VCCA TESTHI3
H_ADSTB#0 L5 V6 VCCSENSE A5 AC21 TESTHI2
[6] H_ADSTB#0 ADSTB#0 MCERR# H_DSTBP#[0..3] [6] [28] VCCSENSE VCCSENSE TESTHI2
H_REQ#4 H3 DBI#0 E21 VCCIO_PLL AE23 AB22 TESTHI7
H_REQ#3 REQ#4 CPURST# DBI#1 DBI#0 VCCIOPLL TESTHI7
J3 REQ#3 RESET# AB25 CPURST# [6] G25 DBI#1 DSTBP#0 F21 H_DSTBP#0 PLL_VSSA AD22 VSSA TESTHI6 AA20 TESTHI6
H_REQ#2 J4 F4 H_RS#2 DBI#2 P26 J23 H_DSTBP#1 VSSSENSE A4 AF26 1 TP504
REQ#2 RS#2 DBI#2 DSTBP#1 [28] VSSSENSE VSSSENSE SKTOCC#
H_REQ#1 K5 G5 H_RS#1 DBI#3 V21 P23 H_DSTBP#2
H_REQ#0 REQ#1 RS#1 H_RS#0 DBI#3 DSTBP#2
J1 REQ#0 RS#0 F1 DSTBP#3 W23 H_DSTBP#3 AE21 RSVD TESTHI1 AA2 TESTHI1
AB1 AB2 H_RS#[0..2] H_DSTBN#0 E22 A22 AB23 CPUPWRGD_C
A#35 RSP# H_RS#[0..2] [6] DSTBN#0 RSVD PWRGOOD
H_REQ#[0..4] Y1 J6 H_TRDY# H_DSTBN#1 K22 A7 C3 H_PROCHOT#
[6] H_REQ#[0..4] A#34 TRDY# H_TRDY# [6] DSTBN#1 CPU_THERMDA RSVD PROCHOT#
W2 H_DSTBN#2 R22 B3 AB26 SLP#
A#33 DSTBN#2 CPU_THERMDC THRMDA SLP# SLP# [13]
V3 H_DSTBN#3 W22 C4
C A#32 DSTBN#3 THRMTRIP# THRMDC C
[20] THRMTRIP# A2 THRMTRIP#
H_DSTBN#[0..3] D4 ITP_TCK
[6] H_DSTBN#[0..3] WMT478/NWD_14 TCK
WMT478/NWD_14 CPU_VID5 AD3 C1 ITP_TDI
[28] CPU_VID5 RSVD TDI
AF25 D5 ITP_TDO
VIDPWRGD RSVD TDO ITP_TMS
[5] VIDPWRGD AD2 RSVD TMS F7
AF24 E6 ITP_TRST#
RSVD TRST#
WMT478/NWD_14
FSB SELECTION
BSEL1 BSEL0 FUNCTION
0 0 100MHz
0 1 133MHz
Placement : 3" (Maximum) From CPU 1 0 200MHz

CPU Temperature Monitor 1 1 RESERVED
+VCC_CORE
1
R33 R104 R103 R108 R111 R106 R105 R79 R37 R43 R86
62/NA 62 62 62 62 62 62 62 62 62 62
Mobile P4 533MHz impedance +3VS +5VS +5VS 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 R350
is 50 between 40~60 ohm. 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% Q35 1K/NA
DBR# 2N7002/NA 0402
2
1
CPUPERF# 1 2
G
+VCC_CORE R87 R74 R70 H_A20M# PRESCOTT [13]
CPU_THERMDA 10K 10K 10K H_IGNNE# 1%
BETWEEN 48 ohm~ 72ohm 0402 0402 0402 H_INTR CPUPWRGD_C D S
CPUPWRGD_N [6]
1
C67 +/- 1 Degree C 5% 5% 5% H_NMI
D
S
H_SMI#
2
2200P U8
B TESTHI0 R36 62 0402 1% 0402 SCL_THRM H_STPCLK# R349 B
1 2 2 D+ SCLK 8 SCL_THRM [20]
TESTHI1 R80 62 0402 1% CPU_THERMDC +/-20% SDA_THRM DPSLP#
2
1 2 3 D- SDATA 7 SDA_THRM [20] 1 2

TESTHI2 R61 1 2 62 0402 1% SLP#
TESTHI3 R58 1 2 62 0402 1% 1 6 H_INIT#
TESTHI4 R39 62 0402 1% +3VS VDD ALERT THERM_ADM# 0_DFS
1 2 5 GND THEPM 4 THERM_ADM# [20]
TESTHI5 R38 1 2 62 0402 1% 0402
1
TESTHI6 R57 1 2 62 0402 1% C66 LM86 5%

TESTHI7 R60 1 2 62 0402 1% 0.1U SO8
TESTHI8 R88 62 0402 1% 0402
TESTHI9 R84
1 2
62 0402 1% +80-20%
SMBus
2
1 2
TESTHI10 R85 1 2 62 0402 1% 16V address: 98H
by H8
GTL Reference CKT PLL SUPPLY FILTER CPU SIGNAL TERMINATION PLACE CLOSE TO CPU SOCKET PRECISION FSB COMPENSATION RESISTORS
+VCC_CORE R67 62 0402 1%

+VCC_CORE H_COMP0
1.5" MAX. 1 2
+VCC_CORE R89 62 0402 1%

R59 +VCC_CORE H_COMP1
1 2
1
H_GTLREF
1 2 COMP0/1
2
R118 R122 R110 R27 R23 R24 R77 R78 R76

1
R41 R62 R40 R121 R109 R107 39 75 150 62 62 62 62 62 62 Optimized 49.9 1%

1
100 R54 C48 C35 62 62 62 62 62 62 0603 0402 0402 0402 0402 0402 0402 0402 0402
0402 169 0402 0402 0402 0402 0402 0402 1% 1% 1% 1% 1% 1% 1% 1% 1%
1% 0603
1U
0402
220P
0402 1% 1% 1% 1% 1% 1% H_BPM#5
Compatible 61.9 1%
2
2
1
1% +80-20% 5% H_BPM#4 PLACE THESE INSIDE SOCKET CAVITY

2
6.3V 50V H_BPM#3

2
L21 L20 H_BPM#2

4.7UH 4.7UH H_BPM#1
2012 2012 THRMTRIP# H_BPM#0
C32 H_PROCHOT#
PLL_VCCA H_FERR# ITP_TDI
2
2 1
One 220PF for each GTL REF Pin ITP_TDO
CPUPWRGD_C ITP_TMS
10U
6.3V H_BR#0 ITP_TCK
A 1206 PLL_VSSA ITP_TRST# A
CPURST#
1
C29 R119 R102

2 1 VCCIO_PLL 27 680
0603 0402
1% 5%
10U
2
CLOSE TO CPU SOCKET 6.3V

1206
Title
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Prescott/Northwood (2/2) VCCPVID
1
+5V R28
1K
0402
FOR D/T CPU VID
1
1%
R2 VIDPWRGD
2
1K VIDPWRGD [4]
+5VS VCCPVID +5VS
D
0402
1% D Q3
2N7002
2
G S
1
1
S
R25
D
R21 150mA 10K
D
D
10 0402
0603 U3 5% D Q2
+VCC_CORE 2N7002
2
1 4 G S
IN PG
2
3 EN
S
2 5 +5VS
GND OUT
1
C25
1
0.1U MIC5248 C34
1
0402 SOT25 1U
+80-20% 0402 R1
2
16V +80-20% 1K
2
6.3V 0402
AC10
AC12
AC14
AC16
AC18
AD11
AD13
AD15
AD17
AD19
AA10
AA12
AA14
AA16
AA18
AB11
AB13
AB15
AB17
AB19
AE10
AE12
AE14
AE16
AE18
AE20
AF11
AF13
AF15
AF17
AF19
AF21
1%
AC8
AD7
AD9
AA8
AB7
AB9
AE6
AE8
C10
C12
C14
C16
C18
C20
D11
D13
D15
D17
D19
AF5
AF7
AF9
A10
A12
A14
A16
A18
A20
B11
B13
B15
B17
B19
E10
E12
E14
E16
E18
E20
F11
F13
F15
F17
F19
CPU_CORE_EN
C8
D7
D9
A8
B7
B9
E8
U6D
F9
2
CPU_CORE_EN [28]
D
N6 AE7
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS VSS D Q1
N3 VSS VSS AE24
N24 AE22 G S 2N7002
VSS VSS
N21 VSS VSS AE19
S
P5 VSS VSS AD14
P2 VSS VSS AD12
P25 VSS VSS AD10
P22 VSS VSS AD8
R26 VSS VSS AD4
R4 AD1 BOOTSELECT
R1
VSS VSS
AD23
BOOTSELECT [28] Place these caps at CPU in-side Place these caps at CPU south-side
VSS VSS
R23 VSS VSS AD21
T6 VSS VSS AE17
T3 AE15 +VCC_CORE +VCC_CORE
VSS VSS
T24 VSS VSS AE13
T21 VSS VSS AE11
U5 VSS VSS AE9
1
U2 AE26 OPTIMIZED/COMPACT# C47 C46 C61 C60 C82 C81 C80
VSS VSS
U25 AB20 10U 10U 10U 10U 10U/NA 10U/NA 10U/NA
VSS VSS
1
U22 AC17 1206 1206 1206 1206 1206 1206 1206
VSS VSS R32 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
2
V26 VSS VSS AC15
G21 AC13 0/NA
VSS VSS 0402
H26 VSS VSS AC11
H4 AC9 5% +VCC_CORE +VCC_CORE
VSS VSS
2
H1 VSS VSS AC7
H23 VSS VSS AC5
C C
J5 VSS VSS AC2
1
J2 VSS VSS AC25 C45 C54 C59 C36 C37
J25 AC22 10U 10U 10U 10U/NA 10U/NA
VSS VSS 1206 1206 1206 1206 1206
J22 VSS VSS AC19
6.3V 6.3V 6.3V 6.3V 6.3V
2
K6 VSS VSS AD18
K3 VSS VSS AD16
K24 VSS VSS AA4
K21 VSS VSS AA1
L26 VSS VSS AA23
L4 VSS VSS AA19
L1 VSS VSS AB18
L23 VSS VSS AB16
M5 VSS VSS AB14
M2 VSS VSS AB12
VSS AB10
M25 VSS VSS AB8
M22 VSS VSS AB6
E11 VSS VSS AB3
E9 AB24 MTG19 MTG5 MTG6
VSS VSS ID3.0/OD7.0 ID3.0/OD7.0 ID3.0/OD7.0
E26 VSS VSS AB21
E7 V4 MTG118-RD276-30X12 MTG118-RD276-30X12 MTG118-RD276-30X12
E4
VSS
VSS
VSS
VSS V1 MTG118_RD30X12 MTG118_RD30X12 MTG118_RD30X12 For MDC
E1 VSS VSS V23
3
2
1
3
2
1
3
2
1
E23 W6 13 13 13 MTG2 MTG3
VSS VSS MTG/ID2.1/OD5.0 MTG/ID2.1/OD5.0
E19 VSS VSS W3 4 12 4 12 4 12
F18 VSS VSS W24 5 11 5 11 5 11
F16 VSS VSS W21 6 10 6 10 6 10
5
4
3
2
1
5
4
3
2
1
F14 VSS VSS Y5
F12 VSS VSS Y2
7
8
9
7
8
9
7
8
9
F10 VSS VSS Y25
F8 VSS VSS Y22
F5 VSS VSS AA17
F2 VSS VSS AA15 GND_45
F25 AA11 MTG7 MTG9
VSS VSS ID3.0/OD7.0 MTG8 ID3.0/OD7.0
F22 AA9
10
10
VSS VSS MTG118-RD276-30X12 ID3.0/OD7.0 MTG118-RD276-30X12
6
7
8
9
6
7
8
9
G6 VSS VSS AA26
G3 AA7 MTG118_RD30X12 MTG118_RD30X12
VSS VSS
G24 VSS
3
2
1
3
2
1
3
2
1
13 13
C5 VSS
C2 VSS
C25 VSS
C22 VSS
C19 VSS
D18 VSS
D16 VSS
D14 VSS
D12 VSS
D10 VSS
D8 VSS
D6 VSS
D3 VSS
D24 VSS
D21 VSS
D20 VSS
E17 VSS
E15 VSS
E13 VSS
A3 VSS
A24 VSS
A21 VSS
A19 VSS
B18 VSS
B16 VSS
B12 VSS
B10 VSS
B26 VSS
B8 VSS
B4 VSS
B23 VSS
B20 VSS
C17 VSS
C15 VSS
C13 VSS
C11 VSS
C9 VSS
C7 VSS
AF18VSS
AF16VSS
AF14VSS
AF12VSS
AF10VSS
AF8 VSS
AF6 VSS
AF1 VSS
AF20VSS
A17 VSS
A15 VSS
A13 VSS
A11 VSS
A9 VSS
A26 VSS
AA13VSS
B14 VSS
4 12 4 12 4 12
5 11 5 11 5 11
B 6 10 6 10 6 10 B
WMT478/NWD_14
7
8
9
7
8
9
7
8
9
For CPU
MTG10 MTG11 MTG12 MTG13
MTG14 MTG15 ID3.2/OD8.0/IN4.5
ID3.2/OD8.0/IN4.5
ID3.2/OD8.0 ID3.2/OD8.0
ID3.0/OD7.0 ID3.0/OD7.0
MTG17 MTG20
3
2
1
3
2
1
1
ID3.0/OD5.0 ID3.0/OD5.0
+VCC_CORE 4 12 4 12
5 11 5 11
6 10 6 10
1
1
1
C351 C352 C353 C354 C355 C356 C357 C358 C359 C360
7
8
9
7
8
9
0.1U/NA 0.1U/NA 0.1U/NA 0.1U/NA 0.1U/NA 0.1U/NA 0.1U/NA 0.1U/NA 0.1U/NA 0.1U/NA
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
+80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20%
2
2
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
MTG18
ID3.0/OD7.0
+VCC_CORE
For 2nd FAN
3
2
1
FD1 FD2 FD4 FD3
4 12 FIDUCIAL-MARK FIDUCIAL-MARKFIDUCIAL-MARK FIDUCIAL-MARK
1
C361 C362 C363 C364 C365 C366 5 11 MTG4 MTG1

0.1U/NA 0.1U/NA 0.1U/NA 0.1U/NA 0.1U/NA 0.1U/NA 6 10 MTG/ID2.1/OD5.0 MTG/ID2.1/OD5.0
0402 0402 0402 0402 0402 0402
5
4
3
2
1
5
4
3
2
1
+80-20% +80-20% +80-20% +80-20% +80-20% +80-20%
2
1
16V 16V 16V 16V 16V 16V
7
8
9
R05
FD501 FD502 FD504 FD503

+VCC_CORE FIDUCIAL-MARK FIDUCIAL-MARKFIDUCIAL-MARK FIDUCIAL-MARK
10
10
6
7
8
9
6
7
8
9
1
C540 C542
1
A C541 C543 C544 C545 C546 C547 C548 C549 A
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
+80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20%
2
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
R06
Title
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
+1.8VS
L54 120Z/100M 1608 R233 56 0603 1%
SIS M661FX (1/2) 1 2 1 2 ZCMP_N
1
C215 C198
HD#[0..63] 10U/NA 0.1U
U12A HD#[0..63] [4]
1206 R238 56
0402 0603 1%
HCLK_SISM661FX HD#0 10V +80-20%1 2 ZCMP_P
2
[11] HCLK_SISM661FX AJ31 CPUCLK HD0# P35
HCLK_SISM661FX# AJ33 N35 HD#1 16V
[11] HCLK_SISM661FX# CPURST# CPUCLK# HD1# HD#2
[4] CPURST# B23 CPURST# HD2# N34
CPUPWRGD_N F22 L34 HD#3 +1.8VS
[4] CPUPWRGD_N CPUPWRGD HD3# HD#4
HD4# P33 U12C
H_ADSTB#0 AA33 P32 HD#5
[4] H_ADSTB#0 H_ADSTB#1 HASTB0# HD5# HD#6 ZCMP_P FC_VBD7
[4] H_ADSTB#1 AG31 HASTB1# HD6# M33 AD4 ZCOMP_P AAD0 Y5
1
M35 HD#7 ZCMP_N AD5 W4 FC_VBD6
HD7# ZCOMP_N AAD1
1
L35 HD#8 R234 C202 ZSTB0 AJ2 V2 FC_VBD5
HD8# HD#9 150 [12] ZSTB0 ZSTB1 ZSTB0 AAD2 FC_VBD4
K35 0.1U [12] ZSTB1 AE3 W6
HD9# HD#10 0402 0402 ZSTB0# ZSTB1 AAD3 FC_VBD3
HD10# L33 [12] ZSTB0# AJ3 ZSTB0# AAD4 V4
HD#11 1% +80-20% ZSTB1# FC_VBD2
2
D HD11# L31 [12] ZSTB1# AF2 ZSTB1# AAD5 U2 D
HA#[3..31] HD#12 16V ZVREF FC_VBD1
2
[4] HA#[3..31] HD12# K33 AK4 ZVREF AAD6 V5
N33 HD#13 ZDREQ AK5 U4 FC_VBD0 FC_VAD[0..11]
HD13# [12] ZDREQ ZDREQ AAD7 FC_VAD[0..11] [8]
1
HA#3 AA34 K32 HD#14 ZUREQ AL4 R2 FC_VAD6
HA3# HD14# [12] ZUREQ ZUREQ AAD8
1
HA#4 Y32 J35 HD#15 R237 C205 ZCLK0 AL6 T4 FC_VAD5 FC_VBD[0..11]
HA#5 HA4# HD15# HD#16 49.9 [11] ZCLK0 ZAD[0..16] ZCLK AAD9 FC_VAD4 FC_VBD[0..11] [8]
AA31 H33 0.1U [12] ZAD[0..16] R3
HA#6 HA5# HD16# HD#17 0402 0402 AAD10 FC_VAD7
AA35 HA6# HD17# G35 AAD11 T5
HA#7 HD#18 1% +80-20% ZAD0 FC_VAD8
2
AB33 HA7# HD18# J31 AH5 ZAD0 AAD12 P2
HA#8 HD#19 16V ZAD1 FC_VAD9
2
AB32 HA8# HD19# J33 AK2 ZAD1 AAD13 R4
HA#9 HD#20 ZAD2 FC_VAD10
HA#10
AB35 HA9# HD20# F35
HD#21
50 ohm 1% ZAD3
AJ4 ZAD2 AAD14 N2
FC_VAD11
AC34 HA10# HD21# H35 AJ6 ZAD3 AAD15 R6
HA#11 AC31 G34 HD#22 ZAD4 AH2 L3 VADE
HA#12 HA11# HD22# HD#23 ZAD5 ZAD4 AAD16 VAVSYNC VADE [8]
AD35 HA12# HD23# J34 AH4 ZAD5 AAD17 L4 VAVSYNC [8]
HA#13 AC35 F32 HD#24 ZAD6 AG3 K2 VAHSYNC
HA#14 HA13# HD24# HD#25 ZAD7 ZAD6 AAD18 FC_VBD11 VAHSYNC [8]
AD33 HA14# HD25# E35 AG6 ZAD7 AAD19 L6
HA#15 AD32 D34 HD#26 ZAD8 AF4 J2 FC_VBD10
HA#16 HA15# HD26# HD#27 ZAD9 ZAD8 AAD20 FC_VBD8
AC33 HA16# HD27# E33 AG2 ZAD9 AAD21 J3
HA#17 AG34 F33 HD#28 ZAD10 AF5 K4 FC_VBD9
HA#18 HA17# HD28# HD#29 ZAD11 ZAD10 AAD22 FC_VAD1
AF33 HA18# HD29# C35 AG4 ZAD11 AAD23 J4
HA#19 AE34 G31 HD#30 ZAD12 AD2 J6 FC_VAD0
HA#20 HA19# HD30# HD#31 ZAD13 ZAD12 AAD24 FC_VAD2
AE33 HA20# HD31# D35 AE6 ZAD13 AAD25 H4
HA#21 AE35 D33 HD#32 ZAD14 AE2 G3 FC_VAD3
HA#22 HA21# HD32# HD#33 CRT_RED ZAD15 ZAD14 AAD26 VBDE
AF35 HA22# HD33# D31 AE4 ZAD15 AAD27 H5 VBDE [8]
HA#23 AH35 E31 HD#34 CRT_GREEN ZAD16 AL3 F2 VBCTL0
HA#24 HA23# HD34# HD#35 CRT_BLUE ZAD16 AAD28 VBCTL1 VBCTL0 [8]
AE31 HA24# HD35# B34 AAD29 G4 VBCTL1 [8]
HA#25 AG35 D32 HD#36 E2 VBHSYNC
HA#26 HA25# HD36# HD#37 TMODE0 AAD30 VBVSYNC VBHSYNC [8]
AH32 HA26# HD37# B35 TP513 1 B10 TESTMODE0 AAD31 G6 VBVSYNC [8]
HA#27 AJ34 B33 HD#38 1 TMODE1 B9
HA27# HD38# TP515 TESTMODE1
4
3
2
1
HA#28 AF32 C33 HD#39 1 TMODE2 C9 U6
HA#29 HA28# HD39# HD#40 TP512 TRAP0 TESTMODE2 AC/BE0#
AJ35 HA29# HD40# D29 RP7 TP514 1 D10 TRAP0 AC/BE1# P4
HA#30 AG33 C32 HD#41 75*4 R155 1 TRAP1 F9 M5
HA#31 HA30# HD41# HD#42 1206 TP539 ENTEST TRAP1 AC/BE2#
H_REQ#[0..4] AH33 B31 1 2 D9 K5
[4] H_REQ#[0..4] HA31# HD42# HD#43 DLLEN# ENTEST AC/BE3#
HD43# B30 1 E10 DLLEN# AD_STB0# U3
H_REQ#0 HD#44 TP521 AUXOK
Y35 HREQ0# HD44# C30 [13] AUXOK AN3 AUXOK AD_STB1# H2
H_REQ#1 W33 B29 HD#45 4.7K NBRST# AN2 C2
H_REQ#2 HREQ1# HD45# HD#46 0402 [12] NBRST# PWROK PCIRST# SB_STB
5
6
7
8
W31 HREQ2# HD46# F28 [13,20] PWROK AM4 PWROK SB_STB# D3
H_REQ#3 Y33 E29 HD#47 5%
H_RS#[0..2] H_REQ#4 HREQ3# HD47# HD#48
[4] H_RS#[0..2] W35 HREQ4# HD48# B28 SBA0 B3 1 2 VBCLK [8]
C28 HD#49 CRT_HSYNC A11 E6
H_RS#0 HD49# HD#50 [10] CRT_HSYNC CRT_BLUE NC_0 SBA1
U35 D28 A13 B2 R182 10 0402 5%
H_RS#1 RS0# HD50# HD#51 [10] CRT_BLUE REFCLK0 NC_1 SBA2
DBI#[0..3] T32 B27 A15 E4
[4] DBI#[0..3] H_RS#2 RS1# HD51# HD#52 [11] REFCLK0 NC_2 SBA3
R33 RS2# HD52# E27 TP511 1 A9 NC_3 SBA4 F5
C DBI#0 HD#53 C
R31 DBI0# HD53# D26 1 AL33 NC_4 SBA5 D2
HD#54 TP518
HD54# D27 TP519 1 AM34 NC_5 SBA6 F4
B26 HD#55 1 AM5 E3
DBI#1 HD55# HD#56 TP524 NC_6 SBA7
E34 DBI1# HD56# B25 1 AP1 NC_7
DBI#2 HD#57 TP530 CRT_VSYNC
B32 DBI2# HD57# C26 [10] CRT_VSYNC B11 NC_8
DBI#3 F26 F24 HD#58 CRT_RED B12 L2
DBI3# HD58# HD#59 [10] CRT_RED CRT_GREEN NC_9 ADEVSEL#
HD59# D25 [10] CRT_GREEN B13 NC_10 ASTOP# M2
H_ADS# V35 D23 HD#60 ECLKAVDD B14 E8
[4] H_ADS# H_BNR# ADS# HD60# HD#61 DCLKAVDD NC_11 AGNT#
[4] H_BNR# V33 BNR# HD61# B24 B15 NC_12 ADBIL D6
H_DRDY# W34 E23 HD#62 B16 C6
[4] H_DRDY# H_TRDY# DRDY# HD62# HD#63 H_DSTBP#[0..3] +1.8VS PCI_INTA# NC_13 AREQ# VBCAD [8]
[4] H_TRDY# V32 HTRDY# HD63# C24 H_DSTBP#[0..3] [4] [12] PCI_INTA# C10 NC_14 AFRAME# N6
H_BPRI# R34 CRT_DDDA C11 N4
[4] H_BPRI# H_BR#0 BPRI# H_DSTBP#0 [10] CRT_DDDA DACAVSS NC_15 ATRDY#
+VCC_CORE U31 M32 +VCC_CORE C12 M4
[4] H_BR#0 H_LOCK# BREQ0# HDSTBP0# H_DSTBP#1 NC_16 AIRDY#
[4] H_LOCK# T33 HLOCK# HDSTBP1# H32 C13 NC_17 ASERR# P5
H_HIT# U34 D30 H_DSTBP#2 H_DSTBN#[0..3] ECLKAVSS C14 N3
[4] H_HIT# H_HITM# HIT# HDSTBP2# H_DSTBP#3 H_DSTBN#[0..3] [4] DCLKAVSS NC_18 APAR
R35 E25 C15 D7 +1.8VS
[4] H_HITM# HITM# HDSTBP3# NC_19 RBF# VBHCLK [8]
1
H_DBSY# U33 N31 H_DSTBN#0 C16 D8
[4] H_DBSY# DBSY# HDSTBN0# NC_20 AGPCLK AGP_CLK [11]
1
1
H_DEFER# T35 G33 H_DSTBN#1 C99 R124 LSYNC D11 C4
[4] H_DEFER# DEFER# HDSTBN1# [10] LCD_ID2 NC_21 ADBIL/PIPE#
1
R129 F30 H_DSTBN#2 0.01U +3VS CSYNC D12 B4 R222 10 0402 5%
HDSTBN2# 100 [10] LCD_ID1 NC_22 WBF#
1
150/NA C97 D24 H_DSTBN#3 0402 DACAVDD D13 T2 AGP_ADSTB0 1 2 R229

0402 HDSTBN3# 10% 0402 NC_23 AD_STB0 VAGCLK [8] 0
R132 14 0603 1% HPCOMP AGP_ADSTB1
2
0.01U/NA D22 D14 G2 1 2 VBGCLK [8]
HCOMP_P 1% NC_24 AD_STB1
1
1% 0402 HNCOMP HVREF 50V VRSET 0402
2
+VCC_CORE 1 2 C22 HCOMP_N HVREF0 AA26 D15 NC_25
10% HCOMPVREF_N R142 R199 10 0402 5% 5%
2
B22 HCOMPVREF_N HVREF1 W26 D16 NC_26
1
50V 4.7K AGPCOMP_P
2
HVREF2 U26 1 D4 NC_27 AGPCOMP_P W2
TP522
1
1
C91 R26 C103 C88 R137 0402 1 D5 Y2 AGPCOMP_N
R125 R130 HVREF3 5% TP523 NC_28 AGPCOMP_N AGP_REF
0.01U/NA L20 0.1U 0.01U 1 E11 W3
HVREF4 169 TP516 NC_29 AGPVREF
1
75/NA 0402 100 0402 0402
2
0603 E12 NC_30 GC_DET# C7
0402 10% 0402 SISM661FX +80-20% 10% CRT_DDCK R225
2
2
1% [10] CRT_DDCK E13 NC_31 ST0 B6
1% 50V 1% BGA619_187_24_1MM 16V 50V VVBWN 0
2
E14 NC_32 ST1 F7
VCOMP 0402
2
R06 R0A DDR_MD[0..63]

E15 NC_33 ST2 B5
5%
DDR_MD[0..63] [9] E16 NC_34 IVDD39 T24
U12B
2
DDR_MD0
R06 TP520 1 F11 NC_35 VDDM49 AB25
AL22 SDRCLKI MD0 AN35 TP517 1 F13 NC_36 VDDM50 AE14
FWDSDCLKO R223 1 2 22 0402 5% AL21 AP36 DDR_MD1 F15 AE15
[11] FWDSDCLKO FWDSDCLKO MD1 DDR_MD2 NC_37 VDDM51 +2.5V_DDR
MD2 AK33 TP529 1 AT14 NC_38 PVDD N20
1
C189 DDR_CS0# AM17 AM33 DDR_MD3

[9] DDR_CS0# DDR_CS1# CS0# MD3 DDR_MD4
10P AL16 AN34 BGA619_187_24_1MM For 301LV only
[9] DDR_CS1# DDR_CS2# CS1# MD4 DDR_MD5
0402 AN17 AK32 SISM661FX
5% [9] DDR_CS2# DDR_CS3# CS2# MD5 DDR_MD6
2
[9] DDR_CS3# AR17 CS3# MD6 AR34

50V 1 DDR_CS4# DDR_MD7
TP525 AP18 CS4# MD7 AN33 AGPCOMP_N connect to VDDQ
1 DDR_CS5# AR18 CS5# MD8 AM32 DDR_MD8
B TP526 DDR_RAS# DDR_MD9 B
[9] DDR_RAS# DDR_WE#
AL17 SRAS# MD9 AL31
DDR_MD10
AGPCOMP_P connect to GND
[9] DDR_WE# AN19 SWE# MD10 AR31
DDR_MA[0..12] DDR_CAS# DDR_MD11
[9] DDR_MA[0..12] [9] DDR_CAS# AR19 SCAS# MD11 AL30
DDR_MD12
AGP_REF 0.5 x 1.8V
MD12 AN32
DDR_MA0 AR23 AR33 DDR_MD13
DDR_MA1 MA0 MD13 DDR_MD14
AN23 MA1 MD14 AN31
DDR_MA2 AN22 AM31 DDR_MD15 +3VS
DDR_MA3 MA2 MD15 DDR_MD16 L43 120Z/100M 1608
DDR_MA4
AM23 MA3 MD16 AP30
DDR_MD17 DCLKAVDD
Close SISM661FX
AL23 MA4 MD17 AR30 1 2
DDR_MA5 AL26 AM29 DDR_MD18
MA5 MD18
1
1
DDR_MA6 AN26 AL27 DDR_MD19 C90 C105 +1.8VS
DDR_MA7 MA6 MD19 DDR_MD20 10U/NA
AN27 AN30 0.1U
DDR_MA8 MA7 MD20 DDR_MD21 1206 0402
AR27 MA8 MD21 AN29
1
DDR_MA9 DDR_MD22 10V +80-20%
2
AR28 AL28 JL28

DDR_MA10 MA9 MD22 DDR_MD23 16V DCLKAVSS R231
AP22 MA10 MD23 AN28 1 2
DDR_BA0 AN18 AP26 DDR_MD24 200
[9] DDR_BA0 DDR_BA1 MA11 MD24 DDR_MD25 0603
[9] DDR_BA1 AR22 MA12 MD25 AN25 JP_NET20
DDR_MA11 AP28 AR24 DDR_MD26 1%
DDR_DQM[0..7] DDR_MA12 MA13 MD26 DDR_MD27
2
[9] DDR_DQM[0..7] AM27 MA14 MD27 AL24
AL25 DDR_MD28 AGP_REF
DDR_DQM0 MD28 DDR_MD29
AR35 DQM0 MD29 AR26
1
+2.5V_DDR DDR_DQM1 AR32 AM25 DDR_MD30 +3VS
DQM1 MD30
1
DDR_DQM2 AL29 AN24 DDR_MD31 L42 120Z/100M 1608 R228 C192
DDR_DQM3 DQM2 MD31 DDR_MD32 ECLKAVDD 200
AP24 AN21 1 2 0.1U
DDR_DQM4 DQM3 MD32 DDR_MD33 0603 0402
AL20 DQM4 MD33 AP20
1
DDR_DQM5 DDR_MD34 C96 1% +80-20%
2
AP16 DQM5 MD34 AN20 C102
R230 C191 DDR_DQM6 DDR_MD35 10U/NA 16V
2
AN12 AL18 0.1U
DQM6 MD35
1
150 0.01U DDR_DQS[0..7] DDR_DQM7 AN10 AM21 DDR_MD36 1206 0402

0402 [9] DDR_DQS[0..7] DQM7 MD36 DDR_MD37 +80-20%
0402 10V
2
AR21 JL29
1% 10% DDR_DQS0 MD37 DDR_MD38 16V ECLKAVSS
AP34 DQS0 MD38 AL19 1 2
50V DDRVREFA DDR_DQS1 DDR_MD39
2
AP32 DQS1 MD39 AM19

DDR_DQS2 AR29 AL15 DDR_MD40 JP_NET20
DQS2 MD40
1
C193 DDR_DQS3 AR25 AL14 DDR_MD41

R232 DDR_DQS4 DQS3 MD41 DDR_MD42
0.01U AR20 AN15
150 0402 DDR_DQS5 DQS4 MD42 DDR_MD43 C106
AR16 DQS5 MD43 AR15
0402 10% DDR_DQS6 DDR_MD44 VVBWN
2
AR13 DQS6 MD44 AN16 1 2

1% 50V DDR_DQS7 AR10 AM15 DDR_MD45
DQS7 MD45 DDR_MD46 0.1U
2
MD46 AN14
DDR_CKE0 AP4 AL13 DDR_MD47 0402
[9] DDR_CKE0 DDR_CKE1 CKE0 MD47 DDR_MD48
AT3 AM13 16V
[9] DDR_CKE1 DDR_CKE2 CKE1 MD48 DDR_MD49
AR3 AL12 +80-20%
[9] DDR_CKE2 DDR_CKE3 CKE2 MD49 DDR_MD50 C104
A +2.5V_DDR AP3 AL11 A
[9] DDR_CKE3 CKE3 MD50
1 DDR_CKE4 AR2 CKE4 MD51 AR12 DDR_MD51 VCOMP 1 2
TP527
TP528 1 DDR_CKE5 AN4 CKE5 MD52 AP14 DDR_MD52
AR14 DDR_MD53 0.1U +1.8VS
MD53
1
S3AUXSW# AP2 AN13 DDR_MD54 0402

[20] S3AUXSW# DDRCOMN S3AUXSW# MD54 DDR_MD55
R224 C184 AP8 AP12 16V L44 120Z/100M
DDRCOMP_N MD55
1
150 0.01U 1 2 DDRCOMP AR8 AL10 DDR_MD56 DACAVDD +80-20% 1 2

0402 0402 +2.5V_DDR DDRVREFA DDRCOMP_P MD56 DDR_MD57
AF16 DDRVREFA MD57 AR11
1% 10% R236 DDRVREFB AF23 AM9 DDR_MD58 1608
DDRVREFB MD58
1
50V DDRVREFB 40.2 DDR_MD59 C116 C100

2
MD59 AR9 C110

0402 AM11 DDR_MD60 0.1U 1U 10U/NA
MD60
1
C183 1% AN11 DDR_MD61 0402 0402 1206

R211 R235 MD61 DDR_MD62 16V +80-20% 10V R131
40ohm 1%
2
0.01U AP10 JL30

150 0402 MD62 DDR_MD63 DACAVSS +80-20% 6.3V 1 VRSET
R239
40ohm 1% MD63 AN9 2 2 1
0402 10% 40.2 Title
2
1% 50V +3V S3AUXSW# 0402 SISM661FX

1 2
1% BGA619_187_24_1MM
JP_NET20
130
SIS M661FX (1/2)
2
0402 Size Document Rev

10K 1% R06
0402 Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SIS M661FX (2/2)
AM10
AM12
AM14
AM16
AM18
AM20
AM22
AM24
AM26
AM28
AM30
AG32
AG36
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC32
AC36
AD34
AH34
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AA32
AA36
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB34
AE32
AE36
AP11
AP13
AP15
AP17
AP19
AP21
AP23
AP25
AP27
AP29
AP31
AP33
AP35
AF34
AT10
AT12
AT16
AT18
AT20
AT22
AT24
AT26
AT28
AT30
AT32
AT34
AL32
AJ32
AG5
M34
AE5
AP9
G32
G36
U12D
AT8
C23
C25
C27
C31
C34
C36
H34
N32
N36
A22
A24
A26
A28
A30
A32
A34
AL5
E22
E24
E26
E28
E30
E32
E36
K34
P14
P15
P16
AJ5
F34
L32
L36
J32
J36
M3
G1
G5
C1
C3
C5
H3
N1
N5
A3
A5
E1
E5
E7
E9
K3
F3
L1
L5
J1
J5
SISM661FX
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
BGA619_187_24_1MM
+3VS
R240 0_DFS 0402
1 2 Z1XAVDD Z4XAVDD AL2
Z1XAVDD Z4XAVDD
AN1 Z1XAVDD AGPVSSREF Y4
1
C207
0.1U C4XAVDD AK35 AL1 Z4XAVSS
0402 C1XAVDD C4XAVDD Z4XAVSS Z1XAVSS
D JL27 AK34 AM2 D
+80-20% Z1XAVSS +3V C1XAVDD Z1XAVSS
1 2 2
16V A4XAVDD A7 AJ36 C4XAVSS
A1XAVDD A4XAVDD C4XAVSS C1XAVSS
JP_NET20 B8 A1XAVDD C1XAVSS AL36
AC12 B7 A4XAVSS
AUX3.3 A4XAVSS A1XAVSS
+1.8V AB12 AUX1.8 A1XAVSS C8
+3VS
L55 120Z/100M 1608 DDRAVDD AM35 AN36 DDRAVSS
Z4XAVDD +3VS DLLAVDD DDRAVDD DDRAVSS DLLAVSS
1 2 AL35 DLLAVDD DLLAVSS AL34
1
C211 C204 M17 C29

10U/NA VDD3.3_0 VSS_229
0.1U N17 Y34
1206 0402 VDD3.3_1 VSS_228
L17 VDD3.3_2 VSS_227 Y3
10V +80-20%
2
JL2 Y23
16V Z4XAVSS +1.8VS VSS_226
1 2 Y12 VDDZ_12 VSS_225 Y22
Y11 VDDZ_11 VSS_224 Y21
JP_NET20 W12 VDDZ_10 VSS_223 Y20
W11 VDDZ_9 VSS_222 Y19
+VCC_CORE AM3 Y18
+3VS VDDZ_8 VSS_221
AK3 VDDZ_7 VSS_220 Y17
R161 0_DFS 0402 AJ1 Y16
DLLAVDD VDDZ_6 VSS_219
1 2 AH3 VDDZ_5 VSS_218 Y15
AG1 VDDZ_4 VSS_217 Y14
1
C145 AF3 VDDZ_3 VSS_216 W5

0.1U AE1 W36
0402 VDDZ_2 VSS_215
JL3 AD3 W32
+80-20% DLLAVSS VDDZ_1 VSS_214
2
1 2 AA12 VDDZ_0 VSS_213 W23

16V M20 W22
VTT_47 VSS_212
JP_NET20 Y25 VTT_46 VSS_211 W21
W25 VTT_45 VSS_210 W20
V25 VTT_44 VSS_209 W19
U25 VTT_43 VSS_208 W18
+3VS T25 W17
R171 0_DFS 0402 VTT_42 VSS_207
SiS M661FX
R25 VTT_41 VSS_206 W16
1 2 DDRAVDD M26 W15
VTT_40 VSS_205
M25 VTT_39 VSS_204 W14
1
C152 M24 VTT_38 VSS_203 W1

0.1U M23 V34
0402 VTT_37 VSS_202
M22 VTT_36 VSS_201 V3
+80-20%
2
JL4 M21 V23

16V DDRAVSS VTT_35 VSS_200
1 2 M19 VTT_34 VSS_199 V22
C C
M18 VTT_33 VSS_198 V21
JP_NET20 L26 VTT_32 VSS_197 V20
L25 VTT_31 VSS_196 V19
F21 VTT_30 VSS_195 V18
+3VS F20 V17
R157 0_DFS 0402 VTT_29 VSS_194
F19 VTT_28 VSS_193 V16
1 2 A1XAVDD F18 V15
VTT_27 VSS_192
F17 VTT_26 VSS_191 V14
1
C141 E21 VTT_25 VSS_190 U5

0.1U E20 U36
0402 VTT_24 VSS_189
E19 VTT_23 VSS_188 U32
+80-20%
2
JL5 E18 U23

16V A1XAVSS VTT_22 VSS_187
1 2 E17 VTT_21 VSS_186 U22
D21 VTT_20 VSS_185 U21
JP_NET20 D20 VTT_19 VSS_184 U20
D19 VTT_18 VSS_183 U19
D18 VTT_17 VSS_182 U18
+3VS D17 U17
R170 0_DFS 0402 VTT_16 VSS_181
C21 VTT_15 VSS_180 U16
1 2 A4XAVDD C20 U15
VTT_14 VSS_179
C19 VTT_13 VSS_178 U14
1
C149 C18 VTT_12 VSS_177 U1

0.1U C17 T34
0402 VTT_11 VSS_176
B21 VTT_10 VSS_175 T3
+80-20%
2
JL6 B20 T23

16V A4XAVSS VTT_9 VSS_174
1 2 B19 VTT_8 VSS_173 T22
B18 VTT_7 VSS_172 T21
JP_NET20 B17 VTT_6 VSS_171 T20
AA25 VTT_5 VSS_170 T19
A21 VTT_4 VSS_169 T18
+3VS A20 T17
R158 0_DFS 0402 VTT_3 VSS_168
A19 VTT_2 VSS_167 T16
1 2 C1XAVDD A18 T15
VTT_1 VSS_166
A17 VTT_0 VSS_165 T14
1
C135 P25 VTT_49

0.1U N25
0402 VTT_48
AE12VDDM_10
AE13VDDM_11
AE16VDDM_12
AE17VDDM_13
AE18VDDM_14
AE19VDDM_15
AE20VDDM_16
AE21VDDM_17
AE22VDDM_18
AE23VDDM_19
AE24VDDM_20
AE25VDDM_21
AE26VDDM_22
AF11VDDM_23
AF12VDDM_24
AF25VDDM_25
AF26VDDM_26
AL7 VDDM_27
AL8 VDDM_28
AL9 VDDM_29
AM6 VDDM_30
AM7 VDDM_31
AM8 VDDM_32
AN5 VDDM_33
AN6 VDDM_34
AN7 VDDM_35
AN8 VDDM_36
AP5 VDDM_37
AP6 VDDM_38
AP7 VDDM_39
AR4 VDDM_40
AR5 VDDM_41
AR6 VDDM_42
AR7 VDDM_43
AT4 VDDM_44
AT5 VDDM_45
AT6 VDDM_46
AT7 VDDM_47
AB24VDDM_48
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_24
VDDQ_25
VDDQ_26
VDDQ_27
VDDQ_28
VDDQ_29
VDDQ_30
VDDQ_31
VDDQ_32
VDDQ_33
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
N13 IVDD_10
N14 IVDD_11
N15 IVDD_12
N16 IVDD_13
N18 IVDD_14
N19 IVDD_15
N21 IVDD_16
N22 IVDD_17
N23 IVDD_18
N24 IVDD_19
P13 IVDD_20
P24 IVDD_21
R13 IVDD_22
R24 IVDD_23
T13 IVDD_24
U13 IVDD_25
U24 IVDD_26
V13 IVDD_27
V24 IVDD_28
W13 IVDD_29
W24 IVDD_30
Y13 IVDD_31
Y24 IVDD_32
AB13IVDD_33
AC13VDDM_0
AC25VDDM_1
AD12VDDM_2
AD14VDDM_3
AD16VDDM_4
AD18VDDM_5
AD20VDDM_6
AD22VDDM_7
AD25VDDM_8
AE11VDDM_9
VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
+80-20%
2
AA13IVDD_0
AA24IVDD_1
AC24IVDD_2
AD13IVDD_3
AD15IVDD_4
AD17IVDD_5
AD19IVDD_6
AD21IVDD_7
AD23IVDD_8
AD24IVDD_9
JL7
1 2 16V C1XAVSS
JP_NET20
AC1
AC2
AC3
AC4
AC5
AC6
M11
M12
M13
M14
M15
M16
AA1
AA2
AA3
AA4
AA5
AA6
AB1
AB2
AB3
AB4
AB5
AB6
N11
N12
R12
U12
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R32
R36
V12
P12
P17
P18
P19
P20
P21
P22
P23
P34
T12
L11
L12
L13
B B
R1
R5
P3
+2.5V_DDR
+3VS
R156 0_DFS 0402
1 2 C4XAVDD
1
C133
0.1U
0402 +1.8VS +1.8VS
+80-20%
2
JL8
1 2 16V C4XAVSS
JP_NET20
+2.5V_DDR
+1.8VS +VCC_CORE +3VS +3V +1.8V
1
C206 C200 C501 C502

1
1
0.1U 0.1U 0.1U 0.1U C213 C210 C503 C504 C505 C506 C101 C98 C507 C508 C509 C510 C511 C512 C95 C199 C513 C514 C212
0402 0402 0402 0402 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U/NA 0.1U 1U 0.1U 0.1U 0.1U 0.1U
+80-20% +80-20% +80-20% +80-20% 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
2
16V 16V 16V 16V +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20%
2
2
R06 16V 16V 16V 16V 16V 16V 6.3V 16V 16V 16V 16V 16V 16V 16V 6.3V 16V 16V 16V 16V
R06 R06
R06
+2.5V_DDR +1.8VS +VCC_CORE
1
C515 C516 C517 C518 C519 C520 C521 C522 C523 C524 C525 C526 C527 C528 C529 C530 C531 C532 C533 C534
0.1U 0.1U 0.1U 0.1U/NA 0.1U/NA 0.1U 0.1U 0.1U 0.1U/NA 0.1U 0.1U/NA 0.1U 0.1U 0.1U/NA 0.1U 0.1U/NA 0.1U 0.1U 0.1U 0.1U/NA
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
+80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20%
2
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
A
+1.8VS
R06 R06 A
R06
1
C550 C551 C552

0.1U 0.1U 0.1U/NA
0402 0402 0402
+80-20% +80-20% +80-20%
2
16V 16V 16V

R06
Title
SIS M661FX (2/2)
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
TV/LVDS ENCODER (SIS301LV)

D D
14.318MHZ_TV +5VS
[11] 14.318MHZ_TV VBCLK
[6] VBCLK VBCTL1
[6] VBCTL1
VBDE
[6] VBDE
3
Q6
TV_LUMA ENABLK 2 R1
TV_LUMA [10]
TV_CRMA
TV_CRMA [10]
+3VS TV_COMP DTC144TKA
TV_COMP [10]
L35 120Z/100M 1608
31
4
3
2
1
1 2 +TVPLL_VCC Q7
RP4 ENBKL_MASK 2 R1
[13] ENBKL_MASK
1
C74 75*4
0.1U 1206 DTC144TKA
0402 ENPBLT
1
+80-20% ENPBLT [10]
1
1 2 JL9 16V TVPLL_GND
R93
5
6
7
8
JP_NET20 TVPLL_GND TP510 10K
0402
5%
+1.8VS
2
1
1 +VDDV
C76 C62 0.1U 0402 16V +80-20%
MOD_XOUT
0.1U 1 2
C 0402 +3VS C
+80-20% ENBKL_MASK ENABLK ENPBLT
2
16V L32 120Z/100M

+DAC_VDD 1
1608
2 0 0 0
1
U9 C73 0 1 0
SIS301LV
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
0.1U
PQFP128A_0.5MM R71 147 0402 JL10 1 0 0
+80-20%
2
1 2 1 2
RESET*
DVDD1
DE1
FLD/STL1
VREF1
VDDV
DAC_GND0
DAC_GND1
P-OUT
BCO/VSYNC
GPIO[5]
GPIO[4]
TVPLL_VDD
TVPLL_VCC
XO
XI / FIN
TVPLL_GND
C/HSYNC
DACA[3]
DACB[3]
DACA[2[
DACB[2]
DACA[1]
DACB[1]
DACA[0]
DACB[0]
16V
0603 1%
1 1 1
JP_NET20
R72 6K DAC_GND R0C DAC_GND
1 2
VBVSYNC 65 38 0603 5%
[6] VBVSYNC VBHSYNC V1 ISET
66 37 LGND1 R73 24K 0402 1% C50 1U 0402 6.3V
[6] VBHSYNC VBCTL0 H1 DAC_VDD
[6] VBCTL0 67 DGND3 VSWING 36 1 2 1 2
FC_VBD0 68 35
FC_VBD1 D1[0] LGND5 TXOUT0-
69 D1[1] LDC0* 34 TXOUT0- [10]
FC_VBD2 70 33 TXOUT0+
D1[2] LDC0 TXOUT0+ [10]
FC_VBD3 71 32
FC_VBD4 D1[3] LVDD5 TXOUT1-
72 D1[4] LDC1* 31 TXOUT1- [10]
FC_VBD5 73 30 TXOUT1+
D1[5] LDC1 TXOUT1+ [10]
74 XCLK1* LGND4 29
75 28 TXOUT2-
VBGCLK DGND2 LDC2* TXOUT2- [10]
76 27 TXOUT2+
[6] VBGCLK XCLK1 LDC2 TXOUT2+ [10]
FC_VBD6 77 26
FC_VBD7 D1[6] LVDD4 TXCLK-
78 D1[7] LL1C* 25 TXCLK- [10]
FC_VBD8 79 24 TXCLK+
D1[8] LL1C TXCLK+ [10]
FC_VBD9 80 23
FC_VBD10 D1[9] LGND3 +3VS
81 D1[10] LDC3* 22
FC_VBD11 82 21 L30 120Z/100M
FC_VBD[0..11] D1[11] LDC3 +LVDD
83 20 1 2
[6] FC_VBD[0..11]
84
DVDD3
DVDD2 SiS301LV LVDD3
LVDD2 19 1608
1
FC_VAD[0..11] FC_VAD0 85 18 C535 C536 C55 C403
[6] FC_VAD[0..11] FC_VAD1 D2[0] LDC4*
86 17 0.1U 0.1U 0.1U 0.1U
FC_VAD2 D2[1] LDC4 0402 0402 0402 JL11 0402
87 D2[2] LGND2 16
FC_VAD3 +80-20% +80-20% +80-20% +80-20%
2
88 D2[3] LDC5* 15 1 2
FC_VAD4 89 14 16V 16V 16V 16V
FC_VAD5 D2[4] LDC5 JP_NET20
90 D2[5] LVDD1 13
91 12 LGND1
B XCLK2* LDC6* B
VAGCLK
92 DGND1 LDC6 11 R06
[6] VAGCLK 93 XCLK2 LGND1 10
FC_VAD6 94 9
FC_VAD7 D2[6] LDC7*
95 D2[7] LDC7 8
FC_VAD8 96 7
FC_VAD9 D2[8] LVDD0
97 D2[9] LL2C* 6
FC_VAD10 98 5
FC_VAD11 D2[10] LL2C
99 D2[11] LGND0 4
100 DGND0 LPLL_GND 3
VAHSYNC 101 2 +3VS
[6] VAHSYNC VAVSYNC H2 LPLLCAP
102 1 L28 120Z/100M
[6] VAVSYNC V2 LPLL_VDD +LPLL_VDD 1 2
1608
FLD/STL2
ENAVDD
1
ENABKL
GPIO[0]
GPIO[1]
GPIO[2]
GPIO[3]
DVDD0
HPINT*
C57 C350 C537 C56 C405

VREF2
HOUT
VOUT
100P 0.1U 0.1U 0.1U 0.1U

SDD
SDC
HPD
SPD
SPC
DD1
DC1
DD2
DC2
DE2
V5V
HIN
VIN
0402 0402 0402 0402 0402

AS
10% +80-20% +80-20% +80-20% JL13 +80-20%

2
2
50V 16V 16V 16V 1 16V
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
2
+3VS +DVDD 14x20 LPLLGND JP_NET20
L37 120Z/100M LQFP
1 2 LPLLGND R06
DC2
1608
DD2
1
C77 C78 C406

0.1U 0.1U 0.1U
0402 0402 0402 R83 100 0402 1% +3VS
+80-20% +80-20% +80-20% ENABLK
2
1 2
16V 16V 16V ENAVDD
ENAVDD [10]
1 2 +3VS PCIRST#
1
R90 4.7K 0402 5% PCIRST# [12,15,16,21] R92 R91
VADE 2.2K 2.2K
[6] VADE PCI_INTA# [12] 0402 0402
5% 5%
+3VS +5VS DD2
2
DC2
1
C72
R99 0.1U
4.7K 0402
0402 +80-20%
2
A 5% 16V A
VBCAD
2
[6] VBCAD VBHCLK

[6] VBHCLK
Title
TV/LVDS ENCODER (SIS301LV)
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DDR DIMMs DDR_MD59 RP66 8 1 MD59

SMBus
address: A0h
by BIOS
SMBus
address: A2h
by BIOS
MD59 8 1
+1.25V_DDR
RP67
DDR_MD63 10*4 7 2 MD63 MD63 7 2 33*4
[6] DDR_DQS7
DDR_MD58
DDR_MD62
DDR_DQS7
DDR_DQM7
1206
RP63
10*4
6
5
8
7
3
4
1
2
MD58
MD62
DQS7
DQM7
PLACE CLOSE TO
DDR socket
Lower DIMM BANK0/1 Upper DIMM BANK2/3 MD58 6
MD62 5
DQS7 8
DQM7 7
3
4
1
2
1206
RP65
33*4
[6] DDR_DQM7 DDR_MD57 1206 MD57 MD57 6 1206
6 3 3
DDR_MD61 5 4 MD61 MD61 5 4
+DDRVREF
J18 MD56 8 1 RP62
DDR_MD56 RP61 8 1 MD56 1 93 MD60 7 2 33*4
D VREF VSS D
DDR_MD60 10*4 7 2 MD60 MD0 2 94 MD4 MD51 6 3 1206
DDR_MD51 1206 MD51 DQ0 DQ4 MD5 MD55 5
6 3 3 GND_0 DQ5 95 4
1
DDR_MD55 5 4 MD55 C128 C131 MD1 4 96 MD50 8 1 RP60
DDR_MD50 RP57 MD50 DQS0 DQ1 VDDQ_6 DQM0 MD54 7 33*4
8 1 0.1U 1000P 5 97 2
DDR_MD54 10*4 MD54 0402 0402 MD2 QDS0 DQM0/DQS9 MD6 DQS6 6 1206
7 2 6 DQ2 DQ6 98 3
DDR_DQS6 1206 DQS6 +80-20% 10% MD7 DQM6 5
2
[6] DDR_DQS6 6 3 7 VDD_0 DQ7 99 4
DDR_DQM6 5 4 DQM6 16V 50V MD3 8 100
[6] DDR_DQM6 DQ3 GND_12 MD53 RP56
9 NC_0 NC_1 101 8 1
10 102 MD49 7 2 33*4
DDR_MD53 RP55 MD53 NC/RESET# NC_2 MD52 1206
8 1 11 GND_1 A13 103 6 3
DDR_MD49 10*4 7 2 MD49 MD8 12 104 MD48 5 4
DDR_MD52 1206 MD52 MD9 DQ8 VDDQ_7 MD12 MD47 RP54
6 3 13 DQ9 DQ12 105 8 1
DDR_MD48 5 4 MD48 DQS1 14 106 MD13 MD46 7 2 33*4
DDR_MD47
DDR_MD46
RP53
10*4
8
7
1
2
MD47
MD46
[11] CLK_DDR4
CLK_DDR4
15
16
QDQS1
VDDQ_0
DQ13
DQM1/DQS10 107
108
DQM1
Difference MD43
MD42
6
5
3
4
1206
DDR_MD[0..63] DDR_MD43 1206 MD43 CLK_DDR4# CK1 VDD_5 MD14
[6] DDR_MD[0..63] 6 3 [11] CLK_DDR4# 17 CK1# DQ14 109
DDR_MD42 5 4 MD42 CLK_DDR1 L16 110 MD15
[11]
[11]
CLK_DDR1
CLK_DDR1#
CLK_DDR1# L17
CK1
CK1#
DQ15
CKE1 111 CKE3 CLK CKE CS DQS5 8 1 RP52
18 L111 CKE1 DQM5 7 2 33*4
DDR_DQS5 RP51 DQS5 MD10 GND_2 CKE1 MD41 6 1206
8 1 19 DQ10 VDDQ_8 112 3
[6] DDR_DQS5 DDR_DQM5 10*4 DQM5 MD11 MD45 5
[6] DDR_DQM5 DDR_MD41 1206
7 2
MD41 CKE2
20 DQ11 BA2 113
MD20 Upper DIMM CK0/0# ==> CLK_DDR3/3# CKE0/1 ==> CKE2/3 CS0#/1# ==> CS2#/3# MD44 8
4
RP45
6 3 21 CKE0 DQ20 114 1
DDR_MD45 MD45 CKE0 MA12 MD40 7 33*4
DDR_MD44 RP46
5 4
MD44
L21 CKE0 A12 115 CK1/1# ==> CLK_DDR4/4# MD35 6
2
1206
8 1 22 VDDQ_1 GND_13 116 3
DDR_MD40 10*4 MD40 MD16 MD21 MD39 5
DDR_MD35 1206
7 2
MD35 MD17
23 DQ16 DQ21 117
MA11
CK2/2# ==> CLK_DDR5/5# 4
6 3 24 DQ17 A11 118
DDR_MD39 5 4 MD39 DQS2 25 119 DQM2 MD38 8 1 RP44
DQS2 DQM2/DQS11 DQM4 7 33*4
26 GND_3 VDD_6 120 2
DDR_MD38 RP43 8 1 MD38 MA9 27 121 MD22 MD34 6 3 1206
[6] DDR_DQM4
DDR_DQM4 10*4 7 2 DQM4 MD18 28
A9
DQ18
DQ22
A8 122 MA8 Lower DIMM CK0/0# ==> CLK_DDR0/0# CKE0/1 ==> CKE0/1 CS0#/1# ==> CS0#/1# DQS4 5 4
DDR_MD34 1206 6 3 MD34 MA7 29 123 MD23 MD37 8 1 RP42
DDR_DQS4 DQS4 A7 DQ23 MD33 7 33*4
[6] DDR_DQS4 DDR_MD37 RP41
5 4
MD37 MD19
30 VDDQ_2 GND_14 124
MA6
CK1/1# ==> CLK_DDR1/1# MD36 6
2
1206
8 1 31 DQ19 A6 125 3
DDR_MD33 10*4 MD33 MA5 MD28 MD32 5
DDR_MD36 1206
7 2
MD36
32 A5 DQ28 126
MD29
CK2/2# ==> CLK_DDR2/2# 4
6 3 L32 A5 DQ29 127
DDR_MD32 5 4 MD32 MD24 33 128 CS2# 8 1 RP50
DQ24 VDDQ_9 DQM3 CS3# 7 33*4
34 GND_4 DQM3/DSQ12 129 2
DDR_CS2# RP49 8 1 CS2# MD25 35 130 MA3 CS1# 6 3 1206
[6] DDR_CS2# DDR_CS3# 10*4 CS3# DQS3 DQ25 A3 MD30 CS0# 5
[6] DDR_CS3# 7 2 36 DQS3 DQ30 131 4
DDR_CS1# 1206 6 3 CS1# MA4 37 132 8 1 RP48
[6] DDR_CS1# DDR_CS0# CS0# A4 GND_15 MD31 CAS# 7 33*4
[6] DDR_CS0# 5 4 L37 A4 DQ31 133 2
C RP47 WE# 6 1206 C
8 1 38 VDD_1 CB4 134 3
DDR_CAS# 10*4 7 2 CAS# MD26 39 135 RAS# 5 4
[6] DDR_CAS# DDR_WE# 1206 WE# MD27 DQ26 CB5
[6] DDR_WE# 6 3 40 DQ27 VDDQ_10 136
DDR_RAS# 5 4 RAS# MA2 41 137 CLK_DDR3 R290 33 0402 5%
[6] DDR_RAS# A2 CK0 CLK_DDR3# CLK_DDR3 [11] BA0
L41 A2 CK0# 138 CLK_DDR3# [11] 1 2
R287 10 0402 5% 42 L137 CLK_DDR0 8 1 RP38
DDR_BA0 BA0 GND_5 CK0 CLK_DDR0# CLK_DDR0 [11]
1 2 MA1 43 L138 7 2 33*4
[6] DDR_BA0 A1 CK0# CLK_DDR0# [11] BA1 6
RP37 8 1 L43 139 3 1206
DDR_MA[0..12] 10*4 A1 GND_16 MA10 5
[6] DDR_MA[0..12] 7 2 44 CB0 DQM8/DQS17 140 4
DDR_BA1 1206 6 3 BA1 45 141 MA10 MA0 8 1 RP34
[6] DDR_BA1 DDR_MA10 MA10 CB1 A10 MA1 7
5 4 46 VDD_2 CB6 142 2 33*4
DDR_MA0 RP35 8 1 MA0 47 143 MA2 6 3 1206
DDR_MA1 10*4 MA1 MA0 DQS8 VDDQ_11 MA3 5
7 2 48 A0 CB7 144 4
DDR_MA2 1206 6 3 MA2 49 145
DDR_MA3 MA3 CB2 GND_17 MD36 MA4 RP26
5 4 50 GND_6 DQ36 146 8 1
51 147 MD37 MA5 7 2 33*4
DDR_MA4 RP25 MA4 BA1 CB3 DQ37 MA6 1206
8 1 52 BA1 VDD_7 148 6 3
DDR_MA5 10*4 7 2 MA5 MD32 53 149 DQM4 MA7 5 4
DDR_MA6 1206 MA6 DQ32 DQM4/DQS13 MD38 MA8 RP21
6 3 54 VDDQ_3 DQ38 150 8 1
DDR_MA7 5 4 MA7 MD33 55 151 MD39 MA9 7 2 33*4
DDR_MA8 RP20 MA8 DQS4 DQ33 DQ39 MA11 1206
8 1 56 DQS4 GND_18 152 6 3
DDR_MA9 10*4 7 2 MA9 MD34 57 153 MD44 MA12 5 4
DDR_MA11 1206 MA11 DQS34 DQ44 RAS#
6 3 58 GND_7 RAS# 154
DDR_MD[0..63] DDR_MA12 5 4 MA12 BA0 59 155 MD45 MD31 8 1 RP33
MD35 BA0 DQ45 MD27 7 33*4
60 DQ35 VDDQ_12 156 2
DDR_MD31 RP32 8 1 MD31 MD40 61 157 CS2# MD30 6 3 1206
DDR_MD27 10*4 MD27 DQ40 CS0# CS3# MD26 5
7 2 62 VDDQ_4 CS1# 158 4
DDR_MD30 1206 6 3 MD30 WE# 63 L157 CS0# DQM3 8 1 RP31
DDR_MD26 MD26 MD41 WE# CS0# CS1# DQS3 7 33*4
5 4 64 DQ41 CS1# L158 2
DDR_DQM3 RP30 8 1 DQM3 CAS# 65 159 DQM5 MD29 6 3 1206
[6] DDR_DQM3 DDR_DQS3 10*4 DQS3 CAS# DQM5/DQS14 MD25 5
7 2 66 GND_8 GND_19 160 4
[6] DDR_DQS3 DDR_MD29 1206 MD29 DQS5 MD46
6 3 67 DQS5 DQ46 161
DDR_MD25 5 4 MD25 MD42 68 162 MD47 MD28 8 1 RP29
MD43 DQS42 DQ47 MD24 7 33*4
69 DQS43 NC/CS1# 163 2
DDR_MD28 RP28 8 1 MD28 70 L163 MD23 6 3 1206
DDR_MD24 10*4 MD24 VDD_3 NC/CS1# MD19 5
7 2 71 NC/CS2# VDDQ_13 164 4
DDR_MD23 1206 6 3 MD23 MD48 72 165 MD52 MD22 8 1 RP23
DDR_MD19 MD19 MD49 DQ48 DQ52 MD53 MD18 7 33*4
5 4 73 DQ49 DQ53 166 2
DDR_MD22 RP22 8 1 MD22 74 167 DQM2 6 3 1206
DDR_MD18 10*4 MD18 CLK_DDR5# GND_9 NC/FETEN DQS2 5
7 2 [11] CLK_DDR5# 75 CK2# VDD_8 168 4
DDR_DQM2 1206 6 3 DQM2 CLK_DDR5 76 169 DQM6
[6] DDR_DQM2 DDR_DQS2 DQS2 [11] CLK_DDR5 CLK_DDR2# CK2 DQM6/DQS15 MD54 MD21
B 5 4 L75 170 8 1 RP19 B
[6] DDR_DQS2 [11] CLK_DDR2# CLK_DDR2 CK2# DQ54 MD55 MD17
L76 171 7 2 33*4
DDR_MD21 MD21 [11] CLK_DDR2 CK2 DQ55 MD20
RP18 8 1 77 172 6 3 1206
DDR_MD17 10*4 MD17 DQS6 VDDQ_5 VDDQ_14 MD16
7 2 78 DQS6 NC_3 173 5 4
DDR_MD20 1206 6 3 MD20 MD50 79 174 MD60 MD11 8 1 RP17
DDR_MD16 MD16 MD51 DQ50 DQ60 MD61 MD10 33*4
5 4 80 DQ51 DQ61 175 7 2
DDR_MD11 RP16 8 1 MD11 81 176 MD15 6 3 1206
DDR_MD10 10*4 MD10 GND_10 GND_20 DQM7 MD14
7 2 82 VDDID DQM7/DQS16 177 5 4
DDR_MD15 1206 6 3 MD15 MD56 83 178 MD62
DDR_MD14 MD14 MD57 DQ56 DQ62 MD63 DQM1 8 RP15
5 4 84 DQ57 DQ63 179 1
85 180 DQS1 7 2 33*4
DDR_DQM1 RP14 DQM1 DQS7 VDD_4 VDDQ_15 DIMM1S0 MD13 6 1206
[6] DDR_DQM1 8 1 86 DQS7 SA0 181 +2.5V_DDR 3
DDR_DQS1 10*4 7 2 DQS1 MD58 87 182 DIMM1S1 MD9 5 4
[6] DDR_DQS1 DDR_MD13 1206 MD13 MD59 DQ58 SA1 DIMM1S2 MD12 8 RP13
6 3 88 DQ59 SA2 183 1
DDR_MD9 5 4 MD9 89 L181 DIMM0S2 MD8 7 2 33*4
DDR_MD12 RP12 MD12 GND_11 SA0 DIMM0S1 MD7 6 1206
8 1 90 WP SA1 L182 3
DDR_MD8 10*4 7 2 MD8 SMBDATA 91 L183 DIMM0S0 MD3 5 4
DDR_MD7 MD7 [11,13] SMBDATA SMBCLK SDA SA2 2.5V
1206 6 3 92 184
DDR_MD3 MD3 [11,13] SMBCLK SCL VDDSPD MD6 8
5 4 1 RP11
GND1 MD2 7 2 33*4
GND_21 DQM0 6 1206
GND2 GND_22 3
DDR_MD6 RP10 8 1 MD6 DQS0 5 4
DDR_MD2 10*4 7 2 MD2 MD5 8 1 RP9
DDR/202P/RA
DDR_DQM0 1206 6 3 DQM0 MD1 7 2 33*4
[6] DDR_DQM0 CA0179-202BXX
DDR_DQS0 5 4 DQS0 MD4 6 3 1206
[6] DDR_DQS0 QUASAR
DDR_MD5 RP8 8 1 MD5 MD0 5 4
DDR_MD1 10*4 7 2 MD1
DDR_MD4 1206 6 3 MD4 R03
DDR_MD0 5 4 MD0 +1.25V_DDR +1.25V_DDR
CKE0
[6] DDR_CKE0
1
1
CKE1 C155 C261 C268 C220 C180 C227 C340 C341 C322 C323 C324 C325 C326 C327
[6] DDR_CKE1 CKE2 +2.5V_DDR 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
[6] DDR_CKE2 CKE3 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
[6] DDR_CKE3 +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20%
2
2
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V +1.25V_DDR
R03
+2.5V_DDR +DDRVREF
1
C232 C295 C188 C216 C168 +1.25V_DDR +1.25V_DDR

0.1U 0.1U 1U 1U 1U
1
1
0402 0402 0402 0402 0402 C346 C347 C348 C349
R163 +80-20% +80-20% +80-20% +80-20% +80-20%
2
A 10U 10U 10U/NA 10U/NA A

1
1
49.9 16V 16V 6.3V 6.3V 6.3V C252 C187 C208 C197 C271 C277 C342 C343 C328 C329 C330 C331 C332 C333 1206 1206 1206 1206
0402 10V 10V 10V 10V
2
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
1% 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
+80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20%
2
2
+2.5V_DDR 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
1
R162
49.9 +1.25V_DDR +1.25V_DDR
0402
1
1% C129 C278 C302 C163 C214 C257

10U/NA 10U/NA
2
1U 0.1U 0.1U 0.1U

1
1
1206 0402 1206 0402 0402 0402 C280 C286 C290 C292 C293 C296 C344 C345 C334 C335 C336 C337 C338 C339
10V +80-20% 10V +80-20% +80-20% +80-20%
2
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
6.3V 16V 16V 16V 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 Title
+80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20%
2
2
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V DDR DIMMs
Size Document Rev
R06
Number 411682900001
THESE DECOUPLING CAPACITOR SHOULD BE PLACE WITHIN 150 Mils OF +1.25V THERMINATION R-PACKs Date: Monday, April 12, 2004 Sheet 9 of 28
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
LCD / VGA Interface

LCD Connector+Inverter 40 mils LCD 14" 330mA,15"800mA 40 mils Q4
AO3400
SOT23_FET +3VS
J6 CLOSE TO AO3400
LCDVCC LCDVCC1
S
D
1 2 S D
D 3 4 Close to LCD Connector D
TXOUT2+ 5 6 TXCLK+
[8] TXOUT2+ TXCLK+ [8]
TXOUT2- 7 8 TXCLK-
[8] TXOUT2- TXCLK- [8]
G
9 10 C23 C8 C9 C16 C26
1
TXOUT1+ 11 12 TXOUT0+ 1000P 0.1U 1000P 10U/NA 0.1U C33
[8] TXOUT1+ TXOUT0+ [8]
TXOUT1- 13 14 TXOUT0- 0402 0402 0402 1206 0402 +12VS 0.1U
[8] TXOUT1- TXOUT0- [8] 10% +80-20% 10% R26
10V 16V 0402
1
15 16 1 8 +3VS
LCD_ID0 RP2 50V 16V 50V +80-20%
2
17 18 2 7 1 2
[13] LCD_ID0 LCD_ID1 1K*4 16V
[6] LCD_ID1 19 20 3 6
LCD_ID2 21 22 4 5 1206 470K 0402
[6] LCD_ID2
3
L3 120Z/100M 1608 23 24 Q5
1 2 25 26 1 2 R1 2
[8] ENPBLT BLADJ [20]
27 28
1 2 29 30 L22 120Z/100M 1608 DTC144TKA
DVMAIN
1
R0A L2 120Z/100M 1608 GND1
GND2 LCD Panel ID ENAVDD
ENAVDD [8]
LCD_ID0 MA/15PX2/ST
LCD_ID1 ACES LCDID2 LCDID1 LCDID0 PANEL VENDOR
LCD_ID2 87216-3002
0 0 0 HSD150PX14-A XGA Hannstar
0 0 1 HT15X34-100 XGA Hydis
4
3
2
1
1
C7 0 1 0 LPN150XB-L03 XGA Samsung
RP1 0.1U 0 1 1 B150XG02-1 XGA AU
10K*4 0402 1 0 0 QD15XL06-01-2 XGA QDI
1206 +80-20% 1 0 1 LP150X08-A3 XGA Lg-Phillips
2
16V 1 1 0 X X
1 1 1 X X
Layout Note:
5
6
7
8
S/W/W/S=10/8/8/10 mils
as short as possible
四組各自平行走線等長
C C
1 2
+3VS
L4 BEAD_600Z/100M/NA
0603D
1
1
D10 D9 D8
GND_TV GND_TV GND_TV

BAV99/NA BAV99/NA BAV99/NA
3
S-VIDEO
J1
1 1
2 2 D7
2 L12 2.7uH 1608
3 3 3
4 1 2 TV_LUMA 1
4 TV_LUMA [8]
5 L14 2.7uH 1608
5 TV_CRMA BAV99/NA
6 6 1 2 TV_CRMA [8]
7 L13 2.7uH 1608 2 D5
7 TV_COMP
1 2 TV_COMP [8] 3
GND1 GND1 1
GND2 GND2
1
C70 C65 C68 BAV99/NA
1
C6 C5 C4 270P 270P 270P 2 D6

7P/RA 0402 0402 0402 +5VS
270P 270P 270P 3
SUYIN 0402 0402 0402 +/-10% +/-10% +/-10%
2
1
33007S-07T1-C +/-10% +/-10% +/-10% 50V 50V 50V
2
50V 50V 50V L1 BAV99/NA

1 2 2 D4
3
1
JP_BEAD_DFS
GND_TV BAV99/NA
B B
+3VS
1
R153 R136
W/S=12/12/12/12/12 mils
2.2K 2.2K J2
Close to VGA Connector
0402 0402 16
5% 5%
CRT_RED 2 L5 120Z/100M 1608
2
[6] CRT_RED 1 1
External VGA Connector

9
CRT_GREEN 1 2 L6 120Z/100M 1608 2
[6] CRT_GREEN
10
CRT_BLUE 1 2 L7 120Z/100M 1608 3
[6] CRT_BLUE +5VS 11
4
12
G
5
Q18 13
CRT_DDDA S D 1608 120Z/100M 1 2 L8 6
[6] CRT_DDDA +5VS HSYNC_CON 1608 120Z/100M L10
S
D
1 2 14
2N7002 VSYNC_CON 1608 120Z/100M 1 2 L9 7
Q19 1608 120Z/100M 1 2 L11 15
G
2N7002 8
[6] CRT_HSYNC S D 17
4
3
2
1
4
3
2
1
+3V
S
D
4
3
2
1
4
3
2
1
1 2 CP2 CP1
CP3 22P*4 22P*4 RP68 VGA
R360 0/NA 0402 +5VS 22P*4/NA 1206 1206 75*4/NA JL501 SUYIN
1
1206 1206 1 2 7535S-15G2T-05
Q15 R4 CONN_SYN7535S_15GT
G
2N7002 SHORT-SMT3 10K 331720015006

JL502 0402
5
6
7
8
5
6
7
8
5%
5
6
7
8
5
6
7
8
[6] CRT_VSYNC S D 1 2
R3
S
D
2
A A
SHORT-SMT3 CRT_IN#
R02 1 2 1 2 CRT_IN# [13]
R361 0/NA 0402 GND_CRT15 GND_CRT15 GND_CRT15 GND_CRT15
GND_CRT15 1K
1
C1 0402
+5VS 100P 1%
R02 0402
10%
2
G
Q11 50V
CRT_DDCK S D
[6] CRT_DDCK
S
D
GND_CRT15
2N7002
Title
LCD / VGA Interface
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
For ICS952011
Clock Generator/Buffer * INTERNAL PULL UP RESISTOR

** INTERNAL PULL DOWN RESISTOR
~ THIS OUTPUT HAS 1.5X DRIVE STRENGTH
Bit2
0
Bit7
0
Bit6
FS4 FS3 FS2 FS1 FS0
0
Bit5
0
Bit4
0
CPU
100.20
SDRAM
100.20
ZCLK
66.8
AGP
66.8
PCI
33.4
0 0 0 0 1 100.20 133.60 66.8 66.8 33.4
0 0 0 1 0 100.20 200.4 66.8 66.8 33.4
0 0 0 1 1 100.20 167.00 66.8 66.8 33.4
+3VS
L48 U13 0 0 1 0 0 133.60 100.20 66.8 66.8 33.4
1 2 1 VDDREF
NON USE
D 11 VDDZ 0 0 1 0 1 133.60 133.60 66.8 66.8 33.4 D
1
C161 C186 C148 13 VDDPCI0
120Z/100M 0.1U 0.1U 0.1U 19 0 0 1 1 0 133.60 200.40 66.8 66.8 33.4
1608 0402 0402 0402 VDDPCI1
28 VDDA48
+80-20% +80-20% +80-20% 0 0 1 1 1 133.60 167.00 66.8 66.8 33.4
2
29 VDDAGP
16V 16V 16V 42 VDDCPU R175 1
48 VDDSD CPUCLKT_0 40 2 33 0402 HCLK_CPU
HCLK_CPU [4] 0 1 0 0 0 200.05 100.03 66.68 66.68 33.34
39 R176 1 2 33 0402 HCLK_CPU#
STP_PCI# CPUCLKC_0 HCLK_CPU# [4]
+3VS 12 0 1 0 0 1 200.05 133.37 66.68 66.68 33.34
L47 [13] STP_PCI# *PCI_STOP#/PCICLK6
CPU_STP# 45 44 R173 1 2 33 0402 HCLK_SISM661FX
[13,28] CPU_STP# CPU_STOP#* CPUCLKT_1 HCLK_SISM661FX [6]
1 2 43 R174 1 2 33 0402 HCLK_SISM661FX# 0 1 0 1 0 200.05 200.05 66.68 66.68 33.34
CPUCLKC_1 HCLK_SISM661FX# [6]
5 GNDREF
1
1
C151 C140 8 GNDZ SDRAM 47 0 1 0 1 1 200.05 160.04 66.68 66.68 33.34
120Z/100M 0.1U 0.1U 18
1608 0402 0402 GNDPCI0 R179 1
24 GNDPCI1 AGPCLK0 31 2 22 0402 AGP_CLK
AGP_CLK [6] 0 1 1 0 0 166.70 100.20 66.68 66.68 33.34
+80-20% +80-20%
2
2 25 GND48 AGPCLK1 30
16V 16V 32 0 1 1 0 1 166.70 133.36 66.8 66.8 33.4
GNDAGP R214 1
41 GNDCPU ZCLK0 9 2 22 0402 ZCLK0
ZCLK0 [6]
46 10 R215 1 2 22 0402 ZCLK1 0 1 1 1 0 160.04 200.05 66.68 66.68 33.34
GNDSD ZCLK1 ZCLK1 [12]
+VCC_CORE +3VS +3VS 14 FS3 0 1 1 1 1 166.7 166.7 66.68 66.68 33.34
**FS3/PCICLK_F0 FS4 R217 1
**FS4/PCICLK_F1 15 2 33 0402 CLK_SBPCI
CLK_SBPCI [12]
16 R219 1 2 33 0402 PCI_KBCLK
*MODE0/PCICLK0 PCI_KBCLK [20]
17 R220 1 2 33 0402 PCICLK_CARD +12VS 1 0 0 0 0 100.20 100.02 133.60 66.8 33.4
PCICLK1 PCICLK_CARD [16]
1
20 R221 1 2 33 0402 PCICLK_FWH

PCICLK2 PCICLK_FWH [18]
1
R169 21 1 0 0 0 1 100.20 133.60 133.60 66.8 33.4

PCICLK3
1
1
R135 10K 22
10K R134 0402 PCICLK4 R206 1
PCICLK5 23 2 33 0402 CLK_MINIPCI
CLK_MINIPCI [21]
R133 1 0 0 1 0 100.20 200.40 133.60 66.8 33.4
0402 10K 5% R200 1 2 33 0402 14.318MHZ_TV 10K
5% 0402 VTT_PWRGD REFCLK0 14.318MHZ_TV [8] 0402
FS0 R201 1 2 33 0402 Q16 1 0 0 1 1 100.20 167.00 133.60 66.8 33.4
2
33 PD#*/VTT_PWRGD **FS0/REF0 2 REFCLK0 [6]

5% R212 1 2 33 0402 REFCLK1 2N7002 5%
2
3
C
**FS1/REF1 FS2 REFCLK1 [13]

1 0 1 0 0 133.60 100.20 133.60 66.8 33.4
2
G 2
**FS2/REF2 4
B Q17 R168 1 2 475 1% 38 R190 1 2 10K 0402
G
MMBT3904L IREF USB12M_SB +3VS
0402 R194 22 0402 1 0 1 0 1 133.60 133.60 133.60 66.8 33.4
12_48MHZ/SEL12_48#* 27 1 2
C
USBCLK_SB USB12M_SB [14]

R186 22 0402 Q12
24_48MHZ/SEL24_48#*~ 26 1 2
CLK_SIO USBCLK_SB [14]
E
B R180 1 2 22 0402 S DS D 2N7002 1 0 1 1 0 133.60 200.40 133.60 66.8 33.4

CLK_SIO [21]
Q13
S
D
S
D
MMBT3904L 35 ASMBCLK SMBCLK 1 0 1 1 1 133.60 167.00 133.60 66.8 33.4
SCLK ASMBDATA SMBDATA SMBCLK [9,13]
E
36 VDDA SDATA 34 SMBDATA [9,13]

+3VS 1 1 0 0 0 200.05 100.03 133.37 66.68 33.34
1
L46 120Z/100M SMBus
1 2 R181 +3VS 1 1 0 0 1 200.05 133.37 133.37 66.68 33.34
C
37 10K address: D2h C
GNDA
1
1608 0402 R178 4.7K 0402 1 1 0 1 0 200.05 200.05 133.37 66.68 33.34
by BIOS
X1
X2
C138 C144 C150
0.1U 0.1U 1000P 5% 1 2
0402 0402 0402 1 1 0 1 1 200.05 160.04 133.37 66.68 33.34
2
ICS952007
+80-20% +80-20% 10%
2
7
SSOP48 1 2
16V 16V 50V 1 1 1 0 0 166.70 100.20 133.60 66.68 33.4
Layout note: Place crystal within R177 4.7K 0402
500 mils of CLK Gen. 1 1 1 0 1 166.70 133.36 133.60 66.8 33.4
1 1 1 1 0 160.04 200.05 133.37 66.68 33.34
X3
1 2 1 1 1 1 1 166.70 166.70 133.37 66.68 33.34
14.31818MHZ
BSEL1 BSEL0 FREQ

1
C195 C196 DEFAULT

22P 22P
0603 0603 L L 100MHz
5% 5%
2
SMBus L H 133MHz
address: D4h H L 200MHz
by BIOS
H H RSVD
U19
ASMBCLK 7 SCLK FB_OUTT 19 R256 1 2 22 0402 For ICS952007
ASMBDATA 22 SDATA
CLKT0 2 R279 1 2 0_DFS 0402CLK_DDR0 CLK_DDR0 [9] Bit2 Bit7 Bit6 Bit5 Bit4
VDD_MEM2.5 BF_OUT 20 1 R278 1 2 0_DFS 0402CLK_DDR0#
FBINT CLKC0 CLK_DDR0# [9]
FWDSDCLKO 8 FS4 FS3 FS2 FS1 FS0 CPU SDRAM ZCLK AGP PCI
[6] FWDSDCLKO CLK_INT
L61 120Z/100M
CLKT1 4 R281 1 2 0_DFS 0402CLK_DDR1 CLK_DDR1 [9]
1 2 3 VDD0 CLKC1 5 R282 1 2 0_DFS 0402CLK_DDR1# CLK_DDR1# [9]
12 VDD1 0 0 0 0 0 100.00 100.00 133.33 66.66 33.33
1
1608 C254 C233 23 VDD2 CLKT2 13 R284 1 2 0_DFS 0402CLK_DDR2 CLK_DDR2 [9]
0.1U 0.1U 10 VDDA CLKC2 14 R285 1 2 0_DFS 0402CLK_DDR2# CLK_DDR2# [9] 0 0 0 0 1 100.99 133.99 134.65 67.33 33.66
0402 0402
+80-20% +80-20% R253 1 2 0_DFS 0402CLK_DDR3 0 0 0 1 0 103.00 103.00 137.33 68.67 34.33
2
6 GND0 CLKT3 17 CLK_DDR3 [9]

16V 16V 11 16 R254 1 2 0_DFS 0402CLK_DDR3#
GND1 CLKC3 CLK_DDR3# [9]
B L60 120Z/100M 15 0 0 0 1 1 100.00 100.00 133.33 66.67 33.33 B
GND2
1 2 28 GND3 CLKT4 24 R252 1 2 0_DFS 0402CLK_DDR4 CLK_DDR4 [9]
CLKC4 25 R251 1 2 0_DFS 0402CLK_DDR4# CLK_DDR4# [9] 0 0 1 0 0 133.33 133.33 133.33 66.66 33.33
1
1608 C253 C255 21 N/C0

0.1U 1000P 18 N/C1 CLKT5 26 R249 1 2 0_DFS 0402CLK_DDR5 CLK_DDR5 [9] 0 0 1 0 1 134.65 134.65 134.65 67.32 33.66
0402 0402 9 N/C2 CLKC5 27 R258 1 2 0_DFS 0402CLK_DDR5# CLK_DDR5# [9]
+80-20% 10% 0 0 1 1 0 137.33 137.33 137.33 68.66 34.33
2
16V 50V ICS93772

SSOP28A 0 0 1 1 1 133.33 133.33 133.33 66.67 33.33
0 1 0 0 0 200.00 200.00 133.33 66.67 33.33
0 1 0 0 1 201.98 201.98 134.65 67.33 33.66
0 1 0 1 0 206.00 206.00 137.33 68.67 34.33
0 1 0 1 1 200.00 200.00 133.33 66.67 33.33
PLACE AT CLK SIDE +3VS 0 1 1 0 0 166.66 166.66 133.33 66.66 33.33
0 1 1 0 1 168.31 168.31 134.65 67.32 33.66
2
0 1 1 1 0 171.66 171.66 137.33 68.66 34.33

R209 R218 R227 R226
10K/NA 10K/NA 1K 1K 0 1 1 1 1 166.66 166.66 133.33 66.66 33.33
0402 0402 0402 0402
1% 1%
FS0 1 0 0 0 0 100.20 100.02 133.60 66.79 33.40
1
R0C
FS4 1 0 0 0 1 105.00 105.00 140.00 69.99 35.00
R216 10K 0402 HCLK_CPU C31 1 2 10P 0402 1 0 0 1 0 107.00 107.00 142.66 71.33 35.66
FS3 1 2 BSEL1 HCLK_CPU# C30 1 2 10P 0402
BSEL1 [4]
1 0 0 1 1 110.00 110.00 146.66 73.33 36.66
R213 10K 0402 HCLK_SISM661FX C147 1 2 10P/NA 0402
FS2 1 2 BSEL0 HCLK_SISM661FX# C139 1 2 10P/NA 0402 1 0 1 0 0 133.60 133.60 133.60 66.79 33.40
BSEL0 [4]
BF_OUT C229 1 2 10P 0402 1 0 1 0 1 140.00 140.00 140.00 69.99 35.00
NON USE
1 0 1 1 0 142.66 142.66 142.66 71.33 35.66
HCLK_SISM661FX R164 1 2 49.9 0402 1%
A HCLK_SISM661FX# R165 1 2 49.9 0402 1% 1 0 1 1 1 146.66 146.66 146.66 73.33 36.66 A
HCLK_CPU R166 1 2 49.9 0402 1% 1 1 0 0 0 200.40 200.40 133.60 66.79 33.40

HCLK_CPU# R167 1 2 49.9 0402 1%
1 1 0 0 1 210.00 210.00 140.00 69.99 35.00
1 1 0 1 0 214.00 214.00 142.66 71.33 35.66
1 1 0 1 1 220.00 220.00 146.66 73.33 36.66
1 1 1 0 0 166.99 166.99 133.60 66.79 33.40
1 1 1 0 1 174.99 174.99 140.00 69.99 35.00
1 1 1 1 0 178.33 178.33 142.66 71.33 35.66 Title
Clock Generator/Buffer
1 1 1 1 1 183.33 183.33 146.66 73.33 36.66
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SIS963L (1/3)
PCI_AD[0..31]
[16,21] PCI_AD[0..31]
D D
PCI BUS PULL UP RESISTERS
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
+3VS
H2
H1
N5
R2
R3
R1
U1
U2
R5
U3
K4
K5
K2
K1
P2
P3
P4
P5
V1
T1
T2
T3
L3
L1
L4
L5
L2
J5
J4
J3
J2
J1
U20A
F1 Y3 IDEAVDD
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
PREQ4# IDEAVDD IDEAVSS RP58 8.2K*4 1206
F2 PREQ3# IDEAVSS Y4
PCI_REQ2# E1 PCI_INTA# 1 8
[21] PCI_REQ2# PREQ2#
H5 W10 IDE_PIORDY PCI_INTD# 2 7
PREQ1# ICHRDYA IDE_PIORDY [15]
PCI_REQ0# F3 V10 IDE_PDDREQ PCI_INTC# 3 6
[16] PCI_REQ0# PREQ0# IDREQA IDE_PDDREQ [15]
Y11 IDE_IRQ14 PCI_INTB# 4 5
PCI_GNT4# IIRQA IDE_IRQ14 [15]
TP541 1 H3 U12 1
PCI_GNT3# PGNT4# CBLIDA TP534
G1 PGNT3#
PCI_GNT2# G2 V11 IDE_PDIOR# RP59 8.2K*4 1206
[21] PCI_GNT2# PCI_GNT1# PGNT2# IIORA# IDE_PDIOR# [15] PCI_GNT0#
G3 Y9 IDE_PDIOW# 1 8
PCI_C/BE#[0..3] PGNT1# IIOWA# IDE_PDIOW# [15] PCI_GNT1#
PCI_GNT0# H4 Y10 IDE_PDDACK# 2 7
[16,21] PCI_C/BE#[0..3] [16] PCI_GNT0# PGNT0# IDACKA# IDE_PDDACK# [15] PCI_GNT2# 3 6
PCI_C/BE#3 K3 T11 IDE_PDA2 PCI_GNT3# 4 5
PCI_C/BE#2 C/BE3# IDSAA2 IDE_PDA2 [15]
M4 U11 IDE_PDA1
P1 W11 IDE_PDA0
R4 RP64 8.2K*4 1206
C/BE0# IDE_PDCS3# PCI_LOCK#
IDECSA1# T12 IDE_PDCS3# [15] 1 8
PCI_INTA# E3 V12 IDE_PDCS1# PCI_DEVSEL# 2 7
[6,8] PCI_INTA# INTA# IDECSA0# IDE_PDCS1# [15]
PCI_INTB# F4 PCI_STOP# 3 6
[16] PCI_INTB# PCI_INTC# INTB# IDE_SIORDY PCI_FRAME#
[21] PCI_INTC# E2 INTC# ICHRDYB W17 IDE_SIORDY [15] 4 5
PCI_INTD# G4 Y17 IDE_SDDREQ
[21] PCI_INTD# INTD# IDREQB IDE_SDDREQ [15]
T16 IDE_IRQ15
IIRQB IDE_IRQ15 [15]
PCI_FRAME# M3 U17 1 RP6 8.2K*4 1206
[16,21] PCI_FRAME# FRAME# CBLIDB TP531 PCI_IRDY#
PCI_IRDY# M1 1 8
[16,21] PCI_IRDY# IRDY# PCI_SERR#
PCI_TRDY# M2 T14 IDE_SDIOR# 2 7
[16,21] PCI_TRDY# TRDY# IIORB# IDE_SDIOR# [15] PCI_PERR#
PCI_STOP# N4 W16 IDE_SDIOW# 3 6
[16,21] PCI_STOP# STOP# IIOWB# IDE_SDIOW# [15] [16,21] PCI_PERR# PCI_TRDY#
V16 IDE_SDDACK# 4 5
IDACKB# IDE_SDDACK# [15]
PCI_SERR# M5
[16,21] PCI_SERR# SERR#
PCI_PAR N3 Y18 IDE_SDA2
[16,21] PCI_PAR PAR IDSAB2 IDE_SDA2 [15]
PCI_DEVSEL# N1 T15 IDE_SDA1
C [16,21] PCI_DEVSEL# DEVSEL# IDSAB1 IDE_SDA1 [15] C
PCI_LOCK# N2
[16] PCI_LOCK# PLOCK# IDE_SDA0
IDSAB0 V17 IDE_SDA0 [15]
CLK_SBPCI Y2 U16 IDE_SDCS3#
[11] CLK_SBPCI PCICLK IDECSB1# IDE_SDCS3# [15]
C3 W18 IDE_SDCS1#
PCIRST# PCIRST# IDECSB0# IDE_SDCS1# [15]
R299 1 2 33 0402
[8,15,16,21] PCIRST# LPC_RST# R245 1 2 33 0402
IDA0 U10 IDE_PDD0
[18,20] LPC_RST# NBRST# R241 1
[6] NBRST# 2 33 0402
IDA1 V9 IDE_PDD1
W8 IDE_PDD2
IDA2 IDE_PDD3
IDA3 T9
ZCLK1 V20 Y7 IDE_PDD4 +1.8VS
[11] ZCLK1 ZCLK IDA4
V7 IDE_PDD5 R303 0_DFS
ZSTB0 IDA5 IDE_PDD6 IDEAVDD
[6] ZSTB0 M19 ZSTB0 IDA6 Y6 1 2
ZSTB0# N20 Y5 IDE_PDD7
[6] ZSTB0# ZSTB0# IDA7
W6 IDE_PDD8 0402
ZSTB1 IDA8 IDE_PDD9
[6] ZSTB1 J20 ZSTB1 IDA9 U8
1
ZSTB1# K20 W7 IDE_PDD10 C273 C276
[6] ZSTB1# ZSTB1# IDA10
V8 IDE_PDD11 0.01U 0.1U
IDA11 IDE_PDD12 0402 0402
IDA12 U9
ZUREQ IDE_PDD13 10% +80-20%
2
[6] ZUREQ N16 ZUREQ IDA13 Y8
ZDREQ N17 T10 IDE_PDD14 50V 16V
[6] ZDREQ ZDREQ IDA14
W9 IDE_PDD15 IDEAVSS
IDA15
SVDDZCMP R19 Y16 IDE_SDD0 IDE_PDD[0..15]
SZCMP_N VDDZCMP IDB0 IDE_SDD1 IDE_PDD[0..15] [15]
N18 ZCMP_N IDB1 V15
U14 IDE_SDD2
SZCMP_P IDB2 IDE_SDD3
R18 ZCMP_P IDB3 W14
SVSSZCMP P18 V13 IDE_SDD4
VSSZCMP IDB4 IDE_SDD5
IDB5 T13
Y13 IDE_SDD6
SZ1XAVDD IDB6 IDE_SDD7
U20 Z1XAVDD IDB7 Y12
SZ1XAVSS U19 W12 IDE_SDD8
Z1XAVSS IDB8 IDE_SDD9
IDB9 W13
SZ4XAVDD T20 U13 IDE_SDD10
SZ4XAVSS Z4XAVDD IDB10 IDE_SDD11
T19 Z4XAVSS IDB11 Y14
V14 IDE_SDD12
SZVREF IDB12 IDE_SDD13 +3VS
R20 W15
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
ZVREF IDB13
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
Y15 IDE_SDD14 R257 0_DFS

IDB14 IDE_SDD15 SZ1XAVDD
IDB15 U15 1 2
M18
M17
M16
M20
N19
H20
H19
H18
K18
K19
K17
K16
P20
IDE_SDD[0..15] 0402
L16
L20
L18
J18
SIS963 IDE_SDD[0..15] [15]

BGA335_36
1
B C237 C245 C226 B
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
10U/NA
ZAD16
0.01U 0.1U
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
0402 0402 1206

10% +80-20% 10V
2
50V 16V JL19
SZ1XAVSS 1 2
ZAD[0..16] JP_NET20
[6] ZAD[0..16]
+1.8VS
+3VS
1
+1.8VS L58 120Z/100M

1
R261 C243 L57 120Z/100M SZ4XAVDD 1 2

150 0.1U SVDDZCMP 1 2
0402 0402 1608
1% +80-20% R275 56 0603 1% 1608
2
1
16V SZCMP_N
2
1 2 C244 C236
1
SZVREF C228 C231 C225 0.01U 0.1U

0.01U 0.1U 10U/NA 0402 0402
SZCMP_P 0402 0402 1206 10% +80-20%
2
1 2
1
50ohm 1% 10% +80-20% 10V 50V 16V

2
JL18
1
R255 C235 R259 56 0603 1% 50V 16V JL17 SZ4XAVSS 1 2

49.9 0.1U SVSSZCMP 1 2
0402 0402 JP_NET20
1% +80-20%
2
JP_NET20
16V
2
JL20
1 2
JP_NET20
A A
Title
SIS963 (1/3)
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SIS963L (2/3)
U20B
H_INIT# T18 A8 OSC25MHI
[4,18] H_INIT# H_A20M# INIT# OSC25MHI OSC25MHO
[4] H_A20M# H_SMI#
P16
R17
A20M# OSC25MHO A9
A6 LAN_MTXC Need very close to 963
[4] H_SMI# SMI# MIITXCLK LAN_MTXC [17]
D
H_INTR R16 D
[4] H_INTR H_NMI INTR R298 1
[4] H_NMI Y20 NMI MIITXEN B6 2 0402 LAN_MTXE
LAN_MTXE [17]
OSC25MHI
H_IGNNE# U18 22
[4] H_IGNNE# H_FERR# IGNNE# OSC25MHO
[4] H_FERR# T17 FERR#
H_STPCLK# W20 R289
[4] H_STPCLK# SLP# STPCLK# R294
V19 CPUSLP# MIITXD0 E8 1 2 0402 LAN_MTXD0
LAN_MTXD0 [17] 1 2
[4] SLP# 22
Y19 D7 R288 1 2 0402 LAN_MTXD1 1M/NA 0402
APICCK MIITXD1 LAN_MTXD1 [17]
V18 22
APICD0 R291
W19 APTCD1 MIITXD2 C6 1 2 0402 LAN_MTXD2
LAN_MTXD2 [17] X6
22 1 2
LAD[0..3] B4 R300 1 2 0402 LAN_MTXD3
[18,20,21] LAD[0..3] MIITXD3 LAN_MTXD3 [17]
LAD0 V5 22
LAD0 25MHZ
1
LAD1 T7 Close to 963L chip C264 C266
+3V +3VS LAD2 LAD1
U6 10P 10P
LAD3 LAD2 LAN_MRXC 0402 0402
W5 LAD3 MIIRXCLK A7 LAN_MRXC [17] 5% 5%
2
LFRAME# W4 C7 LAN_MRXDV 50V 50V
PSON#_SB C281 [18,20,21] LFRAME# LFRAME# MIIRXDV LAN_MRXDV [17]
R248 1 2 10K 0402 LDRQ# U7
[21] LDRQ# LDRQ#
CPU_STP# R296 1 2 10K 0402 1 2 SERIRQ V6 C8 LAN_MRXER
GPIO16 [16,20,21] SERIRQ SIRQ MIIRXER LAN_MRXER [17]
R280 1 2 10K 0402
2
3
4
1
SMBDATA R309 1 2 4.7K 0402 12P RTC_X1 C2 D8 LAN_MRXD0
SMBCLK OSC32KHI MIIRXD0 LAN_MRXD0 [17]
R311 1 2 4.7K 0402 0603 X7 R312
5% 10M RTC_X2 D2 A5 LAN_MRXD1
OSC32KHO MIIRXD1 LAN_MRXD1 [17]
32.768KHZ 0603D
C282 LAN_MRXD2
1
MIIRXD2 B5 LAN_MRXD2 [17]
BATOK
2
1 2 D3 BATOK
PWROK LAN_MRXD3
[6,20] PWROK D1 PWROK MIIRXD3 A4 LAN_MRXD3 [17] PME#
12P R314
0603 1 2 C1 +3V
5% +VCC_RTC RTCVDD LAN_COL
MIICOL B7 LAN_COL [17]
E4 RTCVSS
1
100K E9 LAN_CRS
0402 MIICRS LAN_CRS [17]
R286
5% SMBDATA B2 C5 R292 1 2 LAN_DCLK JL22
[9,11] SMBDATA SMBCLK GPIO20 MIIMDC LAN_DCLK [17] CARD_PME# 4.7K
A1 22 0402 1 2 0402
[9,11] SMBCLK GPIO19 [16] CARD_PME#
R295 1 LAN_DATAIO JP_NET10
2
MIIMDIO E7 2 LAN_DATAIO [17]
AC97_SDIN A2 22 0402 PME#
[19] AC97_SDIN AC_SDIN0
MDC_SDIN D5 Close to 963L chip
C [17,21] MDC_SDIN AC_SDIN1 C
R30722 0402 B9 MIIAVDD JL23
AC97_SDOUT MIIAVDD MIIAVSS MPCI_PME#
[14,17,19,21] AC97_SDOUT 1 2 W2 AC_SDOUT MIIAVSS B8 [21] MPCI_PME# 1 2
AC97_SYNC 1 2 T5 F20 GPIO21_EESK
[17,19,21] AC97_SYNC AC_SYNC GPIO21(EESK)
D20 GPIO22_EEDI JP_NET10
AC97_RST# R306 22 0402 GPIO22(EEDI) GPIO23_EEDO
[17,19,21] AC97_RST# D6 AC_RESET# GPIO23(EEDO) E20
AC97_BITCLK Y1 C20 GPIO24_EECS
[17,19,21] AC97_BITCLK AC_BIT_CLK GPIO24(EECS) ENBKL_MASK
EEPROM FOR LAN GPIO0 V2 ENBKL_MASK [8]
Close to 963L chip
REFCLK1 FLASH
+3V
[11] REFCLK1 ENTEST
W3 OSCI GPIO1/LDRQ1# T8 FLASH [18] R0A
G5 ENTEST
SB_SPKR V3 T4 SB_THRM#
[14,19] SB_SPKR SPK GPIO2/THERM# SB_THRM# [20]
+3VS
SIS_PWRBTN# A14 T6 EXTSMI# RSMRST#
[20] SIS_PWRBTN# PWRBTN# GPIO3/EXTSMI# EXTSMI# [20]
1
PME# B14 PME#
1
R246 PSON#_SB D14 W1 CLKRUN# +3V
4.7K [20] PSON#_SB PSON# GPIO4/CLKRUN# CLKRUN# [16,21]
R348
0402 +3V AUXOK MPCI_PD 470/NA D19
A3 AUXOK GPIO5/PREQ5# U5 MPCI_PD [21]
5% TP533 1 ACPILED A15 0402 K A
U16 ACPILED SPK_OFF# 5%
2
GPIO6/PGNT5# U4 SPK_OFF# [19]

GPIO24_EECS
2
1 CS VCC 8
GPIO21_EESK 2 7 DPRSLPVR B1 C4 PRESCOTT RLS4148
SK NC1 [28] DPRSLPVR GPIO13 GPIO7 PRESCOTT [4]
1
GPIO22_EEDI 3 6 C209 R0A

GPIO23_EEDO DI NC0 LCD_ID0 WAKE_UP#
4 5 1U R0A [10] LCD_ID0 E5 C14 WAKE_UP# [20]
DO GND 0402 GPIO14 GPIO8/RING R301
+80-20% TP536 GMUXSEL SCI# AUXOK
2
NM93C46 1 E13 GPIO15 GPIO9/AC_SDIN2 E6 SCI# [20] 1 2 AUXOK [6]

SO8 6.3V
1
CPUPERF# GPIO16 A16 B3 CRT_IN#
[4] CPUPERF# GPIO16 GPIO10/AC_SDIN3 CRT_IN# [10]
1
1K R305 C274 C275 C272
TP535 1 D13 F5 STP_PCI# 0402 100K 10U 10U 0.1U
GPIO17 GPIO11 STP_PCI# [11] 0402
1% 1206 1206 0402
TP532 CPU_STP# 5% 10V 10V +80-20%
2
1 B15 GPIO18/PMCLK GPIO12 D4 CPU_STP# [11,28] 16V
2
SIS963
BGA335_36 +3VS DPSLP#
DPSLP# [4]
1
2 +3VS C270
3
R1
0.1U
0402 2 R1 Q29
Q14 +80-20% DTC144TKA
3
2
DTC144TKA 16V
1
B
R0A B
+3VA
+VCC_RTC
Q30 D21
MMBT3906L
E C K A
+3V
K
D20 RLS4148 R293 0_DFS

1
MIIAVDD
B
RLS4148 1 2
R315
1
47K R313 0402

0402
A
R316 1 2 BATOK
1
5% 10K C269
1
0402 10K 0402

2
C283 C288 0.1U

5% 1U 22U 0402
1
0402 1206 C279 +80-20%

2
C287 C285
+80-20% 6.3V R304 10U 16V JL21
2
1U 0.01U
6.3V 1K 0402 0402 1206 MIIAVSS 1 2
C
1
0402 +80-20% 10% 10V

2
R317 B Q31 1% 6.3V 50V JP_NET20

15K MMBT3904L
2
0402
5%
E
2
PLACE CLOSE TO 963L
RTC BATTERY
J19
A A
1
2
1.25MM/ST/MA-2
ACES
85205-0200
Title
SIS963 (2/3)
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SIS963L (3/3)
U20C
CLOSE TO 963 USBCLK_SB V4 G6
[11] USBCLK_SB USBCLK48M IVDD0 +1.8VS
IVDD1 H15
USBP0_P B18 L6
USBP0+ R263 UV0+ IVDD2
[18] USBP0+ 1 2 0_DFS 0402 USBP0_P USBP0_N C18 UV0- IVDD3 M15
USBP2_P E14 R10
USBP2_N UV2+ IVDD4
D D15 UV2- IVDD5 R14 D
USBP4_P E16 R6
USBP4_N UV4+ IVDD6 +3VS
E15 UV4-
USBP0- R264 1 2 0_DFS 0402 USBP0_N USBP1_P D18 F12 IVDD_AUX
[18] USBP0- USBP1_N UV1+ IVDD_AUX0
D19 F9 IVDD_AUX
USBP3_P UV1- IVDD_AUX1
E18 UV3+
1
USBP3_N F18 H6 C267 C262 C265 C284 C407 C408 C409 C410
UV3- OVDD0 +3VS
USBP5_P G18 K6 0.1U 0.1U 0.1U 0.1U 0.1U/NA 0.1U/NA 0.1U/NA 0.1U/NA
USBP5_N UV5+ OVDD1 0402 0402 0402 0402 0402 0402 0402 0402
G19 UV5- OVDD2 M6
+80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20% +80-20%
2
OVDD3 P6
USB_OC#0 G20 R11 16V 16V 16V 16V 16V 16V 16V 16V
USBP2+ [18] USB_OC#0 USB_OC#2 OC0# OVDD4
R268 1 2 0_DFS 0402 USBP2_P J16 R13
[21] USBP2+ [21] USB_OC#2 USB_OC#4 OC2# OVDD5
H17 R7 +3V R06
[18] USB_OC#4 USB_OC#1 OC4# OVDD6
[18] USB_OC#1 G17 OC1# OVDD7 R9
USB_OC#3 H16
[18] USB_OC#3 USB_OC#5 OC3#
+3V G16 F10
[21] USB_OC#5 OC5# OVDD_AUX0
1
USBP2- R267 R262
[21] USBP2- 1 2 0_DFS 0402 USBP2_N
OVDD_AUX1 F11 +3V C260 C263 C238 C538 C539
1 2 USBVDD D16 F14 10U/NA 0.1U 0.1U 0.1U 0.1U
USBVDD0 OVDD_AUX2 1206 0402 0402 0402 0402
F17 USBVDD1 OVDD_AUX3 F15
1
6.3V +80-20% +80-20% +80-20% +80-20%
2
C240 C239 OVDD_AUX4 F7
0_DFS 1U 0.1U B17 16V 16V 16V 16V
0402 0402 0402 USBVSS0
5% +80-20% +80-20% USBVSS
E19 USBVSS1 PVDD0 J6 +3VS R06
2
PVDD1 N6
6.3V 16V R12 +1.8V +1.8VS +VCC_CORE
USBP1+ R265 PVDD2
[18] USBP1+ 1 2 0_DFS 0402 USBP1_P H10 VSS0 PVDD3 R8
H11 VSS1
H12 VSS2 PVDD_AUX0 F13 +3V
1
H13 VSS3 PVDD_AUX1 F8 C222 C256 C259 C241 C242
H8 0.1U 0.1U 0.1U 0.1U 0.1U
USBP1- R266 VSS4
[18] USBP1- 1 2 0_DFS 0402 USBP1_N H9 VSS5 PVDDZ K15 +1.8VS
0402 0402 0402 0402 0402
+80-20% +80-20% +80-20% +80-20% +80-20%
2
J10 VSS6
J11 G15 16V 16V 16V 16V 16V
VSS7 VDDZ0 +1.8VS
J12 VSS8 VDDZ1 J15
J8 VSS9 VDDZ2 J19
J9 VSS10 VDDZ3 L15
K10 VSS11 VDDZ4 L19
K11 VSS12 VDDZ5 N15
USBP3+ R269 1 2 0_DFS 0402 USBP3_P K8 P19
[18] USBP3+ VSS13 VDDZ6
K9 VSS14
L10 VSS15 VTT0 P15 +VCC_CORE
L11 VSS16 VTT1 R15
L8 VSS17
C USBP3- R270 USBP3_N C
[18] USBP3- 1 2 0_DFS 0402 L9 VSS18 LREQ A19
M10 VSS19 LPS A20
M11 VSS20
M8 VSS21 LINKON C19
M9 VSS22 SCLK E11
N10
USBP4+
N11
VSS23
VSS24 CTL0 D11 USB Unused Ports
R271 1 2 0_DFS 0402 USBP4_P N12 C11 +3V
[18] USBP4+ VSS25 CTL1
N13 VSS26
N8 VSS27 D0 A12
N9 VSS28 D1 B12
C12 R354 10K/NA 0402 5%
USBP4- R272 D2 USB_OC#1
[18] USBP4- 1 2 0_DFS 0402 USBP4_N J13 VSSZ0 D3 D12 1 2
J17 VSSZ1 D4 E12
K12 A13 R355 10K/NA 0402 5%
VSSZ2 D5 USB_OC#4
K13 VSSZ3 D6 B13 1 2
L12 C13 +1.8V
VSSZ4 D7 R276 0_DFS
L13 VSSZ5
L17 C16 IVDD_AUX 1 2 USBP1_P R356 1 2 15K/NA 0402
USBP5+ R274 USBP5_P VSSZ6 IVDD_AUX2 USBP1_N R357
[21] USBP5+ 1 2 0_DFS 0402 M12 VSSZ7 IVDD_AUX3 C17 1 2 15K/NA 0402
1
M13 C247 C248 C246 USBP4_P R358 1 2 15K/NA 0402
VSSZ8 IPB_OUT0 USBP4_N R359
P17 VSSZ9 IPB_OUT0 B10 1 TP538
0.01U 0.1U 10U/NA 1 2 15K/NA 0402
A10 IPB_OUT1 1 0402 0402 0402JL24 1206
USBVDD IPB_OUT1 TP537 10% +80-20% 6.3V
15%
2
D17 USBVDD2 2
USBP5- R273 1 2 0_DFS 0402 USBP5_N E17 50V 16V
[21] USBP5- USBVSS USBVDD3
B19 USBVSS2 JP_NET20
F19 USBVSS3 NC1 B11
USBPVDD A18 A11
USBPVSS USBPVDD NC2
C15 USBPVSS NC3 E10
B20 USBREFAVDD NC4 D9
F16 USBREF NC5 C9
OSC12MHI B16 C10
[11] USB12M_SB OSC12MHO OSC12MHI NC6
A17 OSC12MHO NC7 D10
R277
1 2 SIS963
BGA335_36
+3V 1M/NA 0402
1
L59 120Z/100M X5
USBPVDD 1 2 1 2 R283
412
1
1608 C250 12MHZ/NA C249 0603
1
B C258 C251 20P/NA 20P/NA 1% B

0402 0402
2
0.1U 10U/NA
0402 1206 +/-10% +/-10%
2
+80-20% JL25 6.3V 50V 50V
2
USBPVSS 16V 1 2
JP_NET20
FOR USB 2.0 USED
Hardware Strap
+3VS
R197 1 2 10K/NA AC97_SDOUT

AC97_SDOUT [13,17,19,21]
0402
R302 1 2 10K SB_SPKR
SB_SPKR [13,19]
0402
Symbol 0 1 Default Notes

SB_SPKR (LPC addr mapping) disable enable 0 Internal Pull-down
AC97_SDOUT (Trap mode) ROM Reserved 0 Internal Pull-down
USB_OC4# (South bridge debug mode) enable disable 1
IPB_OUT0(MuTIOL clock PLL) enable disable 0 Internal Pull-down
A IPB_OUT1(MuTIOL operation mode select) Full-swing Partial-swing 0 Internal Pull-down A
AC97_SYNC (PCICLK PLL) enable disable 0 Internal Pull-down
Title
SIS963L (3/3)
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
IDE Interface
D D
IDE_PDD[0..15]
[12] IDE_PDD[0..15]
IDE_PDD7
J16
IDERST# 2 1
RESET# GND0
1
IDE_PDD7 4 3 IDE_PDD8
R297 IDE_PDD6 DD7 DD8 IDE_PDD9
6 DD6 DD9 5
5.6K IDE_PDD5 8 7 IDE_PDD10
DD5 DD10
Primary EIDE
0402 IDE_PDD4 10 9 IDE_PDD11 +3V +5VS +5VS +5VS
5% IDE_PDD3 DD4 DD11 IDE_PDD12
12 DD3 DD12 11
IDE_PDD2 IDE_PDD13
2
14 DD2 DD13 13
Connector
DD1 DD14
1
DD0 DD15 R363 R338 R337 R353
20 GND1 KEY 19
IDE_PDDREQ 22 21 150 150 10K/NA
[12] IDE_PDDREQ IDE_PDIOW# DMARQ GND3 62/NA 0402 0402 0402
[12] IDE_PDIOW# 24 DIOW# GND4 23
IDE_PDIOR# R210 0402 1% 1% 5%
[12] IDE_PDIOR# 26 DIOR# GND5 25 1%
IDE_PIORDY
2
28 IORDY CSEL 27 1 2
[12] IDE_PIORDY IDE_PDDACK#
[12] IDE_PDDACK# 30 29
A
IDE_IRQ14 DMACK# GND6 470 0402 5%
[12] IDE_IRQ14 32 INTRQ IOCS16# 31
IDE_PDA1 34 33 R362 D508 D507
[12] IDE_PDA1 IDE_PDA0 DA1 PDIAG# IDE_PDA2
36 35 0/NA
[12] IDE_PDA0 IDE_PDCS1# DA0 DA2 IDE_PDCS3# IDE_PDA2 [12] CL-190G CL-190G
38 37 0402
[12] IDE_PDCS1# HDD_LED# CS#0 CS#1 IDE_PDCS3# [12]
40 39 5%
DASP# GND7
42 DVDD AVCC 41
CAP#
K
44 GND2 RSV 43 [20] CAP# 1 2
1 0 2
FM/22PX2/2MM R347 0402 D32
ALLTOP CDROM_LED# 1
C17834-144XX 3
HDD_LED# 2
C C
+5VS BAT54A/NA
JS4 1 2 +5VS
SHORT-SMT4 R0A
+3VS +5VS 1 2 R346 0 0402 5%
Close to IDE Connector
CDROM/HDD LED
1
1
C291
1
1
R331 C201 C203 C319 0.1U
R327 10K 0.1U 0.1U 10U/NA 0402
10K 0402 0402 0402 1206 +80-20%
2
0402 5% +80-20% +80-20% 10V 16V
2
5% IDERST# 16V 16V
2
2
R1 Q33 L63 120Z/100M 1608

2
DTC144TKA
R0A T_CLK J20
[20] T_CLK 1 2
3
L64 120Z/100M 1608 1

PCIRST# R1 Q32 T_DATA
1
[8,12] PCIRST# 2 [20] T_DATA 1 2 2

DTC144TKA 3
2 1 4
1
SW_LEFT 4 3 5
5 6
TC010-PSS11CET SW504
297040105010 FPC/FFC/0.5MM/6P
SW_TC010-PS11CET ACES
T-MEC(台灣美琪) 2 1 20096-0600
IDE_SDD[0..15] 4 3
[12] IDE_SDD[0..15]
IDERST#
SW_RIGHT 5
TC010-PSS11CET SW503
K
CDROM_COMM 297040105010
CDROM_LEFT CDROM_COMM [19]
SW_TC010-PS11CET D23 D22
CDROM_RIGHT CDROM_LEFT [19] J22
T-MEC(台灣美琪)
CDROM_RIGHT [19]
W/S=10/10/10/10 mils 1
2
IDE_SDD7 J21 3
A
1 LOUT ROUT 2 4
3 4 ESD0805A/NA
ESD0805A/NA 5
Secondary EIDE Connector
AGND NC
1
5 6 IDE_SDD8 6
R328 IDE_SDD7 RESET# DD8 IDE_SDD9
B 7 DD7 DD9 8 7 B
5.6K IDE_SDD6 9 10 IDE_SDD10 8
0402 IDE_SDD5 DD6 DD10 IDE_SDD11
11 DD5 DD11 12 9
5% IDE_SDD4 13 14 IDE_SDD12 10
IDE_SDD3 DD4 DD12 IDE_SDD13
2
15 DD3 DD13 16 11
IDE_SDD2 17 18 IDE_SDD14 12
IDE_SDD1 DD2 DD14 IDE_SDD15
19 DD1 DD15 20
IDE_SDD0 21 22 IDE_SDDREQ
DD0 DIVARQ IDE_SDIOR# IDE_SDDREQ [12]
23 24 FPC/FFC/0.5MM/12P
IDE_SDIOW# GND DIOR# IDE_SDDACK# IDE_SDIOR# [12]
25 26 R0A ACES
[12] IDE_SDIOW# IDE_SIORDY DIOW# GND3 IDE_SDA2 IDE_SDDACK# [12]
27 28 20096-1200
[12] IDE_SIORDY IORDY DMACK# IDE_SDA2 [12]
IDE_IRQ15 29 30
[12] IDE_IRQ15 IDE_SDA1 INTRQ IOCS16# +5VS
[12] IDE_SDA1 31 DA1 PDIAG# 32
IDE_SDA0 33 34 JS5
[12] IDE_SDA0 IDE_SDCS1# DA0 DA2
35 36 SHORT-SMT4
[12] IDE_SDCS1# CDROM_LED# CS#0 CS#1
37 DASP# VCC2 38 1 2
39 VCC0 VCC3 40
41 VCC1 VCC4 42
43 GND1 GND4 44 Close to IDE Connector
45 GND2 GND5 46
1
CABLE_SEL 47 48 C314 C313 C318

CSEL# GND6
49 50 0.1U 0.1U 10U/NA
RSV RSV2 0402 0402 1206
1
+80-20% +80-20% 10V

2
GND1 GND7
R323 GND2 16V 16V
470/NA GND8
0402 K211-A503-507
5% MA/0.8MM/RA
SPEED
R0A
2
IDE_SDCS3#
[12] IDE_SDCS3#
A A
Title
IDE INTERFACE & IR
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PCMCIA (Ti PCI1410A)

PCMCIA CONTROLLER & CARDBUS SCOKET
AD20
D PCI_INTB# D
REQ0#/GNT0# PCIRST#
SIGNAL PC CARD PULL UP VOLT
CCD#1 +3V
+3VS CCD#2 +3V
VCCEN#0 CBLOCK# CARD_VCC
VCCEN#1 CSTOP# CARD_VCC
VPPEN0 CDEVSEL# CARD_VCC
VPPEN1 VCCA CTRDY# CARD_VCC
1
C301 C294 C305 C315 CVS1 +3V
0.1U 0.1U 0.1U 0.1U CVS2 +3V
0402 0402 0402 0402 CRST# CARD_VCC
102
122
138
1
+80-20% +80-20% +80-20% +80-20% CSERR# CARD_VCC
18
30
44
50
14
66
86
63
73
74
71
72
U22
16V 16V 16V 16V C308 CPERR# CARD_VCC
CINT# CARD_VCC
PCI_VCC0
PCI_VCC1
PCI_VCC2
PCI_VCC3
CORE_VCC0
CORE_VCC1
CORE_VCC2
CORE_VCC3
CORE_VCC4
CORE_VCC5
VCCD0#/VCC5#/SDAT
AUX_VCC
VCCD1#/VCC3#/SCLK
VPPD0/VPP_PGM/SLAT
VPPD1/VPP_VCC
0.1U
2
SKT_VCC0 90 0402 CIRDY# CARD_VCC
SKT_VCC1 126
16V
CREQ# CARD_VCC
PCI_AD[0..31] CSTSCHG# CARD_VCC
[12,21] PCI_AD[0..31] PCI_AD31 CAD31
3 AD31 CAD31 144 CAUDIO CARD_VCC
PCI_AD30 4 142 CAD30
PCI_AD29 AD30 CAD30 CAD29
5 AD29 CAD29 141
PCI_AD28 7 140 CAD28 PCI1410 HAVE INTEGRATED ALL PULL UP RES ABOVE
8 AD27 CAD27 139
10 AD25 CAD25 128
PCI_AD24 11 127 CAD24
15 AD23 CAD23 124
PCI_AD22 16 121 CAD22
17 AD21 CAD21 120
PCI_AD20 19 118 CAD20
23 AD19 CAD19 116
PCI_AD18 24 115 CAD18
25 AD17 CAD17 113
38 AD15 CAD15 96
40 AD13 CAD13 93
C PCI_AD11 AD12 CAD12 CAD11 VCCA C
43 AD11 CAD11 92
46 AD9 CAD9 89
PCI_AD8 47 87 CAD8
49 AD7 CAD7 85
PCI_AD6 51 82 CAD6
AD6 CAD6
1
PCI_AD5 52 83 CAD5
PCI_AD4 AD5 CAD5 CAD4 C306
53 AD4 CAD4 80
PCI_AD3 54 81 CAD3
PCI_AD2 AD3 CAD3 CAD2 0.1U
2
55 AD2 CAD2 77 0402
PCI_AD1 56 79 CAD1 J502
PCI_AD0 AD1 CAD1 CAD0 16V
57 AD0 CAD0 76 1 GND[0] GND[2] 35
CAD0 2 36 CCD#1
PCI_C/BE#3 CAD1 CAD0 CCD1# CAD2
12 C/BE3# 3 CAD1 CAD2 37
[12,21] PCI_C/BE#3
1
PCI_C/BE#2 27 108 CCLK CAD3 4 38 CAD4 C316
[12,21] PCI_C/BE#2 PCI_C/BE#1 C/BE2# CCLK CFRAME# CAD5 CAD3 CAD4 CAD6
37 111 5 39 270P
[12,21] PCI_C/BE#1 C/BE1# CFRAME# CAD5 CAD6
Card Bus Socket

PCI_C/BE#0 48 110 CIRDY# CAD7 6 40 R2_D14 0402
[12,21] PCI_C/BE#0 C/BE0# CIRDY# CTRDY# CCBE#0 CAD7 RFU[1] CAD8 +/-10%
2
CTRDY# 109 7 CCBE0# CAD8 41
PCI_AD20 R320 1 100 2 0402 1% 13 107 CDEVSEL# CAD9 8 42 CAD10 50V
PCICLK_CARD IDSEL CDEVSEL# CSTOP# CAD11 CAD9 CAD10 CVS1
[11] PCICLK_CARD 21 PCI_CLK CSTOP# 105 9 CAD11 CVS1 43
PCI_DEVSEL# 32 101 CPAR CAD12 10 44 CAD13
[12,21] PCI_DEVSEL# PCI_FRAME# DEVSEL# CPAR CPERR# CAD14 CAD12 CAD13 CAD15
[12,21] PCI_FRAME# 28 FRAME# CPERR# 104 11 CAD14 CAD15 45
PCI_IRDY# 29 133 CSERR# CCBE#1 12 46 CAD16
[12,21] PCI_IRDY# PCI_TRDY# IRDY# CSERR# CREQ# CPAR CCBE1# CAD16 R2_A18
31 TRDY# CREQ# 123 13 CPAR RFU[2] 47
[12,21] PCI_TRDY# PCI_STOP# CGNT# CPERR# CBLOCK#
[12,21] PCI_STOP# 33 STOP# CGNT# 106 14 CPERR# CBLOCK# 48
PCI_PAR 36 132 CINT# VPPA CGNT# 15 49 CSTOP#
[12,21] PCI_PAR PCI_PERR# PAR CINT# CBLOCK# CINT# CGNT# CSTOP# CDEVSEL#
[12,21] PCI_PERR# 34 PERR# CBLOCK# 103 16 CINT# CDEVSEL# 50
PCI_SERR# 35 136 CCLKRUN# R322 17 51 VPPA
[12] PCI_SERR# PCI_REQ0# SERR# CCLKRUN# VCC0 VCC1
1 119 CRST# 1 2 18 52
[12] PCI_REQ0# REQ# CRST# VCCA CCLK VPP1 VPP2 CTRDY#
PCI_GNT0# 2 143 R2_D2 19 53
[12] PCI_GNT0# PCIRST# GNT# R2_D2 R2_D14 CIRDY# CCLK CTRDY# CFRAME#
[8,12] PCIRST# 20 RST# R2_D14 84 20 CIRDY# CFRAME# 54
1
+3VS 100 R2_A18 10K CCBE#2 21 55 CAD17
CARD_PME# R2_A18 CVS1 0402 C303 CAD18 CCBE2# CAD17 CAD19
[13] CARD_PME# 59 RI_OUT#/PME# CVS1 131 22 CAD18 CAD19 56
R324 1 2 10K 70 117 CVS2 5% CAD20 23 57 CVS2
0402 SUSPEND# CVS2 CCD#1 0.1U VCCA CAD21 CAD20 CVS2 CRST#
2
[19] CARDSPK# 62 SPKR_OUT# CCD1# 75 0402 24 CAD21 CRST# 58
5% 137 CCD#2 CAD22 25 59 CSERR#
CLKRUN# CCD2# CAUDIO 16V CAD23 CAD22 CSERR# CREQ#
[13,21] CLKRUN# 69 MF6 CAUDIO 134 26 CAD23 CREQ# 60
68 135 CSTSCHG CAD24 27 61 CCBE#3
MF5 CSTSCHG CAD24 CCBE3#
1
PCI_LOCK# 67 CAD25 28 62 CAUDIO
[12] PCI_LOCK# SERIRQ MF4 CCBE#3 R318 CAD26 CAD25 CAUDIO CSTSCHG
[13,20,21] SERIRQ 65 MF3 CC/BE3# 125 29 CAD26 CSTSCHG 63
64 112 CCBE#2 47K CAD27 30 64 CAD28
B MF2 CC/BE2# CCBE#1 0402 CAD29 CAD27 CAD28 CAD30 B
61 MF1 CC/BE1# 99 31 CAD29 CAD30 65
60 88 CCBE#0 5% R2_D2 32 66 CAD31
[12] PCI_INTB# MF0 CC/BE0# RFU[0] CAD31
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
CCLKRUN# CCD#2
2
33 CCLKRUN# CCD2# 67
34 GND[1] GND[3] 68
1
C289
114
130
G1 GND1 270P
22
42
58
78
94
PCI1410A G1 GND1 0402

6
G2 G2 GND2 GND2
PQFP144_0.5MM +/-10%
2
G3 G3
G4 50V
G4
G5 G5
G6 G6
G7 G7
G8 G8
0.6/H5.5/68P
TAI-SOL
146-1001210-02
U21
VCCEN#0 1 16
VCCEN#1 VCCD0 SHDN +3VS
2 15 VPPEN0
+3VS VCCD1 VDDP0 VPPEN1
3 3.3VA VDDP1 14
4 3.3VB AVCCA 13 VCCA
+5VS 5 12
5VA AVCCB
6 5VB AVCCC 11
Close to TPS2211 7 GND AVPP 10 VPPA
8 OC 12V 9
1
+12VS
C300 C299 C297 C298 TPS2211A SSOP16
0.1U 0.1U 0.1U 0.1U
2
0402 0402 0402 0402

16V 16V 16V 16V Close to
1
C309 C310 C311 C312 C307

TPS2211A
C304
0.1U 4.7U/NA 0.1U 4.7U/NA
0.1U 0.1U 0402 1206 0402 1206
2
0402 0402 16V 16V 16V 16V

A A
16V 16V
Title
PCMCIA (Ti PCI1410A)
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
LAN PHY (ICS1883AF) & MDC

D D
+3V
1
C53 C42
0.1U 0.1U +3V
0402 0402 PHY ADDRESS = 00001 CLOSE TO ICS1883AF
+80-20% +80-20%
2
16V 16V R35 L24
1 2 L23 120nH 1608 90Z/100M
+3V
1 2
4
10K
2
0402
13
14
20
24
33
45
48
7
U5 R34 R29
LAN_MRXD0 31 1 62 62
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD67
[13] LAN_MRXD0 LAN_MRXD1 RXD0 POAC 0402 0402
3
[13] LAN_MRXD1 30 RXD1 P2LI 4
LAN_MRXD2 29 3 1% 1%
[13] LAN_MRXD2 LAN_MRXD3 RXD2 P1CL U4
1
28 6
[13] LAN_MRXD3
LAN_MRXDV
RXD3 P3TD
P4RD 8 Layout Note: TXD+ R31 1 2 0/NA 0402
LAN_CT
6 TD+ TX+ 11 PJTX+
[13] LAN_MRXDV 32 RXDV 7 TDC CMT 10
5
6
7
8
LAN_MRXER TXD- PJTX-
[13] LAN_MRXER LAN_MRXC R53
35 RXER 二組各自平行走線等長 R30 1 2 0/NA 0402 8 TD- TX- 9
[13] LAN_MRXC 1 2 22 0402 34 RXCLK 10/100 9 RP3
RXIN+ PJRX+
LAN_MTXD0 RXIN- 10K*4 二組中間須絕緣, EX: GND SHIELDING R44 1 2 0/NA 0402 1 RD+ RX+ 16
[13] LAN_MTXD0 39 TXD0 TP_RXN 19 1206 2 RDC RXC 15
LAN_MTXD1 RXIN+ RXIN- R50 2 0/NA 0402 PJRX-
[13] LAN_MTXD1 LAN_MTXD2
40 TXD1 TP_RXP 18
+3V
S/W/W/S=10/8/8/10 mils 1 3 RD- RX- 14
[13] LAN_MTXD2 41 TXD2
LAN_MTXD3
[13] LAN_MTXD3 42 TXD3 as short as possible 4 NC0 NC2 12
1
TXD- C44
4
3
2
1
TP_TXN 12 5 NC1 NC3 13
1
LAN_MTXE 38 11 TXD+ 1 2 R45 R42 PJ4
[13] LAN_MTXE TXEN TP_TXP
1
LAN_MTXC R51 1 2 22 0402 37 R55 C28
[13] LAN_MTXC TXCLK 10K 62 62 LF_H41S
0.01U PJ7
LAN_DCLK 0402 0402 0402 SOX16
R65 2 22 0402 4.7P 0402
2
[13] LAN_DCLK 1 27 MDC
LAN_DATAIO R69 1% 0603 1% 1% 10%
2 22 0402 L25
2
[13] LAN_DATAIO 1 26 MDIO
LAN_COL 100TCSR 90Z/100M 50V
2
[13] LAN_COL 43 COL 100TCSR 16
1
LAN_CRS 10TCSR C40
[13] LAN_CRS 44 CRS 10TCSR 15 R0A 0.1U R48 R49 R47 R46
CLOSE TO LAN PHY
1
C 0402 75 75 75 75 C
22 RESET_N R52 R56 16V 0402 0402 0402 0402
1
2K 1.5K
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
+3V 46 1% 1% 1% 1%
R66 REF_OUT 0402 0402
2
47 REF-IN
1 2 1% 5%
2
ICS1883AF CLOSE TO
10
17
21
23
25
36
1
1.5K C41
2
5
X1 SSOP48
0402 1 2 ICS1883AF 1000P
R345 1808
R68 3KV
2
25MHZ 1 2 10%
1 2
1
10K C49 C39 C38 0_DFS GNDL_45

0402 1U 22P 22P 0805
0402 0603 0603
+80-20% 5% 5%
2
6.3V
+3VS +5VS J7
J15 8
MONO_OUT R183 0/NA 0402 PJ7 PJ7
[19] MONO_OUT 1 2 7 PJ8
3 4 1 2 MODEM_SPK PJRX- 6
Modem Dougther Board
MODEM_SPK [19,21] RX-

5 6 5 PJ4
7 8 PJ4 4 PJ5
1
9 10 C158 PJRX+ 3
+3V +3VS TIP PJTX- RX+
11 12 1U 2
R192 4.7K 0402 0402 PJTX+ TX-
13 14 1 TX+
+80-20%
2
B 15 16 1 2 B
1
17 18 6.3V CLOSE TO CONN. C3 A1 A1
J5 1000P TIP A1
19 20 CLOSE TO MDC A2 A2
1
AC97_SYNC 1808 RING
21 22 AC97_SYNC [13,19,21] 1 3KV A3 A3
1
AC97_SDOUT R198 1 2 22 0402 MDC_SDIN L19 JS1 A4
2
[13,14,19,21] AC97_SDOUT 23 24 MDC_SDIN [13,21] 2 10% A4 A4
AC97_RST# 25 26 R202 1 2 22 0402 400UH S1 1 2
[13,19,21] AC97_RST# Protector/NA
27 28 GND1 GND1
2
R208 1 2 22 0402 AC97_BITCLK 1.25MM/ST/MA-2 C2 SHORT-SMT4
2
29 30 AC97_BITCLK [13,19,21] GND2 GND2
1
C167 ACES 1808A 1000P

85205-0200 1808
2
1U FM/0.8MM/H8.4 RJ45/RJ11
0402 3KV
1
AMP 3-1473293-0 F1 ALLTOP
1
+80-20% J17 10% RING

2
C182 1 2 GND_45 GNDL_45 GND_45 C10060-104XX

6.3V 10P/NA 1 A1
0402 2 MINISMDC110/NA
5%
2
CLOSE TO MDC 3
R5
50V 4 A4
1 2
1.25MM/ST/MA-4/NA
ACES 0
MDC HARDWARE STRAP 85205-0400 0402
HIGH LOW 5%
PIN 16 AUDIO CODEC ON MOTHER BD AUDIO CODEC ON DAUGHTER BOARD
A A
Title
LAN PHY (ICS1883AF) & MDC
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
USB 2.0 & Flash ROM

+3VS +VCC_CORE
LPC BIOS ROM
1
R333 R336
1.5K 10K
D D
U23 0402 0402
R325 1 100 2 0402 1% 6 2 LPC_RST# 5% 5%
FGPI0 RST# LPC_RST# [12]
R326 100 0402 1%
C2
1 2 5 FGPI1 WP# 7
R329 1 100 2 0402 1% 4 8 FLASH
FGPI2 TBL# FINIT# FLASH [13]
R330 1 100 2 0402 1% 3 24 B Q34
R332 100 0402 1% FGPI3 INIT# MMBT3904L
1 2 30 FGPI4
29 R334 1 10K 2 0402 H_INIT#
LAD0 IC(VIL) H_INIT# [4,13]
E
13 5%
LAD1 FWH0 PCICLK_FWH
14 FWH1 CLK 31 PCICLK_FWH [11]
LAD2 15
LAD[0..3] LAD3 FWH2 +3VS
[13,20,21] LAD[0..3] 17 FWH3
LFRAME# 23 1 1
[13,20] LFRAME# FWH4 VPP TP548
18 RFU_0 VCC0 25
19 RFU_1 VCC1 32
20 RFU_2
21 RFU_3 VCCA 27 1 TP550
22 RFU_4
1
TP542 1 12 ID0 GND0 26 1 TP549
1 11 16 R146
TP543 ID1 GND1 10K
TP546 1 10 ID2
1 9 28 0402
TP544 ID3 GNDA 5%
2
82802AB/AC
PLCC32 R0A
USB4VCC5 USB3VCC5
C C
1
1
1
R16 R18
+ C12 + C14
1
U1 10K C17 U2 10K C18
220U 220U
3 1 0402 0.1U 10V 3 1 0402 0.1U 10V
+5V VIN0 VOUT0 1% 0402 +5V VIN0 VOUT0 1% 0402
20% 20%
GND
GND
USB_OC#4 +80-20% USB_OC#3 +80-20%
2
4 VIN1 VOUT1 5 [14] USB_OC#4 4 VIN1 VOUT1 5 [14] USB_OC#3
16V 16V
1
1
C22 RT9701-CBL C24 RT9701-CBL
1
1
R19 R17
2
2
1U SOT25 C21 GND_USB GND_USB 1U SOT25 C20 GND_USB GND_USB
0402 1000P 560K 0402 1000P 560K
+80-20% 0402 0402 +80-20% 0402 0402
2
2
6.3V 10% 1% 6.3V 10% 1%
2
2
50V 50V
2
2
R12 0/NA 0402
R8 0/NA 0402 USBP3-
USBP4- 1 2
USB 2.0 [14] USBP3- 1 2
USB 2.0
[14] USBP4-
J3 J4
B1 A1 USB1VCC5 B1 A1 USB0VCC5
B1 A1 B1 A1
2
3
B2 A2 USB1- B2 A2 USB0-
B2 A2 USB1+ B2 A2 USB0+
B3 B3 A3 A3 B3 B3 A3 A3
B4 B4 A4 A4 B4 B4 A4 A4
90Z/100M 90Z/100M
L15 L17
1
4
GND1 GND1 GND1 GND1
R7 0/NA 0402 GND2 R11 0/NA 0402 GND2
USBP4+ GND2 USBP3+ GND2
[14] USBP4+ 1 2 GND3 GND3 [14] USBP3+ 1 2 GND3 GND3
GND4 GND4 GND4 GND4
4PX2/RA 4PX2/RA
TYCO TYCO
1470748 1470748
B B
JS501 JS502
1 2 1 2
SHORT-SMT4 SHORT-SMT4
GND_USB GND_USB
1
1
R6
R20 10K
10K 0402
0402 1%
1% USB_OC#0
2
USB_OC#1 [14] USB_OC#0
2
[14] USB_OC#1
1
USB0VCC5
1
1
USB1VCC5 C11 R15 USB0-
1
C27 R22 USB1- 1000P 560K USB0+
1
1000P 560K USB1+ 0402 0402 C10
+ C15
1
0402 0402 10% 1%
2
C19 0.1U 220U
10% 1% + C13 50V 0402
2
2
0.1U 220U 10V
50V 0402 +80-20% 20%
2
2
10V
+80-20% 20% 16V
2
2
16V
2
GND_USB GND_USB
GND_USB GND_USB
R14 0/NA 0402
R10 0/NA 0402 USBP0- 1 2
USBP1- [14] USBP0-
1 2
[14] USBP1-
3
2
L18
L16
90Z/100M
90Z/100M
4
1
A USBP0+ 1 2 A
USBP1+ [14] USBP0+
1 2
[14] USBP1+ R13 0/NA 0402
R9 0/NA 0402
Title
USB 2.0 & Flash ROM
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
AUDIO CODEC
L31 120Z/100M 1608
D
SPKR_ROUT+ 1 2 D
SPKR_ROUT- 1 2 J8
1
L29 120Z/100M 1608 2 ACES +3VS AVDDAD U15
3 85205-0400 L78L05ACU +12VS
L27 120Z/100M 1608 4 L50 120Z/100M 1608 U11 L53 120Z/100M 1608 SOT89N
SPKR_LOUT+ 1 2 1 2 1 25 1 2 1 3
SPKR_LOUT- DVCC1 AVCC1 O I
1 2 1.25MM/ST/MA-4 9 DVCC2 AVCC2 38 Close to Codec
1
C179 C166 C172
GND
1
1
L26 120Z/100M 1608 0.1U 0.1U 0.1U 4 26 C185
DGND1 AGND1 C175 C176 10U
0402 0402 0402 7 42 0.1U 0.1U
DGND2 AGND2 0805
1
+80-20% +80-20% +80-20% 0402 0402
2
10V C194 C190
16V 16V 16V +80-20% +80-20%
2
+80-20% 0.1U 0.1U Close to L78L05ACU
CLOSE TO CODEC 16V 16V 0402 0402
Audio Codec
ID1 46
AC97_SYNC +80-20% +80-20%
2
[13,17] AC97_SYNC 10 SYNC ID0 45
AC97_SDIN R308 1 2 22 0402 8 16V 16V
[13] AC97_SDIN ACSDOUT SDATA_IN EAPD
[13,14,17,21] AC97_SDOUT 5 SDATA_OUT EAPD 47
AC97_RST# 11 AGND AGND
[13,17,21] AC97_RST# RESET#
AC97_BITCLK R310 1 2 22 0402 6
[13,17] AC97_BITCLK BIT_CLK AOUT_L
LINE_OUT_L 35
36 AOUT_R
C125 1 2 1U 0402 14 AUX_L
LINE_OUT_R close to MTG8
C124 1 2 1U 0402 15 37 C169 1 2 1U/NA 0402 MONO_OUT
AUX_R MONO_OUT MONO_OUT [17]
39 C177 1 2 1U 0402
C123 1 LNL/SR_OUT_L
2 1U 0402 16 VIDEO_L LNL/SR_OUT_R 41 C178 1 2 1U 0402 L51 120Z/100M 1608
C122 1 2 1U 0402 17 1 2
VIDEO_R
SPDIF_OUT 48
28 VREF_OUT
CDROM_LEFT R141 1 330 VREF_OUT
[15] CDROM_LEFT 2 0402 5% C121 1 2 1U 0402 18 CD_L AGND
CDROM_RIGHT R138 1 330 2 0402 5% C119 1 2 1U 0402 20 27
[15] CDROM_RIGHT CD_R VREF
CDROM_COMM C120 1 2 1U 0402 19
[15] CDROM_COMM CD_GND
1
32 L36 120Z/100M 1608
CAP2
1
R140 C115 R139 C114 44 1 2
LFE_OUT
1
100K 2700P/NA 100K 2700P/NA C118 1 2 1U 0402 23 C159 C146 C153
LINE_IN_L 10U C162 10U C142 C156
JL12 0402 0603 0402 0603 C132 1 2 1U 0402 24 31 0.1U 0.1U 1U 0.1U
+80-20% 5% +80-20% LINE_IN_R NC0 0805 0805
5% 0402 0402 0402 0402
2
1 2 NC1 33 10V 10V AGND
+80-20% +80-20% +80-20% +80-20%
2
2
NC2 34 +80-20%
JP_NET20 PCBEEP 12 40 16V 16V 16V L52 120Z/100M 1608
MIC C112 1 PC_BEEP NC3
AGND 2 1U 0402 21 MIC1 CENTER_OUT 43 1 2
C111 1 2 1U 0402 22
MODEM_SPK C127 1 MIC2
[17,21] MODEM_SPK 2 1U/NA 0402 13 PHONE AFLT1 29 R0C
C C
AFLT2 30 R0C AGND AGND
R0A
1
2 XTAL_IN XTAL_OUT 3 C157 C154
270P 270P L40 120Z/100M 1608
AGND VT1616 0402 0402 1 2
R172 +/-10% +/-10%
2
PQFP48_0.5MM
0/NA 50V 50V
0402 AGND_C
5%
R187 AVDDAD AVDDAD
VREF_OUT 2 1 L39 0603D Microphone Jack 1 2
AGND
BEAD_600Z/100M
1
AVDDAD 1 2 1 2 6 J11 1M 0402 5%
1
7 X2 R195 C174
1
R160 5 1 2 10K 0.1U

1
2.2K R204 C134 C107 C317 4 0402 0402
1
0402 2.2K 1U/NA 5% +80-20%
2
1000P 1000P 3 C160 24.576MHZ C143
5% 0402 0402 0402 0402 C126 R205 16V
2
22P 22P
1
5% 10% 10% 0603 0603 PCBEEP

2
1 2 1 2 AGND
5
50V R100 50V JACK-5P-R/A-W9.1 5% 5% U14
2
C
0_DFS AGND_C ST-28M-F60 Q21 1 SB_SPKR
0603 SB_SPKR [13,14]
AGND AGND AGND 331840005013 1U 47K B 4
CONN_JACK_ST28MF60 0402 0402 MMBT3904L 2 CARDSPK#
CARDSPK# [16]
6.3V
2
Internal Microphone
1
E
+80-20% AHC1G86DBV
R148 R321
3
AGND_C SOT25
MIC501 10K 10K
1 0402 0402
+ 5% 5%
1 2 2 -
2
L62 0603D D6/H2.2
BEAD_600Z/100M C137 R159
FM-10B1P-07 AGND AGND
1 2 1 2 MINIPCI_SPKR# [21]
R193 20K 0402 1%
1 2 C136 1U 47K
SPKR_LOUT- 0402 0402
+
1 2
1 2 6.3V
1
+80-20%
R189 47K 0402 5% 220U R144
R151 47K 0402 5% 10V 1K
B 1 2 +5VS 20% 0402 B
1%
W=10mils
2
1 2
2
as short as possible R149 20K 0402 1% JO3 AGND
平行走線等長 SHORT-SMT4 +5VS_AMP
C117 1U 0402 R150 20K 0402 1% U10 close to LM4873

1
AOUT_L 1 2 1 2 9 4
-INA2 VDD0
1 2 6 -INA VDD1 17
1
8 C164
+INA C181 C173 C171 10U
6.3V+80-20% R147 33K 0402 5% 5 SPKR_LOUT- 0.1U 1000P 0.1U
-OUTA SPKR_LOUT+ 0805
14 3 0402 0402 0402 10V
R191 20K 0402 1% BYPASS +OUTA +80-20% 10% +80-20%
2
2
+80-20%
C165 1U 0402 1 2 11 16 SPKR_ROUT- 16V 50V 16V L45 0603D
AOUT_R -INB2 -OUTB SPKR_ROUT+ BEAD_600Z/100M L41 120Z/100M 1608
1 2 1 2 15 -INB +OUTB 18
13 +INB AGND 1 2 6 J14
R188 33K 0402 5% 1 2 7
6.3V+80-20% 5
HP_SENSE 10 2
W=10mils 1 2 4
SHUTDOWN MUXCTRL GND0
1 SHUTDOWN GND1 7 as short as possible 1 2 3
1
20 19 L49 0603D C109 C108
HP-IN GND2 +5VS_AMP
12 NC GND3 21 二組各自平行走線等長 BEAD_600Z/100M 100P 100P L38
SPK_OFF# EAPD Shutdown 0402 0402 120Z/100M/NA JACK-5P-R/A-W9.1
10% 10% 1608 ST-28M-F60
2
LM4873MTE
1
TSSOP20_MXA20A 50V 50V AGND AGND_C 331840005007
HI HI LOW AGND R145 AGND_C AGND_C CONN_JACK_ST28MF60
1
C320 C130
10U 1U 100K
0805 0402
HI LOW HI 10V 0402 R143
10V 5%
2
2
+80-20%
+80-20% HP_SENSE 2 1
LOW HI HI
1
C113 100K
+5VS_AMP C170 0.1U 0402
LOW LOW HI SPKR_ROUT- 0402 5%
R02
+
1 2
+80-20%
2
1
AGND 16V
1
220U R185
A
" High Shutdown " R152 R196 10V 1K AGND A
100K 100K 20% 0402
R02 0402 0402 1%
5% 5%
2
2
SHUTDOWN Q20
AGND
D
D33
2N7002
1
C321 D 2 EAPD
10P S G 3
0402 1 SPK_OFF# SPK_OFF# [13]
5%
S
2
50V
BAT54A
Title
AUDIO CODEC
AGND AGND
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
5 4 3 2 1
KBC (W83L950D) [13,18,21] LAD[0..3]

LAD[0..3]
[11] PCI_KBCLK
[13,16,21] SERIRQ
PCI_KBCLK
SERIRQ
LAD3
LAD2
LAD1
70
69
68
67
66
U17
GP80/SD0
GP81/SD1
GP82/SD2
GP83/SD3
GP51/INT20#/S0
GP47/SRDY1#/S1
GP44/RXD
16
18
21
20
BATT_DEAD
PWR_ON
NUM#
CAP#
BATT_DEAD [24]
PWR_ON [25,26]
LAD0 GP84/SD4 GP45/TXD CAP# [15]

65 GP85/SD5
+5VS +5VA KBC_LRST# 64 9 T_DATA
[12] LPC_RST# LFRAME# GP86/SD6 GP70/SIN2 T_DATA [15]
63 8 LEARNING#
[13,18,21] LFRAME# GP87/SD7 P71/SOUT2 LEARNING# [23]
7 SIS_PWRBTN#
MAINPWR GP72/SCLK2 T_CLK SIS_PWRBTN# [13]
17 6
+3VA 30mil +KBC_VDDA
1
RP39
8 BAT_CLK
[25]
[6]
[24]
MAINPWR
S3AUXSW#
ADEN#
S3AUXSW#
ADEN#
15
14
GP50/A0
GP52/INT30#/R
GP53/INT40#/W
GP73/SRDY2#/INT21
GP74/INT31
GP75/INT41
5
4
PWROK
PSON#_SB
T_CLK [15]
PWROK [6,13]
PSON#_SB [13]
2 7 BAT_DATA SW_+5VA 23
T_DATA [24] SW_+5VA COVER_SW# GP42/INT0/OBF00
L56 120Z/100M 1608 3 6 22 38 SB_THRM#
D
T_CLK SCI GP43/INT1/OBF01 GP20/FD0/LPCEN WAKE_UP# SB_THRM# [13] D
1 2 4 5 19 GP46/SCLK1/OBF1 GP21/FD1 37 WAKE_UP# [13]
36 BATT_G#
GP22/FD2/SDA1/RXD1 BATT_R#
GP23/FD3/SCL1/TXD1 35
+3VA 10K*4 BAT_DATA 3 34 EXTSMI#
BAT_CLK GP76/SDA GP24/FD4 BATT_POWER# EXTSMI# [13]
1206 2 33
GP77/SCL GP25/FD5 SCROLL# +KBC_VDDA
PSON#_SB S3AUXSW# STATUS GP26/FD6 32
R343 10K 1 2 0402 LEARNING# FAN0 27 31 AC_POWER#
R250 10K 1 POWERBTN# FAN1 GP40/XOUT/PWM2 GP27/FD7
2 0402 26 GP41/XCIN/PWM3
3
1->0 1 POWER ON
BATTRY_TYPE 13 11 BLADJ D15
[22] BATTRY_TYPE GP54/CNTR0 GP56/DA1/PWM01 CHG_I BLADJ [10]
0->1 0 STR +3V 12 10
J501 GP55/CNTR1 GP57/DA2/PWM11 CHG_I [22] BAV70LT1
0->1 1 STD/SOFT OFF KO0 POWERBTN#
1
KO1
54 GP0/P3REF/FA0 GP60/AN0/INT5 1
VRMPWRGD Come From Battery
Internal Keyboard Connector

RP40 RP36 33*4
2
1 8 2 53 GP1/FA1 GP61/AN1/INT6 80 VRMPWRGD [28]
1->0 1 S3 Resume 10K*4 2 7 3 KO2 52 79 1206
PWROK KO3 GP2/FA2 GP62/AN2/INT7 BAT_TEMP +3V BAT_T
1206 3 6 4 51 78 1 8
SIS_PWRBTN# KO4 GP3/FA3 GP63/AN3/INT8 BAT_VOLT BAT_V BAT_T [24]
4 5 5 50 GP4/FA4 GP64/AN4/INT9 77 2 7 BAT_V [24]
6 KO5 49 76 I_LIMIT BAT_CLK 3 6 BAT_C
GP5/FA5 GP65/AN5/INT10 I_LIMIT [22] BAT_C [24]
1
R244 10K/NA
1 2 0402 SB_THRM# 7 KO6 48 75 I_CHG C223 C224 BAT_DATA 4 5 BAT_D
WAKE_UP# KO7 GP6/FA6 GP66/AN6/INT11 I_DISCHG I_CHG [24] BAT_D [24]
R243 10K/NA
1 2 0402 8 47 74 0.1U 0.1U
EXTSMI# KO8 GP7/FA7 GP67/AN7/INT12 I_DISCHG [24]
R242 10K/NA
1 2 0402 9 46 0402 0402
R344 10K 1 0402 COVER_SW# KO9 GP10/FA8 +80-20% +80-20%
2
2 10 45 GP11/FA9
11 KO10 44 25 RESET# 16V 16V
RP27 KI0 KO11 GP12/FA10 RESET#
1 8 12 43 GP13/FA11
10K*4 2 7 KI1 13 KO12 42 28 XIN
1206 KI2 KO13 GP14/FA12 XIN
3 6 14 41 GP15/FA13
4 5 KI3 15 KO14 40 29 XOUT
RP24 KI4 KO15 GP16/FA14 XOUT
1 8 16 39 GP17/FA15
10K*4 2 7 KI5 17 +3VA +KBC_VDDA 1 1M 2
1206 3 6 KI6 18 KI0 62 72 R247 0402 5%
KI7 KI1 GP30/PWM0/FCTRL0 VREF
4 5 19 61 X4
KI2 GP31/PWM10/FCTRL1
20 60 GP32/FCTRL2 VCC 71 1 2
21 KI3 59 GP33/FCTRL3#
1
22 KI4 58 C218 C219 C217 C221
KI5 GP34/BANK0 8MHZ
23 57 30 0.1U/NA 0.1U 22P 22P
KI6 GP35/BANK1 VSS 0402 0402 0603 0603
24 56 GP36/CE# AVSS 73
KI7 5% 16V 5% 5%
2
25 55 GP37/OE# CNVSS 24
26 50V +80-20%
W83L950D
FPC/FFC/1MM/26P PQFP80_0.5MM
C ACES C
CPU_FAN Control 85202-26-05
+3VA
+5VS Signal HI LOW
Close to AO3403
FAN0 FAN ON FAN OFF
1
VDD_MEM2.5
1
C75 R260
0.1U R98 +12VS 10K
0402 Q8 470K 0402 For KBC Reset
G
+80-20% AO3403 0402 5%
2
16V SOT23_FET 5% Q24 U18
2
S
2N7002 -THEPM_KBC RESET#

2
S G G [4] THERM_ADM# S D 3 MN RESET 2
S
D
D
4 1
G
J10 Q27 VCC GND
Q22
3
1
FAN
1 Q25 2N7002 C234 C230

2 R1 2 FAN0 S DS D 2N7002 0.1U 0.1U IMP811
1
0402 0402 SOT143
S
D
S
D
C71
DTC144TKA 16V 16V Threshold : 2.93V
2
1U
1.25MM/ST/MA-2 0402 SCL_THRM BAT_CLK +80-20% +80-20%
1
+80-20% [4] SCL_THRM SDA_THRM BAT_DATA

ACES PWROK
2
6.3V [4] SDA_THRM

85205-0200
G
[4] THRMTRIP# S D
S
D
+3V
Q28
CPU_FAN Control
2N7002/NA
1
+5VS R342
Close to AO3403 Signal HI LOW 10K +3V +3VA
0402
5%
1
SCI#
2
C86 FAN0 FAN ON FAN OFF [13] SCI#
0.1U R123 Q26
1
0402 Q9 470K
+80-20% AO3403 0402 R1 SCI R335 R340 R341 R154 R184 R203 R207
2
2
B 16V SOT23_FET 5% B
S
DTC144TKA 62 62 62 62 62 62 62
2
S G G 0402 0402 0402 0402 0402 0402 0402

1
D 1% 1% 1% 1% 1% 1% 1%
2
J12
FAN
1 SCROLL# CL-190G K A D504

2 Q23
3
NUM# CL-190G K A D506 For 2in1 LED change from 62 to 33 ohm

R1 2 FAN1
1
1.25MM/ST/MA-2 C87 CAP# CL-190G K A D505

ACES 1U DTC144TKA
85205-0200 0402
1
+80-20%
R0C R101 0 0402 5%
2
6.3V 1 2
D34 BAT54A/NA CL-190G K A D501

AC_POWER# 1
3 CL-190G K A D502
BATT_POWER# 2
R351 0 0402 5% R352 10K 0402 5%

1 2 1 2 +3V
D509
SR
BATT_R# 2 1
D17 D14 BATT_G# 4 3

POWERBTN# K A A K VG
ESD0805A/NA ESD0805A/NA
19-22SRVGC/TR8
SW501 SW502
1 2 KI3 1 2 KO0
3 4 3 4
5 5
UP
TC010-PSS11CET
297040105010 TC010-PSS11CET
SW_TC010-PS11CET 297040105010
A T-MEC(台灣美琪) SW_TC010-PS11CET A
T-MEC(台灣美琪)
D16 D24
COVER_SW# K A A K
ESD0805A/NA ESD0805A/NA
SW506 SW505
1 3 KI4 1 2 KO0
2 4 3 4
5
5V/1MA
DT016-PT11AB-B-1 DOWN TC010-PSS11CET
297040105010 Title
SW_TC010-PS11CET KBC (W83L950D)
T-MEC(台灣美琪)
Size Document Rev
R06
Number 411682900001
5 4 3 2 1
8 7 6 5 4 3 2 1
Mini-PCI & USB 2.0 +5VS
1
R339
150
0402
1%
A2
D
D503 Wireless LED D
CL-190G
WIRE_LED# U7
K
Q10 3 1 USB2VCC5
+5V VIN0 VOUT0
GND
1
R1 2 WIRE_LED 4 5
VIN1 VOUT1
1
+3VS R81
+ C63
1
DTC144TKA C58 RT9701-CBL 10K C69 220U
0402
1
2
1U SOT25 0.1U 10V
0402 1% 0402 20%
+80-20% USB_OC#2 +80-20%
2
6.3V [14] USB_OC#2 16V
1
1
PCI_AD[0..31] C64 R82 GNDS_USB GNDS_USB
[12,16] PCI_AD[0..31] 560K
1000P
0402 0402
J13 10% 1%
2
RP5 R126 1 0 2 0402 50V
2
1 TIP RING 2 CLK_SIO [11]
LAD[0..3] LAD0 1 8 3 4 R112 1 0 2 0402
[13,18,20] LAD[0..3] LAD1 RX+ TX+ LFRAME# [13,20]
2 7 5 6 R113 1 0 2 0402
LAD2 RX- TX- LDRQ# [13]
3 6 7 8 R114 1 0/NA 2 0402
LAD3 PJ7 PJ4 SERIRQ [13,16,20]
4 5 9 10 R115 0/NA 0402
PJ8 PJ5 WIRE_LED
11 LED1_GRNP LED2_YELP 12 1 2
MPCI_PD 13 14 1 2 WIRE_LED#
[13] MPCI_PD 0*4 LED1_GRNN LED2_YELN
15 CHSGND RESERVED4 16
PCI_INTC# 1206 17 18 R116 0/NA 0402 +5VS
[12] PCI_INTC# INTB# 5V[1]
19 3.3V[0] INTA# 20 PCI_INTD# [12]
21 RESERVED0 RESERVED5 22
23 GROUND0 3.3VAUX[0] 24
CLK_MINIPCI 25 26 PCIRST#
[11] CLK_MINIPCI
PCI_REQ2#
27
CLK
GROUND1
RST#
3.3V[4] 28
PCI_GNT2#
PCIRST# [8,12]
R95 0/NA 0402 USB 2.0
MINI-PCI TYPE III A

[12] PCI_REQ2# 29 REQ# GNT# 30 PCI_GNT2# [12]
31 32 USBP2- 1 2
PCI_AD31 3.3V[1] GROUND9 MPCI_PME# [14] USBP2-
33 AD[31] PME# 34 MPCI_PME# [13]
PCI_AD29 35 36 J9
AD[29] RESERVED6 PCI_AD30 USB5VCC5
37 GROUND2 AD[30] 38 B1 B1 A1 A1
3
PCI_AD27 39 40 B2 A2 USB2-
PCI_AD25 AD[27] 3.3V[5] PCI_AD28 B2 A2 USB2+
41 AD[25] AD[28] 42 B3 B3 A3 A3
43 44 PCI_AD26 B4 A4
C PCI_C/BE#3 RESERVED1 AD[26] PCI_AD24 R120 100 0402 90Z/100M B4 A4 C
45 C/BE[3]# AD[24] 46
[12,16] PCI_C/BE#3 PCI_AD23 PCI_AD21 L33
4
47 AD[23] IDSEL 48 1 2 GND1 GND1
49 GROUND3 GROUND10 50 GND2 GND2
PCI_AD21 51 52 PCI_AD22 USBP2+ 1 2 GND3
PCI_AD19 AD[21] AD[22] PCI_AD20 [14] USBP2+ GND3
53 AD[19] AD[20] 54 GND4 GND4
55 56 PCI_PAR
PCI_AD17 GROUND4 PAR PCI_AD18 PCI_PAR [12,16]
57 58 R94 0/NA 0402 4PX2/RA
PCI_C/BE#2 AD[17] AD[18] PCI_AD16
[12,16] PCI_C/BE#2 59 C/BE[2]# AD[16] 60 TYCO
PCI_IRDY# 61 62 1470748
[12,16] PCI_IRDY# IRDY# GROUND11 PCI_FRAME#
63 3.3V[2] FRAME# 64 PCI_FRAME# [12,16]
CLKRUN# 65 66 PCI_TRDY#
[13,16] CLKRUN# PCI_SERR# CLKRUN# TRDY# PCI_TRDY# [12,16]
67 68 PCI_STOP#
[12] PCI_SERR# PCI_PERR# SERR# STOP# PCI_STOP# [12,16]
[12,16] PCI_PERR# 69 GROUND5 3.3V[6] 70
PCI_C/BE#1 71 72 PCI_DEVSEL# JS504
[12,16] PCI_C/BE#1 PERR# DEVSEL# PCI_DEVSEL# [12,16]
73 C/BE[1]# GROUND12 74 1 2
PCI_AD14 75 76 PCI_AD15
AD[14] AD[15] PCI_AD13 SHORT-SMT4
77 GROUND6 AD[13] 78
PCI_AD10 AD[12] AD[11]
81 AD[10] GROUND13 82 GNDS_USB
83 84 PCI_AD9
PCI_AD8 GROUND7 AD[9] PCI_C/BE#0
85 AD[8] C/BE[0]# 86 PCI_C/BE#0 [12,16]
PCI_AD7 87 88
AD[7] 3.3V[7] PCI_AD6
89 3.3V[3] AD[6] 90
AD[5] AD[4] PCI_AD2
93 RESERVED2 AD[2] 94
AD[3] AD[0] MPCI_PD
Close to 97 98
PCI_AD1 +5VS 99
5V[0] RESERVED_WIP4[0]
100
MiniPCI CONN. AD[1] RESERVED_WIP4[1]
101 GROUND8 GROUND14 102
AC97_SYNC 103 104 +3VS
[13,17] AC97_SYNC AC_SYNC M66EN
1
MDC_SDIN R127 1 2 22 0402 105 106 AC97_SDOUT
[13,17] MDC_SDIN AC97_BITCLK AC_SDATA_IN AC_SDATA_OUT AC97_SDOUT [13,14,17,19]
R128 1 2 22 0402 107 108 R63
[13,17] AC97_BITCLK AC_BIT_CLK AC_CODEC_ID0#
1
109 110 AC97_RST# 10K
AC_CODEC_ID1# AC_RESET# AC97_RST# [13,17,19] 0402
MINIPCI_SPKR# 111 112 R117
[19] MINIPCI_SPKR# MOD_AUDIO_MON RESERVED7 10K 1%
113 AUDIO_GND0 GROUND15 114
0402 USB_OC#5
2
115 SYS_AUDIO_OUT SYS_AUDIO_IN 116 MODEM_SPK [17,19] [14] USB_OC#5
5%
117 SYS_AUDIO_OUT_GND SYS_AUDIO_IN_GND 118 R0A
1
USB5VCC5
2
119 AUDIO_GND1 AUDIO_GND2 120
1
121 122 C51 R64 USB2-
RESERVED3 MPCIACT#
1
123 124 1000P 560K USB2+
VCC5VA 3.3VAUX[1] + C52
1
+5VS +3V 0402 0402 C43 220U
1
JS3 10% 1%
2
B C89 GND1 0.1U B
GND1 10V
50V 0402
2
0.1U GND2 1 2 20%
0402 GND2 +80-20%
2
+80-20% 124P/0.8MM/H9.2 SHORT-SMT4 16V
2
16V TYCO
1
1566678-1 C79 GNDS_USB GNDS_USB
0.1U PIN24, 124 ARE AUX_POWER
0402
+80-20% R97 0/NA 0402
2
16V USBP5- 1 2
[14] USBP5-
3
L34
90Z/100M
4
MINI-PCI [14] USBP5+
USBP5+
R96
1
0/NA 0402
2
AD21
PCI_INTD# \ INTC#
REQ2#/GNT2#
+3VS
1
C92 C94 C93

0.1U 0.1U 0.1U
A 0402 0402 0402 A
+80-20% +80-20% +80-20%
2
16V 16V 16V
Title
Mini-PCI & USB 2.0
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
A B C D E
4 4
ADINP
ADINP
ADINP_2
ADINP_2
ADINP_1
ADINP_1
[20] I_LIMIT 1 2
1
PR140
0 PC146
1
0603
A
10U
1
PC150 PR147 PR139 PR146
2
10V 0.1U 19.6K 10 10 PD7
1206 0603 0603 0603 0603
50V 1% 5% 5% SM840B
2
GND DC2012
K
1
PR138
0
1
0603 GND
1
PR142
100K PC148 PC145 PL21 PL20
2
2
0603 1U 1U
1% 25V 25V 120Z/100M 120Z/100M
2012 2012
0805 0805
2
GND
GND GND
1
PC142 PR135 PR144 BAW56 PD16 PC156
1U 33 18K 1 0.1U + PC160 + PC159
100U 100U
0603 0603 0603 3 PU23 0603 25V 25V
1
3 PC144 10V 1% SI4814 50V 3
2
2 20% 20%
1
2
0.1U 2 SO8
2
1 2
0603 PC149 10U 10V 1206 D2 PQ43 PQ42
50V
2
1 2
PU22 AO6405 AO6405
PC151 0.01U 50V 1 28 8 TSOP6
DCIN IINP D1 5 TSOP6
1 2 2 LD0 CSSP 27 G2 GND
1
PC153 0.01U 50V 3 26 PC147 6 6 6
CLS CSSN 0.1U
1 2 4 REF BST 25 7 5 5
0603 PL19 PR136
GND 5 CCS DHI 24 2 4 4 2
PC157 50V
S
2
6 23 1 2 1 2 1 1
S
CCI LX BATT
D
0.1U
D
1 2 1 2 7 CCV DL0V 22
G
50V .035
G
8 GND0 DL0 21 3
0603 PR149 1K 0603 1% 9 20 G1 10UH 2512
GND1 PGND 5%
3
10 ICHG CSIP 19
1
PQ44 11 18 S1 A
ACIN CSIN PC138 PC162 PC163 PC140 PC164
1
2N7002/NA 12 17 10U 10U 10U 0.1U 10U
PR152 ACOK BATT 1210 1210 1210 0603 1210
4
13 REFIN CELLS 16
1
0 25V 25V 25V 50V 25V
2
GND 14 15
G
[20] BATTRY_TYPE 0402 ICTL VCTL PR148 PR150 20%/X5R 20%/X5R 20%/X5R PR134 20%/X5R
5% MAX1772 QSOP28 1 1 470K
0603 0603 0603
2
S D
S
D
+3VA
2
1
PR154 GND GND GND

221K PR168
GND
1
PC155 0603 1 2
1U 1%
0603 0 0402 5%
2
1
10V
2
1
PR128
PC139 100K
1
0603
10U
1
PR153 PR155 PC152
2
100K 10K/NA 0.1U 10V
2
0603 0402 0603 1206
1% 5% 50V
2
GND GND
2
2 GND GND 2
1
1 2 PC154 PC158
D
[20] CHG_I
0.1U 0.1U
PR156 GND 0603 0603 PQ41 D
0 50V 50V 2N7002 LI_OVP
2
S G LI_OVP [24]
0603
1
S
PR151
100K
1
0603 PC161
1% 0.1U
0603
2
GND GND
50V
2
GND GND
1 1
Title
DC-DC CONNECTOR ,CHARGER
Size Document Rev
411682900001 R06
Number
A B C D E
8 7 6 5 4 3 2 1
D D
PD1
2
3
1
BAV70LT1
PD3
2
3 ALWAYS
1
BAV70LT1
ADINP
JO2
1 2
JL503
OPEN-SMT4 1 2 ADINP_1
JO1
1 2 SHORT-SMT4
OPEN-SMT4 1 2
ADINP_2
JL1 SHORT-SMT4
PQ7 AO4407 PR46
.06/NA
SO8 8 1 2
3 7 PD5
C C
2 6
L3 1 5 1 2 DCP3 A K DVMAIN DVMAIN
D
S
1
G
PR48 SM840B
PR19 .06 DC2012
1
470K 0402 470K
4
1 2
1
0402 PR54 PR55 PC22 PC24
PR14 5% PR47 10K 10K 0.1U 1000P
1
.06 0805 0805 0603 0402
2
1 2 PC28
D
50V 10%
2
0.1U
PR2 0603 50V
2
D
LEARNING# 50V
2
1 2 G S
[20] LEARNING#
1
PQ8 AO4407
PL1
S
PR3
47K 100K PQ2 1 2 8
0402 SO8
0402 2N7002 3 7
5% 5% SOT23_FET 120Z/100M 2 6
PJ1 2012
2
1 5 GND GND GND GND GND
D
PL2 2012
G
JACK-2P 1 2
PF1 GND 120Z/100M
2DC-S107B200 TR/SFT-10A
4
GND
FUSE_2917 PL6
1 1 2 L1 1 2 L2
K
2 120Z/100M
1
PC2 PC19 PC16 PC17 PC15 PC4 2012

3
4
0.1U 1U 0.1U 0.1U 0.1U 0.1U

0603 0805 0603 0603 0603 0603 PC10 PD4
50V 25V 50V 50V 50V 50V 0.1U RLZ24D
2
50V
GND
B B
A A
Title
DC Connector
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
+5VAS +3VA
DBATT DBATT
PQ38 AO4407
8 SO8
1
7 3
PR125 PR129 6 2 DVMAIN
630K 100K BATT
5 1
0603 0402
S
PQ39
8
1% 5% AO4407
G
2
2
3 +
BATT_DEAD PR111
4
1 BATT_DEAD [20] 8 SO8
2 - 7 3 1 2
PU21A 6 2
D 5 1 1M D
1
LMV393M +3VA 0402
D
4
S
SSOP8 PR112 5%
G
100K
1
0402
4
PR107 5%
1
100K
2
1
PR130 PC137 GND 0402
D
100K 0.1U 5%
0402 0603 PQ36
2
D
1% 50V ADEN# 2N7002
2
G S
[20] ADEN#
2
S
3
PR109
1 2 2 PQ35 GND
ADINP
DTC144WK PL18
169K 1 2
GND GND 0603
1% 120Z/100M 2012
1
GND PL17
PR544,PR554 changed from .04ohm to .02ohm 1 2
PF2 120Z/100M 2012

TR/SFT-10A
PR126 .02 2512 FUSE_2917 PL16
1 2 1 2 1 2 PJ2
1 1
PR123 PR119 120Z/100M 2012 DBATT
1 2 2 2
1 2 DBATT 1 2 PC132 3 3
1
0.1U PR122 .02 4
+5VAS 1M 50V 2512 4
5 5
0603 499K 0603 6
1% +5VAS 0603 +5VA 6
2
7 7
BAT_V 1%
[20] BAT_V
MA/2.5MM/7P
GND TBTD-0070018
1
PR145
PC131
1
1
PR133 0.1U PR115 +5VA [20] BAT_C BAT_C 1 2
C PR131 0603 75K C
4.7K PR124 47K 50V 0402 BAV99/NA 0 0402 5%
2
0603 12.1K 0402 1% 2
8
1
1% 0402 1% 5%
2
3
PR137 PR143
2
2
1 2 5 + 1
7 LI_OVP 10K 0
LI_OVP [22] 0402 PD15 0402
1 2 6 - GND GND GND
PU21B 1% 5%
[20] BAT_D
PR132 BAT_T
2
[20] BAT_T
2
1
402K LMV393M
4
SSOP8 PC134 PC135

1
PQ40 0603 PR127 PC136 0.01U 1000P
1
1% 30.9K 0.1U BAV99/NA 0402 0402
1 SCK431LCSK-5 PC141 PC143
0603 0603 PR141 10% 10%
2
1000P 0.1U 2
SOT23N 1% 50V 10K 0402 0402 50V 50V
2
3
0402 10% +80-20%
3
2
1
1% 50V 16V
PD17
2
GND GND GND GND
GND GND GND GND GND
GND
+5VA change from +5VA to +3VA

DBATT
DBATT
1
PU4
PC38 5 1 +3VA
NC0 GND0
VIN 2
2.2U +3VA
2
0805C 4 NC1 VOUT 3
1
GND AME8800AEEV PC36 PC35
SOT25 1U 4.7U/NA
0603 0805 PR117 PU20
+80-20% PR120
2
[20] I_CHG 1 2 1 OUT1 VCC 8
2 RS1- OUT2 7 1 2 I_DISCHG [20]
3 RS1+ RS2- 6
10 4 5
0603 GND RS2+ 10
GND
1
PC128 5% MAX4377 0603 PC130
1
B 1U MSOP8 PC1295% 1U B
+5VA 0603 1U 0603
2
0603
2
2
1
PR45
GND
470K
0603 +5VA +5VAS
2
PQ17
PQ12
3
DTC144WK
S
D
S D
2
G
G
PR57 SI2301DS
100K
0402
5%
1
2
PD8
A K ADEN#
GND
BAS32L
+3V
+5VA
3
PQ18
R1 2
1
DTC144TKA
1
1
PL7 PC27
120Z/100M 0.1U
1608 0603 +5V GND
50V
2
2
A A
G
JS2 PU3 PQ13

G
1 2 8 IN 5VTAP 6
ALWAYS 2 1 S D
SHORT-SMT4 SENSE OUT
S
D
7 F/B ERR- 5
SW_+5VA 3 4
[20] SW_+5VA
K
SHUTDN GND
1
LP2951-02BM PD2 PC14 PC21

PC8 SO8 0.1U 10U SI2301DS
0.1U UDZS5.6B 0603 1206
50V SOD323 50V 10V
2
5V Resume Power
A
0603
Title
GND GND GND GND Battery Connector
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DVMAIN
PL15
1 2 DVMAIN_D
120Z/100M
2012
1
PC5 PC108 PC120 PC111 PC105
1
0.1U 0.1U 10U PC103 10U/NA 10U
D
0603D 0603D 1210 0.1U 1210 1210 D
50V 50V 25V 0603D 25V 25V
1
20%/X5R 50V 20%/X5R 20%/X5R
2
PC124
1000P
0402
10%
2
GND
GND 50V
GND GND
GND
1
1
PC101 PD13
0.1U BAT54A
0603D
50V
2
PR98 PC115
3
1 2 INTVCC 2 1 PU17
+5V
HA178L12UA
1
PC123 SOT89N
1000P BG1 0 10U PD14
0402 0402 10V A K 3 1
IN OUT +12V
1
10% 5% 1206 BG2
2
PC107
50V 0.1U EC11FS2
GND
1
1
0402 PC112
5
6
7
8
1
PU15 +80-20% PR166 PR167
2
0.1U PC121 PC125 PC122
SI4814 16V 0603D D PU16 10U 10U 0.1U 220/NA 220/NA
SO8 50V SI4800DY 1210 1210 0402 1206 1206
2
2
1
GND PU14 G SO8 25V 25V +80-20%
2
24
23
22
21
20
19
18
17
GND 20%/X5R 20%/X5R 16V
2
D2 LTC3728L 4
BOOST1
BG1
BG2
BOOST2
VIN
EXTVCC
INTVCC
PGND
HVQFN32_1
8 S
PT1
5 D1 G2 GND
PR95 PL14
1
2
3
6 2 4
PR108
+3V 1 2 3V_1 1 2 7 25 SW1 NC1 16
26 15 1 3 5V_2 1 2
TG1 SW2 +5V
27 PGOOD TG2 14
.015 4.7UH 28 13 .01
2512 SPC-10039P RUN/SS1 RUN/SS2 10UH 2512
3 29 NC2 SENSE2+ 12
1% 30% G1 30 11 PU18 1%
SENSE1+ SENSE2-
8
7
6
5
31 SENSE1- NC0 10 SI4832DY
A S1 32 9 PC113 D
NC3 VOSENSE2 SO8
33 1 2
VOSENSE1
SGND1
1
1
C PC102 G C
4
PC100 34
PLLFLTR
3.3VOUT
SGND2
1
1
PC172 PR157 PR93 0.01U 1 2 35 4 PC165
SGND3
1
1
SGND
PLLIN
1000P 220 220/NA + PC95 PC104 0402 36 PR103 1000P PC126 + PR114 PR116 PR118 + 150U PC173
ITH1
ITH2
FCB
0402 1206 1206 820U 10% SGND4 107K 0402 PC127 10K 220/NA 220
2
0.1U 37 0.1U 7343 1000P
10% 4V 0402 50V 1000P SGND5 0603 1% 50V S 0402 680U 0805 1206 1206 6.3V 0402
2
50V +80-20% 0402 10% +80-20% 6.3V 10%

2
2
1 2
16V 50V PC106 16V 20% 50V
1
2
3
4
5
6
7
8
3
2
1
2
10% GND 0.01U 1 2
0402
10%
50V PC118 PC117
1000P 180P/NA SENSE2-
1
SENSE1- 0402 0603D
PR99 PC110 10% 50V 5%
1
PR94 1.13K/NA 1500P PC116
1
0603D 0603D 100P PR102
2
1 2
2
50V 0402 20K PC119
1
63.4K 0603 1% 10% 10% 50V 0402 180P/NA
12
PC114
1
PC109 1% 0603D
2
1 2 0.01U
1
GND 100P PR101 PR104 5% 0402
1
2
PC98 PR96 0402 8.06K 4.75K 10%
2
+5VA 180P/NA PC99 20K 10% 0603 0402 50V
2
0603D 180P/NA 0402 50V 1% 1%
5% 0603D 1% PJS2
2
5%
2
1 1 2
PR92 SHORT-SMT1
1
1K
1
1
0402 PR100 GND
PR84 1% PR97 0
100K 10K/NA 0402
2
SGND
0402 0402 5%
5% 1% PR105
2
D
2
2
1 2
D PQ32
G S 2N7002 INTVCC
PQ26
SOT23_FET 1K SOT23_FET
D
D
0402
S
AO3400
D PQ29 D PQ33 1% +1.8V
G S 2N7002 G S 2N7002 D S +1.8VS
D
S
[20,26] PWR_ON SOT23_FET SOT23_FET
PR85
S
S
B B
1 2 +12VS
G
1M GND
0402 PR69
5% GND 1 2
1
470K
1
0402 PR70 PC70
5% 1M 1000P
0402 0402
PU13 5% 10%
2
PU19 AO4404 50V
2
PQ34
AO4404 SO8
AO3401 +12VS SO8 8 PQ30
+12V SOT23_FET 8 7 3 SOT23_FET GND
7 3 6 2 AO3400
+5V +5VS +3V +2.5V_DDR
S
D
S D 6 2 5 1
+3VS VDD_MEM2.5
D
5 1 D S
S
D
S
D
G
S
1
G
G
PR106 +12VS
4
G
1M
4
0402
1
5% PR121
PC174 PC175
PR89
2
1 2 10U 10U
1206 1206 1 2
470K 10V 10V PR91
2
1 2 PC176
1
1
0402 10U 470K
1
R319 5% 1206 0402 PR90 PC96
470K 470K 10V 5% 1M
2
1000P
1
0402 0402 PC97 0402 0402

5% 5% 5% 10%
2
1000P
1
0402 50V
2
2
1
PR110 10%
2
PC133
D
100K 1000P 50V

D PQ37 0805 0402 GND
2N7002 10%
2
G S
[20] MAINPWR 50V
2
A GND A
S
1
PR113 GND GND

1M
0402
5%
2
GND
Title
+12V,+5V,+3V,
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DVMAIN
PL13
1 2 DVMAIN_D2
1
120Z/100M PC71
1
PC6 2012 PC82 1000P
1
0.1U PC93 PC78 10U 0402
1
0603D 1210 10%
2
D 0.1U 10U PC91 D
50V 0603D 1210 25V 50V
2
0.1U
50V 25V 0603D 20%/X5R
2
20%/X5R 50V
2
GND
GND GND
GND
GND
1
PD11
1
BAT54A PC76
0.1U
0603D
PR80 PC83 50V
2
1 2 INTVCC1 2 1
+5V
1
PC94 PU12
1000P SI4892DY TBG1 0 10U
8
7
6
5
0402 SO8 0402 10V
1
10% 5% 1206
2
D PC85
50V 0.1U
1
G 0402 GND
PC88
GND +80-20%
2
4 0.1U
0603D 16V PU9
50V SI4814
1
2
S GND PU11 SO8
24
23
22
21
20
19
18
17
LTC3728L D2
3
2
1
BOOST1
BG1
BG2
BOOST2
VIN
EXTVCC
INTVCC
PGND
HVQFN32_1
8
+2.5V_DDR G2 D1 5
PR72 PL12 PL11 PR71
6
1 2 1 2 TSW1 25 16 7 1 2 1.2V_2 1 2
SW1 NC1 +1.8V
26 TG1 SW2 15
PU10 27 14
.005 3.3UH PGOOD TG2 3.3UH .01
28 RUN/SS1 RUN/SS2 13
8
7
6
5
2512 SPC-10039P 29 12 3 SPC-10039P 2512
30% FDS7764A NC2 SENSE2+ 30%
1% D SO8 30 11 G1 1%
K
PD12 SENSE1+ SENSE2-
31 SENSE1- NC0 10
G 32 9 S1 A
C EC10QS04 NC3 VOSENSE2 C
4 33
VOSENSE1
SGND1
1
4
34 PC69
PLLFLTR
3.3VOUT
SGND2
1
1
PC166 35 0.1U
SGND3
1
1
SGND
PLLIN
+ PC72 + PC67
A
+ 220U PR158 PC68 S PC89 36 0402 PR159
ITH1
ITH2
FCB
220 820U PC90 SGND4 +80-20% 820U PC167 220
2
7343 0.1U 0.1U 37
4V 1206 4V 0402 0402 1 SGND5 PR77 16V 2.5V 1206
3
2
1
2
+80-20% +80-20% 26.1K 0402 1% 10U
2
2
16V 16V 1000P 10V
2
1
2
3
4
5
6
7
8
2
1 2 1206
0402 GND
50V PC74 PC79
10% 180P 1 2 SENSE1.2+
SENSE1.05+ 0603D
PC75 1 2 SENSE1.2-
SENSE1.05- 1000P 5% 1000P
1
PR83 43.2K PC86 0402 0402
1
1 2 0.01U PR79 PC81 10% 50V
1
0402 1.13K/NA 1500P 50V 10%
1
0603 10% 0603D 0603D PC80
1
+3VS 1 2 50V 50V 100P PQ27
21
1
PC92 10% 0402 PR76
2
PC77
D
1
1
GND 180P/NA PC84 PR78 50V 20K PC73
2
0.1U 2N7002
1
2
0603D PR81 100P 8.06K 10% 0402 180P/NA 0402 D
PR82 5% PC87 20K 0402 0603D PR75 1% 0603D +80-20%
2
S G
100K 180P/NA 0402 10% 1% 4.75K 5% 16V
2
0402 1%
S
0603D 50V 0402 PJS1
2
5% 5% 1%
2
1 2
2
SHORT-SMT1
1
GND
PR74 SGND2
0/NA
0603
+5VA
2
PR73
1 2 INTVCC1
1
PR87
D
100K 10K/NA
0402 D PQ28 0402
B 5% G S 2N7002 1% B
2
S
D
PR88 D PQ31
1 2 G S 2N7002
[20,25] PWR_ON
1
0 PR86
0402 1M
5% 0402
5%
2
GND
PR68 +1.25V_DDR_P +1.25V_DDR

0
0402 PU8
+5VS 1 2 2 4
SD VREF
+2.5V_DDR 5 3
VDDQ VSENSE PJO1
6 AVIN VTT 8 1 2
PQ25
SI2302DS_NA 7 1 SHORT-SMT4
PVIN GND
GND1 9
1
D S 10
D
S
GND2
1
PC66 PR67 11 PR160

GND3
1
0.1U 470K 12 PC65 + PC63 + PC64 1K

0402 0402 GND4 0.1U 100U 100U 0603
GND5 13
PR66
G
+80-20% 5% 0402 25V 25V

2
+12VS 16V +80-20% 20% 20%

2
1 2 LP2996
SO8_GND_4 16V
1
A 100K/NA PC62 A
0603 0.22U_NA
0603
1% 16V
2
10%,X7R
GND GND
Title
+2.5V,1.25V,1.8VS
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
+5VS D
PR53
CPU_CORE (1/2) PL5
1 2 D/VMAIN_P3 1 2 DVMAIN
1
PR50 PR52 0_DFS 120Z/100M 2012
D
+ PC25
1
0_DFS 10 0402 PC37 PC31 PC30
22U
1
0402 0402 0.1U PQ14 1000P 0.1U PL4
25V
5% 5% PU5 0805 G FDD6035AL 0402 0603 1 2
10% SOT252B_FET 10% 50V
2
2
7 EN BOOT 2
50V
S
120Z/100M 2012
2
6 1 UG1
VCC UGATE PL8 PL3
3 8 PH1 1 2 1 2
[28] PWM1 PWM PHASE GND
4 5 LG1 120Z/100M 2012
GND LGATE
1
0.5UH PC34 PC7
K
1
ISL6207 1000P 0.01U
1
PR56 SO8 0402 0402
1
470K PC33 GND PQ16 PQ15 PR51 10% 10%
2
PC29
0402 1U 0.1U G SUD50N03-11 G SUD50N03-11 32.4K 50V 50V
5% 0805 0402 SOT252B_FET SOT252B_FET 0603 GND GND
16V +80-20%
A
2 1%
2
16V
2
GND 1 2
GND GND GND
PD6 PC32
EC31QS04 0.01U
DC2010 50V
0603
[28] ISEN1-
10%
ISEN1+R 1 2
[28] ISEN1+
PR26
619
GND 0603
D/VMAIN_P3
PR60
1
C C
1 2 PC47 PC43 PC44
+ PC26
1
1
PC59 22U 1000P 0.1U 10U
PR59 0_DFS 10U 25V 0402 0603 1210
D
10 0402 PC51 1210 10% 50V 25V
2
1
0402 0.1U PQ19 25V 50V 20%/X5R
2
5% PU6 0805 G FDD6035AL 20%/X5R
10% SOT252B_FET
2
7 EN BOOT 2
S
2
6 1 UG2 GND
VCC UGATE PL9
3 8 PH2 1 2
[28] PWM2 PWM PHASE +VCC_CORE
4 5 LG2
GND LGATE 0.5UH
K
1
1
ISL6207 PC501 PC503 PC502
1
PR62 SO8 + 330U/NA + 330U/NA + 330U/NA
1
470K PC46 PC48 GND PQ21 PQ20 PR58 7343 7343 7343
0402 1U 0.1U G SUD50N03-11 G SUD50N03-11 32.4K 2V 2V 2V
5% 0805 0402 SOT252B_FET SOT252B_FET 0603
2
16V +80-20% 1%
A
2
16V
2
GND 1 2
GND GND GND
PC45
PD9 0.01U
EC31QS04 50V
DC2010 0603
[28] ISEN2-
10% GND
ISEN2+R 1 2
[28] ISEN2+
PR23
619
GND 0603
D/VMAIN_P3
PR61
1
1 2 PC52 PC54
+ PC58
1
22U 1000P 0.1U

PR63 0_DFS 25V 0402 0603
D
10 0402 PC53 10% 50V
2
1
0402 0.1U PQ22 50V
2
B 5% PU7 0805 G FDD6035AL B
10% SOT252B_FET
2
7 EN BOOT 2
S
2
6 1 UG3 GND
VCC UGATE PL10
3 8 PH3 1 2
[28] PWM3 PWM PHASE +VCC_CORE
1 2 4 5 LG3
GND LGATE
1
0.5UH
PR65 ISL6207
D
1
PR165 0/NA 0402 470K SO8
1
0402 PC61 PC55 GND PQ24 PQ23 PR64

5% 1U 0.1U G SUD50N03-11 G SUD50N03-11 32.4K
1
0805 0402 SOT252B_FET SOT252B_FET 0603
2
1
16V +80-20% 1% + PC42 + PC50 + PC49 + PC41 + PC57 + PC56
S
S
2
PC39 PC40
16V 820U 820U 820U 820U 820U 820U
2
0.1U 1000P
1 2 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 0402 0402
GND GND GND GND +80-20% 10%
2
PD10 PC60 16V 50V
EC31QS04 0.01U
DC2010 50V
0603
10%
[28] ISEN3-
ISEN3+R 1 2
[28] ISEN3+
PR28 GND
619
0603
GND 1%
A A
Title
CPU_CORE1
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
+5VS CPU_CORE (2/2)
1
PR12
0
D D
0402
5%
DVMAIN
2
FOR D/T CPU
FOR PORTABLE CPU
1
PC3
1U PR27
0603 80.6K
0603
2
1%
CPU_VID[0..5] GND PU1 PR25 10K 0402 5%
2
[4] CPU_VID[0..5]
PR21 0 0402 5% 32 7 1 2
CPU_VID0 VCC RAMPADJ GND
1 2 5 VID0
PR17 0 0402 5% 38
CPU_VID1 VR-TT#
1 2 4 VID1
PR18 0 0402 5% 25
CPU_VID2 PWM1 PWM1 [27]
1 2 3 VID2
PR15 0 0402 5% 24
CPU_VID3 ISEN1+ ISEN1+ [27]
1 2 2 VID3
PR16 0 0402 5% 23
CPU_VID4 ISEN1- ISEN1- [27]
1 2 1 VID4
PR22 0 0402 5% 26
PWM2 PWM2 [27]
CPU_VID5 1 2 6 VID5
ISEN2+ 27 ISEN2+ [27]
PR11 0 0402 5% 34 ENLL
[13] DPRSLPVR 1 2 ISEN2- 28 ISEN2- [27]
1 2 33 DRSEN
PWM3 20 PWM3 [27]
PR4 0 0402 5% PR13 0/NA 0603 1 2 35
+3VS DSEN# +5VS
[11,13] CPU_STP# 1 2 GND ISEN3+ 21 ISEN3+ [27]
PR6 0/NA 0603
22 PC11
ISEN3- ISEN3- [27]
10 220P
OCSET
1
PR33 0603
1
31 10%
PR49 475 PWM4
54.9K 0603 30 1 2
0603 1% ISEN4+
1%
2
9 DSV ISEN4- 29
PR34 PC20
2
11 SOFT
C C
COMP 15 1 2 1 2
1
PC9 36 FS
100P PR39 13
FB
1
0402 27.4K 20K 0.01U
10% 0603 PC13 PR9 0402 0402
2
NC 14
50V 1% 0.039U 100K PC23 1% 50V
0603 0402 10%
2
16 1 2 1 2
D
5% VDIFF
37 DRSV
D PQ11 PR41
VRTN(RGND)
Depper_sleep_shifter G S GND GND +5VS 40 1000P 47.5
2N7002 NTC 0402 0603
50V
PGOOD
S
GND
GND0
GND1
GND2
VSEN
10% 1 2
OFS
GND PR40
3
2.87K
ISL6247
12
19
41
18
17
39
0603
8
-
+
4 8 HVQFN40
1%
PU2A
LMV358M load_line_shifter
S
D
1 2 S D
GND SSOP8
PR42 PQ10
1
1 2
16.2K 2N7002
G
0603
PC12 1%
1U offset_line_shifter
1
0603 +5VS
PR8
10K
0402
1%
1
2
1
GND +3VS PR29 PR38
PR31 1.2M 5.1K
1
470K 0603 0402

PR24 PR5 0603 1%
1
32.4K 42.2K
2
0603 0603 PR7 Depper_sleep_shifter
2
1% 1% 10K +5VS
0402
2
5%
2
B B
D
GND
D PQ4
VRMPWRGD [20] 2N7002
G G S
D
S
D PQ9
S G Depper_sleep_shifter TP0610T-T1
1
S
PQ5 GND
2N7002 PR37
PR35 27K
1
GND 1 2 PC18 0402
+VCC_CORE 5%
0.1U
0 0402 5% 0402
2
+80-20%
2
16V
C
+5V PR36
PR10
1 2 GND B 1 2 BOOTSELECT [5]
1 2
0 0402 5% PQ6 PR30
1
1
E
MMBT3904L 22K
PR20 10K GND 0603 PR32
10K 0402 100K
0402 1% 0402
D
5% 5%
1
PQ3
2
2
D
G S 2N7002 PR44 PR43
0 0
0402
S
0402 GND GND

D
5% 5%
PR1 PQ1
2
D
1 2 G S 2N7002
[5] CPU_CORE_EN
PR30,PR32 changed from 100ohm to 0ohm
S
1
470 PC1 PR526 changed from 1.91K to 2.7K

0402 VCCSENSE [4]
0.1U
5% 0402 PR44 changed from 340K to 470K
+80-20%
2
16V VSSSENSE [4]
A GND GND A
Title
CPU_CORE2
Size Document Rev
R06
Number 411682900001
8 7 6 5 4 3 2 1
Reference Material
Intel Pentium 4 Processor Specifications Intel,INC
SiS M661FX (Host Memory Controller) SiS,INC
SiS963L(MuTIOL®Media I/O South Bridge) SiS,INC
Frequency Generator ICS952007 ICS,INC
8599 Hardware Engineering Specification Technology.Corp./MiTAC

SERVICE MANUAL FOR 8599
Sponsoring Editor : Jesse Jan

Author : Star Meng
Assistant Editor : Ping Xie
Publisher : MiTAC International Corp.

Address : 1, R&D Road 2, Hsinchu Science-Based Industrial, Hsinchu, Taiwan, R.O.C.
Tel : 886-3-5779250 Fax : 886-3-5781245

First Edition : Jun. 2004
E-mail : Willy.Chen @ mic.com.tw

Web : http: //www.mitac.com http: //www.mitacservice.com

Laptop Mitac 8599 Taiwan Service Manual

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Laptop Mitac 8599 Taiwan Service Manual

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SERVICE MANUAL FOR

BY: Star Meng

1. Hardware Engineering Specification ……………………………………………………………………… 4

1.1 Introduction ……………………………………………………………………………………………………………….. 4

2. System View and Disassembly …………………………………………………………………………….. 46

2.1 System View ………………………………………………………………………………………………………………. 46

3. Definition & Location of Connectors / Switches ………………………………………………………….. 69

3.1 Mother Board ……………………………………………………………………………………………………………... 69

4. Definition & Location of Major Components …………………………………………………………….. 72

4.1 Mother Board ……………………………………………………………………………………………………………... 72

5. Pin Description of Major Component …….………………………………………………………………. 73

5.1 Inter Pentium 4 Processor mFC-PGA 478 Pins ………………………………………………………………………… 73

6. System Block Diagram …………………………………………………………………………………….. 89

7. Maintenance Diagnostics ………………………………………………………………………………….. 90

7.1 Introduction ………………………………………………………………………………………………………………. 90

8. Trouble Shooting …………………………………………………………………………………………… 94

8.1 No Power ………………………………………………………………………………………………………………….. 96

8.15 LAN Test Error ………….……………………………………………………………………………………………… 130

9. Spare Parts List ……………………………………………………………………………………………. 132

10. System Exploded Views ………………………………………………………………………………….. 143

11. Circuit Diagram ………………………………………………………………………………………….. 144

12. Reference Material ……………………………………………………………………………………….. 172

1. Hardware Engineering Specification

1.1.2 System Overview (1)

1.1.2 System Overview (2)

Memory - 0MB on board;Expandable up to 1024MB

1.1.2 System Overview (3)

Audio System - Sound Blaster Pro compatible

1.2 Hardware System

1.2.1 CPU Module

Highlights of the Northwood DT Pentium 4 Processor:

Available at speeds ranging from2.26G/2.4G/2.5G/ 2.53G/2.66G/2.8G/3.06G Hz

Intel Pentium 4 Processor Product Feature:

Hyper Pipelined Technology

400/533 MHz System Bus:

Level 1 Execution Trace Cache:

Rapid Execution Engine:

512KB, Level 2 Advanced Transfer Cache:

Non-Blocking, full speed, on-die Level 2 cache

256-bit data bus to the level 2 cache

Advanced Dynamic Execution:

Enhanced Floating-Point and Multimedia Unit:

Internet Streaming SIMD Extensions 2 (SSE2):

Features Used for Test and Performance / Thermal Monitoring:

1.2.2 SiS M661FX Graphics/Memory Controller

the second display can only be realized through software engine.

High Performance Host Interface

- Supports zero-wait state for contiguous CPU write data

64 Bit High Performance DDR400/DDR333/DDR266 Memory Controller

Integrated A.G.P. Compliant Target/66MHz Host-to-PCI Bridge

- Supports Graphic Window Size from 4MBytes to 512MBytes

High Throughput SiS MuTIOL® 1G Interconnecting to SiS963 MuTIOL 1G Media I/O

Dedicated Isochronous Response Queue

High Performance & High Quality 3D Graphics Accelerator

-- Built-in 32-bit floating point format VLIW triangle setup engine

-- Supports 16/24/32 bpp RGB/ARGB texture format

High Performance 2D Graphics Accelerator

-- Built-in 256 bytes pattern registers

Complete TV-OUT/Digital Flat Panel Solution

MPG-2/1 Video Decoder

-- 16 color-key and/or chroma-key operations

-- Built-in reference voltage generator and monitor sense circuit

1.2.3 SiS963L MuTIOL 1G Media I/O

Meet PC2001 Requirements