Ch t 4 Balancing

Chapter B l i and
d Filtering
Filt i

Electromagnetic Compatibility
Engineering
by Henry W.
W Ott
 Balancing
„ A balanced circuit is a two-conductor circuit in which both signal
conductors, and all circuits connected to them, have the same
nonzero impedance with respect to a reference (usually ground)
and all other conductors.
„ The purpose of balancing is to make the noise pickup equal in both
conductors.
„ Balancing is an often overlooked --- although in many cases cost-
effective --- noise reduction technique.
„ For a balanced circuit to be most effective in reducing common-
mode noise, not only must the terminations be balanced, but also
the interconnection ((cable)) must be balanced.
„ An excellent example of the effectiveness of a balanced system in
reducing noise is the telephone system.

JHLin, EMC; Balancing & Filtering 2

 Balancing
„

If I N 1 = I N 2 andd
RL1 = RL 2 VL = I N 1 RL1 − I N 2 RL 2 + I s ( RL1 + RL 2 )

VL = I s ( RL1 + RL 2 )
JHLin, EMC; Balancing & Filtering 3
 Balancing
„

JHLin, EMC; Balancing & Filtering 4

 Balancing

JHLin, EMC; Balancing & Filtering 5

 Balancing
„ A balanced circuit using a twisted pair will protect against both
magnetic and electric fields, even without a shield over the
conductors.
„ Common Mode Rejection Ratio (CMRR)
Common-Mode

⎛V ⎞ Typically,
yp ca y, 40
0 to 80 dB
d of
o CMRR
C iss
CMRR = 20log ⎜ cm ⎟ dB reasonable to expect from a well-
⎝ Vdm ⎠ designed circuit.
JHLin, EMC; Balancing & Filtering 6
 Balancing
⎛V ⎞
1. Alternative definition of CMRR: CMRR = 20log ⎜ c ⎟ dB
⎝ Vdm ⎠

2. In many practical applications, the load is balanced but the source is

not
not.

If RL  ( Rs + ΔRs )
⎡ ( RL + Rs + ΔRs )( RL + Rs ) ⎤ ⎡ RL ⎤
CMRR = 20log ⎢ ⎥  20log ⎢ ⎥
⎣ R L ΔRs ⎦ Δ
⎣ s⎦
R
JHLin, EMC; Balancing & Filtering 7
 Balancing
3. The detrimental effect of source unbalance on the noise performance
can be
b reduced
d d by
b :
a. Reducing the common-mode voltage
b Reducing the source unbalance ΔRs
b.
c. Increasing the common-mode load impedance RL
4
4. The CMRR caused by an unbalanced load resistance:

JHLin, EMC; Balancing & Filtering 8

 Balancing
⎡ ( RL + Rs + ΔRL )( RL + Rs ) ⎤ ⎡⎛ RL ⎞⎛ RL + ΔRL ⎞⎤
CMRR = 20log ⎢ ⎥  20log
g ⎢⎜ ⎟⎜ ⎟⎥
⎣ Rs ΔRL ⎦ ⎣⎝ Rs ⎠ ⎝ ΔRL ⎠⎦
If RL  Rs
A low source impedance with a high load impedance will provide the
largest CMRR.
A large load resistance will maximize the CMRR for the case of both
source unbalance and load unbalance.

„ Cable Balance
1. In many cases, the circuit unbalances are greater than the cable
unbalances. However, when large amounts of common-mode rejection
are required, greater than 100 dB, or very long cables are used, the
cable imperfections must be considered.
2. The resistive unbalance of most cables is negligible.

JHLin, EMC; Balancing & Filtering 9

 Balancing
3. Capacitive unbalance is typically in the 3% to 5% range. At high
frequency the capacitive unbalance may have to be considered.
frequency, considered
4. Inductive unbalances are virtually nonexistent for braid shield cables if
properly terminated.
5. Foil shielded cables with drain wires should not be used in sensitive
circuits that require large amounts of common-mode noise suppression.
6. Th effects
The ff t off b
balancing
l i and
d shielding
hi ldi are additive.
dditi
7. Normally, the higher the frequency, the harder it is to maintain good
balance,, because strayy capacitance
p has more effect on circuit balance
at high frequency.
„ System Balance
1. Knowing the CMRR provided by the individual components that make
up a system does not necessarily allow predictions of the overall
system CMRR when the components are combined.

JHLin, EMC; Balancing & Filtering 10

 Balancing
2. One way to guarantee good system balance is to specify the CMRR for
each component higher than the desired system CMRR
CMRR.
3. One way to estimate the overall CMRR of the system is to assume it is
equal to the CMRR of the worst component.

An example of this
method is the
balanced differential
voltage probe in Fig.
Fig
18-8.

JHLin, EMC; Balancing & Filtering 11