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Control strategy for single-phase UPS inverters

O. Kukrer, H. K6murcugil and N.S. BaYlndlr

Abstract: A simplifi ed control strategy is proposed for single-phase uninterruptible power supplies
in continuous time. In this strategy the controller has command feedforward and feedback
components. Only proportional controllers are employed in the inductor current and output
voltage control loops. This controller yields zero output impedance of the UPS, provided that
estimated filter parameters match their actual values. Robustness of the control system is
investigated. Simulation and experimental results are presented for linear and non-linear loads.
. '

1 Introduction
+
Uninterruptible power supplies (UPS) are used to supply
power to critical loads in case of emergencies. In general,
high performance criteria are specified for UPS systems in
+
terms of output voltage distortion and speed of response.
Feedback control of the output voltage is essential to "0

achieve these' criteria. Control strategies devised for UPS


systems can be broadly classified as continuous-time and rectifier load
discrete-time. With the advent of fast microcontrollers,
discrete-time control strategies have been proposed [\--5],
which depend on deadbeat control and sliding-mode
control approaches . However, response times of such Fig. 1 Sinole-phase UPS jystem
schemes are limited by microcontroller speed and give rise
to considerable distortion with non-linear loads. On the
where Vi is the inverter output voltage and R is the resistance
other hand, continuous-time strategies are much faster and
of the inductor L. The control variable here is the inverter
can lead to much less distortion. Schemes proposed so far
voltage Vi, which is a three-level pulse width modulation
generally involve an inner current control loop in addition (PWM) waveform generated by comparing a reference
to an outer voltage control loop [6. 7]. This paper proposes
wavcform v� with a triangular carrier Dc, as shown in Fig. 2.
a simplified approach, which leads to zero output
Note that the carrier is a triangular wave between 0 and I
impedance of the inverter, ideally, with the result that the
(in normalised form) whenever the reference wave is
output voltage is unaffected by the load. It is shown that the
positive, and is between 0 and -I whenever it is negative:
integral controller generally employed in the voltage control
Let the referen�e be determined by:
loop in most sehemes is rcdundant . Only proportional
controllers are sufficient in obtaining a robust system with di*
v; = Va + Le - + Rei* + Kc(i* - i) - Kp L1vo (3)
fully controllable dynamics. Simulation and experimental elt
results are given and discussed for operation with a resistive where dvo = vo-v:, rJ*(t) = v,,, sin wt is the reference for the
load, and a non-linear load (diode bridge recti fier) drawing output voltage and' i = ( + io is the reference for the
a pulsed current from the UPS. inductor current. Le and R.: are the estimated values of
the i nductance and resistance of the inductor, respectively.
2 UPS inverter Here it is assumed that the load current io is measured.

A single-phase UPS system is depicted in Fig . I. The l oad is


assumed to be a current-source load. The equations
describing the operation of the inverter are:

di
L- = v -Ri - v U (I)
elt '
dvo . .
C"dt = 1 -10 (2)

© lEE, 2003
lEE Proceedmgs online no. 20030732
doi: I 0.1 049/ip-epa:20030732

Paper lirst received 3rd October 2002 and in revised limn 6th June 2001
Origin ally published online: 21st August 2003 -Vs

The au!hors are with the Eastern Meditt:rranean University, G. Magosa, Mersin
10; Turkey Fig.2 PWM comparison process

fEE Proc.-Elew. POlVer Appl.. Vol. f50. No.6. November 2003 743
In (3) i;
is the reference for the capacitor current generated where IX is the fractional error in these parameters. Also,
from Vo as: assume that the gain,R;, is expressed as:
.•
- C dV: Xp =.fJ(�2LC) ( 9)
Ie e (4)
dl
Then (6) yields:
where Ce is' the estimated value of the filter capacitance.
Note that in (3) an integral controller has not been used. It (10)
will be clear after obtaining the transfer functions from the
inputs to the output voltage that an integral controller is where ZL = R+jwL. Similarly, with the additional assump­
redundant. Such a controller would increase the order of the tion Ce=C, (5) yields:
system and would render the design more difficult. On the
I + IX
other hand, it would not have an effective contribution to ( =-_ _-::-
Z_L -=---=-)
G, Ciw) == . . (11)
the steady-state and dynamic behaviour of the system. A . . Kc JfJwL+ZL
-
block diagram of the UPS control system based on this The steady-state output voltage can be written ·as:

Vc,Uw) G,U�)Vo*Uw) + G2Uw)loCiw)


= (12)
where V;(jw) and /ijw) are the phasors representing the
sinusoidal reference voltage and load current. From (10)
and (11) it can be deduced that the gains Kc and'p should be
chosen as large as possible to minimise the error in the
output voltage. However, very large gains would amplify
the ripple components of the inductor current i and the
output voltage Vo> resulting in a large ripple in v�. This may
impair the PWM comparison process. In particular, the
inductor current ripple is dominant in determining the
ripple in v�. Thc high-frequency component of the rate of
Fig.3 Block diagram of the UPS conlrol ,y,\'tem change of IJ� is given approximately by:
d1J� d .
dI � Ked! (I * -I.) (13)
approach is shown in Fig. 3.
In (13) neglecting the rate of change of ( and also using the
The transfer function from reference to output can be
approximation:
obtained from (1)--(4) as:

( ) = f!;,(s) LeCes2 + (Re +Ke)Ces+Kp (14) .


GI S = (5)
f!;,* (s) LCs2 + (R+Kc)Cs+Kp
we can obtain
which is equal to unity if the estimated parameters match
their actual values. The transfer function from load to ( 15)
output (output impedance of the system) is similarly
obtained as: The m im m of this rate is when Vj-Vo = V" and is
ax u -
Va(s)(Le - L)s+ (Re - R) bounded by the slope of the triangular carrier as follows:
(6)
Gz(s) = Io(s) = LCS2 + (R+Kc)Cs+Kp ( 16)
which is equal to zero if the estimated and actual parameters
match. Note that the PWM block in Fig. 3 has been where 'Fe is the period of the carrier. From (16) we obtain:
represented by its describing function, which is a constant Kc 'S 2/rL (17)
gain given by:
Equation (17) gives an approximate upper bound for Kc.
Vim Another important criterion [or the selection of the gains is
KPJIM =- (7)
V;,;. the dynamic response of the system. Note that the
characteristic polynomial of the system is:
where v"" is the amplitude of the fundamental component
of V; and V;m is the amplitude of v� (assumed to be D(s) = LO,.2 + (R+K,)s+Kp (18)
sinusoidal). It is well-known that K pWM is equal to unity for
The gains KG and Kp can be chosen to place the poles of the
natural sampled PWM.
system at desired locations.
Equations (5) and (6) imply that the output voltage will
track its reference without any error, provided that there is a
3 Computer simulations
perfect match between estimated and actual parameters,
and also that the inverter output voltage does not reach
A single-phase UPS has been simulated to verify the
saturation (I v;1 < /I.,). However, it is almost impossible in
operation of the proposed control method. The parameters
practice to estimate perfectly the parameters of the filter.
of the system chosen for simulations are : L = 250 J!H,
Furthemlore, actual parameters are in general dependent
on operating conditions and also may change in time. For a
C==IOO�LF, R=O.05Q, V,n=120v!2V, V , = 275V,
Kp == 10, Kc= 5Q (which is the upper bound computed
mismatch between estimated and actual parameters there
from (16». The switching frequency of the in erter is v
will be a steady-state error in the output voltage. This error
j, 10 kHz. Simulations are performed using the Matlab
can be estimated by examining (5) and (6) in the frequency =
Simulink toolbox. Fig. 4 shows the output voltage and load
domain. Let the percentage errors in Re and Le be the same
current waveforms with a resistive load of R'o(ld= 48 n. The
and be given by:
total harmonic distortion of the voltage was computed as
Re=(I+a)R Le�(I+a)L. (8) 1.11 % and the fundamental amplitude as 169.7 V. Fig. 5

744 lEE Proc.-Eiec.lr. Power App! . Vol. 150. No.6. November 2003
200 10 200 30
8
20
6
4 10
2
> «
0 « ,.0
__0 ._c
�2
--4

-6
-8
-200 -30
-200 -10

Fig. 4 Simulated output voltaqe and the load current with resistive Fig. 7 Simulated output voltage and load current .with nonlinear
load with estimated parameters equal to actual tal"es load (diode bridge rectifier)

200
300

>
,.0

-200

Fig. 5 �rerenc" v7 for the oulpllt VOltIlUt! correspondiny 10 rhe


case in Fiy. 4 200 60

shows the reference wave for the inverter output voltage.


Fig. 6 shows the respon se of the out p ut voltage when the
estimated parameters are 10% less than their actual values.
The total harmonic distortion and th e fundamental
amplitude for this case were computed as 1.102% and
169.7 Y, respectively, ind icati ng that the steady-state error in
th e output voltage is negligibly small. This is the r esult of
-200 --{)o
choosing sufficiently large gains .
Figure 7 shows the computed output voltage for when b
th e load i s a diode bridg e rectifier with a capacitor filter at
Fig. 8 Simulated output voltaye and load current with step chanqes
its output. In this si mula tion the estimated parameters were
in resistive load
equated to their actual val ues . It can he ohserved that the
a Rloau 00 --> 18 [!
output voltage is very little affected by the load disturbance.
b Rloau 00-->60
The computed total harmonic distortion and the funda­
mental amplitude are 0.96% and 169.8 Y, res pec tively.
Figure 8 shows the responses of the output voltage to Fig. 8a cl ea rly indicates that the output voltage is not
step changes in the load resistance. where the estimated affected by the ste p change in the load current as long as
parameters were again equated to their actual values. there is no saturation in the control variabl e (th e inverter
voltage v;). In Fig. 8b the inverter voltage is saturated and
hence the o u tput voltage Vo. is unable to follow its sinu soidal
reference.
200 10
8
4 Experimental results

4 An experimental sy ste m was set up and operate d in the


2 laboratory in order to verify the t heor etical considerations.
> «
A full-bridge inve rt er was constructed using a Fuji
,.0, __0 6MBP30RH060 intelligent power module and t he asso­
ciated control circuits. A deadtime of 2. 5 �lS was provided
--4 for the inverter IGBTs on the same in v e rter leg. The DC
-6 input voltage is obta ined from a single-p hase fu lly­
-8
contro l led bri dge rectifier. The experimental results corre­
sponding to the simulated cases are presented in Figs. 9� II.
-200 -10
Fig. 9 show s the output voltage and load current with a
Fig.6 Simulated output voltaye and load current with resistive resi sti ve load (note that the load is actually slightly
load with estimated parameters 1(f'/o less than actual values capacitive). This corresponds to the simulated result in

lEE Proc.-Elecrr. Power Appl.. Vol. 150. No. 6. N�vember 2003 745
Tek J'L
F"'!'" , '
CHl
1��''''';-�-i'1}�.:,.n!"s,!?P�,.( ."M,.!.,�s". :;:1?�"�!�s"""l
T ...
CHl
coupling coupling

Ell

.. ��
.: mI
BWl imit 1 BWiimii
"
A�!!L-
j" . �,4·
.. ....
:
��t· ·
Vldivision
__
2 . ' rrsI 'v������
'� "
probe
probe

Ell

CH1
1.,.,."50.0V
,.Y.�.,.;,CH2
,.�.;.•:.o.�:..�•...:;_�.�:�-,-,-;_._�•.,�.�_.,.
•.

5.00V M 5.00ms
�"
CH1J5B.OV
... _

Fig.9 111easured output voltage and current with resistive load


Fig. 11 Mewured output voltage and current with a diode bridge
(vertical scale 50 V/d ivisi on for mlta!le, 2A/division for current;
rectifier load (vertical scale 50 Vldivision for voltage. 1 Aldivision for
horizontal scale: 5A/division)
current; horizol1tal scale 5 IlIs/divisiol1)

5 Conclusions

A control method is proposed for single-phase UPS


inverters in continuous time, which leads to a simpler
controller structure than for existing methods. It is shown
that it is possible to achieve zero output impedance of the
UPS system, with the result that load disturbances do not
affect the output voltage. The integral controller employed
in most of the existing methods is also shown to be
redundant. Simulation and experimental results indicate
that the proposed method leads to very good steady-state
and dynamic characteristics.

Fig. 10 Reference signal (v;) for the case il1 Fi!l. 8 (vertical scale
5 Vldivision; horizontal smll! 5 IlIsidivision) 6 References

Fig. 4. The reference signal (v�) for this case appears in


.
Kawamura, A . and CJ:1l1arayaratip, R.: 'Deadbeat control of PWM
in verter with modified pulse patterns for uninterruptible power supply',
IEEE Trans. Inc! Electron., 1988,35, (2), pp. 295-300
Fig. 10, which corresponds to the simulated result in Fig. 5.
It can be observed that the output voltage is ncarly
2 H ua, c.: 'Two-Ievd switching pattern deadbeat DSP controlled PWM
inverter', IEEE Trans. POlVer Electron.. 1995,10, (3), p p 310-317.
lung, S.L., an d Tzou, Y.Y.: ' Discrete sliding-mode control of a PWM
sinusoidal with negligible distortion. In Fig. 11 the inverter
inverter for sinusoidal output waveform synthesis with. op timal sltding
output voltage and current with a diode bridge rectifier load curve', IEEE Trans. Po wer Electron., 1996.11, (4), pp. 567-577
are given, corresponding to the simulated response in Fig. 7. 4 Chern, T.L.. Chang, J., Chen, C.H., and Su, H.T: 'Microprocessor­
based modified discrete integral variable str uctu re control for UPS',
Clearly, the output voltage in the experimental case is more
IEEE Trans. Inc! Electroll., 1999,46, (2), pp. 340-348
distorted and voltage sags occur slightly when the load Klikrcr. 0., anu Komlirciigil, H.: 'Deadbeat control method for single­
current rises sharply. The reason for the difference between phas e UPS invertcrs with compensation of com putation delay', lEE
Proc., Electr. Power App/., 1999, 146, (I), pp. 123-128
the experimental and simulation results is the effect of filters
6 Abdcl-Rahim, N.M.. and Quaicoe, l.E.: 'Analysis and design of a
used in the practical system to suppress high-frequency multiple feedback l o op control strategy for single-phase voltage-source
noise in the measured signals. Nevertheless, the measured UPS inverters', IEEE Trans. Power Electron., 1996, II, (4), pp. 532-541
Ryan, M.1., Bru111sicklc, E.W., and Lorenz, R.D.: 'Control topology
output voltage in Fig . 11 has reasonably low distortion, options for single-phase UPS inverters', IEF:F: TrulL'. Inti App/., 1997,
measured as 4.8%. 33, (2), pp. 493-501

746 lEE Froc.-Ele"tr. Power Appl., Vol. ISO, No.6, November 2003

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