USN 16EC751

Seventh Semester B.E. Semester End Examination, Dec./Jan. 2019-20

Electronic System Design
Time: 3 Hours Max. Marks: 100

Instructions Five questions to be answered with at least one full question from each
: unit

UNIT - I L CO PO M

1 a. With an example explain Modules of SystemC

(2) (1) (1) (10 )

b. Explain Channels in SystemC

(2 ) (1) ( 1) ( 10)

OR

2 a. With example explain Processes in SystemC

(2 ) (1 ) ( 1) ( 10)

b. With example explain Events in SystemC

(2 ) ( 1) (1 ) (10 )

UNIT – II L CO PO M

3 a. Explain RTL Model of Computation

(2 ) (2) (1) (10 )

b. Explain Static Data Flow Model

(2 ) (2 ) (1 ) (10 )

OR

4 a. Explain General Structure of RTL Model

(2) (2) (1 ) (10)

b. Explain the structural diagram of Robot Controller

(2) (2) (1) (10)

UNIT - III L CO PO M

5 a. With example explain untimed dataflow model

(2) (3 ) (1) (10)

b. Explain Timed Functional Model and Process of stopping the DataFlow simulation.

Note: L (Level), CO (Course Outcome), PO (Programme Outcome), M (Marks)

 (2) (3 ) (1) (10)

OR

6 a. With example explain Compile-Time Resolution of Parameters

(2) (3 ) (1) (10)

b. With example explain Elaboration-Time resolution of Parameters

(2) (3 ) (1) (10)

UNIT - IV L CO PO M

7 a. Explain basic guidelines to design an interface class

(2) (4 ) (1) (10)

b. Compare Primitive and Hierarchical Channels

(2) (4 ) (1) (10)

OR

8 a. With example explain Primitive Channels

(2) (4 ) (1) (10)

b. With example explain Hierarchical Channels

(2) (4 ) (1) (10)

UNIT -V L CO PO M

9 a. Explain the steps involved in Communication Refinement Process

(2) (5 ) (1) (10)

b. Explain Hardware-Hardware Communication Refinement Process

(2) (5 ) (1) (10)

OR

10 a. Explain the uses of high-level models in test bench

(2) (5 ) (1) (10)

b. Explain importance and the process of Tracing

(2) (5 ) (1) (10)

Note: L (Level), CO (Course Outcome), PO (Programme Outcome), M (Marks)