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KA3842B/KA3843B/KA3844B/
KA3845B
SMPS Controller
Features Description
• Low Start up Current The KA3842B/KA3843B/KA3844B/KA3845B are fixed
• Maximum Duty Clamp frequency current-mode PWM controller. They are
• UVLO With Hysteresis specially designed for Off - Line and DC-to-DC converter
• Operating Frequency up to 500KHz applications with minimum external components. These
integrated circuits feature a trimmed oscillator for precise
duty cycle control, a temperature compensated reference,
high gain error amplifier, current sensing comparator and a
high current totempole output for driving a power MOSFET.
The KA3842B and KA3844B have UVLO thresholds of
16V (on) and 10V (off). The KA3843B and KA3845B are
8.5V (on) and 7.9V (off). The KA3842B and KA3843B can
operate within 100% duty cycle. The KA3844B and
KA3845B can operate with 50% duty cycle.
8-DIP
1
14-SOP
Rev. 1.0.2
©2002 Fairchild Semiconductor Corporation
KA3842B/KA3843B/KA3844B/KA3845B
1000
900
800
14SOP
700
600
500
400
300
0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150
Thermal Data
Characteristic Symbol 8-DIP 14-SOP Unit
Thermal Resistance Junction-ambient Rthj-amb(MAX) 100 180 °C/W
Pin Array
8DIP,8SOP
8-DIP 14SOP
N/C 6 9 GND
2
KA3842B/KA3843B/KA3844B/KA3845B
Electrical Characteristics
(VCC=15V, RT=10KΩ, CT=3.3nF, TA= 0°C to +70°C, unless otherwise specified)
3
KA3842B/KA3843B/KA3844B/KA3845B
Note:
1. Parameter measured at trip point of latch
2. Gain defined as:
∆V pin1
- ,0 ≤ Vpin3 ≤ 0.8V
A = -----------------
∆V pin3
3. These parameters, although guaranteed, are not 100 tested in production.
High peak currents associated with capacitive loads necessitate careful grounding techniques Timing and bypass capacitors
should be connected close to pin 5 in a single point ground. The transistor and 5KΩ potentiometer are used to sample the
oscillator waveform and apply an adjustable ramp to pin 3.
4
KA3842B/KA3843B/KA3844B/KA3845B
During Under-Voltage Lock-Out, the output driver is biased to a high impedance state. Pin 6 should be shunted to ground with
a bleeder resistor to prevent activating the power switch with output leakage current.
5
KA3842B/KA3843B/KA3844B/KA3845B
Oscillator timing capacitor, CT, is charged by VREF through RT and discharged by an internal current source. During the dis-
charge time, the internal clock signal blanks the output to the low state. Selection of RT and CT therefore determines both
oscillator frequency and maximum duty cycle. Charge and discharge times are determined by the formulas:
tc = 0.55 RT CT
0.0063R T – 2.7
t D = R T C T I n ----------------------------------------
0.0063R T – 4
Figure 6. Oscillator Dead Time & Frequency Figure 7. Timing Resistance vs Frequency
(Deadtime vs CT RT > 5kΩ)
6
KA3842B/KA3843B/KA3844B/KA3845B
Shutdown of the KA3842B can be accomplished by two methods; either raise pin 3 above 1V or pull pin 1 below a voltage
two diode drops above ground. Either method causes the output of the PWM comparator to be high (refer to block diagram).
The PWM latch is reset dominant so that the output will remain low until the next clock cycle after the shutdown condition at
pins 1 and/or 3 is removed. In one example, an externally latched shutdown may be accomplished by adding an SOR which
will be reset by cycling VCC below the lower UVLO threshold. At this point the reference turns off, allowing the SCR to reset.
A fraction of the oscillator ramp can be resistively summed with the current sense signal to provide slope compensation for
converters requiring duty cycles over 50%. Note that capacitor, CT, forms a filter with R2 to suppress the leading edge switch
spikes.
TEMPERATURE (°C)
Figure 12. Temperature Drift (Icc)
7
KA3842B/KA3843B/KA3844B/KA3845B
Mechanical Dimensions
Package
Dimensions in millimeters
8-DIP
)
6.40 ±0.20
0.031
0.79
0.252 ±0.008
1.524 ±0.10
0.060 ±0.004
0.018 ±0.004
0.46 ±0.10
(
#1 #8
0.362 ±0.008
MAX
9.20 ±0.20
0.378
9.60
#4 #5
0.100
2.54
5.08 3.30 ±0.30
MAX 0.130 ±0.012
0.200
7.62
0.300 3.40 ±0.20 0.33
0.134 ±0.008 0.013 MIN
+0.10
0.25 –0.05
+0.004
0.010 –0.002
0~15°
8
KA3842B/KA3843B/KA3844B/KA3845B
14-SOP
0.05
MIN
0.002
1.55 ±0.10
)
0.061 ±0.004
0.019
0.47
(
#1 #14
MAX
0.337 ±0.008
+0.004
8.56 ±0.20
+0.10
0.016 -0.002
0.406 -0.05
0.343
8.70
#7 #8
0.050
1.27
6.00 ±0.30 1.80
0.236 ±0.012 MAX
0.071
+0.004
+0.10
0.008 -0.002
0.20 -0.05
MAX0.004
MAX0.10
3.95 ±0.20
0.156 ±0.008
5.72
8°
0~
0.225
0.60 ±0.20
0.024 ±0.008
9
KA3842B/KA3843B/KA3844B/KA3845B
Ordering Information
Product Number Package Operating Temperature
KA3842B
KA3843B
8-DIP
KA3844B
KA3845B
0 ~ + 70°C
KA3842BD
KA3843BD
14-SOP
KA3844BD
KA3845BD
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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