Introduction to

Atmega AVR Series

of Microcontrollers
CS308 – Embedded Systems Lab

Kavi Arya
CSE Dept., IIT-Bombay

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 Microprocessors
A Microprocessor is a processor implemented on
(usually) one integrated circuit.

A processor requires:
• memory for program and data storage
• support logic
• Input and Output ports

Data is read from and written to memory.

Instructions are read from (flash) memory.

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 Types of Computers (2)

RISC - Reduced Instruction Set Computer

The instruction set is small, and most instructions
complete in one cycle (100 or less instruction
types, smaller range of addressing modes).
Multiply & Divide performed using add/subtract & shift

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 Types of Computers (3)

CISC - Complex Instruction Set Computer

 The instruction set is large, and offers great variety of
instructions (100 or more instruction types, many
addressing modes).
 Few instructions complete in one cycle
Typically includes multiply & divide operations that may
take many cycles to complete.
EG the 68HC11 takes- 10 Cycles for (8x8) MUL
41 cycles for 16 / 16 Divide. 200K mul/sec, 50K div / sec

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 The AVR family members (1)

•The AVR is a special type of microprocessor known as a

microcontroller.

• Designed for industrial control appns, but has many uses.

•The AVR family of microcontrollers:

• Ranges from a tiny 8 Pin DIP ATTINY11 with 1KB of ISP
programmable flash and only 32 Registers costing under
INR 20.00
• Up to a powerful 100pin TQFP ATMEGA2560 with 256KB
flash, 8KB (RAM expandable to 64KB), 8KB EEPROM, 10
bit ADC, timers, PWM outputs, costing around INR 900.00
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 The AVR family members (2)

Special purpose peripheral versions :

AT90CAN128 - MCU similar to the ATMEGA128 but
incorporating (Automotive) CAN bus interface.

AT90USB1287 - MCU similar to the ATMEGA128 but

incorporating USB interface.

AT90PWM1 - MCU similar to the ATMEGA8535 but

incorporating PWM controllers specifically for lighting and
motor control.

ATMEGA64RZ -AVR Z-Link chipset for IEEE 802.15.4

and ZigBee wireless applications.
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 The AVR family members (3)

New high performance 32 bit MCU/DSP AVRs :

The AVR32 UC3B devices deliver 72 Dhrystone

MIPS (DMIPS) at 60 MHz, and include true single-
cycle MACs and DSP arithmetic and consume only
23 mA at 3.3V.

DSP - Digital Signal Processor.

MAC - Multiply & ACcumulate - A typical function
performed by DSPs to implement Filters, Discrete/
Fast Fourier Transforms (butterfly) etc...

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 The AVR family members (4)

•New ultra low power - “Pico Power” - AVRs :

•ATmega48P/88P/168P/328P devices have 4, 8, 16 and
32 Kbytes of Flash memory, respectively.
•These devices consume as little as 340 uA in active
mode at 1.8V running from the internal RC oscillator at 1
MHz, 650 nA in power-save mode with real time counter
running, and 100 nA in power-down mode.
•I.e. a device running on 2 x AA Alkaline batteries
(2500mAH) could run for 10 Months in active mode, 430
Years in power-save mode, or
•2800 years on power-down mode (roughly the shelf life
of the batteries)

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 Programs (1)

Instructions are read from program memory.(Fetch)

As each instruction is decoded, it causes the

processor to perform a given operation. (Execute)

A self-contained sequence of instructions is a

program.

The AVR processor fetches one instruction at a time,

and concurrently executes the previously fetched
instruction.

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 Programs (2)

Programs are also know as software

The electronic components that make up a computer

are called hardware.

When programs are stored in ROM, EPROM,

EEPROM or FLASH memory, they are called
firmware

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Address Space - Data Memory
Addresses are numbers that point to locations in
memory.

The ATMEGA128 has a linear 16-bit data address bus,

which means it can address 65536 RAM memory
locations. Its address range is from 0000 to FFFF.

It is therefore said to have a 64k data address space.

The CPU registers are directly accessable in the lowest

32 memory locations.

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 Address Space - ata RAM
The first 4352 Data Memory
locations are allocated to on chip
functions:

The first 32 locations address the

Register file, the next 64 location
the standard I/O memory, then 160
locations of Extended I/O memory,
and the next 4096 locations
address the internal data
SRAM (Static RAM).

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 Address Space - EEPROM
EEPROM Data Memory

The ATmega128 contains 4K bytes of data EEPROM

memory. It is organised as a separate data space, in
which single bytes can be read and written. The
EEPROM has an endurance of at least 100,000
write/erase cycles.

The access between the EEPROM and the CPU is by

specifying the (read/write) operation using the
EEPROM Address Registers, the EEPROM Data
Register, and the EEPROM Control Register.

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Address Space - for Programs
All AVR instructions require a 16-bit (2-byte) program
word.

The AVR can address 65536 program flash memory

locations. Its linear address range is from 0000 to
FFFF. This is arranged as 64K word locations.

It is therefore said to have a 64k word data address

space - i.e. the ATMEGA128 has a 128KB flash
Program address space arranged as 16 bit words.

Every instruction fetched is 16 bits.

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 I/O Address Space
The AVR has a separate 64 byte I/O address space
for I/O ports and peripheral control registers.

The I/O addresses can be accessed using IN and

OUT instructions.

However, the ATMEGA128 is a complex

microcontroller which outgrew the original I/O space
architecture allocated for smaller AVRs. So the I/O
space is extended such that the extra I/O registers
appear mapped into memory address space.

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 Registers

Registers are the internal storage of a processor. They

hold the data the processor is currently using.

For a processor to manipulate the data at a given location

in memory, that data must first be loaded into a register.
The data is then manipulated according to the current
instruction.

Registers may hold data, addresses or status information.

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 Buses
Buses are the transportation vehicles for (electrical)
signals, including both data and instructions,
between registers,
registers and memory locations,
and among memory locations

The AVR, is an 8-bit processor:

the external data bus consists of 8 bits and
the external address bus consists of 16 bits.

The program-address and program-data busses are

separate. Both consist are 16 bits, and operate
concurrently and separately to the data bus.

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 

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 

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 Fetch-Execute Cycle

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Single Cycle ALU operation

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 References
• AVR Datasheet (pls refer)
ATMEGA1280-2560 detailed.pdf
– Blockdiagram (3.1)
– AVR CPU Core (7.1 – 7.8 + refs)
– AVR Memory (8.0)
– System clock & clock options (10.0)
– Power management & sleep modes (11.0)
– System control & reset (12.0)
– I/O ports (13.0)

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 Homework
• Read section 5-13 (except sect.9) of AVR
datasheet.
• Queries in next session
• Be prepared for surprise quizzes
• ATMEGA1280-2560 detailed.pdf

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