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UnitTest D09 Apr 2021
UnitTest D09 Apr 2021
//X Section A
• Choose correct answer from the given options. [Each carries 1 Mark] [51]
M
1. 8) The combination of the gates shown in the figure will produce ...... gate.
A
A
LA
Y
B
B
(A) NOR gate (B) OR gate (C) AND gate (D) XOR gate
KU
2. 0) Name the gate, which represent the Boolean expression y = A × B
(A) AND (B) NOR (C) NAND (D) NOT
3. 2) Symbolic represention of NOR gate is ......
Entry No.
1
A
0
B
0
y
1
RU
4. ) Which of the following entry in the table is not truth for a NOR gate ?
2 0 1 0
3 1 0 0
GU
4 1 1 1
(A) 1 (B) 2 (C) 4 (D) 3
5. ) The output of AND gate is 1, so ......
(A) both input are zero. (B) one of input out of both is zero.
(C) none of true out of these. (D) both input are 1.
AM
6. ) A sinusoidal voltage of peak value 220 volts is connected to a diode and resistor R in the circuit
shown. If diode is ideal the rms voltage across R is ...... volt.
220 V
V0 R
HV
110 220
(A) 110 (B) (C) 220 (D)
2 2
7. 5) The forward and reverse bias resistance of a p-n junction diode is 20W and 2000W respectively.
How much current flows as shown in circuit arrangement ?
VIS
100W
5V 0V
1 1 1 1
(A) A (B) A (C) A (D) A
520 24 380 15
8. 9) The figure shows the input signal A, input signal B and output signal Y. Which logic gate does
it represent ?
1 1
(A) NAND
Input A 0 1 0
(B) AND
1
(C) OR Input B 0
Wish
0 You - All The Best
Output Y 1 1 1
(D) NOR
9) The figure shows the input signal A, input signal B and output signal Y. Which logic gate does
it represent ?
1 1
(A) NAND
Input A 0 1 0
(B) AND
1
(C) OR Input B 0
0
Output Y 1 1 1
(D) NOR
0
M
9. 8) Gate can be obtained by shorting both the input terminals of a NOR gate is .....
(A) OR (B) AND (C) NOT (D) NAND
10.2) For the circuit shown in the figure. The equivalent resistance between point A and B for the two
cases (i) VA > VB (ii) VB > VA respectively is ...... W and ...... W. (D1 and D2 are ideal diodes)
LA
50W D1
A B
KU
50W
D2
(A) 50, ¥ (B) 25, 25 (C) ¥, 25 (D) 25, ¥
11.8) Which logic gate is equivalent to the characteristic of the logic circuit shown in figure ?
A
Y
RU
B
GU
(A) NOR (B) OR (C) NAND (D) NOT
12. A C
E
AM
B D
0 1 0 0 1 0 0 1 1 0 1 1
1 0 1 1 0 0 1 0 0 1 0 1
1 1 0 1 1 1 1 1 1 1 1 0
13. The given truth table is of ......
A Y
VIS
0 1
1 0
(A) OR gate (B) AND gate (C) NOT gate (D) none of these
14. Which of the following gate helps for following truth table ?
A B Y
(A) NAND 1 1 0
(B) AND 1 0 1
(C) NOR 0 1 1
(D) NOT 0 0 1
Wish You - All The Best
Which of the following gate helps for following truth table ?
A B Y
(A) NAND 1 1 0
(B) AND 1 0 1
(C) NOR 0 1 1
(D) NOT 0 0 1
M
(A) NOT (B) AND (C) OR (D) None of these
16. NAND gate is combination of ...... gate and ...... gate.
(A) OR, NOT (B) OR, AND (C) AND, NOT (D) AND, NOR
LA
17. NOR gate is the combination of ...... gate and ....... gate.
(A) OR, AND (B) NOT, OR (C) NAND, OR (D) none of these
18. ...... NAND gate is required for OR gate.
(A) 1 (B) 2 (C) 3 (D) 0
...... NOT gate is required for NAND gate.
KU
19.
(A) 0 (B) 1 (C) 2 (D) 3
20. Which of the following gate is equivalent to given logic circuit ?
(A) AND gate
A
(B) OR gate
Y
21.
(C) NAND gate
(D) NOR gate
B RU
Which of the following gate is equivalent to given logic circuit ?
(A) AND gate
(B) NAND gate
A Y
GU
(C) NOR gate
(D) NOT gate
22. Which of the following gates will have an output of 1 ?
1 AND 1 NOR
(A) 0 (B) 0
AM
0 NAND 0
(C) 1 (D) 1
23. The combination of NAND gates shown here are equivalent to an ......
A
HV
Y
B
A
B Y
VIS
(A) OR gate and an AND gate respectively. (B) AND gate and NOT gate respectively.
(C) AND gate and an OR gate respectively. (D) OR gate and NOT gate respectively.
24. For the given combination of gates, if the logic state of inputs A, B and C are as follows :
A = B = C = 0 and A = B = 1, C = 0 then the logic states of output Y are :
A 0, 1
B
Y
1, 1
C
0, 0
(A) 0, 0 (B) 0, 1 Wish You - All The
(C) Best
1, 0 (D) 1, 1
Y
1, 1
C
0, 0
(A) 0, 0 (B) 0, 1 (C) 1, 0 (D) 1, 1
25.0) Identify the operation performed by the circuit given below.
A
Y
B
M
26.1) The boolean equation for the circuit given in figure is ......
A
B Y
LA
(A) Y = A + B (B) Y = A + B (C) Y = A + B (D) Y = A + B
27. ) For any logic gate, the figure shows the input signal A, input signal B and output Y. Which logic
gate does it represent ?
KU
1 1
Input A 0
0 1
1
Input B 0
0
RU
Output Y 1 1 1
0
GU
(A) NAND (B) AND (C) OR (D) NOR
28.4) The boolean equation for the circuit shown in the figure ......
A
Y
B
C
AM
(A) Y = A · B + C (
(B) Y = A · B + C ) (
(C) Y = A · B + C ) (D) Y = A · (B + C)
29. ) How many AND gates are needed for NAND gate ?
(A) 4 (B) 3 (C) 2 (D) 1
30.6) To form one AND gate require ...... NAND gates.
HV
1 0 1 1 0 0 1 0 0 1 0 1
1 1 1 1 1 1 1 1 0 1 1 0
(i) (ii) (iii) (iv)
(A) (iv) (B) (iii) (C) (ii) (D) (i)
32.8) Following are the input and output in different periods for the NAND gate, then values of P, Q,
R, S are ...... respectively.
Time Input A Input B Output y
interval
t1 to t2 0 1 P
t2 to t3 0 0 WishQYou - All The Best
t3 to t4 1 0 R
8) Following are the input and output in different periods for the NAND gate, then values of P, Q,
R, S are ...... respectively.
Time Input A Input B Output y
interval
t1 to t2 0 1 P
t2 to t3 0 0 Q
t3 to t4 1 0 R
t4 to t5 1 1 S
M
(A) 1, 1, 1, 0 (B) 0, 1, 0, 1 (C) 0, 1, 0, 0 (D) 1, 0, 1, 1
33. ) Output to a given logic circuit ......
LA
B
y
KU
(A) A × (B + C) (B) A × (B × C) (C) (A + B) × (A + C) (D) A + B + C
34. ) Which one is equivalent to the circuit shown in the figure below ?
A
y
B
A
(A) NOR gate
y1
(B) OR gate
RU (C) AND gate (D) NAND gate
B y2
111)
35. C
y3
GU
D
A Y
Specify the exact logic operation that will occur with this circuit.
(A) The output is ‘1’ when one or all the input are ‘1’.
(B) The output is ‘1’ only when all input is ‘1’ for all other conditions it is ‘0’.
HV
(C) When input is ‘1’ output is ‘0’ and input is ‘0’ when output is ‘1’.
(D) When one input is ‘0’, output is ‘1’ and all input is ‘1’ then output is ‘0’.
37. Which gate will be obtained by the combination of the following gates ?
VIS
LA
table.
KU
(A) (B) (C) (D)
(i) (iii)
(ii) (iv)
AM
The logic symbols for OR, NOT and NAND gates are respectively.
(A) (iv), (i), (iii) (B) (iv), (iii), (i) (C) (i), (iii), (iv) (D) (iii), (iv), (ii)
42. The figure shown a logic circuit with two inputs A and B and the output C. The voltage wave
forms across A, B and C are as given. The logic circuit gate is ......
HV
B
VIS
C
0 t1 t2 t3 t4 t5 t6
(A) OR gate (B) NOR gate (C) AND gate (D) NAND gate
43. Which of the following will be the correct input to get output Y = 1 in the given circuit ?
A
B
Y
A B C
(A) 1 0 0
Wish You - All The Best
(B) 1 0 1
B
Y
A B C
(A) 1 0 0
(B) 1 0 1
(C) 1 1 0
(D) 0 1 0
44. Output (X) in the logic circuit shown in figure ......
M
A
x
B
LA
45. Which logic gate is represented by the following combination of logic gates ?
Y1
A
KU
B
Y2
– 5V
+ 5V
RL
RU
then the output across RL will be :
10 V
GU
5V
(A) (B) (C) (D)
– 5V
– 10 V
47. What is the output Y in the following circuit, when all the three inputs A, B, C are first 0 and
then 1 ?
AM
A
P
B Q Y
C
B Y
(A) NAND gate (B) AND gate (C) OR gate (D) NOT gate
VIS
49. In the combination of the following gates the output Y can be written in terms of input A and
B as ......
A
B
Y
1 0 1 0
(A) (B) (C) (D)
1 0 0 0
51.1) Which logic gate is represented by the following logic gates ?
A
Y
M
B
LA
KU
RU
GU
AM
HV
VIS
//X Section A
• Choose correct answer from the given options. [Each carries 1 Mark] [51]
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