Professional Documents
Culture Documents
LED TV
SERVICE MANUAL
CHASSIS : LA44B
CONTENTS . ............................................................................................. 2
SPECIFICATION........................................................................................ 4
ADJUSTMENT INSTRUCTION................................................................. 9
TROUBLE SHOOTING............................................................................. 16
BLOCK DIAGRAM................................................................................... 22
Copyright © LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
Copyright © LG Electronics. Inc. All rights reserved. -3- LGE Internal Use Only
Only for training and service purposes
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or expo-
NOTE: If unforeseen circumstances create conflict between the sure of the assembly.
following servicing precautions and any of the safety precautions 3. Use only a grounded-tip soldering iron to solder or unsolder ES
on page 3 of this publication, always follow the safety precautions. devices.
Remember: Safety First. 4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as “anti-static” can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board mod- 6. Do not remove a replacement ES device from its protective
ule or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug or (Most replacement ES devices are packaged with leads electri-
other electrical connection. cally shorted together by conductive foam, aluminum foil or
c. Connecting a test substitute in parallel with an electrolytic comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective material
installation of electrolytic capacitors may result in an explo- to the chassis or circuit assembly into which the device will be
sion hazard. installed.
2. Test high voltage only by measuring it with an appropriate CAUTION: Be sure no power is applied to the chassis or circuit,
high voltage meter or other voltage measuring device (DVM, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged replace-
Do not test high voltage by "drawing an arc". ment ES devices. (Otherwise harmless motion such as the
3. Do not spray chemicals on or near this receiver or any of its brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity suf-
4. Unless specified otherwise in this service manual, clean ficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10 % (by volume) Acetone and 90 % 1. Use a grounded-tip, low-wattage soldering iron and appropriate
(by volume) isopropyl alcohol (90 % - 99 % strength) tip size and shape that will maintain tip temperature within the
CAUTION: This is a flammable mixture. range or 500 °F to 600 °F.
Unless specified otherwise in this service manual, lubrication of 2. Use an appropriate gauge of RMA resin-core solder composed
contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks are Do not use freon-propelled spray-on cleaners.
correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500 °F to 600 °F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500 °F to 600 °F)
Some semiconductor (solid-state) devices can be damaged eas- b. First, hold the soldering iron tip and solder the strand against
ily by static electricity. Such components commonly are called the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors component lead and the printed circuit foil, and hold it there
and semiconductor “chip” components. The following techniques only until the solder flows onto and around both the compo-
should be used to help reduce the incidence of component dam- nent lead and the foil.
age caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. Alter- splashed solder with a small wire-bristle brush.
natively, obtain and wear a commercially available discharging
wrist strap device, which should be removed to prevent poten-
tial shock reasons prior to applying power to the unit under test.
Copyright © LG Electronics. Inc. All rights reserved. -4- LGE Internal Use Only
Only for training and service purposes
IC Remove/Replacement 3. Solder the connections.
Some chassis circuit boards have slotted holes (oblong) through CAUTION: Maintain original spacing between the replaced
which the IC leads are inserted and then bent flat against the cir- component and adjacent components and the circuit board to
cuit foil. When holes are the slotted type, the following technique prevent excessive component temperatures.
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique Circuit Board Foil Repair
as outlined in paragraphs 5 and 6 above. Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
Removal board causing the foil to separate from or "lift-off" the board. The
1. Desolder and straighten each IC lead in one operation by following guidelines and procedures should be followed whenever
gently prying up on the lead with the soldering iron tip as the this condition is encountered.
solder melts.
2. Draw away the melted solder with an anti-static suction-type At IC Connections
solder removal device (or with solder braid) before removing To repair a defective copper pattern at IC connections use the
the IC. following procedure to install a jumper wire on the copper pattern
Replacement side of the circuit board. (Use this technique only on IC connec-
1. Carefully insert the replacement IC in the circuit board. tions).
2. Carefully bend each IC lead against the circuit foil pad and
solder it. 1. Carefully remove the damaged copper pattern with a sharp
3. Clean the soldered areas with a small wire-bristle brush. knife. (Remove only as much copper as absolutely necessary).
(It is not necessary to reapply acrylic coating to the areas). 2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
"Small-Signal" Discrete Transistor 3. Bend a small "U" in one end of a small gauge jumper wire and
Removal/Replacement carefully crimp it around the IC pin. Solder the IC connection.
1. Remove the defective transistor by clipping its leads as close 4. Route the jumper wire along the path of the out-away copper
as possible to the component body. pattern and let it overlap the previously scraped end of the
2. Bend into a "U" shape the end of each of three leads remaining good copper pattern. Solder the overlapped area and clip off
on the circuit board. any excess jumper wire.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding At Other Connections
leads extending from the circuit board and crimp the "U" with Use the following technique to repair the defective copper pattern
long nose pliers to insure metal to metal contact then solder at connections other than IC Pins. This technique involves the
each connection. installation of a jumper wire on the component side of the circuit
board.
Power Output, Transistor Device
Removal/Replacement 1. Remove the defective copper pattern with a sharp knife.
1. Heat and remove all solder from around the transistor leads. Remove at least 1/4 inch of copper, to ensure that a hazardous
2. Remove the heat sink mounting screw (if so equipped). condition will not exist if the jumper wire opens.
3. Carefully remove the transistor from the heat sink of the circuit 2. Trace along the copper pattern from both sides of the pattern
board. break and locate the nearest component that is directly con-
4. Insert new transistor in the circuit board. nected to the affected copper pattern.
5. Solder each transistor lead, and clip off excess lead. 3. Connect insulated 20-gauge jumper wire from the lead of the
6. Replace heat sink. nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Diode Removal/Replacement Carefully crimp and solder the connections.
1. Remove defective diode by clipping its leads as close as pos- CAUTION: Be sure the insulated jumper wire is dressed so the
sible to diode body. it does not touch components or sharp edges.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Copyright © LG Electronics. Inc. All rights reserved. -5- LGE Internal Use Only
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
4. General Specification
No Item Specification Result Remark
1. Receiving System 1) ATSC / NTSC-M / 64 QAM / 256 QAM
1) ATSC / NTSC-M / 64 QAM / 256 QAM ATSC Suffix (“WD”) only model
PAL-M / PAL-N /
2. Available Channel 1) VHF : 02~13
2) UHF : 14~69
3) DTV : 02-69
4) CATV : 01~135
5) CADTV : 01~135
3. Input Voltage AC 100 ~ 240V 50/60Hz Mark : 110V, 60Hz (N.America)
4. Market NORTH AMERICA
5. Screen Size 32/39/42/47/50/55inch Wide (1920 × 1080) FHD + 60Hz 32LB5600-UH
39LB5600-UH
42LB5600-UH
55LB5500-UC
49LB5500-UC
42LB5500-UC
32/37inch Wide (1366 × 768) HD + 60Hz 32LB560B-UH
32LB550B-UC
6. Aspect Ratio 16:9
7. Tuning System FS
Copyright © LG Electronics. Inc. All rights reserved. -6- LGE Internal Use Only
Only for training and service purposes
No Item Specification Result Remark
8. Module DIRECT L TBD LGD 32LB5600-UH
DIRECT L LC420DUE-FGA3 LGD 42LB5600-UH
DIRECT L T420HVF07.0 AUO 42LB5600-UH
DIRECT L NC390DUN-VXBP1 INX 39LB5600-UH
DIRECT L LC320DUE-FGA3 LGD 32LB5600-UH
DIRECT L NC320DXN-VSBP1 Sharp 32LB560B-UH
DIRECT L HC320DXN-VSHS1 CSOT 32LB560B-UH
DIRECT L LC320DXE-FGA3 LGD 32LB560B-UH
DIRECT L HC550DUN-ABHR1 BOE 55LB5500-UC
DIRECT L LC550DUE-FGA5 LGD 55LB5500-UC
DIRECT L LC490DUE-FGA5 LGD 49LB5500-UC
DIRECT L LC420DUE-FGA5 LGD 42LB5500-UC
DIRECT L NC320DXN-VSBP2 Sharp 32LB550B-UC
DIRECT L LC320DXE-FGA5 LGD 32LB550B-UC
9. Operating Environment 1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
10. Storage Environment 1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %
Copyright © LG Electronics. Inc. All rights reserved. -7- LGE Internal Use Only
Only for training and service purposes
5.2. HDMI Input (DTV/PC)
Copyright © LG Electronics. Inc. All rights reserved. -8- LGE Internal Use Only
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application 4. MAIN PCBA Adjustments
This spec. sheet applies to LA44B Chassis applied LED TV all
models manufactured in TV factory * Download
(1) Execute ISP program “Mstar ISP Utility” and then click
“Config” tab.
(2) Set as below, and then click “Auto Detect” and check “OK”
2. Specification message
(1) Because this is not a hot chassis, it is not necessary to use If display “Error”, Check connect computer, jig, and set.
an isolation transformer. However, the use of isolation (3) Click “Connect” tab. If display “Can’t ”, Check connect
transformer will help protect test instrument. computer, jig, and set.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 ±5 ºC of temperature and 65±10% of relative humidity if (1) (3)
there is no specific designation
(4) The input voltage of the receiver must keep 100~240V,
50/60Hz
(5) At first Worker must turn on the SET by using Power Only
key.
(6) The receiver must be operated for about 5 minutes prior to (2) OK
the adjustment when module is in the circumstance of over
15 ºC
In case of keeping module is in the circumstance of 0°C, it
should be placed in the circumstance of above 15°C for 2
hours
Please Check the Speed :
In case of keeping module is in the circumstance of below To use speed between from 200KHz to 400KHz
-20°C, it should be placed in the circumstance of above
15°C for 3 hours. (4) Click “Read” tab, and then load download file(XXXX.bin) by
clicking “Read”
※ Caution
When still image is displayed for a period of 20 minutes or
longer (especially where W/B scale is strong. (4)
Digital pattern 13ch and/or Cross hatch pattern 09ch), there
can some afterimage in the black level area
filexxx.bin
3. Adjustment items
3.1. Main PCBA Adjustments
(1) ADC adjustment : ADC adjustment is OTP (Auto ADC)
(2) EDID download : HDMI
3.3. Appendix
(1) Shipment conditions (6)
(2) Tool option menu
(3) USB Download (S/W Update, Option and Service only)
(4) Preset CH Information
Copyright © LG Electronics. Inc. All rights reserved. -9- LGE Internal Use Only
Only for training and service purposes
4.1. ADC Adjustment 4.2.5. EDID DATA
4.1.1. Overview 4.2.5.1. North America (PCM)
▪ ADC adjustment is needed to find the optimum black level 4.2.5.1.1. FHD Model
and gain in Analog-to-Digital device and to compensate RGB
deviation. ■ HDMI 1-FHD-8BIT (C/S : E708)
▪ ADC adjustment is OTP (Auto ADC) EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
4.2. EDID Download -----------------------------------------------------------------------------
4.2.1. Overview 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
▪ I t is a VESA regulation. A PC or a MNT will display an 10 | 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
optimal resolution through information sharing without any 20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
necessity of user input. It is a realization of “Plug and Play”. 30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
4.2.2. Equipment 50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
(1) Since EDID data is embedded, EDID download JIG, HDMI 60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
cable is not need. 70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E7
(2) Adjust by using remote controller
EDID Block 1, Bytes 128-255 [80H-FFH]
4.2.3. Download method (using DFT)
※ PC(for communication through RS-232C), UART baud rate: 0 1 2 3 4 5 6 7 8 9 A B C D E F
115200 bps -----------------------------------------------------------------------------
Command : aa 00 00 (Start Factory mode) 0 | 02 03 19 F1 48 90 22 20 05 04 03 02 01 23 09 57
Command : ae 00 10 (Download All EDID) 10 | 07 67 03 0C 00 10 00 80 1E 02 3A 80 18 71 38 2D
Command : aa 00 90 (End of Factory mode) 20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C
4.2.4. Download method (using Service Remocon)
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00
(1) Press Adj. key on the Adj. R/C.
60 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
(2) Select EDID D/L menu.
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08
(3) By pressing Enter key, EDID download will begin
(4) If Download is successful, OK is display, but If Download is
■ HDMI 2-FHD-8BIT (C/S : E7F8)
failure, NG is displayed.
EDID Block 0, Bytes 0-127 [00H-7FH]
(5) If Download is failure, Re-try downloads.
※Caution : W hen EDID Download, must remove HDMI
0 1 2 3 4 5 6 7 8 9 A B C D E F
Cable.
-----------------------------------------------------------------------------
(6) EDID Write confirmation
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
EDID D/L (PCM) 10 | 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
HDMI1 : OK 20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
HDMI2 : OK 40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
4.2.5. Models for EDID Data 70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E7
2D
HD / 8bit FHD / 8bit HD / 8bit FHD / 8bit EDID Block 1, Bytes 128-255 [80H-FFH]
HDMI 2ea HDMI 2ea HDMI 1ea HDMI 1ea
0 1 2 3 4 5 6 7 8 9 A B C D E F
North 32LB560B-UH 32LB5600-UH -----------------------------------------------------------------------------
America 32LB550B-UC 39LB5600-UH
0 | 02 03 19 F1 48 90 22 20 05 04 03 02 01 23 09 57
(PCM) 42LB5600-UH
10 | 07 67 03 0C 00 20 00 80 1E 02 3A 80 18 71 38 2D
55LB5500-UC
49LB5500-UC
20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71
42LB5500-UC 30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00
i 40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00
60 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F8
Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
4.2.5.1.2. HD Model 4.2.5.2. AC3 EDID Data
4.2.5.2.1. FHD Model
■ HDMI 1-HD (C/S : 6F08)
EDID Block 0, Bytes 0-127 [00H-7FH] ■ HDMI 1-FHD-8BIT (C/S : E796)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
----------------------------------------------------------------------------- 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 -----------------------------------------------------------------------------
10 | 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01 10 | 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70 20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30 30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A 40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 6F 60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E7
EDID Block 1, Bytes 128-255 [80H-FFH]
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
----------------------------------------------------------------------------- 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 | 02 03 19 F1 48 10 22 20 05 84 03 02 01 23 09 57 -----------------------------------------------------------------------------
10 | 07 67 03 0C 00 10 00 80 1E 02 3A 80 18 71 38 2D 0 | 02 03 1C F1 48 90 22 20 05 04 03 02 01 26 15 07
20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71 10 | 50 09 57 07 67 03 0C 00 10 00 80 1E 02 3A 80 18
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C 30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00 40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
60 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08 60 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 96
■ HDMI 2-HD (C/S : 6FF8)
EDID Block 0, Bytes 0-127 [00H-7FH] ■ HDMI 2-FHD-8BIT (C/S : E786)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
----------------------------------------------------------------------------- 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 -----------------------------------------------------------------------------
10 | 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01 10 | 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70 20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30 30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A 40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 6F 60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E7
EDID Block 1, Bytes 128-255 [80H-FFH]
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
----------------------------------------------------------------------------- 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 | 02 03 19 F1 48 10 22 20 05 84 03 02 01 23 09 57 -----------------------------------------------------------------------------
10 | 07 67 03 0C 00 20 00 80 1E 02 3A 80 18 71 38 2D 0 | 02 03 1C F1 48 90 22 20 05 04 03 02 01 26 15 07
20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71 10 | 50 09 57 07 67 03 0C 00 20 00 80 1E 02 3A 80 18
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C 30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00 40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
60 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F8 60 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 86
Copyright © LG Electronics. Inc. All rights reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
4.2.5.2.2. HD Model 5. Final Assembly Adjustment
■ HDMI 1-HD (C/S : 6F96) 5.1. White Balance Adjustment
EDID Block 0, Bytes 0-127 [00H-7FH] 5.1.1. Overview
5.1.1.1. W/B adj. Objective & How-it-works
0 1 2 3 4 5 6 7 8 9 A B C D E F (1) Objective: To reduce each Panel’s W/B deviation
----------------------------------------------------------------------------- (2) How-it-works: When R/G/B gain in the OSD is at 192, it
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 means the panel is at its Full Dynamic Range. In order to
10 | 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 prevent saturation of Full Dynamic range and data, one of
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01 R/G/B is fixed at 192, and the other two is lowered to find
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70 the desired value.
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30 (3) Adj. condition: normal temperature
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A - Surrounding Temperature: 25±5 ºC
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC - Warm-up time: About 5 Min
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 6F - Surrounding Humidity: 20% ~ 80%
- Before White balance adjustment, Keep power on status,
EDID Block 1, Bytes 128-255 [80H-FFH] don’t power off
0 1 2 3 4 5 6 7 8 9 A B C D E F 5.1.2. Equipment
----------------------------------------------------------------------------- (1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 CH14)
10 | 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 (2) A dj. Computer(During auto adj., RS-232C protocol is
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01 needed)
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70 (3) Adjust Remocon
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30 (4) V ideo Signal Generator MSPG-925F 720p/204-Gray
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A (Model:217, Pattern:49)
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC → Only when internal pattern is not available
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 6F ※ C olor Analyzer Matrix should be calibrated using
CS-1000
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 02 03 1C F1 48 10 22 20 05 84 03 02 01 26 15 07
10 | 50 09 57 07 67 03 0C 00 20 00 80 1E 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 86
Copyright © LG Electronics. Inc. All rights reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
5.1.3. Equipment connection 5.1.5. Adjustment method
5.1.5.1. Auto WB calibration
(1) Set TV in ADJ mode using P-ONLY key (or POWER ON
key)
(2) Place optical probe on the center of the display
- It need to check probe condition of zero calibration before
adjustment.
(3) Connect RS-232C Cable
(4) Select mode in ADJ Program and begin a adjustment.
(5) When WB adjustment is completed with OK message,
check adjustment status of pre-set mode (Cool, Medium,
Warm)
(6) Remove probe and RS-232C cable.
※ W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need.
Copyright © LG Electronics. Inc. All rights reserved. - 13 - LGE Internal Use Only
Only for training and service purposes
5.1.6. Reference 5.2. Option selection per country
( White Balance Adj. coordinate and color 5.2.1. Overview
temperature) (1) Tool option selection is only done for models in Non-USA
▪ Luminance: 204 Gray, 80IRE North America due to rating
**(normal line) Model : For LGD (LB56xx, LB55xx) (2) Applied model: LA32B Chassis applied to CANADA and
▪ S tandard color coordinate and temperature using MEXICO
CA-210(CH-14) – by aging time
Cool Medium Warm 5.2.2. Country Group selection
H/R Time(Min) x y x x y x (1) Press ADJ key on the Adj. R/C, and then select Country
Group Menu
271 270 285 293 313 329 (2) Depending on destination, select US, then on the lower
1 0-2 281 285 295 308 323 344 Country option, select US, CA, MX.
Selection is done using +, - KEY
2 3-5 280 284 294 307 322 343
(3) Using DFT(Auto)
3 6-9 279 282 293 305 321 341 ※ PC (for communication through RS-232C) -> UART Baud
4 10-19 277 279 291 302 319 338 rate : 115200 bps
Command : ah 00 00 DATA(Area Number(hexadecimal))
5 20-35 275 275 289 298 317 334
ITEM DATA(Area Number) AREA
6 36-49 273 273 287 296 315 332
7 50-79 272 272 286 295 314 331
AREA OPTION1 0 USA
**(aging chamber) Model : For LGD (LB56xx, LB55xx) 5.2.3. Tool Option inspection
▪ Standard color coordinate and temperature using ▪ Press Adj. key on the Adj. R/C, then select Tool option
CA-210(CH-14) – by aging time
Tool Tool Tool Tool
Model Module
Cool Medium Warm option1 option2 option3 option4
H/R Time(Min) x y x x y x 32LB5600-UH LGD 00529 01030 24716 20544
271 270 285 293 313 329 32LB550B-UC LGD 00529 13314 24716 20544
1 0-5 280 285 294 308 319 340 42LB5600-UH LGD 01297 01030 24716 20544
2 6-10 276 280 290 303 315 335 42LB5600-UH AUO 09488 01030 24716 20544
3 11-20 272 275 286 298 311 330 39LB5600-UH INX 17426 01030 24716 20544
4 21-30 269 272 283 295 308 327 32LB560B-UH 12816
SHARP 09218 24716 20544
5 31-40 267 268 281 291 306 323 (MIRROR?)
Copyright © LG Electronics. Inc. All rights reserved. - 14 - LGE Internal Use Only
Only for training and service purposes
6. GND and HI-POT Test * USB S/W Download (option, Service only)
(1) Put the USB Stick to the USB socket.
6.1. GND & HI-POT auto-check preparation (2) Automatically detecting update file in USB Stick.
(1) Check the POWER CABLE and SIGNAL CABE insertion
- If your downloaded program version in USB Stick is Low,
condition
it didn't work. But your downloaded version is High, USB
data is automatically detecting
6.2. GND & HI-POT auto-check (3) Show the message "Copying files from memory"
(1) Pallet moves in the station. (POWER CORD / AV CORD is
tightly inserted)
(2) Connect the AV JACK Tester.
(3) Controller (GWS103-4) on.
(4) GND Test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, execute next process (Hi-pot test).
(Remove A/V CORD from A/V JACK BOX)
(5) HI-POT test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, GOOD Lamp on and move to next
process automatically (4) Updating is staring.
6.3. Checkpoint
(1) Test voltage
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
(2) TEST time: 1 second
(3) TEST POINT
- GND Test = P OWER CORD GND and SIGNAL CABLE
GND.
- Hi-pot Test = POWER CORD GND and LIVE & NEUTRAL.
(4) LEAKAGE CURRENT: At 0.5mArms
7.2. Specification
No Item Min Typ Max Unit Remark
1 Audio practical 9.0 10.9 12.0 W (1) Measurement
max Output, L/R 8.5 9.3 9.8 Vrms condition
(Distortion=10% - EQ/AVL/Clear
max Output) Voice: Off (5) After updating is complete, The TV will restart automatically.
(2) Speaker (6) If TV turns on, check your updated version and Tool option.
(8Ω Impedance)
(refer to the next page about tool option)
* If downloading version is higher than your TV have, TV
can lost all channel data. In this case, you have to
8. Eye Sensor Function check channel recover. If all channel data is cleared, you didn't
(1) Press EYE key of Adj. R/C in dark room have a DTV/ATV test on production line.
(2) Check below two conditions in dark room
i) Check if Check Result is OK. ※After downloading, TOOL OPTION setting is needed again.
ii) Check if the Backlight value is lower than 40 (1) Push "IN-START" key in service remote controller.
-> W hen Check Result is OK and Backlight value is lower (2) Select "Tool Option 1" and Push “OK” button.
than 40, Eye Sensor operates normally. (3) Punch in the number. (Each model has their number.)
(3) After coming out of Darkroom, check if Sensor Data value
and Backlight value rise
Copyright © LG Electronics. Inc. All rights reserved. - 15 - LGE Internal Use Only
Only for training and service purposes
TROUBLE SHOOTING
1. Power-up boot check
Check stand-by Voltage. No ok M ain B/D 3.5V Line ok
Check 18pin Power connector Replace Power board.
P401 3, 5, 6pin : +3.5V_ST Short Check
ok
ok
ok
Check M ulti Voltage No
P401 9, 10pin : 24V Replace Power Board
/ 13, 14, 15pin:12V
ok
Check IC402/3/4 Output Voltage
IC402 : 2.5V No
IC403 : 1.5V Replace IC402, IC403, IC404, Q403
IC404 : 1.15V
Q403 : 3.3V
ok
Check LVDS Power Voltage No
Q409 : 12V Replace Q409
ok
No
Check M star LVDS Output Replace M star(IC101) or M ain Board
ok
ok
Change M odule
Copyright © LG Electronics. Inc. All rights reserved. - 16 - LGE Internal Use Only
Only for training and service purposes
2. Digital/Analog TV Video
ok
No
Check Tuner 3.3V Power
Replace L3703
L3703
ok
ok
ok
No
Check Mstar LVDS Output Replace M star(IC101) or M ain Board.
3. AV Video
Check input signal format.
Is it supported?
ok
ok
ok
No
Check CVBS_DET Signal Replace R1713
ok
No
Check Mstar LVDS Output Replace M star(IC101) or M ain Board.
Copyright © LG Electronics. Inc. All rights reserved. - 17 - LGE Internal Use Only
Only for training and service purposes
4. Component Video
Check input signal format.
Is it supported?
ok
ok
Check JK1701 No
Replace Jack
Y/PB/PR signal Line
ok
No
Check COMP_DET Signal Replace R1712 or R1713
ok
No
Check Mstar LVDS Output Replace M star(IC101) or M ain Board.
5. HDMI Video
Check input signal format.
Is it supported?
ok
ok
Check EDID No
R810, R811, R815, R816 I2C Signal Replace the defective IC or re-download EDID data
ok
No
Check JK800, JK801 Replace Jack
ok
No
Check HDMI_DET (HPD) Replace R808, R809, Q800, R803, R814
ok
ok
No
Check Mstar LVDS Output Replace M star(IC101) or M ain Board.
Copyright © LG Electronics. Inc. All rights reserved. - 18 - LGE Internal Use Only
Only for training and service purposes
6. MHL Video
Check input signal format.
Is it supported?
ok
ok
No
Check MHL Signal (R214, R215) Replace the defective IC or re-download EDID data
ok
No
Check JK801 Replace Jack
ok
No
Check CD_Sense, Cbus, Vbus Replace R817, C800
ok
ok
No
Check Mstar LVDS Output Replace M star(IC101) or M ain Board.
Copyright © LG Electronics. Inc. All rights reserved. - 19 - LGE Internal Use Only
Only for training and service purposes
7. All Source Audio
Check the TV Speaker M enu Off
Toggle the Menu
(M enu -> Audio -> TV Speaker)
On
ok
No
Check Mstar AUDIO_MASTER_CLK Replace M star(IC101) or M ain Board.
R148
ok
ok
ok
ok
No Replace connector
Check Connector & P5600
if found to be damaged.
ok
Copyright © LG Electronics. Inc. All rights reserved. - 20 - LGE Internal Use Only
Only for training and service purposes
8. Digital/Analog TV Audio
ok
No
Check Tuner 3.3V Power
Replace L3703
L3703
ok
ok
ok
Follow procedure
‘7. All source audio’
trouble shooting guide.
9. AV Audio
Check AV Cable for damage
for damage or open conductor
ok
ok
Follow procedure
‘7. All source audio’
trouble shooting guide.
ok
ok
Follow procedure
‘7. All source audio’
trouble shooting guide.
Copyright © LG Electronics. Inc. All rights reserved. - 21 - LGE Internal Use Only
Only for training and service purposes
Copyright ©
X-tal
24MHz
D_IF
FPC(51P/FHD)
Half NIM A_IF
(SI2158B_ATSC_1INPUT)
FPC(30P/HD)
Rear
TMDS
DDR3 Add.
Y/Pb/Pr, L/R DDR3 Data DDR3 128MB(1Gb)
Component CLK 667MHz
CVBS, L/R Hynic
- 22 -
AV (CLK 800MHz) H5TQ1G63DFR
M1
Internal KEY1
Micom KEY2
CONTROL
(PM) LED_R IR & LED
IR
RS232C
MAX3232 RS-232C
I2S
AMP DP/DM
SPK L/R USB2.0
STA380BWE L/R
TMDS HDMI
MHL
Side
900
400
521
502
121
410
540
501
500
530
LV1
120
A10
A2
Copyright © LG Electronics. Inc. All rights reserved. - 23 - LGE Internal Use Only
Only for training and service purposes
L13 POWER BLOCK (POWER DETECT 2)
D
OPT OPT OPT
R444 R446 R450 R459
C443 8.2K 2.7K 0
+3.5V_ST R439 10uF PANEL_VCC 1% 4.7K
MMBT3906(NXP) C438
33K 16V G 1% 5% IC405
0.1uF
Q402 APX803D29
+3.3V_Normal 25V
R457
+3.5V_ST OPT VCC RESET 100
3 2 POWER_DET
1 3 +3.5V_ST R440
R419 12K C420 C422 1
R416 2 OPT 1K 1uF R447 C433
10K 10V 0.1uF 1.2K GND 0.1uF
R411 R415 1005 16V POWER_DET_RESET
33K 100 R426 C 1%
R461 R406 R430 OPT
OPT 4.7K 10K 10K R405 R407
10K PANEL_CTL B Q407 5.6K 5.6K
MMBT3904(NXP)
C 051:AL22 OPT
R421 +3.5V_POWER_DET R456
10K INV_CTL E +24V
R401 C B 100K
R489
RL_ON 10K 10K
B Q401
MMBT3904(NXP) E Q405 OPT OPT OPT
R414 MMBT3904(NXP) R448 R451 IC406
R462 0 APX803D29 OPT
10K E 0 27K
5% R458
1% VCC RESET 100
3 2
R404
0 C419 1
OPT OPT
1uF C424 R449 GND
10V
OPT P401 1005 0.1uF 5.1K
+3.5V_POWER_DET
D403 SMAW200-H18S5 OPT 16V 1%
L401
CB2012PK501T 5V
+3.5V_ST
PWR ON 1 2 DRV ON
C401 C402 L404
10uF 1uF D401 CB2012PK501T 3.5V PDIM#1
10V 10V 3 4 PWM_DIM
2012 1005 5V 3.5V 3.5V
L407
MLB-201209-0120P-N2
GND
24V
5
7
6
8 PDIM#2
24V
R408 100
PWM1
+1.5V_DDR
+24V 9 10
GND 11 12 GND
C404 C406 R428 +1.5V_DDR
12V 12V +3.3V_Normal
4.7uF 0.1uF 13 14 3.9K
50V 50V 12V 15 16 N.C
3216 GND 17 18 GND
L402
MLB-201209-0120P-N2 IC403 L408
+12V L406
AZ1117EH-ADJTRG1 CB2012PK501T
C405
4.7uF
C407
0.1uF
19 BLM18PG121SN1D
+3.3V_Normal
.
D
200 R2 10uF
1/16W 10V
1%
G
C423 0.1uF 22uF 5V
R434 R438 2.2uF 16V 10V
10K 22K SD05
10V
Vout=1.25*(1+R2/R1)+Iadj*R2
R445
2.2K
C
R443
POWER_ON/OFF_1 10K B Q400
MMBT3904(NXP)
+5V_Normal & +5V_USB with OCP E
+12V +2.5V_Normal
IC402 +2.5V_Normal
+3.3V_Normal
C410 C411 TJ1118S-2.5
10uF 10uF
16V
IN 3 2 OUT
[EP]GND
PGND_2
PGND_1
1
S7LR core 1.15V volt
PGOOD
VIN_2
VIN_1
R412
OPT 100K GND
V7V
C408 D402
100pF +5V_Normal C403 C440 SD05
50V C413 L405 10uF 0.1uF 5V
10V
24
23
22
21
20
19
USB1_CTL
EN_SW1
6
4A 13
SW_IN_1
R427
3.3K
1%
L409
CB2012PK501T
TPS5432DDAR [EP]GND
10
11
12
C414 C432
7
FAULT1
SW_OUT2
RLIM
AGND
SW_OUT1
THERMAL
16V 10V 10V 16V R454
R410 R413 0 VIN EN
+1.10V_VDDC
9
10K 10K 2 7
L410 C431
R420 5V_HDMI_4 AVDD5V_MHL 0.1uF
15K 3.6uH PH COMP
16V 3 6
USB1_OCD
10V 270pF 1%
+3.3V_Normal R453 R2
30K
1%
Vout=0.8*(1+R1/R2)
+3.3V_Normal
R432 R433 IC5601
2.7K 10K 74LVC1G08GW
OPT OPT
R464
10K B VCC
E
MHL_5V_EN 1 5
MHL_CD_SENSE MHL_CD_SENSE
OPT Q408
C OPT A
R429
B
10K R436 2
B MHL_OCP_EN
/VBUS_EN 20K
OPT
(Active Low) GND Y
Q404 E R435 3 4 MHL_5V_EN
OPT 10K
OPT
C
R431
10K B
MHL_OCP_EN
OPT
(Active High) Q406
E
OPT
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
USB (SIDE)
+5V_USB
C700 C703
OPT 22uF 22uF
ZD700
5V 10V 10V
JK700
3AU04S-305-ZC-(LG)
1
USB DOWN STREAM
SIDE_USB1_DM
3
SIDE_USB1_DP
4
C701 C702
D700 5pF 5pF
5
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
HDMI (REAR 1 / SIDE 1 MHL)
HDMI_1 HDMI_2 MHL
5V_HDMI_2 5V_DET_HDMI_2 5V_HDMI_4 5V_DET_HDMI_4
R808
10K R814
HPD4
100
SHIELD ESD_HDMI2
R803 GND VA808
C
20 R809 VA805
1K R815 100
Q800 B 10K 20 ESD_HDMI2 DDC_SDA_4
MMBT3904(NXP) HPD2
19 HP_DET R816 100
19 DDC_SCL_4
R802 E R810 100
VA802 DDC_SDA_2 5V R812
18 1.8K 18
ESD_HDMI1 VA809 VA810
R805
3.3K
EAG63530101
IP4294CZ10-TBR CK- D805
12 12 IP4294CZ10-TBR
1 10 CK-_HDMI2
11 CK_GND 1 10
11 CK-_HDMI4
CK+ 2 9
10 CK+_HDMI2
10
CK+ 2 9
CK+_HDMI4
D0- 3 8
9
9
D0- 3 8
D0_GND 4 7
8 D0-_HDMI2
8
D0_GND 4 7
D0-_HDMI4
D0+ 5 6
7 D0+_HDMI2
7
D0+ 5 6
D1- D0+_HDMI4
6 D1-
ESD_HDMI1_NXP 6
D1_GND ESD_HDMI2_NXP
5 D804 D1_GND
5 D806
D1+ IP4294CZ10-TBR
4 D1+ IP4294CZ10-TBR
1 10 D1-_HDMI2 4
3
D2-
D2-
1 10
2 9 D1+_HDMI2 3 D1-_HDMI4
2
D2_GND
D2_GND
2 9
3 8 2 D1+_HDMI4
1
D2+
D2+
3 8
4 7 D2-_HDMI2 1
4 7
VA801 5 6 D2+_HDMI2
D2-_HDMI4
ESD_HDMI1 5 6
JK800 D2+_HDMI4
ESD_HDMI2
ESD_HDMI1_NXP JK801 VA806
SIDE_HDMI_EMI
ESD_HDMI2_NXP
MHL_CD_SENSE
RCLAMP0524PA RCLAMP0524PA
D803-*1 D804-*1 C800
1 10 1 10 VA807 R817
0.047uF
2 9 2 9 5.6V 25V 300K
RCLAMP0524PA RCLAMP0524PA
3 8 3 8 OPT
D805-*1 D806-*1 MHL Spec
4 7 4 7 1 10 1 10
5 6 5 6 2 9 2 9
3 8 3 8
ESD_HDMI1_SEMTECH ESD_HDMI1_SEMTECH 4 7 4 7
5 6 5 6
ESD_HDMI2_SEMTECH ESD_HDMI2_SEMTECH
BODY_SHIELD
20
CEC 19
HOT_PLUG_DETECT
18
VDD[+5V]
17
DDC/CEC_GND
R804
100 16
SDA
HDMI_CEC CEC_REMOTE_S7
15
SCL
14
RESERVED
13
CEC
12
TMDS_CLK-
5V_HDMI_4 +5V_Normal 11
5V_HDMI_2 +5V_Normal +3.5V_ST TMDS_CLK_SHIELD
10
TMDS_CLK+
A1
A2
A1
A2
9
A1
A2
TMDS_DATA0-
MMBD6100 MMBD6100 8
MMBD6100 D801 D802 TMDS_DATA0_SHIELD
D800 7
C
TMDS_DATA0+
C
6
TMDS_DATA1-
5
TMDS_DATA1_SHIELD
4
TMDS_DATA1+
R800 R801 R806 R807 3
TMDS_DATA2-
2.7K 2.7K 2
2.7K 2.7K TMDS_DATA2_SHIELD
1
DDC_SDA_4 TMDS_DATA2+
DDC_SDA_2
51U019S-312HFN-E-R-B-LG
DDC_SCL_4
DDC_SCL_2 JK801-*1
SIDE_HDMI_NON_EMI
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
SPDIF
SPDIF
JK1001
JST1223-001
GND
Fiber Optic
VCC
2
VINPUT
3
SPDIF_OUT
4
C1001 C1002
FIX_POLE
1uF 68pF
10V 50V
OPT SPDIF-68pF
C1002-*1
47pF
50V
SPDIF-47pF
C1002-*2
18pF
50V
SPDIF-18pF
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
LVDS (NON EU)
12 RXA4+ 12 RXA2-
13 RXB4+ RXB0+ RXB0- 13
RXA4- RXA2+
14 RXB4- RXB0- RXB0+ 14
RXA3+
15 RXB3+ RXB1+ RXB1- 15
RXA3- RXACK-
16 RXB3- RXB1- RXB1+ 16
RXACK+ RXACK+
17 RXBCK+ RXB2+ RXB2- 17
RXACK-
LVDS_SEL
18 RXBCK- RXB2- RXB2+ 18 RXA3-
19 RXB2+ RXBCK+ RXBCK- 19 +3.3V_Normal
RXA2+ RXA3+
20 RXB2- RXBCK- RXBCK+ 20
RXA2-
OPT
21 RXB1+ RXB3+ RXB3- 21 R1103
3.3K
22 RXB1- RXB3- RXB3+ 22
RXA1+
PANEL_VCC
23 RXB0+ RXB4+ RXB4- 23 OPT
RXA1- R1104
RXB0- RXB4- RXB4+ 10K
24 RXA0+ 24 HD
L1101
25 RXA0- 25 120OHM
FHD UBW2012-121F
26 R1111 0 26
27 27
28 RXB4+ 28 HD
29 29 C1101
RXB4- 0.1uF
30 RXB3+ FOR FHD REVERSE(8bit) 30 16V
31 RXB3- 31
32 RXBCK+
Change in S7LR
33 RXBCK-
MIRROR Pol-change Shift
34
RXA4+ RXA4+ RXA4- RXA0-
35 RXB2+
RXA4- RXA4- RXA4+ RXA0+
36 RXB2-
RXA3+ RXA0+ RXA0- RXA1-
37
RXA3- RXA0- RXA0+ RXA1+
38 RXB1+
RXACK+ RXA1+ RXA1- RXA2-
39 RXB1-
RXACK- RXA1- RXA1+ RXA2+
40 RXB0+
RXA2+ RXA2+ RXA2- RXACK-
41 RXB0- FHD
RXA2- RXA2- RXA2+ RXACK+
42 R1112 0
RXA1+ RXACK+ RXACK- RXA3-
43 R1113 0
PANEL_VCC
RXA1- RXACK- RXACK+ RXA3+
44 FHD
FHD RXA0+ RXA3+ RXA3- RXA4-
45
L1100
120OHM RXA0- RXA3- RXA3+ RXA4+
46
UBW2012-121F
47
RXB1+ RXBCK+ RXBCK- RXB3- V-COM I2C : For FHD 60Hz M+S module - 42LN54(M+S)
OPT OPT
R1114 R1115
2K 2K
OPT R1109
0
VCOM_SCL V-COM_SCL
OPT R1108
0
VCOM_SDA V-COM_SDA
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
ATSC tuner block
TU3700
TDSS-H501F(B) Close to the tuner
+3.3V_TU
C3701
0.1uF
16V
+3.3V_TU
R3733
100K
R3732
100
NC_1 TUNER_RESET
1
C3710
RESET 0.1uF
16V R3740 R3741
2 1.8K 1.8K +3.3V_Normal
+3.3V_TU
SCL
3 R3735 33
TU_SCL
SDA R3736 33 L3703
4 TU_SDA UBW2012-121F
OPT OPT
+B1[3.3V] C3711
18pF
C3713
18pF
C3742
20pF
C3743
20pF
5 50V 50V 50V 50V C3723 C3725 C3715 C3727
22uF 0.1uF 22uF 0.1uF
NC_2 6.3V 16V 6.3V 16V
6
+B2[1.8]
7
NC_3
8
IF_AGC
9
DIF[P] R3761 0
10 IF_P_MSTAR
DIF[N] R3760 0
11 IF_N_MSTAR
SHIELD
3 IN ADJ/GND 1
C3737 C3738
100pF 0.1uF OUT
50V 16V C3717
0.1uF 2
16V
R3704 100
IF_AGC_MAIN R3766
1
should be guarded by ground
C3716
0.1uF
16V
C3740
0.1uF
16V C3741
10uF
10V
85C
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
COMPONENT & AV(COMMON)
JK1701
PPJ245N2-01
6E [RD2]E-LUG R1714
10K
COMP2_R_IN
R1715
10K
COMP2_L_IN
4E [RD2]CONTACT
D1705 C1705 R1721
R1704 1000pF
470K 50V 12K
OPT
+3.3V_Normal
5D [WH]O-SPRING R1709
10K
COMP2_DET
4C [RD1]CONTACT D1706
R1712
1K
5.6V
OPT
5C [RD1]O-SPRING
COMP2_Pr+
D1703
R1705
7C [RD1]E-LUG-S D1707 75
5B [BL]O-SPRING
COMP2_Pb+
D1708
R1706
4A [GN/YL]CONTACT D1710 75
+3.3V_Normal
R1710
5A [GN/YL]O-SPRING 10K
AV_CVBS_DET
R1713
1K
D1709
5.6V
6A [GN/YL]E-LUG OPT
COMP2_Y+/AV_CVBS_IN
D1711
R1707 R1708
D1712 75 75
OPT
+3.3V_Normal
OPT
IC1700 OPT
MM1756DURE C1706
0.1uF
VCC IN
6 1 DTV/MNT_VOUT
C1707
PS GND 0.1uF
5 2 OPT
OPT
R1723
75 OUT BIAS
4 3
C1708
4.7uF
OPT
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
AUDIO AMP(TI)
R5610
L5600
470
UBW2012-121F
C5611 4700pF
AMP_COIL_ABCO
Close to Speaker
0.047uF
C5612
LPH6045T-100M
L5605
C5601 10uH
0.1uF
C5613 2200pF
SPK_L+
50V
C5616
0.033uF
50V
+24V_AMP R5611
C5609 4700pF 18
50V
C5608 R5609 C5626 OPT
330pF C5632 C5636
0.047uF 470 C5640 50V 0.1uF 2200pF
C5618 C5620
PVDD_AB_2
PVDD_AB_1
0.1uF 10uF 4.7uF 50V 50V
PLL_FLTP
PLL_FLTM
+3.3V_Normal 50V 35V 50V
SSTIMER
VR_ANA
OPT C5630
BST_A
OUT_A
0.47uF
AVSS
PBTL
NC_2
NC_1
OPT
C5627
50V C5637 SPEAKER_L
C5633 2200pF
330pF 50V
0.1uF
[EP] 50V
12
11
10
9
8
7
6
5
4
3
2
1
50V
AVDD 13 48 PGND_AB_2 R5612
+3.5V_ST 18
C5604 R5608 2K A_SEL_FAULT PGND_AB_1
THERMAL
14 47
0.1uF MCLK OUT_B
46
49
16V 15 SPK_L-
18K OSC_RES NC_6 L5606
16 45 50V
TAS5733
IC5600
R5607 1% DVSSO 44 NC_5 0.033uF LPH6045T-100M
R5601 17 10uH
10K VR_DIG BST_B C5624
AUD_MASTER_CLK 18 43 AMP_COIL_ABCO
R5603 PDN BST_C
19 42 AMP_COIL_ABCO
C 100 LRCLK 20 41 NC_4 LPH6045T-100M
C5602 50V L5604
R5600 1000pF SCLK 21 40 NC_3 0.033uF
B C5607 10uH
AMP_MUTE Q5600 50V SDIN OUT_C
0.1uF 22 39 C5625
10K MMBT3904(NXP) SPK_R+
SDA 23 38 PGND_CD_2
E
SCL 24 37 PGND_CD_1 OPT SPEAKER_R
R5613 C5634 C5638
C5631
25
26
27
28
29
30
31
32
33
34
35
36
AUD_LRCK 18 0.1uF 2200pF
OPT 0.47uF 50V
AUD_SCK 50V 50V
R3405
RESET
STEST
DVDD
DVSS
GND
AGND
VREG
GVDD_OUT
BST_D
PVDD_CD_1
PVDD_CD_2
OUT_D
0 AUD_LRCH C5628
OPT
POWER_DET AMP_SDA 330pF C5639
+24V_AMP 50V 2200pF
AMP_SCL C5635
0.1uF 50V
C5629 50V
C5614
C56151uF 25V
0.1uF 330pF
AMP_RESET C5641 50V
C5619 C5621
0.1uF 10uF 4.7uF
+3.3V_Normal 50V 35V 50V
OPT R5614
18
C5606 SPK_R-
0.1uF C5617 0.033uF
L5603
ZD5600
C5610 AMP_COIL_ABCO
OPT
0.1uF
16V
WAFER-ANGLE
SPK_L+
4
SPK_L-
3
SPK_R+
2
SPK_R-
1
P5600
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
MSTART DEBUG_4PIN
P3900
JP_GND1
JP_GND2
JP_GND3
JP_GND4
12507WS-04L
3 RGB_DDC_SCL
4 RGB_DDC_SDA
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
IR/LED and Control
+3.5V_ST
R602 R603
10K 10K
1% 1%
R600
100
KEY1
OPT OPT
C608
P600
0.1uF P601
R601 16V 12507WR-08L
100 12507WR-10L
KEY2
OPT
C609 1
0.1uF 1
16V
2
2
+3.5V_ST
3
3
L600
PZ1608U121-2R0TF
4
4
R610
1.8K
C602 C603 LED_R/BUZZ 5
+3.5V_ST 0.1uF 1000pF 5
16V 50V
D601
6
R607 6
3.3K
IR 7
7
C604 D602
100pF
50V OPT 8
8
9
9
10
+3.3V_Normal 11
R608 R609
1K 1K
Digital Eye Digital Eye
R604 100
SENSOR_SCL
Digital Eye
R605 100
SENSOR_SDA
Digital Eye
C606 C605
18pF 18pF
50V 50V
OPT OPT
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
IC101
MSD804KKX
<CHIP Config(LED_R/BUZZ)>
Boot from SPI CS1N(EXT_FLASH) 1’b0
W21
PCMDATA[0]/GPIO129
SYM.D
AA18
Boot from SPI_CS0N(INT_FLASH) 1’b1 AB22
PCMDATA[1]/GPIO130
PCMDATA[2]/GPIO131
AE20
PCMDATA[3]/GPIO123
AA15
<CHIP Config> PCMDATA[4]/GPIO122
AE21
(I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0) AB21
PCMDATA[5]/GPIO121
AE18
B51_no_EJ : 4’b0000 Boot from 8051 with SPI flash PCMDATA[6]/GPIO120 NF_CE1Z/GPIO141
Y15 AC17
SB51_WOS : 4’b0001 Secure B51 without scramble PCMDATA[7]/GPIO119 NF_WPZ/GPIO196
SB51_WS : 4’b0010 Secure B51 with scramble AD18
NF_CEZ/GPIO140
MIPS_SPE_NO_EJ : 4’b0100 Boot from MIPS with SPI flash W20 AC18
MIPS_SPI_EJ_1 : 4’b0101 Boot from MIPS with SPI flash PCMADR[0]/GPIO128 NF_CLE/GPIO139
V20 AC19
MIPS_SPI_EJ_2 : 4’b0110 Boot from MIPS with SPI flash PCMADR[1]/GPIO127 NF_REZ/GPIO142
MIPS_WOS : 4’b1001 Secure MIPS without scramble W22 AD17
PCMADR[2]/GPIO125 NF_WEZ/GPIO143
MIPS_WS : 4’b1010 Scerur MIPS with SCRAMBLE AB18 AE17
PCMADR[3]/GPIO124 NF_ALE/GPIO144
+3.3V_Normal AA20 AD19
PCMADR[4]/GPIO102 NF_RBZ/GPIO145
AA21
PCMADR[5]/GPIO104
Y19
PCMADR[6]/GPIO105
AB17
1K
1K
1K
1K
1K
PCMADR[7]/GPIO106
Y16
PCMADR[8]/GPIO111
AB19 H5
OPT
OPT
OPT
OPT
OPT
R117
R165
R123
R152
AA16 K5
PCMADR[11]/GPIO115 GPIO_PM[2]/GPIO8 INV_CTL
AA19 J6
LED_R/BUZZ PCMADR[12]/GPIO107 GPIO_PM[3]/GPIO9 RL_ON
AC21 K4
PCMADR[13]/GPIO110 GPIO_PM[4]/GPIO10 POWER_ON/OFF_1
AUD_SCK AA17 L6
PCMADR[14]/GPIO109 PM_UART_RX/GPIO_PM[5]/GPIO11 PM_RXD
AUD_MASTER_CLK R148 C2 R146 33
AUD_MASTER_CLK_0 PM_SPI_SCZ1/GPIO_PM[6]/GPIO12 /SPI_CS
Y20 L5
56 PCMREG_N/GPIO126 GPIO_PM[7]/GPIO13 /FLASH_WP
OPT M6
PWM1 GPIO_PM[8]/GPIO14
C112 AB15 M5 +3.5V_ST
100pF PWM0 PCMOE_N/GPIO116 GPIO_PM[9]/GPIO15 PANEL_CTL
50V AA22 C1
1K
1K
1K
1K
1K
R118
R121
R124
R153
AD21 D3
PCMCE_N/GPIO118 PM_SPI_CZ0/GPIO_PM[12]/GPIO0
AC20 B2
PCMIRQA_N/GPIO108 PM_SPI_SDI/GPIO2 SPI_SDI
Y18 B1 R151 33
PCMCD_N/GPIO133 PM_SPI_SDO/GPIO3 SPI_SDO
Y21
PCMWAIT_N/GPIO103
Y22
PCM_RESET/GPIO132
Y14
TS0CLK/GPIO90
U21 AA10
USB1_OCD PCM2_CE_N/GPIO134 TS0VALID/GPIO88
V21 Y12
USB1_CTL PCM2_IRQA_N/GPIO135 TS0SYNC/GPIO89
R20
PCM2_CD_N/GPIO138
T20 Y13
PCM2_WAIT_N/GPIO136 TS0DATA_[0]/GPIO80
U22 Y11
PCM2_RESET/GPIO137 TS0DATA_[1]/GPIO81
DIMMING I2C TS0DATA_[2]/GPIO82
AA12
+3.3V_Normal D4 AB12
/MHL_OCP_DET UART1_TX/GPIO46 TS0DATA_[3]/GPIO83
E4 AA14
MHL_OCP_EN UART1_RX/GPIO47 TS0DATA_[4]/GPIO84
N25 AB14
OPT PM_TXD UART2_TX/GPIO68 TS0DATA_[5]/GPIO85
N24 AA13
R156 10K PM_RXD UART2_RX/GPIO67 TS0DATA_[6]/GPIO86
PWM0 B8 AB11
MODEL_OPT_6 UART3_TX/GPIO50 TS0DATA_[7]/GPIO87
R140 R141 R144 R145 A8
1K 1K 2.2K 2.2K MODEL_OPT_7 UART3_RX/GPIO51
R157 100 AC15
PWM_DIM PWM2 TS1CLK/GPIO101
R136 22 P23 AD15
OPT I2C_SCL I2C_SCKM2/DDCR_CK/GPIO75 TS1VALID/GPI99
R137 22 P24 AC16
C111 AMP_SDA I2C_SDA I2C_SDAM2/DDCR_DA/GPIO74 TS1SYNC/GPIO100
2.2uF AMP_SCL
D2 AD16
RGB_DDC_SDA DDCA_DA/UART0_TX TS1DATA_[0]/GPIO91
I2C_SDA D1 AE15
RGB_DDC_SCL DDCA_CK/UART0_RX TS1DATA_[1]/GPIO92
I2C_SCL AE14
TS1DATA_[2]/GPIO93
AC13
TS1DATA_[3]/GPIO94
P21 AC14
PWM0 PWM0/GPIO69 TS1DATA_[4]/GPIO95
N23 AD12
PWM1 PWM1/GPIO70 TS1DATA_[5]/GPIO96
P22 AD13
PWM2 PWM2/GPIO71 TS1DATA_[6]/GPIO97
R21 AD14
PWM3/GPIO72 TS1DATA_[7]/GPIO98
P20
PWM4/GPIO73
F6
LED_R/BUZZ PWM_PM/GPIO197
H6
KEY1 SAR0/GPIO34
G5
KEY2 SAR1/GPIO35
G4
SAR2/GPIO36
J5
SAR3/GPIO37
J4
SAR4/GPIO38
R23
EEPROM +3.3V_Normal
VSYNC_LIKE/GPIO146
R24
V-COM_SCL SPI1_CK/GPIO199
R25
V-COM_SDA SPI1_DI/GPIO200
T21
SENSOR_SCL SPI2_CK/GPIO201
NVRAM_ATMEL T22
C105 NVRAM_ROHM SENSOR_SDA SPI2_DI/GPIO202
IC104 0.1uF
AT24C512C-SSHD-T IC104-*1
BR24G512FJ-3
A0 VCC
1 8 A0 VCC
1 8
A1 WP
2 7 A1 WP
2 7 IC101
A0’h MSD804KKX
A2 SCL
3 6 R111 22 I2C_SCL A2 SCL
3 6
GND SDA
4 5 R112 22
I2C_SDA GND
4 5
SDA
C7
SYM.A AB25
C104 C106 AMP_RESET GPIO39 LVA0P RXA0+
8pF 8pF E6 AB23
GPIO40 LVA0N RXA0-
OPT OPT F5 AC25
EAN43349005 5V_DET_HDMI_2 GPIO41 LVA1P RXA1+
B6 AB24
5V_DET_HDMI_4 GPIO42 LVA1N RXA1-
E5 AD25
AV_CVBS_DET GPIO43 LVA2P RXA2+
D5 AC24
GPIO44 LVA2N RXA2-
B7 AE23
GPIO45 LVA3P RXA3+
E7 AC23
GPIO48 LVA3N RXA3-
F7 AC22
GPIO49 LVA4P RXA4+
AB5 AD23
TUNER_RESET GPIO52 LVA4N RXA4-
AB3
MODEL_OPT_0 GPIO53
A9 V23
GPIO54 LVB0P RXB0+
F4 U24
MODEL_OPT_1 GPIO55 LVB0N RXB0-
AB1 V25
I2C_SCKM0/GPIO56 LVB1P RXB1+
PM MODEL OPTION N6 V24
+3.5V_ST I2C_SDAM0/GPIO57 LVB1N RXB1-
AB2 W25
MODEL_OPT_2 GPIO76 LVB2P RXB2+
AC2 W23
GPIO77 LVB2N RXB2-
AA23
LVB3P RXB3+
Y24
LVB3N RXB3-
R174 R177 AA25
10K 10K LVB4P RXB4+
OPT OPT AA24
LVB4N RXB4-
PM_MODEL_OPT_0
AE24
LVACLKP RXACK+
PM_MODEL_OPT_1 AD24
LVACLKN RXACK-
Y23
LVBCLKP RXBCK+
W24
LVBCLKN RXBCK-
R175
10K R176 T25
10K GPIO194 MODEL_OPT_3
OPT OPT U23
GPIO191 MODEL_OPT_4
T24
GPIO192 MODEL_OPT_5
T23
GPIO193 MODEL_OPT_8
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
MODEL OPTION Memory OPTION
MODEL_OPT_4 MODEL_OPT_6
+2.5V_Normal +3.3V_Normal +2.5V_Normal +3.3V_Normal PIN NAME PIN NO. LOW HIGH +1.10V_VDDC
MODEL OPTION
Memory
PIN NO. U23 PIN NO. B8
Note VDDC 1.05V +1.10V_VDDC
MODEL_OPT_0 AB3 FHD HD VDDC : 2026mA
128M 0 0
1K
1K
1K
1K
1K
1K
1K
1K
1K
0.1uF
10V
10V
1uF
1uF
OPT
OPT
OPT
OPT
OPT
OPT
OPT
OPT
HD
MODEL_OPT_2 AB2 NON_DVB_T2 DVB_T2 128M+128M
0 1
C275
R291
R222
R221
R206
R208
R211
R226
C228
R290
R298
T25
10uF
10uF
MODEL_OPT_3 NON_M120 M120
C277
C280
C283
256M 1 0
MODEL_OPT_0
MODEL_OPT_4 U23 MIU0-128M MIU0-256M
MODEL_OPT_1 256M+128M 1 1 Ginga
MODEL_OPT_5 T24 NON_DVB_S DVB_S
MODEL_OPT_2
R204 OPT 100
MODEL_OPT_3 MODEL_OPT_6 B8 MIU1-NO_DDR MIU1-128M
R225 OPT 100
MODEL_OPT_4
R228 OPT 100 MODEL_OPT_5 MODEL_OPT_7 A8 NON_DUALSTREAM DUALSTREAM
R230 OPT 100 MODEL_OPT_6 IC101
R229
R213
OPT
OPT
100
100
MODEL_OPT_7
MODEL_OPT_8
* Dual Stream is only Korea 3D spec +1.10V_VDDC
MSD804KKX SYM.E
Close to MSTAR DTV_IF
1K
1K
1K
1K
1K
1K
1K
C287 GND_33
100pF C288 G9 G12
OPT
R224
R223
R207
H9 G13
R209
R212
R227
OPT
R297
0.1uF
0.1uF
0.1uF
VDDC_4 GND_37
0.1uF
C289
0.1uF
33pF L10 G18
85C
IC101 VDDC_5 GND_38
10V
10uF 10V
C204 85C
M12 G19
MSD804KKX M13
VDDC_6 GND_39
G24
VDDC_7 GND_40
C284
10uF
C209
C235
C245
N12 H11
C255
C259
VDDC_8 GND_41
P14 H12
J2
J3
RXACKP
SYM.C NC_8
AC4
AD3
P15
R10
VDDC_9
VDDC_10
GND_42
GND_43
H13
H14
RXACKN NC_9 VDDC_11 GND_44
K3 FB_CORE R14 H15
RXA0P VDDC_12 GND_45
J1 AC3 AVDD_AU33 R15 H16
RXA0N IP +3.3V_Normal VDDC_13 GND_46
K2 AE3 T10 H17
RXA1P IM VDDC_14 GND_47
K1 L208 H18
RXA1N L227 PZ1608U121-2R0TF GND_48
L2 AD4 PZ1608U121-2R0TF H19
RXA2P SIFP GND_49
L3 AC5 C241 P10 J9
RXA2N SIFM C240 C208 NC_2 GND_50
T5 0.1uF 0.1uF 10uF P19 J10
DDCDA_DA/GPIO27 FB_CORE FB_CORE GND_51
T4 C282 R16 J11
0.1uF R220
DDCDA_CK/GPIO26 10K AVDDL_MOD GND_52
V5 L11 J12
HOTPLUGA/GPIO22 NC_1 GND_53
R219 M14 J13
0 +1.10V_VDDC DVDD_DDR GND_54
AD2 J14
IF_AGC IF_AGC_MAIN GND_55
AE2 J15
RF_AGC C285 GND_56
0.047uF W9 J16
AVDD2P5 AVDD2P5_ADC_1 GND_57
25V W10 J18
TUNER_I2C AVDD2P5_ADC_2 GND_58
AE6 W11 J19
I2C_SCKM1/GPIO78 TU_SCL AVDD2P5_ADC_3 GND_59
AD6 W12 J25
I2C_SDAM1/GPIO79 TU_SDA AVDD2P5_ADC_4 GND_60
Close to MSTAR K9
GND_61
Y17 K13
C261 15pF AVDD25_LAN GND_62
AD1 K14
XIN
AC1 Normal 2.5V V18
GND_63
H10
R287
X201 AVDD2P5_MOD
XOUT AVDD_MOD_1 GND_64
1M
0.1uF
0.1uF
10uF 10V
C248
C207
C254
BIN1M GND_6 GND_111
0.1uF
1uF
T3 C22 T12
SOGIN1 C266 GND_7 GND_112
C278
D14 T13
GND_8 GND_113
D18 T14
GND_9 GND_114
COMP2 AA2 D19 T15
HSYNC2 GND_10 GND_115
R237 33 C218 0.047uF Y2 E17 T16
COMP2_Pr+ RIN2P L202 AVDD_DDR1:55mA GND_11 GND_116
R238 68 C219 0.047uF AA3
PZ1608U121-2R0TF E18 T17
RIN2M cDMS : X7R GND_12 GND_117
R239 33 C220 0.047uF W2 AD5 E19 U8
COMP2_Y+/AV_CVBS_IN GIN2P AUVRM C249 C253 GND_13 GND_118
R240 68 C221 0.047uF Y3 C256 C263 E22 U9
GIN2M 4.7uF 1uF 0.1uF GND_14 GND_119
R241 33 C222 0.047uF V1 AE5 125C 125C 10uF F8 U10
COMP2_Pb+ BIN2P AUVAG GND_15 GND_120
R242 68 C223 0.047uF W3 AC6 F17 U11
BIN2M AUVRP GND_16 GND_121
C224 1000pF W1 F18 U12
SOGIN2 GND_17 GND_122
AA6 SOC_RESET F19 U13
CVBS In/OUT
EARPHONE_OUTL
EARPHONE_OUTR
AB6 STby 3.5V +1.10V_VDDC
G8
GND_18
GND_19
GND_123
GND_124
U14
AA8 +3.5V_ST AVDD_NODIE H8 U15
CVBS0 POWER_DET_RESET GND_20 GND_125
Y4 +3.5V_ST SWITCH L206 N22 U16
CVBS1 SW200 PZ1608U121-2R0TF GND_21 GND_126
R246 33 C227 0.047uF W4 C6 JTP-1127WEM N21 U17
COMP2_Y+/AV_CVBS_IN CVBS2 RP/GPIO63 GND_22 GND_127
2
N4
IRIN/GPIO4 IR
T6 R210 0 C231 1uF
ARC0 HDMI_ARC
N5 OPT OPT
HWRESET SOC_RESET
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
RS-232C
OPT
R5309
0
R5302 M6 6
100
+3.5V_ST
M1 1
R5301 M3_DETECT 3
100
M4 4
M5_GND 5
C1+ VCC
1 16
C5302
0.1uF V+ GND
2 15
C5303
0.1uF C1- DOUT1
3 14
C2+ RIN1
4 13
C5304
0.1uF C2- ROUT1
5 12 PM_RXD
V- DIN1
6 11 PM_TXD
C5305
0.1uF DOUT2 DIN2
7 10
RIN2 ROUT2
8 9
EAN41348201
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
+1.5V_DDR +1.5V_DDR
+1.5V_DDR
R1201
R1204
1K 1%
1K 1%
10uF10V
C1217
C1218
C1219
C1238
C1241
0.1uF
0.1uF
C1206
C1239
C1251
A-MVREFDQ A-MVREFCA
1uF
1uF
1uF
1uF
1uF
0.1uF
0.1uF
1000pF
1000pF
1%
1%
R1202
R1205
C1202
C1204
C1201
C1203
1K
1K
CLose to DDR3 CLose to Saturn7M IC
DDR_SAMSUNG DDR_HYNIX
IC1201-*1 IC1201 IC101
K4B1G1646G-BCK0 H5TQ1G63EFR-PBC MSD804KKX
EAN61829003
N3 M8 M8 N3 A11 B23
P7
A0
A1
VREFCA A-MVREFCA VREFCA A0
A1
P7
A-MA0
A-MA1
A-MA0
A-MA1
C14
A_DDR3_A[0]
A_DDR3_A[1]
SYMBOL.B B_DDR3_A[0]
B_DDR3_A[1]
D25
P3 P3 B11 F22
A2 A2 A-MA2 A-MA2 A_DDR3_A[2] B_DDR3_A[2]
N2 H1 H1 N2 F12 G22
A3 VREFDQ A-MVREFDQ VREFDQ A3 A-MA3 A-MA3 A_DDR3_A[3] B_DDR3_A[3]
P8 P8 C15 E24
A4 A4 A-MA4 A-MA4 A_DDR3_A[4] B_DDR3_A[4]
P2 P2 E12 F21
A5 R1203 A5 A-MA5 A-MA5 A_DDR3_A[5] B_DDR3_A[5]
R8 L8 L8 R8 A14 E23
A6 ZQ ZQ A6 A-MA6 A-MA6 A_DDR3_A[6] B_DDR3_A[6]
R2 +1.5V_DDR 240 R2 D11 D22
A7 A7 A-MA7 A-MA7 A_DDR3_A[7] B_DDR3_A[7]
T8 1% T8 B14 D24
A8 A8 A-MA8 A-MA8 A_DDR3_A[8] B_DDR3_A[8]
R3 B2 B2 R3 D12 D21
A9 VDD_1 VDD_1 A9 A-MA9 A-MA9 A_DDR3_A[9] B_DDR3_A[9]
L7 D9 10V 10uF C1205 D9 L7 C16 C24
A10/AP VDD_2 VDD_2 A10/AP A-MA10 A-MA10 A_DDR3_A[10] B_DDR3_A[10]
R7 G7 10V 10uF C1227 G7 R7 C13 C25
A11 VDD_3 VDD_3 A11 A-MA11 A-MA11 A_DDR3_A[11] B_DDR3_A[11]
N7 K2 C1207 0.1uF K2 N7 A15 F23
A12/BC VDD_4 VDD_4 A12/BC A-MA12 A-MA12 A_DDR3_A[12] B_DDR3_A[12]
T3 K8 C1208 0.1uF K8 T3 E11 E21
A13 VDD_5 VDD_5 NC_7 A-MA13 A-MA13 A_DDR3_A[13] B_DDR3_A[13]
N1 C1210 0.1uF N1 B13 D23
VDD_6 VDD_6 A-MA14 A_DDR3_A[14] B_DDR3_A[14]
M7 N9 C1211 0.1uF N9 M7
NC_5 VDD_7 VDD_7 NC_5
R1 C1212 0.1uF R1
VDD_8 VDD_8
M2 R9 C1213 0.1uF R9 M2 F13 G20
BA0 VDD_9 VDD_9 BA0 A-MBA0 A-MCK A-MBA0 A_DDR3_BA[0] B_DDR3_BA[0]
R1235
N8 C1214 0.1uF N8 B15 F24
A-MBA1 A-MBA1
1%
BA1 BA1 A_DDR3_BA[1] B_DDR3_BA[1]
M3 M3 E13 F20
56
C1215 0.1uF A-MBA2 A-MBA2
BA2 BA2 A_DDR3_BA[2] B_DDR3_BA[2]
A1 A1 C1209
VDDQ_1 VDDQ_1
R1236
J7 A8 A8 J7 C17 G25
0.01uF A-MCK
1%
CK VDDQ_2 VDDQ_2 CK A_DDR3_MCLK B_DDR3_MCLK
K7 C1 C1 K7 50V A17 G23
56
CK VDDQ_3 VDDQ_3 CK A-MCKB A_DDR3_MCLKZ B_DDR3_MCLKZ
K9 C9 C9 K9 B16 F25
CKE VDDQ_4 VDDQ_4 CKE A-MCKE A-MCKE A_DDR3_MCLKE B_DDR3_MCLKE
D2 D2
VDDQ_5 VDDQ_5 A-MCKB
L2 E9 E9 L2
CS VDDQ_6 VDDQ_6 CS
K1 F1 F1 K1 E14 D20
ODT VDDQ_7 VDDQ_7 ODT A-MODT A-MODT A_DDR3_ODT B_DDR3_ODT
J3 H2 H2 J3 +1.5V_DDR B12 B25
RAS VDDQ_8 VDDQ_8 RAS A-MRASB A-MRASB A_DDR3_RASZ B_DDR3_RASZ
K3 H9 H9 K3 A12 B24
CAS VDDQ_9 VDDQ_9 CAS A-MCASB R1231 A-MCASB A_DDR3_CASZ B_DDR3_CASZ
L3 L3 C12 A24
WE WE A-MWEB 10K A-MWEB A_DDR3_WEZ B_DDR3_WEZ
J1 J1
NC_1 NC_1
T2 J9 J9 T2 F11 E20
RESET NC_2 NC_2 RESET A-MRESETB A-MRESETB A_DDR3_RESET B_DDR3_RESET
L1 L1
NC_3 NC_3
L9 L9
NC_4 NC_4
F3 T7 T7 F3 B19 K24
DQSL NC_6 A-MA14 NC_6 DQSL A-MDQSL A-MDQSL A_DDR3_DQSL B_DDR3_DQSL
G3 G3 C18 K25
DQSL DQSL A-MDQSLB A-MDQSLB A_DDR3_DQSLB B_DDR3_DQSLB
C7 A9 A9 C7 B18 J21
DQSU VSS_1 VSS_1 DQSU A-MDQSU A-MDQSU A_DDR3_DQSU B_DDR3_DQSU
B7 B3 B3 B7 A18 J20
DQSU VSS_2 VSS_2 DQSU A-MDQSUB A-MDQSUB A_DDR3_DQSUB B_DDR3_DQSUB
E1 E1
VSS_3 VSS_3
E7 G8 G8 E7 E15 H24
DML VSS_4 VSS_4 DML A-MDML A-MDML A_DDR3_DQML B_DDR3_DQML
D3 J2 J2 D3 A21 L20
DMU VSS_5 VSS_5 DMU A-MDMU A-MDMU A_DDR3_DQMU B_DDR3_DQMU
J8 J8
VSS_6 VSS_6
E3 M1 M1 E3 D17 L23
DQL0 VSS_7 VSS_7 DQL0 A-MDQL0 A-MDQL0 A_DDR3_DQL[0] B_DDR3_DQL[0]
F7 M9 M9 F7 G15 J24
DQL1 VSS_8 VSS_8 DQL1 A-MDQL1 A-MDQL1 A_DDR3_DQL[1] B_DDR3_DQL[1]
F2 P1 P1 F2 B21 L24
DQL2 VSS_9 VSS_9 DQL2 A-MDQL2 A-MDQL2 A_DDR3_DQL[2] B_DDR3_DQL[2]
F8 P9 P9 F8 F15 J23
DQL3 VSS_10 VSS_10 DQL3 A-MDQL3 A-MDQL3 A_DDR3_DQL[3] B_DDR3_DQL[3]
H3 T1 T1 H3 B22 M24
DQL4 VSS_11 VSS_11 DQL4 A-MDQL4 A-MDQL4 A_DDR3_DQL[4] B_DDR3_DQL[4]
H8 T9 T9 H8 F14 H23
DQL5 VSS_12 VSS_12 DQL5 A-MDQL5 A-MDQL5 A_DDR3_DQL[5] B_DDR3_DQL[5]
G2 G2 A22 M23
DQL6 DQL6 A-MDQL6 A-MDQL6 A_DDR3_DQL[6] B_DDR3_DQL[6]
H7 H7 D15 K23
DQL7 DQL7 A-MDQL7 A-MDQL7 A_DDR3_DQL[7] B_DDR3_DQL[7]
B1 B1
VSSQ_1 VSSQ_1
D7 B9 B9 D7 G16 G21
DQU0 VSSQ_2 VSSQ_2 DQU0 A-MDQU0 A-MDQU0 A_DDR3_DQU[0] B_DDR3_DQU[0]
C3 D1 D1 C3 B20 L22
DQU1 VSSQ_3 VSSQ_3 DQU1 A-MDQU1 A-MDQU1 A_DDR3_DQU[1] B_DDR3_DQU[1]
C8 D8 D8 C8 F16 H22
DQU2 VSSQ_4 VSSQ_4 DQU2 A-MDQU2 A-MDQU2 A_DDR3_DQU[2] B_DDR3_DQU[2]
C2 E2 E2 C2 C21 K20
DQU3 VSSQ_5 VSSQ_5 DQU3 A-MDQU3 A-MDQU3 A_DDR3_DQU[3] B_DDR3_DQU[3]
A7 E8 E8 A7 E16 H20
DQU4 VSSQ_6 VSSQ_6 DQU4 A-MDQU4 A-MDQU4 A_DDR3_DQU[4] B_DDR3_DQU[4]
A2 F9 F9 A2 A20 L21
DQU5 VSSQ_7 VSSQ_7 DQU5 A-MDQU5 A-MDQU5 A_DDR3_DQU[5] B_DDR3_DQU[5]
B8 G1 G1 B8 D16 H21
DQU6 VSSQ_8 VSSQ_8 DQU6 A-MDQU6 A-MDQU6 A_DDR3_DQU[6] B_DDR3_DQU[6]
A3 G9 G9 A3 C20 K21
DQU7 VSSQ_9 VSSQ_9 DQU7 A-MDQU7 A-MDQU7 A_DDR3_DQU[7] B_DDR3_DQU[7]
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
Serial Flash for SPI boot_NON_OS
+3.5V_ST
+3.5V_ST
R5505
0 WP SCLK WP[IO2] CLK
/FLASH_WP 3 6 SPI_SCK 3 6
R5504
GND SI/SIO0 33 GND DI[IO0]
4 5 SPI_SDI 4 5
R5508
10K
OPT
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes