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A ZVS-PWM Single-Phase Inverter Using a ZVS

Transformer-Isolated Step-Up/Down DC Link


Chien-Ming Wang and Guan-Yu Chen
Department of Electrical Engineering
National Ilan University
I-Lan, Taiwan

Abstract—A zero-voltage switching (ZVS) pulse-width- inverter. They generate zero voltage instants in dc-link at
modulation (PWM) single- phase inverter using a ZVS controllable instants, which can be synchronized with any
transformer-isolated step-up/down dc link is presented in this PWM transition command, thus ensuring ZVS condition. As a
paper. The proposed ZVS transformer-isolated step-up/down dc result, these inverters can be operated at high switching
link not only makes the switches in single-phase inverter can frequencies with high efficiency, and reduced size and device
operate at ZVS condition, but it has a step-up/down input voltage stresses. In QRDCL circuits, the input current of inverter is
function and it provides an isolation function. Moreover, the always assumed as a unidirectional constant current source. In
switches in itself also operate at ZVS. Except for the switch in the a three-phase inverter, this assumption is correct because the
ZVS-PWM auxiliary circuit of the proposed ZVS transformer-
input current of three phase inverter is unidirectional current
isolated step-up/down dc link, all power semiconductor devices in
proposed inverter operate at ZVS turn on and turn off. The
without respect to the load type. However, in a single-phase
switch in the ZVS-PWM auxiliary circuit of proposed ZVS inverter, its input current is bidirectional current. This
transformer-isolated step-up/down dc link operates at zero- assumption is incorrect and it will affect the operation of
current-switching (ZCS) turn-on and turn-off. Thus, the QRDCL circuits.
switching losses can be reduced. The proposed ZVS-PWM
inverter operates at constant frequency. The voltage stress and
current stress on the main semiconductors in the proposed ZVS-
PWM inverter are the same them in conventional hard switching
inverter. The analysis of operation principle and experimental
results of the proposed ZVS-PWM inverter, rated 2kW and
operated at 40 kHz, are provided in this paper to verify the
performance.

Keywords—pulse-width-modulation (PWM); inverter; ZVS

I. INTRODUCTION
Because the PWM voltage-source inverter is easy to Fig. 1 The proposed ZVS-PWM inverter using a ZVS transformer-isolated step
up/down DC link
implement and its harmonic is easy to be eliminated by power
filter, it has been widely used in industrial application such as A ZVS transformer-isolated step up/down DC link circuit
uninterruptible power supplies, static frequency changers and for PWM unipolar single-phase inverter is presented in this
variable speed drives. However, it must increase the switching paper to overcome this problem. This proposed ZVS
frequency to reduce the size and weight of components for transformer-isolated step up/down DC link circuit uses new
increasing power density. Nevertheless, it will increase the control strategy to get high frequency pulse dc-link in input of
more switching losses and electromagnetic interference (EMI). inverter. Thus, the proposed ZVS transformer-isolated step
Recently, a number of soft-switching technique for inverter up/down DC link circuit not only owns the step up/down
were presented. One of the techniques is that the resonant voltage characteristic and isolation function but provides the
circuit is used in the DC-link. It can reduces the input voltage ZVS on all semiconductors in the PWM unipolar single-phase
of the inverter to zero by resonant method at certain moments. inverter. Also, the switching cycle of the proposed ZVS
If the power switches of the inverter are controlled to switch at transformer-isolated step up/down DC link circuit and PWM
this moment, then ZVS can be achieved. There are several unipolar single-phase inverter is synchronous. The switching
available circuits for producing a resonant dc link (RDCL) and noise interference can be removed. Furthermore, in order to
they are presented in [1]-[10]. Some of these circuits operate at achieve the aim that all semiconductor devices in the proposed
fixed resonant frequency, i.e. the switching moments of the ZVS-PWM inverter operate at ZVS without additional voltage
switches of inverter are predetermined by the resonance period stress and current stress, a ZVS cell is used in the proposed
[1]-[2]. They are unsuitable for PWM techniques because they ZVS transformer-isolated step up/down DC link circuit to
have not a function which is continuous variation of the pulse provide the semiconductor devices in the proposed ZVS
width. For improve this drawback, lot of work has been done transformer-isolated step up/down DC link circuit operate at
on the quasi-resonant DC-link (QRDCL) power converters [3]- ZVS. Thus, the switching losses in the proposed ZVS-PWM
[10] for ZVS techniques to eliminate switching losses in PWM inverter can be reduced. For achieving good dynamic

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regulation and properly gating the power switches, the for predicting and evaluating the inverter performance are
sinusoidal pulse-width modulation (SPWM) control strategy is conducted.
designed in the proposed ZVS-PWM inverter. System analysis

(a) (b) (c)

(d) (e) (f)

(g) (h) (i)

(j) (k) (l)


Fig. 2 The topology stages of proposed ZVS-PWM inverter.

and a switch Sa. To simplify the analysis, it is assumed that the


II. PRINCIPLE OF PROPOSE ZVS-PWM INVETER proposed ZVS-PWM single-phase inverter is operated in the k-
The main power circuit of the proposed ZVS-PWM single- th switching period. iLm, iLf, and vCB are assumed as constant
phase inverter is shown in Fig. 1. The circuit includes three and equaled to ILm, ILfk and VCB during one switching cycle. The
sections. The first section is a conventional PWM buck inverter circuit operation about the proposed ZVS-PWM inverter in one
with unipolar voltage switching. This section composes of the switching includes twelve stages. The relative dynamic
switches S1, S2, S3, S4, and output filter Lf, Cf. It is a unipolar equivalent circuits and the ideal relevant waveforms about the
type voltage source inverter. It performs the DC to AC circuit operation are shown in Fig. 2 and Fig. 3, respectively.
conversion function and provides a stable AC output voltage. STAGE 1 [ Fig. 2(a) : t0 < t < t1]:
The second section is the proposed ZVS transformer-isolated
step up/down DC link, composes of Tm, SB, CB, and the body Before t=t0, SB and Sa are turn-off state, S1, S2, S3 and S4
diodes of the switches S1, S2, S3, S4. This section provides an are turn-on state. The energy stored in Lm is delivered to CB
isolation function between input and output. It also provides a and the inverter is operated in freewheeling state. This stage
step up/down voltage function in high frequency pulse dc-link begins when Sa turns on under ZCS. Lr is charged linearly by
for the input of the inverter in the first section and the zero- Vin+VCB. iLr(t) increases linearly. The stage ends when iLr(t)
voltage-switching function on all semiconductors of the reaches ILm+ILfk and body diodes of S1, S2, S3, and S4 turn off
inverter in the first section. The third section is a ZVS cell to with ZCS at t=t1.
provide the ZVS on the switch SB and the body diodes of the STAGE 2 [Fig. 2(b) : t1 < t < t2]:
switches S1, S2, S3, S4. It composes of the diodes Da1, Da2, a
resonant inductor Lr, a resonant capacitor Cr, a transformer Tr,

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During this stage, the ZVS cell starts resonance The stage ends when iLr(t) reaches ILm and body diodes of S1
behavior. iLr(t) increases and vCr(t) decreases. The energy and S2 turn off with ZCS at t=t7.
stored in CB gradually supplies to the inverter. The stage is
finished when vCr(t) drops to zero. STAGE 8 [ Fig. 2(h) : t7 < t < t8]:

STAGE 3 [ Fig. 2(c) : t2 < t < t3]: During this stage, the ZVS cell starts resonance behavior
again. iLr(t) increases and vCr(t) decreases. The inverter stage
In this stage, SB turns on at ZVS. The energy stored in Lr is operated at freewheeling state. The stage is finished when
is delivered back to CB via Tr. iLr(t) decreases linearly. Lm is vCr(t) drops to zero.
charged by DC input source. The DC input source voltage and
the energy stored in CB supplies to inverter stage. This stage STAGE 9 [ Fig. 2(i) : t8 < t < t9]:
ends when iLr(t) drops to zero and the body diode of SB, Da This stage begins when vCr(t) equals zero and SB turns on at
naturally close at ZCS. ZVS. The energy stored in Lr is delivered back to CB via Tr.
iLr(t) decreases linearly. Lm is charged by DC input source.
The inverter stage continuously operates at freewheeling state.
This stage ends when iLr(t) drops to zero and the body diode
of SB, Da naturally close at ZCS.
STAGE 10 [ Fig. 2(j) : t9 < t < t10]:
During this stage, Lm is continuously charged by DC input
source. The inverter stage still operates at freewheeling state.
STAGE 11 [ Fig. 2(k) : t10 < t < t11]:
This stage begins when SB turns off at ZVS. Cr is charged
linearly by ILm. vCr(t) increases linearly. This stage is finished
when vCr(t) equals Vin+VCB.
STAGE 12 [ Fig. 2(l) : t11 < t < t12]:
This stage begins when the body diode of S1, S2, S3, and S4
turn on at ZVS. The energy stored in Lm is delivered to CB.
The inverter stage continuously operates at freewheeling state.
This stage is finished when Sa is triggered again.
After stage 12, the circuit operation returns to stage 1. vCr(t)
equals Vin+VCB and equals zero. Thus, the previous
assumption is valid.

III. EXPERIMENTAL RESULTS


Fig. 3 Ideal relevant waveforms of proposed ZVS-PWM inverter. An example of a 2kW proposed ZVS-PWM single-
phase inverter is designed and realized. The implemented
STAGE 4 [ Fig. 2(d) : t3 < t < t4]: power stage circuit is shown in Fig. 1. The relative
During this stage, Lm is continuously charged by DC specification is described as follows.
input source. The DC input source and the energy stored in z Input voltage : Vin=200V
capacitor CB also continuously supplies to inverter stage.
z Output voltage : vo (t ) = 110 2 sin[2π (60)]t
STAGE 5 [ Fig. 2(e) : t4 < t < t5]: z Maximum output power: Po,max=2kW
This stage begins when SB turns off at ZVS. Cr is z Switching frequency: 40kHz
charged linearly by ILm. vCr(t) increases linearly. This stage is Lr and Cr are selected as Lr=1.3H and Cr=22nF. Lm and CB
finished when vCr(t) equals Vin+VCB. are also selected as Lm=1mH, CB=4.7Ňįġ Lf and Cf to
STAGE 6 [ Fig. 2(f) : t5 < t < t6]: minimize the undesired harmonics of the output ac voltage are
selected as Lf=1mH, Cf=4.7Ňį
During this stage, the body diode of S1, S2, S3, and S4 are
turned on at ZVS. The energy stored in Lm is delivered to CB. In hardware realization, MOSFET’s IRFP 460 and S30L60
The inverter stage starts a freewheeling state. This stage is are selected as the power switches and diodes in this design.
finished when Sa is triggered again. The commutation phenomenon in the switches SB, Sa, S1, and
STAGE 7 [ Fig. 2(g) : t6 < t < t7]: S3 are measured in Fig. 4 and Fig.5, respectively. The
experimental results shown in Figs. 4 and 5, demonstrate that
This stage begins when Sa turns on under ZCS again. Lr zero-voltage-switching is achieved at constant frequency for
is chargesdlinearly by Vin+VCB again. iLr(t) increases linearly. the switches (SB, Sa, S1, and S3). The measured waveforms of
output voltage and current are also shown in Fig. 6, in which

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the measured total harmonic distortions (THDs) of output the experimentally obtained efficiency from the presented
voltage for the mentioned loads are given as 1.63%. Moreover, ZVS-PWM single-phase inverter equals 94.5% for rated load.

(a) (b)
Fig. 4 Commutation in SB and Sa of the proposed ZVS-PWM transformer-isolated step up/down dc link VDSB, VDBa: 250V/div; IDSB, IDSa:20A/div, time:5s.

(a) (b)
Fig. 5 Commutation in S1 and S3 of the proposed inverter. VDS1, VDB1: 250V/div; IDS1, IDS1:10A/div, time:5s.

Fig. 6 The waveforms of output voltage vo(t) and current io(t) of the proposed inverter.

inverter combines the advantages of the SPWM and ZVS


IV. CONCLUSION techniques. High power efficiency over 94.5% is acquired
This paper has presented a ZVS-PWM single-phase under the rated power of 2000W for proposed ZVS-PWM
inverter with a simple and compact configuration. The circuit single-phase inverter. Some experiment results prove the truth
operation about it was analyzed. The proposed ZVS of the theoretical prediction.
transformer-isolated step up/down DC link not only owns the
step up/down voltage characteristic and isolation function but ACKNOWLEDGMENT
provides the ZVS on all semiconductors in the unipolar type
The preferred spelling of the word “acknowledgment” in
single-phase inverter. All semiconductor devices in the
America is without an “e” after the “g.” Avoid the stilted
proposed inverter operate at ZVS turn on and turn off. The
expression “one of us (R. B. G.) thanks ...”. Instead, try “R. B.
proposed inverter is regulated by the conventional SPWM
G. thanks...”. Put sponsor acknowledgments in the unnumbered
technique at constant frequency. Therefore, the proposed
footnote on the first page.

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