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PD- 91363E

IRLR024N
IRLU024N
HEXFET® Power MOSFET
l Logic-Level Gate Drive D
l Surface Mount (IRLR024N) VDSS = 55V
l Straight Lead (IRLU024N)
l Advanced Process Technology RDS(on) = 0.065Ω
l Fast Switching G
l Fully Avalanche Rated ID = 17A
S

Description
Fifth Generation HEXFET® Power MOSFETs from International Rectifier
utilize advanced processing techniques to achieve the lowest possible on-
resistance per silicon area. This benefit, combined with the fast switching
speed and ruggedized device design that HEXFET power MOSFETs are well
known for, provides the designer with an extremely efficient device for use in
a wide variety of applications.

The D-PAK is designed for surface mounting using vapor phase, infrared, or
wave soldering techniques. The straight lead version (IRFU series) is for D-Pak I-Pak
through-hole mounting applications. Power dissipation levels up to 1.5 watts IRLR024N IRLU024N
are possible in typical surface mount applications.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, V GS @ 10V 17
ID @ TC = 100°C Continuous Drain Current, V GS @ 10V 12 A
IDM Pulsed Drain Current  72
PD @TC = 25°C Power Dissipation 45 W
Linear Derating Factor 0.3 W/°C
VGS Gate-to-Source Voltage ± 16 V
EAS Single Pulse Avalanche Energy‚ 68 mJ
IAR Avalanche Current 11 A
EAR Repetitive Avalanche Energy 4.5 mJ
dv/dt Peak Diode Recovery dv/dt ƒ 5.0 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )

Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 3.3
RθJA Case-to-Ambient (PCB mount)** ––– 50 °C/W
RθJA Junction-to-Ambient ––– 110
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
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IRLR/U024N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 ––– ––– V V GS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.061 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.065 VGS = 10V, ID = 10A „
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.080 Ω VGS = 5.0V, ID = 10A „
––– ––– 0.110 VGS = 4.0V, ID = 9.0A „
VGS(th) Gate Threshold Voltage 1.0 ––– 2.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 8.3 ––– ––– S VDS = 25V, ID = 11A
––– ––– 25 VDS = 55V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 16V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
Qg Total Gate Charge ––– ––– 15 ID = 11A
Qgs Gate-to-Source Charge ––– ––– 3.7 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 8.5 VGS = 5.0V, See Fig. 6 and 13 „†
td(on) Turn-On Delay Time ––– 7.1 ––– VDD = 28V
tr Rise Time ––– 74 ––– ID = 11A
ns
td(off) Turn-Off Delay Time ––– 20 ––– RG = 12Ω, VGS = 5.0V
tf Fall Time ––– 29 ––– R D = 2.4Ω, See Fig. 10 „†
Between lead, D
LD Internal Drain Inductance ––– 4.5 ––– nH
6mm (0.25in.)
G
from package
LS Internal Source Inductance ––– 7.5 –––
and center of die contact S

Ciss Input Capacitance ––– 480 ––– VGS = 0V


Coss Output Capacitance ––– 130 ––– pF V DS = 25V
Crss Reverse Transfer Capacitance ––– 61 ––– ƒ = 1.0MHz, See Fig. 5†

Source-Drain Ratings and Characteristics


Parameter Min. Typ. Max. Units Conditions
D
IS Continuous Source Current MOSFET symbol
––– ––– 17
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

––– ––– 72
(Body Diode)  p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 11A, V GS = 0V „


trr Reverse Recovery Time ––– 60 90 ns TJ = 25°C, IF = 11A
Qrr Reverse RecoveryCharge ––– 130 200 nC di/dt = 100A/µs „
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Repetitive rating; pulse width limited by „ Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. (See fig. 11)
‚ VDD = 25V, starting TJ = 25°C, L = 790µH … This is applied for I-PAK, LS of D-PAK is measured between
RG = 25Ω, I AS = 11A. (See Figure 12) lead and center of die contact
ƒ ISD ≤ 11A, di/dt ≤ 290A/µs, VDD ≤ V(BR)DSS, † Uses IRLZ24N data and test conditions.
TJ ≤ 175°C

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IRLR/U024N

100 VGS
100 VGS
TOP 15V TOP 15V
12V 12V
10V 10V
8.0V 8.0V

ID , D rain-to-S ource C urrent (A )


ID , D ra in -to-S ou rce C u rrent (A )

6.0V 6.0V
4.0V 4.0V
3.0V 3.0V
BOTTOM 2.5V BOTTOM 2.5V
10 10

2 .5V
1 1

2.5 V
20µ s P U L S E W ID T H 2 0µ s P U LS E W ID T H
T J = 2 5°C T J = 1 75 °C
0.1 A 0.1 A
0.1 1 10 100 0.1 1 10 100
V D S , D rain-to-S ource V oltage (V ) V D S , D rain-to-S ource V oltage (V )

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

100 3.0
I D = 17
18 AA
R D S (on ) , D rain -to-S ou rc e O n R es is tan c e

TJ = 2 5 °C
I D , D rain-to-So urce C urren t (A )

2.5
TJ = 1 7 5 °C

10 2.0
(N orm a liz ed)

1.5

1 1.0

0.5

V DS = 1 5V
2 0µ s P U L S E W ID TH V G S = 1 0V
0.1 0.0 A
A
2 3 4 5 6 7 8 9 10 -60 -40 -20 0 20 40 60 80 100 120 140 160 180

V G S , G ate-to -So urce Voltag e (V) T J , J unc tion T em perature (°C )

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance


Vs. Temperature
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IRLR/U024N

800 15
V GS = 0V , f = 1M H z I D = 11 A
C is s = C g s + C g d , Cd s S H O R T E D V D S = 4 4V
C rs s = C gd

V G S , G ate-to-S ource V oltage (V )


V D S = 2 8V
C o ss = C d s + C gd 12
600
C iss
C , Capacitance (pF)

400
C oss
6

200
C rss 3

FO R TE S T C IRC UIT
S E E FIG U R E 1 3
0 A 0 A
1 10 100 0 4 8 12 16 20
V D S , D rain-to-S ourc e V oltage (V ) Q G , T otal G ate C harge (nC )

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.


Drain-to-Source Voltage Gate-to-Source Voltage

100 1000
O P E R AT ION IN TH IS AR E A LIM ITE D
B Y R D S (on)
I S D , R ev ers e D rain C urre nt (A )

I D , D rain C urrent (A )

100
T J = 1 75 °C
T J = 25°C 1 0µ s
10

10 1 00 µ s

T C = 25°C 1m s
T J = 175°C
VG S = 0V S ingle P ulse 1 0m s
1 A 1 A
0.4 0.8 1.2 1.6 2.0 1 10 100
V S D , S ource-to-D rain V oltage (V) VD S , Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area


Forward Voltage
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IRLR/U024N

20 RD
VDS

VGS
D.U.T.
15 RG
+
I D , Drain Current (A)

-VDD

5V
Pulse Width ≤ 1 µs
10
Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit


5
VDS
90%

0
25 50 75 100 125 150 175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs. td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms

10
Therm al R esponse (Z thJ C )

D = 0 .5 0

1
0 .2 0

0 .1 0
0 .0 5
0 .0 2 PD M
0 .0 1
0.1
S IN G L E P U L S E t
1
(T H E R M A L R E S P O N S E )
t2
N ote s:
1 . D u ty fac tor D = t / t
1 2
2. P e a k TJ = P D M x Z th JC + T C
0.01 A
0.00001 0.0001 0.001 0.01 0.1 1

t 1 , R e ctan g ula r P ulse D u ratio n (sec )

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRLR/U024N

140
ID

E A S , S ingle Pulse Avalanc he E nergy (m J)


TO P 4 .5 A
120 7.8 A
1 5V
B OTTOM 1 1A

100

L D R IV E R
VDS
80

RG D .U .T +
V 60
- DD
IA S A
20V
tp 0 .0 1 Ω 40

Fig 12a. Unclamped Inductive Test Circuit 20

V D D = 25 V
0 A
25 50 75 100 125 150 175

V (B R )D SS S tarting T J , J unc tion T em perature (°C )

tp

Fig 12c. Maximum Avalanche Energy


Vs. Drain Current

IAS
Current Regulator
Fig 12b. Unclamped Inductive Waveforms Same Type as D.U.T.

50KΩ

12V .2µF
QG .3µF

+
10 V V
QGS QGD D.U.T. - DS

VGS
VG
3mA

IG ID
Charge Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit

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IRLR/U024N

Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations


D.U.T
• Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG • dv/dt controlled by RG +
• Driver same type as D.U.T. VDD
-
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test

Driver Gate Drive


P.W.
Period D=
P.W. Period

VGS=10V *

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFET® MOSFETs

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IRLR/U024N

D-Pak (TO-252AA) Package Outline


Dimensions are shown in millimeters (inches)

2 .3 8 (.0 9 4 )
6 .7 3 (.2 6 5 ) 2 .1 9 (.0 8 6 )
6 .3 5 (.2 5 0 ) 1 .1 4 (.0 4 5 )
0 .8 9 (.0 3 5 )
-A -
5 .4 6 (.2 1 5 ) 1 .2 7 (.0 5 0 ) 0 .5 8 (.0 2 3 )
5 .2 1 (.2 0 5 ) 0 .8 8 (.0 3 5 ) 0 .4 6 (.0 1 8 )

6 .4 5 (.2 4 5 )
5 .6 8 (.2 2 4 )
6 .2 2 (.2 4 5 )
5 .9 7 (.2 3 5 ) 1 0 .4 2 (.4 1 0 )
1.0 2 (.0 4 0 ) 9 .4 0 (.3 7 0 ) L E A D A S S IG N M E N T S
1.6 4 (.0 2 5 ) 1 2 3
1 - GATE
0 .5 1 (.0 2 0 ) 2 - D R A IN
-B - M IN . 3 - S OU R CE
1 .5 2 (.0 6 0 ) 4 - D R A IN
1 .1 5 (.0 4 5 )
0 .8 9 (.0 3 5 )
3X
0 .6 4 (.0 2 5 ) 0 .5 8 (.0 2 3 )
1 .1 4 (.0 4 5 ) 0 .4 6 (.0 1 8 )
2X 0 .2 5 ( .0 1 0 ) M A M B
0 .7 6 (.0 3 0 )

2 .2 8 ( .0 9 0 ) N O TE S :
1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 .
4 .5 7 ( .1 8 0 ) 2 C O N T R O L L IN G D IM E N S IO N : IN C H .
3 C O N F O R M S T O J E D E C O U T L IN E T O -2 5 2 A A .
4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP ,
S O L D E R D IP M A X. + 0 .1 6 (.0 0 6 ) .

D-Pak (TO-252AA) Part Marking Information

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IRLR/U024N

I-Pak (TO-251AA) Package Outline


Dimensions are shown in millimeters (inches)

6 .7 3 (.26 5 ) 2 .3 8 (.0 9 4 )
6 .3 5 (.25 0 ) 2 .1 9 (.0 8 6 )
-A -
1 .2 7 (.0 5 0 ) 0 .5 8 (.0 2 3 )
5 .4 6 (.2 1 5 )
0 .8 8 (.0 3 5 ) 0 .4 6 (.0 1 8 )
5 .2 1 (.2 0 5 )
L E A D A S S IG N M E N T S
4 1 - G A TE
6 .4 5 (.2 4 5 ) 2 - D R A IN
5 .6 8 (.2 2 4 ) 3 - S OUR C E
1 .5 2 (.0 6 0 ) 6 .2 2 (.2 4 5 ) 4 - D R A IN
1 .1 5 (.0 4 5 ) 5 .9 7 (.2 3 5 )

1 2 3

-B - N O TE S :
1 D IM E N S IO N IN G & TO L E R A N C IN G P E R A N S I Y 1 4 .5 M , 19 8 2 .
2.2 8 (.0 9 0) 9 .6 5 (.3 8 0 ) 2 C O N T R O L L IN G D IM E N S IO N : IN C H .
1.9 1 (.0 7 5) 8 .8 9 (.3 5 0 ) 3 C O N F O R M S T O J E D E C O U TL IN E T O -2 5 2 A A .
4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP ,
S O L D E R D IP M A X . + 0 .1 6 (.0 0 6 ).

1 .1 4 (.0 45 ) 1 .1 4 (.0 4 5 )
3X 0 .8 9 ( .0 3 5 )
0 .7 6 (.0 30 ) 3X 0 .8 9 (.0 3 5 )
0 .6 4 ( .0 2 5 )

2 .2 8 (.0 9 0 ) 0 .2 5 (.0 1 0 ) M A M B 0 .58 (.0 2 3 )


0 .46 (.0 1 8 )
2X

I-Pak (TO-251AA) Part Marking Information

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IRLR/U024N

D-Pak (TO-252AA) Tape & Reel Information


Dimensions are shown in millimeters (inches)

TR TRR TRL

1 6.3 ( .641 ) 16 .3 ( .641 )


1 5.7 ( .619 ) 15 .7 ( .619 )

12 .1 ( .4 76 ) 8.1 ( .318 )
F E E D D IR E C T IO N F E E D D IR E C T IO N
11 .9 ( .4 69 ) 7.9 ( .312 )

NO T ES :
1. C O N T R O LL IN G D IM E N S IO N : M ILLIM E T E R .
2. A LL D IM E N S IO N S A R E S H O W N IN M ILL IM E T E R S ( IN C H E S ).
3. O U T L IN E C O N F O R M S T O E IA -4 81 & E IA -54 1.

13 IN C H

16 m m
NOTES :
1. O U T LIN E C O N F O R M S T O E IA -481 .

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Data and specifications subject to change without notice. 2/10
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