RFP2N20L

Data Sheet July 1999 File Number 2875.2

2A, 200V, 3.500 Ohm, Logic Level, Features

N-Channel Power MOSFET • 2A, 200V
The RFP2N20L N-Channel enhancement mode silicon gate
• rDS(ON) = 3.500Ω
power field effect transistor is specifically designed for use
with logic level (5V) driving sources in applications such as • Design Optimized for 5V Gate Drives
programmable controllers, automotive switching, and • Can be Driven Directly from QMOS, NMOS,
solenoid drivers. This performance is accomplished through TTL Circuits
a special gate oxide design which provides full rated
• Compatible with Automotive Drive Requirements
conduction at gate biases in the 3V - 5V range, thereby
facilitating true on-off power control directly from logic circuit • SOA is Power Dissipation Limited
supply voltages.
• Nanosecond Switching Speeds
Formerly developmental type TA09532. • Linear Transfer Characteristics

Ordering Information • High Input Impedance

PART NUMBER PACKAGE BRAND • Majority Carrier Device

RFP2N20L TO-220AB RFP2N20L • Related Literature

NOTE: When ordering, include the entire part number.
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”

Symbol
D

Packaging
JEDEC TO-220AB

SOURCE
DRAIN
GATE

DRAIN (FLANGE)

6-256 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
 RFP2N20L

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified

RFP2N20L UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS 200 V
Drain to Gate Voltage RGS = 20KΩ (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR 200 V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±10 V
Drain Current, RMS Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID 2 A
Pulsed (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 4 A
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 25 W
Derate Linearly Above TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 W/ oC
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL 300 oC
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg 260 oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 125oC.

Electrical Specifications TC = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V 200 - - V

Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA 1 - 2 V

Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 1 µA

VDS = 0.8 x Rated BVDSS, VGS = 0V, - - 25 µA

TC = 125oC

Gate to Source Leakage Current IGSS VGS = ±10V, VDS = 0 - - ±100 nA

Drain to Source On Voltage (Note 2) VDS(ON) ID = 2A, VGS = 5V - - 7 V

Drain to Source On Resistance (Note 2) rDS(ON) ID = 2A, VGS = 5V (Figures 6, 7) - - 3.500 Ω

Turn-On Delay Time td(ON) ID = 2A, VDD = 100V, RG = 6.25Ω, VGS = 5V - 10 25 ns

RL = 50Ω (Figures 10, 11, 12)
Rise Time tr - 10 30 ns

Turn-Off Delay Time td(OFF) - 25 40 ns

Fall Time tf - 20 25 ns

Input Capacitance CISS VGS = 0V, VDS = 25V, f = 1MHz - - 200 pF

(Figure 9)
Output Capacitance COSS - - 60 pF

Reverse Transfer Capacitance CRSS - - 35 pF

Thermal Resistance Junction to Case RθJC - - 5 oC/W

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Voltage (Note 2) VSD ISD = 2A - - 1.4 V

Reverse Recovery Time trr ISD = 2A, dlSD/dt = 50A/µs - 200 - ns

NOTES:
2. Pulsed: pulse duration = 300µs max, duty cycle = 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature.

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 RFP2N20L

Typical Performance Curves Unless Otherwise Specified

1.2 2.4
2.2
POWER DISSIPATION MULTIPLIER

2.0
1.0

ID, DRAIN CURRENT (A)

1.8
1.6
0.8
1.4
1.2
0.6
1.0
0.8
0.4
0.6
0.4
0.2
0.2

0 0
0 25 50 75 100 125 150 25 50 75 100 125 150
TC, CASE TEMPERATURE (oC) TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE

10 VGS = 5V
TJ = MAX RATED 3 PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX VGS = 10V
OPERATION IN THIS AREA TC = 25oC
LIMITED BY rDS(ON) TC = 25oC
2.5
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)

VGS = 4V
1
2

1.5 VGS = 3V

0.1 1

0.5
VGS = 2V

0.01 0
1 10 100 1000 0 1 2 3 4 5 6 7
VDS, DRAIN TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 3. FORWARD BIAS SAFE OPERATING AREA FIGURE 4. SATURATION CHARACTERISTICS

4 5
IDS(ON), DRAIN TO SOURCE CURRENT (A)

PULSE DURATION = 80µs -40oC PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
VDS = 15V VGS = 5V
rDS(ON), DRAIN TO SOURCE ON

25oC 4
3 125oC
RESISTANCE (Ω)

3
2 125oC 25oC

2
-40oC
1 125oC
1

-40oC
0 0
0 1 2 3 4 5 0 1 2 3 4
VGS, GATE TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)

FIGURE 5. TRANSFER CHARACTERISTICS FIGURE 6. DRAIN TO SOURCE ON RESISTANCE vs DRAIN

CURRENT

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 RFP2N20L

Typical Performance Curves Unless Otherwise Specified (Continued)

ID = 2A 2.0
ID = 250µA
2.0 VGS = 5V
NORMALIZED DRAIN TO SOURCE

1.5

THRESHOLD VOLTAGE
NORMALIZED GATE
ON RESISTANCE

1.5

1.0

1.0

0.5

0.5

0
-50 0 50 100 150 50 0 50 100 150 200
TJ, JUNCTION TEMPERATURE (oC) TJ, JUNCTION TEMPERATURE (oC)

FIGURE 7. NORMALIZED DRAIN TO SOURCE ON FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs

RESISTANCE vs JUNCTION TEMPERATURE JUNCTION TEMPERATURE

180 200 10

VDS, DRAIN TO SOURCE VOLTSAGE (V)

RL = 100Ω

VGS, GATE TO SOURCE VOLTAGE (V)

CISS IG(REF) = 0.09mA
140 VGS = 5V 8
C, CAPACITANCE (pF)

150

GATE
100 VGS = 0V, f = 1MHz SOURCE 6
CISS = CGS + CGD VDD = BVDSS VOLTAGE VDD = BVDSS
CRSS = CGD 100
60 COSS ≈ CDS + CGD 4

COSS 0.75BVDSS
50 0.50BVDSS
20 2
0.25BVDSS
0 CRSS DRAIN SOURCEVOLTAGE

0 0
0 10 20 30 40 50 I I
20 G(REF) t, TIME (µs) 80 G(REF)
VDS, DRAIN TO SOURCE VOLTAGE (V) IG(ACT) IG(ACT)

NOTE: Refer to Intersil Applications Notes AN7254 and AN7260

FIGURE 9. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 10. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT

Test Circuits and Waveforms

tON tOFF

td(ON) td(OFF)

tr tf
RL VDS
90% 90%

+
VDD 10% 10%
RG
- 0

DUT 90%

VGS 50% 50%

PULSE WIDTH
VGS 10%
0

FIGURE 11. SWITCHING TIME TEST CIRCUIT FIGURE 12. RESISTIVE SWITCHING WAVEFORMS

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 RFP2N20L

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