Outline - Automatic Test Pattern Generation: - Test Generation Systems - Test Generation For Combinational Ckts

© K.T. Tim Cheng, 05_comb_tg, v1.
0 1
Outline – Automatic Test Pattern

Generation
• Test generation systems
• Test generation for combinational ckts
– D-Algorithm
– PODEM
– Boolean Satisfiability approach
– Test compaction
• Test generation for sequential ckts
– Time-frame expansion & Extended D-Algorithm
– Nine-valued test generation
– Potential detection
– Issues of sequential ATPG
– Test sequence compaction
© K.T. Tim Cheng, 05_comb_tg, v1.0 2
1
The ATPG Problem
• Problem definition: Given a logical fault model, and
a circuit, determine a small set of test vectors
that detect all faults in the circuit.
• Problem complexity: Under the stuck-at fault
model, the problem is NP-complete even for
combinational circuits
– However, commercial test generators that
efficiently generate tests for >10M-gate ckts
are in use today.
Basics: Path Sensitization Method

Atomic operations:
1. Activation, fault excitation: Specify inputs so as to
generate the appropriate value at fault site for fault
excitation (I.e. set S to 1 for S-stuck-at-0 fault)
2. Error propagation: specify additional signal values to

propagate the fault effect from the fault site to the
outputs/observation points
3. Line justification: Specify input values so as to produce

the signal values specified in (1) or (2)
4. Value implication: unique determination of values at

other signals due to value assignments made in (1), (2), or (3)
2
A Simple Example
G2
D G5
f1
G1
A a
G6
B X
C f2
s.a.1
G3
(1) Fault activation : A = B = C = 1

(2) Have a choice of error propagating: through G5 or G6
(a) Propagating through G5 requires G2 = 1 ⇒ A=D=0 ⇒ contradiction
(b) Propagating through G6 requires G4 = 1 ⇒ C=1, E=0
⇒ Test ABCDE=(111x0)
Line Justification
H G3
A
F
G4
G2
• E s-a-1 ⇒ E =0
C
D
E G1
• C = D = 1 to propagate through G1.

• To propagate G4, need G2 = G3 = 1
Attempt to line justify G2 = G3 = 1
– G3 = 1possible if A = F = 1 or B = H = 1
• If A = F = 1 ⇒ inconsistency since C = 1 so G2 = 0.
⇒ Therefore, G3 = 1 ⇒ B = H = 1
– G2 = 1 need A = 0 or F = 0
⇒ Tests are ABCDEH, BCDEFH
3
Completeness of ATPG Algorithms
• A test generation algorithm is deemed complete iff

it will find a test for a fault if exists or prove that
there exists no test, given sufficient time.
– Complete algorithms can identify untestable faults
• Major complete algorithms for comb. ckts
– D-algorithm (Roth, 1966)
– PODEM (Goel, 1981)
– FAN (Fujiwara, 1983)
– Socrates (Schulz, 1988)
– Boolean-SAT-based ATPG (Larrabee, 1992)
Single Path Sensitization Is NOT

Complete G2
C
G3
G1
A
B x
d s.a.0 G6
f
G4
d
G5
E
• d s-a-0 : ⇒ A = B = 1
• Propagate along G3, G6 requires C =1, G2 = G4 = G5 = 1.
– In order for G4 = 1 either E = 0 or G1 = 0 ⇒
inconsistency
⇒ E = 0, B = 1 ⇒ G5 = 0 ⇒ inconsistency
• Propagate along G4, G6 ⇒ E = 1 & G2 = G3 = G5 = 1
– G2 = 1 ⇒ C = 1, ABC = 111 ⇒ G3 = 0 inconsistency
⇒ No test
4
But Boolean Difference Method
Finds Test ABCD=(1111)!!
G2
1
C
1 0
G1 G3
1 0/1 G6
A d
1/0
B s-a-0 1/0
1 1/0 G4
0/1
1 0 G5
E 1
Multiple Path Sensitization

G2
1
C
1 0
G1 G3
1 0/1 G6
A d
1/0
B s-a-0 1/0
1 1/0 G4
0/1
1 0 G5
E 1
• Two paths G3, G2 and G4, G6 are sensitized, i.e. error is

propagated along both paths.
5
The D-Algebra
• Need to be able to deal with multiple “errors” at
the inputs to a gate.
• D represents a signal which has value 1 in normal
(fault-free, good) ckt, and value 0 in faulty ckt.
(I.e. D ≡ 1/0); Similarly, D ≡ 0/1
D D D D D 0
D D D
D D D D D 1
D D D
• Behaves like a Boolean variable.
Primitive D-cubes
• Specifies the minimal input conditions which must
be applies to a logic element E in order to produce
an error signal at the output of E
Propagation D-cubes
• The propagation D-cubes of a logic element E
specify minimal input conditions which are
required to propagate an error signal on an input
(or inputs) to the output of that element.
6
8 G4
An Example
H
J 9 10 G5
G1 12
A 1 5 G3
7
B s.a.0
2 G6
13
F 11
G2
G1 s-a-0 :
6
C 3
E 4
1 2 3 4 5 6 7 8 9 10 11 12 13
primitive D-cube 1 1 D
primitive cubes of G2 0 X X 1
X 0 X 1
X X 0 1
1 1 1 0
primitive cubes of G3 1 X 1
X 1 1
0 0 0
X 1 1
0 0 0
primitive cubes of G5 X 0 0
0 X 0
1 1 1
X 0 0
1 1 1
The D-Algorithm
1) Select a primitive D-cube of the fault
2) Implication and checking for inconsistency.
If inconsistency occurs, go to (1).
3) D-drive: selects an element in D-frontier & attempts to propagate
D or D in its inputs to its output.
D-frontier consists of set of all elements whose output values
are unspecified but inputs have some signals with D or D.
D-drive is done by intersecting the test cube with a
propagation D-cube of the selected element.
Backtrack, i.e. select another propagation D-cube, if
intersection is null.
4) Implication of D-drive: perform implication for the new test cube.
5) Repeat 3) & 4) until faulty signal propagated to an output.
6) Line justification: Consistency check on input conditions required.
7
D-Algorithm Example
8 G4
H
J 9 10 G5
G1 12
A 1 5 G3
7
B s.a.0
2 G6
13
F 11
G2
6
C 3
E 4
8 G4
H
J 9 10 G5
G1 12
A 1 5 G3
7
B s.a.0
2 G6
13
F 11
G2
6
C 3
E 4 1 2 3 4 5 6 7 8 9 10 11 12 13
initial test cube ti 1 1 D
propagation D-cube of G3 D 0 D
test cube after D-drive 1 1 D 0 D
through G3 = tc'
perform implication 1 1 1 1 D 0 D
• Check implication: D-cube of G1 does not imply any

other signal.
• D-frontier : G3
• Get propagation D-cube for G3
8
• Now D-frontier is G5 & G6
• Select G5 and a propagation D-cube of G5
1 2 3 4 5 6 7 8 9 10 11 12 13
perform implication 1 1 1 1 D 0 D
propagation D-cube of G5 D 1 D
Test cube after D-drive 1 1 1 1 D 0 D 1 D
Line justification 1 1 1 1 D 0 D 1 1 D
or 1 1 1 1 D 0 D 1 1 D
8 G4
H
J 9 10 G5
G1 12
A 1 5 G3
7
B s.a.0
2 G6
13
F 11
G2
6
C 3
E
© K.T.4Tim Cheng, 05_comb_tg, v1.0 17
Flowchart for D-algorithm

start
Initialize test cube (tc)
Select a primitive D-cube

of that as C
D-intersect C with previous

inconsistent test cube tc and perform implication
consistent
Backtrack to Is there a D
the last yes Line Justification
or D on any PO ?
point a choice impossible
exists no done
Select a gate from D-frontier Test has

and a propagation D-cube been
none exists
of the selected gate as C generated
9
Line Justification
Begin
Is there any no Test has

line in tc which been
are not justified generated
yes
Select an unjustified
line and a primitive cube
C to justify the line
Intersect C with previous

test cube tc
inconsistent
consistent
Backtrack to the last
Line point a choice exists
justification
impossible none exists
1 2 3 4 5 6 7 8 9 10 11 12
A D-Algorithm primitive D-cube (1)

implication (2)
1
1
1
1
D
D
Example Select D-frontier G5 (3) 1

1 1 1
D
D
D
D
implication (4) 1 1 0
1 1 1 0 D D
implication (5) X 0 1
1 1 1 0 D 1 D
8 1 D 1 1 D
G4 Select D-frontier G8 (6)
G1 1 1 1 0 D 1 D 1 1 D
5
Implication 1 0 1
1 9 Line justification (7) 1 1 1 0 D 0 1 D 1 1 D
G2 G5
6 12 Implication 0 D 1
2 G8
Line justification (8) 1 1 1 0 0 D 0 1 D 1 1 D
3 s-a-1 10
G6 implication (8) 1 1 1 0 0 D 0 1 D 1 1 D
4 1 0 1
G3 inconsistent &
7 11
G7 backtrack to (6) 1 1 1 0 D 1 D
Select D-frontier 1 D D
G6 (9) 1 1 1 1 0 D 1 D D
1 1 0
implication (10)
0
1 1 1 1 0 D 0 1 D D 1 D
Test is found : 1 1 1 1
10
Potential Problems with D-Algorithm
• Since the assignment of values is allowed to internal
lines, more than one choice is available at such internal
line/gate and backtracking could occur at each gate
• Could result in inefficiency for large ckts and some
special classes of ckts.
• Example: An ECAT (error-correction-&-translation) ckt
A H
B s.a.0
C
E J
N
F K
P
G R
The PODEM Algorithm (Goel 1981)

• Only allows assignment of values to primary inputs
• The values assigned to primary inputs are then
propagated toward internal lines by the implication.
• Example:
First, a binary value is
assigned to an unassigned PI A
B
H s.a.0
to provide a fault effect at

P
fault site: A = 1
C
E J
Determine the implications F K

N
of assigned PIs (only

G R
Q
forward implication): A= 1 L
cause no implication
Next, assign B = 1 M
A = B = 1 ⇒ imply H = D
11
PODEM Decision Tree for the Example
Start
A=0 A=1 A H s.a.0

B
P
B=0 B=1
C
E J
N
C=1 F K
G R
Q
E=1 L
E=0
F=0 M
F=1
G=0
G=1
Test has been
Successfully
generated
PODEM
• Essentially a process of finding a PI & a binary
value for initial assignment.
• Continue assigning PI values, checking to see if the
error is being propagated to outputs (after each
PI assignment, perform forward implication)
• If at any stage, either the fault cannot be excited
or the error cannot be propagated further,
backtrack to the most recent PI assignment and
change it.
12
Flowchart of PODEM
Start
Assign a binary value
to an unassigned PI
Determine implication of all PIs

Is there a
D or D on any
P0 ? no
yes Test
Test possible with additional
is found
Is there an no assigned PIs ? maybe
untried combination
of values on assigned
PIs?
No test no
yes
exists
Set untried combination
of values on assigned PIs
Steps in PODEM
(1) Determine an initial objective. If the fault
effect has not appeared at fault site, the initial
objective is directed toward providing the fault
effect on the faulty line.
(2) Given the initial objective, a PI & a logic value are
chosen that have a good likelihood of meeting the
object.
– Done using the backtrace procedure.
13
Flowchart of Backtrace
begin
Is
Found PI objective line
initial assignment
yes fed by a A
is the current
objective value no (fed by PI ?
gate G)
Current OR/NAND & V=1
objective value V AND/NOR & V=0
Exit and type of gate driving Next obj line is
objective the input of G
OR/NAND & V=0 line ? which is at x
AND/NOR & V=1 and is the
easiest to control
Next obj line is
the input of G Is G
which is at x a NAND/NOR
and is the gate ?
hardest to control yes
no
Next obj value Next obj value
is the same as is the complement
the current of the current
objective value objective value
A
A PODEM Example
• Initial objective: (0, G2) G4
• Backtrace to PI : X2 = 1 G1
X1
• Initial objective: (0, G2) G5
X2 G8
• Backtrace: X3 = 1 X3
G2
s-a-1 Z1
G6
• Implication: G2 = D X4
• D-frontier is { G5, G6 } G3
G7
• Attempt to propagate through G5
– Require X1 = 1
• Implication: G1 = 0, G4 = 1, G5 = D
• Attempt to propagate D through G8
14
A PODEM Example – Cont’d
• Initial objective: ( 1, G6 )
• Backtrace to set X4 = 0
• Implication: G3 = 1, G7 = 0 & G8 = 1 ⇒ failed in propagating error
• Backtrack to most recent PI assignment ⇒ reassign X4 = 1
• Implication: G3 = 0, G6 = D, G8 = D ⇒ Test is generated
G4
X2 = 1
G1
X3 = 1
X1
G5
X2 G8
Decision tree G2
Z1
X1 = 1 X3 s-a-1
G6
X4
X4 = 1 X4 = 0
G3
test is found conflict & G7
backtrack
Cost of ATPG
(A) How long? (Time complexity)

(B) How much RAM? (Space complexity)
(C) How many vectors generated? (Test application time)
• Theoretical result (Ibarra & Sahni, 1975) :
– Generating a test for comb. ckt is NP-complete
• Worst-case time ∝ constantG (G = # of gates)
• Emperical result (average-time behavior):
– Total ATPG time ∝ constant • G2
– Test length ∝ G
15
Accelerating Comb. ATPG
Basic goals:
• Reduce number of backtracks
• Reduce processing between backtracking
Basic tools:
• Topological analysis
• Multiple backtrace
• Learning
Socrates: Static Learning

Preprocessing the ckt:
(1) Assign a logic value to a certain signal of the ckt
(2) Perform all implications from that assignment
(3) Learn from the results of implications
– Using law of contraposition: (A ⇒ B ) ⇔ (!B ⇒ !A)
bX X bX 1
d d
Preprocessing: a 1 X
f ⇒a 1 1
f
X 1
c e c e
X X
Learned
(a=1⇒f=1)⇔(f=0⇒a=0) information
bX X bX X
d d
During ATPG: aX 0
f ⇒ a 0 0
f
X X
c e c e
X X
16
Boolean Satisfiability Approach
Given a fault, it consists of two steps:

• Step 1: Construct a formula expressing the
Boolean Difference of a circuit with respect to
the fault
• Step 2: Apply a Boolean Satisfiability (SAT) solver
to the resulting formula
Step 1 : Extracting the formula
• Each node of the ckt is tagged with the logic formula in

3-element conjunctive normal form, or 3CNF
• The formula is true iff the values assigned are
consistent with the truth for the logic element
A A
A C
C C
B B
(C + A) * (C + B) * (C +A + B) (C + A) * (C + B) * (C + A + B) (C + A) * (C + A )
17
Step 1: Extracting the formula – Cont’d
(a) Construct the formula of the good circuit output X
A
(D+A) *
(D+B) *
(D+A+B)
B
(X+D) *
(X+E) * X
(X+D+E)
C (C+E) *
(C+E)
(b) Construct formula of faulty circuit output X’ for fault D 1
stuck-at-0 (no need to repeat the part identical to (a))

A
(D+A) * D
(D+B) *
(D+A+B)
B
D'
(X'+D') *
(X'+E) * X'
(X'+D'+E)
C (C+E) *
(C+E)
Step 1: Extracting the formula – Cont’d

(c) Construct the formula of the Boolean Difference:
XOR of (a) & (b) and the output of XOR should be 1
X
BD=(X+X’)x(X+X’)=V1xV2=1
From (a): X’
(X+D)x(X+E)x(X+D+E)x(D+A)x(D+B)x(D+A+B)x(C+E)x(C+E)
From (b):
(X’+D’)x(X’+E)x(X’+D’+E)xD’
From (c):
(V1+X)x(V1+X’)x(V1+X+X’)x(V2+X)x(V2+X’)x(V2+X+X’)x(BD+V1)x(BD+V2)x
(BD+V1+V2)xBD (note: BD=X⊕X’=(X+X’)x(X+X’)=V1xV2)
18
Step 2: Satisfying the Formula
- Boolean Satisfiability
• Given a suitable representation for a Boolean function f(X):
– Find an assignment X* such that f(X*) = 1
– Or prove that such an assignment does not exist (i.e. f(X) = 0

for all possible assignments)
• In the “classical” SAT problem, f(X) is represented in product-of-

sums (POS) or conjunctive normal form (CNF)
• Many decision (yes/no) problems can be formulated either directly

or indirectly in terms of Boolean Satisfiability
Public Released SAT Solvers by UCSB
• C-SAT: Combinational Circuit-based SAT Solver

– F. Lu, Li-C. Wang, K.-T Cheng, and R. Huang, “A Circuit SAT solver with
Signal Correlation guided learning,” DATE, March 2003.
– F. Lu, L.-C. Wang, K.-T. Cheng, J. Moondanos and Z. Hanna, "A Signal
Correlation Guided ATPG Solver and Its Applications for Solving
Difficult Industrial Cases," DAC, Jun. 2003.
• Satori & Seq-SAT: Sequential Circuit-based SAT Solver
– M. K. Iyer, G. Parthasarathy, and K.-T Cheng, “SATORI—A Fast
Sequential SAT solver for Circuits,” ICCAD, Nov. 2003.
– F. Lu, M. K. Iyer, G. Parthasarathy and K.-T. Cheng, "An Efficient
Sequential SAT Solver With Improved Search Strategies," IEEE Proc.
Design, Automation & Test in Europe (DATE), Mar. 2005.
19
Test Compaction for Comb. Tests
• Fault simulate test patterns in reverse

order of generation
– ATPG patterns go first
– Randomly-generated patterns go last (because
they may have less coverage)
– When coverage reaches 100%, drop remaining
patterns (which are the useless random ones)
– Could significantly shortens test sequence –
reducing test application time
20

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© K.T. Tim Cheng, 05_comb_tg, v1.

Outline – Automatic Test Pattern

© K.T. Tim Cheng, 05_comb_tg, v1.0 2

© K.T. Tim Cheng, 05_comb_tg, v1.0 3

Basics: Path Sensitization Method

2. Error propagation: specify additional signal values to

3. Line justification: Specify input values so as to produce

4. Value implication: unique determination of values at

© K.T. Tim Cheng, 05_comb_tg, v1.0 4

(1) Fault activation : A = B = C = 1

© K.T. Tim Cheng, 05_comb_tg, v1.0 5

• C = D = 1 to propagate through G1.

• A test generation algorithm is deemed complete iff

© K.T. Tim Cheng, 05_comb_tg, v1.0 7

Single Path Sensitization Is NOT

© K.T. Tim Cheng, 05_comb_tg, v1.0 9

Multiple Path Sensitization

• Two paths G3, G2 and G4, G6 are sensitized, i.e. error is

© K.T. Tim Cheng, 05_comb_tg, v1.0 10

• Behaves like a Boolean variable.

© K.T. Tim Cheng, 05_comb_tg, v1.0 11

© K.T. Tim Cheng, 05_comb_tg, v1.0 12

© K.T. Tim Cheng, 05_comb_tg, v1.0 13

© K.T. Tim Cheng, 05_comb_tg, v1.0 14

© K.T. Tim Cheng, 05_comb_tg, v1.0 15

• Check implication: D-cube of G1 does not imply any

© K.T. Tim Cheng, 05_comb_tg, v1.0 16

Flowchart for D-algorithm

Initialize test cube (tc)

Select a primitive D-cube

D-intersect C with previous

Select a gate from D-frontier Test has

© K.T. Tim Cheng, 05_comb_tg, v1.0 18

Is there any no Test has

Intersect C with previous

© K.T. Tim Cheng, 05_comb_tg, v1.0 19

A D-Algorithm primitive D-cube (1)

Example Select D-frontier G5 (3) 1

© K.T. Tim Cheng, 05_comb_tg, v1.0 21

The PODEM Algorithm (Goel 1981)

to provide a fault effect at

 Determine the implications F K

of assigned PIs (only

© K.T. Tim Cheng, 05_comb_tg, v1.0 22

A=0 A=1 A H s.a.0

© K.T. Tim Cheng, 05_comb_tg, v1.0 23

© K.T. Tim Cheng, 05_comb_tg, v1.0 24

Determine implication of all PIs

© K.T. Tim Cheng, 05_comb_tg, v1.0 25

© K.T. Tim Cheng, 05_comb_tg, v1.0 26

• Initial objective: (0, G2) G4

© K.T. Tim Cheng, 05_comb_tg, v1.0 28

© K.T. Tim Cheng, 05_comb_tg, v1.0 29

(A) How long? (Time complexity)

© K.T. Tim Cheng, 05_comb_tg, v1.0 30

© K.T. Tim Cheng, 05_comb_tg, v1.0 31

Socrates: Static Learning

Given a fault, it consists of two steps:

© K.T. Tim Cheng, 05_comb_tg, v1.0 33

Step 1 : Extracting the formula

• Each node of the ckt is tagged with the logic formula in

© K.T. Tim Cheng, 05_comb_tg, v1.0 34

(b) Construct formula of faulty circuit output X’ for fault D 1

Determine the implications F K