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Mc1310p FM Stero Decoder
Mc1310p FM Stero Decoder
MC1310
Specifications a n d Applications
Information
FM S T E R E O
DEMODULATOR
F I G U R E 1 - T Y P I C A L A P P L I C A T I O N A N D TEST C I R C U I T
19 k H z
Output
R4 cs
C 6
Pin Functions R3
Pin 1 - V
CC Pin 8 - S w i t c h Filter
Pin 2 - Input Pin 9 - S w i t c h Flltar C5 C4
Pin 3 - Amplifier Output Pin 10 m 19 k H z O u t p u t
- H f - 1
B
Pin 4 - L e f t Channel O u t p u t Pin 11 • Modulator input
Pin 5 - Right Channel O u t p u t Pin 12 a Loop Flltar 13 12 A n 10
Pin 6 L a M p Indicator Pin 13 - L o o p Flltar
r
Pin 7 » Ground Pin 14 - Oscillator RC N a t w o r k
MC1310
Parts List
17
o
C1 2.0 ^ F C8 - 0.25 *iF C1
C2 - 0.02 MP R1 - 3.9 k f l Input <
C3 x 0 . 0 2 MF
C4 « 0 . 2 5 MF
C5 m 0.05 ( i f
R2
R3
R4
-
-
-
3 . 9 kSI
1.0 k O
16 k n
R1 R2 ©
C6 m 0.5 MP R5 - 5.0 k n
C? a* 4 7 0 pF C2 ^ cs:
vcc*-
Left Right
Channel Chsnnal
Output Output
7-18
MC1310
L a m p Current 75 mA
Inherent SC A Rejection dB
(f = 67 k H z ; 9.0 kHz beat note measured - 75 -
7-19
FIGURE 2 - CIRCUIT SCHEMATIC
MC1310
T Y P I C A L CHARACTERISTICS
Unless otherwise n o t e d : Vqq * + 12 V d c , T a = + 2 5 ° C ; 560 m V ( R M S ) ( 2 . 8 V ( p . p ] } standard m u l t i p l e x
composite signal w i t h L or R channel o n l y modulated at 1.0 k H z and w i t h 100 m V ( R M S )
p i l o t level (10%), using c i r c u i t o f Figure 1.
F I G U R E 3 - C H A N N E L S E P A R A T I O N versus
COMPOSITE INPUT L E V E L F I G U R E 4 - C H A N N E L S E P A R A T I O N versus F R E Q U E N C Y
BO 50
f = 1 kH2
Vin >8IV'(p•P)
\
50 40
40
V C 0 1' U N E D
30
/
\1
o.:>5 F
30 <1
N !
OETUN ED
| 20
\c.4 D E T U NED
0.5 1.0 1.5 2.0 2.5 3.0 50 100 200 500 1.0 k 2.0 k 5.0 k 10 k 20 k 50 k
COMPOSITE INPUT L E V E L ( V { p . p ) ) FREQUENCY (Hz)
f = 1kHz f = 1kHz
=r 50 50
V i n = 2. 8V(p.p)
40 v, /
( P P) - 5 40
cc
V " <
r
/
30 T• V i n = 1.5 V ( p . 30
20 20
10
18.2 18.6 19 19.4 19.8 8.0 10 12 14
VCO F R E E - R U N N I N G FREQUENCY (kHz) SUPPLY V O L T A G E (Vdc)
F I G U R E 7 - T H D versus C O M P O S I T E I N P U T L E V E L 1 F I G U R E 8 - D I S T O R T I O N versus F R E Q U E N C Y 1
0.5 1—I I 1 I III!
0.25 jjF
—
0.4
f = 1 kHz
O l Wv-
P|
PIN Ik n r , c N~
0 5 / j F
13 12
F I L T E R NETWORK
0.2
0.1
0.5 1 0 1.5 2.0 2.5 3.0 50 100 200 500 1.0 k 2.0 k 5.0 k 10 k 20 k 50 k
COMPOSITE INPUT L E V E L ( V j p . p j ) FREQUENCY (Hz)
7-21
MC1310
F I G U R E 10 - VCO F R E E - R U N N I N G F R E Q U E N C Y
F I G U R E 9 - D I S T O R T I O N versus F R E Q U E N C Y * versus T E M P E R A T U R E
- 19.4
2. 025 v c 0 NONCO MPENSA' rEO
100
O—AAA* |( O d
2. PtN 13 PIN 12
19.2
1
2
>— '
ac
—
o
18.8
0.
0. 18.6
100 200 500 1.0 k 2.0 k S.Ok 10 k 20 k 50 k •55 -35 15 +5.0 +25 +45 +65 +85 +105
FREQUENCY <Hz) TEMPERATURE <°C)
F I G U R E 12 - P I L O T L E V E L R E Q U I R E D FOR V C O L O C K U P
F I G U R E 11 - C U R R E N T D R A I N versus SUPPLY V O L T A G E versus V C O F R E E R U N N I N G F R E Q U E N C Y
14.5 100
!
1 1
Ii
^ c 7 = 560pF,Rr = 15 kf
i I i. i
80 1
LAMP " O F F "
\ H —+ 1
1 1 11
Of - «wu pr, n [ i —*- t
1
—.I i
13.5 >
E
60 ^ 1 ! 1 !|
1
/
C7 * 330 pF, R j^ 26 kJ
\ „,
—
V i
J
1 f
40 L 1 /
}J
< 13
V R T = R4 + R5 /
12.5 20
\ \ \ 4
• y -
12
8.0 10 12 18.5 19 19.5 20
SUPPLY VOLTAGE (Vdc) VCO FREE-RUNNING FREQUENCY (kHz)
F I G U R E 13 - S Y S T E M B L O C K D I A G R A M
7-22
MC1310
CIRCUIT
Figure 13, on the previous page, shows the system the regenerated 38-kHz signal. The regenerated 38-kHz
block diagram. The upper line, comprising the 38-kHz signal is fed to the stereo decoder via an internal switch,
regeneration loop operates as follows: the internal os- which closes when a sufficiently large 19 kHz pilot tone
cillator running at 76-kHz and feeding through two is received.
divider stages returns a 19-kHz signal to the input mod- The 19-kHz signal returned to the 38-kHz regeneration
ulator. There the returned signal is multiplied with the loop modulator is in quadrature w i t h the 19-kHz pilot
incoming signal so that when a 19-kHz pilot tone is tone when the loop is locked. With the t h i r d divider
received a dc component is produced. The dc component state appropriately connected, a 19-kHz signal in phase
is extracted by the low pass filter and used to control w i t h the pilot tone is generated. This is multiplied with
the frequency of the internal oscillator which con- the incoming signal in the stereo switch modulator
sequently becomes phase-locked to the pilot tone. With yielding a dc component proportional to the pilot tone
the oscillator phase-locked to the pilot the 38-kHz out- amplitude. This component after filtering is applied to
put f r o m the first divider is in the correct phase for de- the trigger circuit which activates both the stereo switch
coding a stereo signal. The decoder is essentially another and an indicator lamp.
modulator in which the incoming signal is multiplied by
APPLICATIONS I N F O R M A T I O N
{ C o m p o n e n t numbers refer t o Figure 1)
External Component Functions and Values These values give ±3.5% typical capture
C1 Input coupling capacitor; 2.0 fJiF is range. Capture range may be increased
recommended but a fower value is by reducing C7 and increasing R4, R5
permissible if reduced separation at low proportionally but at the cost of in-
frequencies is acceptable. creasing beat-note distortion (due to
oscillator-phase jitter) at high-signal
R1, R2, C2, C3 See Maximum Load Resistance section. levels. See Figure 12.
C4 Filter capacitor for stereo switch level Stereo Lamp Nominal rating up to 75 mA at 12 V;
detector; time constant is C4 x 53 the circuit includes surge limiting which
kilohms ±30%, maximum dc voltage restricts cold-lamp current to approx-
appearing across C4 is 0.25 V (pin 8 imately 250 mA.
positive) at 100 mV(RMS) pilot level.
The signal voltage across C4 is neg- 19-kHz Output A buffer output providing a 3.0-V p k
ligible. square wave at 19 kHz is available at
pin 10. A frequency counter may be
C5 See Phase Compensation section. connected to this point to measure the
R3, C6, C8 Phase-locked loop filter components; oscillator free-running frequency for
the following network is recommended: alignment. See Alignment section.
7-23
MC1310
APPLICATIONS I N F O R M A T I O N (continued)
F I G U R E 16
Lamp Sensitivity
It may be desirable in some cases, to change the lamp
Maximum Load Resistance
sensitivity due to differing signal levels produced by
various FM detectors. The lamp sensitivity can be The curve shown gives absolute maximum load re-
changed by making use of the external circuit shown. sistance values versus supply voltage used for full-signal
Typical sensitivities versus potentiometer rotation are handling capability. With desired load resistance choose
also shown in Figure 15. C2, C3 capacitors to provide standard 75jus de-emphasis.
7-24
MC1310
APPLICATIONS I N F O R M A T I O N (continued)
Composite Signal
Due to confusion concerning the measurement of the
stereo composite signal, a curve showing both RMS and
p-p composite levels versus pilot level follows, see
Figure 18.
F I G U R E 18 - C O M P O S I T E L E V E L v e r s u s P I L O T
( L o r R Modulation Only)
1000
10 12
SUPPLY VOLTAGE (Vdc) 500 RMS
£ 5.0
8% PILOT / y
Audio Output "H
ji
p-p audio output (one-channel) 200 2.0 - —
j
The ratio G * for RMS (P-P) <c
£
M (P-P> —
io
UJ
H-
i
0.45 0.5
1.0
A
2.0 5.0 10 20 50 100 200 500 0.1
1000
These figures are for 3.9-kilohm load resistors and for PILOT LEVEL (MV[RMS!)
low-audio frequencies where de-emphasis roll-off is
insignificant.
7-25