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The field-programmable gate array (FPGA) is an integrated circuit that


consists of internal hardware blocks with user-programmable interconnects to
customize operation for a specific application.

What is FPGA?
The field-programmable gate array (FPGA) is an integrated circuit that consists of internal hardware
blocks with user-programmable interconnects to customize operation for a specific application. The
interconnects can readily be reprogrammed, allowing an FPGA to accommodate changes to a design or
even support a new application during the lifetime of the part.

The FPGA has its roots in earlier devices such as programmable read-only memories (PROMs) and
programmable logic devices (PLDs). These devices could be programmed either at the factory or in the
field, but they used fuse technology (hence, the expression “burning a PROM”) and could not be
changed once programmed. In contrast, FPGA stores its configuration information in a re-

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programmable medium such as static RAM (SRAM) or flash memory. FPGA manufacturers
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FPGA Architecture Spark Virtual Assistant
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A basic FPGA architecture (Figure 1) consists of thousands of fundamental elements called
configurable logic blocks (CLBs) surrounded by a system of programmable interconnects, called a
fabric, that routes signals between CLBs. Input/output (I/O) blocks interface between the FPGA and
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Depending on the manufacturer, the CLB may also be referred to as a logic block (LB), a logic element
(LE) or a logic cell (LC).

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Figure 1: The fundamental FPGA architecture (Image Source: National Instruments)

An individual CLB (Figure 2) is made up of several logic blocks. A lookup table (LUT) is a characteristic
feature of an FPGA. An LUT stores a predefined list of logic outputs for any combination of inputs:
LUTs with four to six input bits are widely used. Standard logic functions such as multiplexers (mux),
full adders (FAs) and flip-flops are also common.

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Figure 2: A simplified CLB: The four-input LUT is formed from two three-input units. (Image source:
Wikipedia)

The number and arrangement of components in the CLB varies by device; the simplified example in
Figure 2 contains two three-input LUTs (1), an FA (3) and a D-type flip-flop (5), plus a standard mux (2)
and two muxes, (4) and (6), that are configured during FPGA programming.

This simplified CLB has two modes of operation. In normal mode, the LUTs are combined with Mux 2 to
form a four-input LUT; in arithmetic mode, the LUT outputs are fed as inputs to the FA together with a
carry input from another CLB. Mux 4 selects between the FA output or the LUT output. Mux 6
determines whether the operation is asynchronous or synchronized to the FPGA clock via the D flip-
flop.

Current-generation FPGAs include more complex CLBs capable of multiple operations with a single
block; CLBs can combine for more complex operations such as multipliers, registers, counters and
even digital signal processing (DSP) functions.

CPLD vs FPGA
Originally, FPGAs included the blocks in Figure 1 and little else, but now designers can choose from
products with a large range of features. Less complex devices such as simple programmable logic

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devices (SPLDs) and complex programmable logic devices (CPLDs) bridge the gap between discrete
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Entry-level FPGAs emphasize low power consumption, low logic density and low Virtual per
complexity Assistant
chip. 

Higher-function
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(PLLs), high-speed serializers and deserializers,
Ethernet MACs, PCI express controllers and high-speed transceivers. These blocks can either be
implemented with CLBs—termed soft IP—or designed as separate circuits; i.e., hard IP. Hard IP blocks
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gain performance at the expense of reconfigurability.

At the
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SHORT end, the
 FPGA product family includes complex system-on-chip (SoC) parts that integrate

the FPGA architecture, hard IP and a microprocessor CPU core into a single component. Compared to
separate devices, a SoC FPGA provides higher integration, lower power, smaller board size and
higher-bandwidth communication between the core and other blocks.

SoC FPGAs
SoC FPGAs include a wide range of processing capabilities to suit different applications. A low-cost,
low-power SoC FPGA such as Intel’s Cyclone V, for example, targets high-volume applications such
as industrial motor control drives, protocol bridging, video processing cards and handheld devices. The
device (Figure 3) has two distinct parts: the FPGA portion and a hard processor system (HPS) based
around a single- or dual-core 32-bit Arm Cortex-A9 MPCORE running at 925 MHz. Each part contains
its own set of peripherals, which includes hard IP from third-party vendors.

Figure 3: The Cyclone V SoC internal block diagram (Image Source: Cornell University)

At the other end of the scale, the Stratix 10 SX targets high-performance applications in
communications, data center acceleration, high-performance computing (HPC), radar processing and
ASIC prototyping; that FPGA includes a quad-core 64-bit Arm Cortex-A53 running at up to 1.5 GHz.

FPGA Design
How do we transform this collection of thousands of hardware blocks into the correct configuration to
execute the application? An FPGA-based design begins by defining the required computing tasks in the
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development tool, then compiling them into a configuration file that contains information on how to
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Designers have traditionally used a hardware READ MORElanguage (HDL) such as VHDL (Figure 4) or
description
Verilog to design the FPGA configuration.

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Figure 4: Sample VHDL code for a signed adder (Image Source: Wikipedia)

Once the FPGA design has been created and verified using HDL, the compiler takes the text-based file
and generates a configuration file that contains information on how the components should be wired
together. Even if the HDL code has no errors, choosing the wrong FPGA may still cause the

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compilation to fail—for example, the FPGA runs out of a specific resource type or the compiler cannot
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One challenge with an HDL approach is that configuring an FPGA requires bothSpark
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detailed
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As a result, vendors are offering software development kits (SDKs) that allow designers to develop
FPGA solutions in popular high-level languages such as C/C++, Python and OpenCL. High-level
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Instrument’s LabVIEW and feature graphical block diagrams instead of lines of code.
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FPGA Uses: An Attractive Choice for Certain


Applications
The ability to configure the hardware of the FPGA, reconfigure it when needed and optimize it for a
particular set of functions makes the FPGA an attractive option in many applications.

FPGAs are often used to provide a custom solution in situations in which developing an ASIC would be
too expensive or time-consuming. An FPGA application can be configured in hours or days instead of
months. Of course, the flexibility of the FPGA comes at a price: An FPGA is likely to be slower, require
more PCB area and consume more power than an equivalent ASIC.

Even when an ASIC will be designed for high-volume production, FPGAs are widely used for system
validation, including pre-silicon validation, post-silicon validation and firmware development. This
allows manufacturers to validate their design before the chip is produced in the factory.

FPGA Applications
Many applications rely on the parallel execution of identical operations; the ability to configure the
FPGA’s CLBs into hundreds or thousands of identical processing blocks has applications in image
processing, artificial intelligence (AI), data center hardware accelerators, enterprise networking and
automotive advanced driver assistance systems (ADAS).

Many of these application areas are changing very quickly as requirements evolve and new protocols
and standards are adopted. FPGAs enable manufacturers to implement systems that can be updated
when necessary.

A good example of FPGA use is high-speed search: Microsoft is using FPGAs in its data centers to run
Bing search algorithms. The FPGA can change to support new algorithms as they are created. If needs
change, the design can be repurposed to run simulation or modeling routines in an HPC application.
This flexibility is difficult or impossible to achieve with an ASIC.

Other FPGA uses include aerospace and defense, medical electronics, digital television, consumer
electronics, industrial motor control, scientific instruments, cybersecurity systems and wireless
communications.

FPGA History: What Comes Next?


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With these emerging applications, the FPGA market is growing at a healthy clip: It was valued at $5.34
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2016 and is expected to grow to $9.50 billion in 2023, researchers
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compared a
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The exponential growth of data, and the emergence of fast-changing fields such as AI, machine
learning, HPC and genomics, require architectures that are fast, flexible and adaptable. FPGAs are
well-positioned to take advantage of these new opportunities.
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