International Journal of VLSI Design, Microelectronics and Embedded

System
Volume 4 Issue 1

Analysis of Various Memory Circuits Used In Digital VLSI

Tanvi Upaskar, Ganesh Thorave, Prof. Sumita G*, Mayuresh Yerandekar, Siddhesh Mahadik
K C College of Engineering and Management Studies Thane, India
Corresponding author’s email id: sumitagupta128@gmail.com*
DOI: http://doi.org/10.5281/zenodo.2652717

Abstract
This paper presents comparison of semiconductor memory circuits such as
volatile memories like SRAM, DRAM and non-volatile memories like ROM,
PROM, EPROM, EEPROM, FLASH (NOR based & NAND based). This
comparison is on the basis of some parameters including read speed, write
speed, volatility, bits/cell, cell structure, cell density, power consumption,
etc. In this paper we also focused on applications of those memory cells
based on their characteristics. This paper presents the appropriate choice
for selecting memory circuit with the read-write speed, capacity, power
consumption.

Keywords: Semiconductor memories, Volatility, Flash memory, memory

cell, digital.

INTRODUCTION non-volatile memory (which holds its data

Semiconductor memory cells are capable
of storing large quantities of digital
information, essential to all
systems. It is an essential element of
today's technical world. With the rapid
growth in the requirement
semiconductor memories there have been
many types of memory that have emerged.
There are basically two types of memory
such as Volatile memory (which maintains
its data while the device is powered) and
even if the power is turned off). (See
Figure:-1)
digital
VOLATILE MEMORY
Volatile memory needs power to maintain
for the stored information; it retains its
contents while powered on but when the
power is interrupted, the stored data is
quickly lost. Volatile memory has many
uses including as primary storage

34 Page 34-44 © MANTECH PUBLICATIONS 2019. All Rights Reserved

 International Journal of VLSI Design, Microelectronics and Embedded
System
Volume 4 Issue 1

In addition to usually being faster than information, as it becomes unavailable on

forms of mass storage such as a hard disk power-down.[4]
drive, volatility can protect sensitive

Figure:-1

A. Dynamic Random Access Memory

Dynamic random-access memory is a type of random access semiconductor memory that
stores each bit of data in a different capacitor within an integrated circuit. The capacitor can
either be charged or discharged; these two states are used to represent the two values of a bit,
conventionally called 0 and 1.

Figure:-2

35 Page 34-44 © MANTECH PUBLICATIONS 2019. All Rights Reserved

 International Journal of VLSI Design, Microelectronics and Embedded
A typical 1-bit DRAM cell is shown in
Figure 2. The capacitor CS stores the
charge for the cell. Transistor M1 gives the
R/W access to the cell. CB is the
capacitance of the bit line per unit length.
Memory cells are etched onto a silicon
wafer in an array of columns (bit lines)
and rows (word lines).
The intersection of a bit line and word line
constitutes the address of the memory cell.
DRAM works by sending a charge through
the appropriate column (CAS) to activate
the transistor at each bit in the column.
When writing, the row lines contain the
state the capacitor should take on. When
reading, the sense amplifier determines the
level of charge in the capacitor if it is more
than 50%, it reads it as "1"; otherwise it
reads it as "0".
One of the problems with this arrangement
is that capacitors do not hold their charge
indefinitely as there is some leakage across
the capacitor. It will not be acceptable for
the memory to lose its data, and to
overcome this problem the data is
periodically refreshed. The data is sensed
and written and it then ensures that any
leakage is overcome, and the data is re-
instated. Due to its need of a system to
refreshing, DRAM has more complexed
circuitry and timing requirements than
36 Page 34-44 © MANTECH PUBLICATIONS 2019. All Rights Reserved
System
Volume 4 Issue 1
SRAM, but it is much more widely used.
The advantage of DRAM is the structural
simplicity of its memory cells: only one
transistor and a capacitor are required.
This allows DRAM to reach very high
densities, making DRAM much cheaper
per bit. The transistors and capacitors used
are extremely small; billions can fit on a
single memory chip. Due to the dynamic
nature of its memory cells, DRAM uses
relatively large amounts of power.[3]
B. Static Random Access Memory
Static random-access memory is a type of
semiconductor memory that uses bistable
latching circuitry (flip-flop) to store each
bit. SRAM exhibits data remanence, but it
is still volatile in the conventional sense
that data is eventually lost when the
memory is not powered.
Fig. 2 – 6T SRAM cell
 International Journal of VLSI Design, Microelectronics and Embedded
6T-SRAM cell is shown in fig 2. SRAM
takes 6 transistors to store a 1 bit. It has
three input ports (BL, BL bar, WL) and
two output ports (Q,Qbar). In Fig. M5 and
M6 are access transistors, M2 and M4 pull
up, M1 and M3 are pull down transistors.
SRAM has basic three operations.
Hold operation: For Hold Operation both
access transistors must be turned OFF
(M5=M6=0). Due to presence of latching
element SRAM hold its state.
Read Operation: For Read operation both
bit lines (BL, BL bar) must be precharged
to VDD and access transistors must be turn
on (M5=M6=1). Based data value stores
any one of bit line is discharge and the
voltage difference between two bit lines is
sensed by sense amplifier and we are able
to detect what is present in memory.
Write Operation: The data which we want
to write in the memory is given to bit line
and access transistors are turn
on(M5=M6=1) and we are able to write
the data.
In one memory bit there are 6 transistors
of SRAM which makes the SRAM bulky.
It needs the more space for the storage
purpose. the speed of the SRAM is much
faster than the DRAM as they are not
37 Page 34-44 © MANTECH PUBLICATIONS 2019. All Rights Reserved
System
Volume 4 Issue 1
needed to be refreshed and due to their
latching arrangement. Due to its high
speed the SRAM is also used as the cache
memory and also the main memory in the
servers for providing the best performance
to the users.[3]
NON-VOLATILE MEMORY
A drawback of volatile memory structures
such as DRAM and SRAM is that the
stored data is lost in the absence power
supply. To overcome this problem, various
types of non-volatile memory have been
proposed. Non-volatile memory (NVM) is
a type of computer memory that has the
ability to hold saved data even if the power
is turned off. Unlike volatile memory,
NVM does not require its memory data to
be periodically refreshed. It is commonly
used for secondary storage or long-term
consistent storage. Non-volatile memory is
highly popular among digital media; it is
widely used in memory chips for USB
memory sticks and digital cameras. Non-
volatile memory eradicates the need for
relatively slow types of secondary storage
systems, including hard disks.[4]
Read Only Memory
Read-only memory (ROM), also known as
firmware, is an integrated circuit
programmed with specific data when it is
manufactured. ROM chips are not only
 International Journal of VLSI Design, Microelectronics and Embedded
System
Volume 4 Issue 1

used in computers, but in most other B. Programmable Read Only Memory

electronic items as well. ROM-memory PROM is read-only memory that can be
does not allow for deletion; it cannot be modified only once by a user. The user
overwritten by the user's program buys a blank PROM and enters the desired
commands. Therefore, all programs and contents using a PROM program. Inside
data are supposed to be in the ROM to be the PROM chip, there are small fuses
installed through the production process. which are burnt open during programming.
This is done using a "ROM-Mask" which It can be programmed only once and is not
contains all the data and is used during the erasable.[2]
processing of the silicon chip.
C. Erasable Programmable Read Only
Memory
An EPROM is erased by shining
ultraviolet light on the cells through a
transparent window in the package. The
UV radiation renders the oxide slightly
conductive by direct generation of an
electron-hole pair in the material. The
erasure process is slow and can take from
Fig. 3- ROM array
seconds to several minutes, depending on
the intensity of the UV source.
At first sight, the limitation of the
Programming takes several (5-10)
irreversible writing process seems to be a
microseconds / word. Another problem
disadvantage. But it also discourages
with the process is limited endurance, that
potential attackers to modify the program
is, the number of erase / program cycles
code on less secure chip cards.
are generally limited to maximum of 1000,
mainly due to UV erase procedure.
The two different types of implementation
Reliability is also an issue. The device
of ROM array are –
threshold may vary with repeated
 NOR based ROM array
programming cycles. Most EPROM
 NAND based ROM array
memories therefore contain an on-chip
circuitry to control the value of the
thresholds within a specified range during

38 Page 34-44 © MANTECH PUBLICATIONS 2019. All Rights Reserved

 International Journal of VLSI Design, Microelectronics and Embedded
programming. Finally, the injection always
entails a large channel current, as high as
0.5mA at a control gate voltage of 12.5V.
This causes high power dissipation during
programming. The EPROM cell
extremely simple and dense, making it
possible to fabricate large memories at a
low cost. EPROMs were therefore
attractive in applications that do not
require regular programming. Due to cost
and reliability issues, EPROMs have fallen
out of favor and have been replaced by
Flash Memories. [2]
D. Electrically Erasable Programmable
Read Only Memory
These memory devices are used in
computers and other electronic devices to
store a small amount of data that needs to
be saved when the power supply is
removed. The contents of the EEPROM
are erased by exposing it to an electrical
charge. The EEPROM data is stored and
removed by 1 byte of data at a time. The
EEPROM does not need to be modified.
The changing of the content does not
require additional equipment. The modern
EEPROM allows multi-byte page
operations and has limited life. The
EEPROM can be designed for 10 to 1000
write cycles. When the number of write
operations is completed, the EEPROM
stops working. EEPROM is a storage
39 Page 34-44 © MANTECH PUBLICATIONS 2019. All Rights Reserved
System
Volume 4 Issue 1
device that can be implemented with fewer
standards in cell design. The more
common cell is composed of two
transistors. The storage transistor has a
is floating gage similar to the EPROM. The
EEPROM has two families which are
serial EEPROM and parallel EEPROMs.
The parallel EEPROM is faster and cost
effective than serial memory.[2]
E. Flash Memory
The flash memory is the most widely used
device for electronics and computer
devices. The flash memory is among the
special types of memory that can be erased
and programmed with a block of data. The
flash memory keeps its data even with no
power at all. The flash memory is popular
because it works fast and efficiently than
EEPROM. The flash memory module is
designed for about 100000 -10000000
write cycles. The main constraint with the
flash memory is number of times data can
be written to it. The data can be read from
flash memory as many times as desired,
but after a certain number of write
operations, it will stop working.[1]
 International Journal of VLSI Design, Microelectronics and Embedded
System
Volume 4 Issue 1

NOR BASED

Fig. 4 - NOR cell configuration

Table 1 – Bias conditions of the NOR cells for erase, programming and read operation
Operation
Signal Erase Programming Read
Bit line 1 Open 6V 1V
Bit line 1 Open 0V 0V
Source line 12V 0V 0V
Word line 1 0V 0V 0V

Word line 2 0V 12V 5V

Word line 3 0V 0V 0V

Fig 6 and table 1 show the NOR cell configuration and bias conditions for erase,
programming and read operations, respectively. The NOR cell uses the F-N tunneling
mechanism for the erase operation and the hot-electron injection mechanism for the
programming operation.[1]

40 Page 34-44 © MANTECH PUBLICATIONS 2019. All Rights Reserved

 International Journal of VLSI Design, Microelectronics and Embedded
System
Volume 4 Issue 1

NAND BASED
Table 2 – Bias conditions of the NAND cells for erase, programming and read operation
Operation

Signal Erase Programming Read

Bit line 1 Open 0V 1V

Bit line 1 Open 0V 1V

Select line 1 0V 5V 5V

Word line 1 0V 10V 5V

Word line 2 0V 10V 5V

Word line 3 0V 10V 5V

Word line 4 0V 10V 5V

Word line 5 0V 20V 0V

Word line 6 0V 10V 5V

Word line 7 0V 10V 5V

Word line 8 0V 10V 5V

Source line 2 Open 0V 5V

Source line 20V 0V 0V

p-well 2 20V 0V 0V

n-sub 20V 0V 0V

41 Page 34-44 © MANTECH PUBLICATIONS 2019. All Rights Reserved

 International Journal of VLSI Design, Microelectronics and Embedded
System
Volume 4 Issue 1

Fig. 5 - Equivalent circuit of the 8 bit NAND cell

Equivalent circuit of the 8 bit NAND cell structure is shown in fig 6. Bias conditions for
erase, programming and read operations are shown in table 2. The NAND cell uses an F-N
tunneling mechanism for the erase operation.[1]

RESULT & CONCLUSION

Table 3 – Comparison
Memory Type

Parameter DRAM SRAM

Cell Structure 1T-1C 6T

Cell Density High Low

Power consumption High High/Low

42 Page 34-44 © MANTECH PUBLICATIONS 2019. All Rights Reserved

 International Journal of VLSI Design, Microelectronics and Embedded
System
Volume 4 Issue 1

Read Speed ~50 ns ~10/70 ns

Write Speed ~40 ns ~5/50 ns

Cost Low High

Application Main Memory Cache/PADs

Memory type

Parameter EPROM EEPROM FLASH

Cell structure 1T 2T 1T

Cell Density High Low High

Power consumption Low Low Low

Read speed ~50 ns ~50 ns ~50 ns

Write speed ~10 µs ~5 ms ~(10 ns-1ms)

Cost Low High Low

Application Game machines Id card Memory card solid

state disk

We have analyzed different types of
memory cells in digital VLSI. Each type of
memory has its own special
characteristics. Memory circuits are very
important in analysis of low power circuits
[5]. For example, DRAM has features of
high density and fast speed and is used in
main memory. SRAM is used as the cache
memory due to its high speed. Drawback
of volatile memory is that stored data in
memory is lost when power is turned off,
to overcome this problem ROM came into
picture. Due to cost and reliability issues
of EPROM, they have fallen out of favor
and have been replaced by Flash
Memories. NAND flash is used for data
storage due to non-volatility and high
density while NOR flash is used for code
storage due to non-volatility and fast
random access speed. So we can conclude
that each memory cell has its own
advantages and area in which it may be
used.

43 Page 34-44 © MANTECH PUBLICATIONS 2019. All Rights Reserved

 International Journal of VLSI Design, Microelectronics and Embedded
System
Volume 4 Issue 1

REFERENCES IV. “Power optimization for Low

I. „CMOS Digital Integrated Power VLSI circuits” by Sumita
Circuit‟,by Sung-Mo Kang $th Gupta, Sukanya Padavein
edition Mc Graw Hill international Journal of advanced
research in Computer science &
II. NPTEL Electronics & software Engineering Volume 6
Telecommunication ,module issue 3
6,Lecture 26,27,28 „comparative
study of technology in Cite this Article
semiconductor memories –A Tanvi Upaskar, Ganesh Thorave, Prof.
review‟-IICE2016 Sumita G, Mayuresh Yerandekar,
Siddhesh Mahadik (2019). Analysis of
Various Memory Circuits Used In
III. „A study of semiconductor memory Digital VLSI International Journal of
VLSI Design, Microelectronics and
technology by comaring volatile
Embedded System, 4 (1), 34- 44
and non volatile memories‟ by
http://doi.org/10.5281/zenodo.2652717
Hamsa S.

AUTHORS’ PROFILE
[1] Tanvi Upaskar, Student
Department: Electronics & Telecommunication Engineering
College: K C College of Engineering and Management Studies Thane, India

[2] Ganesh Thorave, Student

Department: Electronics & Telecommunication Engineering
College: K C College of Engineering and Management Studies Thane, India

[3] Prof. Sumita G, Assistant Professor

Department: Electronics & Telecommunication Engineering
College: K C College of Engineering and Management Studies Thane, India

[4] Mayuresh Yerandekar, Student

Department: Electronics & Telecommunication Engineering
College: K C College of Engineering and Management Studies Thane, India

[5] Siddhesh Mahadik, Student

Department: Electronics & Telecommunication Engineering
College: K C College of Engineering and Management Studies Thane, India

44 Page 34-44 © MANTECH PUBLICATIONS 2019. All Rights Reserved

 International Journal of VLSI Design, Microelectronics and Embedded
System
Volume 4 Issue 1

45 Page 34-44 © MANTECH PUBLICATIONS 2019. All Rights Reserved

 International Journal of VLSI Design, Microelectronics and Embedded
System
Volume 4 Issue 1

46 Page 34-44 © MANTECH PUBLICATIONS 2019. All Rights Reserved