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TABLE OF CONTENTS
ORGANISATIONAL COMPONENT
7. GENERAL..................................................................................................................................... 8
STUDY COMPONENT
5. PRACTICALS ............................................................................................................................ 16
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ORGANISATIONAL COMPONENT
This guide serves as Part 2 of the study guide for this module and provides content that is specific to
the learning content of the module. Part 1 of the study guide is available from the EECE Undergraduate
ClickUP page and provides rules and policies that are generally applicable to all undergraduate
modules presented by the Department of Electrical, Electronic and Computer Engineering.
You are expected to participate in discussions during lectures and tutorial classes. As your fellow
students are dependent on the inputs you make, your participation is crucial. Since the number of
contact hours for this module is limited, you are also expected to dedicate adequate time to self-study,
the practical assignments and the completion of tutorials.
In recent years, digital signal processing has continued to have an increasing impact in many key areas
of technology, including telecommunication, digital television, media, biomedicine, digital audio and
instrumentation. It is now at the core of many new and emerging digital products and applications in
the information society, e.g. digital cellular phones and digital cameras. As such, the need for
electronic, computer and communication engineers to be competent in digital signal processing is
constantly growing. In this module, skills are developed which will enable the learner to effectively
analyse, design and implement common DSP algorithms and approaches. An additional skill that will
also be sharpened during this module is the effective utilisation of simulation software tools such as
Octave/Python/Matlab and C/C++ as well as programming tools related to the provided DSP module.
This module is presented at exit level for ELO 2, and developmental level for ELOs 3 and 8.
Refer to the General EECE Study Guide (Part 1) for a complete overview of the association of ECSA
outcomes with the modules in each degree program.
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3. LECTURERS, VENUES AND CONSULTING HOURS
Name Room number and building Telephone numbers and E-mail
address
G.E. Carlson, Signals and Linear System Analysis, Second Edition, John Wiley & Sons, Inc., 1998
R.E. Ziemer, W.H. Tranter, D.R. Fannin, Signals and Systems: Continuous and Discrete, Collier-
Macmillan, 1993
A.V. Oppenheim, R.W. Schafer, Discrete-time Signal Processing, Prentice-Hall International, 1989
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S. W. Smith, The Scientist and Engineer's Guide to Digital Signal Processing, Newnes, 1997,
Available at: http://www.DSPguide.com
There are a lot of relevant materials on the Internet and books in the library. Students will be expected
to make use of these sources to complete their tasks.
4.4. Components
Each student will receive a STM32F429 Discovery Board of which the cost has been recovered from
his/her class fees as well as other common circuit components needed to complete practicals.
5. LEARNING ACTIVITIES
5.1. Contact time and learning hours
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5.2. Lectures
Lectures are presented in a style of co-operative and student-centred learning. Lecture content and
structure will be based on the prescribed and recommended study material. Note, however, that
various problems and examples that are not in the textbook will be discussed during lectures.
Attendance of lectures is compulsory and register of attendance may be taken. Student can be
deregistered from this module if they do not need minimum class attendance criteria. Important
announcements with respect to laboratory sessions, assignments, tutorials and discussions of test
content will be made during lecture times. Students need to take note that only selected components
of content, assessments and arrangements delivered in face-to-face lectures will be made available
online, e.g. announcements regarding tests, assignments, memoranda (optional), lecture notes
(optional), etc. Lecturers are not obliged to publish all content delivered during lectures online as a
hybrid teaching and learning strategy will be followed where a significant component of the teaching
and learning activities is face-to-face.
Please note that lectures that cover the practical component of the module are considered as part of
the practical component of the course and attendance of these lectures is thus compulsory.
In this module a number of hybrid approaches to teaching and learning will be followed.The use of
each in the module will be discussed and explained during lecture periods. Hybrid tools that will be
used include:
This list may be expanded during the semester if additional suitable hybrid teaching and learning tools
are discovered.
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Each practical will have a one hour pre-practical lecture 3-4 weeks before the scheduled demo.
All other scheduled practical sessions can be used as open sessions, where students can work on
their own towards the relevant practical.
Practical guides for Practicals 1, 2, and 3 will be published on the module website.
Practical 3 is specifically aimed at solving a unique real-life problem which may proof difficult to
solve if incorrect engineering judgement / poor software routines etc. are implemented. Students
are evaluated according to the engineering process that they followed and engineering
judgement executed.
Working in groups, with a maximum of three members, three practical assignments must be
completed and demonstrated during the semester. Practical 3 design and reporting should be
completed on an individual basis in order to test individual mastering of the relevant skills.
Demonstration will be in group format, where the group decides which student’s design to
demonstrate.
A full report describing your theoretical design, simulations, experimental setup, software
routines, measured results, discussion, conclusion, program code etc., will be required for each
practical assignment. The pre-report can be used as the starting point for the full-report (adding
measured results, discussion, conclusion etc.)
The final mark for each practical assignment will consist of a mark for the report (pre-report
and/or full), demonstration and lab book.
Keeping a laboratory notebook ("lab book") as described in the practical guide is compulsory. The
lab book will be assessed as part of the mark for each practical.
You may make use of your textbook and other resources on the web or in the library, excluding a
consultant. If you make use of program sections on the web or other sources, you must provide a
complete reference to each source. If there is suspicion that any part(s) of the work has been copied
from another student’s work or from another source, a mark of zero will be awarded. Please refer to
the plagiarism warning Part 1 of the guide. According to the University's regulations the lecturer is
obliged to charge guilty students with dishonesty that may lead to suspension. You will be required
to sign the following declaration on the front page of your assignments:
I, name and surname, hereby declare that the work herewith is completely my own and that no
parts have been copied in anyway from current or previous students or other sources.
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The practical sessions are compulsory: failure to attend and satisfactorily complete any practical
session (and specifically Practical 3) will deny you permission to write the final examination. No
redemonstrations will be allowed, so make sure that you are well prepared for every
demonstration. This also means that you have to allow enough time (use your time effectively) in
order to be ready for demonstration.
Please consult the EECE Undergraduate ClickUP website for general procedures regarding the practical
sessions, such as the laboratory rules and after-hours access to the labs.
Practicals in this module are demonstrated in groups (but students should still do designs, as well as
master the programming skills related to the STM32F429, on their own). In case all of a student's
group members deregister and he/she is unable to join another group, the following will apply:
The fall-back strategy will exclude the first practical as all students should be able to find a
group to join or will be placed in groups at the start of the semester.
Students need to inform the lecturer / assistant lecturer as soon as it becomes known that a
practical group is disintegrating. Single students will be moved to alternative groups a.s.a.p.
The fall-back strategy does not apply to students who choose to work individually at the start of the
semester (if the option is allowed).
6. RULES OF ASSESSMENT
Also see the examination regulations in the Year Books of the Faculty of Engineering, Built
Environment and Information Technology (Part 1: Engineering).
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6.1. Requirements, subminima and calculation of marks
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6.2.Assessment details
Semester tests
Two tests of 90 minutes each will be written during the scheduled test weeks of the School of
Engineering. The will be fill-in papers. Dates, times and venues will be announced as soon as the
timetables become available.
Examinations
Examination will be OPEN book, but may not contain any written notes, memos, tutorials etc.
7. GENERAL
Refer to the general Part 1 of the study guide for procedures, policies and rules about absence from
formal evaluation opportunities and practical sessions, grievance procedures, academic dishonesty
and plagiarism.
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STUDY COMPONENT
Digital signal processing algorithms and procedures that are focussed on in this module include: The
discrete Fourier transform (DFT), fast Fourier transform (FFT), cyclic convolution and correlation,
overlap-and-add, as well as overlap-and-store procedures. Attention will also be given to the analysis
and design of finite impulse response (FIR), infinite impulse response (IIR) and adaptive digital filters.
These algorithms and procedures will be implemented, both in software simulation and on selected
DSP platforms.
A secondary objective of the course is the development of system simulation skills. Although there
will be strong focus on the mastering of Octave/Python/Matlab as tools in the analyses and simulation
of digital signal processing systems, the student will also be exposed to other software tools such as
C/C++ and specific platform’s IDEs.
In order to achieve the objectives, attendance of, and meaningful participation during lectures,
practical sessions and tutorial classes are essential. Furthermore, students are advised to embark on
a well-structured and systematic study program, in which the module material is studied in a probing,
scientific and innovative manner, rather than by simple and passive memorizing. On average, about
6 hours own study time per week should be devoted to the module.
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ECSA ELO 5: (developmental level)
Engineering methods, skills and tools, including information technology
The student must demonstrate competence
to efficiently use DSP programming software to program the hardware;
to be able to do fault finding in programs using emulators and stepped execution.
3. Application 25
4. Analysis 25
** Assessment of “other skills”:
5. Synthesis 10 Practical skills
Technical communication
6. Evaluation 10 Team working skills
Time management
7. Other skills** 20
2. MODULE STRUCTURE
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3.2 Convolution classes, tutorials,
3.3 DSP Implementation self-study
4. Digital Filters Lectures and class 34 14
4.1 Digital Filter Design Framework discussions, tutorial
4.2 FIR Filter Design classes, tutorials,
4.3 IIR Filter Design self-study
4.4 Adaptive Digital Filters
5. DSP Hardware Lectures and class 20 6
5.1 General Purpose DSP Hardware discussions, tutorial
5.2 Special Purpose DSP Hardware classes, tutorials,
5.3 Effects of Finite Word Lengths self-study
5.4 Applications and Design Studies
Revision Lectures and class 7 3
discussions, self-
study
Practical Assignments Practical sessions, 55 18
Practical 1 simulations,
Practical 2 demonstrations,
Practical 3 reports
160 60
The given learning outcomes for each study theme are essential to achieve the critical learning
outcomes as set out in Section 1.4.
The title of the study unit and references to appropriate study material are given here. The study of
the referenced study material is regarded as the minimum required to achieve the learning outcomes
satisfactorily.
Here information is given about exercises and problems related to the study material which should be
attempted and which is in accordance with the criteria of assessment of the study theme.
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1.1.4 Assignments for assessment
Here information is given about assignments to be submitted for marking and assessment.
Refer to the section on cognitive level of assessment in the General EECE Study Guide.
The list of criteria of assessment for a study theme and its accompanying envisaged learning outcomes
should contain statements applicable to all six levels of thinking. Accordingly, students will be
evaluated in terms of a mix of all six levels of thinking skills. On the first-year level, a larger proportion
of questions will be based on the lower levels (levels 1 to 3), whilst final-year examinations will contain
a larger proportion of questions based on the higher-level thinking skills (levels 4 to 6).
b) Study units
1. Introduction: Ifeachor, Chapter 1
2. Analogue Interfaces for DSPs: Ifeachor, Chapter 2
(See the ESP411 website for more detail)
c) Self-study activities
All examples in the applicable study material.
(See the ESP411 web site for more detail)
d) Criteria of assessment
At the end of this study theme, a student will be able to:
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illustrate and apply oversampling in D/A conversion,
describe the constraints of real-time signal processing with analog input/output signals.
b) Study units
1. Fourier Series: Ifeachor, Chapter 3
2. Discrete Fourier Transform: Ifeachor, Chapter 3
3. Fast Fourier Transform: Ifeachor, Chapter 3
4. The z-Transform: Ifeachor, Chapter 4
(See the ESP411 web site for more detail)
c) Self-study activities
All examples in the applicable study material.
(See the ESP411 web site for more detail)
d) Criteria of assessment
At the end of this study theme, a student will be able to:
calculate and interpret the Fourier series and transform of continuous and discrete time signals,
calculate and interpret the DFT and inverse DFT of discrete time signals,
derive, understand and apply the properties of the DFT,
determine the computational complexity of the DFT,
calculate and interpret the FFT and inverse FFT of discrete time signals,
implement the FFT using decimation-in-time and decimation-in-frequency methods,
describe several other discrete transforms such as the discrete cosine transform, Walsh transform,
Hadamard transform and wavelet transforms,
describe and apply the z-transform to discrete time signals and systems,
calculate the inverse z-transform using the power series, partial fraction and residue methods,
describe and apply the properties of the z-transform,
understand and list several applications of the z-transform in signal processing.
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STUDY THEME 3 - Correlation and Convolution
a) Learning outcomes
At the end of this study theme, the student will:
understand the nature of the correlation process, including cross- and autocorrelation,
have knowledge of the attenuating effects of correlation on the noise content of signals,
be able to describe the utilization of the FFT in the fast correlation process,
be able to calculate and interpret the convolution process,
be able to apply circular, linear, fast linear and sectioning convolution methods,
understand and be able to apply deconvolution,
understand the relationship between convolution and correlation.
b) Study units
1. Correlation: Ifeachor, Chapter 5
2. Convolution: Ifeachor, Chapter 5
3. DSP Implementation: Ifeachor, Chapter 5
(See the ESP411 web site for more detail)
c) Self-study activities
All examples in the applicable study material.
(See the ESP411 web site for more detail)
d) Criteria of assessment
At the end of this study theme, a student will be able to:
calculate and interpret cross- and autocorrelation functions, as well as fast correlation,
list applications of correlation,
derive, understand and apply the properties of convolution,
apply the circular, linear and sectioning convolution methods,
employ the convolution process in the identification of linear systems,
determine and interpret the deconvolution process,
understand and apply the overlap-and-add and overlap-and-save methods during convolution,
understand the relationship between convolution and correlation,
implement correlation and convolution in software.
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understand and be able to calculate the influence of finite word lengths on the performance
digital filters.
b) Study units
1. Digital Filter Design Framework: Ifeachor, Chapter 6
2. FIR Filter Design: Ifeachor, Chapter 7
3. IIR Filter Design: Ifeachor, Chapter 8
4. Adaptive Digital Filters: Ifeachor, Chapter 10
(See the ESP411 web site for more detail)
c) Self-study activities
All examples in the applicable study material.
(See the ESP411 web site for more detail)
d) Criteria of assessment
At the end of this study theme, a student will be able to:
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be able to apply techniques to combat errors caused by quantization and finite wordlengths,
have knowledge of some low-cost DSPs currently available,
be able to describe a number of real-world DSP applications.
b) Study units
1. General Purpose DSP Hardware: Ifeachor, Chapter 12
2. Special Purpose DSP Hardware: Ifeachor, Chapter 12
3. Effects of Finite Word Lengths: Ifeachor, Chapter 13
4. Applications and Design Studies: Ifeachor, Chapter 14
(See the ESP411 web site for more detail)
c) Self-study activities
All examples in the applicable study material.
(See the ESP411 web site for more detail)
d) Criteria of assessment
At the end of this study theme, a student will be able to:
describe computer architectures for signal processing, including Harvard architectures, pipelining,
multiplier-accumulator hardware, special instructions and extended parallelism,
describe general-purpose fixed-point and floating point DSPs,
select digital signal processors,
implement digital signal processing algorithms, such as FIR filters, IIR filters, FFTs and adaptive
filters on general-purpose DSPs,
describe special-purpose digital filter and FFT DSPs,
understand the difference between fixed-point and floating point DSP arithmetic,
understand the effect of A/D quantization noise on signal quality,
describe and calculate the effects of finite wordlengths and product roundoff errors in IIR filters,
describe and calculate the effects of finite wordlengths in the FFT algorithm,
list and describe several DSP evaluation boards manufactured by Motorola and Texas Instruments,
list and describe several DSP applications.
4. PRACTICALS
Three practical assignments must be completed and demonstrated as explained earlier in this
document. The practical guides will be published on the module website and form part of the study
guide for this module.
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