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6-Channel Audio Processor IC PRELIMINARY PT2322

DESCRIPTION
PT2322 is a 6-Channel Audio Processor IC utilizing CMOS Technology specially designed for audio
applications. 6-channel individual input, 6-channel master volume control, 6-channel individual volume
trim control, 3-band tone control (treble, middle, and bass), mute function, 3D effect function, tone
defeat function are all built into a single chip having the highest performance and reliability with the
least components. Furthermore, the pin assignments and application circuit are optimized for easy PCB
Layout and cost saving benefits. Housed in 28 pins, DIP or SO Package, PT2322 is the ultimate answer
to your every audio system needs.

FEATURES
• Very Low Power Consumption (DC=9V)
• I2 C Bus Control
• 6-Channel Individual Input
• 6-Channel Master Volume Control: 0 to -79 dB (1 dB/step)
• 6-Channel Individual Output TRIM Volume Control: 0 to -15 dB (1dB/step)
• 3-Band Tone Control (Treble, Middle, Bass): + 14dB , 2dB/step
• Mute Function
• 3D Effect Function
• Tone Defeat Function
• Low Noise
• High Channel Separation
• Low Harmonic Distortion
• Least External Components
• Easy to Use
• Available in 28-pin, DIP or SO Package

APPLICATIONS
• Audio/Video System
• Multi-Media Speakers
• TV System
• PC Audio
• AC3 Amplifier System

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6-Channel Audio Processor IC PRELIMINARY PT2322

BLOCK DIAGRAM

IN_SUB
IN_CT

IN_SR

IN_FR
IN_FL

IN_SL

VR EF
GN D
11

10

6
5

4
FL SL CT SUB SR FR

6-CHANNEL
VOLUME CONTROL
&
MUTE

12 3
CTRE_FL
CTRE_FR
CO NTR OL

C ON TR OL

13 2
T ONE

RCMID1_FL RCMID1_FR
T ONE

14 1
RCMID2_FL RCMID2_FR
15 28
RCBAS1_FL RCBAS1_FR
16 27
RCBAS2_FL RCBAS2_FR
TONE TONE
CONTROL CONTROL
TONE TONE
ON
DEFEAT DEFEAT ON 26
GND
3D 3D IC 2

CONTROL 25
SDA
UNIT
6-CHANNEL OUTPUT
VOLUME TRIM
19
20
21
22
23

24
17
18
OU T_FL
OU T_SL
O UT _CT

SCL
VCC
OU T_SUB
O UT _SR
O UT _FR

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6-Channel Audio Processor IC PRELIMINARY PT2322

PIN CONFIGURATION

RCMID2_FR 1 28 RCBAS1_FR
RCMID1_FR 2 27 RCBAS2_FR
CTRE_FR 3 26 GND
IN_FR 4 25 SDA
IN_SR 5 24 SCL
IN_SUB 6 23 OUT_FR
VREF 7 22 OUT_SR
GND 8 21 OUT_SUB
IN_CT 9 20 VCC
IN_ST 10 19 OUT_CT
IN_FL 11 18 OUT_SL
CTRE_FL 12 17 OUT_FL
RCMID1_FL 13 16 RCBAS2_FL
RCMID2_FL 14 15 RCBAS1_FL

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6-Channel Audio Processor IC PRELIMINARY PT2322

PIN DESCRIPTION
Pin Name I/O Description Pin No.
RCMID2_FR - Right Channel Tone Component Pin (note 4) 1
RCMID1_FR - Right Channel Tone Component Pin (Note 4) 2
CTRE_FR - Right Channel Tone Component Pin (note 6) 3
IN_FR I Front Right Input Pin 4
IN_SR I Rear Right Channel Input Pin 5
IN_SUB I Subwoofer Channel Input Pin 6
VREF - Reference Voltage 7
GND - Ground 8, 26
IN_CT I Center Channel Input Pin 9
IN_SL I Rear Left Channel Input Pin 10
IN_FL I Front Left Channel Input Pin 11
CTRE_FL - Left Channel Tone Component Pin (note 1) 12
RCMID1_FL - Left Channel Tone Component Pin (note 2) 13
RCMID2_FL - Left Channel Tone Component Pin (note 2) 14
RCBAS1_FL - Left Channel Tone Component Pin (note 3) 15
RCBAS2_FL - Left Channel Tone Component Pin (note 3) 16
OUT_FL O Front Left Channel Output Pin 17
OUT_SL O Rear Left Channel Output Pin 18
OUT_CT O Center Output Channel Pin 19
VCC - Positive Power Supply 20
OUT_SUB O Subwoofer Channel Output Pin 21
OUT_SR O Rear Right Channel Output Pin 22
OUT_FR O Front Rear Channel Output Pin 23
SCL I I2 C Control Bus Clock Input 24
SDA I I2 C Control Bus Data Input Pin 25
RCBAS2_FR - Right Channel Tone Component Pin (note 5) 27
RCBAS1_FR _ Right Channel Tone Component Pin (note 5) 28

Notes: 1. CTRE_FL 2. RCMID1_FL RCMID2_FL 3. RCBAS1_FL RCBAS2_FL 4. RCMID1_FR RCMID2_FR 5. RCBAS1_FR RCBAS2_FR 6. CTRE_FR

C1 C2 C1 C2 C1 C2 C1 C2

Rmid Rbass Rbass

Rmid

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6-Channel Audio Processor IC PRELIMINARY PT2322

FUNCTIONAL DESCRIPTION
Bus Interface

Data are transmitted to and from the microprocessor to the PT2322 via the SDA and SCL. The SDA
and SCL make up the BUS Interface. It should be noted that the pull-up resistors must be connected to
the positive supply voltage.

Data Validity

A data on the SDA Line is considered valid and stable only when the SCL Signal is in HIGH State.
The HIGH and LOW States of the SDA Line can only change when the SCL signal is LOW. Please
refer to the figure below.

SDA

SCL

Start and Stop Conditions

A Start Condition is activated when 1) the SCL is set to HIGH and 2) SDA shifts from HIGH to LOW
State. The Stop Condition is activated when 1) SCL is set to HIGH and 2) SDA shifts from LOW to
HIGH State. Please refer to the timing diagram below.

SCL

SDA

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6-Channel Audio Processor IC PRELIMINARY PT2322

Byte Format

Every byte transmitted to the SDA Line consists of 8 bits. Each byte must be followed by an Acknowl-
edge Bit. The MSB is transmitted first.

Acknowledge

During the Acknowledge Clock Pulse, the master (µP) puts a resistive HIGH level on the SDA Line.
The peripheral (audio processor) that acknowledges has to pull-down (LOW) the SDA line during the
Acknowledge Clock Pulse so that the SDA Line is in a Stable Low State during this Clock Pulse. Please
refer to the diagram below.

SCL

SDA

The audio processor that has been addressed has to generate an Acknowledge after receiving each byte,
otherwise, the SDA Line will remain at the High Level during the ninth (9th) Clock Pulse. In this case,
the master transmitter can generate the STOP Information in order to abort the transfer.

Transmission without Acknowledge

If you want to avoid the acknowledge detection of the audio processor, a simpler µP transmission may
be used. Wait one clock and do not check the slave acknowledge of this same clock then send the new
data. If you use this approach, there are greater chances of faulty operation as well as decrease in noise
immunity.

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6-Channel Audio Processor IC PRELIMINARY PT2322

Interface Protocol

The interface protocol consists of the following:

· A Start Condition
· A Chip Address Byte including the PT2322 address. The 8th Bit of the Byte must be “0”. PT2322
must always acknowledge the end of each transmitted byte.
· A Data Sequence (N-Bytes + Acknowledge)
· A Stop Condition

Please refer to the diagram below:

PT2322 Address

Software Specification

PT2322 ADDRESS

PT2322 Address is shown below.

1 0 0 0 1 0 0 0
MSB LSB

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6-Channel Audio Processor IC PRELIMINARY PT2322

I2C BUS START-UP TIMING

After Power is turned ON, PT2322 needs to wait for a short time in order to insure stability. This wait-
ing period is relative to the value of Cref. As the Cref value becomes bigger, the waiting time period for
PT2322 to be able to send I2 C Bus Signal effectively becomes longer.

For example, if Cref = 10µF, after power is turned ON, the waiting time period for PT2322 to send I2 C
Bus Signal is at least 300 ms. If the waiting time period is less than 300 ms, I2 C Control may fail.
Please refer to the diagram below.

POWER ON

VDD

At least 300 ms

SDA/
SCL

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6-Channel Audio Processor IC PRELIMINARY PT2322

MSB LSB FUNCTION

B7 B6 B5 B4 B3 B2 B1 B0
0 0 0 0 X X X X No Function
0 0 0 1 E3 E2 E1 E0 Front Left Channel Volume TRIM Control
0 0 1 0 E3 E2 E1 E0 Front Right Channel Volume TRIM Control
0 0 1 1 E3 E2 E1 E0 Center Channel Volume TRIM Control
0 1 0 0 E3 E2 E1 E0 Rear Left Channel Volume TRIM Control
0 1 0 1 E3 E2 E1 E0 Rear Right Channel Volume TRIM Control
0 1 1 0 E3 E2 E1 E0 Subwoofer Volume TRIM Control
0 1 1 1 I1 I0 J1 J0 Function Select (see FUNC SEL Table)
1 0 0 0 x x x x No Function
1 0 0 1 G3 G2 G1 G0 Bass Tone Control
1 0 1 0 K3 K2 K1 K0 Middle Tone Control
1 0 1 1 H3 H2 H1 H0 Treble Tone Control
1 1 0 0 0 C2 C1 C0 Input SW
1 1 0 1 A3 A2 A1 A0 Master Volume Control (-1dB/Step)
1 1 1 0 0 B2 B1 B0 Master Volume Control (-10dB/step)
1 1 1 1 1 1 1 1 System Reset

Note: After power is turned ON, PT2322 must send a Code - “11000111” (C7H) - to activate Input
SW.

FUNCTION SELECT BITS

Function Select Bits are given in the FUNC SEL Table below.

I1=0 MUTE OFF I1=1 MUTE ON

I0=0 3D ON I0=1 3D OFF
J1=0 TONE CONTROL ON J1=1 TONE DEFEAT
J0=0 NO FUNCTION J0=1 NO FUNCTION

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6-Channel Audio Processor IC PRELIMINARY PT2322

MASTER VOLUME CONTROL BITS

A3 A2 (B2) A1 (B1) A0 (B0) A Attenuation B Attenuation
0 0 0 0 0 0
0 0 0 1 -1 -10
0 0 1 0 -2 -20
0 0 1 1 -3 -30
0 1 0 0 -4 -40
0 1 0 1 -5 -50
0 1 1 0 -6 -60
0 1 1 1 -7 -70
1 0 0 0 -8 x
1 0 0 1 -9 x

Note: A = -1 dB/step, B =-10 dB/step, x = ineffective

TONE CONTROL BITS

G3/K3/H3 G2/K2/H2 G1/K1/H1 G0/K0/H0 dB

0 0 0 0 -14
0 0 0 1 -12
0 0 1 0 -10
0 0 1 1 -8
0 1 0 0 -6
0 1 0 1 -4
0 1 1 0 -2
0 1 1 1 -0
1 0 0 0 +14
1 0 0 1 +12
1 0 1 0 +10
1 0 1 1 +8
1 1 0 0 +6
1 1 0 1 +4
1 1 1 0 +2
1 1 1 1 0

Note: G=Bass, K=Middle, H=Treble

PT2322 pre 1.0 Page 10 Written March 2000
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6-Channel Audio Processor IC PRELIMINARY PT2322

CHANNEL TRIM VOLUME CONTROL BITS

E3 E2 E1 E0 dB E3 E2 E1 E0 dB
0 0 0 0 0 1 0 0 0 -8
0 0 0 1 -1 1 0 0 1 -9
0 0 1 0 -2 1 0 1 0 -10
0 0 1 1 -3 1 0 1 1 -11
0 1 0 0 -4 1 1 0 0 -12
0 1 0 1 -5 1 1 0 1 -13
0 1 1 0 -6 1 1 1 0 -14
0 1 1 1 -7 1 1 1 1 -15

For example, if we set the Master Volume Control to -42 dB, the data string will be:

MSB LSB MSB LSB MSB LSB

START 1 0 0 0 1 0 0 0 ACK 1 1 1 0 0 1 0 0 ACK 1 1 0 1 0 0 10 0 ACK STOP

PT2322 ADDRESS MASTER VOLUME (-40dB) MASTER VOLUME (-2dB)

After Power is turned ON, PT2322 must send a Code--- “11000111” (C7H) to activate Input SW.

MSB LSB MSB LSB

START 1 0 0 0 1 0 0 0 ACK 1 1 0 0 0 1 1 1 ACK STOP

PT2322 ADDRESS ACTIVATE INPUT SW

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6-Channel Audio Processor IC PRELIMINARY PT2322

PT2322 TONE CONTROL FREQUENCY CURVES

+15

+10

+5

+15

+10

+5

+0

+15

+10

+5

PT2322 pre 1.0 Page 12 Written March 2000

PT2322 pre 1.0
VCC

C23 TO
22uF MICROCONTROLLER

R14 R16
3.3K 6.2K I2C DATA

I2CCLOCK

C14 C17 C18 C21 C22 DGND

2200p0.01u 0.01u 0.1u 0.1u
APPLICATION CIRCUIT

C7 U2A
6-Channel Audio Processor IC

3 FRONTL
U1A C1
FRONTL 3 IC1 PT2322 10uF R7 1
1 28 100K
RCMID2 RCBAS1_FR C8
1 R1 10uF 2 27 2 FRONTR
100K RCMID1 RCBAS2_FR
3 26
C2 CTRE_FR GND 10uF R8
FRONTR 2 4 25

Page 13
IN_FR SDA 100K
5 24 C9 U2B
R2 10uF IN_SR SCL
6 23 6 CENTER
100K IN_SUB OUT_FR
U1B 7 22
C3 VREF OUT_SR 10uF R9
CENTER 6 8 21 4
GND OUT_SUB 100K
9 20 C10
R3 10uF Cref IN_CT VCC
4 10 19 5 SUBWOOFER
100K 10uF IN_SL OUT_CT
11 18
C4 IN_FL OUT_SL 10uF R10
SUBWOOFER 5 12 17
CTRE_FL OUT_FL 100K
13 16 C11 U2C
R4 10uF RCMID1_FL
RCBAS2_FL
14 15 9 SURROUNDL
100K RCMID2_FL
RCBAS1_FL
U1C C5 10uF R11
SURROUNDL 9 7
100K
R5 10uF C12
7 8 SURROUNDR
100K
C6 10uF R12
SURROUNDR 8
100K
C13 C15 C16 C19 C20
PRELIMINARY

R6 10uF
100K 2200p0.01u 0.01u 0.1u 0.1u
RJ1074

R13 R15
3.3K 6.2K
PT2322

Written March 2000

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6-Channel Audio Processor IC PRELIMINARY PT2322

ABSOLUTE MAXIMUM RATING

Symbol Parameter Rating Unit

Vs Operating Supply Voltage 15 V
o
Tamb Operating Ambient Temperature -20 to +75 C
o
Tstg Storage Temperature -40 to +125 C

ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, Tamb=25o C, VDD=12V, RL =100 KOhms, Rg=40 Ohms, All volume
attenuations = 0dB, F=1KHz)

Symbol Parameter Test Condition Min. Typ. Max. Unit

SUPPLY
VDD Supply Voltage 5 9 12 V
Is Supply Current 25 30 35 mA
VOLUME CONTROL
Rin Input Impedance CENTER, SUB, SL, SR 43 50 52 KOhms
FL, FR
VCL Clipping Level Volume=0dB, THD=1% 4.0 Vrms
Sc Channel Separation 100 107 120 dB
Left/Right
SIN Input Separation No-weighting 75 81 85 dB
GIN Input Gain -0.5 0 +0.5 dB
Crange Control Range 79 dB
Avmin Minimum Attenuation 0 dB
Avmax Maximum Attenuation -79 dB
Sstep Step Resolution 1 dB
EA Attenuation Set Error Volume=0 to -50dB -1.5 0 +1.5 dB
GERR Channel Gain Attenuation Volume=0 to -50dB -1.5 0 +1.5 dB

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6-Channel Audio Processor IC PRELIMINARY PT2322

Symbol Parameter Test Condition Min. Typ. Max. Unit

SPEAKER ATTENUATION
Crange Control Range 15 dB
Avmin Minimum Attenuation 0 dB
Avmax Maximum Attenuation -15 dB
Sstep Step Resolution 1 dB
EA Attenuation Set Error -0.5 0 +0.5 dB
GERR Channel Gain Error Volume=0 to -15dB -0.5 0 +0.5 dB
MUTE CONTROL
AMUTE Output Mute Attenuation Input is short to GND, 85 90 95 dB
A-weighting
TONE CONTROL
TREBLE TONE CONTROL
Gt Control Range Maximum Boost/Cut +13 +14 +15 dB
Tstep Step Resolution 1.8 2.0 2.2 dB
MIDDLE TONE CONTROL
Gm Control Range Maximum Boost/Cut +13 +14 +15 dB
Mstep Step Resolution 1.8 2.0 2.2 dB
BASS CONTROL
Gb Control Range Maximum Boost/Cut +13 +14 +15 dB
Bstep Step Resolution 1.8 2.0 2.2 dB

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6-Channel Audio Processor IC PRELIMINARY PT2322

Symbol Parameter Test Condition Min. Typ. Max. Unit

MASTER VOLUME CONTROL (Including FL, FR, CENTER, SUBWOOFER, RR, RL)
THD Total Harmonic Distortion Volume=0dB 0.005 0.007 0.01 %
Input Level=200Vrms
Noise Noise Output Front Left/Right Channel 13 18 µV
A-weighted
Surround Left/Right 7 10 µV
Channel, A-weighted,
Center Channel, Subwoofer
Channel
S/N Signal to Noise Ratio 0dB=1Vrms 95 98 105 dB
A-weighting
Ro Output Impedance 400 450 Ohms
Vomax Maximum Output Front Left/Right Channel, 3.4 3.6 3.8 Vrms
Voltage THD=1%
Surround Left/Right 3.6 3.8 3.95 Vrms
Channel, Center Channel,
Subwoofer Channel,
THD=1%
Go Output Stage Gain -0.5 0 +0.5 dB
2
I C BUS CONTROL
VIL Low Level Input Voltage 2.4 2.5 V
VIH High Level Input Voltage 2.8 3.0 V
2
TINIT I C Bus Initial Time Cref=10µF 250 300 mS

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6-Channel Audio Processor IC PRELIMINARY PT2322

ORDER INFORMATION

Valid Part Number Package

PT2322 28 Pins, DIP Package (600 mil)
PT2322-S 28 Pins, SO Package (330 mil)

PACKAGE INFORMATION

28 Pins, DIP Package (600 mil)

Symbol Dimension in Mil

A 1450
B 70
C 70

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6-Channel Audio Processor IC PRELIMINARY PT2322

28 Pins, SO Package (330 mil)

A2 A1

E1

L1
e
b c
Body Lead Lead Lead Lead
Body Size Lead Stand-off
Thickness Length Width Thickness P itch
Count
D1 E1 A1 A2 L1 b c e
713 331 28 6 98 67 16 10 50

PT2322 pre 1.0 Page 18 Written March 2000