PCB stack up diagram of 8-layer motherboard

5 4 3 2 1
PCB STACK UP
CH5(S42)/HB2 BLOCK DIAGRAM 01
8L
CPU CPU THERMAL
LAYER 1 : TOP SENSOR
Penryn 14.318MHz
LAYER 2 : SGND
D D
PAGE 4
478P (uPGA)/35W
LAYER 3 : IN1 PAGE 3,4 CLK_CPU_BCLK,CLK_CPU_BCLK#
CLOCK GEN
LAYER 4 : IN2 CLK_MCH_BCLK,CLK_MCH_BCLK#
DREFCLK,DREFCLK# ICS9LPRS365BGLFT
LAYER 5 : VCC FSB 667/800/1066
DREFSSCLK,DREFSSCLK# /TSSOP64PIN
PAGE 2
LAYER 6 : IN3
LAYER 7 : SGND1
LAYER 8 : BOT
S/W CRT
DDRII 667/800 MHz
NORTH BRIDGE 27MHz PAGE 19 PAGE 22
DDRII-SODIMM1
PAGE 10,11
Cantiga GM/PM NVIDIA
S/W LCD CONN
C DDRII-SODIMM2 DDRII 667/800 MHz NB9P C
PAGE 19 PAGE 21
PAGE 10,11 Single channel
PAGE 12~16
PAGE 5~9 PCI-Express
16X HDMI
32.768KHz PAGE 22
DMI LINK DDR3 VRAM x 4
PAGE 17,18
SATA - HDD
SATA0 150MB NBSRCCLK, NBSRCCLK#
PAGE 27 PCI
SOUTH BRIDGE
SATA - CD-ROM
SATA1 150MB PCI-E
PAGE 27
ICH-9M Azalia 25MHz 24.576MHz
USB2.0 X1 X1 X2 X1
B USB2.0 Ports X4 PAGE 29 B
Mini PCI-E Card X2 PAGE 28 PAGE 23~26 AUDIO PCI-E-LAN Express Mini PCI-E RICOH
SYSTEM CHARGER(MAX8724)
Express Card X1 PAGE 29 CODEC Marvell Card Card R5C833
PAGE 44 M8072
BlueTooth X1 PAGE 29 Realtek (NEW CARD) (Wireless LAN)
CCD X1 PAGE 21 32.768KHz LPC AL-262 SRS (10/100/1G LAN) (Robson)

SYSTEM POWER MAX8744
CIR X1 PAGE 38 MDC CONN
PAGE 43 PAGE 31 PAGE 30 PAGE 27 PAGE 28 PAGE 33
PAGE 31
DDR II SMDDR_VTERM
1.8V/1.8VSUS(TPS51116REGR)
PAGE 42 ITE 8502E-L AUDIO RJ45 IEEE1394 Memory
Amplifier connect for CardReader
RJ11 AN12948A Discrete
VCCP VCC1.5 AND GMCH only
1.05V(RT8204) PAGE 30
PAGE 35 PAGE 32 PAGE 34 PAGE 34
PAGE 41 PAGE 30
PCI DEVICES IRQ ROUTING
DEVICE IDSEL # REQ/GNT # PCI_INT
VGACORE(1.025V)Oz8118 CardBus/1394 AD21 0 E,F
A A
PAGE 39 /Card Reader
Keyboard/Touch Pad FAN SPI ROM INT MIC Audio Jacks SPKR/HP
CPU CORE MAX8770 GMT G9931P1U (Linein/ MIC)
PROJECT : CH5
PAGE 40 PAGE 36 PAGE 37 PAGE 35 PAGE 31 PAGE 31 PAGE 32 Quanta Computer Inc.
Size Document Number Rev
Block Diagram 1A
Date: Monday, June 02, 2008 Sheet 1 of 49

5 4 3 2 1
1 2 3 4 5 6 7 8
VCC3
L13
1 2
HCB1608KF-181T15_6
MAX 250mA
+CK_VDD_MAIN
UMA & Discrete setting
CH5 RP32,RP33,RP34
02
C189 C162 C129 C164 C131 C161 U33 HB2 VGA RP34
10U/6.3V/X5R_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 HB2 UMA RP32,RP33
+CK_VDD_MAIN 16 54
VDDPLL3 CPUCLKT0 CLK_CPU_BCLK 3
9 VDD48 CPUCLKC0 53 CLK_CPU_BCLK# 3
L11
2
61
VDDPCI
VDDREF
CK505 CPUCLKT1 51 CLK_MCH_BCLK 5
A 1 2 VDDCPU 39 50 A
VDDSRC CPUCLKC1 CLK_MCH_BCLK# 5
HCB1608KF-181T15_6 VDDCPU 55 RP30 4P2R-S-0
VDDCPU CPU_ITP
CPUT2_ITP/SRCT8 47 4 3 CLK_PCIE_LAN 30
C112 C130 +CK_VDD_MAIN2 12 46 CPU_ITP# 2 1
VDD96I/O CPUT2_ITP/SRCC8 CLK_PCIE_LAN# 30
10U/6.3V/X5R_8 0.1U/10V_4 20 Note for B stage:
VDDPLL3I/O R_DOT96 RP32 2
26 13 1 4P2R-S-0@IV DREFCLK 6
45
VDDSRCI/O DOTT_96/SRCT0
14 R_DOT96# 4 3 NET exchage
VDDSRCI/O DOTC_96/SRCC0 DREFCLK# 6
36 VDDSRCI/O CLK_PCIE_LAN(#)<=>
L10 MAX 80mA 17 R_DREFSSCLK RP33 2 1 4P2R-S-0@IV
27MHz_Nonss/SRCCLK1/SE1 DREFSSCLK 6 CLK_PCIE_MINI_RB(#)
1 2 +CK_VDD_MAIN2 49 18 R_DREFSSCLK# 4 3
VDDCPU_IO 27Mhz_ss/SRCCLC1/SE2 DREFSSCLK# 6
HCB1608KF-181T15_6 48 NC 2.25
SRCCLKT2/SATACL 21 CLK_PCIE_SATA 23
SRCCLKC2/SATACL 22 CLK_PCIE_SATA# 23
C104 C166 C165 C167 C132 C133 C128 CG_XIN 60
10U/6.3V/X5R_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 CG_XOUT X1 R_CLK_PCIE_VGA RP34 2
59 X2 SRCCLKT3/CR#_C 24 1 4P2R-S-0@EV CLK_PCIE_VGA 12
25 R_CLK_PCIE_VGA# 4 3
SRCCLKC3/CR#_D CLK_PCIE_VGA# 12
SRCCLKT4 27 CLK_PCIE_MINI_RB 28
SRCCLKC4 28 CLK_PCIE_MINI_RB# 28
25 CK_PWG 56 CK_PWRGD/PD# PCI_STOP# 38 PM_STPPCI# 25

CPU_BSEL1 FSB 57 37
FSLB/TEST_MODE CPU_STOP# PM_STPCPU# 25
R484 2.2K_4
SRCCLKT6 41 CLK_PCIE_ICH 24
Y2 SRCCLKC6 40 CLK_PCIE_ICH# 24
VCC3
CG_XIN 1 2 CG_XOUT 10,27 CGCLK_SMB CGCLK_SMB R485 0_4 64 44
SCLK SRCCLKT7/CR#_F CLK_PCIE_MINI_WLAN 28
10,27 CGDAT_SMB CGDAT_SMB 63 43
SDATA SRCCLKC7/CR#_E CLK_PCIE_MINI_WLAN# 28
14.318MHZ for EMI
SRCCLKT9 30 CLK_PCIE_3GPLL 6
B R113 C678 C679 15 31 B
27P/50V_4 GND SRCCLKC9 CLK_PCIE_3GPLL# 6
10K_4 27P/50V_4 19 for EMI
C673 GND R_CLK_PCIE_NEW_C
11 GND48 SRCCLKT10 34 2 1 4P2R-S-0 CLK_PCIE_NEW_C 27
*27P/50V@NC 52 35 R_CLK_PCIE_NEW_C# 4 3 RP31
GNDCPU SRCCLKC10 CLK_PCIE_NEW_C# 27
8 GNDPCI
PCLK_MINI_LPC VCC3 for EMI 58 33 NEW-CARD_CLK_REQ#_R R486 475_4 NEW-CARD_CLK_REQ#
GNDREF SRCCLKT11/CR#_H R501 NEW-CARD_CLK_REQ# 27
23 32 CLK_3GPLLREQ#_R 475_4 CLK_MCH_OE#
GNDSRC SRCCLKC11/CR#_G CLK_MCH_OE# 6
29 GNDSRC
42 GNDSRC
R114 1 R_PCLK_8512 R495 33_4 PCLK_LPC_8512
PCICLK0/CR#_A R500 PCLK_LPC_8512 35
*4.7K_4@NC R91 R94 3 ROB_CLK_REQ#_R 475_4 ROB_CLK_REQ#
PCICLK1/CR#_B ROB_CLK_REQ# 28
Q20 10K_4 10K_4 4 PCLK_MINI_LPC R499 33_4 PCLK_DEBUG
PCICLK2/TME PCLK_DEBUG 28
2
PCICLK3 5
6 FCTSEL1 R498 33_4
PCICLK4/27_SELECT PCI_CLK_5C833 33
3 1 CGDAT_SMB
25,28 PDAT_SMB
2N7002E/CH2507SPT 7 ITP_EN R497 33_4 PCLK_ICH

PCI_F5/ITP_EN PCLK_ICH 24
R126 33_4 CLK_48M_USB
CLK_48M_USB 25
0=overclocking VCC3 10 FSA R496 2.2K_4 CPU_BSEL0
USB_48MHZ/FSLA FSC R482 10K_4 CPU_BSEL2
of CPU and Q19 62 R483 47_4 CLK_14M_ICH
FSLC/TST_SL/REF CLK_14M_ICH 25
2
SRC Allowed
ICS9LPRS365BGLFT/SLG8SP512T
3 1 CGCLK_SMB
25,28 PCLK_SMB
1 = overclocking place these resisters
of CPU and SRC close to CLKGEN
2N7002E/CH2507SPT
not Allowed
C C
VCC3
GCLK_SEL = FCTSEL1
VCC3
FCTSEL1 PIN13 PIN14 PIN17 PIN18
CLK_MCH_OE# R119 10K_4
(PIN13) REQ2# used for ROBSON
NEW-CARD_CLK_REQ# R96 10K_4
R107 0=UMA DOT96T DOT96C SRCT1/LCDT_100 SRCT1/LCDT_100
*10K_4@EV REQ3# used for NEWCARD ROB_CLK_REQ# R502 10K_4
1 = External
FCTSEL1 SRCT0 SRCC0 27Mout-NSS 27Mout-SS
VGA
R109 C192 *27P/50V@NC PCLK_LPC_8512
10K_4@IV
C206 *27P/50V@NC PCLK_DEBUG
CPU Clock Select C198 *27P/50V@NC PCLK_ICH
PCI4/27_Select: FSC FSB FSA CPU SRC PCI C196 *27P/50V@NC PCI_CLK_5C833
CPU_BSEL0 R132 0_4
1=27MHz,0=SRC_100MHz 3 CPU_BSEL0 MCH_BSEL0 6
C205 *27P/50V@NC CLK_48M_USB
of Pin17 & Pin18.
1 0 1 100 100 33
CH5 &HB2 VGA R107 0 0 1 133 100 33 C113 *27P/50V@NC CLK_14M_ICH
R131 1K_4
HB2 UMA R109
CPU_BSEL1 R134 0_4
0 1 1 166 100 33
3 CPU_BSEL1 MCH_BSEL1 6
D
0 1 0 200 100 33 D
ITP_EN 0 0 0 266 100 33 for EMI
VCCP R133 1K_4
CPU_BSEL2 R116 0_4

1 0 0 333 100 33
3 CPU_BSEL2 MCH_BSEL2 6
R112 1 1 0 400 100 33
10K_4
BSEL0&BSEL1 use 1k/K,2.2k/K resistors
PROJECT : CH5
R111 1K_4 BSEL2 use 1k/K,10k/K resistors 1 1 1 RSVD 100 33 Quanta Computer Inc.
Disable ITP VCCP
Intel schematic check list
wxx 07/11/30 Size Document Number Rev
CLOCK GENERATOR 1A
Date: Wednesday, May 14, 2008 Sheet 2 of 49

1 2 3 4 5 6 7 8
5 4 3 2 1
03
2,4,5,6,8,9,23,26,40,41,46 VCCP
U31A
D 5 H_A#[35:3] TP24 D
H_A#3 J4 H1
A[3]# ADS# H_ADS# 5 5 H_D#[63:0] H_D#[63:0]
H_A#4 L5 E2 U31B
A[4]# BNR# H_BNR# 5
ADDR GROUP 0
H_A#5 L4 G5 H_D#0 E22 Y22 H_D#32
A[5]# BPRI# H_BPRI# 5 D[0]# D[32]#
H_A#6 K5 H_D#1 F24 AB24 H_D#33
H_A#7 A[6]# H_D#2 D[1]# D[33]# H_D#34
M3 A[7]# DEFER# H5 H_DEFER# 5 E26 D[2]# D[34]# V24
H_A#8 N2 F21 H_D#3 G22 V26 H_D#35
A[8]# DRDY# H_DRDY# 5 D[3]# D[35]#
H_A#9 J1 E1 H_D#4 F23 V23 H_D#36
A[9]# DBSY# H_DBSY# 5 D[4]# D[36]#
H_A#10 N3 H_D#5 G25 T22 H_D#37
H_A#11 A[10]# H_D#6 D[5]# D[37]# H_D#38
P5 A[11]# BR0# F1 HBREQ#0 5 E25 D[6]# D[38]# U25
DATA GRP 0
DATA GRP 2
H_A#12 P2 H_D#7 E23 U23 H_D#39
A[12]# D[7]# D[39]#
CONTROL
H_A#13 L2 D20 H_IERR# R90 56.2/F_4 VCCP H_D#8 K24 Y25 H_D#40
H_A#14 A[13]# IERR# H_D#9 D[8]# D[40]# H_D#41
P4 A[14]# INIT# B3 H_INIT# 23 G24 D[9]# D[41]# W22
H_A#15 P1 H_D#10 J24 Y23 H_D#42
H_A#16 A[15]# H_D#11 D[10]# D[42]# H_D#43
R1 A[16]# LOCK# H4 H_LOCK# 5 J23 D[11]# D[43]# W24
M1 H_D#12 H22 W25 H_D#44
5 H_ADSTB#0 ADSTB[0]# H_CPURST# 5 D[12]# D[44]#
C1 H_D#13 F26 AA23 H_D#45
5 H_REQ#[4:0] RESET# D[13]# D[45]#
H_REQ#0 K3 F3 H_RS#0 H_D#14 K22 AA24 H_D#46
H_REQ#1 REQ[0]# RS[0]# H_RS#1 H_D#15 D[14]# D[46]# H_D#47
H2 REQ[1]# RS[1]# F4 H23 D[15]# D[47]# AB25
H_REQ#2 K2 G3 H_RS#2 H_RS#[2:0] 5 J26 Y26
REQ[2]# RS[2]# 5 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 5
H_REQ#3 J3 G2 H26 AA26
REQ[3]# TRDY# H_TRDY# 5 5 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 5
H_REQ#4 L1 H25 U22
H_A#[35:3] REQ[4]# 5 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 5
HIT# G6 H_HIT# 5
H_A#17 Y2 E4 H_D#[63:0] H_D#[63:0]
A[17]# HITM# H_HITM# 5
H_A#18 U5 H_D#16 N22 AE24 H_D#48
A[18]# D[16]# D[48]#
ADDR GROUP 1
H_A#19 R3 AD4 ITP_BPM#0 H_D#17 K25 AD24 H_D#49
A[19]# BPM[0]# TP4 D[17]# D[49]#
H_A#20 W6 AD3 ITP_BPM#1 H_D#18 P26 AA21 H_D#50
A[20]# XDP/ITP SIGNALS BPM[1]# TP3 D[18]# D[50]#
H_A#21 U4 AD1 ITP_BPM#2 H_D#19 R23 AB22 H_D#51
A[21]# BPM[2]# TP5 D[19]# D[51]#
H_A#22 Y5 AC4 ITP_BPM#3 H_D#20 L23 AB21 H_D#52
A[22]# BPM[3]# TP1 D[20]# D[52]#
H_A#23 U1 AC2 ITP_BPM#4 H_D#21 M24 AC26 H_D#53
A[23]# PRDY# TP2 D[21]# D[53]#
DATA GRP 1
DATA GRP 3
H_A#24 R4 AC1 ITP_BPM#5 H_D#22 L22 AD20 H_D#54
C A[24]# PREQ# TP6 D[22]# D[54]# C
H_A#25 T5 AC5 ITP_TCK trace shorter H_D#23 M23 AE22 H_D#55
H_A#26 A[25]# TCK ITP_TDI H_D#24 D[23]# D[55]# H_D#56
T3 AA6 P25 AF23
H_A#27 W2
A[26]# TDI
AB3 ITP_TDO than 500mil H_D#25 P23
D[24]# D[56]#
AC25 H_D#57
H_A#28 A[27]# TDO ITP_TMS H_D#26 D[25]# D[57]# H_D#58
W5 A[28]# TMS AB5 P22 D[26]# D[58]# AE21
H_A#29 Y4 AB6 ITP_TRST# H_D#27 T24 AD21 H_D#59
H_A#30 A[29]# TRST# H_D#28 D[27]# D[59]# H_D#60
U2 A[30]# DBR# C20 SYS_RST# 25 R24 D[28]# D[60]# AC22
H_A#31 V4 H_D#29 L25 AD23 H_D#61
H_A#32 A[31]# R93 *0 VCCP H_D#30 D[29]# D[61]# H_D#62
W3 A[32]# H_PROCHOT# 40 T25 D[30]# D[62]# AF22
H_A#33 AA4 THERMAL H_D#31 N25 AC23 H_D#63
H_A#34 A[33]# D[31]# D[63]#
AB2 A[34]# 5 H_DSTBN#1 L26 DSTBN[1]# DSTBN[3]# AE25 H_DSTBN#3 5
H_A#35 AA3 D21 H_PROCHOT#_R R92 68_4 VCCP R493 M26 AF24
A[35]# PROCHOT# 5 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 5
V1 A24 1K/F_4 N24 AC20
5 H_ADSTB#1 ADSTB[1]# THERMDA H_THERMDA 4 5 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 5
THERMDC B25 H_THERMDC 4
A6 H_GTLREF AD26 R26 COMP0 R490 27.4/F_4 COMP0,COMP2 Zo=25 trace less
23 H_A20M# A20M# GTLREF COMP[0]
ICH
A5 C7 CPU_TEST1 C23 MISC U26 COMP1 R491 54.9/F_4

23 H_FERR# FERR# THERMTRIP# PM_THRMTRIP# 6,23 TEST1 COMP[1] than 500mil from CPU pin >50mil
C4 R492 CPU_TEST2 D25 AA1 COMP2 R52 27.4/F_4
23 H_IGNNE# IGNNE# TEST2 COMP[2]
2K/F_4 CPU_TEST3 C24 Y1 COMP3 R53 54.9/F_4 away from other signals
TP16 TP21 TEST3 COMP[3]
D5 H CLK CPU_TEST4 AF26
23 H_STPCLK# STPCLK# TP22 TEST4
C6 CPU_TEST5 AF1 E5
23 H_INTR LINT0 TP11 TEST5 DPRSTP# H_DPRSTP# 6,23,40
B4 A22 CPU_TEST6 A26 B5 COMP1,COMP3 Zo=50 trace less
23 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 2 TP23 TEST6 DPSLP# H_DPSLP# 23
A3 A21 CPU_TEST7 C3 D24
23 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 2 TP15 TEST7 DPWR# H_DPWR# 5 than 500mil from CPU pin >50mil
2 CPU_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD 23
Quard Core Only 2 CPU_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 5 away from other signals
TP10 M4 RSVD[01] 2 CPU_BSEL2 C21 BSEL[2] PSI# AE6 PM_PSI# 40
TP9 N5 RSVD[02]
T2 Penryn
TP8 RSVD[03]
TP7 V3 RSVD[04]
B2 CPU_TEST2 R489 *1K/F_4
TP14 RSVD[05]
TP12 D2 RSVD[06] DPRSTP# signal must be daisy chain
TP20 D22
B D3
RSVD[07] CPU_TEST1 R95 *1K/F_4 routed, from ICH9M to VRM to (G)MCH B
TP13 RSVD[08]
TP17 F6 RSVD[09] to the Penryn processor, in that order.
VCCP
Penryn
ITP_TDI 54.9/F_4 R51
Populate ITP700Flex for bringup ITP_TMS 54.9/F_4 R48
ITP_TDO *54.9/F_4@NC R50
ITP_BPM#5 54.9/F_4 R49
H_CPURST# *51/F_4@NC R55
ITP_TCK 54.9/F_4 R59

A A
ITP_TRST# 54.9/F_4 R62
PROJECT : CH5
Quanta Computer Inc.
Penryn 1/2 1A

5 4 3 2 1
5 4 3 2 1
04
2,6,9,10,12,15,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,43,46 VCC3
2,3,5,6,8,9,23,26,40,41,46 VCCP
9,23,24,26,27,28,41,46 VCC1.5
VCC_CORE VCC_CORE
40 VCC_CORE
U31C ICC:
A7 AB20 U31D
A9
VCC[001] VCC[068]
AB7 for Penryn processors A4 P6
VCC_CORE VCC[002] VCC[069] VSS[001] VSS[082]
A10 VCC[003] VCC[070] AC7 recommended design A8 VSS[002] VSS[083] P21
A12 AC9 A11 P24
A13
VCC[004] VCC[071]
AC12 target is 50A A14
VSS[003] VSS[084]
R2
VCC[005] VCC[072] VSS[004] VSS[085]
A15 VCC[006] VCC[073] AC13 A16 VSS[005] VSS[086] R5
A17 VCC[007] VCC[074] AC15 2.4 - 2.6 GHz & HFM 47A A19 VSS[006] VSS[087] R22
C59 C54 C64 C67 A18 AC17 A23 R25
10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 A20
VCC[008] VCC[075]
AC18 1.6 GHz & LFM TBD AF2
VSS[007] VSS[088]
T1
D VCC[009] VCC[076] VSS[008] VSS[089] D
B7 VCC[010] VCC[077] AD7 0.8 GHz & SuperLFM 22.4A B6 VSS[009] VSS[090] T4
B9 VCC[011] VCC[078] AD9 B8 VSS[010] VSS[091] T23
B10 VCC[012] VCC[079] AD10 B11 VSS[011] VSS[092] T26
B12 VCC[013] VCC[080] AD12 B13 VSS[012] VSS[093] U3
C72 C77 C81 C89 B14 AD14 B16 U6
10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 VCC[014] VCC[081] VSS[013] VSS[094]
B18 VCC[017] VCC[084] AD18 B24 VSS[016] VSS[097] V2
B20 VCC[018] VCC[085] AE9 C5 VSS[017] VSS[098] V5
C9 VCC[019] VCC[086] AE10 C8 VSS[018] VSS[099] V22
C48 C60 C65 C71 C10 AE12 C11 V25
C12 VCC[021] VCC[088] AE13 C14 VSS[020] VSS[101] W1
C18 VCC[025] VCC[092] AE20 C22 VSS[024] VSS[105] Y3
C658 C76 C80 C86 D9 AF9 C25 Y6
D10 VCC[027] VCC[094] AF10 D1 VSS[026] VSS[107] Y21
D12 VCC[028] VCC[095] AF12 D4 VSS[027] VSS[108] Y24
D14 VCC[029] VCC[096] AF14 D8 VSS[028] VSS[109] AA2
C93 C79 C70 C669 D18 AF18 D16 AA11
10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 VCC[032] VCC[099] VCCP VSS[031] VSS[112]
E7 VCC[033] VCC[100] AF20 VCCP Supply before VCC Stable 4.5A D19 VSS[032] VSS[113] AA14
E9 D23 AA16
E10
VCC[034]
G21 VCCP Supply after VCC Stable 2.5A D26
VSS[033] VSS[114]
AA19
VCC[035] VCCP[01] VSS[034] VSS[115]
E12 VCC[036] VCCP[02] V6 E3 VSS[035] VSS[116] AA22
E13 VCC[037] VCCP[03] J6 E6 VSS[036] VSS[117] AA25
1
C660 C667 C666 C665 E15 K6 E8 AB1
10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 VCC[038] VCCP[04] + C73 VSS[037] VSS[118]
E17 VCC[039] VCCP[05] M6 E11 VSS[038] VSS[119] AB4
C E18 J21 330u_2.5V_7343 E14 AB8 C
VCC[040] VCCP[06] VSS[039] VSS[120]
E20 K21 E16 AB11
2
VCC[041] VCCP[07] VSS[040] VSS[121]
F7 VCC[042] VCCP[08] M21 E19 VSS[041] VSS[122] AB13
F9 N21 VCC1.5 E21 AB16
C656 C662 C661 C664 VCC[043] VCCP[09] VSS[042] VSS[123]
F10 VCC[044] VCCP[10] N6 E24 VSS[043] VSS[124] AB19
10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 F12 R21 ICCA 130mA F5 AB23
VCC[045] VCCP[11] VSS[044] VSS[125]
F14 VCC[046] VCCP[12] R6 F8 VSS[045] VSS[126] AB26
F15 VCC[047] VCCP[13] T21 F11 VSS[046] VSS[127] AC3
F17 VCC[048] VCCP[14] T6 F13 VSS[047] VSS[128] AC6
F18 V21 C152 C155 F16 AC8
C663 C668 C659 C657 VCC[049] VCCP[15] .01U/16V_4 10U/6.3V/X5R_8 VSS[048] VSS[129]
F20 VCC[050] VCCP[16] W21 F19 VSS[049] VSS[130] AC11
10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 AA7 F2 AC14
VCC[051] VSS[050] VSS[131]
AA9 VCC[052] VCCA[01] B26 F22 VSS[051] VSS[132] AC16
AA10 VCC[053] VCCA[02] C26 F25 VSS[052] VSS[133] AC19
AA12 VCC[054] G4 VSS[053] VSS[134] AC21
AA13 VCC[055] VID[0] AD6 CPU_VID0 40 G1 VSS[054] VSS[135] AC24
VCCP AA15 AF5 G23 AD2
VCC[056] VID[1] CPU_VID1 40 VSS[055] VSS[136]
AA17 VCC[057] VID[2] AE5 CPU_VID2 40 G26 VSS[056] VSS[137] AD5
AA18 VCC[058] VID[3] AF4 CPU_VID3 40 H3 VSS[057] VSS[138] AD8
AA20 VCC[059] VID[4] AE3 CPU_VID4 40 H6 VSS[058] VSS[139] AD11
AB9 VCC[060] VID[5] AF3 CPU_VID5 40 H21 VSS[059] VSS[140] AD13
C55 C57 C56 C90 C91 C92 AC10 AE2 H24 AD16
VCC[061] VID[6] CPU_VID6 40 VSS[060] VSS[141]
.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 AB10 J2 AD19
VCC[062] VSS[061] VSS[142]
AB12 VCC[063] J5 VSS[062] VSS[143] AD22
AB14 VCC[064] VCCSENSE AF7 VCCSENSE 40 J22 VSS[063] VSS[144] AD25
AB15 VCC[065] J25 VSS[064] VSS[145] AE1
AB17 VCC[066] K1 VSS[065] VSS[146] AE4
AB18 VCC[067] VSSSENSE AE7 VSSSENSE 40 K4 VSS[066] VSS[147] AE8
K23 VSS[067] VSS[148] AE11
Penryn R479 R478 K26 AE14
B 100/F_4 VSS[068] VSS[149] B
. 100/F_4 L3 VSS[069] VSS[150] AE16
L6 VSS[070] VSS[151] AE19
Route VCCSENSE and VSSSENSE L21 VSS[071] VSS[152] AE23
L24 AE26
traces at 27.4ohms and length M2
VSS[072] VSS[153]
A2
VSS[073] VSS[154]
Note for B stage: VCC3
matched to within 25 mil. Place PU M5 VSS[074] VSS[155] AF6
M22 AF8
Stuff R488. Change R480 to 200ohm. VCC_CORE and PD within 2 inch of CPU. 18mil M25
VSS[075] VSS[156]
AF11
VSS[076] VSS[157]
trace and 7mil space N1 VSS[077] VSS[158] AF13
N4 VSS[078] VSS[159] AF16
N23 VSS[079] VSS[160] AF19
N26 VSS[080] VSS[161] AF21
R480 P3 A25
VCC3 200/J_4 VSS[081] VSS[162]
VSS[163] AF25
25mils
LM86VCC Penryn
Q21 .
2
2N7002E/CH2507SPT R487
R481 R488 C675
20,35 MB_CLK 3 1 10K/F_4 10K/F_4 10K/F_4 .1U/10V_4
U32
15 MBCLK2 8 SCLK VCC 1

H_THERMDA 3
15 MBDATA2 7 SDA DXP 2
C677 routed on same layer with 10-mil
VCC3
6 3 2200P/50V_4
ALERT# DXN trace and 10-mil spacing
2
Q23
2N7002E/CH2507SPT 4 5
A OVERT# GND H_THERMDC 3 A
20,35 MB_DATA 3 1
G780P81U(MSOP-8)
25,37 PM_THRM# PM_THRM_R# R99 *0_4@NC
VCC3
ADDRESS: 98H PROJECT : CH5
2
Q25
2N7002E/CH2507SPT Note for B stage:
43 SYS_SHDN# 3 1 SYS_SHDN-1# U32 change to AL000780000(GMT) Quanta Computer Inc.
2/26 Size Document Number Rev
2 1 VGA_OVT# 15
D29 Penryn & TH Monitor 2/2 1A
*RB501V-40@NC
5 4 3 2 1
5 4 3 2 1
AU48
AR48
U37I
VSS_1
VSS_2
VSS_100
VSS_101
AM36
AE36
BG21
L12
AW21
U37J
VSS_199
VSS_200
VSS_201
VSS_297
VSS_298
VSS_299
AH8
Y8
L8
05
AL48 VSS_3 VSS_102 P36 AU21 VSS_202 VSS_300 E8
BB47 VSS_4 VSS_103 L36 AP21 VSS_203 VSS_301 B8
AW47 VSS_5 VSS_104 J36 AN21 VSS_204 VSS_302 AY7
AN47 F36 AH21 AU7 U37A
VSS_6 VSS_105 VSS_205 VSS_303 H_A#[35:3] 3
AJ47 B36 AF21 AN7 A14 H_A#3
VSS_7 VSS_106 VSS_206 VSS_304 3 H_D#[63:0] H_A#_3
AF47 AH35 AB21 AJ7 H_D#0 F2 C15 H_A#4
VSS_8 VSS_107 VSS_207 VSS_305 H_D#1 H_D#_0 H_A#_4 H_A#5
AD47 VSS_9 VSS_108 AA35 R21 VSS_208 VSS_306 AE7 G8 H_D#_1 H_A#_5 F16
D AB47 Y35 M21 AA7 H_D#2 F8 H13 H_A#6 D
Y47 VSS_11 VSS_110 U35 J21 VSS_210 VSS_308 N7 E6 H_D#_3 H_A#_7 C18
T47 T35 G21 J7 H_D#4 G2 M16 H_A#8
N47 VSS_13 VSS_112 BF34 BC20 VSS_212 VSS_310 BG6 H6 H_D#_5 H_A#_9 J13
L47 AM34 BA20 BD6 H_D#6 H2 P16 H_A#10
G47 VSS_15 VSS_114 AJ34 AW20 VSS_214 VSS_312 AV6 F6 H_D#_7 H_A#_11 R16
BD46 AF34 AT20 AT6 H_D#8 D4 N17 H_A#12
BA46 VSS_17 VSS_116 AE34 AJ20 VSS_216 VSS_314 AM6 H3 H_D#_9 H_A#_13 M13
AY46 W34 AG20 M6 H_D#10 M9 E17 H_A#14
AV46 VSS_19 VSS_118 B34 Y20 VSS_218 VSS_316 C6 M11 H_D#_11 H_A#_15 P17
AR46 A34 N20 BA5 H_D#12 J1 F17 H_A#16
AM46 VSS_21 VSS_120 BG33 K20 VSS_220 VSS_318 AH5 J2 H_D#_13 H_A#_17 G20
V46 BC33 F20 AD5 H_D#14 N12 B19 H_A#18
R46 VSS_23 VSS_122 BA33 C20 VSS_222 VSS_320 Y5 J6 H_D#_15 H_A#_19 J16
P46 AV33 A20 L5 H_D#16 P2 E20 H_A#20
H46 VSS_25 VSS_124 AR33 BG19 VSS_224 VSS_322 J5 L2 H_D#_17 H_A#_21 H16
F46 AL33 A18 H5 H_D#18 R2 J20 H_A#22
BF44 VSS_27 VSS_126 AH33 BG17 VSS_226 VSS_324 F5 N9 H_D#_19 H_A#_23 L17
AH44 AB33 BC17 BE4 H_D#20 L6 A17 H_A#24
AD44 VSS_29 VSS_128 P33 AW17 VSS_228 M5 H_D#_21 H_A#_25 B17
AA44 L33 AT17 BC3 H_D#22 J3 L16 H_A#26
Y44
U44
VSS_30
VSS_31
VSS_129
VSS_130 H33
N32
R17
M17
VSS_229
VSS_230 VSS VSS_327
VSS_328 AV3
AL3 VCCP
H_D#23
H_D#24
N2
R1
H_D#_22
H_D#_23
H_A#_26
H_A#_27 C21
J17
H_A#27
H_A#28
VSS

T44 VSS_33 VSS_132 K32 H17 VSS_232 VSS_330 R3 N5 H_D#_25 H_A#_29 H20
M44 F32 C17 P3 H_D#26 N6 B18 H_A#30
F44 VSS_35 VSS_134 C32 VSS_332 F3 P13 H_D#_27 H_A#_31 K17
BC43 A31 BA16 BA2 H_D#28 N8 B20 H_A#32
AV43 VSS_37 VSS_136 AN29 VSS_334 AW2 L7 H_D#_29 H_A#_33 F21
AU43 T29 AU16 AU2 R504 H_D#30 N10 K21 H_A#34
VSS_38 VSS_137 VSS_237 VSS_335 221/F_4 H_D#31 H_D#_30 H_A#_34 H_A#35
AM43 VSS_39 VSS_138 N29 AN16 VSS_238 VSS_336 AR2 M3 H_D#_31 H_A#_35 L20
C J43 K29 N16 AP2 H_D#32 Y3 C
VSS_40 VSS_139 VSS_239 VSS_337 H_SWING H_D#33 H_D#_32
C43 VSS_41 VSS_140 H29 K16 VSS_240 VSS_338 AJ2 AD14 H_D#_33 H_ADS# H12 H_ADS# 3
BG42 F29 G16 AH2 H_D#34 Y6 B16
VSS_42 VSS_141 VSS_241 VSS_339 H_D#_34 H_ADSTB#_0 H_ADSTB#0 3
AY42 A29 E16 AF2 H_D#35 Y10 G17
VSS_43 VSS_142 VSS_242 VSS_340 H_D#_35 H_ADSTB#_1 H_ADSTB#1 3
AT42 BG28 BG15 AE2 H_D#36 Y12 A9
VSS_44 VSS_143 VSS_243 VSS_341 H_D#_36 H_BNR# H_BNR# 3
AN42 BD28 AC15 AD2 R503 C692 H_D#37 Y14 F11
VSS_45 VSS_144 VSS_244 VSS_342 H_D#_37 H_BPRI# H_BPRI# 3
AJ42 BA28 W15 AC2 100/F_4 .1U/10V_4 H_D#38 Y7 G12
VSS_46 VSS_145 VSS_245 VSS_343 H_D#_38 H_BREQ# HBREQ#0 3
AE42 AV28 A15 Y2 H_D#39 W2 E9
VSS_47 VSS_146 VSS_246 VSS_344 H_D#_39 H_DEFER# H_DEFER# 3
N42 AT28 BG14 M2 H_D#40 AA8 B10
VSS_48 VSS_147 VSS_247 VSS_345 H_D#_40 H_DBSY# H_DBSY# 3
H_D#41
HOST
L42 VSS_49 VSS_148 AR28 AA14 VSS_248 VSS_346 K2 Y9 H_D#_41 HPLL_CLK AH7 CLK_MCH_BCLK 2
BD41 AJ28 C14 AM1 H_D#42 AA13 AH6
VSS_50 VSS_149 VSS_249 VSS_347 H_D#_42 HPLL_CLK# CLK_MCH_BCLK# 2
AU41 AG28 BG13 AA1 H_RCOMP H_D#43 AA9 J11
VSS_51 VSS_150 VSS_250 VSS_348 H_D#_43 H_DPWR# H_DPWR# 3
AM41 AE28 BC13 P1 H_D#44 AA11 F9
VSS_52 VSS_151 VSS_251 VSS_349 H_D#_44 H_DRDY# H_DRDY# 3
AH41 AB28 BA13 H1 H_D#45 AD11 H9
VSS_53 VSS_152 VSS_252 VSS_350 H_D#_45 H_HIT# H_HIT# 3
AD41 Y28 H_D#46 AD10 E12
VSS_54 VSS_153 H_D#_46 H_HITM# H_HITM# 3
AA41 P28 U24 R129 H_D#47 AD13 H11
VSS_55 VSS_154 VSS_351 H_D#_47 H_LOCK# H_LOCK# 3
Y41 K28 AN13 U28 24.9/F_4 H_D#48 AE12 C9
VSS_56 VSS_155 VSS_255 VSS_352 H_D#_48 H_TRDY# H_TRDY# 3
U41 H28 AJ13 U25 H_D#49 AE9
VSS_57 VSS_156 VSS_256 VSS_353 H_D#50 H_D#_49
T41 VSS_58 VSS_157 F28 AE13 VSS_257 VSS_354 U29 AA2 H_D#_50
M41 C28 N13 impedance 55 ohm H_D#51 AD8
VSS_59 VSS_158 VSS_258 H_D#52 H_D#_51
G41 VSS_60 VSS_159 BF26 L13 VSS_259 AA3 H_D#_52
B41 AH26 G13 AF32 H_D#53 AD3 J8
VSS_61 VSS_160 VSS_260 VSS_NCTF_1 H_D#_53 H_DINV#_0 H_DINV#0 3
BG40 AF26 E13 AB32 Layout Note: H_D#54 AD7 L3
VSS_62 VSS_161 VSS_261 VSS_NCTF_2 H_D#_54 H_DINV#_1 H_DINV#1 3
BB40 AB26 BF12 V32 H_D#55 AE14 Y13
VSS_63 VSS_162 VSS_262 VSS_NCTF_3 H_RCOMP trace should be H_D#56 H_D#_55 H_DINV#_2 H_DINV#2 3
AV40 AA26 AV12 AJ30 AF3 Y1 H_DINV#3 3
AN40
VSS_64 VSS_163
C26 AT12
VSS_263 VSS_NCTF_4
AM29
10-mil wide with 15-mil H_D#57 AC1
H_D#_56 H_DINV#_3
VSS_65 VSS_164 VSS_264 VSS_NCTF_5 spacing. H_D#58 H_D#_57
H40 VSS_66 VSS_165 B26 AM12 VSS_265 VSS_NCTF_6 AF29 AE3 H_D#_58 H_DSTBN#_0 L10 H_DSTBN#0 3
E40 BH25 AA12 AB29 H_D#59 AC3 M7
VSS NCTF
VSS_67 VSS_166 VSS_266 VSS_NCTF_7 H_D#_59 H_DSTBN#_1 H_DSTBN#1 3

AT39 BD25 J12 U26 H_D#60 AE11 AA5
VSS_68 VSS_167 VSS_267 VSS_NCTF_8 H_D#_60 H_DSTBN#_2 H_DSTBN#2 3
AM39 BB25 A12 U23 H_D#61 AE8 AE6
B VSS_69 VSS_168 VSS_268 VSS_NCTF_9 H_D#_61 H_DSTBN#_3 H_DSTBN#3 3 B
AJ39 AV25 BD11 AL20 H_D#62 AG2
VSS_70 VSS_169 VSS_269 VSS_NCTF_10 H_D#63 H_D#_62
AE39 VSS_71 VSS_170 AR25 BB11 VSS_270 VSS_NCTF_11 V20 AD6 H_D#_63 H_DSTBP#_0 L9 H_DSTBP#0 3
N39 VSS_72 VSS_171 AJ25 AY11 VSS_271 VSS_NCTF_12 AC19 H_DSTBP#_1 M8 H_DSTBP#1 3
L39 VSS_73 VSS_172 AC25 AN11 VSS_272 VSS_NCTF_13 AL17 H_DSTBP#_2 AA6 H_DSTBP#2 3
B39 Y25 AH11 AJ17 H_SWING C5 AE5
VSS_74 VSS_173 VSS_273 VSS_NCTF_14 H_SWING H_DSTBP#_3 H_DSTBP#3 3
BH38 N25 AA17 H_RCOMP E3
VSS_75 VSS_174 VSS_NCTF_15 H_RCOMP H_REQ#[4:0] 3
BC38 L25 Y11 U17 B15 H_REQ#0
VSS_76 VSS_175 VSS_275 VSS_NCTF_16 H_REQ#_0 H_REQ#1
BA38 VSS_77 VSS_176 J25 N11 VSS_276 H_REQ#_1 K13
AU38 G25 G11 F13 H_REQ#2
VSS_78 VSS_177 VSS_277 VCCP H_REQ#_2 H_REQ#3
AH38 E25 C11 BH48 B13
VSS SCB
VSS_79 VSS_178 VSS_278 VSS_SCB_1 H_REQ#_3 H_REQ#4

AD38 VSS_80 VSS_179 BF24 BG10 VSS_279 VSS_SCB_2 BH1 3 H_CPURST# C12 H_CPURST# H_REQ#_4 B14
AA38 VSS_81 VSS_180 AD12 AV10 VSS_280 VSS_SCB_3 A48 3 H_CPUSLP# E11 H_CPUSLP# H_RS#[2:0] 3
Y38 AY24 AT10 C1 R508 B6 H_RS#0
VSS_82 VSS_181 VSS_281 VSS_SCB_4 TP19 H_RS#_0
U38 AT24 AJ10 A3 1K/F_4 F12 H_RS#1
VSS_83 VSS_182 VSS_282 VSS_SCB_5 H_RS#_1 H_RS#2
T38 VSS_84 VSS_183 AJ24 AE10 VSS_283 H_RS#_2 C8
J38 AH24 AA10 E1 H_AVREF A11
VSS_85 VSS_184 VSS_284 NC_26 H_AVREF
F38 VSS_86 VSS_185 AF24 M10 VSS_285 NC_27 D2 B11 H_DVREF
C38 AB24 BF9 C3 R512
VSS_87 VSS_186 VSS_286 NC_28 2K/F_4 C705 CANTIGA_PM/GM
BF37 VSS_88 VSS_187 R24 BC9 VSS_287 NC_29 B4
BB37 L24 AN9 A5 .1U/10V_4
VSS_89 VSS_188 VSS_288 NC_30
AW37 VSS_90 VSS_189 K24 AM9 VSS_289 NC_31 A6
AT37 VSS_91 VSS_190 J24 AD9 VSS_290 NC_32 A43
AN37 VSS_92 VSS_191 G24 G9 VSS_291 NC_33 A44
AJ37 F24 B9 B45 Layout Note:55ohm
NC
VSS_93 VSS_192 VSS_292 NC_34

H37 VSS_94 VSS_193 E24 BH8 VSS_293 NC_35 C46 Place the 0.1 uF
C37 BH23 BB8 D47
BG36
VSS_95 VSS_194
AG23 AV8
VSS_294 NC_36
B47
decoupling capacitor
VSS_96 VSS_195 VSS_295 NC_37 within 100 mils from
BD36 VSS_97 VSS_196 Y23 AT8 VSS_296 NC_38 A46
AK15 VSS_98 VSS_197 B23 NC_39 F48 GMCH pins.
AU36 VSS_99 VSS_198 A23 NC_40 E48
A AJ6 C48 A
VSS_199 NC_41
NC_42 B48
CANTIGA_PM/GM
CANTIGA_PM/GM
PROJECT : CH5
Cantiga Host & VSS 1/5 1A

5 4 3 2 1
5 4 3 2 1
06
2,4,9,10,12,15,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,43,46 VCC3 PEG_TX#[15:0]
8,9,10,19,39,41,42,46 1.8VSUS PEG_TX#[15:0] 12
2,3,4,5,8,9,23,26,40,41,46 VCCP PEG_TX[15:0]
9 +1.05V_PEG PEG_TX[15:0] 12
Layout Note: PEG_RX#[15:0]
Location of all MCH_CFG strap PEG_RX#[15:0] 12
PEG_RX[15:0]
resistors needs to be close to PEG_RX[15:0] 12 For UMA HDMI Function
minmize stub. U37B
MCH_CFG_5 DMIx2 selection
DDR CLK/ CONTROL/COMPENSATION

M36 RSVD1
Low: DMIx2 N36 RSVD2 SA_CK_0 AP24 M_A_CLK0 10
R33 AT21 LVDS HB2 Discrete / HB2 UMA&CH5 U37C
High: DMIx4 (Default) RSVD3 SA_CK_1 M_A_CLK1 10
T33 AV24
MCH_CFG_16 FSB Dynamic ODT AH9
RSVD4 SB_CK_0
AU20
M_B_CLK0 10 R225 NC 10K +1.05V_PEG
RSVD5 SB_CK_1 M_B_CLK1 10
AH10 RSVD6
R253 NC 10K
D
Low: Dynamic ODT disabled AH12 RSVD7 SA_CK#_0 AR24 M_A_CLK0# 10 20 INT_DPST_PWM L32 L_BKLT_CTRL D
AH13 AR21 G32 T37 PEG_COMP R259 49.9/F_4
High: Dynamic ODT enabled (Default) RSVD8 SA_CK#_1 M_A_CLK1# 10 20 INT_LVDS_BLON
R225 10K/F_4@IV L_CTRL_CLK L_BKLT_EN PEG_COMPI
K12 RSVD9 SB_CK#_0 AU24 M_B_CLK0# 10 M32 L_CTRL_CLK PEG_COMPO T36
MCH_CFG_9 PCI Express Graphic Lane SB_CK#_1 AV20 M_B_CLK1# 10 VCC3
R253 10K/F_4@IV L_CTRL_DATA M33
L_CTRL_DATA PEG_RX#0
Low: Reverse Lane SA_CKE_0 BC28 M_A_CKE0 10,11 20 INT_EDIDCLK K33 L_DDC_CLK PEG_RX#_0 H44
AY28 J33 J46 PEG_RX#1
High: Normal operation(Default) SA_CKE_1 M_A_CKE1 10,11 20 INT_EDIDDATA L_DDC_DATA PEG_RX#_1
RSVD
T24 AY36 L44 PEG_RX#2
RSVD14 SB_CKE_0 M_B_CKE0 10,11 20 INT_DISP_ON PEG_RX#_2
MCH_CFG_19 DMI Lane Reversal BB36 L40 PEG_RX#3
SB_CKE_1 M_B_CKE1 10,11 PEG_RX#_3
B31 LVDS HB2 Discrete / HB2 UMA&CH5 M29 N41 PEG_RX#4
RSVD15 R269 2.4K/F_4@IV LVDS_IBG C44 L_VDD_EN PEG_RX#_4 PEG_RX#5
Low: Normal (Default) B2 RSVD16 SA_CS#_0 BA17 M_A_CS#0 10,11 R269 NC 2.4K LVDS_IBG PEG_RX#_5 P48
M1 AY16 LVDS_VBG B43 N44 PEG_RX#6
High: Lane Reserved RSVD17 SA_CS#_1 M_A_CS#1 10,11 TP82 LVDS_VBG PEG_RX#_6 PEG_RX#7
SB_CS#_0 AV16 M_B_CS#0 10,11 UMA & Discrete setting E37 LVDS_VREFH PEG_RX#_7 T43
MCH_CFG_6 iTPM Host Interface AR13 E38 U43 PEG_RX#8
SB_CS#_1 M_B_CS#1 10,11 LVDS_VREFL PEG_RX#_8
LVDS
AY21 C41 Y43 PEG_RX#9
RSVD20 19 LA_CLK# LVDSA_CLK# PEG_RX#_9
Low: iTPM Host Interface enabled BD17 C40 Y48 PEG_RX#10
SA_ODT_0 M_A_ODT0 10,11 19 LA_CLK LVDSA_CLK PEG_RX#_10
AY17 B37 Y36 PEG_RX#11
High: iTPM Host Interface disabled (Default) SA_ODT_1 M_A_ODT1 10,11 LVDSB_CLK# PEG_RX#_11 PEG_RX#12
SB_ODT_0 BF15 M_B_ODT0 10,11 A37 LVDSB_CLK PEG_RX#_12 AA43
MCH_CFG_7 Intel (R) Management Engine Crypto BG23 AY13 1.8VSUS AD37 PEG_RX#13
RSVD22 SB_ODT_1 M_B_ODT1 10,11 PEG_RX#_13
BF23 19 LA_DATAN0 H47 AC47 PEG_RX#14
RSVD23 SM_RCOMP R520 80.6/F_4 LVDSA_DATA#_0 PEG_RX#_14 PEG_RX#15
Low: Intel (R) Management Engine Crypto BH18 RSVD24 SM_RCOMP BG22 19 LA_DATAN1 E46 LVDSA_DATA#_1 PEG_RX#_15 AD39
BF18 BH21 SM_RCOMP# R518 80.6/F_4 G40
TLS cipher suite with no confidentiality RSVD25 SM_RCOMP# 19 LA_DATAN2 LVDSA_DATA#_2
GRAPHICS
LA_DATAN3 A40 H43 PEG_RX0
High: Intel (R) Management Engine Crypto TP80 LVDSA_DATA#_3 PEG_RX_0
BF28 SM_RCOMP_VOH J44 PEG_RX1
TLS cipher suite with no confidentiality (Default) SM_RCOMP_VOH SM_RCOMP_VOL PEG_RX_1 PEG_RX2
SM_RCOMP_VOL BH28 19 LA_DATAP0 H48 LVDSA_DATA_0 PEG_RX_2 L43
19 LA_DATAP1 D45 L41 PEG_RX3
LVDSA_DATA_1 PEG_RX_3
MCH_CFG_10 PCIe Lookback Enable SM_VREF AV42 SMDDR_VREF_MCH 19 LA_DATAP2 F40 LVDSA_DATA_2 PEG_RX_4 N40 PEG_RX4
SM_PWROK AR36 SW_PWROK_NB R242 10K/F_4 LA_DATAP3 B40 LVDSA_DATA_3 PEG_RX_5 P47 PEG_RX5
Low: Enabled SM_REXT BF17 SM_REXT R164 499/F_4 TP79
PEG_RX_6 N43 PEG_RX6
High: Disabled (Default) SM_DRAMRST# BC36 TP_SM_DRAMRST# TP37 A41 LVDSB_DATA#_0 PEG_RX_7 T42 PEG_RX7
H38 U42 PEG_RX8
DREFCLK LVDSB_DATA#_1 PEG_RX_8 PEG_RX9
MCH_CFG_12/13 XOR/ALLZ/CLOCK Un-gating DPLL_REF_CLK B38 DREFCLK 2 G37 LVDSB_DATA#_2 PEG_RX_9 Y42
A38 DREFCLK# J37 W47 PEG_RX10
DPLL_REF_CLK# DREFCLK# 2 TP39 LVDSB_DATA#_3 PEG_RX_10
MCH_CFG_13 MCH_CFG_12 Configuration E41 DREFSSCLK Y37 PEG_RX11
DPLL_REF_SSCLK DREFSSCLK 2 PEG_RX_11
ME JTAG
DREFSSCLK# PEG_RX12
LVDS 2nd channel
CLK
DPLL_REF_SSCLK# F41 DREFSSCLK# 2 B42 LVDSB_DATA_0 PEG_RX_12 AA42
0 0 Reserved TP38 AL34 G38 AD36 PEG_RX13
ME_JTAG_TCK LVDSB_DATA_1 PEG_RX_13 PEG_RX14
PCI-EXPRESS
PEG_CLK F43 CLK_PCIE_3GPLL 2 F37 LVDSB_DATA_2 PEG_RX_14 AC48
1 0 XOR Mode enabled TP42 AK34 E43 K37 AD40 PEG_RX15
ME_JTAG_TDI PEG_CLK# CLK_PCIE_3GPLL# 2 TP44 LVDSB_DATA_3 PEG_RX_15
C C
0 1 All-Z Mode enabled TP40 AN35 ME_JTAG_TDO PEG_TX#_0 J41 C_PEG_TX#0 C733 .1U/10V_4@EV PEG_TX#0
DMI_TXN[3:0] 24 PEG_TX#_1 M46 C_PEG_TX#1 C735 .1U/10V_4@EV PEG_TX#1
1 1 Normal operation (Default) TP43 AM35 AE41 DMI_TXN0 R192 0_4@EV F25 M47 C_PEG_TX#2 C737 .1U/10V_4@EV PEG_TX#2
ME_JTAG_TMS DMI_RXN_0 DMI_TXN1 TVA_DAC PEG_TX#_2
DMI_RXN_1 AE37 R199 0_4@EV H25 TVB_DAC PEG_TX#_3 M40 C_PEG_TX#3 C739 .1U/10V_4@EV PEG_TX#3
AE47 DMI_TXN2 R209 0_4@EV K25 M42 C_PEG_TX#4 C740 .1U/10V_4@EV PEG_TX#4
DMI_RXN_2 TVC_DAC PEG_TX#_4
TV
AH39 DMI_TXN3 R48 C_PEG_TX#5 C743 .1U/10V_4@EV PEG_TX#5
DMI_RXN_3 PEG_TX#_5
DMI_TXP[3:0] 24 H24 TV_RTN PEG_TX#_6 N38 C_PEG_TX#6 C746 .1U/10V_4@EV PEG_TX#6
AE40 DMI_TXP0 T40 C_PEG_TX#7 C750 .1U/10V_4@EV PEG_TX#7
2 MCH_BSEL0 DMI_RXP_0 PEG_TX#_7
T25 AE38 DMI_TXP1 U37 C_PEG_TX#8 C753 .1U/10V_4@EV PEG_TX#8
2 MCH_BSEL1 CFG_0 DMI_RXP_1 PEG_TX#_8
R25 AE48 DMI_TXP2 U40 C_PEG_TX#9 C754 .1U/10V_4@EV PEG_TX#9
2 MCH_BSEL2 CFG_1 DMI_RXP_2 PEG_TX#_9
P25 AH40 DMI_TXP3 R522 0_4@IV TV_DCONSEL0 C31 Y40 C_PEG_TX#10 C762 .1U/10V_4@EV PEG_TX#10
MCH_CFG_3 CFG_2 DMI_RXP_3 TV_DCONSEL1 TV_DCONSEL_0 PEG_TX#_10
TP26 R235 AA46 C_PEG_TX#11 C764 .1U/10V_4@EV PEG_TX#11
DMI
P20 CFG_3 DMI_RXN[3:0] 24 E32 TV_DCONSEL_1 PEG_TX#_11
TP32 MCH_CFG_4 P24 AE35 DMI_RXN0 0_4@IV AA37 C_PEG_TX#12 C767 .1U/10V_4@EV PEG_TX#12
MCH_CFG_5 CFG_4 DMI_TXN_0 DMI_RXN1 PEG_TX#_12
R182 *2.2K_4@NC C25 CFG_5 DMI_TXN_1 AE43 PEG_TX#_13 AA40 C_PEG_TX#13 C770 .1U/10V_4@EV PEG_TX#13
R194 *2.2K_4@NC MCH_CFG_6 N24 AE46 DMI_RXN2 AD43 C_PEG_TX#14 C772 .1U/10V_4@EV PEG_TX#14
MCH_CFG_7 CFG_6 DMI_TXN_2 DMI_RXN3 PEG_TX#_14
R186 *2.2K_4@NC M24 CFG_7 DMI_TXN_3 AH42 PEG_TX#_15 AC46 C_PEG_TX#15 C775 .1U/10V_4@EV PEG_TX#15
MCH_CFG_8 E21
TP28 CFG_8 DMI_RXP[3:0] 24
CFG
R171 *2.2K_4@NC MCH_CFG_9 C23 AD35 DMI_RXP0 R227 0_4@IV CRT_B_1 E28 J42 C_PEG_TX0 C731 .1U/10V_4@EV PEG_TX0
CFG_9 DMI_TXP_0 19 INT_CRT_B CRT_BLUE PEG_TX_0
R517 *2.2K_4@NC MCH_CFG_10 C24 AE44 DMI_RXP1 L46 C_PEG_TX1 C734 .1U/10V_4@EV PEG_TX1
MCH_CFG_11 CFG_10 DMI_TXP_1 DMI_RXP2 CRT_G_1 PEG_TX_1
N21 AF46 19 INT_CRT_G
R212 0_4@IV G28 M48 C_PEG_TX2 C736 .1U/10V_4@EV PEG_TX2
R173 *2.2K_4@NC TP29 MCH_CFG_12 P21
CFG_11 DMI_TXP_2
AH43 DMI_RXP3 CRT_GREEN PEG_TX_2
M39 C_PEG_TX3 C738 .1U/10V_4@EV PEG_TX3
MCH_CFG_13 CFG_12 DMI_TXP_3 CRT_R_1 PEG_TX_3
R188 *2.2K_4@NC T21 CFG_13 19 INT_CRT_R
R234 0_4@IV J28 CRT_RED PEG_TX_4 M43 C_PEG_TX4 C741 .1U/10V_4@EV PEG_TX4
VGA
TP27 MCH_CFG_14 R20 R47 C_PEG_TX5 C742 .1U/10V_4@EV PEG_TX5
MCH_CFG_15 CFG_14 PEG_TX_5
TP25 M20 CFG_15 G29 CRT_IRTN PEG_TX_6 N37 C_PEG_TX6 C744 .1U/10V_4@EV PEG_TX6
R172 *2.2K_4@NC MCH_CFG_16 L21 T39 C_PEG_TX7 C748 .1U/10V_4@EV PEG_TX7
MCH_CFG_17 CFG_16 PEG_TX_7
H21 H32 U36 C_PEG_TX8 C752 .1U/10V_4@EV PEG_TX8
GRAPHICS VID
TP31 CFG_17 20 INT_CRTCLK CRT_DDC_CLK PEG_TX_8

MCH_CFG_18 P29 J32 U39 C_PEG_TX9 C756 .1U/10V_4@EV PEG_TX9
TP34 CFG_18 20 INT_CRTDAT CRT_DDC_DATA PEG_TX_9
R211 *2.2K_4@NC MCH_CFG_19 R28 R239 33_4@IV HSYNC_INT J29 Y39 C_PEG_TX10 C757 .1U/10V_4@EV PEG_TX10
CFG_19 19 INT_HSYNC CRT_HSYNC PEG_TX_10
VCC3 R221 *2.2K_4@NC MCH_CFG_20 T28 B33 GFXVR_VID_0 R195 0_4@EV CRTIREF E29 Y46 C_PEG_TX11 C763 .1U/10V_4@EV PEG_TX11
CFG_20 GFX_VID_0 TP78 CRT_TVO_IREF PEG_TX_11
B32 GFXVR_VID_1 R241 33_4@IV VSYNC_INT L29 AA36 C_PEG_TX12 C765 .1U/10V_4@EV PEG_TX12
GFX_VID_1 TP77 19 INT_VSYNC CRT_VSYNC PEG_TX_12
G33 GFXVR_VID_2 AA39 C_PEG_TX13 C768 .1U/10V_4@EV PEG_TX13
GFX_VID_2 TP35 PEG_TX_13
F33 GFXVR_VID_3 AD42 C_PEG_TX14 C771 .1U/10V_4@EV PEG_TX14
GFX_VID_3 TP41 PEG_TX_14
R29 E33 GFXVR_VID_4 AD46 C_PEG_TX15 C773 .1U/10V_4@EV PEG_TX15
25 PM_SYNC# PM_SYNC# GFX_VID_4 TP36 PEG_TX_15
3,23,40 H_DPRSTP# B7 PM_DPRSTP#
PM_EXTTS#0 N33 VCCP
10 PM_EXTTS#0 PM_EXT_TS#_0
PM
PM_EXTTS#1 P32 UMA & Discrete setting CANTIGA_PM/GM

PM_EXT_TS#_1 GFXVR_EN
B 25,40 DELAY_VR_PWRGOOD AT40 PWROK GFX_VR_EN C34 TP81 CRT/TV HB2 Discrete / HB2 UMA&CH5 1.8VSUS I&E Dis/Enable setting B
R141100/F_4 RST_IN#_MCH AT11 R246
12,24 PLT_RST-R#
R162 0_4 PM_THRMTRIP#_R T20 RSTIN#
0.35 V 1K/F_4 ---------------------------
3,23 PM_THRMTRIP# THERMTRIP#
25,40 DPRSLPVR R32 DPRSLPVR
R192 0 75
MCH_CLVREF R199 0 75
AH37 R232
CL_CLK CL_CLK0 25 R209 0 75
GMCH pwrok is 3.3v BG48
CL_DATA AH36
AN36
CL_DATA0 25
C300 R233 R239 NC 33 1K/F_4
NC_1 CL_PWROK ECPWROK 25,35 .1U/10V_4
tolerant 499/F_4
ME
BF48 NC_2 CL_RST# AJ35 CL_RST#0 25 R241 NC 33

BD48 AH34 SM_RCOMP_VOH
NC_3 CL_VREF R195 0 1.02K
BC48 NC_4
1
BH47 R227 NC 0 C318
NC_5 C730
BG47
BE47
NC_6
N28 DDPC_CTRLCLK R212 NC 0 .01U/16V_4 2.2U/6.3V_6 R524
NC_7 DDPC_CTRLCLK TP33
BH46 NC_8 DDPC_CTRLDATA M28 R201 *4.7K_4@NC
VCC3
R234 NC 0 3.01K/F_4
BF46 G36 SDVO_CLK
R522 NC 0
2
NC_9 SDVO_CTRLCLK
NC
BG45 E36 SDVO_DATA

NC_10 SDVO_CTRLDATA R235 NC 0 SM_RCOMP_VOL
BH44 <check list> <check list>
MISC
NC_11 CLKREQ# K36 CLK_MCH_OE# 2

BH43 NC_12 ICH_SYNC# H36 MCH_ICH_SYNC# 25 For EV@ For IV@
BH6 VCCP C284
BH5
NC_13 C728 R214 Connect to GND Connect to 150ohm
VCC3 NC_14 MCH_TSATN R514 56.2/F_4 .01U/16V_4 2.2U/6.3V_6 CRT R/G/B CRT R/G/B
BG4 NC_15 TSATN# B12
BH3 1K/F_4 TV A/B/C TV A/B/C
NC_16
BF3 NC_17 HSYNC/VSYNC Connect to 39ohm
BH2 NC_18
R245 10K/F_4 PM_EXTTS#0 BG2 B28 HSYNC/VSYNC
NC_19 HDA_BCLK ACZ_BITCLK_MCH 23
BE2 NC_20 HDA_RST# B30 ACZ_RST#_MCH 23
R240 10K/F_4 PM_EXTTS#1 BG1 B29 ACZ_SDIN3_MCH R521 *0_4@NC
NC_21 HDA_SDI ACZ_SDIN3 23
HDA
BF1 NC_22 HDA_SDO C29 ACZ_SDOUT_MCH 23 R226 150/F CRT_B_1

no RAM sensor so del PM_EXTTS#1 BD1
BC1
NC_23 HDA_SYNC A28 ACZ_SYNC_MCH 23
NC_24
wxx 11/27 F1
A47
NC_25
R207 150/F CRT_G_1
NC_26 R223 150/F CRT_R_1
CANTIGA_PM/GM 1.8VSUS
ACZ_BITCLK_MCH
VCC3
A R274 A
*1K/F_4@NC SMDDR_VREF DREFCLK R267 *0_4@EV
R257 R255 R519 DREFCLK# R260 *0_4@EV
*4.7K_4@NC *33_4@NC DREFSSCLK R264 *0_4@EV
*4.7K_4@NC SMDDR_VREF_MCH R275 0_4 DREFSSCLK# R265 *0_4@EV
C402 HB2 Discrete DREFCLK/ DREFCLK# 0　
SDVO_DATA C722 C401 R276 HB2 Discrete DREFSSCLK/ DREFSSCLK# 0　
*33P/50V_4@NC .1U/10V_4 470P/50V_4 *1K/F_4@NC
SDVO_CLK HB2 UMA&CH5 DREFCLK/ DREFCLK# NC
HB2 UMA&CH5 DREFSSCLK/ DREFSSCLK# NC PROJECT : CH5
No SDVO,so do not stuff PU resistor Quanta Computer Inc.
wxx20071221
Cantiga DMI/DISP 2/5 1A

5 4 3 2 1
5 4 3 2 1
07
D D
10 M_A_DQ[63:0]
U37D
10 M_B_DQ[63:0]
M_A_DQ0 AJ38 BD21 U37E
SA_DQ_0 SA_BS_0 M_A_BS#0 10,11
M_A_DQ1 AJ41 BG18 M_B_DQ0 AK47 BC16
SA_DQ_1 SA_BS_1 M_A_BS#1 10,11 SB_DQ_0 SB_BS_0 M_B_BS#0 10,11
M_A_DQ2 AN38 AT25 M_B_DQ1 AH46 BB17
SA_DQ_2 SA_BS_2 M_A_BS#2 10,11 SB_DQ_1 SB_BS_1 M_B_BS#1 10,11
M_A_DQ3 AM38 M_B_DQ2 AP47 BB33
SA_DQ_3 SB_DQ_2 SB_BS_2 M_B_BS#2 10,11
M_A_DQ4 AJ36 BB20 M_B_DQ3 AP46
SA_DQ_4 SA_RAS# M_A_RAS# 10,11 SB_DQ_3
M_A_DQ5 AJ40 BD20 M_B_DQ4 AJ46
SA_DQ_5 SA_CAS# M_A_CAS# 10,11 SB_DQ_4
M_A_DQ6 AM44 AY20 M_B_DQ5 AJ48 AU17
SA_DQ_6 SA_WE# M_A_WE# 10,11 SB_DQ_5 SB_RAS# M_B_RAS# 10,11
M_A_DQ7 AM42 M_B_DQ6 AM48 BG16
SA_DQ_7 SB_DQ_6 SB_CAS# M_B_CAS# 10,11
M_A_DQ8 AN43 M_B_DQ7 AP48 BF14
SA_DQ_8 SB_DQ_7 SB_WE# M_B_WE# 10,11
M_A_DQ9 AN44 M_B_DQ8 AU47
M_A_DQ10 SA_DQ_9 M_B_DQ9 SB_DQ_8
AU40 SA_DQ_10 M_A_DM[7:0] 10 AU46 SB_DQ_9
M_A_DQ11 AT38 AM37 M_A_DM0 M_B_DQ10 BA48
M_A_DQ12 SA_DQ_11 SA_DM_0 M_A_DM1 M_B_DQ11 SB_DQ_10
AN41 SA_DQ_12 SA_DM_1 AT41 AY48 SB_DQ_11 M_B_DM[7:0] 10
M_A_DQ13 AN39 AY41 M_A_DM2 M_B_DQ12 AT47 AM47 M_B_DM0
M_A_DQ14 SA_DQ_13 SA_DM_2 M_A_DM3 M_B_DQ13 SB_DQ_12 SB_DM_0 M_B_DM1
AU44 SA_DQ_14 SA_DM_3 AU39 AR47 SB_DQ_13 SB_DM_1 AY47
M_A_DQ15 AU42 BB12 M_A_DM4 M_B_DQ14 BA47 BD40 M_B_DM2
M_A_DQ16 SA_DQ_15 SA_DM_4 M_A_DM5 M_B_DQ15 SB_DQ_14 SB_DM_2 M_B_DM3
AV39 SA_DQ_16 SA_DM_5 AY6 BC47 SB_DQ_15 SB_DM_3 BF35
M_A_DQ17 AY44 AT7 M_A_DM6 M_B_DQ16 BC46 BG11 M_B_DM4
B
SA_DQ_17 SA_DM_6 SB_DQ_16 SB_DM_4
A
M_A_DQ18 BA40 AJ5 M_A_DM7 M_B_DQ17 BC44 BA3 M_B_DM5
M_A_DQ19 SA_DQ_18 SA_DM_7 M_B_DQ18 SB_DQ_17 SB_DM_5 M_B_DM6
BD43 SA_DQ_19 M_A_DQS[7:0] 10 BG43 SB_DQ_18 SB_DM_6 AP1
M_A_DQ20 AV41 AJ44 M_A_DQS0 M_B_DQ19 BF43 AK2 M_B_DM7
M_A_DQ21 SA_DQ_20 SA_DQS_0 M_A_DQS1 M_B_DQ20 SB_DQ_19 SB_DM_7
AY43 SA_DQ_21 SA_DQS_1 AT44 BE45 SB_DQ_20 M_B_DQS[7:0] 10
M_A_DQ22 M_A_DQS2 M_B_DQ21 M_B_DQS0
MEMORY
BB41 BA43 BC41 AL47
MEMORY
C M_A_DQ23 SA_DQ_22 SA_DQS_2 M_A_DQS3 M_B_DQ22 SB_DQ_21 SB_DQS_0 M_B_DQS1 C
BC40 SA_DQ_23 SA_DQS_3 BC37 BF40 SB_DQ_22 SB_DQS_1 AV48
M_A_DQ24 AY37 AW12 M_A_DQS4 M_B_DQ23 BF41 BG41 M_B_DQS2
M_A_DQ25 SA_DQ_24 SA_DQS_4 M_A_DQS5 M_B_DQ24 SB_DQ_23 SB_DQS_2 M_B_DQS3
BD38 SA_DQ_25 SA_DQS_5 BC8 BG38 SB_DQ_24 SB_DQS_3 BG37
M_A_DQ26 AV37 AU8 M_A_DQS6 M_B_DQ25 BF38 BH9 M_B_DQS4
M_A_DQ27 SA_DQ_26 SA_DQS_6 M_A_DQS7 M_B_DQ26 SB_DQ_25 SB_DQS_4 M_B_DQS5
AT36 SA_DQ_27 SA_DQS_7 AM7 M_A_DQS#[7:0] 10 BH35 SB_DQ_26 SB_DQS_5 BB2
M_A_DQ28 AY38 AJ43 M_A_DQS#0 M_B_DQ27 BG35 AU1 M_B_DQS6
M_A_DQ29 SA_DQ_28 SA_DQS#_0 M_A_DQS#1 M_B_DQ28 SB_DQ_27 SB_DQS_6 M_B_DQS7
BB38 SA_DQ_29 SA_DQS#_1 AT43 BH40 SB_DQ_28 SB_DQS_7 AN6 M_B_DQS#[7:0] 10
M_A_DQ30 AV36 BA44 M_A_DQS#2 M_B_DQ29 BG39 AL46 M_B_DQS#0
M_A_DQ31 SA_DQ_30 SA_DQS#_2 M_A_DQS#3 M_B_DQ30 SB_DQ_29 SB_DQS#_0 M_B_DQS#1
AW36 SA_DQ_31 SA_DQS#_3 BD37 BG34 SB_DQ_30 SB_DQS#_1 AV47
M_A_DQ32 BD13 AY12 M_A_DQS#4 M_B_DQ31 BH34 BH41 M_B_DQS#2
AU11 SA_DQ_33 SA_DQS#_5 BD8 BH14 SB_DQ_32 SB_DQS#_3 BH37
M_A_DQ34 BC11 AU9 M_A_DQS#6 M_B_DQ33 BG12 BG9 M_B_DQS#4
SYSTEM
BA12 AM8 BH11 BC2
SYSTEM
M_A_DQ36 SA_DQ_35 SA_DQS#_7 M_B_DQ35 SB_DQ_34 SB_DQS#_5 M_B_DQS#6

AU13 SA_DQ_36 M_A_A[14:0] 10,11 BG8 SB_DQ_35 SB_DQS#_6 AT2
M_A_DQ37 AV13 BA21 M_A_A0 M_B_DQ36 BH12 AN5 M_B_DQS#7
M_A_DQ38 SA_DQ_37 SA_MA_0 M_A_A1 M_B_DQ37 SB_DQ_36 SB_DQS#_7
BD12 SA_DQ_38 SA_MA_1 BC24 BF11 SB_DQ_37 M_B_A[14:0] 10,11
M_A_DQ39 BC12 BG24 M_A_A2 M_B_DQ38 BF8 AV17 M_B_A0
M_A_DQ40 SA_DQ_39 SA_MA_2 M_A_A3 M_B_DQ39 SB_DQ_38 SB_MA_0 M_B_A1
BB9 SA_DQ_40 SA_MA_3 BH24 BG7 SB_DQ_39 SB_MA_1 BA25
M_A_DQ41 BA9 BG25 M_A_A4 M_B_DQ40 BC5 BC25 M_B_A2
AU10 SA_DQ_42 SA_MA_5 BA24 BC6 SB_DQ_41 SB_MA_3 AU25
M_A_DQ43 AV9 BD24 M_A_A6 M_B_DQ42 AY3 AW25 M_B_A4
BA11 SA_DQ_44 SA_MA_7 BG27 AY1 SB_DQ_43 SB_MA_5 BB28
M_A_DQ45 BD9 BF25 M_A_A8 M_B_DQ44 BF6 AU28 M_B_A6
AY8 SA_DQ_46 SA_MA_9 AW24 BF5 SB_DQ_45 SB_MA_7 AW28
M_A_DQ47 BA6 BC21 M_A_A10 M_B_DQ46 BA1 AT33 M_B_A8
SA_DQ_47 SA_MA_10 SB_DQ_46 SB_MA_8
DDR
M_A_DQ48 M_A_A11 M_B_DQ47 M_B_A9
DDR
AV5 SA_DQ_48 SA_MA_11 BG26 BD3 SB_DQ_47 SB_MA_9 BD33

M_A_DQ49 AV7 BH26 M_A_A12 M_B_DQ48 AV2 BB16 M_B_A10
AT9 SA_DQ_50 SA_MA_13 BH17 AU3 SB_DQ_49 SB_MA_11 AW33
M_A_DQ51 AN8 AY25 M_A_A14 M_B_DQ50 AR3 AY33 M_B_A12
M_A_DQ52 SA_DQ_51 SA_MA_14 M_B_DQ51 SB_DQ_50 SB_MA_12 M_B_A13
AU5 SA_DQ_52 AN2 SB_DQ_51 SB_MA_13 BH15
B M_A_DQ53 AU6 M_B_DQ52 AY2 AU33 M_B_A14 B
M_A_DQ54 SA_DQ_53 M_B_DQ53 SB_DQ_52 SB_MA_14
AT5 SA_DQ_54 AV1 SB_DQ_53
M_A_DQ55 AN10 M_B_DQ54 AP3
AM11 SA_DQ_56 AR1 SB_DQ_55
M_A_DQ57 AM5 M_B_DQ56 AL1
AJ9 SA_DQ_58 AL2 SB_DQ_57
M_A_DQ59 AJ8 M_B_DQ58 AJ1
AN12 SA_DQ_60 AH1 SB_DQ_59
M_A_DQ61 AM13 M_B_DQ60 AM2
AJ11 SA_DQ_62 AM3 SB_DQ_61
M_A_DQ63 AJ12 M_B_DQ62 AH3
SA_DQ_63 M_B_DQ63 SB_DQ_62
AJ3 SB_DQ_63
CANTIGA_PM/GM
CANTIGA_PM/GM
A A
PROJECT : CH5
Cantiga DDR2 3/5 1A

5 4 3 2 1
5 4 3 2 1
1.8VSUS
AP33
AN33
BH32
U37G
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
W28
V28
W26
VCCP
Ivcc_axg=6326.84mA
HB2 Discrete NC, HB2 UMA&CH5 stuff
08
BG32 VCC_SM_4 VCC_AXG_NCTF_4 V26
BF32 W25 +
VCC_SM_5 VCC_AXG_NCTF_5 C709 C247 C286 C233 C312 C256 C229 C248
BD32 VCC_SM_6 VCC_AXG_NCTF_6 V25
BC32 W24 .47U/6.3V_4@IV 1U/6.3V_4@IV 10U/6.3V/X5R_8@IV 10U/6.3V/X5R_8@IV .1U/10V_4@IV .1U/10V_4@IV
VCC_SM_7 VCC_AXG_NCTF_7
BB32 VCC_SM_8 VCC_AXG_NCTF_8 V24
BA32 W23 330u/2.5V_7343@IV 10U/6.3V/X5R_8@IV
VCC_SM_9 VCC_AXG_NCTF_9
AY32 VCC_SM_10 VCC_AXG_NCTF_10 V23
D AW32 AM21 D
VCC_SM_11 VCC_AXG_NCTF_11 U37F
AV32 VCC_SM_12 VCC_AXG_NCTF_12 AL21
AU32 VCC_SM_13 VCC_AXG_NCTF_13 AK21
VCC_SM 3000mA AT32 VCC_SM_14 VCC_AXG_NCTF_14 W21
AR32 VCC_SM_15 VCC_AXG_NCTF_15 V21 Ivcc=1930.4+508.12=2438.52mA
POWER
AP32 VCC_SM_16 VCC_AXG_NCTF_16 U21 VCCP AG34 VCC_1
AN32 VCC_SM_17 VCC_AXG_NCTF_17 AM20 AC34 VCC_2
BH31 VCC_SM_18 VCC_AXG_NCTF_18 AK20 AB34 VCC_3
POWER
BG31 W20 + C260 AA34
VCC_SM_19 VCC_AXG_NCTF_19 C694 C265 C310 C280 C221 VCC_4
BF31 VCC_SM_20 VCC_AXG_NCTF_20 U20 Y34 VCC_5
BG30 AM19 *330u_2.5V_7343@NC 10U/6.3V/X5R_8 10U/6.3V/X5R_8 .33U/6.3V/X5R_4 .33U/6.3V/X5R_4 .1U/10V_4 V34
VCC_SM_21 VCC_AXG_NCTF_21 VCC_6
BH29 VCC_SM_22 VCC_AXG_NCTF_22 AL19 U34 VCC_7
BG29 VCC_SM_23 VCC_AXG_NCTF_23 AK19 AM33 VCC_8
BF29 VCC_SM_24 VCC_AXG_NCTF_24 AJ19 AK33 VCC_9
BD29 VCC_SM_25 VCC_AXG_NCTF_25 AH19 AJ33 VCC_10
BC29
BB29
VCC_SM_26 VCC SM VCC_AXG_NCTF_26 AG19
AF19
AG33
AF33
VCC_11
BA29 VCC_SM_28 VCC_AXG_NCTF_28 AE19
AY29 VCC_SM_29 VCC_AXG_NCTF_29 AB19 AE33 VCC_13
AW29 AA19 AC33
VCC CORE
AV29 VCC_SM_31 VCC_AXG_NCTF_31 Y19 AA33 VCC_15
AU29 VCC_SM_32 VCC_AXG_NCTF_32 W19 Y33 VCC_16
AT29 VCC_SM_33 VCC_AXG_NCTF_33 V19 W33 VCC_17
AR29 U19 1.8VSUS V33
AP29 VCC_SM_35 VCC_AXG_NCTF_35 AM17 U33 VCC_19
VCC_SM_36 VCC_AXG_NCTF_36 AK17 AH28 VCC_20
through BA36 VCC_SM_36/NC VCC_AXG_NCTF_37 AH17 AF28 VCC_21
BB24 AG17 AC28
VCC_SM_42 can BD16
VCC_SM_37/NC VCC_AXG_NCTF_38
AF17 C294 C291 C317 C293 C223 AA28
VCC_22
be left as NC for VCC_SM_38/NC VCC_AXG_NCTF_39 VCC_23
BB21 VCC_SM_39/NC VCC_AXG_NCTF_40 AE17 AJ26 VCC_24
C 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 .1U/10V_4 C
DDR2 desgins. AW16 VCC_SM_40/NC VCC_AXG_NCTF_41 AC17 AG26 VCC_25
AW13 VCC_SM_41/NC VCC_AXG_NCTF_42 AB17 AE26 VCC_26
AT13 VCC_SM_42/NC VCC_AXG_NCTF_43 Y17 AC26 VCC_27
VCC_AXG_NCTF_44 W17 AH25 VCC_28
VCCP V17 AG25
VCC GFX NCTF
VCC_AXG_NCTF_45 VCC_29
VCC_AXG_NCTF_46 AM16 AF25 VCC_30
Y26 VCC_AXG_1 VCC_AXG_NCTF_47 AL16 AG24 VCC_31
AE25 AK16 AJ23 VCCP
VCC_AXG_2 VCC_AXG_NCTF_48 VCC_32
AB25 VCC_AXG_3 VCC_AXG_NCTF_49 AJ16 AH23 VCC_33
AA25 VCC_AXG_4 VCC_AXG_NCTF_50 AH16 AF23 VCC_34
AE24 VCC_AXG_5 VCC_AXG_NCTF_51 AG16 VCC_NCTF_1 AM32
AC24 VCC_AXG_6 VCC_AXG_NCTF_52 AF16 T32 VCC_35 VCC_NCTF_2 AL32
AA24 VCC_AXG_7 VCC_AXG_NCTF_53 AE16 VCC_NCTF_3 AK32
Y24 VCC_AXG_8 VCC_AXG_NCTF_54 AC16 VCC_NCTF_4 AJ32
AE23 VCC_AXG_9 VCC_AXG_NCTF_55 AB16 VCC_NCTF_5 AH32
AC23 VCC_AXG_10 VCC_AXG_NCTF_56 AA16 VCC_NCTF_6 AG32
AB23 VCC_AXG_11 VCC_AXG_NCTF_57 Y16 VCC_NCTF_7 AE32
AA23 VCC_AXG_12 VCC_AXG_NCTF_58 W16 VCC_NCTF_8 AC32
AJ21 VCC_AXG_13 VCC_AXG_NCTF_59 V16 VCC_NCTF_9 AA32
AG21 VCC_AXG_14 VCC_AXG_NCTF_60 U16 VCC_NCTF_10 Y32
AE21 VCC_AXG_15 VCC_NCTF_11 W32
AC21 VCC_AXG_16 VCC_NCTF_12 U32
AA21 VCC_AXG_17 VCC_NCTF_13 AM30
Y21 VCC_AXG_18 VCC_NCTF_14 AL30
AH20 VCC_AXG_19 VCC_NCTF_15 AK30
AF20 VCC_AXG_20 VCC_NCTF_16 AH30
AE20 VCC_AXG_21 VCC_NCTF_17 AG30
AC20 VCC_AXG_22 VCC_NCTF_18 AF30
AB20 VCC_AXG_23 VCC_NCTF_19 AE30
AA20 VCC_AXG_24 VCC_NCTF_20 AC30
B T17 AB30 B
VCC_AXG_25 VCC_NCTF_21
T16 VCC_AXG_26 VCC_NCTF_22 AA30
AM15 VCC_AXG_27 VCC_NCTF_23 Y30
AL15 VCC_AXG_28 VCC_NCTF_24 W30
AE15 V30
VCC NCTF
VCC_AXG_29 VCC_NCTF_25
AJ15 VCC_AXG_30 VCC_NCTF_26 U30
AH15 VCC_AXG_31 VCC_NCTF_27 AL29
AG15 VCC_AXG_32 VCC_NCTF_28 AK29
AF15 VCC_AXG_33 VCC_NCTF_29 AJ29
AB15 VCC_AXG_34 VCC_NCTF_30 AH29
AA15 VCC_AXG_35 VCC_NCTF_31 AG29
VCC GFX
Y15 VCC_AXG_36 VCC_NCTF_32 AE29

V15 VCC_AXG_37 VCC_NCTF_33 AC29
U15 VCC_AXG_38 VCC_NCTF_34 AA29
AN14 VCC_AXG_39 VCC_NCTF_35 Y29
AM14 VCC_AXG_40 VCC_NCTF_36 W29
VCCP U14 AV44 +VCCSM_LF1 V29
VCC_AXG_41 VCC_SM_LF1 VCC_NCTF_37
VCC SM LF
T14 BA37 +VCCSM_LF2 AL28

VCC_AXG_42 VCC_SM_LF2 +VCCSM_LF3 VCC_NCTF_38
VCC_SM_LF3 AM40 VCC_NCTF_39 AK28
AV21 +VCCSM_LF4 AL26
R156 VCC_SM_LF4 +VCCSM_LF5 VCC_NCTF_40
VCC_SM_LF5 AY5 VCC_NCTF_41 AK26
10_4 AM10 +VCCSM_LF6 AK25
VCC_SM_LF6 +VCCSM_LF7 VCC_NCTF_42
VCC_SM_LF7 BB13 VCC_NCTF_43 AK24
VCC_NCTF_44 AK23
C224 C211 C210 C246 C375 C350 C408
VCC_AXG_SENSE AJ14
VSS_AXG_SENSE VCC_AXG_SENSE .1U/10V_4 .1U/10V_4 .33U/6.3V/X5R_4 .33U/6.3V/X5R_4 .47U/6.3V/X5R_4 1U/6.3V/X5R_4 1U/6.3V/X5R_4
AH14 VSS_AXG_SENSE
R146
A 10_4 CANTIGA_PM/GM A
CANTIGA_PM/GM
PROJECT : CH5
Cantiga Vcc 4/5 1A
Date: Friday, February 22, 2008 Sheet 8 of 49

5 4 3 2 1
5 4 3 2 1
UMA & Discrete setting UMA & Discrete setting
09
VCCP 2,3,4,5,6,8,23,26,40,41,46
PLL HB2 Discrete / HB2 UMA&CH5 CRT HB2 Discrete / CH5 UMA&CH5 VCC3 2,4,6,10,12,15,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,43,46
--------------------------- --------------------------- VCCA_CRT_DAC 73mA VCC1.5 4,23,24,26,27,28,41,46
1.8VSUS 6,8,10,19,39,41,42,46
L34 NC 10uH R193 NC 0 VCC3 R193 0_6@IV +3V_A_CRT_DAC
+1.05V_PEG 6 VCCP
C508 NC 220U C244 0 0.1U
U37H
C412 0 0.1U C251 NC 0.01U C244 C251 VTT 852mA
L55 NC 10uH .1U/10V_4 .01U/16V_4
VTT_1 U13
C725 NC 220U VTT_2 T13
B27 VCCA_CRT_DAC_1 VTT_3 U12
C724 0 0.1U A26 T12 C208 C213 C209 C212 + C689
VCCA_CRT_DAC_2 VTT_4 .47U/6.3V/X5R_4 2.2U/6.3V/X5R_6 4.7U/6.3V/X5R_6 4.7U/6.3V/X5R_6 330u_2.5V_7343
VCCA_DAC_BG 5mA VTT_5 U11
VCCP T11
VTT_6
D VCCA_DPLLA/B 64.8mA +1.05V_DPLLA R202 0_6@IV+3V_A_DAC_BG A25 U10 D
CRT
VCC3 VCCA_DAC_BG VTT_7
B25 VSSA_DAC_BG VTT_8 T10
L34 10uH/100MA_8@IV UMA & Discrete setting C277 U9
VTT_9
CRT HB2 Discrete / HB2 UMA&CH5 C289 .01U/16V_4@IV
VTT_10 T9
1
.1U/10V_4 U8 VCC_AXF 321.35mA

C508 + C412 --------------------------- +1.05V_DPLLA F47
VTT_11
T8
220U/2.5V_3528@IV .1U/10V_4 R202 NC 0 VCCA_DPLLA VTT_12 +1.05V_AXF R516 0_6
U7
VTT
VTT_13 VCCP
C289 0 0.1U +1.05V_DPLLB L48 T7
2
VCCA_DPLLB VTT_14
U6
+1.05V_DPLLB C277 NC 0.01U +1.05V_HPLL AD1
VTT_15
T6
PLL
VCCA_HPLL VTT_16 C716 C718
VTT_17 U5
L55 10uH/100MA_8@IV +1.05V_MPLL AE1 T5 1U/6.3V/X5R_4 10U/6.3V/X5R_8
VCCA_MPLL VTT_18
V3
UMA & Discrete setting VTT_19
1
VTT_20 U3
C725 + C724 LVDS HB2 Discrete / HB2 UMA&CH5 +1.8VSUS_TX_LVDS J48 V2
220U/2.5V_3528@IV .1U/10V_4 C415 VCCA_LVDS VTT_21
U2
A LVDS
--------------------------- 1000P/50V_4@IV J47
VTT_22
T2
2
C415 NC 1000P VSSA_LVDS VTT_23 1.8VSUS

VTT_24 V1 VCC_SM_CK 124mA
U1 L54
VTT_25 +1.8VSUS_SM_CK
VCCA_PEG_BG 0.414mA
VCCP R528 0_6 +1.5V_PEG_BG AD48 1uH/300mA_8
+1.05V_HPLL VCC1.5 VCCA_PEG_BG
VCCA_HPLL 24mA C758
L14 TB160808B121_6 .1U/10V_4 R515
A PEG
1/F_6
C404 .1U/10V_4 +1.05V_PEGPLL AA48 C717 C231
C201 C197 VCCP VCCA_PEG_PLL 10U/6.3V_8 .1U/10V_4 +1.8VSUS_SM_CK_L
4.7U/6.3V/X5R_6 .1U/10V_4 VCCA_SM 720mA
R169 0_6 +1.05V_A_SM AR20 C236
VCCA_SM_1 10U/6.3V_8
AP20 VCCA_SM_2
C C708 C697 AN20 C
+1.05V_MPLL
+
10U/6.3V/X5R_8 10U/6.3V/X5R_8 AR17
AP17
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
POWER
L12 TB160808B121_6 VCCA_MPLL 139.2mA C691 AN17 VCC_TX_LVDS 132mA 1.8VSUS
VCCA_SM_6
AT16 VCCA_SM_7
*220U/2.5V_3528@NC C695 C239 AR16 +1.8VSUS_TX_LVDS L35 UMA & Discrete setting
A SM
10U/6.3V/X5R_8 4.7U/6.3V/X5R_6 C245 VCCA_SM_8 1uH/300mA_8@IV
VCCD_HPLL 157.2mA AP16 VCCA_SM_9
CRT HB2 Discrete / HB2 UMA&CH5
+1.05V_MCH_PLL R127 0.5/F_6 1U/6.3V/X5R_4 C406 C501 C507
.1U/10V_4 10U/6.3V/X5R_8@IV ---------------------------
10U/6.3V/X5R_8@IV
C195 C187 L35 NC 1uH
VCCP VCCA_SM_CK 124mA C406 0 0.1U
10U/6.3V/X5R_8 .1U/10V_4
R230 0_6 +1.05V_A_SM_CK AP28
C501 NC 10U
VCCA_SM_CK_1
AN28 VCCA_SM_CK_2 VCC_AXF_1 B22 C507 NC 10U
AP25 B21
AXF
C254 C296 C258 VCCA_SM_CK_3 VCC_AXF_2
AN25 VCCA_SM_CK_4 VCC_AXF_3 A21
2.2U/6.3V/X5R_6 10U/6.3V/X5R_8 .1U/10V_4 AN24 VCCA_SM_CK_5 VCCP
AM28 VCCA_SM_CK_NCTF_1
AM26
2
A CK
VCCA_SM_CK_NCTF_2
AM25 VCCA_SM_CK_NCTF_3
VCC1.5 D7
VCCD_TVDAC 35mA AL25 VCCA_SM_CK_NCTF_4 VCC_SM_CK_1 BF21
UMA & Discrete setting AM24 BH20 RB501V-40
SM CK
R205 0_6 +1.5V_TVDAC VCCA_SM_CK_NCTF_5 VCC_SM_CK_2
TV HB2 Discrete / HB2 UMA&CH5
VCC3
AL24 VCCA_SM_CK_NCTF_6 VCC_SM_CK_3 BG20
VCCA_TV_DAC 79mA AM23 BF20
1
--------------------------- L17 AL23
VCCA_SM_CK_NCTF_7 VCC_SM_CK_4 +1.05V_HV_MCH
C259 C261 C230 0 0.1U VCCA_SM_CK_NCTF_8
1 2 +3V_A_TV_DAC +3V_HV VCC3
.1U/10V_4 .022U/16V_4 HCB1608KF-181T15_6@IV R250
C225 NC 10U 10_4
C225 C230 K47 VCC_HV 105.3mA
L17 NC HCB1608KF-181 B24
VCC_TX_LVDS +3V_HV
B 10U/6.3V/X5R_8@IV .1U/10V_4 VCCA_TV_DAC_1 R263 0_6 B
VCCD_QDAC 0.5mA A24 VCCA_TV_DAC_2 VCC_HV_1 C35
TV
L22 +1.5V_QDAC B35
HCB1608KF-181T15_6@IV C319 VCC_HV_2
UMA & Discrete setting A35
HV
.1U/10V_4@IV VCC_HV_3 C343
HDA HB2 Discrete / HB2 UMA&CH5 VCC_HDA 50mA .1U/10V_4
C301 C340 R523 +1.5V_HDA A32 C332
---------------------------VCC1.5 VCC_HDA
HDA
.1U/10V_4 C331 1U/6.3V/X5R_4@IV 0_6@IV V48 .1U/10V_4
.022U/16V_4@IV C729 0 0.1U C729 VCC_PEG_1
VCC_PEG_2 U48
.1U/10V_4 +1.05V_PEG VCCP
R523 NC 0 V47
PEG
VCC_PEG_3
VCC_PEG_4 U47 VCC_PEG 1782mA
D TV/CRT
UMA & Discrete setting +1.5V_TVDAC M25 U46 L56 0_8
VCCD_TVDAC VCC_PEG_5
QDAC HB2 Discrete / HB2 UMA&CH5
1
+1.5V_QDAC L28 C760
--------------------------- VCCD_QDAC
AH48 +1.05V_RXR_DMI 4.7U/6.3V/X5R_6 + C759
L22 NC HCB1608KF-181 +1.05V_MCH_PLL VCC_DMI_1 10U/6.3V/X5R_8
AF1 VCCD_HPLL VCC_DMI_2 AF48
C319 NC 0.1U AH47 C766
DMI
2
C207 +1.05V_PEGPLL VCC_DMI_3
AA47 AG47
C301 0 0.1U .1U/10V_4 VCCD_PEG_PLL VCC_DMI_4 *330u_2.5V_7343@NC
C331 NC 0.022U C413 VCCP
.1U/10V_4 M38 VCC_DMI 456mA
C340 NC 1U VCCD_LVDS_1
LVDS
L37 A8 +VTTLF_CAP1 L58 0_6

VCCD_LVDS_2 VTTLF1 +VTTLF_CAP2
VTTLF2 L1
VTTLF
VCCD_LVDS 60.31mA AB2 +VTTLF_CAP3
VTTLF3
1.8VSUS R268 +1.8VSUS_GMCH_VCCD C761

+1.05V_PEGPLL 0_6@IV .1U/10V_4
CANTIGA_PM
VCCP C414
L57 VCCA/D_PEG_PLL 100mA UMA & Discrete setting C377
HCB1608KF-181T15_6 .1U/10V_4 10U/6.3V/X5R_8@IV +VTTLF_CAP1
LVDS HB2 Discrete / HB2 UMA&CH5 +VTTLF_CAP2
A +VTTLF_CAP3 A
R270 ---------------------------
1/F_6 R268 NC 0
C377 0 0.1U C202 C185 C696
C414 NC 10U .47U/6.3V/X5R_4 .47U/6.3V/X5R_4 .47U/6.3V/X5R_4
C334 PROJECT : CH5
10U/6.3V/X5R_8
Cantiga Power 5/5 1A

5 4 3 2 1
5 4 3 2 1
M_A_DM[7:0] 7
M_A_DQ[63:0] 7
M_B_DM[7:0] 7
M_B_DQ[63:0] 7
M_B_DQS[7:0] 7
10
M_A_DQS[7:0] 7 M_B_DQS#[7:0] 7
SMDDR_VREF_DIMM
M_A_DQS#[7:0] 7 M_B_A[14:0] 7,11
SMDDR_VREF_DIMM
M_A_A[14:0] 7,11
1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS
CN17
CN18 1 2
VREF VSS46 M_B_DQ4
1 VREF VSS46 2 3 VSS47 DQ4 4
3 4 M_A_DQ4 M_B_DQ0 5 6 M_B_DQ1
D VSS47 DQ4 DQ0 DQ5 D
M_A_DQ6 5 6 M_A_DQ0 M_B_DQ5 7 8
M_A_DQ5 DQ0 DQ5 DQ1 VSS15 M_B_DM0
7 DQ1 VSS15 8 9 VSS37 DM0 10
9 10 M_A_DM0 M_B_DQS#0 11 12
M_A_DQS#0 VSS37 DM0 M_B_DQS0 DQS#0 VSS5 M_B_DQ2
11 DQS#0 VSS5 12 13 DQS0 DQ6 14
M_A_DQS0 13 14 M_A_DQ7 15 16 M_B_DQ6
DQS0 DQ6 M_A_DQ1 M_B_DQ7 VSS48 DQ7 C316 470P/50V
15 VSS48 DQ7 16 17 DQ2 VSS16 18
M_A_DQ2 17 18 M_B_DQ3 19 20 M_B_DQ12 1 2 SMDDR_VREF_DIMM R252 0 SMDDR_VREF
M_A_DQ3 DQ2 VSS16 M_A_DQ13 DQ3 DQ12 M_B_DQ13
19 DQ3 DQ12 20 21 VSS38 DQ13 22
21 22 M_A_DQ9 M_B_DQ9 23 24
M_A_DQ12 VSS38 DQ13 M_B_DQ8 DQ8 VSS17 M_B_DM1 R258
23 DQ8 VSS17 24 25 DQ9 DM1 26 1.8VSUS
M_A_DQ8 25 26 M_A_DM1 27 28
DQ9 DM1 M_B_DQS#1 VSS49 VSS53 R244 *10K/F *10K/F
27 VSS49 VSS53 28 29 DQS#1 CK0 30 M_B_CLK0 6
M_A_DQS#1 29 30 M_B_DQS1 31 32
DQS#1 CK0 M_A_CLK0 6 DQS1 CK0# M_B_CLK0# 6
M_A_DQS1 31 32 33 34
DQS1 CK0# M_A_CLK0# 6 VSS39 VSS41
33 34 M_B_DQ11 35 36 M_B_DQ14
M_A_DQ11 VSS39 VSS41 M_A_DQ14 M_B_DQ10 DQ10 DQ14 M_B_DQ15
35 DQ10 DQ14 36 37 DQ11 DQ15 38
M_A_DQ15 37 38 M_A_DQ10 39 40
DQ11 DQ15 VSS50 VSS54
39 VSS50 VSS54 40
PC4800 DDR2 SDRAM 41 VSS18 VSS20 42
41 42 M_B_DQ20 43 44 M_B_DQ16
43 DQ16 DQ20 44 45 DQ17 DQ21 46
M_A_DQ20 M_A_DQ16 1.8VSUS
PC4800 DDR2 SDRAM

45
47
DQ17 DQ21 46
48 M_B_DQS#2
47
49
VSS1 VSS6 48
50 PM_EXTTS#0 Place these Caps near So-Dimm2.
M_A_DQS#2 VSS1 VSS6 PM_EXTTS#0 M_B_DQS2 DQS#2 NC3 M_B_DM2
49 DQS#2 NC3 50 PM_EXTTS#0 6 51 DQS2 DM2 52
M_A_DQS2 M_A_DM2
SO-DIMM (200P)
51 DQS2 DM2 52 53 VSS19 VSS21 54
53 54 M_B_DQ22 55 56 M_B_DQ18
55 DQ18 DQ22 56 57 DQ19 DQ23 58
SO-DIMM (200P)
M_A_DQ19 57 58 M_A_DQ22 59 60 C109 C139 C156 C204 C134 C144 C149 C147 C180 C170 C182
DQ19 DQ23 M_B_DQ29 VSS22 VSS24 M_B_DQ24 2.2U/6.3V2.2U/6.3V2.2U/6.3V2.2U/6.3V2.2U/6.3V.1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V
59 VSS22 VSS24 60 61 DQ24 DQ28 62
M_A_DQ24 61 62 M_A_DQ29 M_B_DQ28 63 64 M_B_DQ25
M_A_DQ25 DQ24 DQ28 M_A_DQ28 DQ25 DQ29
63 DQ25 DQ29 64 65 VSS23 VSS25 66
65 66 M_B_DM3 67 68 M_B_DQS#3
M_A_DM3 VSS23 VSS25 M_A_DQS#3 DM3 DQS#3 M_B_DQS3
67 DM3 DQS#3 68 69 NC4 DQS3 70
C M_A_DQS3 C
69 NC4 DQS3 70 71 VSS9 VSS10 72
71 72 M_B_DQ26 73 74 M_B_DQ31
73 DQ26 DQ30 74 75 DQ27 DQ31 76
M_A_DQ27 75 76 M_A_DQ31 77 78 SMDDR_VREF_DIMM VCC3
DQ27 DQ31 VSS4 VSS8
77
79
VSS4 VSS8 78
80
6,11 M_B_CKE0 79
81
CKE0 CKE1 80
82
M_B_CKE1 6,11 SO-DIMM BYPASS PLACEMENT :
6,11 M_A_CKE0 CKE0 CKE1 M_A_CKE1 6,11 VDD7 VDD8
81
83
VDD7 VDD8 82
84
83
85
NC1 A15 84
86 M_B_A14 Place these Caps near So-Dimm2
NC1 A15 7,11 M_B_BS#2 A16_BA2 A14
M_A_A14 C345 C346 C44 C49
.1U/10V No Vias Between the Trace of
7,11 M_A_BS#2 85 A16_BA2 A14 86 87 VDD9 VDD11 88
87 88 M_B_A12 89 90 M_B_A11 .1U/10V 2.2U/6.3V 2.2U/6.3V
VDD9 VDD11 A12 A11
M_A_A12
M_A_A9
89
91
A12 A11 90
92
M_A_A11
M_A_A7
M_B_A9
M_B_A8
91
93
A9 A7 92
94
M_B_A7
M_B_A6
PIN to CAP.
M_A_A8 A9 A7 M_A_A6 A8 A6
93 A8 A6 94 95 VDD5 VDD4 96
95 96 M_B_A5 97 98 M_B_A4
M_A_A5 VDD5 VDD4 M_A_A4 M_B_A3 A5 A4 M_B_A2
97 A5 A4 98 99 A3 A2 100
M_A_A3 99 100 M_A_A2 M_B_A1 101 102 M_B_A0
M_A_A1 A3 A2 M_A_A0 A1 A0
101 A1 A0 102 103 VDD10 VDD12 104
103 104 M_B_A10 105 106
VDD10 VDD12 A10/AP BA1 M_B_BS#1 7,11
M_A_A10 105 106 7,11 M_B_BS#0 107 108
A10/AP BA1 M_A_BS#1 7,11 BA0 RAS# M_B_RAS# 7,11
7,11 M_A_BS#0 107 BA0 RAS# 108 M_A_RAS# 7,11 7,11 M_B_WE# 109 WE# S0# 110 M_B_CS#0 6,11
7,11 M_A_WE# 109 WE# S0# 110 M_A_CS#0 6,11 111 VDD2 VDD1 112
111 VDD2 VDD1 112 7,11 M_B_CAS# 113 CAS# ODT0 114 M_B_ODT0 6,11
113 114 115 116 M_B_A13
7,11 M_A_CAS# CAS# ODT0 M_A_ODT0 6,11 6,11 M_B_CS#1 S1# A13
115 116 M_A_A13 117 118
6,11 M_A_CS#1 S1# A13 VDD3 VDD6
117 VDD3 VDD6 118 6,11 M_B_ODT1 119 ODT1 NC2 120
1.8VSUS
6,11 M_A_ODT1 119
121
ODT1 NC2 120
122 M_B_DQ37
121
123
VSS11 VSS12 122
124 M_B_DQ36 Place these Caps near So-Dimm1.
123 DQ32 DQ36 124 125 DQ33 DQ37 126
M_A_DQ37 125 126 M_A_DQ33 127 128
DQ33 DQ37 M_B_DQS#4 VSS26 VSS28 M_B_DM4
127 VSS26 VSS28 128 129 DQS#4 DM4 130
M_A_DQS#4 129 130 M_A_DM4 M_B_DQS4 131 132
M_A_DQS4 DQS#4 DM4 DQS4 VSS42 M_B_DQ39 C135 C176 C193 C168 C110 C181 C148 C143 C151 C171 C200
131 DQS4 VSS42 132 133 VSS2 DQ38 134
133 134 M_A_DQ35 M_B_DQ34 135 136 M_B_DQ33 2.2U/6.3V 2.2U/6.3V 2.2U/6.3V2.2U/6.3V 2.2U/6.3V.1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V
B M_A_DQ39 VSS2 DQ38 M_A_DQ38 M_B_DQ35 DQ34 DQ39 B
135 DQ34 DQ39 136 137 DQ35 VSS55 138
M_A_DQ34 137 138 139 140 M_B_DQ44
DQ35 VSS55 M_A_DQ44 M_B_DQ40 VSS27 DQ44 M_B_DQ45
139 VSS27 DQ44 140 141 DQ40 DQ45 142
M_A_DQ40 141 142 M_A_DQ45 M_B_DQ41 143 144
M_A_DQ41 DQ40 DQ45 DQ41 VSS43 M_B_DQS#5
143 DQ41 VSS43 144 145 VSS29 DQS#5 146
145 146 M_A_DQS#5 M_B_DM5 147 148 M_B_DQS5
M_A_DM5 VSS29 DQS#5 M_A_DQS5 DM5 DQS5
147
149
DM5 DQS5 148
150 M_B_DQ46
149
151
VSS51 VSS56 150
152 M_B_DQ42 SMDDR_VREF_DIMM VCC3 SO-DIMM BYPASS PLACEMENT :
151 DQ42 DQ46 152 153 DQ43 DQ47 154
M_A_DQ46 M_A_DQ47
153
155
DQ43 DQ47 154
156 M_B_DQ53
155
157
VSS40 VSS44 156
158 M_B_DQ52 Place these Caps near So-Dimm1.
M_A_DQ49
157
159
DQ48 DQ52 158
160 M_A_DQ52
159
161
DQ49 DQ53 160
162 C365 C388 C46 C50 No Vias Between the Trace of
DQ49 DQ53 VSS52 VSS57
161
163
VSS52 VSS57 162
164
163
165
NCTEST CK1 164
166
M_B_CLK1 6
.1U/10V 2.2U/6.3V 2.2U/6.3V .1U/10V
PIN to CAP.
NCTEST CK1 M_A_CLK1 6 VSS30 CK1# M_B_CLK1# 6
165 166 M_B_DQS#6 167 168
VSS30 CK1# M_A_CLK1# 6 DQS#6 VSS45
M_A_DQS#6 167 168 M_B_DQS6 169 170 M_B_DM6
M_A_DQS6 DQS#6 VSS45 M_A_DM6 DQS6 DM6
169 DQS6 DM6 170 171 VSS31 VSS32 172
171 172 M_B_DQ51 173 174 M_B_DQ55
173 DQ50 DQ54 174 175 DQ51 DQ55 176
M_A_DQ51 175 176 M_A_DQ55 177 178
DQ51 DQ55 M_B_DQ56 VSS33 VSS35 M_B_DQ60
177 VSS33 VSS35 178 179 DQ56 DQ60 180
M_A_DQ56 179 180 M_A_DQ61 M_B_DQ61 181 182 M_B_DQ57
M_A_DQ60 DQ56 DQ60 M_A_DQ57 DQ57 DQ61
181 DQ57 DQ61 182 183 VSS3 VSS7 184
183 184 M_B_DM7 185 186 M_B_DQS#7
M_A_DM7 VSS3 VSS7 M_A_DQS#7 DM7 DQS#7 M_B_DQS7
185 DM7 DQS#7 186 187 VSS34 DQS7 188
187 188 M_A_DQS7 M_B_DQ59 189 190
M_A_DQ62 VSS34 DQS7 M_B_DQ62 DQ58 VSS36 M_B_DQ63
189 DQ58 VSS36 190 191 DQ59 DQ62 192
M_A_DQ59 191 192 M_A_DQ58 193 194 M_B_DQ58
DQ59 DQ62 M_A_DQ63 CGDAT_SMB VSS14 DQ63
193 VSS14 DQ63 194 2,27 CGDAT_SMB 195 SDA VSS13 196
CGDAT_SMB 195 196 2,27 CGCLK_SMB CGCLK_SMB 197 198 R64 10K
CGCLK_SMB SDA VSS13 R67 10K VCC3_SPD SCL SA0 R66 10K
197 SCL SA0 198 199 VDD(SPD) SA1 200
VCC3 R69 0 VCC3_SPD 199 200 R63 10K
VDD(SPD) SA1 2-1734073-2
A VCC3_SPD A
DDR2_SODIMM
SO-DIMM0 SPD Address is 0xA0 SO-DIMM1 SPD Address is 0xA4
CLOCKA 0,1 CKEA 0,1 H 4.0 CLOCKB 0,1 CKEB 0,1 H 8.0
SO-DIMM0 TS Address is 0x30 SO-DIMM1 TS Address is 0x34
PROJECT : CH5
DDR2 1A

5 4 3 2 1
1 2 3 4 5 6 7 8
DDRII DUAL CHANNEL A,B

11
A A
DDRII A CHANNEL DDRII B CHANNEL

M_B_A[14:0]
M_A_A[14:0] M_B_A[14:0] 7,10
M_A_A[14:0] 7,10
SMDDR_VTERM SMDDR_VTERM
SMDDR_VTERM
C190 C179 C163 C125 C120 C126 C157 C141 C140 C118 C138 C122 C107 C194 C191 C145 C119 C137 C121 C115 C159 C127 C178 C142 C123 C111
.1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V
B B
Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM
RP12 1 2 56X2
7,10 M_B_BS#1
M_B_A0 3 4
M_B_A5 RP15 1 2 56X2
M_B_A1 3 4
M_B_A8 RP19 1 2 56X2
M_B_A3 3 4 SMDDR_VTERM
6,10 M_A_ODT0 M_A_ODT0 RP3 1 2 56X2
M_A_A13 3 4 M_B_A4 RP13 1 2 56X2
M_A_A8 RP18 1 2 56X2 M_B_A2 3 4
M_A_A5 3 4 M_B_A12 RP22 1 2 56X2
M_A_A3 RP14 1 2 56X2 M_B_A9 3 4
M_A_A1 3 4 SMDDR_VTERM M_B_A7 RP17 1 2 56X2
M_B_A6 3 4
M_A_CKE1 RP24 1 2 56X2 7,10 M_B_BS#2 RP26 1 2 56X2
6,10 M_A_CKE1
M_A_A11 3 4 3 4 SMDDR_VTERM
6,10 M_B_CKE0
M_A_A10 RP9 1 2 56X2
M_A_BS#0 3 4 7,10 M_B_RAS# RP8 1 2 56X2
7,10 M_A_BS#0
M_A_A7 RP20 1 2 56X2 3 4
6,10 M_B_CS#0
M_A_A6 3 4 RP7 1 2 56X2
7,10 M_B_BS#0
M_A_A2 RP16 1 2 56X2 7,10 M_B_CAS# 3 4
M_A_A4 3 4 SMDDR_VTERM M_B_A10 RP10 1 2 56X2
7,10 M_B_WE# 3 4 SMDDR_VTERM
C RP11 1 2 56X2 C
7,10 M_A_RAS#
M_A_BS#1 3 4
7,10 M_A_BS#1
M_A_A9 RP25 3 4 56X2
M_A_A12 1 2
RP5 1 2 56X2
7,10 M_A_WE#
3 4 SMDDR_VTERM
7,10 M_A_CAS#
M_A_A14 R125 56.2/F_4 RP6 1 2 56X2
6,10 M_A_CS#0
M_A_A0 3 4
M_B_A14 R130 56.2/F_4 M_B_A13 RP4 1 2 56X2
6,10 M_B_ODT0 3 4
6,10 M_B_ODT1 M_ODT3 RP1 1 2 56X2
6,10 M_B_CS#1 3 4
RP2 1 2 56X2
6,10 M_A_CS#1
M_ODT1 3 4
6,10 M_A_ODT1
RP23 1 2 56X2
6,10 M_B_CKE1
M_B_A11 3 4
RP27 1 2 56X2
6,10 M_A_CKE0
3 4 SMDDR_VTERM
7,10 M_A_BS#2
D D
PROJECT : CH5
DDR2 1A

1 2 3 4 5 6 7 8
5 4 3 2 1
NB9P-GE2/GS (G96) NB9P-GS and GE2 have the same pin assignments but different frequency.
GS for CH5,while GE2 for HB2
wxx 20071214
12
U39A
PEG_TX[15:0] 6
PEG_TX0
+VGA1.1V BGA969-NVIDIA-NB9P-GS PEG_TX1
NB9P GS/GE2: need change to +1.1V COMMON PEG_TX2
AK16 AP17 PEG_TX0 PEG_TX3
PEX_IOVDD_1 PEX_RX0 PEG_TX#0 PEG_TX4
AK17 PEX_IOVDD_2 PEX_RX0* AN17
AK21 AN19 PEG_TX1 PEG_TX5
D
C485 C371 C398 C409 C417 C441 C419 PEX_IOVDD_3 PEX_RX1 PEG_TX#1 PEG_TX6 D
AK24 PEX_IOVDD_4 PEX_RX1* AP19
22U/6.3V_8 4.7U/6.3V/06 1U/10V/04 1U/10V/04 0.1U/10V/04 0.1U/10V/04 0.47U/10V_6_G AK27 AR19 PEG_TX2 PEG_TX7
PEX_IOVDD_5 PEX_RX2 PEG_TX#2 PEG_TX8
PEX_RX2* AR20
AP20 PEG_TX3 PEG_TX9
PEX_RX3 PEG_TX#3 PEG_TX10
PEX_RX3* AN20
AG11 AN22 PEG_TX4 PEG_TX11
PEX_IOVDDQ_1 PEX_RX4 PEG_TX#4 PEG_TX12
AG12 PEX_IOVDDQ_2 PEX_RX4* AP22
AG13 AR22 PEG_TX5 PEG_TX13
+VGA1.1V PEX_IOVDDQ_3 PEX_RX5 PEG_TX#5 PEG_TX14
AG15 PEX_IOVDDQ_4 PEX_RX5* AR23
AG16 AP23 PEG_TX6 PEG_TX15
PEX_IOVDDQ_5 PEX_RX6 PEG_TX#6
AG17 PEX_IOVDDQ_6 PEX_RX6* AN23
AG18 AN25 PEG_TX7
PEX_IOVDDQ_7 PEX_RX7 PEG_TX#[15:0] 6
AG22 AP25 PEG_TX#7 PEG_TX#0
C482 C429 C428 C407 C382 C361 PEX_IOVDDQ_8 PEX_RX7* PEG_TX8 PEG_TX#1
AG23 PEX_IOVDDQ_9 PEX_RX8 AR25
22U/6.3V_8 4.7U/6.3V/06 1U/10V/04 0.47U/10V_6_G 0.47U/10V_6_G 0.1U/10V/04 AG24 AR26 PEG_TX#8 PEG_TX#2
PEX_IOVDDQ_10 PEX_RX8* PEG_TX9 PEG_TX#3
AG25 PEX_IOVDDQ_11 PEX_RX9 AP26
AG26 AN26 PEG_TX#9 PEG_TX#4
AJ14 PEX_IOVDDQ_13 PEX_RX10 AN28
AJ15 AP28 PEG_TX#10 PEG_TX#6
AJ19 PEX_IOVDDQ_15 PEX_RX11 AR28
AJ21 AR29 PEG_TX#11 PEG_TX#8
Near BGA AJ22
AJ24
PEX_IOVDDQ_17 PEX_RX12 AP29
AN29 PEG_TX#12 PEG_TX#10
AJ25 PEX_IOVDDQ_19 PEX_RX13 AN31
AJ27 AP31 PEG_TX#13 PEG_TX#12
AK18 PEX_IOVDDQ_21 PEX_RX14 AR31
AK20 AR32 PEG_TX#14 PEG_TX#14
AK23 PEX_IOVDDQ_23 PEX_RX15 AR34
AK26 AP34 PEG_TX#15
PEX_IOVDDQ_24 PEX_RX15*
C AL16 PEX_IOVDDQ_25
C
3V_VGA PEG_RX[15:0] 6
AL17 C_PEG_RX0 C327 0.1U/10V/04 PEG_RX0 PEG_RX0
PEX_TX0 C_PEG_RX#0 C338 0.1U/10V/04 PEG_RX#0 PEG_RX1
PEX_TX0* AM17
C_PEG_RX1 C341 0.1U/10V/04 PEG_RX1 PEG_RX2
J10
J11
VDD33_1 PCI EXPRESS PEX_TX1 AM18
AM19 C_PEG_RX#1 C352 0.1U/10V/04 PEG_RX#1 PEG_RX3
VDD33_2 PEX_TX1* C_PEG_RX2 C356 0.1U/10V/04 PEG_RX2 PEG_RX4
J12 VDD33_3 PEX_TX2 AL19
C305 C283 C304 C306 C307 C308 J13 AK19 C_PEG_RX#2 C364 0.1U/10V/04 PEG_RX#2 PEG_RX5
1U/10V/04 0.47U/10V_6_G 0.1U/10V/04 .022U/16V_4 .022U/16V_4 .022U/16V_4 VDD33_4 PEX_TX2* C_PEG_RX3 C369 0.1U/10V/04 PEG_RX3 PEG_RX6
J9 VDD33_5 PEX_TX3 AL20
PEX_TX3* C_PEG_RX4 C383 0.1U/10V/04 PEG_RX4 PEG_RX8
PEX_TX4 AM21
AD20 VDD_SENSE PEX_TX5 AL22
AK22 C_PEG_RX#5 C405 0.1U/10V/04 PEG_RX#5 PEG_RX11
C309 C302 C303 PEX_TX5* C_PEG_RX6 C410 0.1U/10V/04 PEG_RX6 PEG_RX12
PEX_TX6 AL23
0.47U/10V_6_G 0.1U/10V/04 .022U/16V_4 AM23 C_PEG_RX#6 C416 0.1U/10V/04 PEG_RX#6 PEG_RX13
AD19 GND_SENSE PEX_TX7 AM24
+VGA1.1V PEX_TX7* C_PEG_RX8 C432 0.1U/10V/04 PEG_RX8
PEX_TX8 AL25
12~16 mils width AK25 C_PEG_RX#8 C442 0.1U/10V/04 PEG_RX#8
PEX_TX8* PEG_RX#[15:0] 6
L27 10nH_6_G +PEX_PLLVDD AG14 AL26 C_PEG_RX9 C443 0.1U/10V/04 PEG_RX9 PEG_RX#0
PEX_PLLVDD PEX_TX9 C_PEG_RX#9 C446 0.1U/10V/04 PEG_RX#9 PEG_RX#1
PEX_TX9* AM26
AM27 C_PEG_RX10 C448 0.1U/10V/04 PEG_RX10 PEG_RX#2
C384 C323 C347 C335 C358 PEX_TX10 C_PEG_RX#10 C451 0.1U/10V/04 PEG_RX#10 PEG_RX#3
PEX_TX10* AM28
4.7U/6.3V/06 4.7U/6.3V/06 1U/10V/04 0.1U/10V/04 0.01U/16V_4_G AG19 AL28 C_PEG_RX11 C453 0.1U/10V/04 PEG_RX11 PEG_RX#4
PEX_CAL_PD_VDDQ PEX_TX11 C_PEG_RX#11 C457 0.1U/10V/04 PEG_RX#11 PEG_RX#5
PEX_TX11* AK28
AK29 C_PEG_RX12 C463 0.1U/10V/04 PEG_RX12 PEG_RX#6
PEX_TX12 C_PEG_RX#12 C472 0.1U/10V/04 PEG_RX#12 PEG_RX#7
PEX_TX12* AL29
AG20 AM29 C_PEG_RX13 C474 0.1U/10V/04 PEG_RX13 PEG_RX#8
PEX_CAL_PU_GND PEX_TX13 C_PEG_RX#13 C478 0.1U/10V/04 PEG_RX#13 PEG_RX#9
B PEX_TX13* AM30 B
AM31 C_PEG_RX14 C480 0.1U/10V/04 PEG_RX14 PEG_RX#10
PEX_TX14 C_PEG_RX#14 C483 0.1U/10V/04 PEG_RX#14 PEG_RX#11
PEX_TX14* AM32
A2 AN32 C_PEG_RX15 C493 0.1U/10V/04 PEG_RX15 PEG_RX#12
NC_1 PEX_TX15 C_PEG_RX#15 C491 0.1U/10V/04 PEG_RX#15 PEG_RX#13
AB7 NC_2 PEX_TX15* AP32
AD6 PEG_RX#14
NC_3 PEG_RX#15
AF6 NC_4
AG6 AR16 CLK_PCIE_VGA
NC_5 PEX_REFCLK CLK_PCIE_VGA 2
AJ5 AR17 CLK_PCIE_VGA#
NC_6 PEX_REFCLK* CLK_PCIE_VGA# 2 VCC3
AK15 NC_7
AL7 NC_8
D35 AJ17 R266 *200/F_4@NC C892 .1U
NC_9 PEX_TSTCLK_OUT
E35 NC_10 PEX_TSTCLK_OUT* AJ18
5
E7 NC_11
F7 NC_12 2 VGA_RST_R# 35
H32 AM16 VGA_RST# R510 100/F_4 VGA_RST_L# 4
NC_13 PEX_RST*
M7 NC_14 1 PLT_RST-R# PLT_RST-R# 6,24
P6 AR13 T40
NC_15 PEX_CLKREQ* TC7SH08FU
P7
3
NC_16 PEX_TERMP R272 2.49K/1%
R7 NC_17 PEX_TERMP AG21 U54
U7 NC_18
V6 AP35 TESTMODE R299 10K/04
NC_19 TESTMODE R505 *0_4
Note for C stage:

NP9P GS/GE2 Need stuff R794 and R796 Delete D30, add U54,C892.
nVidia FAE 12/05 CH5: stuff U54,C892,unstuff R505.
R509 HB2: stuff R505, unstuff U54,C892.
A *100K/F_4@NC 3/26 A
PROJECT : CH5
NV9X (PCIE I/F) 1/5 1A

5 4 3 2 1
5 4 3 2 1
13
U39B U39C
BGA969-NVIDIA-NB9P-GS BGA969-NVIDIA-NB9P-GS
COMMON COMMON
V32 R30 VMA_DQ0 C17 D11 VMC_DQ0

17 VMA_MA4 FBA_CMD0 FBA_D0 17 VMA_DQ[63..0] 18 VMC_MA4 FBC_CMD0 FBC_D0
VMA_DQ1 VMC_DQ1
17 VMA_RAS# W31 FBA_CMD1 MEMORY I/F A FBA_D1 R32
VMA_DQ2
18 VMC_RAS# B19 FBC_CMD1 FBC_D1 E11
VMC_DQ2
17
17
VMA_MA5
VMA_BA1
U31
Y32
FBA_CMD2 FBA_D2 P31
N30 VMA_DQ3
17 VMA_DM[7..0] 18
18
VMC_MA5
VMC_BA1
D18
F21
FBC_CMD2 MEMORY I/F B FBC_D2 F10
D8 VMC_DQ3
FBA_CMD3 FBA_D3 VMA_DQ4 FBC_CMD3 FBC_D3 VMC_DQ4
17 VMA_MA2H AB35 FBA_CMD4 FBA_D4 L31 17 VMA_WDQS[7..0] 18 VMC_MA2H A23 FBC_CMD4 FBC_D4 F8
AB34 M32 VMA_DQ5 D21 F9 VMC_DQ5
17 VMA_MA4H FBA_CMD5 FBA_D5 18 VMC_MA4H FBC_CMD5 FBC_D5
W35 M30 VMA_DQ6 B23 E8 VMC_DQ6
17 VMA_MA3H FBA_CMD6 FBA_D6 17 VMA_RDQS[7..0] 18 VMC_MA3H FBC_CMD6 FBC_D6
W33 L30 VMA_DQ7 E20 F12 VMC_DQ7
17 VMA_CS0# W30 FBA_CMD8 FBA_D8 P33 18 VMC_CS0# G21 FBC_CMD8 FBC_D8 B11
T34 P34 VMA_DQ9 F20 C13 VMC_DQ9
17 VMA_MA11 FBA_CMD9 FBA_D9 18 VMC_MA11 FBC_CMD9 FBC_D9
T35 N35 VMA_DQ10 F19 A11 VMC_DQ10
17 VMA_CAS# FBA_CMD10 FBA_D10 del MA12&ODT 18 VMC_CAS# FBC_CMD10 FBC_D10
D AB31 P35 VMA_DQ11 F23 B8 VMC_DQ11 D
17 VMA_WE# FBA_CMD11 FBA_D11 18 VMC_WE# FBC_CMD11 FBC_D11
del MA12&ODT
Y30 N34 VMA_DQ12 A22 A8 VMC_DQ12

17 VMA_BA0 FBA_CMD12 FBA_D12 18 VMC_BA0 FBC_CMD12 FBC_D12
Y34 L33 VMA_DQ13 C22 C8 VMC_DQ13
17 VMA_MA5H FBA_CMD13 FBA_D13 18 VMC_DQ[63..0] 18 VMC_MA5H FBC_CMD13 FBC_D13
VMA_MA12 W32 L32 VMA_DQ14 VMC_MA12 B17 C11 VMC_DQ14
VMA_RST AA30 N33 VMA_DQ15 VMC_RST F24 C10 VMC_DQ15
FBA_CMD15 FBA_D15 18 VMC_DM[7..0] FBC_CMD15 FBC_D15
AA32 K31 VMA_DQ16 C25 D12 VMC_DQ16
Y33 K30 VMA_DQ17 E22 E13 VMC_DQ17
17 VMA_MA10 FBA_CMD17 FBA_D17 18 VMC_WDQS[7..0] 18 VMC_MA10 FBC_CMD17 FBC_D17
VMA_CKE U32 G30 VMA_DQ18 VMC_CKE C20 F17 VMC_DQ18
17 VMA_CKE FBA_CMD18 FBA_D18 18 VMC_CKE FBC_CMD18 FBC_D18
Y31 K32 VMA_DQ19 B22 F15 VMC_DQ19
17 VMA_MA0 FBA_CMD19 FBA_D19 18 VMC_RDQS[7..0] 18 VMC_MA0 FBC_CMD19 FBC_D19
U34 G32 VMA_DQ20 A19 F16 VMC_DQ20
Y35 H30 VMA_DQ21 D22 E16 VMC_DQ21
W34 F30 VMA_DQ22 D20 F14 VMC_DQ22
V30 G31 VMA_DQ23 E19 F13 VMC_DQ23
U35 H33 VMA_DQ24 D19 D13 VMC_DQ24
U30 K35 VMA_DQ25 F18 A13 VMC_DQ25
VMA_MA13 U33 K33 VMA_DQ26 VMC_MA13 C19 B13 VMC_DQ26
T26 FBA_CMD26 FBA_D26 VMA_DQ27 T25 FBC_CMD26 FBC_D26 VMC_DQ27
17 VMA_BA2 AB30 FBA_CMD27 FBA_D27 G34 18 VMC_BA2 F22 FBC_CMD27 FBC_D27 A14
AB33 K34 VMA_DQ28 C23 C16 VMC_DQ28
T33 FBA_CMD29 FBA_D29 E33 B20 FBC_CMD29 FBC_D29 A17
nVidia FAE suggest use CMD27 W29 E34 VMA_DQ30 A20 B16 VMC_DQ30
instead of CMD7 as BA2 for
VMA_DM0 P30
FBA_D31 G33
AG30 VMA_DQ32 nVidia FAE suggest use CMD27 VMC_DM0 F11
FBC_D31 D16
D24 VMC_DQ32
supporting 32M*32 VRAM FBA_DQM0 FBA_D32 FBC_DQM0 FBC_D32
wxx 12/05
VMA_DM1
VMA_DM2
P32
J30
FBA_DQM1 FBA_D33 AH31
AG32
VMA_DQ33
VMA_DQ34
instead of CMD7 as BA2 for VMC_DM1
VMC_DM2
D10
D15
FBC_DQM1 FBC_D33 D26
E25
VMC_DQ33
VMC_DQ34
FBA_DQM2 FBA_D34 FBC_DQM2 FBC_D34
VMA_DM3
VMA_DM4
H34 FBA_DQM3 FBA_D35 AF31 VMA_DQ35
VMA_DQ36
supporting 32M*32 VRAM VMC_DM3
VMC_DM4
A16 FBC_DQM3 FBC_D35 F25 VMC_DQ35
VMC_DQ36
AF32 FBA_DQM4 FBA_D36 AF30 D27 FBC_DQM4 FBC_D36 F27
VMA_DM5 AF35 FBA_DQM5 FBA_D37 AD30 VMA_DQ37 wxx 12/05 VMC_DM5 D28 FBC_DQM5 FBC_D37 E28 VMC_DQ37
VMA_DM6 AL32 AC32 VMA_DQ38 VMC_DM6 D34 F28 VMC_DQ38
VMA_DM7 FBA_DQM6 FBA_D38 VMA_DQ39 VMC_DM7 FBC_DQM6 FBC_D38 VMC_DQ39
AL34 FBA_DQM7 FBA_D39 AE30 A34 FBC_DQM7 FBC_D39 D29
VMA_CKE AE32 VMA_DQ40 A25 VMC_DQ40
VMA_WDQS0 FBA_D40 VMA_DQ41 VMC_WDQS0 FBC_D40 VMC_DQ41
N31 FBA_DQS_WP0 FBA_D41 AF33 E10 FBC_DQS_WP0 FBC_D41 B25
VMA_WDQS1 L34 AF34 VMA_DQ42 VMC_WDQS1 A10 D25 VMC_DQ42
VMA_WDQS2 FBA_DQS_WP1 FBA_D42 VMA_DQ43 VMC_WDQS2 FBC_DQS_WP1 FBC_D42 VMC_DQ43
C
J32 FBA_DQS_WP2 FBA_D43 AE35 D14 FBC_DQS_WP2 FBC_D43 C26 C
R296 VMA_WDQS3 H35 AE33 VMA_DQ44 VMC_CKE VMC_WDQS3 C14 C28 VMC_DQ44
10K AE31 FBA_DQS_WP4 FBA_D45 AE34 E26 FBC_DQS_WP4 FBC_D45 B28
VMA_WDQS5 AC33 AC35 VMA_DQ46 VMC_WDQS5 B26 A28 VMC_DQ46
AJ32 FBA_DQS_WP6 FBA_D47 AB32 D32 FBC_DQS_WP6 FBC_D47 A29
VMA_WDQS7 AJ34 AN33 VMA_DQ48 R273 VMC_WDQS7 A32 E29 VMC_DQ48
FBA_DQS_WP7 FBA_D48 VMA_DQ49 FBC_DQS_WP7 FBC_D48 VMC_DQ49
FBA_D49 AK32 10K FBC_D49 F29
VMA_RDQS0 N32 AL33 VMA_DQ50 VMC_RDQS0 D9 D30 VMC_DQ50
VMA_RDQS1 FBA_DQS_RN0 FBA_D50 VMA_DQ51 VMC_RDQS1 FBC_DQS_RN0 FBC_D50 VMC_DQ51
L35 FBA_DQS_RN1 FBA_D51 AM33 B10 FBC_DQS_RN1 FBC_D51 E31
VMA_RDQS2 H31 AL31 VMA_DQ52 VMC_RDQS2 E14 C33 VMC_DQ52
G35 FBA_DQS_RN3 FBA_D53 AK30 B14 FBC_DQS_RN3 FBC_D53 D33
VMA_RDQS4 AD32 AJ30 VMA_DQ54 VMC_RDQS4 F26 F32 VMC_DQ54
AC34 FBA_DQS_RN5 FBA_D55 AH30 A26 FBC_DQS_RN5 FBC_D55 E32
VMA_RDQS6 AJ31 AM35 VMA_DQ56 VMC_RDQS6 D31 B29 VMC_DQ56
AJ35 FBA_DQS_RN7 FBA_D57 AH33 A31 FBC_DQS_RN7 FBC_D57 C29
AH35 VMA_DQ58 B31 VMC_DQ58
FBA_D58 VMA_DQ59 FBC_D58 VMC_DQ59
P29 FBA_WDS0 FBA_D59 AH32 G11 FBC_WDS0 FBC_D59 C31
R29 AH34 VMA_DQ60 G12 B32 VMC_DQ60
FBA_WDS0* FBA_D60 VMA_DQ61 FBC_WDS0* FBC_D60 VMC_DQ61
L29 FBA_WDS1 FBA_D61 AM34 G14 FBC_WDS1 FBC_D61 C32
M29 AL35 VMA_DQ62 G15 B34 VMC_DQ62
FBA_WDS1* FBA_D62 VMA_DQ63 FBC_WDS1* FBC_D62 VMC_DQ63
AD29 FBA_WDS2 FBA_D63 AJ33 G24 FBC_WDS2 FBC_D63 B35
AE29 FBA_WDS2* G25 FBC_WDS2*
AG29 VCC1.8 G27
FBA_WDS3 VMA_CLK0 FBC_WDS3 VMC_CLK0
AH29 FBA_WDS3* FBA_CLK0 T32 VMA_CLK0 17 G28 FBC_WDS3* FBC_CLK0 E17 VMC_CLK0 18
VCC1.8 T31 VMA_CLK0# VCC1.8 D17 VMC_CLK0#
FBA_CLK0* VMA_CLK0# 17 FBC_CLK0* VMC_CLK0# 18
AC31 VMA_CLK1 D23 VMC_CLK1
FBA_CLK1 VMA_CLK1 17 FBC_CLK1 VMC_CLK1 18
AA27 AC30 VMA_CLK1# N27 E23 VMC_CLK1#
FBVDDQ_1 FBA_CLK1* VMA_CLK1# 17 FBVDDQ_28 FBC_CLK1* VMC_CLK1# 18
AA29 R291 P27
FBVDDQ_2 *1K/F_4@NC FBVDDQ_29
AA31
AB27
FBVDDQ_3
15mils width
use internal Vref, ext R27
T27
FBVDDQ_30
FBVDDQ_4 FBVDDQ_31
AB29
AC27
FBVDDQ_5 FB_VREF J27 +FB_VREF1
divider no stuff U27
U29
FBVDDQ_32 NB9P GS/GE2: G96
FBVDDQ_6 FBVDDQ_33
AD27 FBVDDQ_7 V27 FBVDDQ_34
B AE27 FBVDDQ_8 V29 FBVDDQ_35 CS04422FB14 B
AJ28 C438 R288 V34
FBVDDQ_9 *0.1U/10V/04 *1K/F_4@NC FBVDDQ_36
B18 FBVDDQ_10 W27 FBVDDQ_37 FB_CAL_PD_VDDQ K27 FB_CAL_PD_VDDQ R278 44.2/F_4 VCC1.8
E21 FBVDDQ_11 Y27 FBVDDQ_38
G17 FBVDDQ_12 CS03092FB00
G18 L27 FB_CAL_PU_GND R279 30.9/F_4
FBVDDQ_13 FB_CAL_PU_GND
G22 FBVDDQ_14
G8 FBVDDQ_15 CS04022FB28
G9 FBVDDQ_16 FB_CAL_TERM_GND M27 FB_CAL_TERM_GND R285 40.2/F_4
H29
J14
FBVDDQ_17 For Debug only
FBVDDQ_18 FBA_DEBUG *60.4/F_4@NC R290 FBC_DEBUG R262 *60.4/F_4
J15 FBVDDQ_19 FBA_DEBUG T30 VCC1.8 FBC_DEBUG G19 VCC1.8
J16 FBVDDQ_20 L29
J17
J20
FBVDDQ_21
15mils width BLM18PG181SN1_G R262 unstuff
FBVDDQ_22 +FB_PLLAVDD +FB_PLLAVDD
J21 FBVDDQ_23 FB_DLLAVDD0 AG27 +VGA1.1V FB_DLLAVDD1 J19
J22 FBVDDQ_24 G96 only
J23 FBVDDQ_25 FB_PLLAVDD0 AF27 FB_PLLAVDD1 J18
J24 C450 C454 C456 C444 C435
FBVDDQ_26 0.1U/10V/04 0.1U/10V/04 1U/10V/04 0.1U/10V/04 0.1U/10V/04
J29 FBVDDQ_27
VMA_RST VCC1.8
VMA_RST 17 stuff 2 .1u cap for G96
FAE suggest 12/05
R286
C420 C357 C422 C351 C292 C421 C396 C363 C390 C389 C395 C374 C427 C433
10K_4@EV 4.7U/6.3V/06 0.47U/10V_6_G 0.47U/10V_6_G 0.1U/10V/04 4.7U/6.3V/06 0.47U/10V_6_G 0.47U/10V_6_G 0.1U/10V/04 0.1U/10V/04 0.1U/10V/04 0.1U/10V/04 0.1U/10V/04 0.1U/10V/04 0.1U/10V/04
A A
VCC1.8
VMC_RST
VMC_RST 18
R281 C275 C467 C282 C434 C373 C336 C424 C460 C468 C279 C459 C436 C439 C440 PROJECT : CH5
4.7U/6.3V/06 0.47U/10V_6_G 0.47U/10V_6_G 0.1U/10V/04 4.7U/6.3V/06 0.47U/10V_6_G 0.47U/10V_6_G 0.1U/10V/04 0.1U/10V/04 0.1U/10V/04 0.1U/10V/04 0.1U/10V/04 0.1U/10V/04 0.1U/10V/04
10K_4@EV

NV9X (MEMORY I/F) 2/5 1A

5 4 3 2 1
5 4 3 2 1
VCC1.8
U39D
BGA969-NVIDIA-NB9P-GS
COMMON
14
100 mA
L19 BLM18PG181SN1 +IFPAB_PLLVDD AK9 AM11
IFPAB_PLLVDD IFPA_TXC EXT_TXLCLKOUT+ 19
IFPA_TXC* AM12 EXT_TXLCLKOUT- 19
C266 C276 C285
R231 *1K/F_4@NC AJ11 IFPAB(LVDS) IFPA_TXD0 AM8
AL8
EXT_TXLOUT0+ 19
EXT_TXLOUT0- 19
4.7U/6.3V_6 4700P/25V_4 470P/50V_4 IFPAB_RSET IFPA_TXD0*
IFPA_TXD1 AM10 EXT_TXLOUT1+ 19
IFPA_TXD1* AM9 EXT_TXLOUT1- 19
IFPA_TXD2 AK10 EXT_TXLOUT2+ 19
50 mA IFPA_TXD2* AL10 EXT_TXLOUT2- 19
AG9 IFPA_IOVDD IFPA_TXD3 AK11
D IFPA_TXD3* AL11 D
50 mA IFPB_TXC AP13
L15 BLM18PG181SN1 +IFPAB_IOVDD AG10 AN13
IFPB_IOVDD IFPB_TXC*
IFPB_TXD4 AN8
C216 C217 C698 C700 C699 C701 AP8
IFPB_TXD4*
IFPB_TXD5 AP10
4.7U/6.3V_6 4.7U/6.3V_6 4700P/25V_4 4700P/25V_4 470P/50V_4 470P/50V_4 AN10
IFPB_TXD5*
IFPB_TXD6 AR11
VCC1.8 AR10
IFPB_TXD6*
IFPB_TXD7 AN11
IFPB_TXD7* AP11
L18 BLM18PG181SN1 +IFPCD_PLLVDD AJ9 AP2

IFPCD_PLLVDD IFPC_AUX
IFPC_AUX* AN3
C250 0827b C272 C262 C255 N_TX2_HDMI+ C727 .1U/10V_4
R165 1K/F_4 AK7
IFPCD IFPC_L0 AM7
AM6 N_TX2_HDMI- C726 .1U/10V_4
EXT_TX2_HDMI+ 22
EXT_TX2_HDMI- 22
1U/6.3V_4 4.7U/6.3V_6 4700P/25V_4 470P/50V_4 IFPCD_RSET IFPC_L0* N_TX1_HDMI+ C720 .1U/10V_4
IFPC_L1 AL5 EXT_TX1_HDMI+ 22
IFPC_L1* EXT_TX1_HDMI- 22
AM3 N_TX0_HDMI+ C712 .1U/10V_4
IFPC_L2 EXT_TX0_HDMI+ 22
IFPC_L2* EXT_TX0_HDMI- 22
AJ8 AP1 N_TXC_HDMI+ C713 .1U/10V_4
IFPC_IOVDD IFPC_L3 EXT_TXC_HDMI+ 22
AR2 N_TXC_HDMI- C710 .1U/10V_4
IFPC_L3* EXT_TXC_HDMI- 22
IFPCD_IOVDD is 1.1V for G96 IFPD_AUX AP4
AK8 IFPD_IOVDD IFPD_AUX* AN4
FAE 12/05 AR8
+VGA1.1V IFPD_L0
L26 BLM18PG181SN1 +IFPCD_IOVDD IFPD_L0* AR7
AP7
TMDS channel two
IFPD_L1
IFPD_L1* AN7
C274 C326 C315 C298 C287 C297 AN5
IFPD_L2
IFPD_L2* AP5
4.7U/6.3V_6 1U/6.3V_4 1U/6.3V_4 4700P/25V_4 470P/50V_4 470P/50V_4 AR5
IFPD_L3
IFPD_L3* AR4
IFPEF_PLLVDD AJ6 AE4

IFPEF_PLLVDD IFPE_AUX
T17 IFPE_AUX* AD4
R189 AL1
IFPEF IFPE_L0 AH6
AH5
IFPEF_RSET IFPE_L0*
IFPE_L1 AH4
C 10K/F_4 AG4 C
IFPE_L1*
IFPE_L2 AF4
IFPE_L2* AF5
AE7 IFPE_IOVDD IFPE_L3 AE6
IFPE_L3* AE5
AF3
Display port output
IFPF_AUX
AD7 IFPF_IOVDD IFPF_AUX* AF2
IFPF_L0 AL2
R216 AL3
IFPF_L0*
IFPF_L1 AJ3
10K/F_4 AJ2
IFPF_L1*
IFPF_L2 AJ1
IFPF_L2* AH1
IFPF_L3 AH2
3V_VGA AH3
IFPF_L3*
L21 BLM18PG181SN1 +DACA_VDD AJ12 AM15
DACA_VDD DACA_RED EXT_CRT_R 19
DACA_VREF AK12
DACA(CRT) AM14 EXT_CRT_G 19
DACA_VREF DACA_GREEN
0827b DACA_RSET AK13 AL14
DACA_RSET DACA_BLUE EXT_CRT_B 19
C257 C299 C288 C320
DACA_HSYNC AM13 EXT_HSYNC 19
4.7U/6.3V_6 4700P/25V_4 470P/50V_4 .1U/10V_4 R256 AL13
DACA_VSYNC EXT_VSYNC 19
124/F_4
G1 EXT_CRTCLK
I2CA_SCL EXT_CRTCLK 20
G4 EXT_CRTDAT
I2CA_SDA EXT_CRTDAT 20
R167 10K/F_4 +DACB_VDD AG7 AK4
DACC_VDD DACC_RED
T31 AK6
DACC(CRT2) AL4
DACC_VREF DACC_GREEN
T33 AH7 AJ4
DACC_RSET DACC_BLUE
DACC_HSYNC AM1
DACC_VSYNC AM2
B I2CB_SCL G3 EXT_HDMI_SCL 20 B
I2CB_SDA G2 EXT_HDMI_SDA 20
R21510K/F_4 +DACC_VD AC6 AA4
DACB_VDD DACB_RED
T29 DACB(TV)
AC5 DACB_VREF DACB_GREEN AB4
no need TV
T22 AB6 DACB_RSET DACB_BLUE Y4 wxx 07/11/27
+VGA1.1V AB5
DACB_CSYNC
L16 BLM18PG181SN1 12.00 +NV_PLLVDD AE9 D2 27M_SS
PLLVDD XTAL_SSIN BXTALOUT
C702 C215 C703 C704 C214 AD9
XTAL_PLL XTAL_OUTBUFF D1
VID_PLLVDD XTALIN
XTAL_IN B1
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 .1U/10V_4 .1U/10V_4 AF9 Y3 27MHZ
SP_PLLVDD XTALOUT
XTAL_OUT B2 2 1
C715 C714
33P_4 27P_4
STUFF PDs on XTALSSIN and

XTALOUTBUFF WHEN EXT_SS
IS NOT USED
SPREAD SPECTRUM 3V_VGA

3V_VGA R151 22_4 27M_SS
27M_SS
GFX27M_L
C234
R137 R136 10P/50V_4
10K/F_4 10K/F_4 BXTALOUT
EXT_CRT_R R251 150/F_4_G
U21
ICSS_PD 8 2 3V_SSC R168 4.7_6 R163 EXT_CRT_G R243 150/F_4_G
PD# VDD 3V_VGA R157 *10K/F_4@NC
A BXTALOUT 1 4 EXT_CRT_B R247 150/F_4_G A
CLKIN CLKOUT *10K/F_4@NC
5 ICSS_RFO C242 C237 C232 C228 Close to GPU
EXT_EDIDCLK REFOUT R150
15,20 EXT_EDIDCLK 7 SCL
EXT_EDIDDATA 6 3 10K/F_4 .1U/10V_4 4.7U/6.3V_6
15,20 EXT_EDIDDATA SDA GND 470P/50V_4 4.7U/6.3V_6
ICS91730AMLF-T Install it when not connected to Spread spectrum device
I2C ADDRESS: 0xD4H PROJECT : CH5

NV9X (DISPLAY) 3/5 1A

5 4 3 2 1
5 4 3 2 1
15
U39E
3V_VGA
COMMON
P9 N1 MIOA_D0 T28
MIOA_VDDQ_1 MIOA_D0 MIOA_D1 T13
R9 MIOA_VDDQ_2 MIOA MIOA_D1 P4
C264 C271 C269 C267 C270 T9 P1
MIOA_VDDQ_3 MIOA_D2
U9 MIOA_VDDQ_4 MIOA_D3 P2
4.7U/6.3V_6 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 P3
MIOA_D4
MIOA_D5 T3
T2 MIOA_D6 T32
MIOA_D6 T8
MIOA_D7 T1
U4 MIOA_D8 T19
R185 *49.9/F_4@NC MIOACAL_PD_VDDQ U5 MIOA_D8 MIOA_D9 T16
3V_VGA MIOA_CAL_PD_VDDQ MIOA_D9 U1
MIOA_D10 U2
not need stuff R178 *49.9/F_4@NC MIOACAL_PU_GND T5 MIOA_D11 U3
MIOA_CAL_PU_GND MIOA_D12 R6
D MIOA_D13 T6 D
MIOA_D14 N6
3V_VGA R142 *1K/F_4@NC MIOA_VREF N5 P5

MIOA_VREF MIOA_CTL3 MIOA_HSYNC T36
MIOA_HSYNC N3
MIOA_VSYNC L3
R144 C226 N2 T34
MIOA_DE
*1K/F_4@NC *.1U/10V_4@NC R4
MIOA_CLKOUT
MIOA_CLKOUT* T4
3V_VGA N4 R183 10K/F_4
MIOA_CLKIN
AA9 Y1 MIOB_D0 T39
MIOB_VDDQ_1 MIOB_D0 MIOB_D1 T18
AB9 MIOB_VDDQ_2 MIOB MIOB_D1 Y2
C278 C344 C313 C328 C333 W9 Y3 T5
MIOB_VDDQ_3 MIOB_D2 MIOB_D3 T27
Y9 MIOB_VDDQ_4 MIOB_D3 AB3
4.7U/6.3V_6 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 AB2 MIOB_D4 T38
MIOB_D4 MIOB_D5 T9
MIOB_D5 AB1
AC4 T24
MIOB_D6 MIOB_D7 T7
MIOB_D7 AC1
AC2 MIOB_D8 T14
R213 *49.9/F_4@NC MIOBCAL_PD_VDDQ MIOB_D8 MIOB_D9 T15
3V_VGA AA7 MIOB_CAL_PD_VDDQ MIOB_D9 AC3
not need stuff AE3 MIOB_D10 T20
MIOB_D10 MIOB_D11 T6
MIOB_D11 AE2
R145 *49.9/F_4@NC MIOBCAL_PU_GND
AA6 U6
MIOB_CAL_PU_GND MIOB_D12
MIOB_D13 W6
MIOB_D14 Y6
W5 STRAP0
R190 *1K/F_4@NC MIOB_VREF MIOB_D15 STRAP1
3V_VGA AF1 MIOB_VREF MIOB_D16 W7
V7 STRAP2
R175 C240 MIOB_D17
*1K/F_4@NC W3 MIOB_CTL3 T35
*.1U/10V_4@NC MIOB_CTL3 MIOB_HSYNC T10
MIOB_HSYNC W1
MIOB_VSYNC W2
Y5 MIOB_DE T23
MIOB_DE
MIOB_CLKOUT V4
MIOB_CLKOUT* W4
C AE1 R511 10K/F_4 C
MIOB_CLKIN
3V_VGA GFX_THMD- B4 K1 T12
THERMDN GPIO0
GPIO1 K2 N_HDMI_DET 22
JTAG_TMS R236 10K/F_4 K3 EXT_DPST_PWM
GPIO2 EXT_DPST_PWM 20
JTAG_TDI R237 10K/F_4 GFX_THMD+ B5 H3
THERMDP GPIO3 EXT_LVDS_DIGON 20
VGA_OVT# R206 10K/F_4 H2
GPIO4 EXT_LVDS_BLON 20
ALERT R229 10K/F_4 H1
GPIO5 V_PWRCNTL 39
JTAG_TCK T11
JTAG_TCK R248 10K/F_4 JTAG_TMS
AP14 JTAG_TCK MISC1 GPIO6 H4
T21
AR14 JTAG_TMS (GPIOS,JTAG,THERM,I2C) GPIO7 H5
JTAG_TRST# R249 10K/F_4 JTAG_TDI AN14 H6 VGA_OVT#
JTAG_TDI GPIO8 VGA_OVT# 4
EXT_DPST_PWMR181 2K/F_4 JTAG_TDO AN16 J7 ALERT
T41 JTAG_TDO GPIO9
JTAG_TRST# AP16 K4 T37
JTAG_TRST* GPIO10 T30
GPIO11 K5
H7 GFX_GPIO12
GPIO12 TP30
4 MBCLK2 E2 I2CS_SCL GPIO13 J4
4 MBDATA2 E1 I2CS_SDA GPIO14 J6
EXT_EDIDCLK R179 33_4 I2CC_SCL_G E3 L1
14,20 EXT_EDIDCLK I2CC_SCL GPIO15
EXT_EDIDDATA R187 33_4 I2CC_SDA_G E4 L2
14,20 EXT_EDIDDATA I2CC_SDA GPIO16
R191 2.2K_4 F4 L4
R196 2.2K_4 I2CD_SCL GPIO17
G5 I2CD_SDA GPIO18 M4
3V_VGA R197 2.2K_4 D5 L7
R198 2.2K_4 I2CE_SCL GPIO19 3V_VGA
E5 I2CE_SDA GPIO20 L5
GPIO21 K6
GPIO22 L6
M6 3V_VGA
GPIO23
J26 C3
R1
2
BBIASN_NC ROM_CS* ROM_SI
J25 BBIASP_NC MISC2(ROM) ROM_SI D3
ROM_SO
C4 D6
ROM_SO ROM_SCLK R148
D7 HDA_BCLK ROM_SCLK D4
D6 BAV99W *24.3K_4/F@NC
HDA_RST*
3
C7 F6 HDCP_SCL
HDA_SDI I2CH_SCL HDCP_SDA
B7 HDA_SDO I2CH_SDA G6
A7 HDA_SYNC
A5 SPDIF_VGA C222 .01U/16V_4
SPDIF SPDIF 31
R208 40.2K/F_4 STRAP_REF_3V3 N9
R238 40.2K/F_4 STRAP_REF_MIOB STRAP_REF_3V3
B
M9 STRAP_REF_MIOB BUFRST* A4 B
PGOOD_OUT* C5 Stuff for ramp . 05/23 R1,R2,R3 can be unstuffed
The two R are necessary for G96 R147 R143
AK14 *76.8_4/F@NC nVidia FAE suggest 07/12/05
FAE 07/12/05 RFU
K9 36K
RFU_GND R2 R3
PCI_DEVID[4]/SUBVENDOR
NB9P-GS/GE2 (G96) Strraps 3V_VGA
GPIO ASSIGNMENTS
R210
5.1K/F_4 DHCP ROM VGA THERMAIL CIRCUIT 3V_VGA
GPIO I/O ACTIVE USAGE HDCP ROM
ROM_SO
Low: Crypto ROM
HDCP_SCL Hi: I2C ROM
0 IN N/A PRIMARY DVI HOTPLUG ROM_SCLK I2C ADDRESS: 0x98H R138
ROM_SI
1 IN N/A SECONDARY DVI HOTPLUG 3V_VGA *2.2K_4@NC
2
3
OUT
OUT
HIGH
HIGH
PANEL BACKLIGHT PWM
PANEL POWER ENABLE
R
R170
20K/F_4
R159
34.8K/F_4
U36
3V_VGA 3V_VGA EXT_EDIDDATA
EXT_EDIDCLK
R135
R161
*0_4@NC
*0_4@NC
GFX_SDA7
GFX_SCL8
U22
SDAT
SCLK
OVT 4 MAX6649_O# R174 *0_4@NC VGA_OVT#
1 8 6 MAX6649_A# R139 *0_4@NC ALERT

A0 VCC R513 R140 R184 *200_6@NC MAX6649_V ALERT
4 OUT HIGH PANEL BACKLIGHT ENABLE 10K/F_4 10K/F_4
VCC3 1 VCC GFX_THMD+
Sumsung 20K 2 A1 WP 7
C241 DXP 2
5 OUT N/A NVVDD VID0
GND
Hynix 15K 3 A2 SCL 6 HDCP_SCL C693 5 GND DXN 3
HDCP_SDA HDCP_SCL *.1U/10V_4@NC C253 Cap near sensor
6 OUT N/A NVVDD VID1 Qimonda 10K 4 5 HDCP_SDA *.1U/10V_4@NC *G799P8UF@NC *2200P/50V/04@NC
9
GND SDA
7 OUT N/A FBVDD VID0 SEE Datasheet for details on G9x Straps! 3V_VGA GFX_THMD-
AT24C16B R507
*10K/F_4
8 IN LOW THERMAL ALERT THERMAL TRACE CONSTRAINTS
Waiting Confirm from Nvidia
A
9 OUT LOW FAN PWM R200 R224 Use 10MIL GND Trace around THERMDC and THERMDA
A
45.3K/F_4 10K/F_4
10 OUT N/A FBVREF SELECT
11 OUT N/A SLI SYNC0 STRAP0
STRAP1 Note for RAMP:
12 IN N/A AC DETECT STRAP2
CH5: CS31022FB09
13 OUT LOW PS CONTROL OR HDMI_CEC
HB2: CS25102FB02 PROJECT : CH5
R222
14 OUT HIGH PS CONTROL 10K/F_4
NV9X (GPIO & STRRAPS) 4/5 1A
Date: Friday, May 23, 2008 Sheet 15 of 49

5 4 3 2 1
5 4 3 2 1
AA11
U39G
COMMON
E15
16
NVVDD Decoupling AA12
AA13
GND_1
GND_2
GND_3
GND_096
GND_097
GND_098
E18
E24
AA14
AA15
GND_4 GROUND GND_099 E27
E30
GND_5 GND_100
AA16 GND_6 GND_101 E6
AA17 GND_7 GND_102 E9
AA18 GND_8 GND_103 F2
D AA19 F31 D
GND_9 GND_104
VGACORE AA21 J2
NEAR BGA GND_12 GND_107
PLACE NEAR BALLS AA22 GND_13 GND_108 J31
AA23 GND_14 GND_109 J34
VGACORE VGACORE AA24 J5
GND_15 GND_110
AA25 GND_16 GND_111 L9
U39F C370 C378 C381 C418 C386 C329 AA34 M11
GND_17 GND_112
AA5 GND_18 GND_113 M13
BGA969-NVIDIA-NB9P-GS .47U/6.3V_4 .47U/6.3V_4 .47U/6.3V_4 .47U/6.3V_4 .47U/6.3V_4 4.7U/6.3V_6 AB12 M15
GND_19 GND_114
COMMON AB14 GND_20 GND_115 M17
AB16 GND_21 GND_116 M19
AB11 VDD_001 VDD_057 P21 AB18 GND_22 GND_117 M2
AB13 VDD_002 VDD_058 P23 AB20 GND_23 GND_118 M21
AB15
AB17
VDD_003 NVVDD VDD_059 P25
R11 C366 C330 C391 C348 C353 C399
AB22
AB24
GND_24 GND_119 M23
M25
VDD_004 VDD_060 GND_25 GND_120
AB19 VDD_005 VDD_061 R12 AC9 GND_26 GND_121 M31
AB21 R13 .47U/6.3V_4 .47U/6.3V_4 .47U/6.3V_4 .47U/6.3V_4 .47U/6.3V_4 4.7U/6.3V_6 AD11 M34
AB23 VDD_007 VDD_063 R14 AD13 GND_28 GND_123 M5
AB25 VDD_008 VDD_064 R15 AD15 GND_29 GND_124 N11
AC11 VDD_009 VDD_065 R16 AD17 GND_30 GND_125 N12
AC14 R19 C360 C342 C362 C354 C355 C423 AD23 N15
AC16 R21 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 4.7U/6.3V_6 AD31 N17
AC19 VDD_017 VDD_073 R24 AE11 GND_38 GND_133 N20
C AC20 R25 AE12 N21 C
AC21 VDD_019 VDD_075 T12 AE13 GND_40 GND_135 N22
AC22 T14 C403 C397 C367 C376 C387 AE14 N23
AC23 VDD_021 VDD_077 T16 AE15 GND_42 GND_137 N24
AC24 T18 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 AE16 N25
AC25 VDD_023 VDD_079 T20 AE17 GND_44 GND_139 P12
AD12 VDD_024 VDD_080 T22 AE18 GND_45 GND_140 P14
AD14 VDD_025 VDD_081 T24 AE19 GND_46 GND_141 P16
AD16 VDD_026 VDD_082 V11 AE20 GND_47 GND_142 P18
L11 VDD_030 VDD_086 V19 AE24 GND_51 GND_146 R2
L12 VDD_031 VDD_087 V21 AE25 GND_52 GND_147 R31
L13 VDD_032 VDD_088 V23 AG2 GND_53 GND_148 R34
L14
L15
VDD_033 VDD_089 V25
W11
Follow Design Guide DG-03276-001 4.7uFx3 AG31
AG34
GND_54 GND_149 R5
T11
L16
L17
VDD_035 VDD_091 W12
W13
and 0.47x10 uF instead of 0.1uF x10 AG5
AK2
GND_56 GND_151 T13
T15
L18 VDD_037 VDD_093 W14 AK31 GND_58 GND_153 T17
L21 VDD_040 VDD_096 W17 AL12 GND_61 GND_156 T23
L22 VDD_041 VDD_097 W18 AL15 GND_62 GND_157 T25
L23
L24
VDD_042 VDD_098 W19
W20
NB9P: VGACORE +1.15V ~ +1.2V AL18
AL21
GND_63 GND_158 U11
U12
L25 VDD_044 VDD_100 W21 AL24 GND_65 GND_160 U13
M12 VDD_045 VDD_101 W22 AL27 GND_66 GND_161 U14
B M18 W25 AL9 U17 B
M20 VDD_049 VDD_105 Y12 AN2 GND_70 GND_165 U18
M22 VDD_050 VDD_106 Y14 AN34 GND_71 GND_166 U19
M24 VDD_051 VDD_107 Y16 AP12 GND_72 GND_167 U20
P11 VDD_052 VDD_108 Y18 AP15 GND_73 GND_168 U21
P19 VDD_056 AP27 GND_77 GND_172 U25
power up sequence AP3 GND_78 GND_173 V12
AP30 GND_79 GND_174 V14
AP33 GND_80 GND_175 V16
AP6 GND_081 GND_176 V18
AP9 GND_082 GND_177 V2
B12 GND_083 GND_178 V20
PXE 1.1VDD B15 GND_084 GND_179 V22
B21 GND_085 GND_180 V24
I/O 3.3V B24 GND_086 GND_181 V31
B27 GND_087 GND_182 V5
NVCORE B3 GND_088 GND_183 V9
B30 GND_089 GND_184 Y11
B33 GND_090 GND_185 Y13
1.8VFBDDQ B6 GND_091 GND_186 Y15
B9 GND_092 GND_187 Y17
C2 GND_093 GND_188 Y19
C34 GND_094 GND_189 Y21
E12 GND_095 GND_190 Y23
GND_191 Y25
A A
PROJECT : CH5
NV9X (POWER & GND) 5/5 1A
Date: Monday, March 03, 2008 Sheet 16 of 49

5 4 3 2 1
5 4 3 2 1
VMA_DQ[63..0] 13
VMA_DM[7..0] 13
VMA_WDQS[7..0] 13
VMA_RDQS[7..0] 13
256/512 Mbit GDDRIII Channels 17
External VGA Memory
VCC1.8 VCC1.8
U43 U42
VMA_DQ2 T3 A1 C502 E@.022U VMA_DQ37 T3 A1 C505 E@.022U
VMA_DQ4 DQ31 | DQ23 VDDQ VMA_DQ38 DQ31 | DQ23 VDDQ
T2 DQ30 | DQ22 VDDQ#A12 A12 T2 DQ30 | DQ22 VDDQ#A12 A12
VMA_DQ0 R3 C1 C500 E@.022U VMA_DQ39 R3 C1 C786 E@.022U
D VMA_DQ1 DQ29 | DQ21 VDDQ#C1 VMA_DQ36 DQ29 | DQ21 VDDQ#C1 D
R2 DQ28 | DQ20 VDDQ#C4 C4 R2 DQ28 | DQ20 VDDQ#C4 C4
VMA_DQ3 M3 C9 C506 E@.022U VMA_DQ32 M3 C9 C782 E@.022U
VMA_DQ6 DQ27 | DQ19 VDDQ#C9 VMA_DQ35 DQ27 | DQ19 VDDQ#C9
N2 DQ26 | DQ18 VDDQ#C12 C12 N2 DQ26 | DQ18 VDDQ#C12 C12
VMA_DQ7 L3 E1 C498 E@.022U VMA_DQ33 L3 E1 C780 E@.022U
VMA_DQ5 DQ25 | DQ17 VDDQ#E1 VMA_DQ34 DQ25 | DQ17 VDDQ#E1
M2 DQ24 | DQ16 VDDQ#E4 E4 M2 DQ24 | DQ16 VDDQ#E4 E4
VMA_DQ9 T10 E9 C492 E@.022U VMA_DQ47 T10 E9 C779 E@.022U
VMA_DQ8 DQ23 | DQ31 VDDQ#E9 VMA_DQ45 DQ23 | DQ31 VDDQ#E9
T11 DQ22 | DQ30 VDDQ#E12 E12 T11 DQ22 | DQ30 VDDQ#E12 E12
VMA_DQ11 R10 J4 C484 E@.022U VMA_DQ46 R10 J4 C787 E@.022U
VMA_DQ10 DQ21 | DQ29 VDDQ#J4 VMA_DQ44 DQ21 | DQ29 VDDQ#J4
R11 DQ20 | DQ28 VDDQ#J9 J9 R11 DQ20 | DQ28 VDDQ#J9 J9
VMA_DQ15 M10 N1 C481 E@.022U VMA_DQ43 M10 N1 C520 E@.022U
VMA_DQ14 DQ19 | DQ27 VDDQ#N1 VMA_DQ40 DQ19 | DQ27 VDDQ#N1
N11 DQ18 | DQ26 VDDQ#N4 N4 N11 DQ18 | DQ26 VDDQ#N4 N4
VMA_DQ12 L10 N9 C476 E@.022U VMA_DQ41 L10 N9 C519 E@.022U
VMA_DQ13 DQ17 | DQ25 VDDQ#N9 VMA_DQ42 DQ17 | DQ25 VDDQ#N9
M11 DQ16 | DQ24 VDDQ#N12 N12 M11 DQ16 | DQ24 VDDQ#N12 N12
VMA_DQ19 G10 R1 C465 E@.022U VMA_DQ59 G10 R1 C515 E@.022U
VMA_DQ16 DQ15 | DQ7 VDDQ#R1 VMA_DQ58 DQ15 | DQ7 VDDQ#R1
F11 DQ14 | DQ6 VDDQ#R4 R4 F11 DQ14 | DQ6 VDDQ#R4 R4
VMA_DQ21 C499 E@10U VMA_DQ60 C521 E@10U
+
VMA_DQ17 E11 R12 VMA_DQ57 E11 R12
VMA_DQ23 DQ12 | DQ4 VDDQ#R12 C487 E@22U VMA_DQ61 DQ12 | DQ4 VDDQ#R12 C791 E@22U
C10 DQ11 | DQ3 VDDQ#V1 V1 C10 DQ11 | DQ3 VDDQ#V1 V1
VMA_DQ18 C11 V12 VMA_DQ63 C11 V12
VMA_DQ22 DQ10 | DQ2 VDDQ#V12 C464 E@220P VMA_DQ56 DQ10 | DQ2 VDDQ#V12 C509 E@220P
B10 DQ9 | DQ1 B10 DQ9 | DQ1
VMA_DQ20 B11 A2 VMA_DQ62 B11 A2
VMA_DQ25 DQ8 | DQ0 VDD C471 E@4700P VMA_DQ55 DQ8 | DQ0 VDD C512 E@4700P
G3 DQ7 | DQ15 VDD#A11 A11 G3 DQ7 | DQ15 VDD#A11 A11
VMA_DQ28 F2 F1 VMA_DQ49 F2 F1
VMA_DQ26 DQ6 | DQ14 VDD#F1 C455 E@.1U VMA_DQ53 DQ6 | DQ14 VDD#F1 C784 E@.1U
F3 DQ5 | DQ13 VDD#F12 F12 F3 DQ5 | DQ13 VDD#F12 F12
VMA_DQ24 E2 M1 VMA_DQ50 E2 M1
VMA_DQ29 DQ4 | DQ12 VDD#M1 C489 E@10U VMA_DQ52 DQ4 | DQ12 VDD#M1 C513 E@10U
+
C3 DQ3 | DQ11 VDD#M12 M12 C3 DQ3 | DQ11 VDD#M12 M12
VMA_DQ31 C2 V2 VMA_DQ51 C2 V2
VMA_DQ30 DQ2 | DQ10 VDD#V2 C486 E@22U VMA_DQ48 DQ2 | DQ10 VDD#V2 C788 E@22U
B3 DQ1 | DQ9 VDD#V11 V11 B3 DQ1 | DQ9 VDD#V11 V11
VMA_DQ27 B2 VMA_DQ54 B2
DQ0 | DQ8 DQ0 | DQ8
VSSQ B1 VSSQ B1
VSSQ#B4 B4 VSSQ#B4 B4
VMA_BA2 H10 B9 VMA_RAS# H10 B9
C 13 VMA_BA2 BA2 | RAS VSSQ#B9 BA2 | RAS VSSQ#B9 C
VMA_BA1 G9 B12 VMA_BA0 G9 B12
13 VMA_BA1 BA1 | BA0 VSSQ#B12 BA1 | BA0 VSSQ#B12
VMA_BA0 G4 D1 VMA_BA1 G4 D1
13 VMA_BA0 BA0 | BA1 VSSQ#D1 BA0 | BA1 VSSQ#D1
VSSQ#D4 D4 VSSQ#D4 D4
VMA_MA11 L4 D9 VMA_MA7 L4 D9
13 VMA_MA11 A11 | A7 VSSQ#D9 A11 | A7 VSSQ#D9
VMA_MA10 K2 D12 VMA_MA8 K2 D12
13 VMA_MA10 A10 | A8 VSSQ#D12 A10 | A8 VSSQ#D12
VMA_MA9 M9 G2 M9 G2
13 VMA_MA9 A9 | A3 VSSQ#G2 13 VMA_MA3H A9 | A3 VSSQ#G2
VMA_MA8 K11 G11 VMA_MA10 K11 G11
13 VMA_MA8 A8/AP | A10 VSSQ#G11 A8/AP | A10 VSSQ#G11
VMA_MA7 L9 L2 VMA_MA11 L9 L2
13 VMA_MA7 A7 | A11 VSSQ#L2 A7 | A11 VSSQ#L2
VMA_MA6 K10 L11 K10 L11
13 VMA_MA6 A6 | A2 VSSQ#L11 13 VMA_MA2H A6 | A2 VSSQ#L11
VMA_MA5 H11 P1 VMA_MA1 H11 P1
13 VMA_MA5 A5 | A1 VSSQ#P1 A5 | A1 VSSQ#P1
VMA_MA4 K9 P4 VMA_MA0 K9 P4
VMA_MA3 M4 P9 VMA_MA9 M4 P9
VMA_MA2 K3 P12 VMA_MA6 K3 P12
VMA_MA1 H2 T1 H2 T1
13 VMA_MA1 A1 | A5 VSSQ#T1 13 VMA_MA5H A1 | A5 VSSQ#T1
VMA_MA0 K4 T4 K4 T4
13 VMA_MA0 A0 | A4 VSSQ#T4 13 VMA_MA4H A0 | A4 VSSQ#T4
VSSQ#T9 T9 VSSQ#T9 T9
VMA_CS0# F9 T12 VMA_CAS# F9 T12
13 VMA_CS0# CS | CAS VSSQ#T12 CS | CAS VSSQ#T12
VSS A3 VSS A3
VMA_WE# H9 A10 VMA_CKE H9 A10
13 VMA_WE# WE | CKE VSS#A10 WE | CKE VSS#A10
VSS#G1 G1 VSS#G1 G1
VMA_RAS# H3 G12 VMA_BA2 H3 G12
13 VMA_RAS# RAS | BA2 VSS#G12 RAS | BA2 VSS#G12
VSS#L1 L1 VSS#L1 L1
VMA_CAS# F4 L12 VMA_CS0# F4 L12
13 VMA_CAS# CAS | CS VSS#L12 VCC1.8 CAS | CS VSS#L12
V3 V3 VCC1.8
VMA_CKE VSS#V3 VMA_WE# VSS#V3
13 VMA_CKE H4 CKE | WE VSS#V10 V10 H4 CKE | WE VSS#V10 V10
13 VMA_CLK0# J10 CK 13 VMA_CLK1# J10 CK

J11 K1 GDDR3_VDDA0 L32 E@BLM18PG181SN1D J11 K1 GDDR3_VDDA1 L36 E@BLM18PG181SN1D
13 VMA_CLK0 CK VDDA 13 VMA_CLK1 CK VDDA
K12 GDDR3_VDDA#0 L37 E@BLM18PG181SN1D K12 GDDR3_VDDA#1 L33 E@BLM18PG181SN1D
VMA_RDQS0 VDDA#K12 VMA_RDQS4 VDDA#K12
P3 RDQS3 | RDQS2 P3 RDQS3 | RDQS2
R334 VMA_RDQS1 P10 C517 C494 R323 VMA_RDQS5 P10 C495 C516
VMA_RDQS2 RDQS2 | RDQS3 VMA_RDQS7 RDQS2 | RDQS3
D10 RDQS1 | RDQS0 D10 RDQS1 | RDQS0
B E@475 VMA_RDQS3 E@.1U E@.1U E@475 VMA_RDQS6 E@.1U E@.1U B
VMA_WDQS0 P2 VMA_WDQS4 P2
VMA_WDQS1 WDQS3 | WDQS2 VMA_WDQS5 WDQS3 | WDQS2
P11 WDQS2 | WDQS3 VSSA#J12 J12 P11 WDQS2 | WDQS3 VSSA#J12 J12
VMA_WDQS2 D11 J1 VMA_WDQS7 D11 J1
VMA_WDQS3 WDQS1 | WDQS0 VSSA VMA_WDQS6 WDQS1 | WDQS0 VSSA
D2 WDQS0 | WDQS1 D2 WDQS0 | WDQS1
VMA_DM0 N3 J3 VMA_MA12 VMA_DM4 N3 J3 VMA_MA12
DM3 | DM2 RFU2 VMA_MA12 13 DM3 | DM2 RFU2
VMA_DM1 N10 VMA_DM5 N10
VMA_DM2 DM2 | DM3 VMA_DM7 DM2 | DM3
E10 DM1 | DM0 RFU1 J2 E10 DM1 | DM0 RFU1 J2
VMA_DM3 E3 VMA_DM6 E3
DM0 | DM1 DM0 | DM1
RFU0 V4 RFU0 V4
VMA_RST V9 VMA_RST V9
13 VMA_RST RESET RESET
R321 E@243/F A4 R330 E@243/F A4
ZQ ZQ
VCC1.8
DDR3_VREF0 DDR3_VREF1
H1 VREF R539 E@0 Programmable impedance output H1 VREF R536 E@0
Programmable impedance output MF A9 MF A9
DDR3_VREF#0 H12 VREF#H12 buffer and active terminator DDR3_VREF#1 H12
VREF#H12
buffer and active terminator GND | VDD GND | VDD
MIRROR FUNCTION EX: 240 Ohm is required for an MIRROR FUNCTION

EX: 240 Ohm is required for an 136 FBGA Low==>136 FBGA(NORMAL) output impedance of 40 Ohm 136 FBGA Low==>136 FBGA(NORMAL)
output impedance of 40 Ohm GDDR3-256M(800MHZ)@EV High==>136 FBGA(REVERSE) GDDR3-256M(800MHZ)@EV High==>136 FBGA(REVERSE)
VCC1.8 VCC1.8 VCC1.8 VCC1.8
A A
R308 R325 R327 R312
E@2.37K/F E@2.37K/F E@2.37K/F E@2.37K/F
DDR3_VREF0 DDR3_VREF#0 DDR3_VREF1 DDR3_VREF#1

VREF = .72*VDDQ VREF = .72*VDDQ VREF = .72*VDDQ VREF = .72*VDDQ
R309 R326 C514 PROJECT : CH5
C496 R328 C522 R307 C497
E@5.49K/F E@.1U E@5.49K/F E@.1U Quanta Computer Inc.
E@5.49K/F E@.1U E@5.49K/F E@.1U

NVG73M VRAM-1(GDDR3) 1F

5 4 3 2 1
5 4 3 2 1
VMC_DQ[63..0] 13
VMC_DM[7..0] 13
VMC_WDQS[7..0] 13
VMC_RDQS[7..0] 13
256/512 Mbit GDDRIII Channels 18
External VGA Memory
VCC1.8
VCC1.8 U40
U38 VMC_DQ55 T3 A1 C470 E@.022U
VMC_DQ6 C437 E@.022U VMC_DQ54 DQ31 | DQ23 VDDQ
T3 DQ31 | DQ23 VDDQ A1 T2 DQ30 | DQ22 VDDQ#A12 A12
VMC_DQ4 T2 A12 VMC_DQ49 R3 C1 C469 E@.022U
D VMC_DQ3 DQ30 | DQ22 VDDQ#A12 C430 E@.022U VMC_DQ52 DQ29 | DQ21 VDDQ#C1 D
R3 DQ29 | DQ21 VDDQ#C1 C1 R2 DQ28 | DQ20 VDDQ#C4 C4
VMC_DQ5 R2 C4 VMC_DQ48 M3 C9 C425 E@.022U
VMC_DQ7 DQ28 | DQ20 VDDQ#C4 C339 E@.022U VMC_DQ51 DQ27 | DQ19 VDDQ#C9
M3 DQ27 | DQ19 VDDQ#C9 C9 N2 DQ26 | DQ18 VDDQ#C12 C12
VMC_DQ0 N2 C12 VMC_DQ50 L3 E1 C411 E@.022U
VMC_DQ2 DQ26 | DQ18 VDDQ#C12 C238 E@.022U VMC_DQ53 DQ25 | DQ17 VDDQ#E1
L3 DQ25 | DQ17 VDDQ#E1 E1 M2 DQ24 | DQ16 VDDQ#E4 E4
VMC_DQ1 M2 E4 VMC_DQ62 T10 E9 C400 E@.022U
VMC_DQ13 DQ24 | DQ16 VDDQ#E4 C249 E@.022U VMC_DQ63 DQ23 | DQ31 VDDQ#E9
T10 DQ23 | DQ31 VDDQ#E9 E9 T11 DQ22 | DQ30 VDDQ#E12 E12
VMC_DQ12 T11 E12 VMC_DQ60 R10 J4 C392 E@.022U
VMC_DQ11 DQ22 | DQ30 VDDQ#E12 C252 E@.022U VMC_DQ61 DQ21 | DQ29 VDDQ#J4
R10 DQ21 | DQ29 VDDQ#J4 J4 R11 DQ20 | DQ28 VDDQ#J9 J9
VMC_DQ15 R11 J9 VMC_DQ58 M10 N1 C379 E@.022U
VMC_DQ14 DQ20 | DQ28 VDDQ#J9 C235 E@.022U VMC_DQ57 DQ19 | DQ27 VDDQ#N1
M10 DQ19 | DQ27 VDDQ#N1 N1 N11 DQ18 | DQ26 VDDQ#N4 N4
VMC_DQ10 N11 N4 VMC_DQ56 L10 N9 C368 E@.022U
VMC_DQ9 DQ18 | DQ26 VDDQ#N4 C268 E@.022U VMC_DQ59 DQ17 | DQ25 VDDQ#N9
L10 DQ17 | DQ25 VDDQ#N9 N9 M11 DQ16 | DQ24 VDDQ#N12 N12
VMC_DQ8 M11 N12 VMC_DQ44 G10 R1 C385 E@.022U
VMC_DQ16 DQ16 | DQ24 VDDQ#N12 C281 E@.022U VMC_DQ45 DQ15 | DQ7 VDDQ#R1
G10 DQ15 | DQ7 VDDQ#R1 R1 F11 DQ14 | DQ6 VDDQ#R4 R4
VMC_DQ17 VMC_DQ47 C477 E@10U
+
VMC_DQ22 C219 E@10U VMC_DQ46
+
F10 DQ13 | DQ5 VDDQ#R9 R9 E11 DQ12 | DQ4 VDDQ#R12 R12
VMC_DQ19 E11 R12 VMC_DQ42 C10 V1 C490 E@22U
VMC_DQ21 DQ12 | DQ4 VDDQ#R12 C227 E@22U VMC_DQ43 DQ11 | DQ3 VDDQ#V1
C10 DQ11 | DQ3 VDDQ#V1 V1 C11 DQ10 | DQ2 VDDQ#V12 V12
VMC_DQ23 C11 V12 VMC_DQ40 B10 C504 E@220P
VMC_DQ18 DQ10 | DQ2 VDDQ#V12 C295 E@220P VMC_DQ41 DQ9 | DQ1
B10 DQ9 | DQ1 B11 DQ8 | DQ0 VDD A2
VMC_DQ20 B11 A2 VMC_DQ38 G3 A11 C458 E@4700P
VMC_DQ26 DQ8 | DQ0 VDD C314 E@4700P VMC_DQ36 DQ7 | DQ15 VDD#A11
G3 DQ7 | DQ15 VDD#A11 A11 F2 DQ6 | DQ14 VDD#F1 F1
VMC_DQ24 F2 F1 VMC_DQ39 F3 F12 C503 E@.1U
VMC_DQ25 DQ6 | DQ14 VDD#F1 C325 E@.1U VMC_DQ37 DQ5 | DQ13 VDD#F12
F3 DQ5 | DQ13 VDD#F12 F12 E2 DQ4 | DQ12 VDD#M1 M1
VMC_DQ27 VMC_DQ32 C466 E@10U
+
E2 DQ4 | DQ12 VDD#M1 M1 C3 DQ3 | DQ11 VDD#M12 M12
VMC_DQ28 C218 E@10U VMC_DQ34
+
C3 DQ3 | DQ11 VDD#M12 M12 C2 DQ2 | DQ10 VDD#V2 V2
VMC_DQ30 C2 V2 VMC_DQ33 B3 V11 C488 E@22U
VMC_DQ31 DQ2 | DQ10 VDD#V2 C220 E@22U VMC_DQ35 DQ1 | DQ9 VDD#V11
B3 DQ1 | DQ9 VDD#V11 V11 B2 DQ0 | DQ8
VMC_DQ29 B2 B1
DQ0 | DQ8 VSSQ
VSSQ B1 VSSQ#B4 B4
B4 VMC_RAS# H10 B9
C VMC_BA2 VSSQ#B4 VMC_BA0 BA2 | RAS VSSQ#B9 C
13 VMC_BA2 H10 BA2 | RAS VSSQ#B9 B9 G9 BA1 | BA0 VSSQ#B12 B12
VMC_BA1 G9 B12 VMC_BA1 G4 D1
13 VMC_BA1 BA1 | BA0 VSSQ#B12 BA0 | BA1 VSSQ#D1
VMC_BA0 G4 D1 D4
13 VMC_BA0 BA0 | BA1 VSSQ#D1 VSSQ#D4
D4 VMC_MA7 L4 D9
VMC_MA11 VSSQ#D4 VMC_MA8 A11 | A7 VSSQ#D9
13 VMC_MA11 L4 A11 | A7 VSSQ#D9 D9 K2 A10 | A8 VSSQ#D12 D12
VMC_MA10 K2 D12 M9 G2
13 VMC_MA10 A10 | A8 VSSQ#D12 13 VMC_MA3H A9 | A3 VSSQ#G2
VMC_MA9 M9 G2 VMC_MA10 K11 G11
13 VMC_MA9 A9 | A3 VSSQ#G2 A8/AP | A10 VSSQ#G11
VMC_MA8 K11 G11 VMC_MA11 L9 L2
13 VMC_MA8 A8/AP | A10 VSSQ#G11 A7 | A11 VSSQ#L2
VMC_MA7 L9 L2 K10 L11
13 VMC_MA7 A7 | A11 VSSQ#L2 13 VMC_MA2H A6 | A2 VSSQ#L11
VMC_MA6 K10 L11 VMC_MA1 H11 P1
13 VMC_MA6 A6 | A2 VSSQ#L11 A5 | A1 VSSQ#P1
VMC_MA5 H11 P1 VMC_MA0 K9 P4
13 VMC_MA5 A5 | A1 VSSQ#P1 A4 | A0 VSSQ#P4
VMC_MA4 K9 P4 VMC_MA9 M4 P9
VMC_MA3 M4 P9 VMC_MA6 K3 P12
VMC_MA2 K3 P12 H2 T1
13 VMC_MA2 A2 | A6 VSSQ#P12 13 VMC_MA5H A1 | A5 VSSQ#T1
VMC_MA1 H2 T1 K4 T4
13 VMC_MA1 A1 | A5 VSSQ#T1 13 VMC_MA4H A0 | A4 VSSQ#T4
VMC_MA0 K4 T4 T9
13 VMC_MA0 A0 | A4 VSSQ#T4 VSSQ#T9
T9 VMC_CAS# F9 T12
VMC_CS0# VSSQ#T9 CS | CAS VSSQ#T12
13 VMC_CS0# F9 CS | CAS VSSQ#T12 T12 VSS A3
A3 VMC_CKE H9 A10
VMC_WE# VSS WE | CKE VSS#A10
13 VMC_WE# H9 WE | CKE VSS#A10 A10 VSS#G1 G1
G1 VMC_BA2 H3 G12
VMC_RAS# VSS#G1 RAS | BA2 VSS#G12
13 VMC_RAS# H3 RAS | BA2 VSS#G12 G12 VSS#L1 L1
L1 VMC_CS0# F4 L12
VMC_CAS# VSS#L1 CAS | CS VSS#L12 VCC1.8
13 VMC_CAS# F4 CAS | CS VSS#L12 L12 VSS#V3 V3
V3 VCC1.8 VMC_WE# H4 V10
VMC_CKE VSS#V3 CKE | WE VSS#V10
13 VMC_CKE H4 CKE | WE VSS#V10 V10
13 VMC_CLK1# J10 CK
J10 J11 K1 GDDR3_VDDA3 L59 E@BLM18PG181SN1D
13 VMC_CLK0# CK 13 VMC_CLK1 CK VDDA
J11 K1 GDDR3_VDDA2 L20 E@BLM18PG181SN1D K12 GDDR3_VDDA#3 L28 E@BLM18PG181SN1D
13 VMC_CLK0 CK VDDA VDDA#K12
K12 GDDR3_VDDA#2 L53 E@BLM18PG181SN1D VMC_RDQS6 P3
VMC_RDQS0 VDDA#K12 R293 VMC_RDQS7 RDQS3 | RDQS2 C447
P3 RDQS3 | RDQS2 P10 RDQS2 | RDQS3
R218 VMC_RDQS1 P10 C707 C263 VMC_RDQS5 D10 C755
B VMC_RDQS2 RDQS2 | RDQS3 E@475 VMC_RDQS4 RDQS1 | RDQS0 E@.1U B
E@475 VMC_RDQS3 D3 E@.1U E@.1U E@.1U
RDQS0 | RDQS1 VMC_WDQS6 P2 WDQS3 | WDQS2
VMC_WDQS0 P2 VMC_WDQS7 P11 J12
VMC_WDQS1 WDQS3 | WDQS2 VMC_WDQS5 WDQS2 | WDQS3 VSSA#J12
P11 WDQS2 | WDQS3 VSSA#J12 J12 D11 WDQS1 | WDQS0 VSSA J1
VMC_WDQS2 D11 J1 VMC_WDQS4 D2
VMC_WDQS3 WDQS1 | WDQS0 VSSA WDQS0 | WDQS1
D2 WDQS0 | WDQS1 VMC_DM6 N3 J3 VMC_MA12
VMC_DM0 VMC_MA12 VMC_DM7 DM3 | DM2 RFU2
N3 DM3 | DM2 RFU2 J3 VMC_MA12 13 N10 DM2 | DM3
VMC_DM1 N10 VMC_DM5 E10 J2
VMC_DM2 DM2 | DM3 VMC_DM4 DM1 | DM0 RFU1
E10 DM1 | DM0 RFU1 J2 E3 DM0 | DM1
VMC_DM3 E3 V4
DM0 | DM1 VMC_RST RFU0
RFU0 V4 V9 RESET
VMC_RST V9
13 VMC_RST RESET R277 E@243/F A4
R254 E@243/F ZQ
A4 ZQ VCC1.8
DDR3_VREF3
DDR3_VREF2 Programmable impedance output H1 VREF R280 E@0
Programmable impedance output H1 VREF MF A9
MF A9 R261 E@0 buffer and active terminator DDR3_VREF#3 H12
VREF#H12
buffer and active terminator DDR3_VREF#2 H12 VREF#H12 GND | VDD
GND | VDD
MIRROR FUNCTION EX: 240 Ohm is required for an MIRROR FUNCTION

EX: 240 Ohm is required for an
Low==>136 FBGA(NORMAL) output impedance of 40 Ohm 136 FBGA Low==>136 FBGA(NORMAL)
output impedance of 40 Ohm 136 FBGA GDDR3-256M(800MHZ)@EV
GDDR3-256M(800MHZ)@EV High==>136 FBGA(REVERSE) High==>136 FBGA(REVERSE)
VCC1.8 VCC1.8
VCC1.8 VCC1.8
A R529 R289 A
R180 R525
E@2.37K/F E@2.37K/F
E@2.37K/F E@2.37K/F
DDR3_VREF3 DDR3_VREF#3
DDR3_VREF2 DDR3_VREF#2 VREF = .72*VDDQ VREF = .72*VDDQ
VREF = .72*VDDQ VREF = .72*VDDQ
R166 C243 R530 C769 R295 C449 PROJECT : CH5
R526 C732
E@5.49K/F E@.1U E@5.49K/F E@.1U E@5.49K/F E@.1U Quanta Computer Inc.
E@5.49K/F E@.1U

NVG73M VRAM-2 (GDDR3) 1F

5 4 3 2 1
5 4 3 2 1
1.8VSUS 1.8VSUS
19
U5
HB2 UMA up resistor
LVDS SW HB2 VGA down resistor
1
2
GND
VDD
VDD
GND
64
63
3 62
CH5 NC 4
GND
GND
GND
0B1 61 LA_CLK
LA_CLK 6
D 5 60 LA_CLK# D
GND 1B1 LA_CLK# 6
TXLCLKOUT+ 6 59 EXT_TXLCLKOUT+
21 TXLCLKOUT+ A0 0B2 EXT_TXLCLKOUT+ 14
TXLCLKOUT- 7 58 EXT_TXLCLKOUT-
21 TXLCLKOUT- A1 1B2 EXT_TXLCLKOUT- 14
TXLCLKOUT+ R39 *0_4@HB2 LA_CLK TXLCLKOUT- R40 *0_4@HB2 LA_CLK# 8 57
VDD GND
9 GND VDD 56
EC_IMG_SEL 10 55
20,35 EC_IMG_SEL SEL0 2B1
R32 *0_4@HB2 EXT_TXLCLKOUT+ R31 *0_4@HB2 EXT_TXLCLKOUT- 11 54
VDD 3B1
12 A2 2B2 53
13 A3 3B2 52
14 GND GND 51
TXLOUT0+ R42 *0_4@HB2 LA_DATAP0 TXLOUT0- R41 *0_4@HB2LA_DATAN0 15 50
VDD GND LA_DATAP2
16 VDD 4B1 49 LA_DATAP2 6
17 48 LA_DATAN2
GND 5B1 LA_DATAN2 6
R29 *0_4@HB2 EXT_TXLOUT0+ R30 *0_4@HB2EXT_TXLOUT0- TXLOUT2+ 18 47 EXT_TXLOUT2+
21 TXLOUT2+ A4 4B2 EXT_TXLOUT2+ 14
TXLOUT2- 19 46 EXT_TXLOUT2-
21 TXLOUT2- A5 5B2 EXT_TXLOUT2- 14
20 45 LA_DATAP1
VDD 6B1 LA_DATAP1 6
TXLOUT1+ 21 44 LA_DATAN1
21 TXLOUT1+ A6 7B1 LA_DATAN1 6
TXLOUT1+ R36 *0_4@HB2LA_DATAP1 TXLOUT1- R35 *0_4@HB2LA_DATAN1 TXLOUT1- 22 43 EXT_TXLOUT1+
21 TXLOUT1- A7 6B2 EXT_TXLOUT1+ 14
23 42 EXT_TXLOUT1-
GND 7B2 EXT_TXLOUT1- 14
24 VDD GND 41
R45 *0_4@HB2EXT_TXLOUT1+ R46 *0_4@HB2EXT_TXLOUT1- EC_IMG_SEL 25 40
SEL1 VDD LA_DATAP0
26 VDD 8B1 39 LA_DATAP0 6
TXLOUT0+ 27 38 LA_DATAN0
21 TXLOUT0+ A8 9B1 LA_DATAN0 6
TXLOUT2+ R44 *0_4@HB2 LA_DATAP2 TXLOUT2- R43 *0_4@HB2LA_DATAN2 TXLOUT0- 28 37 EXT_TXLOUT0+
21 TXLOUT0- A9 8B2 EXT_TXLOUT0+ 14
29 36 EXT_TXLOUT0-
GND 9B2 EXT_TXLOUT0- 14
30 GND GND 35
R37 *0_4@HB2EXT_TXLOUT2+ R34 *0_4@HB2EXT_TXLOUT2- 31 34
VDD GND
32 GND VDD 33
1.8VSUS
C
PI2LVD512 C
Reserved for no SW C37 C35 C32 C36 C33 C38

0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
CRT SW
HB2 UMA up resistor
HB2 VGA down resistor
CH5 NC VCC3
B U14 B
1 24 INT_CRT_R
VDD A0 INT_CRT_R 6
CRT_R 2 23 EXT_CRT_R
22 CRT_R YA A1 EXT_CRT_R 14
CRT_R R80 *0_4@HB2 INT_CRT_R 3 22 INT_CRT_G
GND B0 INT_CRT_G 6
4 21 EXT_CRT_G
VDD B1 EXT_CRT_G 14
CRT_G 5 20
22 CRT_G YB GND
R81 *0_4@HB2EXT_CRT_R VSYNC_COM 6 19 VCC3
22 VSYNC_COM YC VDD
7 18 INT_VSYNC
GND C0 INT_VSYNC 6
HSYNC_COM 8 17 INT_HSYNC
22 HSYNC_COM YD D0 INT_HSYNC 6
CRT_G R82 *0_4@HB2 INT_CRT_G 9 16 EXT_VSYNC
VDD C1 EXT_VSYNC 14
10 15 EXT_HSYNC
GND D1 EXT_HSYNC 14
CRT_B 11 14 INT_CRT_B
22 CRT_B YE E0 INT_CRT_B 6
R83 *0_4@HB2EXT_CRT_G EC_IMG_SEL 12 13 EXT_CRT_B
20,35 EC_IMG_SEL SEL E1 EXT_CRT_B 14
PI3V512
CRT_B R86 *0_4@HB2 INT_CRT_B
R87 *0_4@HB2EXT_CRT_B
VSYNC_COM R84 *0_4@HB2 INT_VSYNC
R85 *0_4@HB2 EXT_VSYNC
HSYNC_COM R73 *0_4@HB2 INT_HSYNC VCC3
A A
R74 *0_4@HB2EXT_HSYNC
C66 C62 C63

0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
Reserved for no SW
PROJECT : CH5
Hyper_GFX_SW 1A

5 4 3 2 1
5 4 3 2 1
LVDS CTRL SEL CRT CTRL SEL

20
VCC5 VCC5
U11 U15
EC_IMG_SEL EC_DDC_SEL 1
D
1
2
OE1 VCC 8
7 EC_IMG_SEL# 2
OE1 VCC 8
7 EC_DDC_SEL# EC_PWM_SEL H: External D
6 INT_LVDS_BLON 1A OE2 6 INT_CRTCLK 1A OE2
15 EXT_LVDS_BLON 5
4
2A 2B 6
3
LVDS_BLON 21 14 EXT_CRTCLK 5
4
2A 2B 6
3
CRTCLK 22 EC_DDC_SEL L: Internal
GND 1B GND 1B
SN74CBTD3306 SN74CBTD3306
EC_IMG_SEL
EC_DDC_ALT_SEL
R675 *0_4@EV R683 *0_4@EV
R676 *0_4@IV R684 *0_4@IV
VCC5 VCC5
U9 U13
EC_IMG_SEL 1 8 EC_DDC_SEL1 8
OE1 VCC EC_IMG_SEL# OE1 VCC EC_DDC_SEL#
6 INT_DISP_ON 2 1A OE2 7 6 INT_CRTDAT 2 1A OE2 7
15 EXT_LVDS_DIGON 5 2A 2B 6 LVDS_DIGON 21 14 EXT_CRTDAT 5 2A 2B 6 CRTDAT 22 VCC3
4 GND 1B 3 4 GND 1B 3
1
5
SN74CBTD3306 SN74CBTD3306
.
.
EC_PWM_SEL 2 4 EC_PWM_SEL#
35 EC_PWM_SEL . . U18
R677 *0_4@EV R685 *0_4@EV
R678 *0_4@IV R686 *0_4@IV NC7SZ04P5X
3.
VCC5
U12
EC_DDC_SEL 1 8
OE1 VCC VCC3
2 7 EC_DDC_SEL#
6 INT_EDIDCLK 1A OE2
1
5
14,15 EXT_EDIDCLK 5 2A 2B 6 EDIDCLK 21
4 3
.
.
C
GND 1B
SN74CBTD3306
HDMI CTRL SEL 35 EC_DDC_SEL
EC_DDC_SEL 2
. 4
. U17
EC_DDC_SEL#
C
NC7SZ04P5X
.
R679 *0_4@EV VCC5
3
R680 *0_4@IV U6
EC_DDC_ALT_SEL 1 8
OE1 VCC EC_DDC_ALT_SEL#
4,35 MB_CLK 2 1A OE2 7
VCC5 5 6
U8 14 EXT_HDMI_SCL 2A 2B HDMI_SCL 22
4 GND 1B 3
EC_DDC_SEL 1 8
OE1 VCC EC_DDC_SEL# SN74CBTD3306
6 INT_EDIDDATA 2 1A OE2 7 VCC3
14,15 EXT_EDIDDATA 5 2A 2B 6 EDIDDATA 21
1
5
4 3 R687 *0_4@EV
GND 1B
.
.
SN74CBTD3306 EC_IMG_SEL 2 4 EC_IMG_SEL#
19,35 EC_IMG_SEL . . U16
R681 *0_4@EV NC7SZ04P5X
.
R682 *0_4@IV
3
VCC5
VCC5 U10
U7 EC_DDC_ALT_SEL 1 OE1 VCC 8
EC_PWM_SEL 1 8 2 7 EC_DDC_ALT_SEL#
OE1 VCC 4,35 MB_DATA 1A OE2
2 7 EC_PWM_SEL# 5 6
6 INT_DPST_PWM 1A OE2 14 EXT_HDMI_SDA 2A 2B HDMI_SDA 22
15 EXT_DPST_PWM 5 2A 2B 6 DPST_PWM 21 4 GND 1B 3
4 GND 1B 3 VCC3
SN74CBTD3306
1
5
SN74CBTD3306
R688 *0_4@EV
.
.
EC_DDC_ALT_SEL 2 4 EC_DDC_ALT_SEL#
35 EC_DDC_ALT_SEL . . U19
B NC7SZ04P5X B
.
MB_CLK,MB_DAT share with Battery
3
NOTE for B stage:
HB2 VGA R675,R677,R679,R681,R683,R685,R687,R688 stuff,other parts NC in this page
HB2 UMA R676,R678,R680,R682,R684,R686stuff,other parts NC in this page
CH5 All resistors NC in this page
Johnny 2008.01.30
TP76 TP75
VCC3
VCC5
A A
C82 C88 C83 C87

C51 C41 C84 C42 C40 C52 C75 C58 C39 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
PROJECT : CH5
Hyper_ctrl_SW 1A

5 4 3 2 1
1 2 3 4 5 6 7 8
21
PANEL VCC CONTROL LCD CONNECTOR
A A
12V_ALW
VCC3
1
R5 C2
3
0.1uF/10V_4
5VSUS
100K_4
Q2 If change to LED Panel, LCDVCC
AO3404 change BL control to PWM control
2
LCDONG 2 VCC3
AO3404 CN1
1
LCDVCC C3
Id current 5.8A
G_0
R14 L1
1
3
100K_4 FBM2125HM330 VCC3 R2 2.2K .1U
1
2
2
C17 LCDVCC_1
R1 2.2K 3
2
4
1
2 0.1uF/50V_6 C11
1
C4 C8 5
20 EDIDCLK 6
Q6 R6 .1U 22U/10V
20 EDIDDATA
2
7
3
2N7002E 22_8 0.1U TXLOUT0-
19 TXLOUT0- 8
TXLOUT0+
19 TXLOUT0+
1
R16 0_4 DIGON 9
20 LVDS_DIGON 2 10 G_1
3
TXLOUT1-
19 TXLOUT1- 11
Q3 TXLOUT1+
19 TXLOUT1+ 12
DTC144EUA
1
13
1
LCDON# 2 TXLOUT2-
19 TXLOUT2- 14
R10 TXLOUT2+
19 TXLOUT2+ 15
100K_4 Q4
B 2N7002E TXLCLKOUT- 16 B
19 TXLCLKOUT- 17
2N7002E TXLCLKOUT+
19 TXLCLKOUT+
2
1
R4 0_4 18
Id current 240mA 19
LP1 20
DSC_5V 21
1 2 USBP11-_C
24 USBP11- 22
4 3 USBP11+_C
24 USBP11+ 23
DISPON
*WCM2012-90 24
L3 R3 0_4 VADJ-1 25
+VIN_BLIGHT 26
VIN 2 1 27
ACB2012L-120
C21 C16 C6 28
C12 29
10U/25V/X5R 10U/25V/X5R 30
.1U .1U 31 G_4
32
33
34
35
36
37
DSC_5V 38
VCC3 VCC5 VCC5 39
40
G_5
R15 *0@NC
L5 GS12401-1011-9F
R20 R19 BK2125HS330_8
1 3
10K/F_4 10K/F_4
C AO3403 C
Q5
2
C14 C5
2
10U/10V/X5R_8 1U/10V_4
1 3
35 DSC_POWERON#
Q7
MMBT3904
BACKLIGHT CONTROL VCC3 UMA & Discrete setting

CH5 / HB2
R692
VCC3 R7 NC STUFF
10K/F_4 R9 STUFF NC
R8 NC NC
1SS355
D35 1 2 C10 .1U Johnny 080130
35 LCD_ON
1SS355
5
D36 1 2 R7 0_4@HB2
35,36 LID# 35 BRIGHT_DAC
2 L2 0
4 DISPON R9 0_4@CH5 VADJ VADJ-1
35 BRIGHT_PWM
R12 0_4 BLON 1
20 LVDS_BLON U3 R8 *0_4
TC7SH08FU 20 DPST_PWM
C9
EMI
3
C13 0.1U
D R11 D
100K 0.1U
Note for C stage:
Add D35,D36,R692. C19
03/21 *47P/50V_4@NC
PROJECT : CH5
LCD /CAMERA 1F

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
HDMI PORT VCC3

NOTE FOR B STAGE:
For HB2 UMA (HDMI), C28,U4,R476,LP2,LP3,LP4,LP5,L8,L9,F2,R25,R26,CN13,D5,R23,
22
R24,R204,R203,R176,R177,R153,R152,R154,R149,Q8 not connected.
C28
0.1U/16V@EV
U4
LAYOUT must support
5
A R477 *0_4@NC A
HDMIDET_CODEC 31
2
4 R476 0_4@EV
connectors from JAE,
HDMIDET_EC 35
HDMIDET_R 1 Molex and Acon.
TC7SH08FU@EV *E@0 CN13
R54
3
SHELL1 20
14 EXT_TX2_HDMI+ EXT_TX2_HDMI+ LP4 4 3 E@CMM21T-900M-N CN_TX2_HDMI+ 19
EXT_TX2_HDMI- D2+
14 EXT_TX2_HDMI- 1 2 18 D2 Shield
R56 *E@0 CN_TX2_HDMI- 17
R47 *E@0 CN_TX1_HDMI+ D2-
16 D1+
14 EXT_TX1_HDMI+ EXT_TX1_HDMI+ LP3 1 2 E@CMM21T-900M-N 15
EXT_TX1_HDMI- CN_TX1_HDMI- D1 Shield
14 EXT_TX1_HDMI- 4 3 14 D1-
R57 *E@0 R38 *E@0 CN_TX0_HDMI+ 13
EXT_TX0_HDMI+ LP5 4 D0+
14 EXT_TX0_HDMI+ 3 E@CMM21T-900M-N 12 D0 Shield
R204 499 14 EXT_TX0_HDMI- EXT_TX0_HDMI- 1 2 CN_TX0_HDMI- 11
EXT_TX2_HDMI+ R58 *E@0 CN_TXC_HDMI+ D0-
10 CK+
R33 *E@0 9
R203 499 CK Shield
EXT_TX2_HDMI- 14 EXT_TXC_HDMI+ EXT_TXC_HDMI+ LP2 1 2 E@CMM21T-900M-N CN_TXC_HDMI- 8
EXT_TXC_HDMI- CK-
R176 499 14 EXT_TXC_HDMI- 4 3 7 CE Remote
EXT_TX1_HDMI+ R27 *E@0 6
L9 NC
HDMI_SCL E@BLM15AG221SN1D HDMISCL 5
R177 499 20 HDMI_SCL DDC CLK
EXT_TX1_HDMI- HDMI_SDA L8 HDMISDA 4
20 HDMI_SDA E@BLM15AG221SN1D DDC DATA
R153 499 3 GND
EXT_TX0_HDMI+ VCC5 F2 2 E@FUSE1A6V_POLY
1 HDMIC_5V 2
N_HDMI_DET HDMIDET_R +5V
R152 499 15 N_HDMI_DET 1 HP DET
EXT_TX0_HDMI- 21
R25 E@1K SHELL2
R154 499
EXT_TXC_HDMI+ E@C12814
R26
C30 C29
B R149 499 B
EXT_TXC_HDMI-
Update CN13 footprint
E@12P/50V
E@15K
E@12P/50V
and PN nicole 12/04
3
VCC3
HDMIC_5V
Q8 2
2
HDMIC_5V
2N7002E-LF D5
This termination is for nVidia new chip NB9P, RB501V-40
1
and not necessary in old chip. R24 2K/F_4 HDMI_SCL C34
1
*.1U/10V
wxx 20071214 R23 2K/F_4 HDMI_SDA
for EMI request
VCC3 VCC3 VCC3 CRT_VCC
DKZ00TFU101
CRT PORT D1
1
NOTE for B stage: F1
C D4 D3 D2 1 2 1 2 C
Change NET VCC3 into CRT_VCC VCC5
3 DA204U 3 DA204U 3 DA204U
Johnny 2008.01.30 POLY_SWITCH RC1206
CH501H
C7
2
0.1U
D27
16
CN12 1 2 R475 0 CRT_SENSE# 35
1
6 MEW355
CRT_R L7 BK1608HS470 CRT_R1 1 11
19 CRT_R *MEW355
7
CRT_G L6 BK1608HS470 CRT_G1 2 12 CRT_DDCDATA D28
19 CRT_G
8
2
CRT_B L4 BK1608HS470 CRT_B1 3 13 HSYNC1
19 CRT_B
9
VCC5 C24 C22 C15 4 14 VSYNC1
R22 R21 R13 10
C20 C23 C25 5 15 CRT_DDCCLK
150/F 150/F 150/F
5.6P 5.6P 5.6P 5.6P 5.6P 5.6P
CRT_CONN
17
5
C1 .1U/10V
U1
2 4 VSYNC1
19 VSYNC_COM VCC3
D AHCT1G125DCH VCC3 VCC5 VCC5 D
5
R470
U2 AHCT1G125DCH R474 R473 2.2K R471
2.2K 2.2K 2.2K
PROJECT : CH5
2
2 4 HSYNC1 Q18 Q1
19 HSYNC_COM
20 CRTDAT
CRTDAT 1 3 CRT_DDCDATA
20 CRTCLK
CRTCLK 1 3 CRT_DDCCLK Quanta Computer Inc.
2N7002E-LF 2N7002E-LF
HDMI/CRT 1F
Date: Tuesday, May 27, 2008 Sheet 22 of 49

1 2 3 4 5 6 7 8
5 4 3 2 1
RB501V-40
D23
+3VRTC
C858 1U/6.3V/X5R_4
Place G4 near to Mini-door
C851
3VPCU
+3VRTC
VCC3
VCC1.5
VCCP
35,36,37,38,43,44,45
26,35
2,4,6,9,10,12,15,19,20,21,22,24,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,43,46
4,9,24,26,27,28,41,46
2,3,4,5,6,8,9,26,40,41,46
23
3VPCU RVCC3 24,25,26,30,31,43,46
18P/50V_4
3
4
+3VRTC_2 D24 R426 20K/F_4
32.768KHZ R619
1
RB501V-40 R436 180K_4 C608 G1 10M_4
Y6
U46A
1
C622 1U/6.3V/X5R_4
2
1
D R438 .1U/10V_4 G2 RTC_X1 C23 K5 D
LAD0 28,35
2
1K/F_4 C850 RTC_X2 RTCX1 FWH0/LAD0
C24 RTCX2 FWH1/LAD1 K4 LAD1 28,35
18P/50V_4 L6 VCCP
LAD2 28,35
2
*SHORT_ PAD1 RTC_RST# FWH2/LAD2
A25 RTCRST# FWH3/LAD3 K2 LAD3 28,35
*SHORT_ PAD1 SRTC_RST F20 SRTCRST#
RTC
LPC
SM_INTRUDER# C22 K3
INTRUDER# FWH4/LFRAME# LFRAME# 28,35 VCCP
1M/F_4
BT1
R622 ICH_INTVRMEN B22 J3 TP47
LAN100_SLP INTVRMEN LDRQ0# ICH_DRQ#1 R428 R433
1 1 A22 LAN100_SLP LDRQ1#/GPIO23 J1 TP46
2 R374 10K/F_4 VCC3 *56.2/F_4@NC *56.2/F_4NC
2 R635
E25 GLAN_CLK A20GATE N7 GATEA20 35
RTC CONN AJ27 56.2/F_4
A20M# H_A20M# 3
C13 LAN_RSTSYNC
DPRSTP# AJ25 H_DPRSTP# 3,6,40
F14 LAN_RXD0 DPSLP# AE23 H_DPSLP# 3
LAN / GLAN
G13 LAN_RXD1
D14 AJ26 H_FERR#_R R627 56.2/F_4
LAN_RXD2 FERR# H_FERR# 3
TP18
RTC_BAT_V D13 AD22
LAN_TXD0 CPUPWRGD H_PWRGD 3
D12 LAN_TXD1
5VPCU
20MIL 20MIL E13 LAN_TXD2 IGNNE# AF25 H_IGNNE# 3
CPU
RVCC3 R594 10K/F_4 ICH_GPIO56 B10 AE22
GPIO56 INIT# H_INIT# 3
R650 VCCRTC_1 VCCRTC_3 3 1 AG25
INTR H_INTR 3 VCCP
1.2K_4 R651 1K_4 VCC1.5 R435 24.9/F_4 GLAN_COMP B28 L3
GLAN_COMPI RCIN# RCIN# 35
Q16 B27 R348 10K/F_4 VCC3
R652 MMBT3904 GLAN_COMPO
AF23 H_NMI 3
2
ACZ_BCLK NMI R640

AF6 HDA_BIT_CLK SMI# AF24 H_SMI# 3
4.7K_4 ACZ_SYNC AH4 56.2/F_4
HDA_SYNC
STPCLK# AH27 H_STPCLK# 3
ACZ_RST# AE7 HDA_RST# H_THERMTRIP_R R642 54.9/F_4
THRMTRIP# AG26 PM_THRMTRIP# 3,6
C 31 ACZ_SDIN0 AF4 HDA_SDIN0 C
R453 AG4 AG27 ICH_TP12 TP74 R326&R327 near ICH9
31 ACZ_SDIN1 HDA_SDIN1 TP12
Notice: GPIO33 is also a TP49 AH3 HDA_SDIN2
15K_4
IHDA
strap pin(internal pull up 6 ACZ_SDIN3 AE5 HDA_SDIN3
20k). Don't pull -down. ACZ_SDOUT AG5
SATA4RXN AH11
AJ11
HD Audio to Codec and Modem
HDA_SDOUT SATA4RXP
SATA4TXN AG12
GPIO33 AG7 AF12 ACZ_SDOUT R587 33
TP51 HDA_DOCK_EN#/GPIO33 SATA4TXP ACZ_SDOUT_AUDIO 31
R371 10K/F_4 BT_COMBO_EN# AE8
VCC3 TP52 HDA_DOCK_RST#/GPIO34
AH9 R589 33
SATA5RXN ACZ_SDOUT_MDC 31
SATA_LED# AG8 AJ9
37 SATA_LED# SATALED# SATA5RXP
SATA5TXN AE10
two Cap near SATA Con C828 .01U/16V_4 SATA_RXN0_C AJ16 AF10 C568 C564
27 SATA_RXN0 SATA0RXN SATA5TXP
C826 .01U/16V_4 SATA_RXP0_C AH16 *10P/50V *10P/50V
27 SATA_RXP0 SATA0RXP
C587 .01U/16V_4 SATA_TXN0_C AF17 AH18
SATA HDD
SATA
27 SATA_TXN0 SATA0TXN SATA_CLKN CLK_PCIE_SATA# 2
C590 .01U/16V_4 SATA_TXP0_C AG17 AJ18
27 SATA_TXP0 SATA0TXP SATA_CLKP CLK_PCIE_SATA 2
two Cap near SATA Con C751 .01U/16V_4 SATA_RXN1_C AH13 AJ7 SATA_RBIAS_PN ACZ_SYNC R346 33
27 SATA_RXN1 SATA1RXN SATARBIAS# ACZ_SYNC_AUDIO 31
C749 .01U/16V_4 SATA_RXP1_C AJ13 AH7 25mils/15mils
27 SATA_RXP1 SATA1RXP SATARBIAS
C581 .01U/16V_4 SATA_TXN1_C AG14 R345 33
SATA ODD 27 SATA_TXN1
C583 .01U/16V_4 SATA_TXP1_C AF14
SATA1TXN ACZ_SYNC_MDC 31
27 SATA_TXP1 SATA1TXP R365
ICH9M REV 1.0 24.9/F_4
Place within C800 C801
*10P/50V *10P/50V
500 mils of
ICH9
ACZ_BCLK R344 33
ACZ_BCLK_AUDIO 31
R343 33
ACZ_BCLK_MDC 31
C561
B *10P/50V B
C798 C799
SB Strap XOR Chain Entrance Strap ICH9 Boot BIOS select No Reboot Strap
*10P/50V *10P/50V
ICH9-M Internal VR ICH_TP3 HDA_SDOUT Description STRAP PCI_GNT0# SPI_CS#1 Low: Default
Enable strap ICH9-M LAN100_SLP Strap SPI 0 1 ACZ_SPKR Hi: No reboot
(Internal VR for (Internal VR for 0 0 RSVD
PCI 1 0
Vccsus1_05,VccSus1_5 VccLAN1_05 and
and VccCL1_5) VccCL1.05) 0 1 Enter XOR Chain LPC 1 1 (default) VCC3 ACZ_RST# R590 33
ACZ_RST#_AUDIO 31
R591 33
ACZ_RST#_MDC 31
1 0 Normal opration(Default) *1K/F_4@NC R361 R375
GNT0# 24,33
Low = Internal VR disable Low = Internal VR disable *1K/F_4@NC C577 C574
INTVRMEN High = Internal VR LAN100_SLP High = Internal VR *1K/F_4@NC R429 *10P/50V *10P/50V
SPI_CS#1_R 24
enable(Default) enable(Default) 1 1 Set PCIE port config bit 1
ACZ_SPKR 25,31
NOTE for B stage:

Change NET VCCRTC into +3VRTC
Johnny 2008.01.30 TPM physical presence ACZ_RST# R595 *33_4@NC
ACZ_RST#_MCH 6
A16 swap override strap ACZ_SDOUT R368 *33_4@NC
VCC3 ACZ_SDOUT_MCH 6
ACZ_SYNC R347 *33_4@NC
+3VRTC +3VRTC ACZ_SYNC_MCH 6
Low = A16 swap override enabled ICH_GPIO57 Low: Default ACZ_BCLK R567 *33_4@NC
ACZ_BITCLK_MCH 6
PCI_GNT#3
Hi = Default
R372 C540 C818
R423 R419 RVCC3
332K/F_4 332K/F_4 *1K/F_4@NC *10P/50V_4@NC C802 *10P/50V_4@NC
A A
ACZ_SDOUT *1K/F_4@NC R377
GNT3# 24
ICH_INTVRMEN LAN100_SLP R583 *10P/50V_4@NC
ICH_TP3 25
*10K/F_4@NC
R420 R414
ICH_GPIO57 25
R410
*0_4@NC *0_4@NC
PROJECT : CH5
*1K/F_4@NC R585
100K/F_4 Quanta Computer Inc.
ICH9-M Host 1/4 1A

5 4 3 2 1
5 4 3 2 1
U46D
4,9,23,26,27,28,41,46 VCC1.5
2,4,6,9,10,12,15,19,20,21,22,23,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,43,46 VCC3
23,25,26,30,31,43,46 RVCC3
24
PCIE_RXN0 N29 V27
28 PCIE_RXN0 PERN1 DMI0RXN DMI_RXN0 6
PCIE_RXP0 N28 V26
Direct Media Interface

28 PCIE_RXP0 PERP1 DMI0RXP DMI_RXP0 6
C629 .1U/10V_4 PCIE_TXN0_C
MINI CARD PCI-E(WLAN) 28 PCIE_TXN0
C628 .1U/10V_4 PCIE_TXP0_C
P27
P26
PETN1 DMI0TXN U29
U28
DMI_TXN0 6
28 PCIE_TXP0 PETP1 DMI0TXP DMI_TXP0 6
PCIE_RXN1 L29 Y27
D 27 PCIE_RXN1 PERN2 DMI1RXN DMI_RXN1 6 D
PCIE_RXP1 L28 Y26
27 PCIE_RXP1 PERP2 DMI1RXP DMI_RXP1 6
EXPRESS CARD (NEW CARD) 27 PCIE_TXN1
M27
M26
PETN2 DMI1TXN W29
W28
DMI_TXN1 6
J29 PERN3 DMI2RXN AB27 DMI_RXN2 6
J28 PERP3 DMI2RXP AB26 DMI_RXP2 6
PCI-Express
K27 PETN3 DMI2TXN AA29 DMI_TXN2 6
K26 PETP3 DMI2TXP AA28 DMI_TXP2 6
PCIE_RXN4 G29 AD27
28 PCIE_RXN4 PERN4 DMI3RXN DMI_RXN3 6
PCIE_RXP4 VCC1.5
MINI CARD PCI-E (Robson) 28 PCIE_RXP4
G28
H27
PERP4 DMI3RXP AD26
AC29
DMI_RXP3 6
28 PCIE_TXN4 PETN4 DMI3TXN DMI_TXN3 6
C626 .1U/10V_4 PCIE_TXP4_C H26 AC28
E29 T26 R669
PERN5 DMI_CLKN CLK_PCIE_ICH# 2
E28 PERP5 DMI_CLKP T25 CLK_PCIE_ICH 2 24.9/F_4
F27 PETN5
F26 PETP5 DMI_ZCOMP AF29
AF28 DMI_IRCOMP_R
DMI_IRCOMP
30 PCIE_RXN6_LAN C29 PERN6/GLAN_RXN
C28 AC5 USBP0-
30 PCIE_RXP6_LAN PERP6/GLAN_RXP USBP0N USBP0- 29
C885 .1U/10V_4 PCIE_TXN6_C USBP0+
PCIE-LAN 30 PCIE_TXN6_LAN
D27
D26
PETN6/GLAN_TXN USBP0P AC4
AD3 USBP1-
USBP0+ 29 Cable USB Connector
30 PCIE_TXP6_LAN PETP6/GLAN_TXP USBP1N USBP1- 29
USBP1+
SPI_CLK_R D23
USBP1P AD2
AC1
USBP1+ 29 Cable USB Connector VCC3
SPI_CS#0_R SPI_CLK USBP2N RP29
D24
F23
SPI_CS0# USBP2P AC2
AA5
Del Finger Printer INTF# 6 5
23 SPI_CS#1_R SPI_CS1#/GPIO58/CLGPIO6 USBP3N
AA4 LOCK# 7 4 REQ0#
SPI_MOSI USBP3P USBP4- IRDY# INTG#
SPI_MISO
D25 SPI_MOSI SPI USBP4N AB2
USBP4+
USBP4- 29
PERR#
8 3
INTE#
C
E23 SPI_MISO USBP4P AB3
AA1 USBP5-
USBP4+ 29 Blue Tooth 9
10
2
1 INTB# C
USBP5N USBP5- 28 VCC3
USB_OC#0 USBP5+
29 USB_OC#0
USB_OC#1
N4
N5
OC0#/GPIO59 USBP5P AA2
W5 USBP6-
USBP5+ 28 ROBSON 10P8R-8.2K
29 USB_OC#1 OC1#/GPIO40 USBP6N USBP6- 27
USB_OC#2 USBP6+
USBPWR_EN1#
N6
P6
OC2#/GPIO41 USB USBP6P W4
Y3 USBP7-
USBP6+ 27 NEW CARD VCC3
29 USBPWR_EN1# OC3#/GPIO42 USBP7N USBP7- 38
USB_OC#4 USBP7+ RP40
USB_OC#5
M1
N2
OC4#/GPIO43 USBP7P Y2
W1 USBP8-
USBP7+ 38 CIR REQ3# 6 5
OC5#/GPIO29 USBP8N USBP8- 29
USB_OC#6 USBP8+ FRAME# DEVSEL#
USBPWR_EN2#
M4
M3
OC6#/GPIO30 USBP8P W2
V2 USBP9-
USBP8+ 29 USB Connector TRDY#
7
8
4
3 REQ1#
USB_OC#8 USBP9+ REQ2# STOP#
29 USB_OC#8
USB_OC#9
N3
N1
OC8#/GPIO44 USBP9P V3
U5 USBP10-
USBP9+ 29 USB Connector 9
10
2
1 INTD#
29 USB_OC#9 OC9#/GPIO45 USBP10N USBP10- 28 VCC3
USBPWR_EN4# USBP10+
29 USBPWR_EN4#
USBPWR_EN3#
P5
P3
OC10#/GPIO46 USBP10P U4
U1 USBP11-
USBP10+ 28 WLAN Min-Card 10P8R-8.2K
USBP11+
USBRBIAS_PN AG2
USBP11P U2 USBP11+ 21 CCD Carama VCC3
USBRBIAS RP28
AG1 USBRBIAS# INTH# 6 5
ICH9M REV 1.0 INTA# 7 4
SERR# 8 3
R354 INTC# 9 2
22.6/F_4 10 1
VCC3
10P8R-8.2K
RVCC3
RP39
USBPWR_EN2# 6 5
USB_OC#4 7 4 USBPWR_EN4#
USB_OC#5 8 3 USB_OC#1
USB_OC#6 9 2 USB_OC#0
B U46B 10 1 USBPWR_EN3# B
33 AD[0..31] RVCC3
AD0 D11 F1 REQ0#
VCC3 AD0 REQ0# REQ0# 33
AD1 GNT0# 10P8R-8.2K
AD2
C8
D9
AD1 PCI GNT0# G4
B6 REQ1#
GNT0# 23,33 Notice: GPIO55,53,51
AD2 REQ1#/GPIO50
AD3
AD4
E12
E9
AD3 GNT1#/GPIO51 A7
F13
GNT1#
REQ2#
TP50 signal has a week USB_OC#2 R379 8.25K/F_4
RVCC3
AD4 REQ2#/GPIO52
AD5
AD6
C9 AD5 GNT2#/GPIO53 F12 GNT2#
REQ3#
TP58 internal pull-up 20k for USBPWR_EN1# R378 8.25K/F_4
E10 AD6 REQ3#/GPIO54 E6
C591 AD7 B7 AD7 GNT3#/GPIO55 F6 GNT3#
GNT3# 23 functional strap.Don't
*.1U/10V_4@NC AD8 C7 USB_OC#8 R568 8.25K/F_4
AD9 C5
AD8
AD9 C/BE0# D8 C/BE0# 33
pull-down.
U29 AD10 G11 B4 USB_OC#9 R342 8.25K/F_4
AD10 C/BE1# C/BE1# 33
8 1 R442 *22_4@NC SPI_CS#0_R AD11 F8 D6
VDD CE# AD11 C/BE2# C/BE2# 33
R397 6 R396 *22_4@NC SPI_CLK_R AD12 F11 A5 PCI_PME# R351 *10K/F_4 RVCC3
SCK AD12 C/BE3# C/BE3# 33
5 R398 *22_4@NC SPI_MOSI AD13 E7
SPI_HOLD# SI R441 *22_4@NC SPI_MISO AD14 AD13 IRDY#
7 HOLD# SO 2 A3 AD14 IRDY# D3 IRDY# 33
*10K_4@NC AD15 D2 E3 VCC3
AD15 PAR PAR 33
4 VSS WP# 3 SPI_WP# VCC3 AD16 F10 AD16 PCIRST# R1 PCIRST# 33
R443 *10K_4@NC AD17 D5 C6 DEVSEL#
AD17 DEVSEL# DEVSEL# 33
*W25X40VSSIG@NC AD18 D10 E4 PERR#
AD18 PERR# PERR# 33
AD19 B3 C2 LOCK#
AD20 AD19 PLOCK# SERR#
F7 AD20 SERR# J4 SERR# 33
512K byte SPI ROM AD21 C3 A4 STOP# C819
AD21 STOP# STOP# 33
AD22 F3 F5 TRDY# *.1U/10V_4
AD22 TRDY# TRDY# 33
For HDCP only AD23 F4 D7 FRAME# U45
AD23 FRAME# FRAME# 33
5
AD24 C1
AD25 AD24 PLT_RST-R# PLT_RST-R#
G7 AD25 PLTRST# C14 PLT_RST-R# 6,12 2
AD26 H7 D4 4
AD26 PCICLK PCLK_ICH 2 PLTRST# 27,28,30
AD27 D1 R2 PCI_PME# 1
AD27 PME# PCI_PME# 33
AD28 G5
A AD29 AD28 R593 TC7SH08FU A
H6
3
AD30 AD29 R592
G1 AD30 *100K/F_4
AD31 H3 *100K/F_4
AD31
INTA#
Interrupt I/F INTE# R380 *0_4
J5 PIRQA# PIRQE#/GPIO2 H4 INTE# 33 PROJECT : CH5
PCI DEVICES IRQ ROUTING INTB#
INTC#
E1
J6
PIRQB# PIRQF#/GPIO3 K6
F2
INTF#
INTG#
INTF# 33
DEVICE IDSEL # REQ/GNT # PCI_INT INTD# C4

PIRQC#
PIRQD#
PIRQG#/GPIO4
PIRQH#/GPIO5 G2 INTH# Quanta Computer Inc.
CardBus/1394 AD21 0 E,F ICH9M REV 1.0
/Card Reader Size Document Number Rev
1A
ICH9-M PCIE 2/4
5 4 3 2 1
5 4 3 2 1
4,9,23,24,26,27,28,41,46
2,4,6,9,10,12,15,19,20,21,22,23,24,26,27,28,29,30,31,32,33,34,35,36,37,39,40,43,46
23,24,26,30,31,43,46
27,28,39,41,43,46
VCC1.5
VCC3
RVCC3
3VSUS
25
U46C
PCLK_SMB G16 AH23 BOARD_ID1
D 2,28 PCLK_SMB SMBCLK SATA0GP/GPIO21 D
PDAT_SMB A13 AF19 BOARD_ID0
2,28 PDAT_SMB SMBDATA SATA1GP/GPIO19
SMB_LINK_ALERT# E17 AE21 BOARD_ID3
LINKALERT#/GPIO60/CLGPIO4 SATA4GP/GPIO36
SATA
SMB_CLK_ME BOARD_ID4
GPIO
C17 SMLINK0 SATA5GP/GPIO37 AD20
SMB_DATA_ME RVCC3
B18 SMLINK1 SMB H1
CLK14 CLK_14M_ICH 2
PM_RI# F19 AF3 SWI# R404 10K/F_4
RI# CLK48 CLK_48M_USB 2
Clocks
TP57 LPC_PD# R4 P1 SUSCLK TP48 PM_RI# R411 10K/F_4
SYS_RST# SUS_STAT#/LPCPD# SUSCLK
3 SYS_RST# G19 SYS_RESET#
C16 R391 0_4 SMB_CLK_ME R401 10K/F_4
SLP_S3# SUSB# 35
M6 E16 R392 0_4
6 PM_SYNC# PMSYNC#/GPIO0 SLP_S4# SUSC# 35
G17 SLP_S5# TP64 SMB_DATA_ME R395 10K/F_4
SMB_ALERT# SLP_S5#
A17 SMBALERT#/GPIO11
C10 S4_STATE# TP59 DNBSWON# R359 10K/F_4
S4_STATE#/GPIO26
2 PM_STPPCI# A14 STP_PCI#
E19 G20 PM_ICH_PWROK PCLK_SMB R393 2.2K_4
2 PM_STPCPU# STP_CPU# PWROK
SYS GPIO
CLKRUN# L4 M2 PDAT_SMB R386 2.2K_4
33,35 CLKRUN# CLKRUN# DPRSLPVR/GPIO16 DPRSLPVR 6,40
PCIE_WAKE# E20 B13 PM_BATLOW# SMB_ALERT# R388 10K/F_4
27,28,30 PCIE_WAKE# WAKE# BATLOW#
Power MGT
SERIRQ M5
33,35 SERIRQ SERIRQ
PM_THRM# AJ23 R3 DNBSWON# PCIE_WAKE# R413 10K/F_4
4,37 PM_THRM# THRM# PWRBTN# DNBSWON# 35
VR_PWRGO_CLKEN D21 D20 ICH_LAN_RST# R402 0_4 PM_BATLOW# R369 8.25K/F_4
VRMPWRGD LAN_RST#
ICH_TP11 A20 D22 RSMRST# SMB_LINK_ALERT# R394 10K/F_4
TP68 TP11 RSMRST# RSMRST# 35
TP66 ICH_GPIO1 AG19 R5 SYS_RST# R407 10K/F_4

GPIO1 CK_PWRGD CK_PWG 2
Notice: GPIO20 signal KBSMI# AH21
35 KBSMI# GPIO6
SCI# AG21 R6 ECPWROK_1 R350 0_4
C should not be pulled 35 SCI# GPIO7 CLPWROK ECPWROK 6,35 C
SWI# A21
TP65 LAN_PHYPC GPIO8 ICH_SLP_M# VCC3
high for functional TP61 C12 GPIO12 SLP_M# B16 TP63
ENERGY_DEC C21
strap(internal pull TP70 BOARD_ID5 AE18
GPIO13
F24
GPIO17 CL_CLK0 CL_CLK0 6
down 20k). TP45
ICH_GPIO18 K1 GPIO18 CL_CLK1 B19
ICH_GPIO20 AF8
TP54 BOARD_ID2 GPIO20 R434
AJ22 SCLOCK/GPIO22 CL_DATA0 F22 CL_DATA0 6
WAN_OFF# A9 C19 3.24K/F_4
TP55 GPIO27 CL_DATA1
Controller Link
D19 0.405V
GPIO
28 WLAN_OFF# GPIO28
ICH_GPIO35 L1 C25 CL_VREF0_ICH No AMT,FAE suggest NC CL_VREF1
ICH_GPIO38 SATACLKREQ#/GPIO35 CL_VREF0
AE19 A19
ICH_GPIO39 AG22
SLOAD/GPIO38 CL_VREF1 wxx20071221
TP72 SDATAOUT0/GPIO39
Notice: GPIO49 is ICH_GPIO48 AF21 F21
TP73 SDATAOUT1/GPIO48 CL_RST0# CL_RST#0 6
AH24 D18 R437
also a strap A8
GPIO49 CL_RST1# C631
23 ICH_GPIO57 GPIO57/CLGPIO5
pin(internal pull up A16 BT_ON# TP60 .1U/10V_4
MEM_LED/GPIO24 SUS_PWR_ACK 453/F_4 VCC3
M7 C18
20k). Don't 23,31 ACZ_SPKR
AJ24
SPKR GPIO10/SUS_PWR_ACK
C11 AC_PRESENT R382 100K/F_4
6 MCH_ICH_SYNC# MCH_SYNC# GPIO14/AC_PRESENT
pull-down. ICH_TP3 B21 C20 ICH_WOL_EN R406 100K/F_4
MISC
23 ICH_TP3 TP3 WOL_EN/GPIO9

ICH_TP8 AH20 ICH_TP3 R432 *10K/F_4
TP67 TP8
ICH_TP9 AJ20 GPIO14 Pull low,FAE suggest
TP69 TP9
ICH_TP10 AJ21 PM_THRM# R623 8.25K/F_4
TP71 TP10 wxx20071221
ICH9M REV 1.0 SERIRQ R341 10K/F_4
CLKRUN# R373 8.25K/F_4

VCC3
KBSMI# R618 10K/F_4
SCI# R615 10K/F_4

B R418 B
1K/F_4 ICH_GPIO35 R569 10K/F_4
VR_PWRGO_CLKEN
3
Q13
BS870-7-F R399
100K/F_4 ICH_GPIO38 R408 10K/F_4
2 VCC3
40 VR_PWRGD_CK410#
SUS_PWR_ACK R403 10K/F_4
R612 *10K/F_4 BOARD_ID0 R409 10K/F_4

RSMRST# R422 10K/F_4
1
R634 *10K/F_4 BOARD_ID1 R431 10K/F_4
VCC3 3VSUS
NOTE for B stage: R617 *10K/F_4 BOARD_ID2 R417 10K/F_4
Stuff R339 Johnny 2008.01.30

C539 .1U/10V_4 R621 *10K/F_4 BOARD_ID3 R421 10K/F_4
R339
2K/F_4
R626 10K/F_4 BOARD_ID4 R427 *10K/F_4
5
U26
6,40 DELAY_VR_PWRGOOD 2
4 PM_ICH_PWROK R601 10K/F_4 BOARD_ID5 R400 *10K/F_4
ECPWROK 1
A 6,35 ECPWROK A
TC7SH08FU
3
R564
10K/F_4
PROJECT : CH5
R566 *0_4
ICH9-M GPIO 3/4 1A

5 4 3 2 1
5 4 3 2 1
Note for C stage:

Change R364,R352
value to 100 ohm.
Change C547 value
VCC5
VCC3
+3VRTC
A23
U46F
VCCRTC VCC1_05[01] A15
B15
VCC1_05 1.634A
VCCP
AA26
AA27
U46E
VSS[001] VSS[107] H5
J23
26
VCC1_05[02] 23,35 +3VRTC VSS[002] VSS[108]
to 1uF. 4/7 C613 C615 A6 C15 C579 C578 AA3 J26
V5REF VCC1_05[03] 4,9,23,24,27,28,41,46 VCC1.5 VSS[003] VSS[109]
2
VCC1_05[04] D15 2,4,6,9,10,12,15,19,20,21,22,23,24,25,27,28,29,30,31,32,33,34,35,36,37,39,40,43,46 VCC3 AA6 VSS[004] VSS[110] J27
R364 D20 .1U/10V_4 .1U/10V_4 AE1 E15 .1U/10V_4 .1U/10V_4 AB1 AC22
V5REF_SUS VCC1_05[05] 23,24,25,30,31,43,46 RVCC3 VSS[005] VSS[111]
100/F_4 F15 AA23 K28
VCC1_05[06] VCC1.5 43,46 RVCC5 VSS[006] VSS[112]
RB501V-40 AA24 L11 20,21,22,27,32,34,35,36,37,43,46 VCC5 AB28 K29
+5VREF VCC1_5_B[01] VCC1_05[07] VSS[007] VSS[113]
AA25 L12 VCCDMIPLL 23mA 2,3,4,5,6,8,9,23,40,41,46 VCCP AB29 L13
1
VCC1_5_B[02] VCC1_05[08] VSS[008] VSS[114]
AB24 VCC1_5_B[03] VCC1_05[09] L14 AB4 VSS[009] VSS[115] L15
RVCC5 RVCC3 C560 V5REF 2mA AB25 L16 +1.5V_ICH_VCCDMIPLL AB5 L2
D VCC1_5_B[04] VCC1_05[10] VSS[010] VSS[116] D
1U/6.3V_4 AC24 L17 L48 AC17 L26
VCC1_5_B[05] VCC1_05[11] VSS[011] VSS[117]
2
AC25 L18 1uH/300mA_8 AC26 L27

R352 VCC1_5_B[06] VCC1_05[12] C640 C641 VSS[012] VSS[118]
AD24 VCC1_5_B[07] VCC1_05[13] M11 AC27 VSS[013] VSS[119] L5
100/F_4 D19 AD25 M18 AC3 L7
RB501V-40 VCC1_5_B[08] VCC1_05[14] .01U/16V_4 10U/6.3V/X5R_8 VSS[014] VSS[120]
AE25 VCC1_5_B[09] VCC1_05[15] P11 AD1 VSS[015] VSS[121] M12
+5VREF_SUS AE26 P18 AD10 M13
1
VCC1_5_B[10] VCC1_05[16] VSS[016] VSS[122]

AE27 VCC1_5_B[11] VCC1_05[17] T11 AD12 VSS[017] VSS[123] M14
C547 5VREF_SUS 2mA AE28 T18 VCCP AD13 M15
1U/6.3V_4 VCC1_5_B[12] VCC1_05[18] VSS[018] VSS[124]
AE29 VCC1_5_B[13] VCC1_05[19] U11 VCCDMI 48mA AD14 VSS[019] VSS[125] M16
VCC1.5 F25 U18 AD17 M17
CORE
VCC1_5_B[14] VCC1_05[20] +1.05V_ICH_DMI L42 VSS[020] VSS[126]
G25 VCC1_5_B[15] VCC1_05[21] V11 AD18 VSS[021] VSS[127] M23
H24 V12 HCB1608KF-181T15_6 AD21 M28
VCC1_5_B[16] VCC1_05[22] VCCP VSS[022] VSS[128]
H25 VCC1_5_B[17] VCC1_05[23] V14 AD28 VSS[023] VSS[129] M29
J24 V16 C599 AD29 N11
VCC1_5_B[18] VCC1_05[24] 4.7U/6.3V/X5R_6 VSS[024] VSS[130]
J25 VCC1_5_B[19] VCC1_05[25] V17 V_CPU_IO 2mA AD4 VSS[025] VSS[131] N12
VCC1_5B 646mA K24 V18 R405 0_6 AD5 N13
VCC1_5_B[20] VCC1_05[26] VSS[026] VSS[132]
K25 VCC1_5_B[21] AD6 VSS[027] VSS[133] N14
L61 +1.5V_PCIE_ICH L23 R29 AD7 N15
VCC1_5_B[22] VCCDMIPLL VSS[028] VSS[134]
1
HCB1608KF-181T15_6 L24 C595 C594 C601 AD9 N16

C618 VCC1_5_B[23] VSS[029] VSS[135]
+ L25 VCC1_5_B[24] VCC_DMI[1] W23 AE12 VSS[030] VSS[136] N17
C888 C862 C607 1U/6.3V/X5R_4 M24 Y23 .1U/10V_4 .1U/10V_4 4.7U/6.3V/X5R_6 AE13 N18
220U/2.5V_3528 10U/6.3V/X5R_8 2.2U/6.3V/X5R_6 VCC1_5_B[25] VCC_DMI[2] VCC3 VSS[031] VSS[137]
M25 AE14 N26
2
VCC1_5_B[26] +1.05V_CPU_IO VSS[032] VSS[138]

N23 VCC1_5_B[27] V_CPU_IO[1] AB23 AE16 VSS[033] VSS[139] N27
N24 VCC1_5_B[28] V_CPU_IO[2] AC23 AE17 VSS[034] VSS[140] P12
N25 VCC1_5_B[29] AE2 VSS[035] VSS[141] P13
P24 AG29 +3V_DMI_ICH R670 0_6 AE20 P14
VCC1.5 VCC1_5_B[30] VCC3_3[01] VSS[036] VSS[142]
P25 VCC1_5_B[31] AE24 VSS[037] VSS[143] P15
VCCA3GP
VCCSATAPLL 47mA R24 AJ6 +3V_SATA_ICH R584 0_6 AE3 P16
VCC1_5_B[32] VCC3_3[02] VSS[038] VSS[144]
R25 VCC1_5_B[33] AE4 VSS[039] VSS[145] P17
+1.5V_SATA_ICH L40 +1.5V_APLL_ICH R26 AC10 +3V_VCCPCORE_ICH R424 0_6 AE6 P2
R385 0_8 10uH/100MA_8 VCC1_5_B[34] VCC3_3[07] VSS[040] VSS[146]
R27 VCC1_5_B[35] AE9 VSS[041] VSS[147] P23
C840 T24 AD19 C606 C558 C647 AF13 P28
C845 1U/6.3V/X5R_4 VCC1_5_B[36] VCC3_3[03] VSS[042] VSS[148]
T27 VCC1_5_B[37] VCC3_3[04] AF20 AF16 VSS[043] VSS[149] P29
C 10U/6.3V/X5R_8 .1U/10V_4 .1U/10V_4 .1U/10V_4 C
T28 VCC1_5_B[38] VCC3_3[05] AG24 VCC3_3 308mA AF18 VSS[044] VSS[150] P4
VCCP_CORE
T29 VCC1_5_B[39] VCC3_3[06] AC20 AF22 VSS[045] VSS[151] P7
U24 VCC1_5_B[40] AH26 VSS[046] VSS[152] R11
U25 B9 +3V_PCI_ICH R349 0_6 AF26 R12
VCC1_5_B[41] VCC3_3[08] VSS[047] VSS[153]
VCC1_5_A 1.342A V24 VCC1_5_B[42] VCC3_3[09] F9 AF27 VSS[048] VSS[154] R13
V25 G3 C572 C569 C570 AF5 R14
VCC1_5_B[43] VCC3_3[10] VSS[049] VSS[155]
U23 VCC1_5_B[44] VCC3_3[11] G6 AF7 VSS[050] VSS[156] R15
C584 W24 J2 .1U/10V_4 .1U/10V_4 .1U/10V_4 AF9 R16
1U/6.3V/X5R_4 VCC1_5_B[45] VCC3_3[12] VSS[051] VSS[157]
W25 VCC1_5_B[46] VCC3_3[13] J7 AG13 VSS[052] VSS[158] R17
PCI
K23 VCC1_5_B[47] VCC3_3[14] K7 AG16 VSS[053] VSS[159] R18
Y24 VCC1_5_B[48] VCCHDA 11mA AG18 VSS[054] VSS[160] R28
Y25 AJ4 +1.5V_VCCHDA R360 *0_6 VCC1.5 AG20 T12
VCC1_5_B[49] VCCHDA VSS[055] VSS[161]
VCCSUSHDA 11mA AG23 VSS[056] VSS[162] T13
AJ19 AJ3 VCCSUS_HDA R581 *0_6 1.5V_S5 R582 0_6 VCC3 AG3 T14
VCCSATAPLL VCCSUSHDA VSS[057] VSS[163]
AG6 VSS[058] VSS[164] T15
C586 AC16 AC8 TP_VCCSUS1_05_ICH_1 TP53 R357 0_6 RVCC3 C555 AG9 T16
1U/6.3V/X5R_4 VCC1_5_A[01] VCCSUS1_05[1] TP_VCCSUS1_05_ICH_2 .1U/10V_4 VSS[059] VSS[165]
AD15 VCC1_5_A[02] VCCSUS1_05[2] F17 TP62 AH12 VSS[060] VSS[166] T17
AD16 C550 AH14 T23
VCC1_5_A[03] VSS[061] VSS[167]
ARX
AE15 AD8 TP_VCCSUS1_5_ICH_1 TP56 .1U/10V_4 AH17 B26

VCC1_5_A[04] VCCSUS1_5[1] VSS[062] VSS[168]
AF15 VCC1_5_A[05] AH19 VSS[063] VSS[169] U12
AG15 F18 +1.5VSUS_INT_ICH AH2 U13
VCC1_5_A[06] VCCSUS1_5[2] C593 VSS[064] VSS[170]
AH15 VCC1_5_A[07] AH22 VSS[065] VSS[171] U14
AJ15 VCC1_5_A[08] AH25 VSS[066] VSS[172] U15
A18 .1U/10V_4 RVCC3 AH28 U16
VCCSUS3_3[01] VSS[067] VSS[173]
AC11 D16 AH5 U17
VCCPSUS

AD11 VCC1_5_A[10] VCCSUS3_3[03] D17 AH8 VSS[069] VSS[175] AD23
AE11 E22 +3VS5_SB_1 R390 0_6 AJ12 U26
ATX
AF11 VCC1_5_A[12] AJ14 VSS[071] VSS[177] U27

VCCUSBPLL 11mA AG10 VCC1_5_A[13] AJ17 VSS[072] VSS[178] U3
R367 0_6 +1.5V_USB_ICH AG11 AF1 C585 C589 AJ8 V1
AH10 VCC1_5_A[15] B11 VSS[074] VSS[180] V13
VCC1_5_A 1.342A C554 AJ10 T1 .1U/10V_4 .1U/10V_4 B14 V15
VCCSUS3_3[07] T2 B17 VSS[076] VSS[182] V23
B .1U/10V_4 AC9 T3 B2 V28 B
VCCSUS3_3[09] T4 B20 VSS[078] VSS[184] V29
AC18 VCC1_5_A[18] VCCSUS3_3[10] T5 VCCSUS3_3 212mA B23 VSS[079] VSS[185] V4
AC19 T6 +3VS5_SB_2 R366 0_6 B5 V5
VCCSUS3_3[12] U6 B8 VSS[081] VSS[187] W26
AC21 U7 C26 W27
VCCPUSB
VCC3 C562 VCC1_5_A[20] VCCSUS3_3[13] C567 C556 C549 VSS[082] VSS[188]

VCCSUS3_3[14] V6 C27 VSS[083] VSS[189] W3
G10 VCC1_5_A[21] VCCSUS3_3[15] V7 E11 VSS[084] VSS[190] Y1
.1U/10V_4 G9 W6 .022U/16V_4 .022U/16V_4 .1U/10V_4 E14 Y28
VCCLAN3_3 78mA VCCSUS3_3[17] W7 E18 VSS[086] VSS[192] Y29
AC12 VCC1_5_A[23] VCCSUS3_3[18] Y6 E2 VSS[087] VSS[193] Y4
R383 0_6 +3V_VCCPAUX AC13 Y7 E21 Y5
AC14 VCC1_5_A[25] VCCSUS3_3[20] T7 E24 VSS[089] VSS[195] AG28
E5 VSS[090] VSS[196] AH6
C575 AJ5 G22 +1.05V_CL_INT_ICH E8 AF2
.1U/10V_4 VCCUSBPLL VCCCL1_05 VSS[091] VSS[197]
F16 VSS[092] VSS[198] B25
AA7 G23 +1.5V_CL_INT_ICH F28
VCC1_5_A[26] VCCCL1_5 VSS[093]
USB CORE
AB6 VCC1_5_A[27] F29 VSS[094] VSS_NCTF[01] A1

AB7 A24 C602 C610 C597 G12 A2
+1.05V_LAN_ICH VCC1_5_A[28] VCCCL3_3[1] +3V_CL_ICH R628 VSS[095] VSS_NCTF[02]
AC6 VCC1_5_A[29] VCCCL3_3[2] B24 G14 VSS[096] VSS_NCTF[03] A28
AC7 0_6 1U/6.3V/X5R_4 .1U/10V_4 .1U/10V_4 G18 A29
VCC1_5_A[30] VSS[097] VSS_NCTF[04]
VCCCL3_3 19mA G21 VSS[098] VSS_NCTF[05] AH1
C571 A10 VCC3 G24 AH29
.1U/10V_4 VCCLAN1_05[1] VSS[099] VSS_NCTF[06]
A11 VCCLAN1_05[2] G26 VSS[100] VSS_NCTF[07] AJ1
G27 VSS[101] VSS_NCTF[08] AJ2
A12 VCCLAN3_3[1] G8 VSS[102] VSS_NCTF[09] AJ28
VCC1.5 B12 H2 AJ29
VCCLAN3_3[2] VSS[103] VSS_NCTF[10]
H23 VSS[104] VSS_NCTF[11] B1
L44 1uH/300mA_8 +1.5V_ICH_GLANPLL A27 H28 B29
VCCGLANPLL RVCC3 1.5V_S5 VSS[105] VSS_NCTF[12]
H29 VSS[106]
U27
GLAN POWER
VCCGLANPLL 23mA D28 VCCGLAN1_5[1]

C639 C634 D29 3 4 ICH9M REV 1.0
10U/6.3V/X5R_8 2.2U/6.3V/X5R_6 VCCGLAN1_5[2] VIN VOUT
E26 VCCGLAN1_5[3]
A E27 VCCGLAN1_5[4] A
C536
+1.5V_PCIE_ICH R356
A26 VCCGLAN3_3 1U/6.3V/X5R_4
1 SHDN R1 22.1K/F_4
C603 VCCGLAN1_5 80mA ICH9M REV 1.0
VCC3 C543
4.7U/6.3V/X5R_6 2 5
R638 0_6 +3V_GLAN_ICH GND SET 4.7U/6.3V/X5R_6
IC(5P) G913C (SOT23-5)EP PROJECT : CH5
VCCGLAN3_3 1mA
R2 R353 Quanta Computer Inc.
100K/F_4
Vout=1.25(1+R1/R2)
ICH9-M Power 4/4 1A

5 4 3 2 1
5 4 3 2 1
SATA HDD SATA ODD 27

CN20
CN23
1 1 S1
GND1 SATA_TXP0 GND1
TXP 2 SATA_TXP0 23 23 SATA_TXP1 2 TXP
D 3 SATA_TXN0 3 14 D
TXN SATA_TXN0 23 23 SATA_TXN1 TXN 14
GND2 4 4 GND2
5 SATA_RXN0 SATA_RXN0 23 23 SATA_RXN1 5
RXN SATA_RXP0 RXN
RXP 6 SATA_RXP0 23 23 SATA_RXP1 6 RXP
GND3 7 7 GND3 S7
8 R527 1K/F_4 8 P1
3.3V +3.3VSATA DP
3.3V 9 9 +5V
3.3V 10 +5V_ODD 10 +5V
GND 11 11 MD 15 15
GND 12 12 GND
GND 13 13 GND
14 P6
5V HDD_5V
15 SATA_ODD_CON
5V
5V 16
GND 17
RSVD 18
23 GND GND 19
24 GND 12V 20
25 GND 12V 21
26 GND 12V 22
SATA
HDD_5V +5V_ODD
C +3.3VSATA C
120 mils R358 0_0805
120 mils R271 0_8
VCC5 80 mils VCC5
R363 0_0805 VCC3
C538 C541 C545
0.1U 0.1U 10U_0805 C565 C359 C349 C337 C324 C372
C559 4.7U_0805 .1U/10V .1U/10V .1U/10V .1U/10V 10U/6.3V
0.1U
New Card
NEW CARD 3V_NEWCARD

U28
R5460_4 CN6 FEB800601
B LP12 B
1 GND_1 3VSUS 17 AUXIN AUXOUT 15 3VAUX_NEW
USBP6- 1 2 USBP6-_C 2 2 3
24 USBP6- USB- VCC3 3.3VIN_0 3.3VOUT_0 3V_NEWCARD
USBP6+ 4 3 USBP6+_C 3 4 5
24 USBP6+ USB+ 3.3VIN_1 3.3VOUT_1
CPUSB# 4 12 11
CPUSB# VCC1.5 1.5VIN_0 1.5VOUT_0 1.5V_NEWCARD
*WCM2012-90 5 14 13
R5440_4 RSV_0 1.5VIN_1 1.5VOUT_1
6 RSV_1
2,10 CGCLK_SMB 7 SMBCLK
2,10 CGDAT_SMB 8 SMBDATA ExpressSwitch
9 +1.5V
10 20 8 PERST#
1.5V_NEWCARD +1.5V SHDN# PERST#
11 1 10 CPPE#
25,28,30 PCIE_WAKE# WAKE# STBY# CPPE#
12 6 9 CPUSB#
3VAUX_NEW +3.3VAUX 24,28,30 PLTRST# SYSRST# CPUSB#
PERST_C# 13 19
PERST# OC#
14 +3.3V_1 16 NC
15 +3.3V_2 7 GND0 RCLKEN 18
NEW-CARD_CLK_REQ# 16
2 NEW-CARD_CLK_REQ# CLKREQ#
CPPE# 17
CLK_PCIE_NEW_C# CPPE# R5538D001-TR-F
2 CLK_PCIE_NEW_C# 18 REFCLK-
CLK_PCIE_NEW_C 19
2 CLK_PCIE_NEW_C REFCLK+
20 GND_2
PCIE_RXN1C573 0.1U PCIE_RXN1_C 21
24 PCIE_RXN1 PERn0
PCIE_RXP1C576 0.1U PCIE_RXP1_C 22
24 PCIE_RXP1 PERp0
23 R355 33K
PCIE_TXN1 GND_3 PERST# PERST_C#
24 PCIE_TXN1 24 PETn0 1 2
PCIE_TXP1 25
NC1
NC2
NC3
NC4
24 PCIE_TXP1 PETp0 C809

26 GND_4 3V_NEWCARD 3VAUX_NEW 1.5V_NEWCARD 4700P
27
28
29
30
A C552 C548 C806 C546 C544 C537 A
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
PROJECT : CH5
SATA ODD/HD/NEWCARD 1A

5 4 3 2 1
A B C D E
3VSUS
3VSUS 2750/ 1100 ([mA] Peak/ Normal)
VCC1.5 3VSUS
NOTE for B stage:
Change pin2,39,41,52 connect to 3VSUS
Add pin37,43 to GND
28
Johnny 2008.01.15
CN22
Mini PCI-E Card 51
49
Reserved +3.3V 52
50
Reserved GND
47 Reserved +1.5V 48
D R673 0_4 45 46 D
Reserved LED_WPAN#
43 44
WLAN R674 0_4
41
39
Reserved
Reserved
LED_WLAN#
LED_WWAN# 42
40 LP8
R3330_4
Reserved GND USBP10+_C
37 Reserved USB_D+ 38 1 2 *WCM2012-90 USBP10+ 24
35 36 USBP10-_C 4 3
GND USB_D- USBP10- 24
PCIE_TXP0 33 34
24 PCIE_TXP0 PETp0 GND
PCIE_TXN0 31 32 PDAT_SMB R3360_4
24 PCIE_TXN0 PETn0 SMB_DATA PDAT_SMB 2,25
29 30 PCLK_SMB
GND SMB_CLK PCLK_SMB 2,25
27 GND +1.5V 28
PCIE_RXP0 25 26 R319 10K VCC3
24 PCIE_RXP0 PERp0 GND
PCIE_RXN0 23 24
24 PCIE_RXN0 PERn0 +3.3Vaux
21 22 PLTRST#
GND PERST# PLTRST# 24,27,30
PCLK_DEBUG 19 20 D15 1SS355
2 PCLK_DEBUG Reserved Reserved WLAN_ON 35
17 Reserved GND 18
15 16 LAD0_1 RP36 3 4 0X2 LAD0 D16 *1SS355

GND Reserved LAD0 23,35 WLAN_OFF# 25
3VSUS CLK_PCIE_MINI_WLAN 13 14 LAD1_1 1 2 LAD1
2 CLK_PCIE_MINI_WLAN REFCLK+ Reserved LAD1 23,35
CLK_PCIE_MINI_WLAN# 11 12 LAD2_1 3 4 LAD2
2 CLK_PCIE_MINI_WLAN# REFCLK- Reserved
9 10 LAD3_1 RP35 1 2 0X2 LAD3 LAD2 23,35
GND Reserved
2
CLK_MINI_OE# 7 8 0 LFRAME# LAD3 23,35
T42 CLKREQ# Reserved LFRAME# 23,35
2
5 6 R531 Q26
Reserved +1.5V DTC144EUA
3 Reserved GND 4
PCIE_WAKE# 3 1 1 2
25,27,30 PCIE_WAKE# WAKE# +3.3V
1 3 WLAN_LED# 37
Q11 1827680-1
*2N7002E-LF@NC
Add to fix WLAN LED glitter issue
C PCLK_DEBUG C
3VSUS VCC3 VCC1.5
R318
*22
C563 C557 C533 C473 C518 C526 C479

0.1U 1U_0603 0.1U 10U/6.3V 0.01U 0.1U 10U/6.3V
C510
*22P
EMI
VCC1.5 3VSUS
CN24
51 Reserved +3.3V 52
49 Reserved GND 50
47 48 R362
Reserved +1.5V
45 Reserved LED_WPAN# 46 *0_6@NC
43 Reserved LED_WLAN# 44
41 Reserved LED_WWAN# 42
39 Reserved GND 40
37 38 USBP5+_C R384 *0@NC
Mini PCI-E Card 24 PCIE_TXP4
PCIE_TXP4
35
33
Reserved
GND
PETp0
USB_D+
USB_D-
GND
36
34
USBP5-_C R381 *0@NC
USBP5+
USBP5-
24
24
PCIE_TXN4 31 32 R376 *0@NC
24 PCIE_TXN4 PETn0 SMB_DATA PDAT_SMB 2,25
29 30 R370 *0@NC
GND SMB_CLK PCLK_SMB 2,25
27 GND +1.5V 28
B PCIE_RXP4 25 26 B
ROBSON 24
24
PCIE_RXP4
PCIE_RXN4
PCIE_RXN4 23
21
PERp0
PERn0
GND
+3.3Vaux 24
22 PLTRST#
PLTRST# 24,27,30
GND PERST#
19 Reserved Reserved 20
17 Reserved GND 18
15 GND Reserved 16
CLK_PCIE_MINI_RB 13 14
2 CLK_PCIE_MINI_RB REFCLK+ Reserved
CLK_PCIE_MINI_RB# 11 12
2 CLK_PCIE_MINI_RB# REFCLK- Reserved
9 GND Reserved 10
2 ROB_CLK_REQ# 7 CLKREQ# Reserved 8
5 Reserved +1.5V 6
3VSUS 3 4
Reserved GND TV_SENSE# 35
1 2 +3V_TV R340 0
WAKE# +3.3V VCC3
2
1827680-1 When used TV card, not stuff this resistor

PCIE_WAKE# 3 1
Q10
*2N7002E-LF@NC
Nicole update per Intel Rosbon
need double check
VCC3 +3V_TV
3VSUS VCC3 VCC1.5 L39
*BK2125HS330_8
A 1 3 A
*AO@NC
C534 C535 C551 C553 C542 C566 C582 Q12
2
*0.1U *1U_0603 0.1U 10U/6.3V 0.01U 0.1U 10U/6.3V *10U/6.3V@NC C829 C837
35 TV_POWERON# *.1U/10V@NC
PROJECT : CH5
WIRELESS/ ROBSON 1A

A B C D E
5 4 3 2 1
29
USB PORT Cable USB Conn
U24
G545B2RD1U U51
USBVCC8 USBVCC8 G545B2RD1U
5VSUS 2 IN1 OUT3 8 40 mils USBVCC1 USBVCC1
D
3 IN2 OUT2 7
6
5VSUS 2
3
IN1 OUT3 8
7
40 mils D
R283 *0_4@NC OUT1 + C745 IN2 OUT2
4 EN# OUT1 6
24 USBPWR_EN2# 1 C747 R647 *0_4@NC 4 + C889
GND OC8#_C R282 0 0.1U 100U/6.3V_C 24 USBPWR_EN4# EN# C887
9 GND-C OC# 5 USB_OC#8 24 1 GND
R284 9 5 OC1#_C R667 0 0.1U 100U/6.3V_C
GND-C OC# USB_OC#1 24
R658
0_4
0_4
R292 0
CN21
LP7 USBVCC8 4
USBP8-_C 4
24 USBP8- 4 3 3 3
1 2 USBP8+_C 2 6
24 USBP8+ 2 6
1 5 R665 0
*WCM2012-90 1 5
C452 C445 LP14
R2940 *47P *47P USB 1 2 USBP1-_C
24 USBP1-
4 3 USBP1+_C
24 USBP1+
*WCM2012-90
C877 C884
R657 0 *47P *47P
U23
G545B2RD1U
USBVCC9 USBVCC9
C
5VSUS 2
3
IN1 OUT3 8
7
40 mils C
IN2 OUT2
OUT1 6
R160 *0_4@NC 4 + C719
24 USBPWR_EN3# EN# C723
1 GND
9 5 OC#9_C R158 0 USB_OC#9 24 0.1U 100U/6.3V_C
R155 GND-C OC# U49
G545B2RD1U
0_4 USBVCC0 USBVCC0
5VSUS 2
3
IN1 OUT3 8
7
40 mils
IN2 OUT2
OUT1 6
R636 *0_4@NC 4 0.1U + C853
24 USBPWR_EN1# EN# C848
1 GND
9 5 OC0#_C R620 0 100U/6.3V_C
GND-C OC# USB_OC#0 24
R217 0
CN19 R637
LP6 USBVCC9 4
USBP9-_C USBP9-_C 4 0_4
24 USBP9- 4 3 3 3
1 2 USBP9+_C USBP9+_C 2 6
24 USBP9+ 2 6
1 1 5 5
*WCM2012-90
C290 C273
R2280 *47P *47P USB
R641 0
LP13
B 1 2 USBP0-_C B
24 USBP0-
4 3 USBP0+_C
VCC3 24 USBP0+
Blue Tooth Connector *WCM2012-90

C863 C870
R639 0 *47P *47P
1
Q14
2 AO3403
35 BT_ON#
Activate: L C642 .1U_4 CN9

3
CN8
L45 5
BT_VCC 5 USBP0+_C 1
4 4 2
BK2125HS330_8 3 USBP0-_C
R446 0_4 3 USBVCC0 3
2 2 4
1 USBVCC1
LP9 1 USBP1+_C 5
USBP4+_C USBP1-_C 6
24 USBP4+ 4 3 7
24 USBP4- 1 2 USBP4-_C
BT_USB 8
*WCM2012-90 USB-CON
2
R444 0_4
Q15
DTC144EUA update signal sequence,
A
3 1
cable need update A
37 BT_LED#
12/05
PROJECT : CH5
USB 1A

5 4 3 2 1
5 4 3 2 1
Giga LAN- Marvell 8055

RVCC3
30
(4mA) RVCC3
61
45
40
65
36
37
35
34
U20
1
D D
R97
VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL
EPAD
SPI_CS
SPI_CLK
SPI_DO
AVDDH(3.3V)
SPI_DI
10K_4
R100 4.7K_4 C99 0.1U_4 PCIE_RXP2_R 49
24 PCIE_RXP6_LAN TX_P
10 LOM_DISABLE#
R102 4.7K_4 C100 0.1U_4 PCIE_RXN2_R LOM_DISABLEn
24 PCIE_RXN6_LAN 50 TX_N
VAUX_AVLBL 12 RVCC3
54 C136
24 PCIE_TXP6_LAN RX_P
U34 11 *0.1U_4
LAN_VPDCLK SWITCH_VCC
6 SCL A0 1 24 PCIE_TXN6_LAN 53 RX_N
LAN_VPDDATA 5 2 47
SDA A1 VMAIN_AVAL VCC3
A2 3 25,27,28 PCIE_WAKE# 6 WAKEn Pin47 should connect to non-standby power
9
7 8 55
SWITCH_VAUX FAE suggest 2/14
WP VCC RVCC3 2 CLK_PCIE_LAN REFCLKP
GND 4 RESERVED 24
2 CLK_PCIE_LAN# 56 REFCLKN
24LC08BT-I 25
C103 RESERVED R124 4.99K/F
24,27,28 PLTRST# 5 PERSTn
0.1U_4 16 LAN_RTSET
R123 49.9 MDI0+ RSET
17 MDIP[0]
4 CTRL_18
C186 1000P R122 49.9 MDI0- CTRL18
18 MDIN[0]
3 CTRL_12
C183 1000P
R121
R120
49.9
49.9
MDI1+
MDI1-
20 MDIP[1] 88E8055/8072 CTRL12
21 MDIN[1]
RESERVED 29
R118 49.9 MDI2+ 26 MDIP[2]
TESTMODE 46
RVCC3 C690 1000P R117 49.9 MDI2- 27
C MDIN[2] C
R110 49.9 MDI3+ 30 59 T2
MDIP[3] LED_ACTn
C688 1000P R108 49.9 MDI3- 31 60 T1
C98 C150 C97 C94 C117 C108 C124 MDIN[3] LED_LINK10/100n
0.1U_4 0.1U_4 0.1U_4 1000P 1000P 1000P *4.7U_6 62 T4
LAN_VPDCLK LED_LINK1000n
Closed Transfomer 38 VPD_CLK
63
LAN_VPDDATA LED_LINKn T3
Del when use Yukon 8072 41 VPD_DATA
2/14 42 CLKREQ# XTALI 15 CLK_LAN_X1 C174 33P
1
R98 43 14
RESERVED XTALO
AVDD
AVDD
AVDD
AVDD
Y1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
*0@NC 25MHz/20pF/30ppm
NC
NC
NC
NC
NC
2
CLK_LAN_X2 C160 33P
13
33
39
44
48
58
19
22
28
32
51
52
57
23
64
R105 0_6 88E8072
RVCC3
AVDD18
C685 C687 FAE suggest for not use EEPROM VDD
4.7U_6 R494 (426mA) (218mA)
0.1U_4 4.7K_4
Giga: P/N: AJ080550011 pin32, 51, 52, 57 64 and 19,22,23 are 2.5V power
3
CTRL_12 1 Q24
BCP69T1
4
2
B VDD AVDD18 CN16 B
RJ45_MX0+ 1
RJ45_MX0- RX0+
2 RX0-
U35 RJ45_MX1+ 3
C686 C105 C114 C175 C153 C101 C172 C102 C146 C96 C95 C154 MCT3 RJ45_MX2+ RX1+
1 TCT3 MCT3 24 4 TX1-
0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 1000P 10U/6.3V 1000P 1000P 1000P *4.7U_6 .01U/16V_4 MDI3+ 2 23 RJ45_MX3+ RJ45_MX2- 5
MDI3- TD3+ MX3+ RJ45_MX3- RJ45_MX1- TX2+
3 TD3- MX3- 22 6 RX2- GND 14
RJ45_MX3+ 7
C199 MCT2 RJ45_MX3- TX3+
4 TCT2 MCT2 21 8 TX3-
.01U/16V_4 MDI2+ 5 20 RJ45_MX2+
MDI2- TD2+ MX2+ RJ45_MX2-
6 TD2- MX2- 19
GND 13
C169 7 18 MCT1
.01U/16V_4 MDI1+ TCT1 MCT1 RJ45_MX1+
8 TD1+ MX1+ 17 9 NC
MDI1- 9 16 RJ45_MX1- RINGL 10
TD1- MX1- TIPL RING
11 TIP
C177 10 15 MCT0 12
R103 0_6 .01U/16V_4 MDI0+ 11 TCT0 MCT0 RJ45_MX0+ NC
RVCC3 TD0+ MX0+ 14
MDI0- 12 13 RJ45_MX0-
TD0- MX0-
C681 C682 C680 R101 NS892402P R128 R115 R106 R104 RJ11-C10054
10U/6.3V 4.7U_6 0.1U_4 4.7K_4 TRF-10-1-24P 75/F_4 75/F_4 75/F_4 75/F_4
C706
3
RJ45_TER
CTRL_18 1 Q22
1000P/3KV_1808 CN15
BCP69T1 C670 470p/3KV_1808 TIPL
4
2
C676 470p/3KV_1808 RINGL 1

AVDD18 2
A MDC_CABLE A
C674 C184 C106 C203 C116 C671 C173 C188 C158 C672 C684 C683
1000P 1000P 1000P 1000P 1000P 4.7U_6 0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4
PROJECT : CH5
Marvell 8039/55 1A

5 4 3 2 1
5 4 3 2 1
Audio Codec ALC262

ADOGND
31
35 SRS_EN
R625
20K/F
INT-MIC
32 262_AMP_MUTE#
R613 R616 AMP_HP_INR

AMP_HP_INR 32
*0_4 0_4 AMP_HP_INL MIC2-VREFO R425 2.2K_4
D AMP_HP_INL 32 D
15 SPDIF R610 E@0
+5V_ADO MIC2-R C605 1U-16V_6
CN10
L43
MIC2-L C598 1U-16V_6 R412 1K_4 INT-MIC2
1
ALC262SRS U47 BLM11A121S
48
47
46
45
44
43
42
41
40
39
38
37
2
C890 R672
SPDIFO
SPDIFI/EAPD
DMIC-CLK
NC
GPIO1
GPIO0
AVSS
HP_OUT_R
JDREF
HP_OUT_L
AVDD
MONO_OUT
MIC_INT
22P-50V_4 *1K_4
R695 0_4 SPDIFCTL ADOGND
35,39,46 VGAON
22 HDMIDET_CODEC
ADOGND
1 DVDD LINE_OUT_R 36
2 35 FRONT-R 32
23 ACZ_SDOUT_AUDIO GPIO2/DMIC-DATA LINE_OUT_L FRONT-L 32
23 ACZ_BCLK_AUDIO 3 GPIO3 SENSE_B 34
22 R599 4 33
C831 *22P DVSS DCVOL MIC1-VREFO-R
5 32
CODEC1-BITCLK0 6
SDATA_OUT
BIT_CLK
MIC1_VREFO_R
LINE2_VREFO 31
MIC2-VREFO
LINE-IN fish suggest change 1kohm
23 ACZ_SDIN0 R598 33 ACZ_SDIN0_1
7
8
DVSS
SDATA_IN
ALC262 MIC2_VREFO
LINE1_VREFO
30
29
MIC1-VREFO-L 12/03 CN27
VCC3 9 DVDD-IO MIC1_VREFO_L 28
23 ACZ_SYNC_AUDIO 10 SYNC VREF 27 1 9
11 26 LINE1-L C873 4.7U-25V
LINE1-L-1R660 1K_4 LINE1-L-2 2
23 ACZ_RST#_AUDIO RESET# AVSS
BEEP-RR 12 25 +5V_ADO C624 C619 6 7
C833 1U PC-BEEP AVDD 10U .1U LINE1-R C872 LINE1-R-1
4.7U-25V R662 1K_4 LINE1-R-2 3 8
4
SENSE_A
CD_GND
LINE2_R
LINE1_R
LINE2_L
LINE1_L
R389 10K BEEP ADOGND LINE1-PLG
MIC2_R
MIC1_R
5 10
MIC2_L
MIC1_L
23,25 ACZ_SPKR
CD_R
CD_L
C878 C879 2SJ-S351-005
C C832 C
R600 ADOGND 150p_4 150p_4
13
14
15
16
17
18
19
20
21
22
23
24
1K 100P
MIC1-PLG R604 20K/F_4 LINE1-R fish suggest add .1u NOTE FOR B STAGE:
LINE1-PLG R605 10K/F_4
LINE1-L
MIC1-R
12/03 ADOGND
For HB2, CN27 unstuff.
MIC1-L
HP-PLG R603 39.2K/F_4 MIC2-R
32 HP-PLG
MIC2-L
C847 .1U MIC-IN
C849 .1U
C852 .1U
C857 .1U MIC1-VREFO-L R440 2.2K_4 CN28

1 9
C860 .1U MIC1-L C625 2.2U-25V R439 1K_4 BLM11A121S L46 MICINL_SYS 2
6 7
fish suggest 3 8
MIC1-R C880 2.2U-25V R654 1K_4 BLM11A121S L47 MICINR_SYS 4
ADOGND remove Cap 5 10
wxx 07/12/03 MIC1-VREFO-R R653 2.2K_4 MIC1-PLG
2SJ-S351-001
C633 C632
150p_4 150p_4
B
MDC B
MDC Module Conn for HB2 ADOGND
RVCC3
VCC3 +5V_ADO
CN26
1 2 C866
GND RSV
23 ACZ_SDOUT_MDC 3 AC_SDO RSV 4 .1U
5 6 C834 C836 C830 C588 C617 C611 C871 C874
GND 3.3V
23 ACZ_SYNC_MDC 7 AC_SYNC GND 8
R430 33 ACZ_SDIN1_1 9 10 .1U .1U .1U 10U .1U 10U .1U 10U
23 ACZ_SDIN1 AC_SDI GND
23 ACZ_RST#_MDC 11 AC_RST# AC_BCLK 12 ACZ_BCLK_MDC 23
MDC
R643 ADOGND
C867
*10P *22 Close to pin38 and 25
R691 0
C868
*10P
R415 0
A R457 0 A
NOTE:
Add for EMI
ADOGND PROJECT : CH5

ALC262/MIC/LINE/MDC 1A

5 4 3 2 1
5 4 3 2 1
+3V_AVDD ADOGND +5V_ADO

32
U48
32
38
37
31
26
18
19
Audio Amplifier
5
AGC-attack-time selection
VCC_CP
VCC_HP
VCC
VCC_SPR
Test4
Test3
Test2
Test1
VCC_SPL
D AGC_Attack (4 pin) Attack time D
AGC_Lv1 2 43 C621 1U_6 ADOGND LOW 1 ms default
AGC_Lv1 VSS Hi 2 ms
AGC_Lv2 3 AGC_Lv2 VSS_CP 42 AGC ON/OFF selection
AGC_Attack 4 41 C612 1U_6 AGC_ON/OFF (6 pin) AGC ON/OFF
AGC_Attack C2 LOW ON default
AGC_ON/OFF 6 39 Hi OFF
AGC_ON/OFF C1
AGC_Recovery1 10 23 INSPKL+ C609 100P
AGC_Recovery1 SP_OUTL+
R607 10K/F_6
AGC_Recovery2 11
AGC_Recovery2 SP_OUTL+ 22 AGC-on-level selection
C839 4.7U_6 FRONT-L-1 FRONT-L-2 29 21 INSPKL- C614 100P AGC_Lv1 (2 pin) AGC_Lv2 (3 pin) AGC ON Level Output Po (RL=4 ohm)
31 FRONT-L R606 10K/F_6 SP_INL SP_OUTL　 LOW LOW 9.8 dBV 2.1 W
C881 4.7U_6 FRONT-R-1

R661 10K/F_6
C838 820P_4 PREOUT-L28
FRONT-R-2
PREOUT_L Panasonic SP_OUTL　 20
INSPKR- C620 100P

ADOGND LOW
Hi
Hi
Hi
LOW
Hi
9.0 dBV
8.1 dBV
6.0 dBV
1.8 W
1.5 W
1.0 W
31 FRONT-R R659 10K/F_6
8 SP_INR SP_OUTR　 17 default
C674 & C677 change to 820pF C882 820P_4 PREOUT-R9
PREOUT_R
AN12948A SP_OUTR　 16 AGC-recovery-time selection
as Panasonic FAE recommended. C623 100P AGC_Recovery1 (10 pin) AGC_Recovery2 (11 pin) Recovery Time
C843 1U_6 INSPKR+
6/11 ADOGND 27 VREFSP SP_OUTR+ 15 Change R632,R644 value to 10kohm LOW LOW 1.0 s
LOW Hi 2.0 s
33 SP_STBY1 SP_OUTR+ 14 for C stage. 4/16 Hi LOW 4.0 s default
34 45 HP_L Hi Hi 8.0 s
+3V_AVDD SP_STBY2 HP_OUTL R632 10K_6
MUTE FUNCTION 35 HP_STBY1 HP_INL 44 HPINL R633 10K_6 SURR-L1 C864 4.7U_6
AMP_HP_INL 31
SP_STBY ON/OFF & HP_STBY ON/OFF
36 48 HPINR R645 10K_6 SURR-R1
HP_STBY2 HP_INR AMP_HP_INR 31 SP_STBY1 (33 pin) SP_STBY2 (34 pin) SP_STBY ON/OFF
R416 R644 10K_6 C869 4.7U_6
10K 25 47 HP_R LOW LOW ON
C MUTE# NC HP_OUTR LOW Hi OFF C
35 AMP_VOLMUTE# 1 2
D22 SW1010CPT Hi LOW OFF
GND_SPR
GND_SPL
12 60
GND_CP
NC EP Hi Hi OFF
EP 59
52
GND
GND
GND
EP CPGND HP_STBY1 (35 pin) HP_STBY2 (36 pin) HP_STBY ON/OFF
EP
EP
EP
EP
EP
EP
EP
EP
EP
1 2 LOW LOW ON
31 262_AMP_MUTE#
D21 *SW1010CPT LOW Hi OFF
30
46
40
24
13
49
53
54
55
56
57
58
50
51
Hi LOW OFF
Hi Hi OFF
S42 unstuff D40,Stuff D40
wxx 20070919
CPGND -- ISOLATED GND
ADOGND CPGND CPGND
(For Thermal Purpose)
SPEAKER
VCC3 +3V_AVDD
CN7 L41
INSPKL- L52 BK1608LL121 INSPKL-N 1 2
INSPKL+ L51 BK1608LL121 INSPKL+N 1 2
3 3 4 4
ADOGND 5 6 TI201209G121_8_3A
INSPKR- L50 BK1608LL121 INSPKR-N 5 6 C604 C596 C875 C600 C855
7 7 8 8
INSPKR+ L49 BK1608LL121 INSPKR+N 9 10 +5V_ADO C592 10U-6.3V_8 .1U_4 1U_6 1U_6 1U_6
9 10 VCC5 *10U-6.3V_8
11 1112 12
C644 C648 C646 C645 INT_SpK L62

ADOGND BK2125HS330 ADOGND
B 47P 47P 47P 47P need check PN B
11/13 C859 C865 C854 C616
10U 1U_6 1U_6
.1U
ADOGND
ADOGND
R624 0_4
Headphone out R456 0_4
+3V_AVDD
CN29
R449 100_4 1 9 C861 .1U_4
HP_L 1 2 HPOUT_L 2
6 7 C649 .1U_4
HP_R 1 2 HPOUT_R 3 8
R450 100_4 4
C638 C635 5 10 R445 R447 R448 R451 R452 R454
10K_4 *10K_4 *10K_4 *10K_4 10K_4 *10K_4 C856 1000P_4
180P 180P 2SJ-S351-003
AGC_Lv1 C643 1000P_4
AGC_Lv2
AGC_Attack
1
ADOGND D25 ADOGND AGC_ON/OFF ADOGND

AGC_Recovery1
1
HP-PLG For ESD AGC_Recovery2

31 HP-PLG
A R646 R649 R656 R666 R668 R671 A

2
*10K_4 10K_4 10K_4 10K_4 *10K_4 10K_4

*3301D-ESD
2
ADOGND
PROJECT : CH5
ADOGND
AMPLIFIER&JACKS 1A

5 4 3 2 1
5 4 3 2 1
24 AD[0..31]
AD31
AD30
AD29
AD28
125
126
127
U44B
AD31
AD30
AD29
VCC_PCI1
VCC_PCI2
VCC_PCI3
10
20
27
VCC3
C835
C822
C808
.01U/16V
.01U/16V
10U/6.3V
33
1 AD28 VCC_PCI4 32
AD27 2 41
AD26 AD27 VCC_PCI5
3 AD26 VCC_PCI6 128
AD25 5 AD25 Serial EEPROM
AD24 6 61 C824 .01U/16V
AD23 AD24 VCC_RIN C817 .1U/10V VCC3
9 AD23
D PCI_CLK_5C833 AD22 11 120 VCC_ROUT_833 D
AD22 VCC_ROUT5 VCC_ROUT_833
AD21 12 114 C811 .01U/16V VCC3
AD20 AD21 VCC_ROUT4 C841 .01U/16V
14 AD20 VCC_ROUT3 64
AD19 15 34 C821 0.47U/10V
AD18 AD19 VCC_ROUT2 C842 .47U/10V R655 R664 C630 .01U/16V
R578 AD17
17 AD18 VCC_ROUT1 16 When HWSPND# is controlled by 10K 10K
18
*22_4@NC AD16 19
AD17
67 VCC3 C813 .01U/16V system, the pull-up resistor(R602) U50
AD15 AD16 VCC_3V VCC3 C846 10U/6.3V
36 AD15 VCC_MD 86 dose not need to apply. 8 VCC A0 1
AD14 37 7 2
PCI_CLK_5C832_D
AD13 AD14 SCL NC A1

38 AD13 6 SCL A3 3
AD12 39 SDA 5 4
AD11 AD12 HWSPND# R602 10K SDA GND
40 AD11 HWSPND# 69 VCC3
AD10 42 M24C02
AD9 AD10
43 AD9
AD8 44 58 RH832_58P R614 10K
AD8 MSEN VCC3
AD7 46 55 RH832_55P R608 10K
AD7 XDEN
PCI / OTHER
AD6 47 R609 *100K Note for B stage:
AD5 AD6 RH832_57P R611 100K
48 57
C810 AD4 49
AD5 UDIO5
65 SCL R611 STUFF
*22P/50V_4@NC AD3 AD4 UDIO3 SDA
50 AD3 UDIO4 59 R609 NC
AD2 51 56 UDIO2_RH832
AD2 UDIO2 T44
AD1 52 60 UDIO1_RH832
AD1 UDIO1 T45
AD0 53
PAR AD0
24 PAR 33 PAR
C/BE3# 7
24 C/BE3# C/BE3#
C/BE2# 21 115 L_INTE# R572 0
24 C/BE2# C/BE2# INTA# INTE# 24
C/BE1# 35 116 L_INTF# R571 0
24 C/BE1# C/BE1# INTB# INTF# 24
C/BE0# 45
24 C/BE0# C/BE0#
AD21 RC832_ID 8 66 RH832_T R570 100K
R588 100 IDSEL TEST
C REQ0# 124 C
24 REQ0# REQ#
GNT0# 123 4
23,24 GNT0# GNT# GND1
FRAME# 23 13
24 FRAME# FRAME# GND2
IRDY# 24 22
24 IRDY# IRDY# GND3 VCC3
TRDY# 25 28
24 TRDY# TRDY# GND4
DEVSEL# 26 54
24 DEVSEL# DEVSEL# GND5
STOP# 29 62
24 STOP# STOP# GND6
PERR# 30 63
24 PERR# PERR# GND7
SERR# 31 68 R596
24 SERR# SERR# GND8
SERIRQ 72 118 100K_4
25,35 SERIRQ UDIO0/SRIRQ# GND9
GBRST# 71 122
PCIRST# GBRST# GND10
24 PCIRST# 119 PCIRST#
PCI_CLK_5C833 121 99
2 PCI_CLK_5C833 PCICLK AGND1
102 R597 *0_4@NC GBRST#
AGND2 35 PCICGRST#
PCI_PME1# 70 103
PME# AGND3
AGND4 107
CoreLogic CLOCKRUN# CLKRUN# 117 111 C825
25,35 CLKRUN# CLKRUN# AGND5 0.22U/10V/X5R_4
When CLKRUN# is R5C833
R579 *100K
controlled by system, the
pull-down resistor(R579)
dose not need to apply.
(80 mils) L60
10nH
1394_AVDD
VCC3
U44A
MDIO17 87 98 C797 .01U/16V
B 34 MDIO17 MDIO17 AVCC_PHY1 B
106 C794 .01U/16V
MDIO16 AVCC_PHY2 C795 .1U/10V VCC3
34 MDIO16 92 MDIO16 AVCC_PHY3 110
112 C805 10U/6.3V
MDIO15 AVCC_PHY4
34 MDIO15 89 MDIO15
MDIO14 91
34 MDIO14 MDIO14
113 TPBIAS0 C803 .33U/16V R573
MDIO13 TPBIAS0 C804 .01U/16V *10K@NC
34 MDIO13 90 MDIO13
MDIO12 93 R576 R577
34 MDIO12 MDIO12
2
56.2/F 56.2/F
MDIO11 81
34 MDIO11 MDIO11 PCI_PME1# 1 3 PCI_PME# 24
MDIO10 82 108
IEEE1394/MEM CARD
34 MDIO10 MDIO10 TPAN0 TPA0N 34

109 Q28
TPAP0 TPA0P 34
for EMI MDIO05 75 *2N7002E/CH2507SPT@NC
34 MDIO05 MDIO05 R575 56.2/F RH832_TPB C580 270P/50V
MDIO08 88 R574 56.2/F R387 5.11K/F
34 MDIO08 MDIO08
MDIO09 104
MDIO19 TPBN0
34 MDIO19 83 MDIO19 TPBP0 105
MDIO18 85
34 MDIO18 MDIO18 TPB0N 34
R586
TPB0P 34
*22_4@NC MDIO02 78
34 MDIO02 MDIO02
94 1394_XIN C815 22P
MDIO03 XI
34 MDIO03 77 MDIO03
MDIO00 80 24.576MHZ Y5
34 MDIO00 MDIO00
C816
*22P/50V_4@NC 34 MDIO01 MDIO01 79
A MDIO01 1394_XOUT C814 27P A
XO 95
MDIO09 84
34 MDIO09 MDIO09
MC_PWR_CTRL_0 76 96 VREF_PWR C796 .01U/16V
34 MC_PWR_CTRL_0 MDIO04 FIL0
101 REXT R580 10K/F
CARD_LED REXT FIL0_PWR C812 .01U/16V
T43 74 MDIO06 VREF 100
PROJECT : CH5
73 97
MDIO07 RSV Quanta Computer Inc.
R5C833

R5C833 1A

5 4 3 2 1
5 4 3 2 1
34
D D
6 IN1 CARD READER

R549 56 MMC_D7/XD_D7
33 MDIO17
R558 56 MMC_D6/XD_D6
33 MDIO16
R556 56 MMC_D5/XD_D5 CN25
33 MDIO15
XD_CLE 6 43
R548 56 MMC_D4/XD_D4 SD_D2/MMC_D2/MS_D2/XD_D2 CLE_XD GND
33 MDIO14 D33 9 DAT2_SD GND-SDIO 42
1SS355 XD_WP# 10 25 SD_CLK/MMC_CLK/MS_CLK/XD_RE#
R552 56 SD_D3/MMC_D3/MS_D3/XD_D3 SD_CD/MMC_CD/XD_CD0# 2 XD_CD# -WP_XD CLK_SD SD_CMD/MMC_CMD/MSBS/XDWE#
33 MDIO13 1 2 CD_XD MS-BS 26
SD_WP#/XD_R/B# 3 27
D34 R/-B_XD VSS_SD
R560 56 SD_D2/MMC_D2/MS_D2/XD_D2 1SS355 XD_ALE 7 28
33 MDIO12 ALE_XD MS-VSS
MS_CD#/XD_CD1# 2 1 SD_CLK/MMC_CLK/MS_CLK/XD_RE# 4 29 SD_D1/MMC_D1/MS_D1/XD_D1
R551 56 SD_D1/MMC_D1/MS_D1/XD_D1 -RE_XD D1_XD SD_D0/MMC_D0/MS_D0/XD_D0
33 MDIO11 1 GND_XD DAT0_SD 30
11 31 SD_D2/MMC_D2/MS_D2/XD_D2
R550 56 SD_D0/MMC_D0/MS_D0/XD_D0 VCC_SD MS-VSS D2_XD SD_D1/MMC_D1/MS_D1/XD_D1
33 MDIO10 DAT1_SD 32
13 33 SD_D3/MMC_D3/MS_D3/XD_D3
R562 56 XD_WP# MS_CD#/XD_CD1# MS-VCC D3_XD MMC_D4/XD_D4
33 MDIO05 18 MS-INS D4_XD 34
19 35 MMC_D5/XD_D5
R559 56 SD_CMD/MMC_CMD/MSBS/XDWE# C827 VSS_SD D5_XD MMC_D6/XD_D6
33 MDIO08 17 GND_XD D6_XD 36
270P/50V/06 SD_CMD/MMC_CMD/MSBS/XDWE# 15 37 MMC_D7/XD_D7
R553 56 XD_ALE SD_CLK/MMC_CLK/MS_CLK/XD_RE# CMD_SD D7_XD
33 MDIO19 14 MS-SCLK VCC_XD 38 VCC_SD
SD_D3/MMC_D3/MS_D3/XD_D3 16 39 SD_CD/MMC_CD/XD_CD0#
R554 56 XD_CLE SD_D2/MMC_D2/MS_D2/XD_D2 MS-DATA3 C/D_SD C820
33 MDIO18 20 MS-DATA2 GND_SD 40
41 SD_WP#/XD_R/B# 270P/50V/06
R555 56 XD_CE# XD_CE# W/P_SD
33 MDIO02 5 -CE_XD
SD_CMD/MMC_CMD/MSBS/XDWE# 8
R561 56 SD_WP#/XD_R/B# SD_D3/MMC_D3/MS_D3/XD_D3 -WE_XD SD_D1/MMC_D1/MS_D1/XD_D1
33 MDIO03 12 CD/DAT3_SD MS-DATA1 24
C 21 22 SD_D0/MMC_D0/MS_D0/XD_D0 C
VCC_SD VDD_SD SDIO/MS-DATA0
R557 56 SD_CD/MMC_CD/XD_CD0# 23 SD_D0/MMC_D0/MS_D0/XD_D0
33 MDIO00 D0_XD
R565 56 MS_CD#/XD_CD1# MXP038-01-A_CARD READER
33 MDIO01
R563 56 SD_CLK/MMC_CLK/MS_CLK/XD_RE#
33 MDIO09
VCC_SD VCC_SD
C793
R545
2.2U/6.3V/X5R_6 150K
C844 C823 C807
.1U/10V .1U/10V .1U/10V
LP10 *CMF-2012-0160I-S1
4 3 L1394_TPB0-
33 TPB0N
1 2 L1394_TPB0+
B 33 TPB0P B
CN14
5
VCC3 VCC_SD L1394_TPB0- 1
L1394_TPB0+ 2
L1394_TPA0- 3
3 1 LP11 *CMF-2012-0160I-S1 L1394_TPA0+ 4
1 2 L1394_TPA0- 6
33 TPA0N
Q29 4 3 L1394_TPA0+
33 TPA0P
AO3408L 020115FR004S501ZL
2
MC_PWR_CTRL_0 1 3 XD_PWON R547 10K

33 MC_PWR_CTRL_0 VCC5
Q27
PDTC144EU
2
VCC3
A A
PROJECT : CH5
IEEE1394/Cardread 1A

5 4 3 2 1
5 4 3 2 1
C461
1000P/16V_4
C462
0.1U/10V_4
IT8512_AVCC
C525
L31
L38
0.1U/10V_4
BK1608HS121-T
BK1608HS121-T
3VPCU
3VPCU
MB_CLK
MB_DATA
R329
R331
4.7K_4
4.7K_4
3VPCU

35
L30 MBCLK R322 4.7K_4 CH5&HB2 VGA / HB2 UMA
MAINON R311 *0_4 Note for B stage: MBDATA R324 4.7K_4
VGAON 31,39,46
MY16 R316 10K_4 D10 STUFF NC
IT8512_AGND MAINON2 R314 0_4 HB2 VGA R311 D8 STUFF STUFF
IT8512_VSTBY
CH5 R314 D9 STUFF STUFF
HB2 UMA NC 2/19 D11 STUFF STUFF
D 3VPCU Layout Note: D13 STUFF STUFF D
BATLED1# R538 *10K_4
Place all capacitors close to IT8512. D12 STUFF NC
TV_POWERON# BATLED0# R320 *10K_4
TV_POWERON# 28
RF_SW#
RF_SW# 36
Johnny 080130
SUSLED# 37
1SS355
C781 C774 C783 C511 C475 C527 MY16 VCC3 39 PG_VGACORE D10 1 2
MAINON2 1SS355
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 D8 1 2
PWRBTN_CIR# 38 43 PG_SYS
HWPG R287 10K_4 1SS355
AMP_VOLMUTE# 32
D9 1 2 HWPG
ECPWROK 6,25 42 PG_DDR
1SS355
D11 1 2
BT_ON# 29 41 PG_VCCP
VCC3 RTC_VCC 1SS355
RSMRST# 25
Layout Note: D13 1 2
VRON 40 41 PG_1.5V
R338 0_4 3VPCU 1SS355
+3VRTC RTC_VCC net "3VPCU" and "RTC_VCC" CIR_ALWON# 38
D12 1 2
minimum trace width 12mils. MAINON 41,42,46 39 PG_VGA1.1V
C529
SUSON 42,46
S5_ON 46
0.1U/10V_4
R306 0_4
CLKRUN# 25,33
U25 C528
IT8502E VCC5
0.1U/10V_4
POWER SWITCH
114
121
127
107
11
26
50
92
74
84
83
82
56
57
33
19
20
99
98
97
96
95
94
93
3
10 110 MBCLK
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
GPE3/ISCLK
GPE2/ISAS
VCC
AVCC
GPE1/ISAD
GPG1/ID7
GPH6/ID6
GPH5/ID5
GPH4/ID4
GPH3/ID3
VBAT
KSO16/GPC3
KSO17/GPC5
GINT/GPD5
L80HLAT/GPE0
L80LLAT/GPE7
GPH2/ID2/BADDR1
GPH1/ID1/BADDR0
GPH0/ID0/SHBM
23,28 LAD0 LAD0 SMCLK0/GPB3 MBCLK 45 3VPCU
9 111 MBDATA
23,28 LAD1 LAD1 SMDAT0/GPB4 MBDATA 45
8 115 MB_CLK R298 R297
SM BUS
23,28 LAD2 LAD2 SMCLK1/GPC1 MB_CLK 4,20
7 116 MB_DATA 10K_4 10K_4
23,28 LAD3 LAD3 SMDAT1/GPC2 MB_DATA 4,20
22 117 CAPSLED# R332
21,36 LID# LPCRST#/WUI4/GPD2 SMCLK2/GPF6 CAPSLED# 37
13 118 NUMLED# 10K_4
2 PCLK_LPC_8512 LPCCLK SMDAT2/GPF7 NUMLED# 37
C 23,28 LFRAME# 6 LFRAME# C
85 WLAN_ON
PS2CLK0/GPF0 WLAN_ON 28
17 86 R302 0_4
36 L1-SKYPE# LPCPD#/WUI6/GPE6 PS2DAT0/GPF1 EC_PWM_SEL 20
87 R303 0_4 NBSWON#
PS2CLK1/GPF2 EC_DDC_SEL 20
D31 2 1CH500H-40PT 126 GPIO 88 R304 0_4
23 GATEA20 EC_IMG_SEL 19,20
PS/2
GA20/GPB5 PS2DAT1/GPF3 TPCLK_R R305 0_4 C785
25,33 SERIRQ 5 SERIRQ PS2CLK2/GPF4 89 TPCLK 36
D17 2 1CH500H-40PT 15 90 TPDATA
25 KBSMI# ECSMI#/GPD4 PS2DAT2/GPF5 TPDATA 36
D18 2 1CH500H-40PT 23 LPC for EMI 0.1U/10V_4
25 SCI# ECSCI#/GPD3
WRST_8512# 14
D32 2 WRST#
23 RCIN# 1CH500H-40PT 4 KBRST#/GPB6
36 L2-SKYPE# 16 PWUREQ#/GPC7
PWM0/GPA0 24 PWRLED# 37
25 LCD_ON 21
44
36
BAT/AC#
MAIL#
119
123
GPC0/CRX
GPB2/CTX CIR
IT8502E PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
28
29
30
L1-ECO# 36
HDMIDET_EC 22
R689 180K_4
C893
VFAN 37
31 R337 0_4 1000P/16V_4

PWM5/GPA5 EC_DDC_ALT_SEL 20
PWM6/GPA6 32 L2-ECO# 36 Note for RAMP:
3VPCU Note 1 : Since all GPIO belong to VSTBY power domain, and PWM 34 R335 0_4
PWM7/GPA7 BRIGHT_PWM 21 Change R689 from 0 ohm to 180k ohm.
3VPCU
there are some special considerations below:
(1) If it is output to external VCC derived power domain TACH0/GPD6 47 FANSIG 37 Add C893. 05/04
TACH1/GPD7 48 SKYPE# 36
R541 circuit, this signal should be isolated by a diode such as
100K_4 R317 KBRST# and GA20. 120
TMR0/WUI2/GPC4 L-MAIL# 36
*10K 124
WRST_8512#
(2) If it is input from external VCC derived power domain TMR1/WUI3/GPC6 L-INTERNET# 36
circuit, this external circuit must consider not to float the
C531 IT8512_TM GPIO input. 16Mbit (2M Byte), SPI
0.1U/10V_4 125 NBSWON# 3VPCU
PWRSW/GPE4 NBSWON# 36
RI1#/WUI0/GPD0 18 SUSB# 25
R313 WAKE UP
100K_4 Note 2 :
RI2#/WUI1/GPD1 21 ACIN 44 Add R694 for C stage.CH5 stuff,HB2 unstuff.4/10
B (1) Each input pin should be driven or pulled. WUI5/GPE5 35 DSC_POWERON# 21 B
TMKBC Function SRS_EN_1 R534
(2) Each output-drain output pin should be RING#/PWRFAIL#/LPCRST#/GPB7 112
R694 0_4
SRS_EN 31 Add R506 for B stage. 2/27 10K_4 R533
High Enable pulled. 10K_4
109 VCC3
TXD/GPB1 BATLED1# 37
Disable UART 108 U41
Low RXD/GPB0 BATLED0# 37
8512_SCE# 1 CE# VDD 8
2
8512_SCK R535 47_4 8512_SCK1 6
R506 R301 8512_SI R537 47_4 8512_SI1 SCK C778
ADC0/GPI0 66 TEMP_MBAT 44,45 5 SI
R315 0_4 IT8512_TM 106 67 MBATV 45 *10K *10K/F_4 8512_SO R532 15_4 8512_SO1 2 7
44 CELL_SET FLRST#/WUI7/GPG0/TM ADC1/GPI1 SO HOLD#
8512_SCK 105 68 CRT_SENSE# 0.1U/10V_4
FLCLK/SCK ADC2/GPI2 CRT_SENSE# 22
104 69 TV_SENSE#_EC 3 1 3 4
33 PCICGRST# FLAD3/GPG6 ADC3/GPI3 TV_SENSE# 28 WP# VSS
8512_SO 103 FLASH 70
FLAD2/SO ADC4/GPI4 INTERNET# 36
8512_SI 102 71 Q9 MX25L1605A(SO8)
FLAD1/SI ADC5/GPI5 ECO# 36
8512_SCE# 101 72 HWPG *PDTC143TT
R310 *100K_4@NC EC_ME_ALERT 100 FLAD0/SCE# ADC6/GPI6
FLFRAME#/GPG2 A/D D/A ADC7/GPI7 73 SUSC# 25
R1
MY0 36 Pin66 to 73 must be as input pin
MY1 KSO0/PD0 wxx 20071220
R1 FLASH TYPE SEL 37 KSO1/PD1
MY2 38
MY3 KSO2/PD2
High LPC/FWH FLASH ROM 39 KSO3/PD3 DAC0/GPJ0 76 CC_SET 44
MY4 40 KBMX 77 R300 0_4
MY5 KSO4/PD4 DAC1/GPJ1 BRIGHT_DAC 21
Low SPI FLASH ROM (Default) 41 KSO5/PD5 DAC2/GPJ2 78 CHG# 44
MY6 42 79 R690 0_4
KSO6/PD6 DAC3/GPJ3 VGA_RST_R# 12
MY7 43 80 DNBSWON_R 1 2
KSO7/PD7 DAC4/GPJ4 DNBSWON# 25
MY8 44 81 D14 CH500H-40PT
KSO8/ACK# DAC5/GPJ5 CV_SET 44
MY9 45
MY10 KSO9/BUSY
46 KSO10/PE
MY11 51 2 IT8512_CK32KE
KSI3/SLIN#
KSO11/ERR# CK32KE
KSI1/AFD#
KSI0/STB#
KSI2/INIT#
MY12 52 CLOCK 128

MY13 KSO12/SLCT CK32K
53 KSO13
AVSS
MY14 54
KSI4
KSI5
KSI6
KSI7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
IT8512_CK32K
MY15 KSO14
A
55 KSO15 A
36 MY[0:15]
58
59
60
61
62
63
64
65
27
49
91
113
122
75
12
add for ITE IC version update Y4

wxx 20071220
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
4 1
36 MX[0:7]
R540 C790
3 2
PROJECT : CH5
IT8512_AGND *0_4 C532 C530 32.768KHZ C789
.1U/10V 1U/6.3V 18P_4 Quanta Computer Inc.
18P_4
For B stage, C532,C530 stuff, R540 unstuff. 2/18 Size Document Number Rev
KBC IT8502E 1A
Date: Friday, June 13, 2008 Sheet 35 of 49

5 4 3 2 1
5 4 3 2 1
35
INT KeyBoard
MY[0:15] CN3
7
5
3
1
220Px4
8
6
4
2
MY15
MY14
MY13
MY12
S/W 36
CP1
MY15 1 7 8 MY11
MY14 1 MY10
2 2 5 6
MY13 3 3 4 MY9 MISAKI_SWITCH SW1
MY12 3 MY8 NBSWON#
4 4 1 2 2 3 NBSWON# 35
MY11 5 4 1
D MY10 5 220Px4 SW5 D
6 6 5
MY9 7 CP2 3VPCU 6 C18
7
4
5
MY8 8 7 8 MY7 *.1U-10V_4
MY7 8 MY6 R542 100K 3
9 5 6
4
5
MY6 9 MY5 RF_SW# 3
10 10 3 4 35 RF_SW# 2 2
MY5 11 1 2 MY4 1
11 1
7
6
MY4 12
MY3 12 220Px4
13
7
6
MY2 13 CP3 C792
14 14
MY1 15 7 8 MY3
MY0 15 MY2 *.1U-16V_4
16 16 5 6
MX7 17 3 4 MY1
MX6 17 MY0
18 18 1 2
MX5 19
MX4 19 220Px4
20 20
MX3 21 CP5
MX2 21 MX7
22 22 7 8
MX1 23 5 6 MX6 MISAKI_SWITCH SW2
MX0 23 MX5 MAIL#_1
24 24 3 4 2 3
25 1 2 MX4 4 1
25
26 26 5
220Px4 6 C26
35 MX[0:7] CP6 *.1U-10V_4@NC
AFN260-N2GLZ
7
5
8
6
MX3
MX2
LID
3 4 MX1
need P/N 1 2 MX0
MISAKI_SWITCH SW3
220Px4 SW4
470 R28 2 3 INTERNET#_1
CP4 2 1 4 1
C GND VCC 3VPCU C
3VPCU 5
LID# 3 6 C27
21,35 LID# OUT
RP38 *.1U-10V_4@NC
10 1 MY4 C31
MY9 MY1 MRSS23W
9 2
MY8 8 3 MY3 0.1U
MY7 7 4 MY5
MY6 6 5
10KX8
RP37
Note for C stage:
MY15
10
9
1
2
MY10
MY14
Change all capacities into diodes for ESD.
MY13
MY12
8 3 MY11
MY2
4/8
7 4
MY0 6 5
10KX8
R89 0_4
MAIL# MAIL#_1 1 2
35 MAIL#
R88 0_4 D42 BC3V3S1UZ00
INTERNET# INTERNET#_1 1 2
35 INTERNET#
R78 *0_4@HB2 D45 BC3V3S1UZ00
ECO# ECO#_1 1 2
35 ECO#
R72 *0_4@HB2 D44 BC3V3S1UZ00
SKYPE# SKYPE#_1 1 2
35 SKYPE#
R71 *0_4@HB2 D43 BC3V3S1UZ00
B L-MAIL# L-MAIL#_1 1 2 B
TOUCH PAD CN5
LEFT#
35 L-MAIL#
35 L-INTERNET#
L-INTERNET#
R60
R68
*0_4@HB2 D41
L-INTERNET#_11
*0_4@HB2 D40
BC3V3S1UZ00
2
BC3V3S1UZ00
1
2 RIGHT# L1-ECO# L1-ECO#_1 1 2
35 L1-ECO#
3 R61 *0_4@HB2 D39 BC3V3S1UZ00
4 C321 C322 L2-ECO# L2-ECO#_1 1 2
35 L2-ECO#
*.1U-16V_4@NC *.1U-16V_4@NC R65 *0_4@HB2 D38 BC3V3S1UZ00
20 mils TB-MB L1-SKYPE# L1-SKYPE#_1 1 2
35 L1-SKYPE#
R70 *0_4@HB2 D37 BC3V3S1UZ00
L2-SKYPE# L2-SKYPE#_1 1 2
35 L2-SKYPE#
L23 BLM21P300S +TPVDD D30 BC3V3S1UZ00
VCC5
CN4
C311 .1U-16V_4
12
TPDATA L24 LZA10-2ACB104MT TPDATA_R 11
35 TPDATA 10 VCC3
TPCLK L25 LZA10-2ACB104MT TPCLK_R 9 VCC3
35 TPCLK CN2 *BTB@HB2
8
7 14 14
R543 *10K_4@NC RF_SW# MAIL#_1 13
R219 R220 6 INTERNET#_1 13
5 12 12
LEFT# R79 10K_4 MAIL# ECO#_1 11
10K_4 10K_4 4 SKYPE#_1 11
3 10 10
R77 10K_4 INTERNET# L-MAIL#_1 9
RIGHT# 2 L-INTERNET#_1 9
1 8 8
R76 10K_4 ECO# L1-ECO#_1 7
L2-ECO#_1 7
TOUCH_PAD_12P 6 6
R75 10K_4 SKYPE# L1-SKYPE#_1 5
VCC5 L2-SKYPE#_1 5
4 4
A 3 A
3
2 2
1 1
Change CN4 footprint to AF712L-A2G1T-12P-L 02/29
PROJECT : CH5
FAN/BT/TP/SW/LID 1A

5 4 3 2 1
5 4 3 2 1
37
D D
LED FAN CONN
LED5
1 2 R466 150
35 CAPSLED# VCC3
LTST-C191TBKT-Q1
LED6
1 2 R467 150
35 NUMLED# VCC3
LTST-C191TBKT-Q1
LED4
3 1 R460 150
C 28 WLAN_LED# VCC3 VCC5 C
4 2 R461 150 FANPWR = 1.6*VSET
29 BT_LED#
LED_BL/ORG U30 CN11
C653 0.1U 2 3 +5V_FAN
R472 VIN VO 3
GND 5 2
THERM_ALERT# 1 6
4,25 PM_THRM# FON# GND 1
1
LED3 7 C655 C654
0_4 GND 85205-0300L
35 VFAN 4 VSET GND 8
PWRLED# 3 1 R458 150 10U_0805 0.01U_0603
35 PWRLED#
2
G995
SUSLED# 4 2 R459 150
35 SUSLED# 3VPCU
3VPCU
LED_BL/ORG VCC5
2
R468
100K R469
LED7 10K
1 2 R465 150
23 SATA_LED# VCC3
FANSIG
1
LTST-C191TBKT-Q1 35 FANSIG
3
Q17
2N7002E-LF
LED2 2
3 1 R462 150
35 BATLED0# 3VPCU
4 2 R464 150 C652
35 BATLED1#
1
B B
LED_BL/ORG 4700P_0603
LED1
PWRLED# 3 1 R17 150

3VPCU
SUSLED# 4 2 R18 150
LED_BL/ORG
pin1,3 Blue
pin2,4 ORG
A A
PROJECT : CH5
LED/FAN 1A

5 4 3 2 1
1 2 3 4 5 6 7 8
38
A A
CIR
CIR ( Low Speed USB Interface )
CIR_5V
3VPCU 5VPCU 5VPCU 5VSUS CIR_5V
CIR_5V
U52 20 MIL U53 R463
11 1 CIR_OUT 1 2 CIR_VCC D26 *RB500@NC
R693 VCC P0-0 OUT VCC R663 R648 R455 *0@NC
18 P0-4 P0-1 2
100K C650 *4.7u/10V@HB2 17 3 3 C651 *100_8@HB2 L63
P0-5 P0-2 GND *10K/F_4@HB2 *BK2125HS330_8@HB2
16 P0-6 P0-3 4
15 5 *4.7u/10V@HB2 1 3
35 PWRBTN_CIR# P0-7 P1-0
14 6 *IRM-v036@HB2 *10K/F_4@HB2
R629 *0_4@HB2 USBP7+_C P1-1 VSS
24 USBP7+ 13 D+/SCLK VPP 7
2
R630 *0_4@HB2 USBP7-_C 12 8 Q31 C883 C876
24 USBP7-
2
D-/SDATA VREG/P2-0 *AO3403@HB2 *10U/10V/X5R_8@HB2
10 XTALOUT XTALIN/P2-1 9 *1U/10V_4@HB2
1 3
*CY7C63723_SXC@HB2 35 CIR_ALWON#
Q30
Note for C stage: R631 *1.5K_4@HB2 CIR_VREG *MMBT3904@HB2
Add R693 pull up resistor.
B 04/01 B
Hole
H9 H26 H28 H25 H24 H16 H22 H5 H21 H14 H7 H2 H1
H-C276D118P2 H-C276D217P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118PB
1
1
C C
H13 H10 H6 H8 H27 H12 H4 H19 H15 H20 H18 H11 H17
H-C236D165P2 H-C236D165P2 H-C236D165P2 H-C236D165P2 H-C236D165P2 H-C236D165P2 H-C236D165P2 H-C217D122P2 H-C217D122P2 H-C217D122P2 H-C217D122P2 H-C217D122P2 H-C217D122P2
1
1
H3 H23 H29 H31
H-C79D79N H-C79D79N o-o394x197d394x197n o-o1754x1280d1754x1280n
PAD1 PAD2 PAD3 PAD4

ch5-mb-pad1 ch5-mb-pad2 ch5-mb-451x339pad ch5-mb-451x339pad
1
1
H30 H32 H33 H34 H35 H36 H37 H38
o-c79d79n o-c79d79n o-c79d79n o-c79d79n o-c79d79n o-c79d79n o-c79d79n o-c79d79n
D D
1
PROJECT : CH5
CIR/HOLE 1F
Date: Thursday, June 26, 2008 Sheet 38 of 49

1 2 3 4 5 6 7 8
5 4 3 2 1
VGA Core VGA CORE OZ8118 +1.15Volt +/- 5%

Countinue current:11A
Peak current:13A
39
V_PWRCNTL nVDIA NB9P Resistor Value OCP minimum 16A
HI 1.15V PR98_1.43M_CS51432FB10
LO 1.2V PR108_130K_CS41302FB00
D VIN D
PR61 5VPCU
20_6@EV PL11
VIN 21,40,41,42,43,44
BLM21PG220SN1D@EV
2
PC114 PC115 PD15
PR132 1U/6.3V_4@EV 1U/6.3V_4@EV CH501H-40PT PC128 PC141 PC142
1K/F_4@EV 1000P/50V_4@EV .1U/50V_6@EV
10U/25V_12@EV
5
3VSUS 1.1UGND
1
PR149
16
5
0_6@EV PQ36
M1.8VIN 2 8 M1.8BST
4 NB9P: VGACORE +1.15V ~ +1.2V
VDDA
VDDP
1.1UGND VIN BST
PC109
PR134 .01U/50V_4@EV 9 M1.8HDR AOL1414
10K/F_4@EV HDR
PL13 VGACORE
PG_VGACORE PC127 1.5UH/20A_PCMC104T-1R5MN
35 PG_VGACORE 4 11A 400 mils
3
2
1
PGD
LX 10 M1.8LX .22U/25V_6@EV VGACORE
PR133 15K/F_4@EV DCR=3.8m ohm
1
VGAON M1.8EN 3 +
31,35,46 VGAON ON/SKIP +
PR169 PR155 PC145 PC131 PC129 PC126 PC169
1.1UGND 10K/F_4@EV PQ44 *2.2_8@NC 240K/F_4@EV E@470U/2.5V/H1.8
PR131 PU5 7 M1.8LDR 4 AOL1412
*390U/2.5V_6X5.8@EV
.1U/10V_4@EV
2
M1.8VSET13 LDR PR156
The resistor configration is shown Oz8118
10U/4V/X6S_8@NC
10U/4V/X6S_8@NC
1
2
M1.8REF 14 VSET 240K/F_4@EV
VREF
in changelist for HB2&CH5 M1.8TSET15
TSET
PC150
*1500P/04@NC
CSP 11 M1.8CSP
3VSUS PR145 PC122
3
2
1
140K/F_4@EV PR140
PR153 PR147 130K_4 VGACORE
GNDA1
C C
GNDP
3300P/50V/X7R_4@EV
10K/F_4@EV
OCT
12 M1.8CSN
CSN
3
330K/F_4@EV
PR152 PR137 PC48
Stuff PC131,PC129 for ramp. 06/10
17
6
0_4@EV 90.9K/F_4@EV C776 C777 C523 C524
2 PQ34 PC51 PC49 PR67 PC123 PC125 .1U/10V_4@EV10U/6.3V@EV 10U/6.3V@EV .1U/10V_4@EV
15 V_PWRCNTL
.1U/10V_4@EV PC110 1000P/50V_4@EV 22P/50V_4@EV
PR151 1000P/50V_4@EV .022U/16V_4@EV
Boot-->Low voltage 1M/F_4@EV 2N7002E@EV 1000P/50V_4@EV 100K/F_4@EV For EMI
PR63
Johnny 080104
1
*SHORT-1A
1.1UGND
1.1UGND
1.1UGND
VGA +1.8V
VCC1.8
PQ42 1.8VSUS
AO4704@EV
3A 1 8
VCC1.1 12V_ALW 2
3
7
6
5
1
PC148
1.8VSUS
4
5VPCU PR158
0.1U/16V/X7R_6@EV
2
+VGA1.1V 1M_6
PQ43
AO4404@EV
1.1V/2.6A PR161
3
B 3VSUS B
8 1 PC139 PC138 PC135
PC147 7 2 100K_6
+VGA1.1V 12,13,14,46
6 3 VGAOND PR160 *0_4@EV
46 VGAOND
5 2
1
PC146
Note for B stage:
1
PQ41
4
3
10U/6.3V_8@EV
10U/6.3V_8@EV
10U/6.3V_8@EV
0.1uF/10V@EV
Stuff PQ40,PQ41,PR158,PR161, unstuff PR160.

2
0.1uF/10V@EV
PR167 2N7002E-T1-E3
2
1
100K/F_6@EV
PR159
PG_VGACORE 2 2/19
2
33@EV
1
PQ40
DTC144
PU6 PC134
35 PG_VGA1.1V
PR164 0@EV 3 PGD DRV 6 0.033U_4@EV PR163
120/F_6@EV
VGA 3.3V
VGAON PR168 0@EV 4 EN ADJ 5 Vo=0.5(R150+R152)/R152
5VSUS
PC143 1 2
*0.1uF/10V@NC VCC GND PR162
G9338 100/F_4@EV
VCC3 3V_VGA
PR190 27K/F_4@EV
PR187 *0_8
PC137
0.1uF/10V@EV
Add PR190 and change PQ43 PN for C stage. PQ51 SI3456BDV
A
4/18 6
5 4
A
1
PC170 2
1
Note for B stage:
2
0.1U/16V/X7R_6@EV
3
HB2 VGA PR187 (CS00004JA40)

CH5 PQ51 PROJECT : CH5
VGAOND
HB2 UMA NC 2/21 Quanta Computer Inc.
VGA CORE OZ8118 1A
Date: Wednesday, June 11, 2008 Sheet 39 of 49

5 4 3 2 1
1 2 3 4 5
5VPCU
40
PR115
0_6 VIN_8770
A PL6 A
VIN
2
PC89 BLM21PG220SN1D
PD12 PC41 PC40 PC16 PC80 PC31 PC34 PC37 PC38
+
*CH501H-40PT PL7
10U/6.3V_8
330u/25V
10U/25V/X6S/1206
10U/25V/X6S/1206
10U/25V/X6S/1206
2200P/50V/X7R/0402
PR117
*2200P/50V/X7R/0402
0.1U/50V/X7R/0603
0.1U/50V/X7R/0603
VIN_8770
5
10_6 BLM21PG220SN1D
8770VCC
PR41 4 PQ14
PC95
VCC3 237K/F/06 PR106
1
PC86 AOL1414
( 44A )
19
25
2.2uF/6.3V_6
PU3 2.2_6 0.22uF/10V_6
2
PR105 8 8770TON PL5
VCC
VDD
3
2
1
TON VCC_CORE
2K/F
30 8770BST1_R 0.45_25A_SPM10040T VCC_CORE
BST1 PR26 PC90 PC82
PR107 0 28 8770LX1 1 2
LX1
6,25 DELAY_VR_PWRGOOD 2
4
PWRGD
5
29 8770DH1
DH1
1
PR104 0 #CLKEN 1
25 VR_PWRGD_CK410# CLKEN
330UF_2.0V_ESR9
330UF_2.0V_ESR9
PQ17
*2.2_6
26 8770DL1 4 AOL1412 PQ4
PR103 0 DL1 AOL1412
4 CPU_VID0 31 4 Delete PR121,PR122
2
D0
2
PR102 0 32
4 CPU_VID1 D1 for C stage. 04/09
PR101 0 33 27 PR32
4 CPU_VID2 D2 PGND1
PC30
B
*2200P/50V_6
PR100 0 34 2.21K/F B
4 CPU_VID3 D3
PR99 0 35 PR118 PC100
4 CPU_VID4 D4
PR98 0 36 1 2 PR29 PR27
4 CPU_VID5
3
2
1
1
PR97 0 D5 *4700P/04
35 VRON 4 CPU_VID6 37
8770FB
3
2
1
D6 *3.48K/F/04
PR96
4.02K/F NTC 10K_6-B4.25K/06

0 PR111 PR116
PR108 0 8770PSI 3 12 PC98
3 PM_PSI# PSI FB VCCSENSE 4
0.22uF/10V_6
#SHDN 38 3.48K/F 100 8770CSP1
SHDN PR109 PR114
3,6,23 H_DPRSTP# PR95 0 DSTP 40 PC94 8770CSN1
PC32 DPRSTP 1000pF/50V
PR34 499/F_4 DPSLP 39 20K/F 0
6,25 DPRSLPVR DPRSLPVR VIN_8770
*0.1uF/10V PC91
PC88 10 8770CCI 1 2 8770CCI2
8770CCV CCI
1 2 9 CCV 470pF/50V PR112
470pF/50V 13 8770GNDS
GNDS VSSSENSE 4
PR39 8770TIME 7 PC15 PC42 PC35 PC14 PC33
TIME 8770CSP1 100
Reserve for power up CSP1 17
10U/25V/X6S/1206
2200P/50V/X7R/0402
71.5K/F PC93 8770CSN1
*10U/25V/X6S/1206
*10U/25V/X6S/1206
*0.1U/50V/X7R/0603
CSN1 16
5
sequence 8770REF 11 PC97
0.22uF/10V_6 18
REF
GND
CSN2 15 8770CSN2
1000pF/50V
VCC_CORE/44A
8770CSP2 PQ18
41 EP CSP2 14 4
OCP=56A
PR37
8770THRM 6 21 8770DH2 AOL1414
8770VCC THRM DH2 VCC_CORE
C 10K/F 24 8770DL2 VCC_CORE C
DL2 PL8
VCCP PR38 0.45_25A_SPM10040T PC87 PC96
3
2
1
*NTC 10K_6-B4.25K 22 8770LX2 1 2
LX2
5
4
VRHOT BST2_R
BST2 20
1
PR36 8770POUT 4 POUT
330UF_2.0V_ESR9
330UF_2.0V_ESR9
PGND2 23 Delete PR120,PR119
*56 PR42
for C stage. 04/09
2
MAX8770 4 PQ19 4 PQ5 *2.2_6
2
PR35 PR110
3 H_PROCHOT#
2
PC39
*2200P/50V_6
*10K/F PC92 AOL1412 AOL1412 PR44
PJ2 2.2_6 0.22uF/10V_6 2.21K/F
POUT 1
PR43 PR40
3
2
1
3
2
1
1
8770BST2
PC36 *SHORT-1A
4.02K/F NTC 10K_6-B4.25K/06
1
*0.1uF/10V
PD13 PC99
*CH501H-40PT
8770CSP2 0.22uF/10V_6
2
8770CSN2 PR113
Add layout note on pins 22 and 28 of MAX8770 0 Distribute evenly between N side and S
controller. These nets have large voltage swings. 5VPCU
Sense lines are 18 mil wide, Z0=27.4 Ohm. side, preferably on secondary side.
Need to route them away from the sensitive areas that Use differential routing with 7 mil spacing.
are trying to detect small changes in voltage, such as Route external layer with solid GND reference Use differential routing away from switch nodes
D
the voltage sense VccSense VssSense lines. (no split planes). 8770LX1 and 8770LX2 D
Use 25 mil separation from any other signal.

PROJECT : CH5
VCC_CORE (MAX8770) 1A

1 2 3 4 5
5 4 3 2 1
41
D D
VIN_8204
VIN
PR150 5VPCU
PD6
10_6
PR70 2 1 RTBST PL12
1M/F_4
PC119 PC52
1U/6.3V_4 RB501V-40 BLM21PG220SN1D
1U/6.3V_4
PR64
RTVDD PC132 PC133 PC136
3VSUS 3VSUS PC47
5
6
7
8
2200P/50V_4
.1U/50V_6
10U/25V_12
.1U/50V_6
0_6
13
4
9
PR75 PR76 PU2
10K/F_4 10K/F_4 12 RTDH
VDD
VDDP
BST
RTTON DH PQ39
16 TON Si4800BDY VCCP
PR74 0_4 RTPG 4 11 RTLX PL10
35 PG_VCCP PGOOD LX
RT8204 1.5UH/20A_PCMC104T-1R5MN
PR73
3
2
1
PR78 0_4 RTLPPG 5 10 VCCP
C 35 PG_1.5V LPGOOD ILIM C
13.7K/F_4
5
6
7
8
1
35,42,46 MAINON MAINON PR68 0_4 RTEN 15 8
EN/DEM DL
VOUT
PR143 +
LDRI
LEN
LFB
17 3 *2.2_8@NC PC120 PC112 PC113
PR69 PAD FB RTDL 4
2
390U/2.5V_6X5.8ESR10
.1U/10V_4
*10U/4V/X6S_8
RTFB
*15K/F_4 PC124
14
1
Delete PR128 for ramp. 05/20
*1500P/50V_4@NC
PR71
4.12K/F_4 PR72
3
2
1
10K/F_4 PQ35
35,42,46 MAINON MAINON PR66 0_4 RTLEN FDS6690AS_NL
RDSon=15m ohm
PR65 PC50
*1M/F_4@NC *100P/50V_4@NC
1.8VSUS
Vo=0.75(R1+R2)/R2
RTLDRI +1.05Volt +/- 5%
Countinue current:7.5A
5
6
7
8
PC56 PC57 Peak current:10A
OCP minimum 14A
10U/4V/X6S_8
.1U/10V_4
4
PC53
39P/50V_4
B PR77 PQ7 B
100/F_4 Si4800BDY VCC1.5
3
2
1
2
PC55
33N/50V_6
1
PR80
PC54 10.5K/F_4
*39P/50V_4@NC PC59 PC61 PC58
10U/4V/X6S_8
10U/4V/X6S_8
.1U/10V_4
RTLFB
PR79
Vo=0.75(R1+R2)/R2 10K/F_4
A A
PROJECT : CH5
VCCP, 1.5V 1A

5 4 3 2 1
5 4 3 2 1
1.8VSUS & VCC1.8 & SMDDR_VTERM

42
D D
5VPCU
OCP 20A
PR148
0_6
Change PR129 value to 2.2ohm PR142
for C stage. 4/14 51116_V5IN 51116_V5FILT
PC121
10_6 PC118
2
4.7uF/6.3V_6
PD14 +
1uF/10V
PR144
VIN VIN_51116 CH501H-40PT
1
8.45K/F_6
PL14 5VPCU
1
PC140 PC144 PC151 PC149 51116_BST_2
51116_CS
BLM21PG220SN1D
1.8VSUS/9.85A
10U/25V_12
10U/25V_12
0.1uF/50V_6
2200pF/50V
PR129
8
7
6
5
PC111 PR146
OCP=14A
15
14
PU4
2.2_6
V5IN
V5FILT
C 4 16 10K_BF C
PQ38 0.1uF/50V_6 51116_BST 22 CS PR141 0
S0-S3 SI4684 VBST
13 51116_PGOOD
PGOOD PG_DDR 35
1.8VSUS 51116_DRVH 21 12
DRVH NC
PC117 PC116 PC108 PC107 PL9 11 51116_S5 PR138 0
SUSON 35,46
1
2
3
1.5UH/20A_PCMC104T-1R5MN
PD16 S5
1.8VSUS 51116_LX 20 10 51116_S3 PR136 0
LL S3 MAINON 35,41,46
8
7
6
5
PR157
Delete PR123 and PR124 VLDOIN 23 1.8VSUS
1
330U/2V/ESR-9/SP
330U/2V/ESR-9/SP
2.2uF/6.3V_6
0.1uF/50V_6
PQ37
for ramp. 05/20
*EC31QS03L
+ + + 4 51116_DRVL 19 DRVL
EMI
*2200P/50V_6 *2.2_6
Ra NC 7
PC105 PC103 PC104 PC106
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
FDS6676AS 1
2
VTTGND
2
PC130
PR130 18 PGND
1
0.1uF/10V
17 CS_GND
PC46 PR60 4 1.8VSUS
1
2
3
0 51116_VDDQSNS MODE
*56K/F_4@NC
2
*100pF/50V@NC VDDQSNS PR127 0
1
51116_VDDQSET 9 24
VDDQSET VTT SMDDR_VTERM
VTTSNS 2
VTTREF
51116_V5IN 51116_COMP6 25
51116_V5IN COMP PAD
26
GND
PAD
PAD
PAD
PR125 0 PAD
PR135 0 SMDDR_VTERM
Rb TI51116
3
29
28
27
B 0.9V/1.5A B
PR62
Fix 1.8V Output *39K@NC PR126
Stuff PR84,PC78 & PC79 on 5/25. 0
S0-S1
Ra=Vout-0.75/0.75*Rb
Rb value from 100K to 300K ohm
SMDDR_VREF
SMDDR_VREF
PC102 PC101
0.22uF/10V_6 *220pF/50V@NC
0.9V/10mA V_TRIP(mV)=R_TRIP(Kohm)*10(uA)
I_OCP=V_trip/Rds_on+I_Ripple/2
S0-S1
EMI
A A
PROJECT : CH5
1.8VSUS & DDR_VTT(TPS51116) 1A

5 4 3 2 1
5 4 3 2 1
DC/DC 12V_ALW/3VPCU/5VPCU/RVCC3/RVCC5/3VSUS/5VSUS/VCC3/VCC5
VIN8744
43
2
PC65 PD17
PD8 0.1U_8 *CHP202U
D D
ZD5.6V
LDO5
3
PR81 2 1
47K/F_6 VIN8744
PC158
PD7
4.7U/10V_8
20
8744_SHT1 VIN8744 PU7 PC71 VIN8744
4 SYS_SHDN# VIN
21 1 2
LDO5
IN PL16
CH500H-40 19 PGND
1
8744_DL3 23 18 1U/25V_6 8744_DL5 BLM21PG220SN1D
PR82 PC64 DL3 DL5
47K/F_6 *0.22U/10V_6 26 15 PC69 PC68
2
PC67 PC66 PC156 PC161 BST3 BST5 PC168 PC167 PC163
.1U_6 PR180 PR173 PC154 1000P_4 .1U_6
D1 1
D1 2
G2 3
S2 4
1
*10U/25V_1206 10U/25V_1206 .1U_8 PQ46 0_6 0_6 .1U/25_6 .1U_8 10U/25V_1206 10U/25V_1206
D1
D1
S2
G2
SI4914DY
8744_LX3 24 17 8744_LX5
LX3 LX5
8744_DH3 25 16 8744_DH5 PQ45
8744_CSH3 DH3 DH5 8744_CSH5 AO4912
29 CSH3 CSH5 12 5VPCU/4.5A
S1/D2
3VPCU/4A
7 S1/D2
PC160
G1
8 G1
.22U/10V_6 PC155
.22U/10V_6 OCP=7A
OCP=7A
8
3VPCU 8744_CSL3 28 13 8744_CSL5
CSL3 CSL5
PC74
1 2 PL17 3R8uH/6A/DCR 13 PC153 PL15 3R8uH/6A/DCR 13 1 2 5VPCU
1000P_4 1000P_4
1P 2P PR182 1.3K/F_4 PR166 1.3K/F_4 1P 2P
PC72 PC62 PC63
C PR87 .1U_6 PR181 PR174 0_6 PR165 PR85 C
9 FSEL
RES 0.004R 1W +-2%/3720 + PC159 *5.49K_6 *5.49K_6 + PC152 10U/25V-1206 .1U-6 RES 0.004R 1W +-2%/3720
8744REF 7 REF
2
330U/6.3V_7343/2.8 330U/6.3V_7343/2.8
PC157 11 8744_FB5
1U/10V_6 PR177 FB5 PR86
1
PC73 LDO5 PR88 100K 2 *0_6
*10U/25V_1206 *0_6 DRVA LDO5
PR178
OUTA 32
100K 3 PR171 0_6
PR179 0_6 ILIM
FBA 31
8744_FB3 30 PR84
PR89 FB3 *0_6
*0_6 8 GND
8744REF PR170 *0_6 10 3VPCU
SKIP
PR83 0_6
PD18 22
CHN217 8744_SHT1 PGOODA PR172
4 SHDN
1 27 100K/F_6
1 PR176 0_68744_ON3 ONA PGOOD3
5VPCU 5 ON3
PC164 PR175 0_68744_ON5 6 14 PG_SYS 35
8744_DL3 3 ON5 PGOOD5
GND
PJ3
.1U_6 2 10VPCU
10VPCU
MAX8744ETJ+
33
1
*SHORT-1A
PC165
B 1U/10V_6 B
2
3VPCU
PD19 5VPCU
3VPCU 5VPCU
CHN217
5
1 10VPCU 10VPCU
PC162 PQ8
1
2
5
6
8744_DL3 3 PQ10 SI3456

1
2
5
6
SI3456BDV
.1U_6 2 12V_ALW 3 0A
46 S5_OND
46 S5_OND 3
RVCC5
RVCC3
1
PQ11 PQ9
4
PC166 AO4812 AO4812

4
1U/10V_6 0.5A
2
4
PC60 3.2A 120 mils 2.6A
PC70 0.1U/10V_4 VCC3 5VSUS MAIND
SUSD 46 MAIND 46
10U/6.3V_8
MAIND 3VSUS SUSD VCC5

3A
A A
PROJECT : CH5
5V/3V/12V_ALW(MAX8744) 1A

5 4 3 2 1
5 4 3 2 1
Battery Charger
VA
44
E
AC ADAPTOR IN CONN PL2
E
FBMJ3216HS480NT/1206 PD9
PJ4 *SSM34PT PR91 PQ12 AO4407 PQ13 AO4407
VIN
CON4_2 RES 0.01R 2W +-2%/7520
PL3 1 8 1 8
1 PJ1.1 CS_IN 2 1 CS_OUT 2 7 2 7
2 PD10 3 6 3 6
1000P/50V/X7R/0603
FBMJ3216HS480NT/1206
3.3N/50V/X7R/0402
0.1U/25V/X7R/0603
3 2P 1P 5 5
0.1U/25V/X7R/0603
SSM34PT
0.1U/25V/X7R/0603
4 PC11
PR8
220K/0603/F
4
2200P/50V/X7R/0402
PC9 33K/0603/F
PR10
PR90
6
5
8724CSSN
8724CSSP
PD11
PC18 10K/0603/F
PC4
PC20
PC75
PC19
SSM34PT 0.1U/25V/X7R/0603
PD1
PR5
1SS355/UMD2/80V/100mA
2.2K/0603/F
Add 3.3N CAP for EMI suggestion
Nicole 12/11
220K/0603/F
3
PR4 PR3
PR9
1 6
0R/0603 0R/0603
2 5 2
PQ1
PD2 3 4 2N7002E-T1-E3
UDZS15B-7-F
1
PC10 PC12 PQ2
D PR2 4.7K/0603/F IMD2AT108 D
*0.1U/25V/X7R/0603 *0.1U/25V/X7R/0603
35 ACIN BAT/AC# 35
2
PR1 PR6 PC1
4.7K/0603/F 1U/25V/X5R/0603
470K/0603/J
1
Add for EMI.
VIN
CELLS PR94 *0R/0402 REFIN 05/08
REFIN PL1
DCIN
VIN
3VPCU PR17 *0R/0603 FBMJ3216HS480NT/1206
10U/25V/X5R/1206
10U/25V/X5R/1206
10U/25V/X5R/1206
0.1U/25V/X7R/0603
Vout 5.4V
PR12 33R/0603/J PC25
8724_LDO PC27
PC83
PC171
PC172
PC85
2200P/50V/X7R/0402
PR19 PR28
8724_LDO 0.1U/25V/X7R/0603
27
26
PC2 PC29
1.33K/0603/F 825/0603/F
CSSP
CSSN
CELLS 17 1U/10V/X5R/0603 1U/10V/X5R/0603
PR30 1 DCIN
LDO 2
*0R/0603
Set to 1.67V 10 ACIN DLOV 22 8724_DLOV
1
2
4+0.4*VCTL/REFIN PR24 2.2R/0603/J
PR33 0R/0603 24 PD3
C VCTL BST C
35 CV_SET 15 VCTL RB500V-40/0.1A/UMD2
PR25 1K/0603/J PC24 PQ15
ICTL 13 0.22U/16V/X7R/0603 FDS6900AS PR93
35 CC_SET ICTL
Set to 1.67V DHI 25 CHG_DH 8 RES 0.015R 1W +-2%/3720
3
5*VICTL/REFIN=2.5A REFIN 12 PL4

REFIN Ichg+
PR16 0R/0603 LX 23 CHG_LX 7 1 2 MBAT+ MBAT+
35 CHG# 2 6
PC26 11 21 CHG_DL 5 6.8uH 1P 2P
ACOK DLO
PQ3 0.1U/16V/X7R/0603 8724ICHG 9 20 PC78 PC79 PC81 PC76 PC84
1
DTC144EUEUA-7-F ICHG PGND PR18

8724IINP 28 19 8724CSIP 3 *2.2R/0603/J 0.1U/25V/X7R/0603 10U/25V/X5R/1206 10U/25V/X5R/1206 3.3N/50V/X7R/0402 3.3N/50V/X7R/0402
IINP CSIP
35,45 TEMP_MBAT 8 SHDN CSIN 18 8724CSIN

PR15 220R/0603/J PC17
8724CCV 7 16 MBAT+
4
CCV BATT VREF *2200P/50V/X7R/0603
Vref = 4.096V
8724CCI 6 4 Add two 3.3N CAP for EMI suggestion
CCI REF
Nicole 12/11
PR14 PR13
5 CCS CLS 3 8724CLS
1K/0603/J
8724CCS
GND
GND
44.2K/0603/F
0.01U/50V/X7R/0603
0.01U/50V/X7R/0603
14
29
PC7 PU1 PR7 PC3

MAX8724ETI+ 1U/10V/X5R/0603 ICHG=(VICTL/REFIN)*75mV/15mR = 2.5A
PC5
PC6
0.1U/25V/X7R/0603 56K/0603/F
B B
PR13
UMA 71.5K CS37153F917

VGA I_INPUT=[56/(44.2+56)]*75mV/10mR = 4.19A. (80W)
VGA 44.2K CS34423F908
UMA I_INPUT=[56/(71.5+56)]*75mV/10mR = 3.29A. (62.6W) CS34423F916
8724ICHG 8724IINP REFIN CELLS

BATT-TYPE
1 6
2 5 CELL_SET 35 High Low

PR92 PC77 PR11 PC8 3 4
Li-ion 4S2P
20K/0603/J *1000P/50V/X7R/0603 10K/0603/F *1000P/50V/X7R/0603 Li-ion 4S1P Li-ion 3S2P
PQ16 Ni-MH 8S1P
*IMD2AT108
A A
PROJECT : CH5
BATTERY CHARGER (Max8724) 1A

5 4 3 2 1
5 4 3 2 1
45
E E
Battery Connector
MBAT+
PJ1 Read Battery Temperature

5
6 4 TEMP_MBAT 35,44
D P_CLK PR21 330R/0603/J D
7 3
0.1U/25V/X7R/0603
0.01U/50V/X7R/0603
P_DATA PR22 330R/0603/J
2
1
PR23
BATTERY CN
PC13
PC23
200K/0603/F
47P/50V/NPO/0603
47P/50V/NPO/0603
MBDATA 35
MBCLK 35
UDZS5.6B TE17
UDZS5.6B TE17
PC21
PC22
PD5
PD4
MBATV MBATV 35
C C
Read Battery Voltage
PC28 PR31
0.01U/50V/X7R/0603 40.2K/0603/F
PR20 10K/0603/F
3VPCU 3VPCU
TEMP_MBAT voltage :
B B
System Off System On MBATV voltage :
Battery 0V 1.6V 16.8V*40.2/(200+40.2)= 2.812V
Li-ion 4S*P
12.0V*40.2/(200+40.2)= 2.008V
Adapter 3.3V 3.3V
Ni-MH 8S1P 8.0V*40.2/(200+40.2)= 1.34V
Battery+Adapter 1.6V 1.6V
A A
PROJECT : CH5
BATTERY CONNECTOR 1A

5 4 3 2 1
1 2 3 4 5
46
12V_ALW
5VPCU RVCC3 RVCC5 5VPCU 5VSUS 3VSUS 1.8VSUS 12V_ALW
A A
PR45 PR48
100K/F_4 PR46 PR47 PR49 PR50 PR51 PR52 PR53
1M/0603/J
22R/0603/J 22R/0603/J 100K/0603/J 22R/0603/J 22R/0603/J 22R/0603/J 1M/0603/J
S5_OND
S5_ONG S5_OND 43 SUSG SUSD
SUSD 43
3
3
3
3
3
PC43
2
35 S5_ON 2 2 2 35,42 SUSON 2 2 2 2 2 PC44
*0.01U/50V/X7R/0603
*0.01U/50V/X7R/0603
1
1
1
1
1
PQ20 PQ21 PQ22 PQ23 PQ24 PQ25 PQ26 PQ27 PQ28
DTC144EUEUA-7-F 2N7002E-T1-E3 2N7002E-T1-E3 2N7002E-T1-E3 DTC144EUEUA-7-F 2N7002E-T1-E3 2N7002E-T1-E3 2N7002E-T1-E3 2N7002E-T1-E3
5VPCU VCC5 VCC3 VCC1.5 VCCP 12V_ALW
B B
PR54 PR55 PR56 PR57 PR58 PR59

100K/0603/J 22R/0603/J 22R/0603/J 22R/0603/J 22R/0603/J 1M/0603/J
MAING MAIND
MAIND 43
3
3
PC45
35,41,42 MAINON MAINON2 2 2 2 2 2
*0.01U/50V/X7R/0603
1
1
PQ29 PQ30 PQ31 PQ6 PQ32 PQ33
DTC144EUEUA-7-F 2N7002E-T1-E3 2N7002E-T1-E3 2N7002E-T1-E3 2N7002E-T1-E3 2N7002E-T1-E3
5VPCU VGACORE +VGA1.1V VCC1.8 3V_VGA 12V_ALW
C C
PR185 PR183 PR184 PR188 PR189 PR186

100K/0603/J 22R/0603/J 22R/0603/J 22R/0603/J 22R/0603/J 1M_6
VGAOND
VGAOND 39
3
3
3
31,35,39 VGAON VGAON 2 2 2 2 2 2 C891
*0.1U
PQ50
1
2N7002E-T1-E3
1
1
PQ49 PQ47 PQ48 PQ53 PQ54
DTC144EUEUA-7-F 2N7002E-T1-E3 2N7002E-T1-E3 2N7002E-T1-E3 2N7002E-T1-E3
HB2 VGA UNSTUFF

2/27
Note for B stage:
HB2 UMA unstuff
CH5 all stuff 2/27
D D
PROJECT : CH5
DISCHARGE 1A

1 2 3 4 5
5 4 3 2 1
CH5 A stage change list 2008.02.29 (page 36)Change CN4 footprint to AF712L-A2G1T-12P-L
2008.01.15 (page 28 WLAN) Change pin2,39,41,52 connect to 3VSUS 2008.03.07 PR163 change from CS11103F931 to CS11203F900
Add pin37,43 to GND U25 change from AJ085020F01 to AJ085020F04
2008.01.18 (page 23) Change NET VCCRTC into +3VRTC L30 change from CX18AG12019 to CS00003J951
(page 28) Change NET name PQ10,PQ51 change from BAM34560013 to BAM34560102
LAD1 => LAD0 LAD0 => LAD1 CH5 B stage change list
D
LAD3 => LAD2 LAD2 => LAD3 D
2008.03.21 (page 21) Add D35,D36,R692

2008.01.21 (page 22) Change NET VCC3 into CRT_VCC, (CRT_CONN PIN9)
(page 40) Unstuff PC14, stuff PC16 for SMT
(page 25) Stuff R339
2008.03.26 (page 12)Delete D30, add U54,C892.CH5: stuff U54,C892,unstuff R505.
2008.01.30 (page 35) D10,D12 HB2 UMA NOT CONECT HB2: stuff R505, unstuff U54,C892.
(page 21) HB2 R7 STUFF/ CH5 R9 STUFF 2008.04.01 (page 38) Add R693 pull up resistor
(page 20) Add R675,R677,R679,R681,R683,R685,R687,R688 for HB2 VGA
2008.04.07 (page 26) Change R364,R352 value to 100 ohm(CS01002JB22 to CS11002FB22).
Add R676,R678,R680,R682,R684,R686 for HB2 UMA
Change C547 value to 1uF(CH41002KB93 to CH5101K9B01).
2008.01.31 (page 20)U6,U7,U8,U9,U10,U11,U12,U13,U15 footprint (MSOP8-4_9-65 )change into 2008.04.08 (page 36) Change C43,C45,C47,C53,C61,C68,C69,C74,C78,C85 to diode
tssop8-6_4-65 D30,D37,D38,D39,D40,D41,D42,D43,D44,D45(BC3V3S1UZ00) for ESD
(page 22)For HB2 UMA HDMI, C28,U4,R476,LP2,LP3,LP4,LP5,L8,L9,F2,R25,R26, 2008.04.09 (page 40) Delete PR119,PR120,PR121,PR122.
CN13,D5,R23,R24,R204,R203,R176,R177,R153,R152,R154,R149,Q8 not connected.
Change PN : PR73 -> CS31372FB11; PQ36 ->BAM14140001; PQ44 -> BAM14120000
(page 33)Stuff R611,not connect R609
(page 31)Unstuff CN27 for HB2 2008.04.10 (page 35)Add R694 for C stage.CH5 stuff,HB2 unstuff.
2008.02.01 (page 35)add 0 ohm R689,R690 on pin 28,79 for VFAN.Stuff R689,unstuff R690.
C 2008.04.11 Change footprint of CN2 and CN4. C
2008.02.13 PU3.8 VIN change into VIN_8770,add the VGACORE and +VGA1.1V's dischage; Delete PC145.
change PR145 to 130K,PR147 to 1.43M; Change footprint of PQ36 and PQ44.
Add PC169 to VGACORE
change PL13,PL10,PL9 to 20A's CHOCK 2008.04.14 Change PR129 value to 2.2ohm(CS-2203J913) for C stage.
2008.02.14 (page 39)Delete PR139,PR154 2008.04.16 Change R632,R644 value to 10kohm for C stage (CS32003F933 -> CS31003F949).
(page 41)PR80 value 10.7kohm change to 10.5kohm(CS31052FB02)
2008.04.17 (page39)Change PR163 PN: CS11203F900 -> CS11203F918.
(page 30)When use LAN IC AJ080550011(8055),add C183,C186,C688,C690,R108,
R110,R117,R118,R120,R121,R122,R123. 2008.04.18 (page39)Add PR190(CS32702FB16) and change PQ43 PN(BAM44680003->BAM44040012)
When use AL008072000(8072),delete them.
Connect pin47 to VCC3 other than RVCC3. CH5 RAMP change list
2008.02.18 (page 31)Add R691 for EMI for B stage. 2008.04.24 (page15)R224 PN: CS31022FB09 for CH5; CS25102FB02 for HB2.
(page 35)For B stage, stuff C532,C530, R540 unstuff. 2008.05.04 (page 35) Change R689 from 0 ohm to 180k ohm(CS41802JB02). Add C893(CH2103K1B04).
2008.02.19 (page 2)Change R483 value to 47ohm(CS04702JB18). 2008.05.08 (page44)Add PC171,PC172 (CH61004M291)for EMI.
(page 2)Delete RP21,(page 14) delete R506. 2008.05.14 (page31)Add R695(CS00002JB38) to codec PIN GPIO2.
B (page 35)HB2 VGA R311 stuff,R314 NC. CH5 R314 stuff, R311 NC. 2008.05.20 (page41)Delete PR128. (page 42) Delete PR123,PR124. B
HB2 UMA R311&R314 NC. 2008.05.21 (page22)Change CN13 footprint to HDMI-C12814-100A-19P-H-CH5

(page 39)Stuff PQ40,PQ41,PR158,PR161. unstuff PR160. (page42)Change net 1.8VSUS_1 to 1.8VSUS.
2008.02.20 (page 30) C160,C174 change to CH03306JB04. (page41)Change net +1.05V_1 to VCCP.
(page 14) C714 change to CH02706JB06. C715 change to CH03306JB04. (page25)Delete TP83.
(page 35) C789,C790 change to CH01806JB07. 2008.05.23 (page15)Stuff R147 36K ohm(CS33602JB17) for ramp
2008.02.21 (page 36)Stuff R75,R76,R77,R79 for B stage. (page35)Change R689 from CS41802JB02 to CS41802FB19.
(page 39)Add PQ51,PR187,PC170. 2008.05.26 (page22)Stuff C29,C30, change PN from CH01006JB08 to CH01206JB05
CH5 stuff PQ51, unstuff PR187. HB2 VGA stuff PR187, unstuff PQ51. Change L8,L9 PN from CVA6803JN12 to CX5AG221104
HB2 UMA PR187&PQ51 NC. 2008.05.30 (page39) Change PN from PR145(CS41302FB00),PR137(CS41002FB28),PR147(CS51432FB10) to
2008.02.22 (page 15) R140 stuff, R507 unstuff. CH5 HB2 VGA
2008.02.25 (page 2)NET exchage PR145 CS41402FB14 CS41402FB14
CLK_PCIE_LAN(#)<=>CLK_PCIE_MINI_RB(#) PR137 CS39092FB11 CS38452FB14
2008.02.26 (page 4)U32 change to AL000780000(GMT) PR147 CS43302BB00 CS44022FB25
(page 46)Add PQ49,PQ47,PQ48,PQ53,PQ54,PQ50,PR185,PR183,PR184,PR188,
2008.06.10 (page39)Change PR155 CS41202FB17 to CS42402FB17
A
PR189, PR186,C891 for B stage. A
Change PR156 CS42402FB09 to CS42402FB17

2008.02.27 (page 35)Add R506 for B stage. Change PC122 CH2476K1B01 to CH23306JB16
2008.02.28 (page 39)PR155(CS42002FB12 ) change to CS41202FB17 Stuff PC131 and PC129
PR156(CS41002FB28) change to CS42402FB09 PROJECT : CH5
PC122(CH22206KB16) change to CH2476K1B01 Quanta Computer Inc.
1A
Date: Wednesday, June 11, 2008 Sheet 47 of 49

5 4 3 2 1
5 4 3 2 1
Power Management State vs. Power Rail State
Signal MAINON SUSON S5_ON RVCC* *VSUS VCC* CLKS

D
PCI Device list D
S0 HIGH HIGH HIGH ON ON ON ON
Device ID INT REQ/GNT
S3 LOW HIGH HIGH ON ON OFF OFF
R5C833 AD21 E/F 0
S4 LOW LOW HIGH ON OFF OFF OFF MINI PCI AD19 C/D 2
S5(soft off) LOW LOW HIGH ON OFF OFF OFF
MAX8770 SUSD enable

VCC_CORE AO4812 VCC5
40 VRON enable
C AC 43 5VSUS C
System MAIND enable

Charger 5VPCU
AO4812
DC AC/DC Insert enable RVCC5
43
S5_OND enable
SUSD enable
MAX8744E AO4812 3VSUS
3VPCU
43 43
AC/DC Insert enable VCC3
MAIND enable
AO6402
RVCC3
43
S5_OND enable
B B
OZ8118 EXT VGACORE POWER
39
MAINON enable
TI51116 SMDDR_VREF
42 SUSON enable
SMDDR_VTERM
SUSON enable
G9338 +VGA1.1V
1.8VSUS AO4468 MAINON enable
SUSON 39
MAINON enable
RT8204 VCCP
41 MTON enable
A A
PROJECT : CH5
1A

5 4 3 2 1
5 4 3 2 1
SLP_S3#(SUSB#):Control non-critical power plane when system into S3(Suspend to RAM)/S4(Suspend to Disk)/S5(Soft off).
SLP_S4#(SUSC#):1.Control non-critical power plane when system into S4(Suspend to Disk)/S5(Soft off).Used to control DRAM power
NBSWON#
D
6 D
5
2
S5_OND
8744LDO5 RVCC3
S5 POWER
3
7
1
AC Adapter 3VPCU
RSMRST#
VIN
Charger Circuit Always System power 5VPCU 8
Battery
DNBSWON#
10 9
For other device to know system is below the S3 state
SUSC#
SUSON
Power off when system into S3-S5 20

SUSB#
MAINON
CK_PWG CLOCK
EC
SB
15
VRON
14 19 21
ECPWROK
PM_ICH_PWROK H_PWRGD CPU
C C
13
HWPG
23
H_CPURST#
16
VCC_CORE
22
CPU CORE VR
17
PLT_RST-R#
VR_PWRGD_CK410
DELAY_VR_PWRGOOD
11
18
VCC1.8
System power 3
B
+VGA1.1V B
VCCP
System power 2 VCC1.5
NB
12
PG_1.5V
VCC5 PG_VCCP
PG_SYS
VCC3
System power 1
PG_DDR AND
PG_VGA1.1V
PG_VGACORE
EXT VGA Power

VGACORE
A A
3VSUS
SLP_S4(Other
device to know 5VSUS
below the S3)
1.8VSUS
DDR VR SMDDR_VTERM
PROJECT : CH5
1A

5 4 3 2 1

PCB stack up diagram of 8-layer motherboard

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5 4 3 2 1

CCD X1 PAGE 21 32.768KHz LPC AL-262 SRS (10/100/1G LAN) (Robson)

PAGE 39 /Card Reader

Date: Monday, June 02, 2008 Sheet 1 of 49

25 CK_PWG 56 CK_PWRGD/PD# PCI_STOP# 38 PM_STPPCI# 25

2N7002E/CH2507SPT 7 ITP_EN R497 33_4 PCLK_ICH

CPU_BSEL2 R116 0_4

Date: Wednesday, May 14, 2008 Sheet 2 of 49

A5 C7 CPU_TEST1 C23 MISC U26 COMP1 R491 54.9/F_4

ITP_TDI 54.9/F_4 R51

Populate ITP700Flex for bringup ITP_TMS 54.9/F_4 R48

ITP_TDO *54.9/F_4@NC R50

ITP_BPM#5 54.9/F_4 R49

H_CPURST# *51/F_4@NC R55

ITP_TCK 54.9/F_4 R59

Date: Wednesday, May 14, 2008 Sheet 3 of 49

15 MBCLK2 8 SCLK VCC 1

VSS_32 VSS_131 VSS_231 VSS_329 H_D#25 H_D#_24 H_A#_28 H_A#29

VSS_67 VSS_166 VSS_266 VSS_NCTF_7 H_D#_59 H_DSTBN#_1 H_DSTBN#1 3

VSS_79 VSS_178 VSS_278 VSS_SCB_1 H_REQ#_3 H_REQ#4

VSS_93 VSS_192 VSS_292 NC_34

Date: Wednesday, May 14, 2008 Sheet 5 of 49

DDR CLK/ CONTROL/COMPENSATION

TP31 CFG_17 20 INT_CRTCLK CRT_DDC_CLK PEG_TX_8

PM_EXTTS#1 P32 UMA & Discrete setting CANTIGA_PM/GM

BF48 NC_2 CL_RST# AJ35 CL_RST#0 25 R241 NC 33

BG45 E36 SDVO_DATA

NC_11 CLKREQ# K36 CLK_MCH_OE# 2

BF1 NC_22 HDA_SDO C29 ACZ_SDOUT_MCH 23 R226 150/F CRT_B_1

Date: Wednesday, May 14, 2008 Sheet 6 of 49

M_A_DQ36 SA_DQ_35 SA_DQS#_7 M_B_DQ35 SB_DQ_34 SB_DQS#_5 M_B_DQS#6

AV5 SA_DQ_48 SA_MA_11 BG26 BD3 SB_DQ_47 SB_MA_9 BD33

Date: Wednesday, May 14, 2008 Sheet 7 of 49

Y15 VCC_AXG_36 VCC_NCTF_32 AE29

T14 BA37 +VCCSM_LF2 AL28

Date: Friday, February 22, 2008 Sheet 8 of 49

UMA & Discrete setting UMA & Discrete setting

.1U/10V_4 U8 VCC_AXF 321.35mA

C415 NC 1000P VSSA_LVDS VTT_23 1.8VSUS

L37 A8 +VTTLF_CAP1 L58 0_6

1.8VSUS R268 +1.8VSUS_GMCH_VCCD C761

Date: Wednesday, May 14, 2008 Sheet 9 of 49

PC4800 DDR2 SDRAM

Date: Wednesday, May 14, 2008 Sheet 10 of 49

DDRII DUAL CHANNEL A,B

DDRII A CHANNEL DDRII B CHANNEL

Date: Wednesday, May 14, 2008 Sheet 11 of 49

Note for C stage:

Date: Wednesday, May 14, 2008 Sheet 12 of 49

V32 R30 VMA_DQ0 C17 D11 VMC_DQ0

Y30 N34 VMA_DQ12 A22 A8 VMC_DQ12

Size Document Number Rev

Date: Wednesday, May 14, 2008 Sheet 13 of 49

L18 BLM18PG181SN1 +IFPCD_PLLVDD AJ9 AP2

IFPEF_PLLVDD AJ6 AE4

STUFF PDs on XTALSSIN and

SPREAD SPECTRUM 3V_VGA

I2C ADDRESS: 0xD4H PROJECT : CH5

Date: Wednesday, May 14, 2008 Sheet 14 of 49

3V_VGA R142 *1K/F_4@NC MIOA_VREF N5 P5

1 8 6 MAX6649_A# R139 *0_4@NC ALERT

Date: Friday, May 23, 2008 Sheet 15 of 49

Date: Monday, March 03, 2008 Sheet 16 of 49