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1 2 3 4 5 6 7 8

04-- 0402 footprint


PCB STACK UP
LAYER 1 : TOP
06--
08--
12--
0603 footprint
0805 footprint
1206 footprint
AT3 BLOCK DIAGRAM 01
LAYER 2 : SGND1 F-- 1% tolerance CPU THERMAL
CPU SENSOR
A
LAYER 3 : IN1 Merom 14.318MHz A
PAG 5
LAYER 4 : IN2
478P (uPGA)/35W
LAYER 5 : VCC PAG 3,4 CLK_CPU_BCLK,CLK_CPU_BCLK#
CLK_MCH_BCLK,CLK_MCH_BCLK# CLOCK GEN
LAYER 6 : IN3 DREFCLK,DREFCLK# ICS9LPRS355AGLFT
64pinsTSSOP
LAYER 7 : SGND2 DREFSSCLK,DREFSSCLK#
PAG 2
LAYER 8 : BOT
Option for 17" only
PCI-Express 16X NVDIA G3-64 for 15.4"
NVDIA G3-128 for 17" HDMI CON
DDRII-SODIMM1 DDRII 533,667 MHz 820p FCBGA PAG PAG 26
NORTH BRIDGE 15,16,17,18,19,20
TV_OUT PAG 13,14
Cable VGA
Docking Crestline TV_OUT
RJ-45
B
DDRII-SODIMM2 DDRII 533,667 MHz
CRT/S-VIDEO B

CIR/Pwr btn CRT_OUT PAG 25


SPDIF Out PAG 13,14 PAG
7,8,9,10,11,12
Stereo MIC LVDS(2 Channel) Panel Connector
Headphone Jack 15" / 17" PAG 26
USB Port DMI LINK NBSRCCLK, NBSRCCLK#
VOL Cntr
PAG 38 USB2.0
Option for 17" only 0,1,2
5 3 4,6,7
SYSTEM CHARGER(MAX8724) SATA2 Bluetooth USB2.0 I/O Ports Camera Mini PCI-E Card x1
SATA - HDD Express Card x1
PAG 41 PAG 35 X3 PAG 32 X1 PAG 32
PAG 35 SOUTH BRIDGE Cable Docking x1
PCI BUS / 33MHz
SYSTEM POWER MAX8778
SATA0 150MB
PAG 42 SATA - HDD ICH-8M PCI-E
PAG 32
C C
DDR II SMDDR_VTERM Azalia
1.8V/1.8VSUS(TPS51116REGR) PATA (66/100/133)
PAG 46 PATA- CD-ROM PAG 21,22,23,24 Mini PCI-E LAN Express RICOH
PAG 32 Card Realtek Card RICOH 832
PCI Express PCIE-LAN
Realtek Mini Card RTL8101E/8111B (NEW CARD)
VCCP +1.5V AND GMCH
Two-element (Wireless
1.05V(MAX8717) LPC ALC 268 LAN/WAN)
(10/100/GagaLAN) PAG 27,28
PAG 43 microphone
PAG 39 PAG 33,34 PAG 35
PAG 29 PAG 29
Keyboard
VGACORE(1.025V)MAX1992 Touch Pad PAG 36 ENE KBC Audio Jacks IEEE1394 Memory
CardReader
PAG 45 (Phone/ MIC) RJ45 CONN
KB3920 Bx SIM CARD
CIR PAG 29
PAG 36 KB3926 Bx PAG 28 PAG 27
CPU CORE MAX8771 PAG 32 PAG 33
PAG 44 Capacitive Sense PAG 37,48 PCI ROUTING
SW PAG 36 AUDIO MDC DAA TABLE IDSEL INTERUPT DEVICE
Amplifier REQ0# / GNT0# AD25 INTE#,INTF# RICOH832
X-Bus

D
SI3080 D
PAG 30 PAG 31
REQ1# / GNT1# AD22 INTC#,INTD# MINI PCI for debug

FAN Flash SPI Jack to PROJECT : AT3


Speaker MODEM RJ 11 Quanta Computer Inc.
PAG 38 PAG 37 PAG 37 PAG 30 PAG 33 Size Document Number Rev
Custom BLOCK DIAGRAM 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 1 of 48
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3V +3V

L42
1 2
BLM21PG600SN1D/08
120 ohms@100Mhz
+CK_VDD_MAIN CLK_3GPLLREQ#

NEW-CARD_CLK_REQ#
R321

R322
2

2
1 10K/04

1 10K/04
02
1

1
C400 C464 C436 C441 C446 C429
22U/10V/12 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04

2
Y1
L43 SI-1 modify
A 1 2 VDDCPU CG_XIN 1 2 CG_XOUT A
BLM21PG600SN1D/08
( remove
R256 --not
14.318MHZ
1

1
need )
C447 C445 C431 C430 internal have
22U/10V/12 .1U/10V/04 27P/50V/04 27P/50V/04 already build-in
2

2
33ohm damping
14.318MHz resisteor

L44
1 2 +CK_VDD_MAIN2 RP40 4 3 4P2R-S-0
U16 CLK_CPU_BCLK 3
BLM21PG600SN1D/08 2 1 CLK_CPU_BCLK# 3
120 ohms@100Mhz
1

1
+CK_VDD_MAIN 16 54 RHCLK_CPU RP41 4 3 4P2R-S-0
VDDPLL3 CPUCLKT0 CLK_MCH_BCLK 6
C479 C456 C473 C448 C462 C458 C452 9 53 RHCLK_CPU# 2 1
VDD48 CPUCLKC0 CLK_MCH_BCLK# 6
22U/10V/12 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 2 VDDPCI CK505 RHCLK_MCH RP45 4 3 *4P2R-S-0
2

2
61 VDDREF CPUCLKT1 51 CLK_CPU_ITP 3
39 50 RHCLK_MCH# 2 1
VDDSRC CPUCLKC1 CLK_CPU_ITP# 3
VDDCPU 55 VDDCPU CPU_ITP RP64 4
CPUT2_ITP/SRCT8 47 3 4P2R-S-0 CLK_PCIE_MINI_C 39
+CK_VDD_MAIN2 12 46 CPU_ITP# 2 1
+3V VDD96I/O CPUT2_ITP/SRCC8 CLK_PCIE_MINI_C# 39
20 VDDPLL3I/O
26 13 R_DOT96 RP42 2 1 4P2R-S-0
VDDSRCI/O DOTT_96/SRCT0 DREFCLK 7
45 14 R_DOT96# 4 3
VDDSRCI/O DOTC_96/SRCC0 DREFCLK# 7
2

+3V 36 SI-1 modify


VDDSRCI/O R_DREFSSCLK RP43 2
27MHz_Nonss/SRCCLK1/SE1 17 1 4P2R-S-0 DREFSSCLK 7 ( add in
R259 49 18 R_DREFSSCLK# 4 3
B VDDCPU_IO 27Mhz_ss/SRCCLC1/SE2 DREFSSCLK# 7 UMA BOM ) B
10K/04 48 NC RSRC_SATA RP46 2
SRCCLKT2/SATACL 21 1 4P2R-S-0 CLK_PCIE_SATA 21
PCLK_MINI_LPC RSRC_SATA#
1

SRCCLKC2/SATACL 22 4 3 CLK_PCIE_SATA# 21
CG_XIN 60
Q16 R288 R308 CG_XOUT X1 R_CLK_PCIE_VGA RP48 2
59 X2 SRCCLKT3/CR#_C 24 1 4P2R-S-0 CLK_PCIE_VGA 20
2

R269 10K/06 10K/06 25 R_CLK_PCIE_VGA# 4 3


SRCCLKC3/CR#_D CLK_PCIE_VGA# 20
2N7002E
*4.7K/04 3 1 CGDAT_SMB R845 *100K/04 27 RSRC1_LAN RP50 2 1 4P2R-S-0
23,35 PDAT_SMB SRCCLKT4 CLK_PCIE_LAN 33
28 RSRC1_LAN# 4 3
SRCCLKC4 CLK_PCIE_LAN# 33
56 38 PM_STPPCI#
23 CK_PWG CK_PWRGD/PD# PCI_STOP# PM_STPPCI# 23
CLK_BSEL1 R298 4.7K/04FSB 57 37 PM_STPCPU#
FSLB/TEST_MODE CPU_STOP# PM_STPCPU# 23
0=overclocking +3V
41 RSRC_ICH RP49 4 3 4P2R-S-0
of CPU and SRCCLKT6 CLK_PCIE_ICH 22
Q17 40 RSRC_ICH# 2 1
SRCCLKC6 CLK_PCIE_ICH# 22
2

SRC Allowed 2N7002E CGCLK_SMB CLK_PCIE_MINI_ RP47 4


64 SCLK SRCCLKT7/CR#_F 44 3 4P2R-S-0 CLK_PCIE_MINI 39
3 1 CGCLK_SMB 13,14,39 CGCLK_SMB CGDAT_SMB 63 43 CLK_PCIE_MINI_# 2 1
23,35 PCLK_SMB 13,14,39 CGDAT_SMB SDATA SRCCLKC7/CR#_E CLK_PCIE_MINI# 39
1 = overclocking RSRC_MCH RP52 2
SRCCLKT9 30 1 4P2R-S-0 CLK_PCIE_3GPLL 7
of CPU and SRC 15 31 RSRC_MCH# 4 3 CLK_PCIE_3GPLL# 7
GND SRCCLKC9
not Allowed 19 GND
11 34 CLK_PCIE_NEW RP51 2 1 4P2R-S-0
GND48 SRCCLKT10 CLK_PCIE_NEW_C 35
52 35 CLK_PCIE_NEW# 4 3
GNDCPU SRCCLKC10 CLK_PCIE_NEW_C# 35
8 GNDPCI
58 33 NEW-CARD_CLK_REQ#_R R324 475/F/03 NEW-CARD_CLK_REQ#
+3V GNDREF SRCCLKT11/CR#_H NEW-CARD_CLK_REQ# 35
23 32 CLK_3GPLLREQ#_R R323 475/F/03 CLK_3GPLLREQ#
GNDSRC SRCCLKC11/CR#_G CLK_3GPLLREQ# 7
29 GNDSRC
42 GNDSRC
1 R_PCLK_KB3920 R250 33/04
PCICLK0/CR#_A PCLK_LPC_KB3920 37,48
2

C C416 *33P/50V/04 PCLK_LPC_KB3920 3 R_PCLK_5C832 R260 33/04 C


PCICLK1/CR#_B PCI_CLK_5C832 28
4 PCLK_MINI_LPC R279 33/04
PCICLK2/TME PCI_ICH PCLK_LPC_DEBUG 39
R287 C421 *33P/50V/04 PCI_CLK_5C832 5 T258
*10K/04 PCICLK3 FCTSEL1 R293 33/04
PCICLK4/27_SELECT 6 PCLK_MINI 40 form ICS FAE
C442 *33P/50V/04 PCLK_ICH SI-1 modify for
FCTSEL1
recommend(defaule is
1

C438 *33P/50V/04 PCLK_LPC_DEBUG


S3 resume issueR285 33/04 Hi )
PCLK_ICH 22
2

7 ITP_EN
C432 *33P/50V/04 14M_ICH PCI_F5/ITP_EN R292 33/04
CLKUSB_48 23
R296 10 FSA R295 4.7K/04 CLK_BSEL0
10K/04 USB_48MHZ/FSLA FSC R257 4.7K/04 CLK_BSEL2
for EMI 62 R266 33/04
FSLC/TST_SL/REF 14M_ICH 23
1

ICS9LPRS355AGLFT/CY28548ZXCT/RTM875T-606

0=UMA GCLK_SEL = FCTSEL1


1 = External VGA CPU Clock select FSC FSB FSA CPU SRC PCI
1 0 1 100 100 33 FCTSEL1 PIN20 PIN21 PIN24 PIN25
R309 0/04 CLK_BSEL0 R310 0/04
3 CPU_BSEL0 MCH_BSEL0 7 (PIN13)
+3V R307 *56/04
0 0 1 133 100 33
+1.05V
0 1 1 166 100 33 0=UMA DOT96T DOT96C SRCT1/LCDT_100 SRCT1/LCDT_100
R301 1K/04
2

Enable ITP 0 1 0 200 100 33


R305 0/04 CLK_BSEL1 R299 0/04 1 = External
3 CPU_BSEL1 MCH_BSEL1 7
*10K/04 0 0 0 266 100 33 SRCT0 SRCC0 27Mout-NSS 27Mout-SS
R283 R302 *0/04 VGA
R303 1K/04
1 0 0 333 100 33
1

D
+1.05V D
ITP_EN 1 1 0 400 100 33
R277 0/04 CLK_BSEL2 R258 0/04
3 CPU_BSEL2 MCH_BSEL2 7
2

R264 *0/04 <FAE>


1 1 1 RSVD 100 33
10K/04 1K to NB only when
R825 R265 1K/04
PROJECT : AT3
+1.05V XDP is implement.No
XDP can use 0 ohm
Quanta Computer Inc.
1

Size Document Number Rev


Custom CLOCK GENERATOR 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 2 of 48
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

H_A#[3..16] U31A H_D#[0..63] U31B H_D#[0..63]


6 H_A#[3..16] 6 H_D#[0..63] H_D#[0..63] 6
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# 6 D[0]# D[32]#
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 6 D[1]# D[33]#
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# 6 D[2]# D[34]#
H_A#6 K5 C926*100P/50V/04 H_D#3 G22 V26 H_D#35
H_A#7 A[6]# H_D#4 D[3]# D[35]# H_D#36
M3 A[7]# DEFER# H5 H_DEFER# 6 F23 D[4]# D[36]# V23
H_A#8 N2 F21 SI-2 modified H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# 6 D[5]# D[37]#
H_A#9 J1 E1 resevved for power H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# 6 D[6]# D[38]#
H_A#10 N3 noise H_D#7 E23 U23 H_D#39
A A[10]# D[7]# D[39]# A

0
ADDR GROUP

DATA GRP 0
H_A#11 P5 F1 H_D#8 K24 Y25 H_D#40

DATA GRP 2
A[11]# BR0# H_BR0# 6 D[8]# D[40]#
H_A#12 P2 R167 56/04 H_D#9 G24 W22 H_D#41
H_A#13 A[12]# H_IERR# H_D#10 D[9]# D[41]# H_D#42
L2 D20 1 2 +1.05V J24 Y23

CONTROL
H_A#14 A[13]# IERR# H_D#11 D[10]# D[42]# H_D#43
P4 A[14]# INIT# B3 H_INIT# 21 J23 D[11]# D[43]# W24
H_A#15 P1 C927*100P/50V/04 H_D#12 H22 W25 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# 6 F26 D[13]# D[45]# AA23
M1 H_D#14 K22 AA24 H_D#46
6 H_ADSTB#0 ADSTB[0]# D[14]# D[46]#
H_REQ#[0..4] C1 H_RESET# H_D#15 H23 AB25 H_D#47
6 H_REQ#[0..4] RESET# H_RESET# 6 D[15]# D[47]#
H_REQ#0 K3 F3 J26 Y26
REQ[0]# RS[0]# H_RS#0 6 6 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 6
H_REQ#1 H2 F4 H26 AA26
REQ[1]# RS[1]# H_RS#1 6 6 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 6
H_REQ#2 K2 G3 H25 U22
REQ[2]# RS[2]# H_RS#2 6 6 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 6
H_REQ#3 J3 G2
REQ[3]# TRDY# H_TRDY# 6
H_REQ#4 L1 H_D#[0..63] H_D#[0..63]
REQ[4]# 6 H_D#[0..63] H_D#[0..63] 6
H_A#[17..35] G6 H_D#16 N22 AE24 H_D#48
6 H_A#[17..35] HIT# H_HIT# 6 D[16]# D[48]#
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# 6 D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# ITP_BPM#0 H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 R23 D[19]# D[51]# AB22
H_A#20 W6 AD3 ITP_BPM#1 Layout Note: H_D#20 L23 AB21 H_D#52
A[20]# 1 BPM[1]# D[20]# D[52]#
ADDR GROUP
H_A#21 U4 AD1 ITP_BPM#2 H_D#21 M24 AC26 H_D#53
A[21]# BPM[2]# Place voltage D[21]# D[53]#
XDP/ITP SIGNALS
H_A#22 Y5 AC4 ITP_BPM#3 H_D#22 L22 AD20 H_D#54
A[22]# BPM[3]# D[22]# D[54]#

DATA GRP 1
H_A#23 U1 AC2 ITP_BPM#4 divider within H_D#23 M23 AE22 H_D#55

DATA GRP 3
H_A#24 A[23]# PRDY# ITP_BPM#5 H_D#24 D[23]# D[55]# H_D#56
R4 A[24]# PREQ# AC1 0.5" of GTLREF P25 D[24]# D[56]# AF23
H_A#25 T5 AC5 ITP_TCK H_D#25 P23 AC25 H_D#57
A[25]# TCK D[25]# D[57]#
H_A#26 T3 A[26]# TDI AA6 ITP_TDI pin H_D#26 P22 D[26]# D[58]# AE21 H_D#58
H_A#27 W2 AB3 ITP_TDO H_D#27 T24 AD21 H_D#59
H_A#28 A[27]# TDO ITP_TMS +1.05V H_D#28 D[27]# D[59]# H_D#60
W5 A[28]# TMS AB5 R24 D[28]# D[60]# AC22
H_A#29 Y4 AB6 ITP_TRST# H_D#29 L25 AD23 H_D#61
H_A#30 A[29]# TRST# ITP_DBRESET# H_D#30 D[29]# D[61]# H_D#62
U2 A[30]# DBR# C20 SYS_RST# 23 T25 D[30]# D[62]# AF22

2
H_A#31 V4 H_D#31 N25 AC23 H_D#63
H_A#32 A[31]# R166 75/04 R151 D[31]# D[63]#
B W3 A[32]# 6 H_DSTBN#1 L26 DSTBN[1]# DSTBN[3]# AE25 H_DSTBN#3 6
B
H_A#33 AA4 THERMAL 2 1 +1.05V 1K/F/04 M26 AF24
A[33]# 6 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 6
H_A#34 AB2 N24 AC20
A[34]# 6 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 6
H_A#35 AA3 D21 CPU_PROCHOT#
A[35]# PROCHOT# H_THERMDA V_CPU_GTLREF COMP0 Note:

1
6 H_ADSTB#1 V1 ADSTB[1]# THERMDA A24 H_THERMDA 5 AD26 GTLREF COMP[0] R26
B25 H_THERMDC CPU_TEST1 C23 MISC U26 COMP1
THERMDC H_THERMDC 5 TEST1 COMP[1] H_DPRTSTP need to daisy chain

2
A6 CPU_TEST2 D25 AA1 COMP2
21 H_A20M# A20M# TEST2 COMP[2]
21 H_FERR# A5 FERR# THERMTRIP# C7 PM_THRMTRIP#
PM_THRMTRIP# 7,21
CPU_TEST3 C24 TEST3 COMP[3] Y1 COMP3 from ICH8 to IMVP6 to CPU.
ICH

C4 R72 *56/04 R152 CPU_TEST4 AF26


21 H_IGNNE# IGNNE# TEST4
1 2 +1.05V 2K/F/04 CPU_TEST5 AF1 E5
TEST5 DPRSTP# H_DPRSTP# 7,21,44
D5 H CLK CPU_TEST6 A26 B5
21 H_STPCLK# STPCLK# TEST6 DPSLP# H_DPSLP# 21

1
21 H_INTR C6 LINT0 DPWR# D24 H_DPWR# 6
B4 A22 B22 D6 H_PWRGD H_DPRSTP#
21 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 2 2 CPU_BSEL0 BSEL[0] PWRGOOD H_PWRGD 21 H_DPSLP#
21 H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# 2 2 CPU_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 6
2 CPU_BSEL2 C21 BSEL[2] PSI# AE6 PM_PSI# 44
M4 RSVD[01] C928C929
N5 RSVD[02] SI-2 modified --remove R72 Merom Ball-out Rev 1a
T2 RSVD[03]
C930 V3 RSVD[04] *100P/50V/04
RESERVED

C931 B2 RSVD[05] R157 *1K/F/04 *100P/50V/04


C932 C3 RSVD[06] 1 2 CPU_TEST1 *PADT49 CPU_TEST3
C933 D2 R158 *1K/F/04 *PADT154 CPU_TEST5
SI-2 modified C934 *100P/50V/04 D22 RSVD[07] 1 2 CPU_TEST2
C935 *100P/50V/04 RSVD[08]
resevved for power D3 RSVD[09] For the purpose of testability, route these signals
C936 *100P/50V/04 F6 RSVD[10] C132 *0.1U/10V/04
noise
*100P/50V/04
*100P/50V/04
2 1 CPU_TEST4 through a ground referenced Z0 = 55ohm trace that
ends in a via that is near a GND via and is
Reserved for EMI.
*100P/50V/04 R140 *0/04
*100P/50V/04 Merom Ball-out Rev 1a 1 2 CPU_TEST6 accessible through an oscilloscope connection.
+1.05V +1.05V
C C
Place C close to the
CPU_TEST4 pin. Make sure

1
Layout Note: SI-1 modified add ITP connector CPU_TEST4 routing is C911 C730
*.1U/10V/04 *.1U/10V/04
Place R4,R361,R346 & R7 close to CPU. reference to GND and away

2
+1.05V Populate ITP700Flex for bringup from other noisy signal.
VIN +1.5V
R22 2 1 27/F/04 ITP_TCK ITP debug signals
2 1 ITP_TRST#
1

R21 649/F/04
R13 R20 R18 R15 FSB BCLK BSEL2 BSEL1 BSEL0 COMP0
*51/F/04 51/04 39/F/04 150/04 +1.05V COMP1
533 133 0 0 1 COMP2
JITP1 C904 *0.1U/10V/04 COMP3
667 166 0 1 1
2

2 1
ITP_TDI 1 27
TDI VTT0

2
ITP_TMS 2 28 C905 *0.1U/10V/04 800 200 0 1 0
ITP_TCK TMS VTT1 R16 R17 R585 R584
5 TCK VTAP 26 2 1
ITP_TDO R19 1 2 0/04 7 54.9/F/04 27.4/F/04 54.9/F/04 27.4/F/04
ITP_TRST# TDO
3 TRST#
R14 22.6/F/04

1
H_RESET# 1 2 12 25 ITP_DBRESET# ITP disable guidelines
RESET# DBR#
Layout Note: DBA# 24 Comp0,2 connect with Zo=27.4ohm,Comp1,3
Place R8 Signal Resistor Value Connect To Resistor Placement connect with Zo=55ohm, make those traces
ITP_TCK 11 FBO
close ITP. TDI 150 ohm +/- 5% VTT Within 2.0" of the ITP length shorter than 0.5".Trace should be
D
2 CLK_CPU_ITP# 8 BCLKN at least 25 mils away from any other D
C925 9 23 ITP_BPM#0 TMS 39 ohm +/- 1% VTT Within 2.0" of the ITP
2 CLK_CPU_ITP BCLKP BPM0#
BPM1# 21 ITP_BPM#1 toggling signal.
19 ITP_BPM#2 TRST# 500-680ohm +/- 5% GND Within 2.0" of the ITP
*100P/50V/04 BPM2# ITP_BPM#3
10 GND0 BPM3# 17
14 15 ITP_BPM#4 TCK 27 ohm +/- 1% GND Within 2.0" of the ITP
16
GND1
GND2
BPM4#
BPM5# 13 ITP_BPM#5 PROJECT : AT3
Quanta Computer Inc.
18 GND3 NC0 4 TDO 150 ohm +/- 5% VTT Within 2.0" of the ITP
20 GND4 NC1 6
22 GND5 GND_0 29
GND_1 30
Note: Populate R5, R8, C372 & R430 when ITP connector is populated. Size Document Number Rev
*ITP700Flex Custom CLOCK GENERATOR 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 3 of 48
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

ICCODE:
VCC_CORE VCC_CORE for Merom processors
U31C recommended design U31D
A7 AB20 A4 P6
A9
VCC[001] VCC[068]
AB7 target is 44A A8
VSS[001] VSS[082]
P21
VCC_CORE VCC[002] VCC[069] VSS[002] VSS[083]
A10 VCC[003] VCC[070] AC7 A11 VSS[003] VSS[084] P24
A12 VCC[004] VCC[071] AC9 A14 VSS[004] VSS[085] R2
A13 VCC[005] VCC[072] AC12 A16 VSS[005] VSS[086] R5
A15 VCC[006] VCC[073] AC13 A19 VSS[006] VSS[087] R22

1
A17 VCC[007] VCC[074] AC15 A23 VSS[007] VSS[088] R25
C88 C672 C676 C683 C688 A18 AC17 AF2 T1
22U/10V/08 22U/10V/08 22U/10V/08 22U/10V/08 22U/10V/08 VCC[008] VCC[075] VSS[008] VSS[089]
A
A20 VCC[009] VCC[076] AC18 B6 VSS[009] VSS[090] T4 A
2

2
B7 VCC[010] VCC[077] AD7 B8 VSS[010] VSS[091] T23
B9 VCC[011] VCC[078] AD9 B11 VSS[011] VSS[092] T26
B10 VCC[012] VCC[079] AD10 B13 VSS[012] VSS[093] U3
B12 VCC[013] VCC[080] AD12 B16 VSS[013] VSS[094] U6
VCC_CORE B14 AD14 B19 U21
VCC[014] VCC[081] VSS[014] VSS[095]
B15 VCC[015] VCC[082] AD15 B21 VSS[015] VSS[096] U24
B17 VCC[016] VCC[083] AD17 B24 VSS[016] VSS[097] V2
B18 VCC[017] VCC[084] AD18 C5 VSS[017] VSS[098] V5
1

1
B20 VCC[018] VCC[085] AE9 C8 VSS[018] VSS[099] V22
C96 C81 C693 C697 C87 C9 AE10 C11 V25
22U/10V/08 22U/10V/08 22U/10V/08 22U/10V/08 22U/10V/08 VCC[019] VCC[086] VSS[019] VSS[100]
C10 VCC[020] VCC[087] AE12 C14 VSS[020] VSS[101] W1
2

2
C12 VCC[021] VCC[088] AE13 C16 VSS[021] VSS[102] W4
C13 VCC[022] VCC[089] AE15 C19 VSS[022] VSS[103] W23
C15 VCC[023] VCC[090] AE17 C2 VSS[023] VSS[104] W26
8 inside cavity, north side, secondary layer. C17 VCC[024] VCC[091] AE18 C22 VSS[024] VSS[105] Y3
C18 VCC[025] VCC[092] AE20 C25 VSS[025] VSS[106] Y6
D9 VCC[026] VCC[093] AF9 D1 VSS[026] VSS[107] Y21
VCC_CORE D10 AF10 ICCP: D4 Y24
VCC[027] VCC[094] VSS[027] VSS[108]
D12 VCC[028] VCC[095] AF12 D8 VSS[028] VSS[109] AA2
D14 AF14 1before vccore stable D11 AA5
VCC[029] VCC[096] VSS[029] VSS[110]
D15 VCC[030] VCC[097] AF15 peak current is 4.5A D13 VSS[030] VSS[111] AA8
1

1
D17 VCC[031] VCC[098] AF17 D16 VSS[031] VSS[112] AA11
C52 C42 C72 C66 C57 D18 AF18 +1.05V 2.after vccore stable D19 AA14
22U/10V/08 22U/10V/08 22U/10V/08 22U/10V/08 22U/10V/08 VCC[032] VCC[099] VSS[032] VSS[113]
E7 VCC[033] VCC[100] AF20 continue current is D23 VSS[033] VSS[114] AA16
2

2
E9 VCC[034] D26 VSS[034] VSS[115] AA19
E10 G21 2.5A E3 AA22
VCC[035] VCCP[01] VSS[035] VSS[116]
E12 VCC[036] VCCP[02] V6 E6 VSS[036] VSS[117] AA25

1
E13 VCC[037] VCCP[03] J6 E8 VSS[037] VSS[118] AB1
VCC_CORE E15 K6 + C26 E11 AB4
VCC[038] VCCP[04] *330U/2.5V VSS[038] VSS[119]
B E17 VCC[039] VCCP[05] M6 E14 VSS[039] VSS[120] AB8 B
E18 VCC[040] VCCP[06] J21 E16 VSS[040] VSS[121] AB11

2
E20 VCC[041] VCCP[07] K21 E19 VSS[041] VSS[122] AB13
1

1
F7 VCC[042] VCCP[08] M21 E21 VSS[042] VSS[123] AB16
C71 C63 C36 C95 C80 F9 N21 E24 AB19
22U/10V/08 22U/10V/08 22U/10V/08 22U/10V/08 22U/10V/08 VCC[043] VCCP[09] VSS[043] VSS[124]
F10 VCC[044] VCCP[10] N6 F5 VSS[044] VSS[125] AB23
2

F12 VCC[045] VCCP[11] R21 F8 VSS[045] VSS[126] AB26


F14 R6 +1.5V F11 AC3
VCC[046] VCCP[12] VSS[046] VSS[127]
F15 VCC[047] VCCP[13] T21 F13 VSS[047] VSS[128] AC6
8 inside cavity, south side, secondary layer. F17 VCC[048] VCCP[14] T6 F16 VSS[048] VSS[129] AC8
F18 VCC[049] VCCP[15] V21 F19 VSS[049] VSS[130] AC11
F20 VCC[050] VCCP[16] W21 F2 VSS[050] VSS[131] AC14
AA7 VCC[051] ICCA 130mA F22 VSS[051] VSS[132] AC16
VCC_CORE AA9 B26 F25 AC19
VCC[052] VCCA[01] VSS[052] VSS[133]
AA10 VCC[053] VCCA[02] C26 G4 VSS[053] VSS[134] AC21
AA12 VCC[054] G1 VSS[054] VSS[135] AC24

1
AA13 AD6 C729 C733 G23 AD2
VCC[055] VID[0] CPU_VID0 44 VSS[055] VSS[136]
1

AA15 AF5 .01U/25V/04 10U/4V/08 G26 AD5


VCC[056] VID[1] CPU_VID1 44 VSS[056] VSS[137]
C40 C39 C35 C41 C50 C55 AA17 AE5 H3 AD8
VCC[057] VID[2] CPU_VID2 44 VSS[057] VSS[138]
22U/10V/08 22U/10V/08 22U/10V/08 22U/10V/08 22U/10V/08 22U/10V/08

2
AA18 VCC[058] VID[3] AF4 CPU_VID3 44 H6 VSS[058] VSS[139] AD11
2

AA20 VCC[059] VID[4] AE3 CPU_VID4 44 H21 VSS[059] VSS[140] AD13


AB9 VCC[060] VID[5] AF3 CPU_VID5 44 H24 VSS[060] VSS[141] AD16
AC10 VCC[061] VID[6] AE2 CPU_VID6 44 J2 VSS[061] VSS[142] AD19
6 inside cavity, north side, primary layer. AB10 VCC[062] J5 VSS[062] VSS[143] AD22
AB12 VCC[063]
Layout Note: J22 VSS[063] VSS[144] AD25
AB14 VCC[064] VCCSENSE AF7 TP_VCCSENSE TP_VCCSENSE 44 Place C105 near PIN J25 VSS[064] VSS[145] AE1
VCC_CORE AB15 K1 AE4
VCC[065] VSS[065] VSS[146]
AB17 VCC[066]
B26. K4 VSS[066] VSS[147] AE8
AB18 VCC[067] VSSSENSE AE7 TP_VSSSENSE TP_VSSSENSE 44 K23 VSS[067] VSS[148] AE11
K26 VSS[068] VSS[149] AE14
1

C C
Merom Ball-out Rev 1a L3 AE16
C671 C675 C682 C687 C692 C696 VSS[069] VSS[150]
. L6 VSS[070] VSS[151] AE19
22U/10V/08 22U/10V/08 22U/10V/08 22U/10V/08 22U/10V/08 22U/10V/08 L21 AE23
VSS[071] VSS[152]
2

L24 VSS[072] VSS[153] AE26


M2 VSS[073] VSS[154] A2
M5 VSS[074] VSS[155] AF6
6 inside cavity, south side, primary layer. M22 VSS[075] VSS[156] AF8
M25 VSS[076] VSS[157] AF11
N1 VSS[077] VSS[158] AF13
N4 VSS[078] VSS[159] AF16
N23 VSS[079] VSS[160] AF19
N26 VSS[080] VSS[161] AF21
P3 VSS[081] VSS[162] A25
VSS[163] AF25
+1.05V
Merom Ball-out Rev 1a
.
1

C65 C64 C54 C56 C48 C51


.1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04
2

Layout out:
Place these inside socket cavity on North side secondary.

D D

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom Merom Processor (POWER) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 4 of 48
1 2 3 4 5 6 7 8
5 4 3 2 1

+3V

05
R165
D 200/F/06 D

25mils
LM86VCC

C169 R162 *0/06


SYS_SHDN# 16,42
R164 R163 R161 .1U/10V/04
10K/04 10K/04 10K/04
U4 +3V
10/20mils
LM86__SMC 8 1
SCLK VCC H_THERMDA
H_THERMDA 3
LM86_SMD 7 2
SDA DXP

3
C126 R176
6 3 2200P/50V/06 1M/F/06
ALERT# DXN
THERM_ALERT# 1 2 4 5 H_THERMDC 2
23 THERM_ALERT# OVERT# GND H_THERMDC 3
R368 *0/06 Q3

3
2N7002E
close to ICH MAX6657/GMT-781 C235
ADDRESS: 98H
SYS_SHDN-1# 0.1U/16V/06

1
2
C C
Q6
2N7002E

1
add hardware protect
+3V

Q4
2

2N7002E
17,36,37,41,48 MBDATA 3 1 LM86_SMD

+3V

Q5
2

2N7002E
17,36,37,41,48 MBCLK 3 1 LM86__SMC
B B

A A

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
B THERMAL LM86 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 5 of 48
5 4 3 2 1
1 2 3 4 5 6 7 8

U34A H_A#[3..35]
H_A#[3..35] 3
H_D#[0..63] J13 H_A#3
3 H_D#[0..63] H_A#_3
H_D#0 E2 B11 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
A
G2 H_D#_1 H_A#_5 C11 A
H_D#2 G7 M11 H_A#6
H_D#3 H_D#_2 H_A#_6 H_A#7
M6 H_D#_3 H_A#_7 C15
H_D#4 H7 F16 H_A#8
H_D#5 H_D#_4 H_A#_8 H_A#9
H3 H_D#_5 H_A#_9 L13
H_D#6 G4 G17 H_A#10
H_D#7 H_D#_6 H_A#_10 H_A#11
F3 H_D#_7 H_A#_11 C14
H_D#8 N8 K16 H_A#12
H_D#9 H_D#_8 H_A#_12 H_A#13
H2 H_D#_9 H_A#_13 B13
H_D#10 M10 L16 H_A#14
H_D#11 H_D#_10 H_A#_14 H_A#15
N12 H_D#_11 H_A#_15 J17
H_D#12 N9 B14 H_A#16
+1.05V H_D#13 H_D#_12 H_A#_16 H_A#17
H5 H_D#_13 H_A#_17 K19
H_D#14 P13 P15 H_A#18
H_D#15 H_D#_14 H_A#_18 H_A#19
K9 H_D#_15 H_A#_19 R17
H_D#16 M2 B16 H_A#20
H_D#_16 H_A#_20
1

H_D#17 W10 H20 H_A#21


R51 H_D#18 H_D#_17 H_A#_21 H_A#22
Y8 H_D#_18 H_A#_22 L19
221/F/04 H_D#19 V4 D17 H_A#23
H_D#20 H_D#_19 H_A#_23 H_A#24
M3 H_D#_20 H_A#_24 M17
H_D#21 J1 N16 H_A#25
H_SWING H_D#22 H_D#_21 H_A#_25 H_A#26
2

N5 H_D#_22 H_A#_26 J19


H_D#23 N3 B18 H_A#27
H_D#_23 H_A#_27
1

H_D#24 W6 E19 H_A#28


H_D#_24 H_A#_28
2

R55 H_D#25 W9 B17 H_A#29


100/F/04 C47 H_D#26 H_D#_25 H_A#_29 H_A#30
N2 H_D#_26 H_A#_30 B15
.1U/10V/04 H_D#27 Y7 E17 H_A#31
H_D#28 H_D#_27 H_A#_31 H_A#32
1

Y9 H_D#_28 H_A#_32 C18


H_D#29 H_A#33
2

P4 H_D#_29 H_A#_33 A19


H_D#30 W3 B19 H_A#34
H_D#31 H_D#_30 H_A#_34 H_A#35
B N1 H_D#_31 H_A#_35 N19 B
H_D#32 AD12
H_D#33 H_D#_32
AE3 H_D#_33 H_ADS# G12 H_ADS# 3
H_D#34 AD9 H17
H_D#_34 H_ADSTB#_0 H_ADSTB#0 3
H_D#35 AC9 G20
H_D#_35 H_ADSTB#_1 H_ADSTB#1 3
H_D#36 AC7 C8
H_D#_36 H_BNR# H_BNR# 3

HOST
+1.05V H_D#37 AC14 E8
H_D#_37 H_BPRI# H_BPRI# 3
H_D#38 AD11 F12
H_D#_38 H_BREQ# H_BR0# 3
impedance 55 ohm H_D#39 AC11 D6
H_D#_39 H_DEFER# H_DEFER# 3
H_D#40 AB2 C10
H_D#_40 H_DBSY# H_DBSY# 3
H_D#41 AD7 AM5
H_D#_41 HPLL_CLK CLK_MCH_BCLK 2
1

H_D#42 AB1 AM7


H_D#_42 HPLL_CLK# CLK_MCH_BCLK# 2
R553 R542 H_D#43 Y3 H8
H_D#_43 H_DPWR# H_DPWR# 3
54.9/F/04 54.9/F/04 H_D#44 AC6 K7
H_D#_44 H_DRDY# H_DRDY# 3
H_D#45 AE2 E4
H_D#_45 H_HIT# H_HIT# 3
H_D#46 AC5 C6
H_D#_46 H_HITM# H_HITM# 3
H_SCOMP H_D#47
2

AG3 H_D#_47 H_LOCK# G10 H_LOCK# 3


H_SCOMP# H_D#48 AJ9 B7
H_D#_48 H_TRDY# H_TRDY# 3
H_D#49 AH8
H_D#50 H_D#_49
AJ14 H_D#_50
H_D#51 AE9
H_RCOMP H_D#52 H_D#_51
AE11 H_D#_52
H_D#53 AH12 K5
H_D#_53 H_DINV#_0 H_DINV#0 3
1

H_D#54 AJ5 L2
H_D#_54 H_DINV#_1 H_DINV#1 3
R41 H_D#55 AH5 AD13
H_D#_55 H_DINV#_2 H_DINV#2 3
24.9/F/04 Layout Note: H_D#56 AJ6 AE13
H_D#_56 H_DINV#_3 H_DINV#3 3
H_D#57 AE7
H_RCOMP trace should be H_D#58 AJ7
H_D#_57
M7
H_D#_58 H_DSTBN#_0 H_DSTBN#0 3
10-mil wide with 20-mil H_D#59
2

AJ2 H_D#_59 H_DSTBN#_1 K3 H_DSTBN#1 3


H_D#60 AE5 AD2
C spacing. H_D#_60 H_DSTBN#_2 H_DSTBN#2 3 C
H_D#61 AJ3 AH11
H_D#_61 H_DSTBN#_3 H_DSTBN#3 3
H_D#62 AH2
H_D#63 H_D#_62
AH13 H_D#_63 H_DSTBP#_0 L7 H_DSTBP#0 3
H_DSTBP#_1 K2 H_DSTBP#1 3
H_DSTBP#_2 AC2 H_DSTBP#2 3
H_SWING B3 AJ10
H_SWING H_DSTBP#_3 H_DSTBP#3 3
+1.05V H_RCOMP C2 H_RCOMP
H_REQ#_0 M14 H_REQ#0 3
H_SCOMP W1 E13
H_SCOMP H_REQ#_1 H_REQ#1 3
2

H_SCOMP# W2 A11
H_SCOMP# H_REQ#_2 H_REQ#2 3
R52 H13
H_REQ#_3 H_REQ#3 3
1K/F/04 B6 B12
3 H_RESET# H_CPURST# H_REQ#_4 H_REQ#4 3
3 H_CPUSLP# E5 H_CPUSLP#
H_RS#_0 E12 H_RS#0 3
1

H_RS#_1 D7 H_RS#1 3
H_RS#_2 D8 H_RS#2 3
H_REF B9 H_AVREF
A9 H_DVREF
1

CRESTLINE_1p0
1

R53 C46
2K/F/04 .1U/10V/04
2
2

Layout Note:
Place the 0.1 uF
D decoupling capacitor D

within 100 mils from


GMCH pins.

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom Crestline (HOST) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 6 of 48
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U34B U34C +VCC_PEG

P36 J40 R85 24.9/F/04


RSVD1 16,26 DPST_PWM L_BKLT_CTRL
P37 AV29 R31 0/06 H39 N43 VCC3G_PCIE_R 1 2
RSVD2 SM_CK_0 M_A_CLK0 14 16,26 LVDS_BLON L_BKLT_EN PEG_COMPI
R35 BB23 +3V R26 10K/04 E39 M43
RSVD3 SM_CK_1 M_A_CLK1 14 L_CTRL_CLK PEG_COMPO
N35 BA25 R25 10K/04 E40
RSVD4 SM_CK_3 M_B_CLK0 14 L_CTRL_DATA
AR12 AV23 R32 0/06 C37
RSVD5 SM_CK_4 M_B_CLK1 14 15,16,26 EDIDCLK L_DDC_CLK
AR13 R33 0/06 D35 J51 PEG_RXN0
RSVD6 15,16,26 EDIDDATA L_DDC_DATA PEG_RX#_0 PEG_RXN0 20
AM12 AW30 R46 0/06 K40 L51 PEG_RXN1
RSVD7 SM_CK#_0 M_A_CLK0# 14 16,26 DISP_ON L_VDD_EN PEG_RX#_1 PEG_RXN1 20
AN13 BA23 N47 PEG_RXN2
RSVD8 SM_CK#_1 M_A_CLK1# 14 PEG_RX#_2 PEG_RXN2 20
J12 AW25 <check list & CRB> R83 IV@2.4K/04 LVDS_IBG L41 T45 PEG_RXN3
RSVD9 SM_CK#_3 M_B_CLK0# 14 LVDS_IBG PEG_RX#_3 PEG_RXN3 20
AR37 AW23 For Calero : 1.5K IV&EV Dis/Enable L43 T50 PEG_RXN4
RSVD10 SM_CK#_4 M_B_CLK1# 14 T25 *PAD LVDS_VBG PEG_RX#_4 PEG_RXN4 20
AM36 For N41 U40 PEG_RXN5
RSVD11 setting LVDS_VREFH PEG_RX#_5 PEG_RXN5 20
AL36 BE29 N40 Y44 PEG_RXN6
RSVD12 SM_CKE_0 M_A_CKE0 13,14 Cresstline:2.4K LVDS_VREFL PEG_RX#_6 PEG_RXN6 20
AM37 AY32 D46 Y40 PEG_RXN7
RSVD13 SM_CKE_1 M_A_CKE1 13,14 15 LA_CLK# LVDSA_CLK# PEG_RX#_7 PEG_RXN7 20
A D20 BD39 C45 AB51 PEG_RXN8 A
RSVD14 SM_CKE_3 M_B_CKE0 13,14 15 LA_CLK LVDSA_CLK PEG_RX#_8 PEG_RXN8 20
PEG_RXN9

MUXING
SM_CKE_4 BG37 M_B_CKE1 13,14 15 LB_CLK# D44 LVDSB_CLK# PEG_RX#_9 W49 PEG_RXN9 20
E42 AD44 PEG_RXN10
15 LB_CLK LVDSB_CLK PEG_RX#_10 PEG_RXN10 20

LVDS
WW22 update BG20 M_A_CS#0 13,14 AD40 PEG_RXN11
PEG_RXN11 20
SM_CS#_0 PEG_RX#_11 PEG_RXN12
--- MA14 needs SM_CS#_1 BK16 M_A_CS#1 13,14 15 LA_DATAN0 G51 LVDSA_DATA#_0 PEG_RX#_12 AG46 PEG_RXN12 20
BG16 E51 AH49 PEG_RXN13
to be routed if SM_CS#_2 M_B_CS#0 13,14 15 LA_DATAN1 LVDSA_DATA#_1 PEG_RX#_13 PEG_RXN13 20
H10 BE13 F49 AG45 PEG_RXN14
RSVD20 SM_CS#_3 M_B_CS#1 13,14 15 LA_DATAN2 LVDSA_DATA#_2 PEG_RX#_14 PEG_RXN14 20
customers are B51 AG41 PEG_RXN15
RSVD21 PEG_RX#_15 PEG_RXN15 20
planning on BJ20 RSVD22 SM_ODT_0 BH18 M_A_ODT0 13,14

RSVD
BK22 BJ15 SI-1 modified add 470P G50 J50 PEG_RXP0
RSVD23 SM_ODT_1 M_A_ODT1 13,14 15 LA_DATAP0 LVDSA_DATA_0 PEG_RX_0 PEG_RXP0 20

GRAPHICS
using 2Gb BF19 BJ14 M_B_ODT0 13,14 15 LA_DATAP1 E50 L50 PEG_RXP1
PEG_RXP1 20
RSVD24 SM_ODT_2 LVDSA_DATA_1 PEG_RX_1 PEG_RXP2
BH20 BE16 F48 M47

DDR
technology and RSVD25 SM_ODT_3 M_B_ODT1 13,14 15 LA_DATAP2 LVDSA_DATA_2 PEG_RX_2 PEG_RXP2 20
BK18 1 2 U44 PEG_RXP3
width=8 (by 8) RSVD26 PEG_RX_3 PEG_RXP3 20
BJ18 BL15 SMRCOMPP C882 470P/50V/X7R/04 T49 PEG_RXP4
RSVD27 SM_RCOMP PEG_RX_4 PEG_RXP4 20
DIMMs BF23 BK14 SMRCOMPN G44 T41 PEG_RXP5
RSVD28 SM_RCOMP# 15 LB_DATAN0 LVDSB_DATA#_0 PEG_RX_5 PEG_RXP5 20
BG23 C178 .1U/10V/04 B47 W45 PEG_RXP6
RSVD29 15 LB_DATAN1 LVDSB_DATA#_1 PEG_RX_6 PEG_RXP6 20
BC23 BK31 SM_RCOMP_VOH B45 W41 PEG_RXP7
RSVD30 SM_RCOMP_VOH 15 LB_DATAN2 LVDSB_DATA#_2 PEG_RX_7 PEG_RXP7 20
BD24 BL31 SM_RCOMP_VOL C196 .1U/10V/04 AB50 PEG_RXP8
RSVD31 SM_RCOMP_VOL PEG_RX_8 PEG_RXP8 20
13,14 SA_MA14 BJ29 Y48 PEG_RXP9
SA-MA14 PEG_RX_9 PEG_RXP9 20
13,14 SB_MA14 BE24 AR49 SMDDR_VREF_MCH R168 0/04 E44 AC45 PEG_RXP10
SB_MA14 SM_VREF_0 SMDDR_VREF 14,46 15 LB_DATAP0 LVDSB_DATA_0 PEG_RX_10 PEG_RXP10 20
BH39 AW4 R170 *10K/F/06 A47 AC41 PEG_RXP11
RSVD34 SM_VREF_1 15 LB_DATAP1 LVDSB_DATA_1 PEG_RX_11 PEG_RXP11 20
AW20 R169 *10K/F/06 +1.8VSUS_GMCH A45 AH47 PEG_RXP12
RSVD35 15 LB_DATAP2 LVDSB_DATA_2 PEG_RX_12 PEG_RXP12 20
BK20 AG49 PEG_RXP13
RSVD36 PEG_RX_13 PEG_RXP13 20
CRESTLINE T165 *PAD C48 AH45 PEG_RXP14
PEG_RXP14 20
LVDSA_DATA#_3 PEG_RX_14

PCI-EXPRESS
new pin T9 *PAD D47 B42 AG42 PEG_RXP15
LVDSA_DATA_3 DPLL_REF_CLK DREFCLK 2 PEG_RX_15 PEG_RXP15 20
B44 RSVD39 DPLL_REF_CLK# C42 DREFCLK# 2
define C44 H48 R93 0/04 TV_COMP1 E27 N45 C_PEG_TXN0 C62 *.1U/10V/04
RSVD40 DPLL_REF_SSCLK DREFSSCLK 2 15,25 S-CVBS1 TV_Y/G1 TVA_DAC PEG_TX#_0 PEG_TXN_C0 20
A35 H47 R92 0/04 G27 U39 C_PEG_TXN1 C685 *.1U/10V/04
RSVD41 DPLL_REF_SSCLK# DREFSSCLK# 2 15,25 S-YD1 TV_C/R1 TVB_DAC PEG_TX#_1 PEG_TXN_C1 20

CLK
B37 R96 0/04 K27 U47 C_PEG_TXN2 C70 *.1U/10V/04
RSVD42 15,25 S-CD1 TVC_DAC PEG_TX#_2 PEG_TXN_C2 20
B36 RSVD43 PEG_CLK K44 CLK_PCIE_3GPLL 2 PEG_TX#_3 N51 C_PEG_TXN3 C690 *.1U/10V/04
PEG_TXN_C3 20

TV
B34 RSVD44 PEG_CLK# K45 CLK_PCIE_3GPLL# 2 F27 TVA_RTN PEG_TX#_4 R50 C_PEG_TXN4 C77 *.1U/10V/04
PEG_TXN_C4 20
C34 RSVD45 J27 TVB_RTN PEG_TX#_5 T42 C_PEG_TXN5 C695 *.1U/10V/04
PEG_TXN_C5 20
Layout Note: DMI_TXN[3:0] 22 L27 TVC_RTN PEG_TX#_6 Y43 C_PEG_TXN6 C92 *.1U/10V/04
PEG_TXN_C6 20
W46 C_PEG_TXN7 C701 *.1U/10V/04
PEG_TXN_C7 20
Location of all MCH_CFG strap AN47 DMI_TXN0 R91 *2.2K/04 TV_DCONSEL_0 M35 PEG_TX#_7
W38 C_PEG_TXN8 C103 *.1U/10V/04
B DMI_RXN_0 +3V TV_DCONSEL_0 PEG_TX#_8 PEG_TXN_C8 20 B
resistors needs to be close to DMI_RXN_1 AJ38 DMI_TXN1 R100 *2.2K/04 TV_DCONSEL_1 P33
TV_DCONSEL_1 PEG_TX#_9 AD39C_PEG_TXN9 C709 *.1U/10V/04
PEG_TXN_C9 20
AN42 DMI_TXN2 AC46C_PEG_TXN10C109 *.1U/10V/04
PEG_TXN_C10 20
minmize stub. DMI_RXN_2
AN46 DMI_TXN3 <FAE> PEG_TX#_10
AC49C_PEG_TXN11C716 *.1U/10V/04
DMI_RXN_3 DMI_TXP[3:0] 22 PEG_TX#_11 PEG_TXN_C11 20
If no use can be NC PEG_TX#_12 AC42C_PEG_TXN12C111 *.1U/10V/04
PEG_TXN_C12 20
DMI_RXP_0 AM47 DMI_TXP0 PEG_TX#_13 AH39C_PEG_TXN13C719 *.1U/10V/04
PEG_TXN_C13 20
2 MCH_BSEL0 P27 CFG_0 DMI_RXP_1 AJ39 DMI_TXP1 PEG_TX#_14 AE49 C_PEG_TXN14C117 *.1U/10V/04
PEG_TXN_C14 20
2 MCH_BSEL1 N27 CFG_1 DMI_RXP_2 AN41 DMI_TXP2 PEG_TX#_15 AH44C_PEG_TXN15C722 *.1U/10V/04
PEG_TXN_C15 20
2 MCH_BSEL2 N24 CFG_2 DMI_RXP_3 AN45 DMI_TXP3 DMI_RXN[3:0] 22
CFG3 C21 R88 0/04 CRT_BLUE1 H32 M45 C_PEG_TXP0 C59 *.1U/10V/04
*PADT18 CFG_3 15,25 CRT_B CRT_BLUE PEG_TX_0 PEG_TXP_C0 20
*PADT158 CFG4 C23 AJ46 DMI_RXN0 G32 T38 C_PEG_TXP1 C684 *.1U/10V/04
CFG_4 DMI_TXN_0 CRT_GREEN1 CRT_BLUE# PEG_TX_1 PEG_TXP_C1 20
DMI

12 MCH_CFG_5 CFG5 F23 AJ41 DMI_RXN1 R87 0/04 K29 T46 C_PEG_TXP2 C67 *.1U/10V/04
CFG_5 DMI_TXN_1 15,25 CRT_G CRT_GREEN PEG_TX_2 PEG_TXP_C2 20
*PADT27 CFG6 N23 AM40DMI_RXN2 J29 N50 C_PEG_TXP3 C689 *.1U/10V/04
CFG_6 DMI_TXN_2 CRT_RED1 CRT_GREEN# PEG_TX_3 PEG_TXP_C3 20
*PADT16 CFG7 G23 AM44DMI_RXN3 R86 0/04 F29 R51 C_PEG_TXP4 C74 *.1U/10V/04
CFG_7 DMI_TXN_3 DMI_RXP[3:0] 22 15,25 CRT_R CRT_RED PEG_TX_4 PEG_TXP_C4 20

VGA
*PADT20 CFG8 J20 E29 U43 C_PEG_TXP5 C694 *.1U/10V/04
CFG_8 CRT_RED# PEG_TX_5 PEG_TXP_C5 20
CFG

12 MCH_CFG_9 CFG9 C20 AJ47 DMI_RXP0 W42 C_PEG_TXP6 C84 *.1U/10V/04


CFG_9 DMI_TXP_0 PEG_TX_6 PEG_TXP_C6 20
T30
*PAD CFG10 R24 AJ42 DMI_RXP1 Y47 C_PEG_TXP7 C700 *.1U/10V/04
CFG_10 DMI_TXP_1 PEG_TX_7 PEG_TXP_C7 20
*PADT21 CFG11 L23 AM39DMI_RXP2 R48 0/04 DDCCLK_R K33 Y39 C_PEG_TXP8 C97 *.1U/10V/04
CFG_11 DMI_TXP_2 15,25 DDCCLK CRT_DDC_CLK PEG_TX_8 PEG_TXP_C8 20
12 MCH_CFG_12 CFG12 J23 AM43DMI_RXP3 R49 0/04 DDCDATA_RG35 AC38C_PEG_TXP9 C703 *.1U/10V/04
CFG_12 DMI_TXP_3 15,25 DDCDATA CRT_DDC_DATA PEG_TX_9 PEG_TXP_C9 20
12 MCH_CFG_13 CFG13 E23 R75 0/04 R34 30/04HSYNC11 F33 AD47C_PEG_TXP10C107 *.1U/10V/04
CFG_13 15,25 HSYNC_COM CRT_HSYNC PEG_TX_10 PEG_TXP_C10 20
*PADT17 CFG14 E20 R42 IV@1.3K/F/04 CRTIREF C32 AC50C_PEG_TXP11C713 *.1U/10V/04
CFG_14 CRT_TVO_IREF PEG_TX_11 PEG_TXP_C11 20
*PADT23 CFG15 K23 R67 0/04 R35 30/04VSYNC11 E33 AD43C_PEG_TXP12C112 *.1U/10V/04
12 MCH_CFG_16 CFG16 M20
CFG_15 <check lisr & CRB> 15,25 VSYNC_COM CRT_VSYNC PEG_TX_12
AG39C_PEG_TXP13C717 *.1U/10V/04
PEG_TXP_C12 20
CFG_16 PEG_TX_13 PEG_TXP_C13 20
CFG17 <FAE> AE50 C_PEG_TXP14C122 *.1U/10V/04
GRAPHICS VID

*PADT28 M24 CFG_17 For Calero : 255 PEG_TX_14 PEG_TXP_C14 20


*PADT26 CFG18 L32 For Cresstline:1.3K/F Flexible and safe <check list> AH43C_PEG_TXP15C721 *.1U/10V/04
CFG_18 PEG_TX_15 PEG_TXP_C15 20
12 MCH_CFG_19 CFG19 N33 HSYNC/VSYNC serial R
CFG20 CFG_19 For external VGA:0
12 MCH_CFG_20 L35 CFG_20 place close to NB
ohm IV&EV Dis/Enable setting CRESTLINE_1p0
IV&EV Dis/Enable setting
E35 DFGT_VID_0 T19
R36 0 PM_BMBUSY#_R GFX_VID_0 DFGT_VID_1 T159 In Crestline EDS
23 PM_BMBUSY# G41 PM_BM_BUSY# GFX_VID_1 A39
3,21,44 H_DPRSTP# R84 0/04 ICH_DPRSTP#_R L39 C38 DFGT_VID_2 T157 Rev.1.0, Render
PM_DPRSTP# GFX_VID_2 DFGT_VID_3 T155 <check list>
13,14 PM_EXTTS#0 L36 PM_EXT_TS#_0 GFX_VID_3 B39
Standby Voltage is
PM

13 PM_EXTTS#1 R79 0/04 PM_EXTTS#1_R J36 E36 DFGT_VR_EN T161 SDVO/PCIE/LVDS not
PM_EXT_TS#_1 GFX_VR_EN
23,44 DELAY_VR_PWRGOOD AW49 PWROK not finalized implement
C R159 PLTRST_MCH#
100/04 AV20 C
20,22 PLT_RST-R# RSTIN# yet(TBD), 1.05V for 16 lanes NC
3,21 PM_THRMTRIP# R90 PM_THRMTRIP#_GMCH N20
*0/04
R68 0/04
PM_DPRSLPVR_GMCH G36 THERMTRIP# Graphic Voltage DREFSSCLK R69 *EV@4.7K/04
23,44 DPRSLPVR DPRSLPVR +1.25V
range(VCC_AXG) is DREFSSCLK# R76 *EV@4.7K/04
AM49 <FAE>
CL_CLK CL_CLK0 23 between 0.9975V(min.)
CL_DATA AK50 CL_DATA0 23 If no use DREFCLK PU and
GMCH pwrok is 3.3v *PADT202 TP_NC1 BJ51 AT43 ECPWROK 16,23,37,48 and 1.1025V(max.). DREFCLK# PD
TP_NC2 NC_1 CL_PWROK
ME

tolerant *PADT204 BK51 NC_2 CL_RST# AN49 CL_RST#0 23,39 Vgfx max at 1.1025V @ IV&EV Dis/Enable setting
*PADT208 TP_NC3 BK50 AM50
TP_NC4 NC_3 CL_VREF MCH_CLVREF 8A (estimated)
*PADT209 BL50 NC_4
*PADT210 TP_NC5 BL49 DREFCLK R59 *EV@4.7K/04 +1.25V
TP_NC6 NC_5 DREFCLK# R57 *EV@4.7K/04
*PADT206 BL3 NC_6
*PADT207 TP_NC7 BL2 NC_7
only resever AT3/5 not
NC

*PADT203 TP_NC8 BK1 <design guide>


TP_NC9 NC_8 T22
support IAMT,but design
*PADT199 BJ1 NC_9 SDVO_CTRL_CLK H35 If no use
*PADT164 TP_NC10 E1 K36 T24 line suggest to connection DREFCLK PU and
TP_NC11 NC_10 SDVO_CTRL_DATA
MISC

*PADT160 A5 NC_11 CLK_REQ# G39 CLK_3GPLLREQ# 2 these pin ,do not NC DREFCLK# PD
*PADT166 TP_NC12 C51 G40
NC_12 ICH_SYNC# MCH_ICH_SYNC# 23
*PADT163 TP_NC13 B50
TP_NC14 NC_13 <check list> <check list>
*PADT162 A50 NC_14
*PADT156 TP_NC15 A49 A37 For EV@ For IV@
TP_NC16 NC_15 TEST_1 CLKREQ# ( MCH drives CLK_REQ#
*PADT205 BK2 NC_16 TEST_2 R32 Connect to GND Connect to 150ohm
to control the PCI-E diff clk CRT R/G/B CRT R/G/B
2

CRESTLINE_1p0
R101 R507 input itself ) TV A/B/C TV A/B/C
20K/04 0/04 HSYNC/VSYNC Connect to 39ohm
HSYNC/VSYNC
+1.8VSUS_GMCH
R64 HSYNC11
*EV@39/F/04
1

1
1

R60 VSYNC11
*EV@39/F/04

R178
1K/F/04 +1.25V +1.8VSUS_GMCH
R62 IV@150/F/04 TV_COMP1
SM_RCOMP_VOH
2

D TV_Y/G1 D
R66 IV@150/F/04
1

C215 C209 R586


+3V .01U/25V/04 2.2U/10V/08 1K/F/04 R171 R78 IV@150/F/04 TV_C/R1 SI-1 modified
R179 20/F/04
R27
add 150ohm in
2 10K/04 PM_EXTTS#0 3.01K/F/04
2

1
R28 2 10K/04 PM_EXTTS#1 MCH_CLVREF SMRCOMPP the UMA BOM
2

1
SMRCOMPN R74 IV@150/F/04 CRT_BLUE1
2

SM_RCOMP_VOL
PROJECT : AT3
2

C128 R589 R77 IV@150/F/04 CRT_GREEN1


1

Quanta Computer Inc.


C230 C245 .1U/10V/04 392/F/04
.01U/25V/04 2.2U/10V/08 R172 R65 IV@150/F/04 CRT_RED1
R175 20/F/04
1

1K/F/04
2

Size Document Number Rev


2

Custom Crestline (VGA,DMI) 1A


2

NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 7 of 48
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

A 14 M_A_DQ[63:0] 14 M_B_DQ[63:0] A
U34D
M_A_DQ0 AR43 BB19
SA_DQ_0 SA_BS_0 M_A_BS#0 13,14
M_A_DQ1 AW44 BK19 U34E
SA_DQ_1 SA_BS_1 M_A_BS#1 13,14
M_A_DQ2 BA45 BF29 M_B_DQ0 AP49 AY17
SA_DQ_2 SA_BS_2 M_A_BS#2 13,14 SB_DQ_0 SB_BS_0 M_B_BS#0 13,14
M_A_DQ3 AY46 M_B_DQ1 AR51 BG18
SA_DQ_3 SB_DQ_1 SB_BS_1 M_B_BS#1 13,14
M_A_DQ4 AR41 BL17 M_B_DQ2 AW50 BG36
SA_DQ_4 SA_CAS# M_A_CAS# 13,14 SB_DQ_2 SB_BS_2 M_B_BS#2 13,14
M_A_DQ5 AR45 M_B_DQ3 AW51
SA_DQ_5 M_A_DQM[0..7] 14 SB_DQ_3
M_A_DQ6 AT42 AT45 M_A_DQM0 M_B_DQ4 AN51 BE17
SA_DQ_6 SA_DM_0 SB_DQ_4 SB_CAS# M_B_CAS# 13,14
M_A_DQ7 AW47 BD44 M_A_DQM1 M_B_DQ5 AN50
SA_DQ_7 SA_DM_1 SB_DQ_5 M_B_DQM[0..7] 14
M_A_DQ8 BB45 BD42 M_A_DQM2 M_B_DQ6 AV50 AR50 M_B_DQM0
M_A_DQ9 SA_DQ_8 SA_DM_2 M_A_DQM3 M_B_DQ7 SB_DQ_6 SB_DM_0 M_B_DQM1
BF48 SA_DQ_9 SA_DM_3 AW38 AV49 SB_DQ_7 SB_DM_1 BD49
M_A_DQ10 BG47 AW13 M_A_DQM4 M_B_DQ8 BA50 BK45 M_B_DQM2
M_A_DQ11 SA_DQ_10 SA_DM_4 M_A_DQM5 M_B_DQ9 SB_DQ_8 SB_DM_2 M_B_DQM3
BJ45 SA_DQ_11 SA_DM_5 BG8 BB50 SB_DQ_9 SB_DM_3 BL39
M_A_DQ12 BB47 AY5 M_A_DQM6 M_B_DQ10 BA49 BH12 M_B_DQM4
M_A_DQ13 SA_DQ_12 SA_DM_6 M_A_DQM7 M_B_DQ11 SB_DQ_10 SB_DM_4 M_B_DQM5
BG50 SA_DQ_13 SA_DM_7 AN6 BE50 SB_DQ_11 SB_DM_5 BJ7
M_A_DQ14 BH49 M_B_DQ12 BA51 BF3 M_B_DQM6
SA_DQ_14 M_A_DQS[7:0] 14 SB_DQ_12 SB_DM_6
M_A_DQ15 BE45 AT46 M_A_DQS0 M_B_DQ13 AY49 AW2 M_B_DQM7
M_A_DQ16 SA_DQ_15 SA_DQS_0 M_A_DQS1 M_B_DQ14 SB_DQ_13 SB_DM_7

A
AW43 SA_DQ_16 SA_DQS_1 BE48 BF50 SB_DQ_14 M_B_DQS[7:0] 14
M_A_DQ17 BE44 BB43 M_A_DQS2 M_B_DQ15 BF49 AT50 M_B_DQS0
M_A_DQ18 SA_DQ_17 SA_DQS_2 M_A_DQS3 M_B_DQ16 SB_DQ_15 SB_DQS_0 M_B_DQS1
BG42 SA_DQ_18 SA_DQS_3 BC37 BJ50 SB_DQ_16 SB_DQS_1 BD50
M_A_DQ19 M_A_DQS4 M_B_DQ17 M_B_DQS2

B
BE40 SA_DQ_19 SA_DQS_4 BB16 BJ44 SB_DQ_17 SB_DQS_2 BK46
M_A_DQ20 BF44 BH6 M_A_DQS5 M_B_DQ18 BJ43 BK39 M_B_DQS3
SA_DQ_20 SA_DQS_5 SB_DQ_18 SB_DQS_3

MEMORY
M_A_DQ21 BH45 BB2 M_A_DQS6 M_B_DQ19 BL43 BJ12 M_B_DQS4
M_A_DQ22 SA_DQ_21 SA_DQS_6 M_A_DQS7 M_B_DQ20 SB_DQ_19 SB_DQS_4 M_B_DQS5
BG40 SA_DQ_22 SA_DQS_7 AP3 M_A_DQS#[7:0] 14 BK47 SB_DQ_20 SB_DQS_5 BL7
M_A_DQ23 BF40 AT47 M_A_DQS#0 M_B_DQ21 BK49 BE2 M_B_DQS6
SA_DQ_23 SA_DQS#_0 SB_DQ_21 SB_DQS_6

MEMORY
M_A_DQ24 AR40 BD47 M_A_DQS#1 M_B_DQ22 BK43 AV2 M_B_DQS7
SA_DQ_24 SA_DQS#_1 SB_DQ_22 SB_DQS_7 M_B_DQS#[7:0] 14
M_A_DQ25 AW40 BC41 M_A_DQS#2 M_B_DQ23 BK42 AU50 M_B_DQS#0
M_A_DQ26 SA_DQ_25 SA_DQS#_2 M_A_DQS#3 M_B_DQ24 SB_DQ_23 SB_DQS#_0 M_B_DQS#1
AT39 SA_DQ_26 SA_DQS#_3 BA37 BJ41 SB_DQ_24 SB_DQS#_1 BC50
M_A_DQ27 AW36 BA16 M_A_DQS#4 M_B_DQ25 BL41 BL45 M_B_DQS#2
M_A_DQ28 SA_DQ_27 SA_DQS#_4 M_A_DQS#5 M_B_DQ26 SB_DQ_25 SB_DQS#_2 M_B_DQS#3
B AW41 SA_DQ_28 SA_DQS#_5 BH7 BJ37 SB_DQ_26 SB_DQS#_3 BK38 B
M_A_DQ29 AY41 BC1 M_A_DQS#6 M_B_DQ27 BJ36 BK12 M_B_DQS#4
M_A_DQ30 SA_DQ_29 SA_DQS#_6 M_A_DQS#7 M_B_DQ28 SB_DQ_27 SB_DQS#_4 M_B_DQS#5
AV38 SA_DQ_30 SA_DQS#_7 AP2 BK41 SB_DQ_28 SB_DQS#_5 BK7
M_A_DQ31 AT38 M_B_DQ29 BJ40 BF2 M_B_DQS#6
SA_DQ_31 M_A_A[13:0] 13,14 SB_DQ_29 SB_DQS#_6
M_A_DQ32 AV13 BJ19 M_A_A0 M_B_DQ30 BL35 AV3 M_B_DQS#7
M_A_DQ33 SA_DQ_32 SA_MA_0 M_A_A1 M_B_DQ31 SB_DQ_30 SB_DQS#_7
AT13 SA_DQ_33 SA_MA_1 BD20 BK37 SB_DQ_31 M_B_A[13:0] 13,14
SYSTEM

M_A_DQ34 AW11 BK27 M_A_A2 M_B_DQ32 BK13 BC18 M_B_A0


M_A_DQ35 SA_DQ_34 SA_MA_2 M_A_A3 M_B_DQ33 SB_DQ_32 SB_MA_0 M_B_A1
AV11 SA_DQ_35 SA_MA_3 BH28 BE11 SB_DQ_33 SB_MA_1 BG28
M_A_DQ36 AU15 BL24 M_A_A4 M_B_DQ34 BK11 BG25 M_B_A2
SA_DQ_36 SA_MA_4 SB_DQ_34 SB_MA_2

SYSTEM
M_A_DQ37 AT11 BK28 M_A_A5 M_B_DQ35 BC11 AW17 M_B_A3
M_A_DQ38 SA_DQ_37 SA_MA_5 M_A_A6 M_B_DQ36 SB_DQ_35 SB_MA_3 M_B_A4
BA13 SA_DQ_38 SA_MA_6 BJ27 BC13 SB_DQ_36 SB_MA_4 BF25
M_A_DQ39 BA11 BJ25 M_A_A7 M_B_DQ37 BE12 BE25 M_B_A5
M_A_DQ40 SA_DQ_39 SA_MA_7 M_A_A8 M_B_DQ38 SB_DQ_37 SB_MA_5 M_B_A6
BE10 SA_DQ_40 SA_MA_8 BL28 BC12 SB_DQ_38 SB_MA_6 BA29
M_A_DQ41 BD10 BA28 M_A_A9 M_B_DQ39 BG12 BC28 M_B_A7
M_A_DQ42 SA_DQ_41 SA_MA_9 M_A_A10 M_B_DQ40 SB_DQ_39 SB_MA_7 M_B_A8
BD8 SA_DQ_42 SA_MA_10 BC19 BJ10 SB_DQ_40 SB_MA_8 AY28
M_A_DQ43 AY9 BE28 M_A_A11 M_B_DQ41 BL9 BD37 M_B_A9
M_A_DQ44 SA_DQ_43 SA_MA_11 M_A_A12 M_B_DQ42 SB_DQ_41 SB_MA_9 M_B_A10
BG10 SA_DQ_44 SA_MA_12 BG30 BK5 SB_DQ_42 SB_MA_10 BG17
M_A_DQ45 AW9 BJ16 M_A_A13 M_B_DQ43 BL5 BE37 M_B_A11
M_A_DQ46 SA_DQ_45 SA_MA_13 M_B_DQ44 SB_DQ_43 SB_MA_11 M_B_A12
BD7 BK9 BA39
DDR

M_A_DQ47 SA_DQ_46 M_B_DQ45 SB_DQ_44 SB_MA_12 M_B_A13


BB9 SA_DQ_47 BK10 SB_DQ_45 SB_MA_13 BG13
M_A_DQ48 BB5 BE18 M_B_DQ46 BJ8
SA_DQ_48 SA_RAS# M_A_RAS# 13,14 SB_DQ_46
M_A_DQ49 AY7 AY20 TP_SA_RCVEN# M_B_DQ47 BJ6 AV16

DDR
SA_DQ_49 SA_RCVEN# SB_DQ_47 SB_RAS# M_B_RAS# 13,14
M_A_DQ50 AT5 T68 M_B_DQ48 BF4 AY18 TP_SB_RCVEN# T74 *PAD
M_A_DQ51 SA_DQ_50 M_B_DQ49 SB_DQ_48 SB_RCVEN#
AT7 SA_DQ_51 SA_WE# BA19 M_A_WE# 13,14 BH5 SB_DQ_49
M_A_DQ52 AY6 M_B_DQ50 BG1 BC17
SA_DQ_52 SB_DQ_50 SB_WE# M_B_WE# 13,14
M_A_DQ53 BB7 M_B_DQ51 BC2
M_A_DQ54 SA_DQ_53 M_B_DQ52 SB_DQ_51
AR5 SA_DQ_54 BK3 SB_DQ_52
M_A_DQ55 AR8 M_B_DQ53 BE4
M_A_DQ56 SA_DQ_55 M_B_DQ54 SB_DQ_53
AR9 SA_DQ_56 BD3 SB_DQ_54
M_A_DQ57 AN3 M_B_DQ55 BJ2
C
M_A_DQ58 SA_DQ_57 M_B_DQ56 SB_DQ_55 C
AM8 SA_DQ_58 BA3 SB_DQ_56
M_A_DQ59 AN10 M_B_DQ57 BB3
M_A_DQ60 SA_DQ_59 M_B_DQ58 SB_DQ_57
AT9 SA_DQ_60 AR1 SB_DQ_58
M_A_DQ61 AN9 M_B_DQ59 AT3
M_A_DQ62 SA_DQ_61 M_B_DQ60 SB_DQ_59
AM9 SA_DQ_62 AY2 SB_DQ_60
M_A_DQ63 AN11 M_B_DQ61 AY3
SA_DQ_63 M_B_DQ62 SB_DQ_61
AU2 SB_DQ_62
CRESTLINE_1p0 M_B_DQ63 AT2 SB_DQ_63
CRESTLINE_1p0

D D

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom Crestline (DDR) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 8 of 48
1 2 3 4 5 6 7 8
5 4 3 2 1

+1.05V
+3V
U34G U34F
R500 10/04 D32
AT35 VCC_1 1 2 +VCC_GMCH_L 1 2 AB33 VCC_NCTF_1
AT34 VCC_2 VCC_AXG_NCTF_1 T17 AB36 VCC_NCTF_2
AH28 T18 CH751H-40PT AB37
VCC_3 VCC_AXG_NCTF_2 VCC_NCTF_3
AC32 VCC_5 VCC_AXG_NCTF_3 T19 Ivcc (External GFX 1.310 A, AC33 VCC_NCTF_4 VSS_NCTF_1 T27
AC31 VCC_4 VCC_AXG_NCTF_4 T21 integrate 1.572 A) AC35 VCC_NCTF_5 VSS_NCTF_2 T37
AK32 T22 AC36 U24

VCC CORE
VCC_6 VCC_AXG_NCTF_5 VCC_NCTF_6 VSS_NCTF_3
AJ31 VCC_7 VCC_AXG_NCTF_6 T23 AD35 VCC_NCTF_7 VSS_NCTF_4 U28
AJ28 T25 +1.05V AD36 V31
VCC_8 VCC_AXG_NCTF_7 VCC_NCTF_8 VSS_NCTF_5
AH32 VCC_9 VCC_AXG_NCTF_8 U15 AF33 VCC_NCTF_9 VSS_NCTF_6 V35
D
AH31 VCC_10 VCC_AXG_NCTF_9 U16 AF36 VCC_NCTF_10 VSS_NCTF_7 AA19 D
AH29 VCC_11 VCC_AXG_NCTF_10 U17 AH33 VCC_NCTF_11 VSS_NCTF_8 AB17
AF32 VCC_12 VCC_AXG_NCTF_11 U19 AH35 VCC_NCTF_12 VSS_NCTF_9 AB35

VSS NCTF
VCC_AXG_NCTF_12 U20 AH36 VCC_NCTF_13 VSS_NCTF_10 AD19

1
U21 + AH37 AD37
VCC_AXG_NCTF_13 C670 C663 C115 C90 C106 VCC_NCTF_14 VSS_NCTF_11
VCC_AXG_NCTF_14 U23 AJ33 VCC_NCTF_15 VSS_NCTF_12 AF17
R30 U26 Layout Note: 220U/2.5V 22U/4V/08 0.22U/10V/06 0.22U/10V/06 .1U/10V/04 AJ35 AF35
VCC_13 VCC_AXG_NCTF_15 VCC_NCTF_16 VSS_NCTF_13

2
V16 AK33 AK17
VCC_AXG_NCTF_16
V17
370 mils from edge. AK35
VCC_NCTF_17 VSS_NCTF_14
AM17
VCC_AXG_NCTF_17 VCC_NCTF_18 VSS_NCTF_15
IVCCSM supply VCC_AXG_NCTF_18 V19 Layout Note: AK36 VCC_NCTF_19 VSS_NCTF_16 AM24
V20 AK37 AP26
current 1 VCC_AXG_NCTF_19
V21
Inside GMCH cavity. AD33
VCC_NCTF_20 VSS_NCTF_17
AP28
VCC_AXG_NCTF_20 VCC_NCTF_21 VSS_NCTF_18
channel VCC_AXG_NCTF_21 V23 AJ36 VCC_NCTF_22 VSS_NCTF_19 AR15
VCC_AXG_NCTF_22 V24 AM35 VCC_NCTF_23 VSS_NCTF_20 AR19
1.615A 2

VCC NCTF
Y15 SI-1 modify ( AL33 AR28
channel +1.8VSUS_GMCH POWER VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
Y16
Y17
Ivcc_AXG Graphics core supply
current 7.7A
+VGFX_CORE_INT +1.05V
remove R73,R11 AL35
AA33
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VSS_NCTF_21

3.318A AU32 Y19 --not need ) AA35


VCC_SM_1 VCC_AXG_NCTF_26 VCC_NCTF_27
AU33 VCC_SM_2 VCC_AXG_NCTF_27 Y20 AA36 VCC_NCTF_28
AU35 VCC_SM_3 VCC_AXG_NCTF_28 Y21 AP35 VCC_NCTF_29

1
AV33 VCC_SM_4 VCC_AXG_NCTF_29 Y23 AP36 VCC_NCTF_30
AW33 Y24 + C91 + C108 AR35
VCC_SM_5 VCC_AXG_NCTF_30 *330U/6.3V *330U/6.3V VCC_NCTF_31
AW35 VCC_SM_6 VCC_AXG_NCTF_31 Y26 AR36 VCC_NCTF_32
AY35 VCC_SM_7 VCC_AXG_NCTF_32 Y28 Y32 VCC_NCTF_33

2
BA32 Y29 Y33
BA33
BA35
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
AA16
AA17 SI-2 modified --remove Layout Note:
Y35
Y36
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
POWER
BB33 AB16 Y37 A3
BC32
VCC_SM_11 VCC_AXG_NCTF_36
AB19
C91&C108 370 mils from edge. T30
VCC_NCTF_37 VSS_SCB1
B2

VSS SCB
VCC_SM_12 VCC_AXG_NCTF_37 VCC_NCTF_38 VSS_SCB2
BC33 VCC_SM_13 VCC_AXG_NCTF_38 AC16 T34 VCC_NCTF_39 VSS_SCB3 C1
C BC35 VCC_SM_14 VCC_AXG_NCTF_39 AC17 T35 VCC_NCTF_40 VSS_SCB4 BL1 C
BD32 VCC_SM_15 VCC_AXG_NCTF_40 AC19 Layout Note: U29 VCC_NCTF_41 VSS_SCB5 BL51
BD35 AD15 U31 A51
BE32
VCC_SM_16 VCC_AXG_NCTF_41
AD16
Inside GMCH cavity for VCC_AXG. U32
VCC_NCTF_42 VSS_SCB6
VCC_SM_17 VCC_AXG_NCTF_42 VCC_NCTF_43
BE33 VCC_SM_18 VCC_AXG_NCTF_43 AD17 U33 VCC_NCTF_44
BE35 VCC_SM_19 VCC_AXG_NCTF_44 AF16 U35 VCC_NCTF_45
VCC GFX NCTF

BF33 AF19 U36


VCC SM

VCC_SM_20 VCC_AXG_NCTF_45 VCC_NCTF_46

1
BF34 VCC_SM_21 VCC_AXG_NCTF_46 AH15 V32 VCC_NCTF_47
BG32 AH16 C118 C110 C116 C79 C68 C73 V33
VCC_SM_22 VCC_AXG_NCTF_47 .1U/10V/04 .1U/10V/04 0.47U/10V/06 1U/10V/06 10U/6.3V/08 22U/4V/08 VCC_NCTF_48
BG33 VCC_SM_23 VCC_AXG_NCTF_48 AH17 for IAMT power if not V36 VCC_NCTF_49 +1.05V
2

2
BG35 VCC_SM_24 VCC_AXG_NCTF_49 AH19 support need to V37 VCC_NCTF_50
BH32 VCC_SM_25 VCC_AXG_NCTF_50 AJ16
BH34 AJ17 connection to S0 power AT33
VCC_SM_26 VCC_AXG_NCTF_51 VCC_AXM_1
BH35 AJ19 AT31

VCC AXM
VCC_SM_27 VCC_AXG_NCTF_52 VCC_AXM_2
BJ32 VCC_SM_28 VCC_AXG_NCTF_53 AK16 VCC_AXM_3 AK29
BJ33 VCC_SM_29 VCC_AXG_NCTF_54 AK19 VCC_AXM_4 AK24
BJ34 VCC_SM_30 VCC_AXG_NCTF_55 AL16 Layout Note: VCC_AXM_5 AK23
BK32 AL17 +1.05V AL24 AJ26
BK33
VCC_SM_31 VCC_AXG_NCTF_56
AL19 GMCH 1.05V current(A) Remark Inside GMCH AL26
VCC_AXM_NCTF_1 VCC_AXM_6
AJ23
VCC_SM_32 VCC_AXG_NCTF_57 VCC_AXM_NCTF_2 VCC_AXM_7
BK34 VCC_SM_33 VCC_AXG_NCTF_58 AL20 cavity. AL28 VCC_AXM_NCTF_3
BK35 VCC_SM_34 VCC_AXG_NCTF_59 AL21 ( 1.3A for AM26 VCC_AXM_NCTF_4
BL33 VCC_SM_35 VCC_AXG_NCTF_60 AL23 VCC Core 1.573 external Ivcc_AXM AM28 VCC_AXM_NCTF_5

VCC AXM NCTF


AU30 VCC_SM_36 VCC_AXG_NCTF_61 AM15 AM29 VCC_AXM_NCTF_6
AM16 GFX
for )
integrated Controller C105 C94 C113 AM31
VCC_AXG_NCTF_62 .1U/10V/04 .1U/10V/04 .1U/10V/04 VCC_AXM_NCTF_7
VCC_AXG_NCTF_63 AM19 VCC_AXG 7.7 Gfx supply AM32 VCC_AXM_NCTF_8
+VGFX_CORE_INT

2
VCC_AXG_NCTF_64 AM20 AM33 VCC_AXM_NCTF_9
AM21 current AP29
VCC_AXG_NCTF_65 VCC_AXM_NCTF_10
R20 VCC_AXG_1 VCC_AXG_NCTF_66 AM23 VCC_AXD 0.2 540mA AP31 VCC_AXM_NCTF_11
T14 VCC_AXG_2 VCC_AXG_NCTF_67 AP15 AP32 VCC_AXM_NCTF_12
B
W13 VCC_AXG_3 VCC_AXG_NCTF_68 AP16 AP33 VCC_AXM_NCTF_13 B
W14 VCC_AXG_4 VCC_AXG_NCTF_69 AP17 VTT 0.85 FSB VCCP AL29 VCC_AXM_NCTF_14
Y12 VCC_AXG_5 VCC_AXG_NCTF_70 AP19 AL31 VCC_AXM_NCTF_15

1
AA20 VCC_AXG_6 VCC_AXG_NCTF_71 AP20 AL32 VCC_AXM_NCTF_16
AA23 AP21 VCC_PEG 1.2 for PCIEG C124 C123 C99 AR31
VCC_AXG_7 VCC_AXG_NCTF_72 22U/4V/08 0.22U/10V/06 0.22U/10V/06 VCC_AXM_NCTF_17
AA26 VCC_AXG_8 VCC_AXG_NCTF_73 AP23 AR32 VCC_AXM_NCTF_18

2
AA28 VCC_AXG_9 VCC_AXG_NCTF_74 AP24 AR33 VCC_AXM_NCTF_19
AB21 VCC_AXG_10 VCC_AXG_NCTF_75 AR20 VCC_AXM 0.54 for IAMT
AB24 VCC_AXG_11 VCC_AXG_NCTF_76 AR21 function
AB29 VCC_AXG_12 VCC_AXG_NCTF_77 AR23 Layout Note:
AC20 AR24
AC21
VCC_AXG_13 VCC_AXG_NCTF_78
AR26 VCCR_RX_DMI 0.25 DMI Place close to GMCH edge. CRESTLINE_1p0
VCC_AXG_14 VCC_AXG_NCTF_79
VCC GFX

AC23 VCC_AXG_15 VCC_AXG_NCTF_80 V26


AC24 VCC_AXG_16 VCC_AXG_NCTF_81 V28
AC26 VCC_AXG_17 VCC_AXG_NCTF_82 V29 SUM 12.313
AC28 Y31 1.8VSUS +1.8VSUS_GMCH
VCC_AXG_18 VCC_AXG_NCTF_83
AC29 VCC_AXG_19
AD20 VCC_AXG_20
AD23 VCC_AXG_21

1
AD24 AW45 VCCSM_LF1
VCC SM LF

VCC_AXG_22 VCC_SM_LF1

1
AD28 BC39 VCCSM_LF2 +
VCC_AXG_23 VCC_SM_LF2

1
AF21 BE39 VCCSM_LF3 C744 C265 C266
VCC_AXG_24 VCC_SM_LF3 VCCSM_LF4 C267 330U/6.3V 22U/4V/08 22U/4V/08
AF26 VCC_AXG_25 VCC_SM_LF4 BD17
VCCSM_LF5 .1U/10V/04

2
AA31 VCC_AXG_26 VCC_SM_LF5 BD4
VCCSM_LF6

2
AH20 VCC_AXG_27 VCC_SM_LF6 AW8
AH21 AT6 VCCSM_LF7
VCC_AXG_28 VCC_SM_LF7
AH23 VCC_AXG_29
1

AH24 VCC_AXG_30 Layout Note:


AH26 C129 C172 C222 C174 C212 C155 C145 Layout Note:
AD31
VCC_AXG_31 .1U/10V/04 .1U/10V/04 0.22U/10V/06 0.22U/10V/06 0.47U/10V/06 1U/10V/06 1U/10V/06 Place on the edge.
VCC_AXG_32 Place C901 where LVDS
2

A AJ20 VCC_AXG_33
A
AN14 VCC_AXG_34
and DDR2 taps.

PROJECT : AT3
CRESTLINE_1p0 Quanta Computer Inc.
Size Document Number Rev
Custom Crestline (VCC, NCTF) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 9 of 48
5 4 3 2 1
5 4 3 2 1

LVDS Disable/Enable guideline


External VGA with EV@part,Internal VGA with IV@ part
IV&EV Dis/Enable setting
If SDVO Disable If LVDS
CRT/TV Disable/Enable guideline Signal LVDS Disable enable
+3V_VCCSYNC External VGA with EV@part,Internal VGA with IV@ part
VCCD_LVDS GND 1.8V
+3V R24 IV@0/06 Ball Enable Disable Ball Enable Disable
VCCA_LVDS GND 1.8V
C69 R58
<FAE> VCCA_CRT_DAC 3.3V GND VCCA_TVC_DAC 3.3V GND VCC_TX_LVDS GND 1.8V
INT VGA disable IV@.1U/04 *EV@0/04
VCCSYNC connect
to GND VCCD_CRT 1.5V GND VCCD_TVDAC 1.5V 1.5V

VCCD_QDAC 1.5V GND VCCA_DAC_BG 3.3V GND


D D

VCCA_TVA_DAC 3.3V GND VSS_DAC_BG GND GND


L62 R499 0/04
+3V 1 2 +VCCA_CRTDAC 1 2 +3V_VCCA_CRT_DAC
IV@BLM18PG181SN1/06 VCCA_TVB_DAC 3.3V GND VCCSYNC 3.3V GND
3 1

1
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC R515 +1.05V
C652 C657
IV@.1U/04 *IV@22N *EV@0/04

2
+3V_VCC_HV

2
SI-1 modify U34H D1
( NET name CH751H-40HPT_NC 40 mil
+3V_TV_DAC R23 IV@0.03/F R501 0/04 J32 U13
1 +VCC_TVBG wrong ) VCCSYNC VTT_1 wide

1
2 2 1 VTT_2 U12
A33 U11 Ivcc_VTT FSB +3V_VCC_HV_L
VCCA_CRT_DAC_1 VTT_3

1
1 3 R512 B33 U9
VCCA_CRT_DAC_2 VTT_4 supply

1
U8 C76 C686

CRT
VTT_5

1
C653 C660 *EV@0/04 U7 2.2U/6.3V/06 4.7U/10V/08current
IV@.1U/04 *IV@22N VTT_6 +3V_VCC_HV

2
A30 VCCA_DAC_BG VTT_7 U5
0.85A R40

2
VTT_8 U3
B32 U2 10/04
VSSA_DAC_BG VTT_9 +1.05V
VTT_10 U1
Place on the edge.

2
VTT_11 T13
+1.25V_VCCA_DPLLA B49 T11 R505 0/04
VCCA_DPLLA VTT_12

VTT
VTT_13 T10
+1.25V_VCCA_DPLLB H49 T9
VCCA_DPLLB VTT_14
T7

PLL
VTT_15

1
FB_120ohm+-25%_100mHz +1.25V_VCCA_HPLL AL2 T6
+1.25V +1.8VSUS_VCC_TX_LVDS VCCA_HPLL VTT_16 C78 C691 + C24 +3V
+1.25V _200mA_0.2ohm DC 80mA VTT_17 T5
L6 +1.25V_VCCA_MPLL AM2 T3 0.47U/6.3V/04 4.7U/10V/08 220U/4V
+1.25V_VCCA_DPLLA VCCA_MPLL VTT_18

2
50mA 2 1 VTT_19 T2
L70 10uH/100MA/08

2
IV&EV Dis/Enable setting R3

A LVDS
VTT_20

1
2 1 +1.25V_VCCA_HPLL +1.8VSUS_VCC_TX_LVDS A41 R2
VCCA_LVDS VTT_21

1
BLM11A121S/06 + C28 C38 C668 +1.25V +1.25V
10uH+-20%_100mA 10mA VTT_22 R1
1

470U/4V B41 Place on the edge.


VSSA_LVDS
1

C714 .1U/10V/04 R509 IV@1000P/04


C715 .1U/10V/04 +1.25V_AXD 2 +VCC_AXD_R R184 0/08

2
VCC_AXD_1 AT23 1
22U/10V/12 *EV@0/04 R29
2

VCC_AXD_2 AU28
+3V L26 0/04 Reserved
2

80mA K50 VCCA_PEG_BG VCC_AXD_3 AU24 L81 pad for 0/08

1
C L66 C
AT29

A PEG
VCC_AXD_4 inductor.

AXD
L71 150mA 2 1 +1.25V_VCCA_DPLLB K49 AT25 C137 C258
BLM11A121S/06 10uH/100MA/08 VSSA_PEG_BG VCC_AXD_5 1U/10V/06 22U/10V/12 +1.25V_VCC_AXF
VCC_AXD_6 AT30 Place caps close

1
+1.25V_VCCA_MPLL

2
2 1
to VCC_AXD.

1
0.1Caps should be + C669 C680 +1.25V_VCCD_PEG_PLL U51 AR29
VCCA_PEG_PLL VCC_AXD_NCTF

1
R580 470U/4V C58 100mA
0.5/F/06 placed 200 mils .1U/10V/04 .1U/10V/04 C30 C31
1

+VCCA_MPLL_L with in its pins. Ivcca_PEG_BG +1.25V_VCC_AXF 1U/10V/06 10U/6.3V/06

2
1 2 AW18 VCCA_SM_1 VCC_AXF_1 B23
C718

2
AV19 B21 Ivcc_DMI supply

AXF
+VCCA_MPLL_L .1U/10V/04
supply current
100mA
AU19
VCCA_SM_2
VCCA_SM_3 POWER VCC_AXF_2
VCC_AXF_3 A21 +1.25V_VCC_DMI
current 100mA
2

AU18 VCCA_SM_4
1

AU17 AJ50 +1.25V_VCC_DMI R583 0/08 +1.25V


C724 VCCA_SM_5 VCC_DMI
Place caps close

A SM

1
22U/10V/12 +1.25V R181 0/08 +1.25V_VCCA_SM AT22 VCCA_SM_7 +1.8VSUS_VCC_SM_CK C725 to VCC_AXF
2

AT21 BK24

SM CK
VCCA_SM_8 VCC_SM_CK_1
1

AT19 BK23 200mA .1U/10V/04


VCCA_SM_9 VCC_SM_CK_2

1
+ C242 C125 C119 C120 C150

2
AT18 VCCA_SM_10 VCC_SM_CK_3 BJ24
100U/6.3V 4.7U/6.3V/06 22U/4V/08 22U/4V/08 1U/10V/06 AT17 BJ23
VCCA_SM_11 VCC_SM_CK_4 +1.8VSUS_VCC_TX_LVDS +1.8VSUS_GMCH
AR17 VCCA_SM_NCTF_1
2

2
AR16 VCCA_SM_NCTF_2 100mA
L64 IV@1UH/08
A43 +1.8VSUS_VCC_TX_LVDS 2 1

A CK
VCC_TX_LVDS
BC29 VCCA_SM_CK_1

1
+1.25V R177 0/06 +1.25V_VCCA_SM_CK BB29 +3V_VCC_HV 1uH+-20%_300mA
VCCA_SM_CK_2

1
C40 R508 +
+VCC_TVDACA_R VCC_HV_1 *EV@0/04 C664 C29
C25 B40

HV
VCCA_TVA_DAC_1 VCC_HV_2
1

1
C173 C146 C156 C189 B25 IV@1000P/04 IV@220U
VCCA_TVA_DAC_2

1
22U/4V/08 1U/10V/06 1U/10V/06 .1U/10V/04 +VCC_TVDACB_R

2
C27 VCCA_TVB_DAC_1 IV&EV Dis/Enable setting
B27 AD51 C667

TV
+VCC_TVDACC_R VCCA_TVB_DAC_2 VCC_PEG_1 .1U/10V/04
2

2
B28 VCCA_TVC_DAC_1 VCC_PEG_2 W50
+VCC_PEG +1.05V

2
A28 VCCA_TVC_DAC_2 VCC_PEG_3 W51

PEG
+1.5V_VCCD_TVDAC V49 L8 Ivcc_PEG

D TV/CRT
+1.5V +1.5V_VCCD_TVDAC R89 *EV@0/04 VCC_PEG_4
V50
R50 IV@0/04 R44 IV@0/06 +1.5V_VCCD_CRT M32
VCC_PEG_5 supply current
VCCD_CRT

1
1 2 +1.5V_VCCD_TVDAC L29 BLM21PG220SN1D/08 1.2A
VCCD_TVDAC

1
AH50 +VCC_RXR_DMI +

DMI
VCC_RXR_DMI_1
1

1 3 +VCCQ_TVDAC R826 100/08 +1.5V_VCCD_QDAC N28 AH51 C53 C89 SI-1 modified change
C45 VCCD_QDAC VCC_RXR_DMI_2 220U/4V 10U/6.3V
IV@0.1U/10V/04 C33 +VCCA_MPLL_L

2
+VCCA_MPLL_L AN2 VCCD_HPLL
SI-2 *IV@22nF/3P +VTTLF1 +1.05V
2

A7 Ivcc_RX_DMI

VTTLF
+1.25V_VCCD_PEG_PLL VTTLF1 +VTTLF2
modified 250mA U48 F2
R47 0/04 VCCD_PEG_PLL VTTLF2
AH1 +VTTLF3 L21 supply current

LVDS
VTTLF3
1

B for WW44 1 2 +1.8V_VCCD_LVDS J41 250mA B


C726 C93 VCCD_LVDS_1
request 150mA H42 VCCD_LVDS_2

1
C909 1 3 R43 .1U/10V/04 .1U/10V/04 BLM21PG220SN1D/08
1

1
2

+
C947 IV@1U/06 C34 C43 *EV@0/04 C743 C114
SI-2 add for UMA to *IV@22N IV@.1U/04 CRESTLINE_1p0 *220U/4V 10U/6.3V/06
2

IV@4.7U/10V/06
2

2
fix TV-out noise
FB_180ohm+-25%_ R37 IV@0/06
+1.8VSUS_GMCH
+VTTLF1
100mHz_1500mA_ +VTTLF2
0.09ohm DC C37 C32 R70 +VTTLF3

1
IV@1U/06 IV@10U/08 *EV@0/04 L25 +1.8VSUS_GMCH
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC
C710 C49 C666 1uH/300mA/08
+3V_TV_DAC 0.47U/10V/06 0.47U/10V/06 0.47U/10V/06 +1.8VSUS_VCC_SM_CK 2 1

1
1uH+-20%_300mA
L63 R504 0/04
+3V 1 2 1 2 +VCC_TVDACA_R R173

1
1/F/06
IV@BLM18PG181SN1/06 1 3 C257 C187
1

R514 22U/10V/12 .1U/10V/04 +VCC_SM_CK_L

12
C665 C655 C662

2
IV@10U/4V/08 IV@.1U/04 *IV@22N *EV@0/04 C213
2

10U/6.3V/06
2

+1.25V

2
L65 100mA
1 2 +1.25V_VCCD_PEG_PLL
22nF & 0.1uF for R503 0/04 BLM21PG221SN1D/08
1

1 2 +VCC_TVDACB_R
VCC_TVDACA:C_R should
FB_220ohm+-25%_100MHz
be placed with in 250 1 3
_2A_0.1ohm DC
R524
1

R513 1/F/06
mils from Crestline.
1

C656 C661
IV@.1U/04 *IV@22N *EV@0/04 C85
2

12

.1U/10V/04
2

C679
2

10U/6.3V/06
2

IV&EV Dis/Enable setting


R502 0/04
1 2 +VCC_TVDACC_R
A A
1 3
1

R511
C654 C659
IV@.1U/04 *IV@22N *EV@0/04
2
2

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom Crestline (POWER) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 10 of 48
5 4 3 2 1
5 4 3 2 1

U34I U34J
C46 VSS_199 VSS_287 W11
A13 VSS_1 VSS_100 AW24 C50 VSS_200 VSS_288 W39
A15 VSS_2 VSS_101 AW29 C7 VSS_201 VSS_289 W43
A17 VSS_3 VSS_102 AW32 D13 VSS_202 VSS_290 W47
A24 VSS_4 VSS_103 AW5 D24 VSS_203 VSS_291 W5
AA21 VSS_5 VSS_104 AW7 D3 VSS_204 VSS_292 W7
AA24 VSS_6 VSS_105 AY10 D32 VSS_205 VSS_293 Y13
AA29 VSS_7 VSS_106 AY24 D39 VSS_206 VSS_294 Y2
D
AB20 VSS_8 VSS_107 AY37 D45 VSS_207 VSS_295 Y41 D
AB23 VSS_9 VSS_108 AY42 D49 VSS_208 VSS_296 Y45
AB26 VSS_10 VSS_109 AY43 E10 VSS_209 VSS_297 Y49
AB28 VSS_11 VSS_110 AY45 E16 VSS_210 VSS_298 Y5
AB31 VSS_12 VSS_111 AY47 E24 VSS_211 VSS_299 Y50
AC10 VSS_13 VSS_112 AY50 E28 VSS_212 VSS_300 Y11
AC13 VSS_14 VSS_113 B10 E32 VSS_213 VSS_301 P29
AC3 VSS_15 VSS_114 B20 E47 VSS_214 VSS_302 T29
AC39 VSS_16 VSS_115 B24 F19 VSS_215 VSS_303 T31
AC43 VSS_17 VSS_116 B29 F36 VSS_216 VSS_304 T33
AC47 VSS_18 VSS_117 B30 F4 VSS_217 VSS_305 R28
AD1 VSS_19 VSS_118 B35 F40 VSS_218
AD21 VSS_20 VSS_119 B38 F50 VSS_219
AD26 VSS_21 VSS_120 B43 G1 VSS_220
AD29 VSS_22 VSS_121 B46 G13 VSS_221 VSS_306 AA32
AD3 VSS_23 VSS_122 B5 G16 VSS_222 VSS_307 AB32
AD41 VSS_24 VSS_123 B8 G19 VSS_223 VSS_308 AD32
AD45 VSS_25 VSS_124 BA1 G24 VSS_224 VSS_309 AF28
AD49 VSS_26 VSS_125 BA17 G28 VSS_225 VSS_310 AF29
AD5 VSS_27 VSS_126 BA18 G29 VSS_226 VSS_311 AT27
AD50 VSS_28 VSS_127 BA2 G33 VSS_227 VSS_312 AV25
AD8 VSS_29 VSS_128 BA24 G42 VSS_228 VSS_313 H50
AE10 VSS_30 VSS_129 BB12 G45 VSS_229
AE14 VSS_31 VSS_130 BB25 G48 VSS_230
AE6 VSS_32 VSS_131 BB40 G8 VSS_231
AF20 BB44 H24
AF23
AF24
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
BB49
BB8
H28
H4
VSS_232
VSS_233
VSS_234
AF31 VSS_36 VSS_135 BC16 H45 VSS_235
AG2 VSS_37 VSS_136 BC24 J11 VSS_236
C AG38 VSS_38 VSS_137 BC25 J16 VSS_237
C
AG43 VSS_39 VSS_138 BC36 J2 VSS_238
AG47 VSS_40 VSS_139 BC40 J24 VSS_239
AG50 VSS_41 VSS_140 BC51 J28 VSS_240
AH3 BD13 J33
AH40
AH41
VSS_42
VSS_43
VSS_44
VSS_141
VSS_142
VSS_143
BD2
BD28
J35
J39
VSS_241
VSS_242
VSS_243
VSS
AH7 VSS_45 VSS_144 BD45
AH9 VSS_46 VSS_145 BD48 K12 VSS_245
AJ11 VSS_47 VSS_146 BD5 K47 VSS_246
AJ13 VSS_48 VSS_147 BE1 K8 VSS_247
AJ21 VSS_49 VSS_148 BE19 L1 VSS_248
AJ24 VSS_50 VSS_149 BE23 L17 VSS_249
AJ29 VSS_51 VSS_150 BE30 L20 VSS_250
AJ32 VSS_52 VSS_151 BE42 L24 VSS_251
AJ43 VSS_53 VSS_152 BE51 L28 VSS_252
AJ45 VSS_54 VSS_153 BE8 L3 VSS_253
AJ49 VSS_55 VSS_154 BF12 L33 VSS_254
AK20 VSS_56 VSS_155 BF16 L49 VSS_255
AK21 VSS_57 VSS_156 BF36 M28 VSS_256
AK26 VSS_58 VSS_157 BG19 M42 VSS_257
AK28 VSS_59 VSS_158 BG2 M46 VSS_258
AK31 VSS_60 VSS_159 BG24 M49 VSS_259
AK51 VSS_61 VSS_160 BG29 M5 VSS_260
AL1 VSS_62 VSS_161 BG39 M50 VSS_261
AM11 VSS_63 VSS_162 BG48 M9 VSS_262
AM13 VSS_64 VSS_163 BG5 N11 VSS_263
AM3 VSS_65 VSS_164 BG51 N14 VSS_264
AM4 VSS_66 VSS_165 BH17 N17 VSS_265
B
AM41 VSS_67 VSS_166 BH30 N29 VSS_266 B
AM45 VSS_68 VSS_167 BH44 N32 VSS_267
AN1 VSS_69 VSS_168 BH46 N36 VSS_268
AN38 VSS_70 VSS_169 BH8 N39 VSS_269
AN39 VSS_71 VSS_170 BJ11 N44 VSS_270
AN43 VSS_72 VSS_171 BJ13 N49 VSS_271
AN5 VSS_73 VSS_172 BJ38 N7 VSS_272
AN7 VSS_74 VSS_173 BJ4 P19 VSS_273
AP4 VSS_75 VSS_174 BJ42 P2 VSS_274
AP48 VSS_76 VSS_175 BJ46 P23 VSS_275
AP50 VSS_77 VSS_176 BK15 P3 VSS_276
AR11 VSS_78 VSS_177 BK17 P50 VSS_277
AR2 VSS_79 VSS_178 BK25 R49 VSS_278
AR39 VSS_80 VSS_179 BK29 T39 VSS_279
AR44 VSS_81 VSS_180 BK36 T43 VSS_280
AR47 VSS_82 VSS_181 BK40 T47 VSS_281
AR7 VSS_83 VSS_182 BK44 U41 VSS_282
AT10 VSS_84 VSS_183 BK6 U45 VSS_283
AT14 VSS_85 VSS_184 BK8 U50 VSS_284
AT41 VSS_86 VSS_185 BL11 V2 VSS_285
AT49 VSS_87 VSS_186 BL13 V3 VSS_286
AU1 VSS_88 VSS_187 BL19
AU23 VSS_89 VSS_188 BL22
AU29 BL37 CRESTLINE_1p0
VSS_90 VSS_189
AU3 VSS_91 VSS_190 BL47
AU36 VSS_92 VSS_191 C12
AU49 VSS_93 VSS_192 C16
AU51 VSS_94 VSS_193 C19
AV39 VSS_95 VSS_194 C28
AV48 VSS_96 VSS_195 C29
A AW1 VSS_97 VSS_196 C33 A
AW12 VSS_98 VSS_197 C36
AW16 VSS_99 VSS_198 C41

CRESTLINE_1p0
PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom Crestline (VSS) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 11 of 48
5 4 3 2 1
5 4 3 2 1

Strap table
All strap are sampled with respect to the leading edge of the GMCH Power OK(PWROK) Signal
CFG[17:3] Have internal Pull-up
CFG[18:19] Have internal Pull-down
12
Any CFG signal strapping option not list below should be left NC Pin

Pin Name Strap description Configuration

CFG[2:0] FSB Frequency Select 010 = FSB 800MHz


D 011 = FSB 667MHz D

CFG[4:3] Reserved

CFG5 DMI X2 Select 0 = DMI X2


1 = DMI X4(Default)

CFG6 Reserved

CFG7 CPU Strap 0 = Reserved


1 = Mobile CPU(Default)

CFG8 Low power PCI Express 0 = Normal mode


1 = Low Power mode

CFG9 PCI Express Graphics Lane Reversal 0 = Reverse Lanes


1 = Normal operation(Default)

CFG[11:10] Reserved
C C
CFG[13:12] XOR/ALLZ 00 = Reserved
01 = XOR Mode Enable
10 = All-Z Mode Enabled
11 = Normal operation(Default)

CFG[15:14] Reserved

CFG16 FSB Dynamic ODT 0 = Dynamic ODT disable


1 = Dynamic ODT Enable(Default)

CFG[18:17] Reserved

SDVO_CTRLDATA SDVO Present 0 = No SDVO Card present(Default)


1 = SDVO Card Present

CFG19 DMI Lane Reversal 0 = Normal operation(Default)


1 = Reverse Lanes

CFG20 SDVO/PCIe concurrent 0 = Only SDVO or PCIE x1 is operation(Default)


1 = SDVO and PCIE x1 are operating simultaneously via the PEG port
B B

DMI X2 Select DMI Lane Reversal XOR /ALLz /Clock Un-gating PCI Express Graphics SDVO Present

MCH_CFG_5 Low = DMIX2 MCH_CFG_19 Low = Normal operation(Default) MCH_CFG_12MCH_CFG_13 Configuration MCH_CFG_9 Low = Reverse Lane Strap define at External
High = IDMIX4(Default) High = Reverse Lane High = Normal operation(Default) DVI control page
0 0 Clock gating disable
+3V
7 MCH_CFG_5 7 MCH_CFG_9
0 1 XOR Mode Enable

1 0 ALL-z Mode Enable


R71 R61
R95
*4.02K/F/04 1 1 Normal operation(Default) *4.02K/F/04
*4.02K/F/04

7 MCH_CFG_19

FSB Dynamic ODT SDVO/PCIE Concurrent operation


Low = Only SDVO or PCIE X1 is
MCH_CFG_16 Low = ODT Disable MCH_CFG_20 operational(Default) 7 MCH_CFG_12
High = ODT Enable(Default) High = SDVO andPCIE X1 are operating 7 MCH_CFG_13
simultaneously via the PEG port

A A
7 MCH_CFG_16 +3V R63 R80

*4.02K/F/04 *4.02K/F/04

R81

*4.02K/F/04 R82
PROJECT : AT3
*4.02K/F/04 Quanta Computer Inc.
Size Document Number Rev
Custom 10 -- GMCH STRAP-3(6 of 6) 1A
7 MCH_CFG_20
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 12 of 48
5 4 3 2 1
1 2 3 4 5 6 7 8

DDRII DUAL CHANNEL A,B. 13


A A

DDRII A CHANNEL DDRII B CHANNEL


M_A_A[13..0] M_B_A[13..0]
M_A_A[13..0] 8,14 M_B_A[13..0] 8,14
SMDDR_VTERM 1.8VSUS
SMDDR_VTERM 46 1.8VSUS 7,9,10,14,46
+3V
+3V 2,5,7,9,10,12,14,15,16,17,20,21,22,23,24,25,26,27,28,29,30,32,33,3
SMDDR_VTERM
SMDDR_VTERM

SMDDR_VTERM

C363 C361 C360 C383 C332 C320 C321 C318 C359 C420 C381 C353 C382
C325 C380 C384 C419 C435 C378 C434 C379 C415 C401 C418 C362 C326 .1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04

Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM

B B

RP37 1 2 56X2
8,14 M_B_BS#1
7,14 M_A_ODT0 M_A_ODT0 RP21 1 2 56X2 M_B_A0 3 4
M_A_A13 3 4 M_B_A5 RP27 1 2 56X2
M_A_A8 RP13 1 2 56X2 M_B_A1 3 4
M_A_A5 3 4 M_B_A8 RP26 1 2 56X2
M_A_A3 RP14 1 2 56X2 M_B_A3 3 4 SMDDR_VTERM
M_A_A1 3 4 SMDDR_VTERM
M_B_A4 RP36 1 2 56X2
M_A_CKE1 RP23 1 2 56X2 M_B_A2 3 4
7,14 M_A_CKE1
M_A_A11 3 4 M_B_A12 RP25 1 2 56X2
M_A_A10 RP15 1 2 56X2 M_B_A9 3 4
M_A_BS#0 3 4 M_B_A7 RP33 1 2 56X2
8,14 M_A_BS#0
M_A_A7 RP24 1 2 56X2 M_B_A6 3 4
M_A_A6 3 4 8,14 M_B_BS#2 RP31 1 2 56X2
M_A_A2 RP18 1 2 56X2 3 4 SMDDR_VTERM
7,14 M_B_CKE0
M_A_A4 3 4 SMDDR_VTERM
8,14 M_B_RAS# RP34 1 2 56X2
8,14 M_A_RAS# RP20 1 2 56X2 3 4
7,14 M_B_CS#0
M_A_BS#1 3 4 RP29 1 2 56X2
8,14 M_A_BS#1 8,14 M_B_BS#0
M_A_A9 RP22 1 2 56X2 8,14 M_B_CAS# 3 4
M_A_A12 3 4 M_B_A10 RP28 1 2 56X2
RP16 1 2 56X2 8,14 M_B_WE# 3 4 SMDDR_VTERM
8,14 M_A_WE#
C 3 4 SMDDR_VTERM C
8,14 M_A_CAS#
7,14 SA_MA14 R742 56/04 SI-1 modify
7,14 SB_MA14 R743 56/04
(add
terminater
resistor)

RP19 1 2 56X2
+3V 7,14 M_A_CS#0
M_A_A0 3 4
Uninstall M_B_A13 RP35 1 2 56X2
7,14 M_B_ODT0 3 4
7,14 M_B_ODT1 M_ODT3 RP30 1 2 56X2
7,14 M_B_CS#1 3 4
R270 C437 RP17 1 2 56X2
7,14 M_A_CS#1
*200/04 *.1U/10V/04 M_ODT1 3 4
7,14 M_A_ODT1
U12 RP32 1 2 56X2
7,14 M_B_CKE1
M_B_A11 3 4
1

2,14,39 CGCLK_SMB CGCLK_SMB 8 1 LM86_3V RP12 1 2 56X2


SCLK VCC 7,14 M_A_CKE0
DDR_THERMDA 2 Q13 3 4 SMDDR_VTERM
*PMST3904 8,14 M_A_BS#2
2,14,39 CGDAT_SMB CGDAT_SMB 7 2
SDA DXP
PM_EXTTS#0
3

7,14 PM_EXTTS#0 6 ALERT# DXN 3


D D
7 PM_EXTTS#1 PM_EXTTS#1 R238 *0/04 4 5 DDR_THERMDC
OVERT# GND

*LM86CIMM
PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
B DDRII RES.ARRAY 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 13 of 48
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CGCLK_SMB +3V

14
CGCLK_SMB 2,13,39 +3V 2,5,7,9,10,12,13,15,16,17,20,21,22,23,24,25,26,27,28,29,30,32,33,35,36,37,38,39,40,42,47
CGDAT_SMB 1.8VSUS
CGDAT_SMB 2,13,39 1.8VSUS 7,9,10,46
M_A_CKE[0..1] M_A_CLK0 M_B_CKE[0..1] M_B_CLK0
M_A_CKE[0..1] 7,13 M_A_CLK0 7 M_B_CKE[0..1] 7,13 M_B_CLK0 7
M_A_CS#[0..1] M_A_CLK0# M_A_DQM[0..7] M_B_CS#[0..1] M_B_CLK0#
M_A_CS#[0..1] 7,13 M_A_CLK0# 7 M_A_DQM[0..7] 8 M_B_CS#[0..1] 7,13 M_B_CLK0# 7
M_A_CLK1 M_A_DQ[0..63] M_B_CLK1 M_B_DQM[0..7]
M_A_CLK1 7 M_A_DQ[0..63] 8 M_B_CLK1 7 M_B_DQM[0..7] 8
M_A_RAS# M_A_CLK1# M_A_DQS[0..7] M_B_RAS# M_B_CLK1# M_B_DQ[0..63]
M_A_RAS# 8,13 M_A_CLK1# 7 M_A_DQS[0..7] 8 M_B_RAS# 8,13 M_B_CLK1# 7 M_B_DQ[0..63] 8
M_A_CAS# M_A_BS#[0..2] M_A_DQS#[0..7] M_B_CAS# M_B_BS#[0..2] M_B_DQS[0..7]
M_A_CAS# 8,13 M_A_BS#[0..2] 8,13 M_A_DQS#[0..7] 8 M_B_CAS# 8,13 M_B_BS#[0..2] 8,13 M_B_DQS[0..7] 8
M_A_WE# M_A_ODT[0..1] M_A_A[13..0] M_B_WE# M_B_ODT[0..1] M_B_DQS#[0..7]
M_A_WE# 8,13 M_A_ODT[0..1] 7,13 M_A_A[13..0] 8,13 M_B_WE# 8,13 M_B_ODT[0..1] 7,13 M_B_DQS#[0..7] 8
M_B_A[13..0]
M_B_A[13..0] 8,13

A A
M_B_DQ1 5 123 M_B_DQ36 M_A_DQ1 5 123 M_A_DQ32 1 2 1 2
DQ0 DQ32 DQ0 DQ32 SMDDR_VREF_DIMM VREF VSS_1 SMDDR_VREF_DIMM VREF VSS_1
M_B_DQ4 7 125 M_B_DQ33 M_A_DQ5 7 125 M_A_DQ35 3 3
M_B_DQ2 DQ1 DQ33 M_B_DQ35 M_A_DQ3 DQ1 DQ33 M_A_DQ37 VSS_2 VSS_2
17 DQ2 DQ34 135 17 DQ2 DQ34 135 VSS_3 8 VSS_3 8
M_B_DQ3 19 137 M_B_DQ39 M_A_DQ2 19 137 M_A_DQ38 1.8VSUS 81 9 1.8VSUS 81 9
M_B_DQ5 DQ3 DQ35 M_B_DQ37 M_A_DQ4 DQ3 DQ35 M_A_DQ33 1.8VSUS VDD_1 VSS_4 1.8VSUS VDD_1 VSS_4
4 DQ4 DQ36 124 4 DQ4 DQ36 124 82 VDD_2 VSS_5 12 82 VDD_2 VSS_5 12
M_B_DQ0 6 126 M_B_DQ32 M_A_DQ0 6 126 M_A_DQ36 1.8VSUS 87 15 1.8VSUS 87 15
M_B_DQ7 DQ5 DQ37 M_B_DQ34 M_A_DQ7 DQ5 DQ37 M_A_DQ39 1.8VSUS VDD_3 VSS_6 1.8VSUS VDD_3 VSS_6
14 DQ6 DQ38 134 14 DQ6 DQ38 134 88 VDD_4 VSS_7 18 88 VDD_4 VSS_7 18
M_B_DQ6 16 136 M_B_DQ38 M_A_DQ6 16 136 M_A_DQ34 1.8VSUS 95 21 1.8VSUS 95 21
M_B_DQ13 DQ7 DQ39 M_B_DQ40 M_A_DQ13 DQ7 DQ39 M_A_DQ40 1.8VSUS VDD_5 VSS_8 1.8VSUS VDD_5 VSS_8
23 DQ8 DQ40 141 23 DQ8 DQ40 141 96 VDD_6 VSS_9 24 96 VDD_6 VSS_9 24
M_B_DQ12 25 143 M_B_DQ41 M_A_DQ8 25 143 M_A_DQ41 1.8VSUS 103 27 1.8VSUS 103 27
M_B_DQ10 DQ9 DQ41 M_B_DQ46 M_A_DQ15 DQ9 DQ41 M_A_DQ46 1.8VSUS VDD_7 VSS_10 1.8VSUS VDD_7 VSS_10
35 DQ10 DQ42 151 35 DQ10 DQ42 151 104 VDD_8 VSS_11 28 104 VDD_8 VSS_11 28
M_B_DQ11 37 153 M_B_DQ43 M_A_DQ10 37 153 M_A_DQ42 1.8VSUS 111 33 1.8VSUS 111 33
M_B_DQ8 DQ11 DQ43 M_B_DQ45 M_A_DQ9 DQ11 DQ43 M_A_DQ45 1.8VSUS VDD_9 VSS_12 1.8VSUS VDD_9 VSS_12
20 DQ12 DQ44 140 20 DQ12 DQ44 140 112 VDD_10 VSS_13 34 112 VDD_10 VSS_13 34
M_B_DQ9 22 142 M_B_DQ44 M_A_DQ12 22 142 M_A_DQ44 1.8VSUS 117 39 1.8VSUS 117 39
M_B_DQ15 DQ13 DQ45 M_B_DQ47 M_A_DQ14 DQ13 DQ45 M_A_DQ43 1.8VSUS VDD_11 VSS_14 1.8VSUS VDD_11 VSS_14
36 DQ14 DQ46 152 36 DQ14 DQ46 152 118 VDD_12 VSS_15 40 118 VDD_12 VSS_15 40
M_B_DQ14 38 154 M_B_DQ42 M_A_DQ11 38 154 M_A_DQ47 41 41
DQ15 DQ47 DQ15 DQ47 VSS_16 VSS_16

PC2100 DDR2 SDRAM

PC2100 DDR2 SDRAM


M_B_DQ21 43 157 M_B_DQ55 M_A_DQ16 43 157 M_A_DQ52 42 42
M_B_DQ17 DQ16 DQ48 M_B_DQ49 M_A_DQ21 DQ16 DQ48 M_A_DQ48 M_B_ODT0 VSS_17 M_A_ODT0 VSS_17
45 DQ17 DQ49 159 45 DQ17 DQ49 159 114 ODT0 VSS_18 47 114 ODT0 VSS_18 47
M_B_DQ19 55 173 M_B_DQ51 M_A_DQ23 55 173 M_A_DQ55 M_B_ODT1 119 48 M_A_ODT1 119 48
M_B_DQ23 DQ18 DQ50 M_B_DQ53 M_A_DQ19 DQ18 DQ50 M_A_DQ54 ODT1 VSS_19 ODT1 VSS_19
57 DQ19 DQ51 175 57 DQ19 DQ51 175 VSS_20 53 VSS_20 53

SO-DIMM (200P)

SO-DIMM (200P)
M_B_DQ20 44 158 M_B_DQ48 M_A_DQ20 44 158 M_A_DQ53 54 54
M_B_DQ16 DQ20 DQ52 M_B_DQ52 M_A_DQ17 DQ20 DQ52 M_A_DQ49 VSS_21 VSS_21
46 160 46 160 50 59 50 59
PC2100 DDR2 SDRAM SO-DIMM

PC2100 DDR2 SDRAM SO-DIMM


M_B_DQ18 DQ21 DQ53 M_B_DQ50 M_A_DQ18 DQ21 DQ53 M_A_DQ50 7,13 PM_EXTTS#0 NC_1 VSS_22 7,13 PM_EXTTS#0 NC_1 VSS_22
56 DQ22 DQ54 174 56 DQ22 DQ54 174 69 NC_2 VSS_23 60 69 NC_2 VSS_23 60
M_B_DQ22 58 176 M_B_DQ54 M_A_DQ22 58 176 M_A_DQ51 SI-1 CHANGE 83 65 SI-1 CHANGE 83 65
M_B_DQ28 DQ23 DQ55 M_B_DQ61 M_A_DQ24 DQ23 DQ55 M_A_DQ60 NC_3 VSS_24 NC_3 VSS_24
61 DQ24 DQ56 179 61 DQ24 DQ56 179 84 NC_4/A15 VSS_25 66 84 NC_4/A15 VSS_25 66
M_B_DQ29 63 181 M_B_DQ60 M_A_DQ28 63 181 M_A_DQ56 7,13 SB_MA14 86 71 7,13 SA_MA14 86 71
M_B_DQ27 DQ25 DQ57 M_B_DQ59 M_A_DQ31 DQ25 DQ57 M_A_DQ62 M_B_A13 NC_5/A14 VSS_26 M_A_A13 NC_5/A14 VSS_26
73 DQ26 DQ58 189 73 DQ26 DQ58 189 116 NC_6/A13 VSS_27 72 116 NC_6/A13 VSS_27 72
M_B_DQ26 75 191 M_B_DQ63 M_A_DQ30 75 191 M_A_DQ58 120 77 120 77
M_B_DQ24 DQ27 DQ59 M_B_DQ56 M_A_DQ25 DQ27 DQ59 M_A_DQ57 NC_7 VSS_28 NC_7 VSS_28
62 DQ28 DQ60 180 62 DQ28 DQ60 180 163 NC_8 VSS_29 78 163 NC_8 VSS_29 78
M_B_DQ25 64 182 M_B_DQ57 M_A_DQ29 64 182 M_A_DQ61 121 121
M_B_DQ31 DQ29 DQ61 M_B_DQ58 M_A_DQ27 DQ29 DQ61 M_A_DQ59 VSS_30 VSS_30
74 DQ30 DQ62 192 74 DQ30 DQ62 192 VSS_31 122 VSS_31 122
M_B_DQ30 76 194 M_B_DQ62 M_A_DQ26 76 194 M_A_DQ63 162 127 162 127
DQ31 DQ63 DQ31 DQ63 VSS_45 VSS_32 VSS_45 VSS_32
165 VSS_46 VSS_33 128 165 VSS_46 VSS_33 128
B M_B_A0 M_B_DQM0 M_A_A0 M_A_DQM0 B
102 A0 DM0 10 102 A0 DM0 10 168 VSS_47 VSS_34 132 168 VSS_47 VSS_34 132
M_B_A1 101 26 M_B_DQM1 M_A_A1 101 26 M_A_DQM1 171 133 171 133
M_B_A2 A1 DM1 M_B_DQM2 M_A_A2 A1 DM1 M_A_DQM2 VSS_48 VSS_35 VSS_48 VSS_35
100 A2 DM2 52 100 A2 DM2 52 172 VSS_49 VSS_36 138 172 VSS_49 VSS_36 138
M_B_A3 99 67 M_B_DQM3 M_A_A3 99 67 M_A_DQM3 177 139 177 139
M_B_A4 A3 DM3 M_B_DQM4 M_A_A4 A3 DM3 M_A_DQM4 VSS_50 VSS_37 VSS_50 VSS_37
98 A4 DM4 130 98 A4 DM4 130 178 VSS_51 VSS_38 144 178 VSS_51 VSS_38 144
M_B_A5 97 147 M_B_DQM5 M_A_A5 97 147 M_A_DQM5 183 145 183 145
M_B_A6 A5 DM5 M_B_DQM6 M_A_A6 A5 DM5 M_A_DQM6 VSS_52 VSS_39 VSS_52 VSS_39
94 A6 DM6 170 94 A6 DM6 170 184 VSS_53 VSS_40 149 184 VSS_53 VSS_40 149
M_B_A7 M_B_DQM7 M_A_A7 M_A_DQM7
(200P)

M_B_A8
92
93
A7
A8
DM7
DQS0
185
13 M_B_DQS0 M_A_A8
92
93
A7
A8
(200P) DM7
DQS0
185
13 M_A_DQS0
187
190
VSS_54
VSS_55
VSS_41
VSS_42
150
155
187
190
VSS_54
VSS_55
VSS_41
VSS_42
150
155
M_B_A9 91 11 M_B_DQS#0 M_A_A9 91 11 M_A_DQS#0 193 156 193 156
M_B_A10 A9 DQS0 M_B_DQS1 M_A_A10 A9 DQS0 M_A_DQS1 VSS_56 VSS_43 VSS_56 VSS_43
105 A10/AP DQS1 31 105 A10/AP DQS1 31 196 VSS_57 VSS_44 161 196 VSS_57 VSS_44 161
M_B_A11 90 29 M_B_DQS#1 M_A_A11 90 29 M_A_DQS#1 201 202 201 202
M_B_A12 A11 DQS1 M_B_DQS2 M_A_A12 A11 DQS1 M_A_DQS2 VSS_58 VSS_59 VSS_58 VSS_59
89 A12 DQS2 51 89 A12 DQS2 51
49 M_B_DQS#2 49 M_A_DQS#2
M_B_BS#0 DQS2 M_B_DQS3 M_A_BS#0 DQS2 M_A_DQS3
107 BA0 DQS3 70 107 BA0 DQS3 70
M_B_BS#1 106 68 M_B_DQS#3 M_A_BS#1 106 68 M_A_DQS#3 FOX=AS0A426-M2S-TR FOX=AS0A426-MAS-TR
M_B_BS#2 BA1 DQS3 M_B_DQS4 M_A_BS#2 BA1 DQS3 M_A_DQS4 CN26B CN24B
85 NC/BA2 DQS4 131 85 NC/BA2 DQS4 131
129 M_B_DQS#4 129 M_A_DQS#4
M_B_CLK0 DQS4 M_B_DQS5 M_A_CLK0 DQS4 M_A_DQS5
30 CLK0 DQS5 148 30 CLK0 DQS5 148
M_B_CLK0# 32 146 M_B_DQS#5 M_A_CLK0# 32 146 M_A_DQS#5
CLK0 DQS5 M_B_DQS6 CLK0 DQS5 M_A_DQS6
DQS6 169 DQS6 169
M_B_CLK1 164 167 M_B_DQS#6 M_A_CLK1 164 167 M_A_DQS#6
M_B_CLK1# CLK1 DQS6 M_B_DQS7 M_A_CLK1# CLK1 DQS6 M_A_DQS7
166 CKL1 DQS7 188 166 CKL1 DQS7 188
186 M_B_DQS#7 186 M_A_DQS#7
CGCLK_SMB DQS7 CGCLK_SMB DQS7
197 SCL 197 SCL
CGDAT_SMB 195 110 M_B_CS#0 CGDAT_SMB 195 110 M_A_CS#0
DIM2_SA0 SDA CS0 M_B_CS#1 DIM1_SA0 SDA CS0 M_A_CS#1
198 SA0 CS1 115 198 SA0 CS1 115
DIM2_SA1 200 108 M_B_RAS# DIM1_SA1 200 108 M_A_RAS#
SA1 RAS M_B_CAS# SA1 RAS M_A_CAS#
CAS 113 CAS 113
+3V 199 109 M_B_WE# +3V 199 109 M_A_WE#
VDDSPD WE M_B_CKE0 VDDSPD WE M_A_CKE0 C771 470P/50V/04
CKE0 79 CKE0 79
80 M_B_CKE1 80 M_A_CKE1 1 2 SMDDR_VREF_DIMM R226 0/06
CKE1 CKE1 SMDDR_VREF 7,46
C C
CKEA 0,1 CKEB 0,1 R227 1.8VSUS
FOX=AS0A426-M2S-TR H 9.2 FOX=AS0A426-MAS-TR H 5.2
CN26A CN24A R603 *10K/F/06 *10K/F/06

DIM2_SA0 R267 10K/04 R216 10K/04 DIM1_SA0


DIM2_SA1 R268 10K/04 R217 10K/04 DIM1_SA1
+3V

SMbus address A4 SMbus address A0

1.8VSUS 1.8VSUS
Place these Caps near So-Dimm1. Place these Caps near So-Dimm2.

C773 C775 C785 C444 C764 C770 C788 C439 C433 C769 C767 C774 C786 C784 C759 C760 C776 C789 C787 C443 C765 C766
2.2U/6.3V/062.2U/6.3V/062.2U/6.3V/06
2.2U/6.3V/062.2U/6.3V/06
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04 .1U/10V/04 .1U/10V/04 2.2U/6.3V/06
2.2U/6.3V/06
2.2U/6.3V/06
2.2U/6.3V/06
2.2U/6.3V/06
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04
.1U/10V/04

+3V
SMDDR_VREF_DIMM SMDDR_VREF_DIMM +3V

C317 C316
C772 C768 2.2U/6.3V/06 .1U/10V/04 C371 C373 C372 C385
.1U/10V/04 2.2U/6.3V/06 .1U/10V/04 2.2U/6.3V/06 2.2U/6.3V/06 .1U/10V/04
D D

SO-DIMM BYPASS PLACEMENT : SO-DIMM BYPASS PLACEMENT :


Place these Caps near So-Dimm1. Place these Caps near So-Dimm2
No Vias Between the Trace of PIN to CAP. No Vias Between the Trace of PIN to CAP.
PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom DDRII SO-DIMM(200P) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 14 of 48
1 2 3 4 5 6 7 8
5 4 3 2 1

YELLOW BLOCK is OPTION SIGNAL FROM NB FOR UMA VGA


L12 *0/06

15
+1.8V for G8X chip
only TXLCLKOUT+ RP60 3 4 4P2R-S-0 LA_CLK LA_CLK 7
TXLCLKOUT- 1 2 LA_CLK# LA_CLK# 7
80mA L17 *0/06 15mil L_CRT_R R120 *150/F/04
+2.5V LA_DATAP0
U37D L_CRT_G R121 *150/F/04 TXLOUT0+ RP54 1 2 4P2R-S-0 LA_DATAP0 7
C164 *470P/50V IFPAB_PLLVDD AC9 AJ9 C_TXLCLKOUT- L_CRT_B R122 *150/F/04 TXLOUT0- 3 4 LA_DATAN0 LA_DATAN0 7
C151 *4700P/25V IFPAB_PLLVDD IFPA_TXC# C_TXLCLKOUT+ TXLOUT1+ RP55 3 LA_DATAP1
IFPA_TXC AK9 4 4P2R-S-0 LA_DATAP1 7
C102 *10U/6.3V/06 AJ6 C_TXLOUT0- TXLOUT1- 1 2 LA_DATAN1 LA_DATAN1 7
IFPA_TXD0# C_TXLOUT0+
IFPA_TXD0 AH6
C86 *220U/6.3V AD9 AH7 C_TXLOUT1- TXLOUT2+ RP58 1 2 4P2R-S-0 LA_DATAP2 LA_DATAP2 7
IFPAB_PLLGND IFPA_TXD1# C_TXLOUT1+ L_S-CD1 R129 *150/F/04 TXLOUT2- LA_DATAN2

+
IFPA_TXD1 AH8 3 4 LA_DATAN2 7
AK8 C_TXLOUT2- L_S-YD1 R127 *150/F/04
D
C152 *470P/50V IFPA_IOVDD AF9 IFPA_TXD2# C_TXLOUT2+ L_S-CVBS1 R128 *150/F/04 D
IFPA_IOVDD IFPA_TXD2 AJ8
C160 *4700P/25V AF8 AH5
C101 *10U/6.3V/06 IFPB_IOVDD IFPA_TXD3#
LVDS IFPA_TXD3 AJ5
45mA 15mil AL4 C_TXUCLKOUT- Close to GPU TXUCLKOUT- RP4 3 4 4P2R-S-0 LB_CLK# LB_CLK# 7
+1.8V IFPB_TXC# LB_CLK
L11 *0/06 AK4 C_TXUCLKOUT+ TXUCLKOUT+ 1 2 LB_CLK 7
IFPABVPROBE IFPB_TXC C_TXUOUT0-
T195 AM4 IFPAB_VPROBE IFPB_TXD4# AM5
SI-1 modify ( IFPABRSET AL5 AM6 C_TXUOUT0+ TXUOUT0+ RP6 1 2 4P2R-S-0 LB_DATAP0 LB_DATAP0 7
T196 IFPAB_RSET IFPB_TXD4 LB_DATAN0
AL7 C_TXUOUT1- TXUOUT0- 3 4 LB_DATAN0 7
change from bead to IFPB_TXD5# C_TXUOUT1+ TXUOUT1+ RP10 3 LB_DATAP1
IFPB_TXD5 AM7 4 4P2R-S-0 LB_DATAP1 7
0 ohm ) 15mil AK5 C_TXUOUT2- TXUOUT1- 1 2 LB_DATAN1 LB_DATAN1 7
L10 IFPB_TXD6# C_TXUOUT2+
IFPB_TXD6 AK6
*0/06 AL8 C_TXUOUT3- TXUOUT2- RP8 1 2 4P2R-S-0 LB_DATAN2 LB_DATAN2 7
IFPB_TXD7# T70 LB_DATAP2
DACA_VDD AK7 C_TXUOUT3+ TXUOUT2+ 3 4 LB_DATAP2 7
+3V IFPB_TXD7 T72
C180 *470P/50V AD10 K2 L_DDCCLK R104 *0/04DDCCLK
DACA_VDD I2CA_SCL DDCCLK 7,25
C181 *4700P/25V J3 L_DDCDAT R105 *0/04DDCDATA
I2CA_SDA DDCDATA 7,25
C100 *10U/6.3V/06
AF10 CRT_HSYNC R130 *0/04HSYNC_COM
DACA_HSYNC HSYNC_COM 7,25
15mil CRT DACA_VSYNC AK10 CRT_VSYNC R118 *0/04VSYNC_COM OPTION SIGNAL FROM Nvidia to VGA
VSYNC_COM 7,25
C167 *.01U/16V
DACA_VREF AH10 AH11 L_CRT_R R97 *0/04CRT_R C_TXLCLKOUT+ RP59 3 4 *4P2R-S-0
DACA_VREF DACA_RED CRT_R 7,25 TXLCLKOUT+ 26
R572 *124/F/04
DACA_RSET AH9 AJ12 L_CRT_G R98 *0/04CRT_G C_TXLCLKOUT- 1 2
DACA_RSET DACA_GREEN CRT_G 7,25 TXLCLKOUT- 26
AG9 AH12 L_CRT_B R99 *0/04CRT_B C_TXLOUT0- RP11 1 2 *4P2R-S-0
DACA_IDUMP DACA_BLUE CRT_B 7,25 TXLOUT0- 26
L15 *0/06 C_TXLOUT0+ 3 4
+3V TXLOUT0+ 26
C149 *470P/50V V8 C_TXLOUT1- RP56 1 2 *4P2R-S-0
DACB_VDD TXLOUT1- 26
C157 *4700P/25VDACB_VDD R6 L_S-CD1 R109 *0/04S-CD1 C_TXLOUT1+ 3 4
DACB_RED S-CD1 7,25 TXLOUT1+ 26
C176 *10U/6.3V/06 T5 L_S-YD1 R110 *0/04S-YD1 C_TXLOUT2- RP57 3 4 *4P2R-S-0
DACB_GREEN S-YD1 7,25 TXLOUT2- 26
C153 DACB_VREF
*.01U/16V/04 R5 TV T6 L_S-CVBS1 R111 *0/04S-CVBS1 C_TXLOUT2+ 1 2
DACB_VREF DACB_BLUE S-CVBS1 7,25 TXLOUT2+ 26
R155 *124/F/04 DACB_RSET R7 DACB_RSET
C V7 DACB_IDUMP FOR G72M/G73M only C
15mil C_TXUCLKOUT- RP3 3 4 *4P2R-S-0
TXUCLKOUT- 26
C136 *.01U/16VIFPCDVPROBE AK3 AM3 TXC_HDMI- C_TXUCLKOUT+ 1 2
IFPCD_VPROBE IFPC_TXC# TXC_HDMI- 26 TXUCLKOUT+ 26
L14 *0/06 R150 *1K IFPCDRSET AH3 AM2 TXC_HDMI+ C_TXUOUT0- RP5 3 4 *4P2R-S-0
+1.8V IFPCD_RSET IFPC_TXC TXC_HDMI+ 26 TXUOUT0- 26
AE1 TX0_HDMI- C_TXUOUT0+ 1 2
IFPC_TXD0# TX0_HDMI- 26 TXUOUT0+ 26
40mA +2.5V L19 *0/06 AE2 TX0_HDMI+ C_TXUOUT1- RP9 1 2 *4P2R-S-0
IFPC_TXD0 TX0_HDMI+ 26 TXUOUT1- 26
C163 *470P/50V AF2 TX1_HDMI- C_TXUOUT1+ 3 4
IFPC_TXD1# TX1_HDMI- 26 TXUOUT1+ 26
C171 *4700P/25V 15mil IFPCD_PLLVDD AA10 AF1 TX1_HDMI+ C_TXUOUT2+ RP7 3 4 *4P2R-S-0
IFPCD_PLLVDD IFPC_TXD1 TX1_HDMI+ 26 TXUOUT2+ 26
C177 *10U/6.3V/06 AH1 TX2_HDMI- C_TXUOUT2- 1 2
IFPC_TXD2# TX2_HDMI- 26 TXUOUT2- 26
AB10 AG1 TX2_HDMI+
IFPCD_PLLGND IFPC_TXD2 TX2_HDMI+ 26
*0/06 TMDS IFPD_TXC# AH2 IFPD_TCX-
T193
300mA IFPC_DVI_3V L69 AG3
C130 *470P/50V IFPC_IOVDD IFPD_TXC IFPD_TC4-
15mil AD6 IFPC_IOVDD IFPD_TXD4# AJ1 T179
C135 *4700P/25V AK1 IFPD_TC4+
C711 *10U/6.3V/06 IFPD_TXD4
AL1 IFPD_TC5-
T169 C34: PUN issue reserve
IFPD_TXD5# T183
R153 *10K IFPD_IOVDD AE7 IFPD_IOVDD IFPD_TXD5 AL2 IFPD_TC5+
T171 U54,C950,c949,R726,R727
120mA 15mil IFPD_TXD6# AJ3
need add to 3v AJ2 IFPD_TC6+
IFPD_TXD6 T181
R156 *10K DACC_VD AD7 H4 HDMI_SCL HDMI_SCL 26
DACC_VDD I2CB_SCL HDMI_SDA +5V
I2CB_SDA J4 HDMI_SDA 26
YELLOW BLOCK is 3V_IFPC
VGA1.2V DAC_HSYNC U9
AG7 T71
for G8X chip DACC_HSYNC
DAC DACC_VSYNC AG5 DAC_VSYNC 3 4
T55 VIN VOUT
L16 *0/06 only AH4 AF6 DAC_RED
DACC_VREF DACC_RED T59
AF5 AG6 DAC_GRN

+2.5V L13 *0/06


AG4
DACC_RSET
DACC_IDUMP
DACC_GREEN
DACC_BLUE AE5 DAC_BLU
T45
T46
Ra
R191 C339
40mA 1 SHDN
C154 *.1U/10V/04 NV_PLLVDD T9 T2 XTALO_GPU R559 *22/04 27M_BUFO C341
C165 *4700P/25V/04 PLLVDD XTALOUTBUFF GFX_27MSS R560 *10K/04 *86.6K/F/04 *1U/04
B XTALSSIN T1 *1U/04 B
C143 *10U/6.3V/06
40mA +2.5V L20 *0/06 T10 U1 EVGA-XTALI 2 5
C183 *.1U/10V/04 DISP_PLLVDD VID_PLLVDD XTALIN GND SET
XTAL
C184 *4700P/25V/04
VGA1.2V L24 *0/06 C179 *10U/6.3V/06 Y5 *G923 R195
U10 U2 EVGA-XTALO 2 1
PLLGND XTALOUT *49.9K/04
15mil
*U_GPU_G3 C708 C706
*27MHZ
5ppm *27P/04 *27P/04 Rb
Vout=1.25(1+Ra/Rb)

L35 *0/06 SPREAD SPECTRUM


+3V +3V
Q10
3

*AO3409 L37 *0/06 +3V R530 *22/04 GFX_27MSS


3V_IFPC
GFX27M_L

VGA_GD# 2 C707
1

+3V R549 R532 *10P/50V/04


R605 C342 *10K/04
*0/06 *.1U/16V/04 *10K/04
15mil U32
2

R192 ICSS_PD 3V_SSC R533 *4.7/06


1

8 PD# VDD 2 +3V


*10K/04 R196 *10K/04 IFPC_DVI_3V
A 27M_BUFO 1 4 A
CLKIN CLKOUT
3
IPFC_C

REFOUT 5 ICSS_RFO C698 C699 C705 C704


EDIDCLK 7 R529
7,16,26 EDIDCLK SCL
2 EDIDDATA 6 3 *10K/04 *.1U/10V/04 *4.7U/10V/08
7,16,26 EDIDDATA SDA GND *470P/50V/04 *4.7U/10V/08

Q9
*ICS91730AM-T PROJECT : AT3
*2N7002E Quanta Computer Inc.
FOR IFPC VDD LEAKAGE CIRCIUT
1

I2C ADDRESS: 0xD4H Size


Custom
Document Number
NVG73M (LVDS/DVI/CRT/TV)
Rev
1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 15 of 48
5 4 3 2 1
5 4 3 2 1

ROM_TYPE(0:1) resister can be remove

16
15mil due to from nvidia HANK recommend
U37E need to reserve or cancel +3V
+3V M7 P2 MIOAD0 +3V
MIOA_VDDQ_0 MIOAD0 MIOAD1 +3V
M8 MIOA_VDDQ_1 MIOAD1 N2
C159 *.1U/10V/04
R8 N1 MIOAD2 R535 *10K/04 ROMTYPE1 R536 *10K/04
MIOA_VDDQ_2 MIOAD2 MIOAD3
T168 ROM_TYPE1
T8 MIOA_VDDQ_3 MIOAD3 N3 T39
U9 M1 MIOAD4 R577 R545 *10K/04 VIPD10 R541 *10K/04
MIOA_VDDQ_4 MIOAD4 MIOAD5
T186
*10K/04 U35 ROM_TYPE0
MIOAD5 M3 T31
MIOACAL_PU L3 P5 MIOAD6 HDCP_SDA 5 8 R135 *10K/04 MIOBD0 R94 *10K/04
T173
MIOACAL_PD L1 MIOACAL_PU_GND MIOAD6 MIOAD7 SDA VCC RAM_CFG0
T180 MIOACAL_PD_VDDQ MIOAD7 N6 T178 3 SDA VCC 7
MIOA_VREF L2 N5 MIOAD8 R564 *10K/04 MIOBD1 R565 *10K/04 RAM_CFG1
T185 MIOA_VREF MIOAD8
M4 MIOAD9 C720
MIOAD9 MIOAD10 HDCP_SCL R134 *10K/04 MIOBD8 R113 *10K/04
D MIOAD10 L4 T50 6 SCL RAM_CFG2 D
MIOAD L5 MIOAD11 1 *.1U/10V/04
MIOAD11 T58 GND
R3 MIOAHSYNC 2 4 R133 *10K/04 MIOBD9 R112 *10K/04 RAM_CFG3
MIOA_HSYNC T29 NC2 GND
R1 MIOAVSYNC R558
MIOA_VSYNC T172
P1 MIOADE *10K/04 *AT88SC0808C VIPD4 R540 *2K/04 PCI_DEVICE0
MIOA_DE T192
P3 MIOACTL3
MIOA_CTL3 T52
R4 MIOA_CKO for HDMI function PCI_DEVICE[3:0] VIPD5 R543 *2K/04 PCI_DEVICE1
MIOA_CLKOUT T40
P4 MIOA_CKO#
MIOA_CLKOUT# T51
MIOA_CKI
Default are VIPD3 R544 *2K/04
15mil MIOA_CLKIN M5 T63 PCI_DEVICE2
"0",can remove
AA8 AC3 MIOBD0 PCI DEVICE pull down VIPD11 R102 *2K/04 PCI_DEVICE3
+3V MIOB_VDDQ_0 MIOBD0
AB7 AC1 MIOBD1
C131 *.1U/10VAB8 MIOB_VDDQ_1 MIOBD1 MIOBD2 resister from G73_AD3 R538 *2K/04
MIOB_VDDQ_2 MIOBD2 AC2 T187 GREEN PCI_DEVICE[3:0] DESCRIPTION PCI_DEVICE3
AC6 AB2 VIPD3 nvidia HANK
MIOB_VDDQ_3 MIOBD3
AB1 VIPD4 BLOCK can 1000 G72M/G73M
MIOBD4 recommend
AC7 AA1 VIPD5 remove if 0110 G72M-Z
MIOBCAL_PD Y1 MIOB_VDDQ_4 MIOBD5 MIOBD6 R132 R125 *2K/04 MIOAHSYNC R116 *2K/04
T174 MIOBCAL_PD_VDDQ MIOBD6 AB3 T33 0111 G72M-V/G73M-V SLOT_CLOCK_CFG
MIOBCAL_PU Y3 AA3 MIOBD7 use G8X others Reserved
T38 MIOBCAL_PU_GND MIOBD7
MIOBVREF Y2 AC5 MIOBD8
T190 MIOB_VREF MIOBD8
AB5 MIOBD9 *10K/04 MIOBD7 pull R561 *2K/04 MIOAD1 SUB_VENDOR
MIOBD9 VIPD10
MIOBD MIOBD10 AB4 down and
VIPD11 +3V
MIOBD11 AA5
ROMTYPE1 +3V MIOB_DE SHARE M/B SYSTEM BIOS, SUB VENDOR
AE3
MIOB_VSYNC
AF3 3GIO_PADCFG3 R566 pull up GFX_VID0 R136 *2K/04 ID NEED PULL DOWN .
MIOB_HSYNC MIOB_DE
AD1
MIOB_DE
AD3 G73_AD3 from nvidia JTAG_TMS R570 *10K/04
MIOB_CTL3 T191
AD4 G73_AD4
T57
*10K/04 HANK
MIOB_CLKOUT G73_AD5 JTAG_TDI R571 *10K/04
MIOB_CLKOUT# AD5 T41 recommend G72M VRAM Configuration Table
AE4 G73_AE4
MIOB_CLKIN T43 VGA_OVT# R821 *10K/04 RAM_CFG[3:0] DESCRIPTION Vendor
C F6 G73_F6 C
CLAMP T67 ALERT_1
GFX_THMD- J1 G2 EDIDCLK R850 *10K/04 0000 DDR2 16Mx16x4, 64bit, 128MB Elpida
THERMDN I2CC_SCL EDIDCLK 7,15,26
GFX_THMD+ K1 G1 EDIDDATA 0001 DDR2 16Mx16x4, 64bit, 128MB Samsung
THERMDP I2CC_SDA EDIDDATA 7,15,26
K3 HDMI_DET SI-2 ADD for Nvidia requests 0010 DDR2 16Mx16x4, 64bit, 128MB Infineon
GPIO0 HDMI_DET 26
H1 GPIO1 0011 DDR2 16Mx16x4, 64bit, 128MB Hynix
GPIO1 T177
K5 DPST_PWM 0100 Reserved
GPIO2 DPST_PWM 7,26
G5 G72_DISP_ON SI-2 0101 DDR2 32Mx16x4, 64bit, 256MB Samsung
GPIO3 LVDS_BLON
THERMAL GPIO4 E2 LVDS_BLON 7,26 MODIFIED 0110 DDR2 32Mx16x4, 64bit, 256MB Infineon
J5 GFX_VID0 JTAG_TCK R576 *10K/04 0111 DDR2 32Mx16x4, 64bit, 256MB Hynix
GPIO GPIO5 GFX_VID1
GPIO6 G6 T75 1000 DDR2 16Mx16x2, 32bit, 64MB Elpida
YELLOW K6 GFX_VID2 JTAG_TRST# R588 *10K/04 1001 DDR2 16Mx16x2, 32bit, 64MB Samsung
GPIO7 VGA_OVT# T64
JTAG_TCK AJ11 E1 R846 *0/04 1010 DDR2 16Mx16x2, 32bit, 64MB Infineon
BLOCK is T78 JTAG_TCK GPIO8 SYS_SHDN# 5,42
JTAG_TMS AK11 D2 ALERT_1 R854 *0/04 ALERT SI-1 MOVE DISP_ON GPIO1 PULL 1011 DDR2 16Mx16x2, 32bit, 64MB Hynix
T170 JTAG_TMS GPIO9 ALERT 37,48
for G8X JTAG_TDI AK12 H5 GPIO10 others Reserved
T81
JTAG_TDO JTAG_TDI GPIO10 GPIO11
T65
HDMI_DET R555 *2K/04
DOWN strap
T198 AL12 JTAG_TDO GPIO11 F4 T62
chip T201
JTAG_TRST# AL13 E3 GFX_GPIO12 VGACORECTL G73M can be
JTAG_TRST# GPIO12 GPIO1 R554 *2K/04
only GFX_VID0 remove from
STRAP F1 AE26 MSTRAPSEL0 HI 1.0V G73M VRAM Configuration Table
T182 STRAP MEMSTRAPSEL0 MSTRAPSEL1
T91 H : Low Voltage DPST_PWM R119 *2K/04 nvidia HANK
MEMSTRAPSEL1 AD26 T90
AH31 MSTRAPSEL2
T220
L : Normal Voltage LO 1.1V recommend RAM_CFG[3:0] DESCRIPTION Vendor
GPIO13 MEMSTRAPSEL2 MSTRAPSEL3
T34 U3 RFU6 MEMSTRAPSEL3 AH32 T214 SI-1 MOVE LVDS_BLON
T36 VGA_FU7 V3 0000 DDR2 16Mx16x8, 128bit, 256MB Elpida
VGA_FU8 RFU7 ROM_CS#
T54 U6 RFU8 ROMCS# AA4 T32 0001 DDR2 16Mx16x8, 128bit, 256MB Samsung
T167 DACB_CSYNC U5 W2 ROM_SI R194 *0/04 R193 *0/04 0010 DDR2 16Mx16x8, 128bit, 256MB Infineon
RFU9 ROM_SI T175
GPIO14 U4 AA6 ROM_SO 0011 DDR2 16Mx16x8, 128bit, 256MB Hynix
T42 RFU10 ROM_SO T77 3VPCU 3VPCU
T48 VGA_FU11 V4 ROM AA7 ROM_CK 0100 Reserved
RFU11 ROM_SCLK T60
VGA_FU12 V6 G3 HDCP_SCL 0101 DDR2 32Mx16x8, 128bit, 512MB Samsung
T44 RFU12 I2CH_SCL
T35 VGA_FU13 W3 H3 HDCP_SDA 0110 DDR2 32Mx16x8, 128bit, 512MB Infineon
VGA_FU14 RFU13 I2CH_SDA U11 U10
T189 V1 RFU14 0111 DDR2 32Mx16x8, 128bit, 512MB Hynix

5
T61 VGA_FU15 Y5 1000 DDR2 16Mx16x4, 64bit, 128MB Elpida
B
VGA_FU16 RFU15 RESET_BUF# GFX_VID0 G72_DISP_ON
B
T176 W1 RFU16 BUFRST# F3 T53 2 2 1001 DDR2 16Mx16x4, 64bit, 128MB Samsung
VGA_FU17 STEREO
T56 W4 RFU17 STEREO T3 T188 4 V_PWRCNTL 45 4 DISP_ON 7,26 1010 DDR2 16Mx16x4, 64bit, 128MB Infineon
GREEN VGA_FU18 W5 M6 SWAPRDY_A ECPWROK 1 1 1011 DDR2 16Mx16x4, 64bit, 128MB Hynix
T47 RFU18 SWAPRDY_A T73 7,23,37,48 ECPWROK
T66 VGA_FU19 V5 A26 VGA_TEST R592 *10K/04 1100 Reserved
BLOCK can VGA_FU20 Y6
RFU19 TESTMEMCLK
H2 VGA_TMODE R567 *10K/04 *TC7SH08FU *TC7SH08FU 1101 DDR2 32Mx16x4, 64bit, 256MB Samsung
T69 RFU20 TESTMODE

3
remove if 1110 DDR2 32Mx16x4, 64bit, 256MB Infineon
*U_GPU_G3 1111 DDR2 32Mx16x4, 64bit, 256MB Hynix
use G8X

+3V +3V +3V


GPIO12 G8X SI-2
HI AC MODE MODIFIED
R563 *2K/04 MIOAD0 R557 *2K/04 PEX_PLL_EN
LO BAT MODE R847 R574 R568
Default are MIOAD6 R556 *2K/04 3GIO_PADCFG_LUT_ADR0
*10K/04 *2.2K/04 *2.2K/04
U33
"0",can remove MIOAD8 R108 *2K/04 3GIO_PADCFG_LUT_ADR1
EDIDDATA R551 *0/04GFX_SDA 7 4 MAX6649_O# R575 *0/04VGA_OVT# pull down resister
EDIDCLK R550 *0/04GFX_SCL SDAT OVT MIOAD9 R107 *2K/04
8 SCLK from nvidia HANK 3GIO_PADCFG_LUT_ADR2
6 MAX6649_A# R569 *0/04 VGA_OVT#
R848 *0/04 GFX_GPIO12 R552 *200/F/06 MAX6649_V ALERT recommend 3GIO_PADCFG3 R539 *2K/04
37,41,48 ACIN +3V 1 VCC 3GIO_PADCFG_LUT_ADR3
2 GFX_THMD+
C702 DXP
GND

A 5 GND DXN 3 A
.1U/10V/04 C712
FOR BATTERY MODE throttling MAX6649 *2200P/50V/04
*G799P8X GFX_THMD-
9

FUNCTION

PROJECT : AT3
Quanta Computer Inc.
VGA THERMAIL CIRCUIT
Size Document Number Rev
Custom NVG73M (ROM/GPIO/STRAP) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 16 of 48
5 4 3 2 1
5 4 3 2 1

17
Channel C is available on G73M only
U37B U37C

VMA_DQ0 N27 A12 VMC_DQ0 B7 AA23


FBAD0 FBVDD_0 +1.8V FBCD0 FBVTT_0 +1.8V
VMA_DQ1 M27 A15 C309 *.1U/10V/04 VMC_DQ1 A7 AB23 C287 *.1U/10V/04
VMA_DQ2 FBAD1 FBVDD_1 C306 *.1U/10V/04 VMC_DQ2 FBCD1 FBVTT_1 C198 *.1U/10V/04
N28 FBAD2 FBVDD_2 A18 C7 FBCD2 FBVTT_2 H16
VMA_DQ3 L29 A21 C104 *.1U/10V/04 VMC_DQ3 A2 H17 C294 *.1U/10V/04
VMA_DQ4 FBAD3 FBVDD_3 C144 *.1U/10V/04 VMC_DQ4 FBCD3 FBVTT_3 C311 *.1U/10V/04
K27 FBAD4 FBVDD_4 A24 B2 FBCD4 FBVTT_4 J10
VMA_DQ5 K28 A27 C283 *.47U/10V/06 VMC_DQ5 C4 J23 C227 *.47U/10V/06
VMA_DQ6 FBAD5 FBVDD_5 C291 *.47U/10V/06 VMC_DQ6 FBCD5 FBVTT_5 C241 *.47U/10V/06
J29 FBAD6 FBVDD_6 A3 A5 FBCD6 FBVTT_6 J24 18 VMA_DQ[63..0]
VMA_DQ7 J28 A30 C175 *10U/4V/06 VMC_DQ7 B5 J9 C193 *10U/4V/06
VMA_DQ8 FBAD7 FBVDD_7 C191 *.1U/10V/04 VMC_DQ8 FBCD7 FBVTT_7 C288 *.1U/10V/04
D
P30 FBAD8 FBVDD_8 A6 F9 FBCD8 FBVTT_8 K11 18 VMA_DM[7..0] D
VMA_DQ9 N31 A9 C307 *.1U/10V/04 VMC_DQ9 F10 K12 C298 *.1U/10V/04
VMA_DQ10 FBAD9 FBVDD_9 C301 *.1U/10V VMC_DQ10 FBCD9 FBVTT_9 C284 *.1U/10V/04
N30 FBAD10 FBVDD_10 AA32 D12 FBCD10 FBVTT_10 K21 18 VMA_WDQS[7..0]
VMA_DQ11 N32 AD32 C197 *.1U/10V/04 VMC_DQ11 D9 K22 C737 *.1U/10V/04
VMA_DQ12 FBAD11 FBVDD_11 C216 *.47U/10V/06 VMC_DQ12 FBCD11 FBVTT_11 C272 *.47U/10V/06
L31 FBAD12 FBVDD_12 AG32 E12 FBCD12 FBVTT_12 K24 18 VMA_RDQS[7..0]
VMA_DQ13 L30 AK32 C268 *.47U/10V/06 VMC_DQ13 D11 K9 C161 *.47U/10V/06
VMA_DQ14 FBAD13 FBVDD_13 C289 *10U/4V/06 VMC_DQ14 FBCD13 FBVTT_13 C251 *10U/4V/06
J30 FBAD14 FBVDD_14 C32 E8 FBCD14 FBVTT_14 L23
VMA_DQ15 L32 F32 VMC_DQ15 D8 M23
VMA_DQ16 FBAD15 FBVDD_15 VMC_DQ16 FBCD15 FBVTT_15
H30 FBAD16 FBVDD_16 J32 PLACE NEAR GPU E7 FBCD16 FBVTT_16 T25 PLACE NEAR GPU
VMA_DQ17 K30 M32 VMC_DQ17 F7 U25
VMA_DQ18 FBAD17 FBVDD_17 VMC_DQ18 FBCD17 FBVTT_17
H31 FBAD18 FBVDD_18 R32 D6 FBCD18
VMA_DQ19 F30 V32 VMC_DQ19 D5
FBAD19 FBVDD_19 FBCD19 19 VMC_DQ[63..0]
VMA_DQ20 H32 VMC_DQ20 D3 C13 VMC_MA3
FBAD20 FBCD20 FBC_CMD0 VMC_MA3 19
VMA_DQ21 E31 AA25 VMC_DQ21 E4 A16 VMC_MA0
FBAD21 FBVDDQ_0 +1.8V FBCD21 FBC_CMD1 VMC_MA0 19 19 VMC_DM[7..0]
VMA_DQ22 D30 AA26 C763 *.1U/10V/04 VMC_DQ22 C3 A13 VMC_MA2
FBAD22 FBVDDQ_1 FBCD22 FBC_CMD2 VMC_MA2 19
VMA_DQ23 E30 AB25 C314 *.1U/10V/04 VMC_DQ23 B4 B17 VMC_MA1
FBAD23 FBVDDQ_2 FBCD23 FBC_CMD3 VMC_MA1 19 19 VMC_WDQS[7..0]
VMA_DQ24 H28 AB26 C274 *.1U/10V/04 VMC_DQ24 C10 B20 VMC_MA3H
FBAD24 FBVDDQ_3 FBCD24 FBC_CMD4 VMC_MA3H 19
VMA_DQ25 H29 G11 C310 *.1U/10V/04 VMC_DQ25 B10 A19 VMC_MA4H
FBAD25 FBVDDQ_4 FBCD25 FBC_CMD5 VMC_MA4H 19 19 VMC_RDQS[7..0]
VMA_DQ26 E29 G12 C285 *.47U/10V/06 VMC_DQ26 C8 B19 VMC_MA5H
FBAD26 FBVDDQ_5 FBCD26 FBC_CMD6 VMC_MA5H 19
VMA_DQ27 J27 G15 C279 *.47U/10V/06 VMC_DQ27 A10 B14 VMC_BA2
FBAD27 FBVDDQ_6 FBCD27 FBC_CMD7 T83
VMA_DQ28 F27 G18 C282 *10U/4V/06 VMC_DQ28 C11 E16 VMC_CS0#
FBAD28 FBVDDQ_7 FBCD28 FBC_CMD8 VMC_CS0# 19
VMA_DQ29 E27 G21 C297 *.1U/10V/04 VMC_DQ29 C12 A14 VMC_WE#
FBAD29 FBVDDQ_8 FBCD29 FBC_CMD9 VMC_WE# 19 VMA_ODT VMA_ODT_R
VMA_DQ30 E28 G22 C300 *.1U/10V/04 VMC_DQ30 A11 C15 VMC_BA0 R832 *0/04
FBAD30 FBVDDQ_9 FBCD30 FBC_CMD10 VMC_BA0 19 VMA_ODT_R
VMA_DQ31 F28 H11 C308 *.1U/10V/04 VMC_DQ31 B11 B16 VMC_CKE
FBAD31 FBVDDQ_10 FBCD31 FBC_CMD11 VMC_CKE 19 VMA_DEBUG R831
VMA_DQ32 AD29 H12 C312 *.1U/10V/04 VMC_DQ32 B28 F17 VMC_ODT *0/04
VMA_DQ33 FBAD32 FBVDDQ_11 C204 *.47U/10V/06 VMC_DQ33 FBCD32 FBC_CMD12 VMC_MA2H
VMA_DQ34
AE29 FBAD33 FBVDDQ_12 H15
C290 *.47U/10V/06 VMC_DQ34
C27 FBCD33 FBC_CMD13 C19
VMC_MA12
VMC_MA2H 19
R598
G72M/G73M: STUFF
AD28 FBAD34 FBVDDQ_13 H18 C26 FBCD34 FBC_CMD14 D15 VMC_MA12 19
VMA_DQ35 AC28 H21 C305 *10U/4V/06 VMC_DQ35 B26 C17 VMC_RAS#
VMC_RAS# 19
UMA:NC
VMA_DQ36 FBAD35 FBVDDQ_14 VMC_DQ36 FBCD35 FBC_CMD15 VMC_MA11 10K/04
AB29 FBAD36 FBVDDQ_15 H22 C30 FBCD36 FBC_CMD16 A17 VMC_MA11 19
VMA_DQ37 AA30 L25 PLACE NEAR GPU VMC_DQ37 B31 C16 VMC_MA10
FBAD37 FBVDDQ_16 FBCD37 FBC_CMD17 VMC_MA10 19
C VMA_DQ38 Y28 L26 VMC_DQ38 C29 D14 VMC_BA1 C
FBAD38 FBVDDQ_17 FBCD38 FBC_CMD18 VMC_BA1 19
VMA_DQ39 AB30 M25 VMC_DQ39 A31 F16 VMC_MA8
FBAD39 FBVDDQ_18 C783 FBCD39 FBC_CMD19 VMC_MA8 19
VMA_DQ40 AM30 M26 VMC_DQ40 D28 C14 VMC_MA9
FBAD40 FBVDDQ_19 FBCD40 FBC_CMD20 VMC_MA9 19
VMA_DQ41 VMC_DQ41 VMC_MA6
+
AF30 FBAD41 FBVDDQ_20 R25 D27 FBCD41 FBC_CMD21 C18 VMC_MA6 19
VMA_DQ42 AJ31 R26 VMC_DQ42 F26 E14 VMC_MA5 VMC_ODT R830 *0/04 VMC_ODT_R
FBAD42 FBVDDQ_21 FBCD42 FBC_CMD22 VMC_MA5 19 VMC_ODT_R
VMA_DQ43 AJ30 V25 *220U VMC_DQ43 D24 B13 VMC_MA7
FBAD43 FBVDDQ_22 FBCD43 FBC_CMD23 VMC_MA7 19
VMA_DQ44 AJ32 V26 VMC_DQ44 E23 FBC E15 VMC_MA4 VMC_DEBUG R829 *0/04
FBAD44 FBVDDQ_23 FBCD44 FBC_CMD24 VMC_MA4 19
VMA_DQ45 AK29 VMC_DQ45 E26 F15 VMC_CAS#
FBAD45 FBCD45 FBC_CMD25 VMC_CAS# 19
VMA_DQ46 AM31 VMC_DQ46 E24 A20 VMC_MA13 R174
FBAD46 FBCD46 FBC_CMD26 T212
VMA_DQ47 AL30 P32 VMA_MA3 VMC_DQ47 F23 G72M/G73M: STUFF
FBAD47 FBA_CMD0 VMA_MA3 18 FBCD47
VMA_DQ48 AE32 FBA U27 VMA_MA0 VMC_DQ48 B23 10K/04
FBAD48 FBA_CMD1 VMA_MA0 18 FBCD48 UMA:NC
VMA_DQ49 AE30 P31 VMA_MA2 VMC_DQ49 A23 E13 VMC_CLK0
FBAD49 FBA_CMD2 VMA_MA2 18 FBCD49 FBC_CLK0 VMC_CLK0 19
VMA_DQ50 AE31 U30 VMA_MA1 VMC_DQ50 C25 F13 VMC_CLK0#
FBAD50 FBA_CMD3 VMA_MA1 18 FBCD50 FBC_CLK0# VMC_CLK0# 19
VMA_DQ51 AD30 Y31 VMA_MA3H VMC_DQ51 C23 F18 VMC_CLK1
FBAD51 FBA_CMD4 VMA_MA3H 18 FBCD51 FBC_CLK1 VMC_CLK1 19
VMA_DQ52 AC31 W32 VMA_MA4H VMC_DQ52 A22 E17 VMC_CLK1# +3V +3V
FBAD52 FBA_CMD5 VMA_MA4H 18 FBCD52 FBC_CLK1# VMC_CLK1# 19
VMA_DQ53 AC32 W31 VMA_MA5H VMC_DQ53 C22
FBAD53 FBA_CMD6 VMA_MA5H 18 FBCD53
VMA_DQ54 AB32 T32 VMA_BA2 VMC_DQ54 C21
FBAD54 FBA_CMD7 T219 FBCD54
VMA_DQ55 AB31 V27 VMA_CS0# VMC_DQ55 B22 C20 FBC_CMD27
FBAD55 FBA_CMD8 VMA_CS0# 18 FBCD55 RFU4 T211
VMA_DQ56 AG27 T28 VMA_WE# VMC_DQ56 E22 D1 G73_D1 R131 R103
FBAD56 FBA_CMD9 VMA_WE# 18 FBCD56 RFU5 T184
VMA_DQ57 AF28 T31 VMA_BA0 VMC_DQ57 D22
FBAD57 FBA_CMD10 VMA_BA0 18 FBCD57
VMA_DQ58 AH28 U32 VMA_CKE VMC_DQ58 D21 F12 VMC_DEBUG *2.2K/04 *2.2K/04
FBAD58 FBA_CMD11 VMA_CKE 18 FBCD58 FBC_DEBUG T79
VMA_DQ59 AG28 W29 VMA_ODT VMC_DQ59 E21
VMA_DQ60 FBAD59 FBA_CMD12 VMA_MA2H VMC_DQ60 FBCD59 VMC_REFCK R137 *0/04 I2CS_SDA
AG29 FBAD60 FBA_CMD13 W30 VMA_MA2H 18 E18 FBCD60 FBC_REFCLK B1
VMA_DQ61 AD27 T27 VMA_MA12 VMC_DQ61 D19 C1 VMC_REFCK# R117 *0/04 I2CS_SCL
FBAD61 FBA_CMD14 VMA_MA12 18 FBCD61 FBC_REFCLK#
VMA_DQ62 AF27 V28 VMA_RAS# VMC_DQ62 D18
FBAD62 FBA_CMD15 VMA_RAS# 18 FBCD62
VMA_DQ63 AE28 V30 VMA_MA11 VMC_DQ63 E19 YELLOW
FBAD63 FBA_CMD16 VMA_MA11 18 FBCD63
U31 VMA_MA10
FBA_CMD17 VMA_MA10 18 BLOCK is
R27 VMA_BA1
FBA_CMD18 VMA_BA1 18
VMA_DM0 M29 V29 VMA_MA8 VMC_DM0 A4 for G8X
FBADQM0 FBA_CMD19 VMA_MA8 18 FBCDQM0
VMA_DM1 M30 T30 VMA_MA9 VMC_DM1 E11 G8 G73_G8
B FBADQM1 FBA_CMD20 VMA_MA9 18 FBCDQM1 FBC_PLLVDD T76 chip B
VMA_DM2 G30 W28 VMA_MA6 VMC_DM2 F5 15mil L23
FBADQM2 FBA_CMD21 VMA_MA6 18 FBCDQM2
VMA_DM3 F29 R29 VMA_MA5 VMC_DM3 C9 G10 FBC_PLLAVDD only
FBADQM3 FBA_CMD22 VMA_MA5 18 FBCDQM3 FBC_PLLAVDD VGA1.2V
VMA_DM4 AA29 R30 VMA_MA7 VMC_DM4 C28
FBADQM4 FBA_CMD23 VMA_MA7 18 FBCDQM4
VMA_DM5 AK30 P29 VMA_MA4 VMC_DM5 F24 G9 C731 C727 C162 *BLM18PG330SN1D/06
FBADQM5 FBA_CMD24 VMA_MA4 18 FBCDQM5 FBC_PLLGND
VMA_DM6 AC30 U28 VMA_CAS# VMC_DM6 C24
FBADQM6 FBA_CMD25 VMA_CAS# 18 FBCDQM6
VMA_DM7 AG30 Y32 VMA_MA13 VMC_DM7 E20 *470P/50V/04 *4700P/25V/04*4.7U/10V/06
FBADQM7 FBA_CMD26 T215 FBCDQM7
P28 VMA_CLK0
FBA_CLK0 VMA_CLK0 18
VMA_WDQS0 L28 R28 VMA_CLK0# VMC_WDQS0 C5
FBADQS_WP0 FBA_CLK0# VMA_CLK0# 18 FBCDQS_WP0
VMA_WDQS1 K31 Y27 VMA_CLK1 VMC_WDQS1 E10 K26 FBCAL_PD R185 *40.2/F/06
FBADQS_WP1 FBA_CLK1 VMA_CLK1 18 FBCDQS_WP1 FBCAL_PD_VDDQ +1.8V
VMA_WDQS2 G32 AA27 VMA_CLK1# VMC_WDQS2 E5 +3V
FBADQS_WP2 FBA_CLK1# VMA_CLK1# 18 FBCDQS_WP2
VMA_WDQS3 G28 VMC_WDQS3 B8 H26 FBCAL_PU R187 *40/F/04
VMA_WDQS4 FBADQS_WP3 VMC_WDQS4 A29 FBCDQS_WP3 FBCAL_PU_GND
AB28 FBADQS_WP4 FBCDQS_WP4
VMA_WDQS5 AL32 VMC_WDQS5 D25 J26 FBCAL_TERM R186 *40.2/F/04 Q51
FBADQS_WP5 FBCDQS_WP5 FBCAL_TERM_GND

2
VMA_WDQS6 AF32 VMC_WDQS6 B25
VMA_WDQS7 FBADQS_WP6 VMC_WDQS7 F20 FBCDQS_WP6 *2N7002E
AH30 FBADQS_WP7 FBCDQS_WP7
RFU2 Y30 FBA_CMD27
T218 5,36,37,41,48 MBDATA 3 1 I2CS_SDA
AC26 G73_AC26
RFU3 T86
VMA_RDQS0 M28 VMC_RDQS0 C6
VMA_RDQS1 FBADQS_RN0 VMA_DEBUG VMC_RDQS1 FBCDQS_RN0
K32 FBADQS_RN1 FBA_DEBUG AC27 T87 E9 FBCDQS_RN1
F_VREF2 filter can be
VMA_RDQS2 G31 GREEN BLOCK can VMC_RDQS2 E6 A28 FB_VREF2 15mil
VMA_RDQS3 FBADQS_RN2 VMA_REFCK VMC_RDQS3 FBCDQS_RN2 FB_VREF2 T213 remove from nvidia +3V
G27 D32 A8
VMA_RDQS4 AA28
FBADQS_RN3 FBA_REFCLK
D31 VMA_REFCK#
T217 remove if use G8X VMC_RDQS4 B29
FBCDQS_RN3 HANK recommend
FBADQS_RN4 FBA_REFCLK# T216 FBCDQS_RN4
VMA_RDQS5 AL31 VMC_RDQS5 E25 G70,G71: Stuff these parts Q52
FBADQS_RN5 FBCDQS_RN5

2
VMA_RDQS6 AF31 C313 *4.7U/10V/06 VMC_RDQS6 A25
VMA_RDQS7 FBADQS_RN6 L27 VGA1.2V VMC_RDQS7 FBCDQS_RN6 G72M,G73M : NC *2N7002E
AH29 FBADQS_RN7 F21 FBCDQS_RN7
C261 *.1U/10V *BLM18PG221SN1D/06 3 1 I2CS_SCL
5,36,37,41,48 MBCLK
G23 H_PLLVDD
FBA_PLLVDD *U_GPU_G3
15mil
A
FBA_PLLAVDD G25 15mil FBA_PLLAVDD L33 A
R604 FB_VREF1 E32
*1K/04 VGA1.2V SI-2 modified for G8X thermal sensor
+1.8V FB_VREF1
G24 C328 *BLM18PG330SN1D/06
C762 FBA_PLLGND C286
R602 *4.7U/10V/06 *.1U/10V
*1K/04 *.1U/10V/04 *U_GPU_G3
YELLOW PROJECT : AT3
Quanta Computer Inc.
G72: Stuff these parts
C315 C322 BLOCK is
G73M : NC *470P/50V/04
*4700P/25V/04 For EMI for G8X
VREF = FBVDDQ * chip only Size Document Number Rev
Custom NVG73M (MEM I/F) 1A
Rbot/(Rtop + Rbot) NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 17 of 48
5 4 3 2 1
5 4 3 2 1

U7
VMA_DQ0
VMA_DQ4
VMA_DQ2
VMA_DQ1
VMA_DQ7
VMA_DQ6
VMA_DQ5
B9
B1
D9
D1
D3
D7
C2
UDQ7
UDQ6
UDQ5
UDQ4
UDQ3
UDQ2
VREF

VDD1
VDD2
J2 VMREFA0

A1
E1
J9
15mil
R200

R211

C358
*1K/F/06

*1K/F/04

*.1U/10V/04
+1.8V
VMA_DQ22
VMA_DQ18
VMA_DQ23
VMA_DQ17
VMA_DQ20
VMA_DQ19
B9
B1
D9
D1
D3
D7
U39
UDQ7
UDQ6
UDQ5
UDQ4
UDQ3
VREF

VDD1
J2

A1
E1
VMREFA0
15mil
17
17
17
17
VMA_CLK0
VMA_CLK0#
VMA_CLK1
VMA_CLK1#

VMA_CKE R601
VMA_CLK0
VMA_CLK0#
VMA_CLK1
VMA_CLK1#

*10K/04
18
VMA_DQ3 UDQ1 VDD3 VMA_DQ16 UDQ2 VDD2
C8 UDQ0 VDD4 M9 C2 UDQ1 VDD3 J9
VMA_DQ15 F9 R1 VMA_DQ21 C8 M9
LDQ7 VDD5 +1.8V UDQ0 VDD4
VMA_DQ14 F1 VMA_DQ31 F9 R1
LDQ6 LDQ7 VDD5 +1.8V
VMA_DQ9 H9 A9 VMA_DQ27 F1
VMA_DQ13 LDQ5 VDDQ1 VMA_DQ26 LDQ6
D
H1 LDQ4 VDDQ2 C1 H9 LDQ5 VDDQ1 A9 D
VMA_DQ11 H3 C3 VMA_DQ30 H1 C1
VMA_DQ8 LDQ3 VDDQ3 VMA_DQ29 LDQ4 VDDQ2
H7 LDQ2 VDDQ4 C7 H3 LDQ3 VDDQ3 C3
VMA_DQ10 G2 C9 VMA_DQ24 H7 C7
VMA_DQ12 LDQ1 VDDQ5 VMA_DQ28 LDQ2 VDDQ4
G8 LDQ0 VDDQ6 E9 G2 LDQ1 VDDQ5 C9
G1 VMA_DQ25 G8 E9
VMA_DM0 VDDQ7 LDQ0 VDDQ6
B3 UDM VDDQ8 G3 VDDQ7 G1
VMA_DM1 F3 G7 VMA_DM2 B3 G3
LDM VDDQ9 VMA_DM3 UDM VDDQ8
VDDQ10 G9 F3 LDM VDDQ9 G7
SI-1 modify (from VMA_WDQS0 B7 G9
VMA_RDQS0 UDQS VMA_WDQS2 VDDQ10
nvidia recommend) A8 UDQS
SI-1 modify (from B7 UDQS
VMA_WDQS1 F7 J1 VMA_RDQS2 A8
VMA_RDQS1 LDQS VDDL nvidia recommend) VMA_WDQS3 UDQS
E8 LDQS F7 LDQS VDDL J1
+1.8V VMA_RDQS3 E8
R744 *1K/F/04 R597 *121/F/04 VMA_CLK0 +1.8V LDQS
J8 CK NC1 A2
R745 *121/F/04 VMA_CLK0# K8 E2 R746 *1K/F/04 R199 *121/F/04 VMA_CLK0 J8 A2
C885 *.01U/16V/04 CK NC2 R747 *121/F/04 VMA_CLK0# CK NC1
NC3 L1 K8 CK NC2 E2
VMA_BA1 L3 R3 C884 *.01U/16V/04 L1
17 VMA_BA1 BA1 NC4 NC3
VMA_BA0 L2 R7 VMA_BA1 L3 R3
17 VMA_BA0 BA0 NC5 BA1 NC4
R8 VMA_BA0 L2 R7
VMA_MA12 NC6 BA0 NC5
17 VMA_MA12
VMA_MA11
R2 A12 G73M: waiting VMA_MA12 NC6 R8
17 VMA_MA11 P7 A11 R2 A12
17 VMA_MA10
VMA_MA10 M2 A3 nvidia VMA_MA11 P7
VMA_MA9 A10 VSS1 VMA_MA10 A11
17 VMA_MA9 P3 A9 VSS2 E3 recommemd M2 A10 VSS1 A3
VMA_MA8 P8 J3 VMA_MA9 P3 E3
17 VMA_MA8 A8 VSS3 A9 VSS2
VMA_MA7 P2 N1 VMA_MA8 P8 J3
17 VMA_MA7 A7 VSS4 A8 VSS3
VMA_MA6 N7 P9 VMA_MA7 P2 N1
17 VMA_MA6 A6 VSS5 A7 VSS4
VMA_MA5 N3 VMA_MA6 N7 P9
17 VMA_MA5 A5 A6 VSS5
VMA_MA4 N8 A7 VMA_MA5 N3
17 VMA_MA4 A4 VSSQ1 A5
VMA_MA3 N2 B2 VMA_MA4 N8 A7
17 VMA_MA3 A3 VSSQ2 A4 VSSQ1
C VMA_MA2 M7 B8 VMA_MA3 N2 B2 C
17 VMA_MA2 A2 VSSQ3 A3 VSSQ2
VMA_MA1 M3 D2 VMA_MA2 M7 B8
17 VMA_MA1 A1 VSSQ4 A2 VSSQ3
VMA_MA0 M8 D8 VMA_MA1 M3 D2
17 VMA_MA0 A0 VSSQ5 A1 VSSQ4
E7 VMA_MA0 M8 D8
VMA_ODT VSSQ6 A0 VSSQ5
VMA_ODT K9 ODT VSSQ7 F2 VSSQ6 E7
VMA_CKE K2 F8 VMA_ODT K9 F2
17 VMA_CKE CKE VSSQ8 ODT VSSQ7
VMA_CS0# L8 H2 VMA_CKE K2 F8
17 VMA_CS0# CS VSSQ9 CKE VSSQ8
VMA_WE# K3 H8 VMA_CS0# L8 H2
17 VMA_WE# WE VSSQ10 CS VSSQ9
VMA_RAS# K7 VMA_WE# K3 H8
17 VMA_RAS# RAS WE VSSQ10
VMA_CAS# L7 J7 VMA_RAS# K7
17 VMA_CAS# CAS VSSDL RAS +1.8V
VMA_CAS# L7 J7
*GDDR2-BGA84 CAS VSSDL C354 C335 C352 C343
*GDDR2-BGA84
*1000P/50V/04*.01U/16V/04 *.1U/10V/04 *10U/4V/06

U40
VMA_DQ43 B9 J2 VMREFA1 R198 *1K/F/04 U8
UDQ7 VREF +1.8V VMREFA1
VMA_DQ47 B1 15mil VMA_DQ59 B9 J2
VMA_DQ41 UDQ6 R201 *1K/F/04 VMA_DQ56 UDQ7 VREF
D9 UDQ5 B1 UDQ6 15mil +1.8V
VMA_DQ45 D1 VMA_DQ58 D9
VMA_DQ40 UDQ4 C348 *.1U/10V/04 VMA_DQ61 UDQ5 C334 C351 C344 C778
D3 UDQ3 VDD1 A1 D1 UDQ4
VMA_DQ42 D7 E1 VMA_DQ62 D3 A1
VMA_DQ46 UDQ2 VDD2 VMA_DQ57 UDQ3 VDD1 *1000P/50V/04*.01U/16V/04 *.1U/10V/04 *10U/4V/06
C2 UDQ1 VDD3 J9 D7 UDQ2 VDD2 E1
VMA_DQ44 C8 M9 VMA_DQ63 C2 J9
VMA_DQ39 UDQ0 VDD4 VMA_DQ60 UDQ1 VDD3
F9 LDQ7 VDD5 R1 +1.8V C8 UDQ0 VDD4 M9
VMA_DQ33 F1 VMA_DQ52 F9 R1
LDQ6 LDQ7 VDD5 +1.8V
VMA_DQ37 H9 A9 VMA_DQ53 F1
VMA_DQ32 LDQ5 VDDQ1 VMA_DQ51 LDQ6
H1 LDQ4 VDDQ2 C1 H9 LDQ5 VDDQ1 A9 +1.8V
VMA_DQ35 H3 C3 VMA_DQ54 H1 C1
VMA_DQ38 LDQ3 VDDQ3 VMA_DQ55 LDQ4 VDDQ2 C779 C355 C345 C340
B
H7 LDQ2 VDDQ4 C7 H3 LDQ3 VDDQ3 C3 B
VMA_DQ34 G2 C9 VMA_DQ49 H7 C7
VMA_DQ36 LDQ1 VDDQ5 VMA_DQ48 LDQ2 VDDQ4 *1000P/50V/04*.01U/16V/04 *.1U/10V/04 *10U/4V/06
G8 LDQ0 VDDQ6 E9 G2 LDQ1 VDDQ5 C9
G1 VMA_DQ50 G8 E9
VMA_DM5 VDDQ7 LDQ0 VDDQ6
B3 UDM VDDQ8 G3 VDDQ7 G1
VMA_DM4 F3 G7 VMA_DM7 B3 G3
LDM VDDQ9 VMA_DM6 UDM VDDQ8
VDDQ10 G9 F3 LDM VDDQ9 G7 +1.8V
SI-1 modify (from VMA_WDQS5 B7 G9
VMA_RDQS5 UDQS VMA_WDQS7 VDDQ10 C350 C329 C349 C337
nvidia recommend) A8 UDQS
SI-1 modify (from B7 UDQS
VMA_WDQS4 F7 J1 VMA_RDQS7 A8
VMA_RDQS4 LDQS VDDL nvidia recommend) VMA_WDQS6 UDQS *1000P/50V/04*.01U/16V/04 *.1U/10V/04 *10U/4V/06
E8 LDQS F7 LDQS VDDL J1
+1.8V VMA_RDQS6 E8
R748 *1K/F/04 R202 *121/F/04 VMA_CLK1 J8 +1.8V LDQS
CK NC1 A2
R749 *121/F/04 VMA_CLK1#K8 E2 R750 *1K/F/04 R189 *121/F/04 VMA_CLK1 J8 A2
C887 *.01U/16V/04 CK NC2 R751 *121/F/04 VMA_CLK1# CK NC1
NC3 L1 K8 CK NC2 E2
VMA_BA1 L3 R3 C886 *.01U/16V/04 L1
BA1 NC4 NC3 17 VMA_DQ[63..0]
VMA_BA0 L2 R7 VMA_BA1 L3 R3
BA0 NC5 VMA_BA0 BA1 NC4
NC6 R8 L2 BA0 NC5 R7 17 VMA_DM[7..0]
VMA_MA12 R2 R8
VMA_MA11 A12 VMA_MA12 NC6
P7 A11 R2 A12 17 VMA_WDQS[7..0]
VMA_MA10 M2 A3 VMA_MA11 P7
VMA_MA9 A10 VSS1 VMA_MA10 A11
P3 A9 VSS2 E3 M2 A10 VSS1 A3 17 VMA_RDQS[7..0]
VMA_MA8 P8 J3 VMA_MA9 P3 E3
VMA_MA7 A8 VSS3 VMA_MA8 A9 VSS2
P2 A7 VSS4 N1 P8 A8 VSS3 J3
VMA_MA6 N7 P9 VMA_MA7 P2 N1
VMA_MA5H A6 VSS5 VMA_MA6 A7 VSS4
17 VMA_MA5H N3 A5 N7 A6 VSS5 P9 256Mb : AKD5JGAT^05
VMA_MA4H N8 A7 VMA_MA5H N3
17 VMA_MA4H
VMA_MA3H A4 VSSQ1 VMA_MA4H A5 512Mb : AKD59G-T^01
17 VMA_MA3H N2 A3 VSSQ2 B2 N8 A4 VSSQ1 A7
VMA_MA2H M7 B8 VMA_MA3H N2 B2
17 VMA_MA2H A2 VSSQ3 A3 VSSQ2
VMA_MA1 M3 D2 VMA_MA2H M7 B8
VMA_MA0 A1 VSSQ4 VMA_MA1 A2 VSSQ3
A M8 A0 VSSQ5 D8 M3 A1 VSSQ4 D2 A
E7 VMA_MA0 M8 D8
VMA_ODT VSSQ6 A0 VSSQ5
K9 ODT VSSQ7 F2 VSSQ6 E7
VMA_CKE K2 F8 VMA_ODT K9 F2
VMA_CS0# CKE VSSQ8 VMA_CKE ODT VSSQ7
L8 CS VSSQ9 H2 K2 CKE VSSQ8 F8
VMA_WE# K3 H8 VMA_CS0# L8 H2
VMA_RAS#
VMA_CAS#
K7
WE
RAS
VSSQ10 VMA_WE#
VMA_RAS#
K3
CS
WE
VSSQ9
VSSQ10 H8 PROJECT : AT3
Quanta Computer Inc.
L7 CAS VSSDL J7 K7 RAS
VMA_CAS# L7 J7
*GDDR2-BGA84 CAS VSSDL
*GDDR2-BGA84
Size Document Number Rev
Custom NVG73M VRAN-1(GDDR2 BGA84) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 18 of 48
5 4 3 2 1
5 4 3 2 1

U36 U5
VMC_DQ3
VMC_DQ2
VMC_DQ4
VMC_DQ0
VMC_DQ7
VMC_DQ6
VMC_DQ1
B9
B1
D9
D1
D3
D7
C2
UDQ7
UDQ6
UDQ5
UDQ4
UDQ3
UDQ2
VREF

VDD1
VDD2
J2 VMREFB0

A1
E1
J9
15mil
R182

R183

C248
*1K/F/06

*1K/F/04

*.1U/10V/04
+1.8V
VMC_DQ17
VMC_DQ20
VMC_DQ16
VMC_DQ21
VMC_DQ23
VMC_DQ18
VMC_DQ22
B9
B1
D9
D1
D3
D7
C2
UDQ7
UDQ6
UDQ5
UDQ4
UDQ3
UDQ2
VREF

VDD1
VDD2
J2 VMREFB0

A1
E1
J9
15mil

VMC_CLK0
19
UDQ1 VDD3 UDQ1 VDD3 17 VMC_CLK0
VMC_DQ5 C8 M9 VMC_DQ19 C8 M9 VMC_CLK0#
UDQ0 VDD4 UDQ0 VDD4 17 VMC_CLK0#
VMC_DQ15 F9 R1 VMC_DQ30 F9 R1 VMC_CLK1
LDQ7 VDD5 +1.8V LDQ7 VDD5 +1.8V 17 VMC_CLK1
VMC_DQ10 F1 VMC_DQ28 F1 VMC_CLK1#
LDQ6 LDQ6 17 VMC_CLK1#
VMC_DQ14 H9 A9 VMC_DQ31 H9 A9
VMC_DQ12 LDQ5 VDDQ1 VMC_DQ24 LDQ5 VDDQ1
D
H1 LDQ4 VDDQ2 C1 H1 LDQ4 VDDQ2 C1 D
VMC_DQ9 H3 C3 VMC_DQ25 H3 C3
VMC_DQ13 LDQ3 VDDQ3 VMC_DQ29 LDQ3 VDDQ3 VMC_CKE R593 *10K/04
H7 LDQ2 VDDQ4 C7 H7 LDQ2 VDDQ4 C7
VMC_DQ8 G2 C9 VMC_DQ26 G2 C9
VMC_DQ11 LDQ1 VDDQ5 VMC_DQ27 LDQ1 VDDQ5
G8 LDQ0 VDDQ6 E9 G8 LDQ0 VDDQ6 E9
VDDQ7 G1 VDDQ7 G1
VMC_DM0 B3 G3 VMC_DM2 B3 G3
VMC_DM1 UDM VDDQ8 VMC_DM3 UDM VDDQ8
F3 LDM VDDQ9 G7 F3 LDM VDDQ9 G7
VDDQ10 G9 VDDQ10 G9
SI-1 modify (from VMC_WDQS0 B7 SI-1 modify (from VMC_WDQS2 B7
VMC_RDQS0 UDQS VMC_RDQS2 UDQS
nvidia recommend) A8 UDQS nvidia recommend) A8 UDQS
VMC_WDQS1 F7 J1 VMC_WDQS3 F7 J1
VMC_RDQS1 LDQS VDDL VMC_RDQS3 LDQS VDDL
E8 LDQS E8 LDQS
+1.8V +1.8V
R752 *1K/F/04 R591 *121/F/04 VMC_CLK0 J8 A2 R753 *1K/F/04 R590 *121/F/04 VMC_CLK0 J8 A2
R754 *121/F/04 VMC_CLK0# CK NC1 R755 *121/F/04 VMC_CLK0# CK NC1
K8 CK NC2 E2 K8 CK NC2 E2
C888 *.01U/16V/04 L1 C889 *.01U/16V/04 L1
VMC_BA1 NC3 VMC_BA1 NC3
17 VMC_BA1 L3 BA1 NC4 R3 L3 BA1 NC4 R3
VMC_BA0 L2 R7 VMC_BA0 L2 R7
17 VMC_BA0 BA0 NC5 BA0 NC5
VMC_MA12 NC6 R8 G73M: waiting VMC_MA12 NC6 R8
17 VMC_MA12 R2 A12 R2 A12
17 VMC_MA11
VMC_MA11 P7 nvidia VMC_MA11 P7
VMC_MA10 A11 VMC_MA10 A11
17 VMC_MA10 M2 A10 VSS1 A3 recommend M2 A10 VSS1 A3
VMC_MA9 P3 E3 VMC_MA9 P3 E3
17 VMC_MA9 A9 VSS2 A9 VSS2
VMC_MA8 P8 J3 VMC_MA8 P8 J3
17 VMC_MA8 A8 VSS3 A8 VSS3
VMC_MA7 P2 N1 VMC_MA7 P2 N1
17 VMC_MA7 A7 VSS4 A7 VSS4
VMC_MA6 N7 P9 VMC_MA6 N7 P9
17 VMC_MA6 A6 VSS5 A6 VSS5
VMC_MA5 N3 VMC_MA5 N3
17 VMC_MA5 A5 A5
VMC_MA4 N8 A7 VMC_MA4 N8 A7
17 VMC_MA4 A4 VSSQ1 A4 VSSQ1
VMC_MA3 N2 B2 VMC_MA3 N2 B2
17 VMC_MA3 A3 VSSQ2 A3 VSSQ2
C VMC_MA2 M7 B8 VMC_MA2 M7 B8 C
17 VMC_MA2 A2 VSSQ3 A2 VSSQ3
VMC_MA1 M3 D2 VMC_MA1 M3 D2
17 VMC_MA1 A1 VSSQ4 A1 VSSQ4
VMC_MA0 M8 D8 VMC_MA0 M8 D8
17 VMC_MA0 A0 VSSQ5 A0 VSSQ5
VSSQ6 E7 VSSQ6 E7
VMC_ODT K9 F2 VMC_ODT K9 F2
VMC_ODT ODT VSSQ7 ODT VSSQ7
VMC_CKE K2 F8 VMC_CKE K2 F8
17 VMC_CKE CKE VSSQ8 CKE VSSQ8
VMC_CS0# L8 H2 VMC_CS0# L8 H2
17 VMC_CS0# CS VSSQ9 CS VSSQ9
VMC_WE# K3 H8 VMC_WE# K3 H8
17 VMC_WE# WE VSSQ10 WE VSSQ10 +1.8V
VMC_RAS# K7 VMC_RAS# K7
17 VMC_RAS# RAS RAS
VMC_CAS# L7 J7 VMC_CAS# L7 J7 C734 C742 C735 C338
17 VMC_CAS# CAS VSSDL CAS VSSDL
*GDDR2-BGA84 *GDDR2-BGA84 *1000P/50V/04*.01U/16V/04 *.1U/10V/04 *10U/4V/06

U38 U6
+1.8V
VMC_DQ32 B9 J2 VMREFB1 R600 *1K/F/06 VMC_DQ51 B9 J2 VMREFB1
UDQ7 VREF +1.8V UDQ7 VREF
VMC_DQ36 B1 15mil VMC_DQ52 B1 15mil C190 C278 C736 C781
VMC_DQ33 UDQ6 R595 *1K/F/04 VMC_DQ48 UDQ6
D9 UDQ5 D9 UDQ5
VMC_DQ37 D1 VMC_DQ54 D1 *1000P/50V/04*.01U/16V/04 *.1U/10V/04 *10U/4V/06
VMC_DQ39 UDQ4 C756 *.1U/10V/04 VMC_DQ55 UDQ4
D3 UDQ3 VDD1 A1 D3 UDQ3 VDD1 A1
VMC_DQ35 D7 E1 VMC_DQ50 D7 E1
VMC_DQ38 UDQ2 VDD2 VMC_DQ53 UDQ2 VDD2
C2 UDQ1 VDD3 J9 C2 UDQ1 VDD3 J9
VMC_DQ34 C8 M9 VMC_DQ49 C8 M9
VMC_DQ43 UDQ0 VDD4 VMC_DQ57 UDQ0 VDD4
F9 LDQ7 VDD5 R1 +1.8V F9 LDQ7 VDD5 R1 +1.8V +1.8V
VMC_DQ41 F1 VMC_DQ63 F1
VMC_DQ46 LDQ6 VMC_DQ58 LDQ6 C761 C777 C747 C728
H9 LDQ5 VDDQ1 A9 H9 LDQ5 VDDQ1 A9
VMC_DQ40 H1 C1 VMC_DQ59 H1 C1
VMC_DQ45 LDQ4 VDDQ2 VMC_DQ60 LDQ4 VDDQ2 *1000P/50V/04*.01U/16V/04 *.1U/10V/04 *10U/4V/06
B
H3 LDQ3 VDDQ3 C3 H3 LDQ3 VDDQ3 C3 B
VMC_DQ47 H7 C7 VMC_DQ61 H7 C7
VMC_DQ42 LDQ2 VDDQ4 VMC_DQ62 LDQ2 VDDQ4
G2 LDQ1 VDDQ5 C9 G2 LDQ1 VDDQ5 C9
VMC_DQ44 G8 E9 VMC_DQ56 G8 E9
LDQ0 VDDQ6 LDQ0 VDDQ6
VDDQ7 G1 VDDQ7 G1 +1.8V
VMC_DM4 B3 G3 VMC_DM6 B3 G3
VMC_DM5 UDM VDDQ8 VMC_DM7 UDM VDDQ8 C324 C780 C303 C738
F3 LDM VDDQ9 G7 F3 LDM VDDQ9 G7
VDDQ10 G9 VDDQ10 G9
SI-1 modify (from VMC_WDQS4 B7 SI-1 modify (from VMC_WDQS6 B7 *1000P/50V/04*.01U/16V/04 *.1U/10V/04 *10U/4V/06
VMC_RDQS4 UDQS VMC_RDQS6 UDQS
nvidia recommend) A8 UDQS nvidia recommend) A8 UDQS
VMC_WDQS5 F7 J1 VMC_WDQS7 F7 J1
VMC_RDQS5 LDQS VDDL VMC_RDQS7 LDQS VDDL
E8 LDQS E8 LDQS
+1.8V +1.8V
VMC_CLK1 17 VMC_DQ[63..0]
R756 *1K/F/04 R596 *121/F/04 VMC_CLK1 J8 A2 R757 *1K/F/04 R599 *121/F/04 J8 A2
R758 *121/F/04 VMC_CLK1# CK NC1 R759 *121/F/04 VMC_CLK1# CK NC1
K8 CK NC2 E2 K8 CK NC2 E2 17 VMC_DM[7..0]
C891 *.01U/16V/04 L1 C890 *.01U/16V/04 L1
VMC_BA1 NC3 VMC_BA1 NC3
L3 BA1 NC4 R3 L3 BA1 NC4 R3 17 VMC_WDQS[7..0]
VMC_BA0 L2 R7 VMC_BA0 L2 R7
BA0 NC5 BA0 NC5
NC6 R8 NC6 R8 17 VMC_RDQS[7..0]
VMC_MA12 R2 VMC_MA12 R2
VMC_MA11 A12 VMC_MA11 A12
P7 A11 P7 A11
VMC_MA10 M2 A3 VMC_MA10 M2 A3
VMC_MA9 A10 VSS1 VMC_MA9 A10 VSS1
P3 A9 VSS2 E3 P3 A9 VSS2 E3 256Mb : AKD5JGAT^05
VMC_MA8 P8 J3 VMC_MA8 P8 J3
VMC_MA7 A8 VSS3 VMC_MA7 A8 VSS3 512Mb : AKD59G-T^01
P2 A7 VSS4 N1 P2 A7 VSS4 N1
VMC_MA6 N7 P9 VMC_MA6 N7 P9
VMC_MA5H A6 VSS5 VMC_MA5H A6 VSS5
17 VMC_MA5H N3 A5 N3 A5
VMC_MA4H N8 A7 VMC_MA4H N8 A7
17 VMC_MA4H A4 VSSQ1 A4 VSSQ1
VMC_MA3H N2 B2 VMC_MA3H N2 B2
17 VMC_MA3H A3 VSSQ2 A3 VSSQ2
VMC_MA2H M7 B8 VMC_MA2H M7 B8
17 VMC_MA2H A2 VSSQ3 A2 VSSQ3
A VMC_MA1 M3 D2 VMC_MA1 M3 D2 A
VMC_MA0 A1 VSSQ4 VMC_MA0 A1 VSSQ4
M8 A0 VSSQ5 D8 M8 A0 VSSQ5 D8
VSSQ6 E7 VSSQ6 E7
VMC_ODT K9 F2 VMC_ODT K9 F2
VMC_CKE ODT VSSQ7 VMC_CKE ODT VSSQ7
K2 CKE VSSQ8 F8 K2 CKE VSSQ8 F8
VMC_CS0# L8 H2 VMC_CS0# L8 H2
VMC_WE#
VMC_RAS#
K3
CS
WE
VSSQ9
VSSQ10 H8 VMC_WE#
VMC_RAS#
K3
CS
WE
VSSQ9
VSSQ10 H8 PROJECT : AT3
Quanta Computer Inc.
K7 RAS K7 RAS
VMC_CAS# L7 J7 VMC_CAS# L7 J7
CAS VSSDL CAS VSSDL
*GDDR2-BGA84 *GDDR2-BGA84
Size Document Number Rev
Custom NVG73M VREM-2(GDDR2 BGA84) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 19 of 48
5 4 3 2 1
5 4 3 2 1

U37F U37A 500mA


VGACORE

20
45,47 VGACORE
AA12 D4 PEG_RXP0 C134 *.1U/10V/04 C_PEG_RXP0 AJ15 AD23
GND_0 GND_80 7 PEG_RXP0 PEX_TX0 PEX_IOVDD_0 VGA1.2V
AA2 D7 PEG_RXN0 C147 *.1U/10V/04 C_PEG_RXN0 AK15 AF23 C276 *.1U/10V/04 15,17,46,47 VGA1.2V VGA1.2V
GND_1 GND_81 7 PEG_RXN0 PEX_TX0# PEX_IOVDD_1
AA21 F11 AF24 C302 *.1U/10V
GND_2 GND_82 PEG_RXP1 C166 *.1U/10V/04 C_PEG_RXP1 PEX_IOVDD_2 C296 *1U/6.3V/04
AA31 GND_3 GND_83 F14 7 PEG_RXP1 AH16 PEX_TX1 PEX_IOVDD_3 AF25 PLACE NEAR GPU
AB27 F19 PEG_RXN1 C158 *.1U/10V/04 C_PEG_RXN1 AG16 AG24 C304 *1U/6.3V
GND_4 GND_84 7 PEG_RXN1 PEX_TX1# PEX_IOVDD_4
AB6 F2 AG25 C757 *4.7U/10V/08
GND_5 GND_85 PEG_RXP2 C182 *.1U/10V/04 C_PEG_RXP2 PEX_IOVDD_5
AC10 GND_6 GND_86 F22 7 PEG_RXP2 AG17 PEX_TX2
AC23 F25 PEG_RXN2 C168 *.1U/10V/04 C_PEG_RXN2 AH17
GND_7 GND_87 7 PEG_RXN2 PEX_TX2#
AC29 GND_8 GND_88 F31 PEX_IOVDDQ_0 AC16 VGA1.2V
AC4 F8 PEG_RXP3 C195 *.1U/10V/04 C_PEG_RXP3 AG18 AC17 1500mA
GND_9 GND_89 7 PEG_RXP3 PEX_TX3 PEX_IOVDDQ_1
AD16 G26 PEG_RXN3 C207 *.1U/10V/04 C_PEG_RXN3 AH18 AC21 C226 *.1U/10V/04
GND_10 GND_90 7 PEG_RXN3 PEX_TX3# PEX_IOVDDQ_2
AD17 G29 AC22 C192 *.1U/10V
GND_11 GND_91 PEG_RXP4 C194 *.1U/10V/04 C_PEG_RXP4 PEX_IOVDDQ_3 C259 *0.47U/10V/06
AD2 GND_12 GND_92 G4 7 PEG_RXP4 AK18 PEX_TX4 PEX_IOVDDQ_4 AE18
D AD31 G7 PEG_RXN4 C186 *.1U/10V/04 C_PEG_RXN4 AJ18 AE21 C244 *.47U/10V/06 D
GND_13 GND_93 7 PEG_RXN4 PEX_TX4# PEX_IOVDDQ_5
AE17 H27 AE22 C275 *1U/6.3V/04 PLACE NEAR GPU G8X Total power consumption
GND_14 GND_94 PEG_RXP5 C220 *.1U/10V/04 C_PEG_RXP5 PEX_IOVDDQ_6 C225 *1U/6.3V/04
AE27 GND_15 GND_95 H6 7 PEG_RXP5 AJ19 PEX_TX5 PEX_IOVDDQ_7 AF12
AE6 J16 PEG_RXN5 C208 *.1U/10V/04 C_PEG_RXN5 AH19 AF18 C233 *10U/4V/06 1.NVDD CORE POWER 1.2 - 1.0
GND_16 GND_96 7 PEG_RXN5 PEX_TX5# PEX_IOVDDQ_8
AF11 J17 AF21 C234 *.1U/10V/04 -- 11.01A
GND_17 GND_97 PEG_RXP6 C228 *.1U/10V/04 C_PEG_RXP6 PEX_IOVDDQ_9 C277 *.1U/10V/04
AF26 GND_18 GND_98 J2 7 PEG_RXP6 AG20 PEX_TX6 PEX_IOVDDQ_10 AF22
AF29 J31 7 PEG_RXN6
PEG_RXN6 C221 *.1U/10V/04 C_PEG_RXN6 AH20 2.PCIE VGA1.2V -- 1.75A
GND_19 GND_99 PEX_TX6#
PEG_RXP7 C236 *.1U/10V/04 C_PEG_RXP7 VGACORE
3.FBVDDQ 1.8V ----- 3.12A
AF4 GND_20 GND_100 K10 7 PEG_RXP7 AG21 PEX_TX7 VDD_0 K16
AF7 GND_21 GND_101 K23 7 PEG_RXN7
PEG_RXN7 C229 *.1U/10V/04 C_PEG_RXN7 AH21 PEX_TX7# VDD_1 K17 4.VDD I/O 3.3V ---- 0.49A
AG10 K29 N13 C211 *.1U/10V
AG11
GND_22 GND_102
K4 PEG_RXP8 C249 *.1U/10V/04 C_PEG_RXP8 AK21
VDD_2
N14 C210 *.1U/10V 5.PLL 2.5V ---
GND_23 GND_103 7 PEG_RXP8 PEX_TX8 VDD_3
AG14 L27 PEG_RXN8 C240 *.1U/10V/04 C_PEG_RXN8 AJ21 N16 C219 *.1U/10V
GND_24 GND_104 7 PEG_RXN8 PEX_TX8# VDD_4
AG15 L6 N17 C238 *.1U/10V
GND_25 GND_105 PEG_RXP9 C250 *.1U/10V/04 C_PEG_RXP9 VDD_5 C239 *.1U/10V
AG19 GND_26 GND_106 M12 7 PEG_RXP9 AJ22 PEX_TX9 VDD_6 N19
AG2 M2 PEG_RXN9 C260 *.1U/10V/04 C_PEG_RXN9 AH22 P13 C255 *10U/4V/06
GND_27 GND_107 7 PEG_RXN9 PEX_TX9# VDD_7
AG22 M31 P14 C231 *.1U/10V
GND_28 GND_108 PEG_RXP10 C262 *.1U/10V/04 C_PEG_RXP10 AG23 VDD_8 C254 *1U/6.3V/04
AG31 GND_29 GND_109 N15 7 PEG_RXP10 PEX_TX10 VDD_9 P16 power up sequence
AG8 N18 PEG_RXN10 C271 *.1U/10V/04 C_PEG_RXN10 AH23 P17 C246 *.1U/10V
GND_30 GND_110 7 PEG_RXN10 PEX_TX10# VDD_10
AH24 N29 P19 C247 *.1U/10V PLACE NEAR GPU
GND_31 GND_111 PEG_RXP11 C280 *.1U/10V/04 C_PEG_RXP11 AK24 VDD_11 C253 *.1U/10V/04
AJ10 GND_32 GND_112 N4 7 PEG_RXP11 PEX_TX11 VDD_12 R16
AJ13 P15 PEG_RXN11 C273 *.1U/10V/04 C_PEG_RXN11 AJ24 R17 C232 *.1U/10V
GND_33 GND_113 7 PEG_RXN11 PEX_TX11# VDD_13
AJ16 P18 T14 C237 *10U/4V/06
GND_34 GND_114 PEG_RXP12 C293 *.1U/10V/04 C_PEG_RXP12 AJ25 VDD_15 C214 *.47U/10V/06
AJ17 GND_35 GND_115 P27 7 PEG_RXP12 PEX_TX12 VDD_16 T15 I/O 3.3V
AJ20 P6 PEG_RXN12 C281 *.1U/10V/04 C_PEG_RXN12 AH25 T18 C264 *.47U/10V/06
GND_36 GND_116 7 PEG_RXN12 PEX_TX12# VDD_17
AJ23 R13 T19 C185 *.47U/10V/06 NVCORE
GND_37 GND_117 PEG_RXP13 C299 *.1U/10V/04 C_PEG_RXP13 AH26 VDD_18 C270 *.47U/10V/06
AJ26 GND_38 GND_118 R14 7 PEG_RXP13 PEX_TX13 VDD_19 U13
AJ29 R15 PEG_RXN13 C295 *.1U/10V/04 C_PEG_RXN13 AG26 1.8VFBDDQ
GND_39 GND_119 7 PEG_RXN13 PEX_TX13#
AJ4 R18 PEG_RXP14 C751 *.1U/10V/04 C_PEG_RXP14 AK27 U14 C203 *1U/6.3V
GND_40 GND_120 7 PEG_RXP14 PEX_TX14 VDD_20
AJ7 R19 PEG_RXN14 C750 *.1U/10V/04 C_PEG_RXN14 AJ27 U15 C218 *1U/6.3V 1.2V
GND_41 GND_121 7 PEG_RXN14 PEX_TX14# VDD_21
AK2 R2 U18 C224 *.47U/10V/06
C GND_42 GND_122 PEG_RXP15 C753 *.1U/10V/04 C_PEG_RXP15 AJ28 VDD_22 C243 *.47U/10V/06 C
AK28 GND_43 GND_123 R20 7 PEG_RXP15 PEX_TX15 VDD_23 U19
AK31 R31 PEG_RXN15 C752 *.1U/10V/04 C_PEG_RXN15 AH27 V16 C252 *.47U/10V/06 2.5V
GND_44 GND_124 7 PEG_RXN15 PEX_TX15# VDD_24
AL11 T16 V17 C205 *.47U/10V/06
GND_45 GND_125 PEG_TXP_C0 VDD_25 C263 *.47U/10V/06
AL14 GND_46 GND_126 T17 7 PEG_TXP_C0 AK13 PEX_RX0 VDD_26 W13
AL19 T24 PEG_TXN_C0 AK14 W14 C269 *.47U/10V/06
GND_47 GND_127 7 PEG_TXN_C0 PEX_RX0# VDD_27
AL22 T29 W16 C223 *10U/4V/06
GND_48 GND_128 PEG_TXP_C1 VDD_28
AL25 GND_49 GND_129 T4 7 PEG_TXP_C1 AM14 PEX_RX1 PCIE VDD_29 W17
AL3 U16 PEG_TXN_C1 AM15 W19
GND_50 GND_130 7 PEG_TXN_C1 PEX_RX1# VDD_30
AL6 GND_51 GND_131 U17 VDD_31 Y13
AL9 U24 PEG_TXP_C2 AL15 Y14
GND_52 GND_132 7 PEG_TXP_C2 PEX_RX2 VDD_32
AM13 U29 PEG_TXN_C2 AL16 Y16
GND_53 GND_133 7 PEG_TXN_C2 PEX_RX2# VDD_33
AM16 U8 Y17 C916 *.1U/10V/04
GND_54 GND_134 PEG_TXP_C3 VDD_34
AM17 GND_55 GND_135 V13 7 PEG_TXP_C3 AK16 PEX_RX3 VDD_35 Y19
AM20 V14 PEG_TXN_C3 AK17 Y20 C917 *.1U/10V/04
GND_56 GND_136 7 PEG_TXN_C3 PEX_RX3# VDD_36
AM23 GND_57 GND_137 V15
AM26 V18 PEG_TXP_C4 AL17
GND_58 GND_138 7 PEG_TXP_C4 PEX_RX4
AM29 V19 PEG_TXN_C4 AL18 P20
GND_59 GND_139 7 PEG_TXN_C4 PEX_RX4# VDD_LP_0
VDD_LP_1 T20
B12 V2 PEG_TXP_C5 AM18 T23
GND_60 GND_140 7 PEG_TXP_C5 PEX_RX5 VDD_LP_2
B15 V20 PEG_TXN_C5 AM19 U20 For 3.3V swing, we can remove R97,
GND_61 GND_141 7 PEG_TXN_C5 PEX_RX5# VDD_LP_3
B18 GND_62 GND_142 V31 VDD_LP_4 U23 R104 and R98 and replace R? with 0 Ohm
B21 W15 PEG_TXP_C6 AK19 W20
GND_63 GND_143 7 PEG_TXP_C6 PEX_RX6 VDD_LP_5 resistor.
B24 W18 PEG_TXN_C6 AK20
GND_64 GND_144 7 PEG_TXN_C6 PEX_RX6#
B27 W27 N20 VDD_SENSE
GND_65 GND_145 VDD_SENSE T84
B3 W6 PEG_TXP_C7 AL20 M21 GND_SENSE +3V
GND_66 GND_146 7 PEG_TXP_C7 PEX_RX7 GND_SENSE T85
B30 Y15 PEG_TXN_C7 AL21
GND_67 GND_147 7 PEG_TXN_C7 PEX_RX7#
B6 GND_68 GND_148 Y18

1
B9 Y29 PEG_TXP_C8 AM21
GND_69 GND_149 7 PEG_TXP_C8 PEX_RX8
C2 Y4 PEG_TXN_C8 AM22 AC11 VGA_VDD3 R126 *0/08 D3 R114
GND_70 GND_150 7 PEG_TXN_C8 PEX_RX8# VDD33_0 +3V
C31 AL10 AC12 *24.3K/F/04
GND_71 GND_151 PEG_TXP_C9 VDD33_1 C140 *.1U/10V *CH501H-40PT L-F
D10 GND_72 GND_152 AM10 7 PEG_TXP_C9 AK22 PEX_RX9 VDD33_2 AC24
D13 AG13 PEG_TXN_C9 AK23 AD24 C141 *.1U/10V
B GND_73 GND_153 7 PEG_TXN_C9 PEX_RX9# VDD33_3 B
C138 *.1U/10V SPDIF_VGA C948 *.01U/16V/04

2
D16 GND_74 VDD33_4 AE11 SPDIF 29,38
D17 PEG_TXP_C10 AL23 AE12 C292 *.47U/10V/06 PLACE NEAR GPU
GND_75 7 PEG_TXP_C10 PEX_RX10 VDD33_5

1
D20 PEG_TXN_C10 AL24 H7 C188 *.47U/10V/06
GND_76 7 PEG_TXN_C10 PEX_RX10# VDD33_6
D23 J7 C170 *.47U/10V/06 D2 R106
GND_77 PEG_TXP_C11 VDD33_7 C139 *1U/6.3V *3.4K/F/06 R123
D26 GND_78 7 PEG_TXP_C11 AM24 PEX_RX11 VDD33_8 K7
D29 PEG_TXN_C11 AM25 L10 *CH501H-40PT L-F *76.8/F/04
GND_79 7 PEG_TXN_C11 PEX_RX11# VDD33_9
VDD33_10 L7
PEG_TXP_C12

2
7 PEG_TXP_C12 AK25 PEX_RX12 VDD33_11 L8 180mA
*U_GPU_G3 PEG_TXN_C12 AK26 M10
7 PEG_TXN_C12 PEX_RX12# VDD33_12 L9 *10nH/06
15mil VGA1.2V
PEG_TXP_C13 AL26
7 PEG_TXP_C13 PEX_RX13
7 PEG_TXN_C13
PEG_TXN_C13 AL27 PEX_RX13# PEX_PLLAVDD AF15 PEX_PLLAVDD C200 *1U/6.3V/04
PEX_PLLDVDD AE15 PEX_PLLDVDD C206 *.01U/16V/04 SI-1 modify ( change part
PEG_TXP_C14 AM27 AE16 C199 *.1U/10V/04
+3V
7 PEG_TXP_C14
PEG_TXN_C14 PEX_RX14 PEX_PLLGND 15mil C61 *4.7U/X5R/06
number )
7 PEG_TXN_C14 AM28 PEX_RX14# 20mA
PEG_TXP_C15 AL28 L18 *10nH/06
7 PEG_TXP_C15 PEX_RX15 VGA1.2V
PEG_TXN_C15 AL29 C82 *1U/6.3V/04
7 PEG_TXN_C15 PEX_RX15# C217 *.01U/16V/04 PLACE NEAR GPU
C98 C201 *.1U/10V/04
*1U/6.3V/06 CLK_PCIE_VGA AH14 15mil C83 *4.7U/X5R/06
2 CLK_PCIE_VGA PEX_REFCLK
U3 CLK_PCIE_VGA# AJ14 T13 NV_PLLAVDD
2 CLK_PCIE_VGA# PEX_REFCLK# NV_PLLAVDD VGACORE
5

PLT_RST-R# 2 R138 *100/04 SI-2 modify for Nvidia requests


7,22 PLT_RST-R#
4 VGA_RST# AH15 C202 *.1U/10V
PEX_RST# C142 *10U/4V/06
1 NC_0 AM8 del R823,R824
NC_1 AM9
*TC7SH08FU VGA_RFU0 AG12 B32
T82 RFU0 NC_2
R587 VGA_RFU1
3

T80 AH13 RFU1


*10K/04

PEX_TSTCK AM12
A T200 PEX_TSTCLK_OUT A
PEX_TSTCK# AM11 J6 SPDIF_VGA
T197 PEX_TSTCLK_OUT# SPDIF
R139 *0/04

*U_GPU_G3

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom NVG73M (PCIE I/F) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 20 of 48
5 4 3 2 1
5 4 3 2 1

Place near to Mini-door CKL:C1/C2: 18pF -> CL:12.5pF


RTC VCCRTC

21
C804 C1/C: 10pF -> CL Value =
1U/16V/06 8.5pF
VCCRTC
3VPCU
D41
CH500H-40 R638
20K/06 C820 CLK_32KX1
VCCRTC_2 15P/50V/04 +3V +3V
1

2
1
BT1 D42

1
BAT_CONNR635 CH500H-40 C811 G2 Y6 R663
1K/06 1U/16V/06 *SHORT_ PAD1 10M/06
R637 32.768KHZ R447 R648
2

D 1M/F/06 U42A 10K/06 10K/06 D

3
4
AG25 RTCX1 FWH0/LAD0 E5 LAD0 37,39,48
C817 CLK_32KX2 AF24 F5 RCIN#
RTCX2 FWH1/LAD1 LAD1 37,39,48 +1.05V
15P/50V/04 G8 GATEA20
FWH2/LAD2 LAD2 37,39,48
RTCRST# AF23 F6
RTCRST# FWH3/LAD3 LAD3 37,39,48
SM_INTRUDER# AD22 C4 +1.05V
1
2

INTRUDER# FWH4/LFRAME# LFRAME# 37,39,48

RTC
LPC
ICH_INTVRMEN AF25 G9 LDRQ#0
INTVRMEN LDRQ0# T116
LAN100_SLP AD21 E6 LDRQ#1 R409 R449
LAN100_SLP LDRQ1#/GPIO23 T230
CN30 *56/F/06 *56/F/06
*CWY020-B0G1Z LAN_JCLK B24 AF13 GATEA20
GLAN_CLK A20GATE GATEA20 37,48
T234 AG26 R442
A20M# H_A20M# 3
LAN_RSTSYNC D22 56/F/06
T102 LAN_RSTSYNC H_DPRSTP#_R R439 0/06
DPRSTP# AF26 H_DPRSTP# 3,7,44
LAN_RXD0 C21 AE26 H_DPSLP#_R R415 0/F/06
LAN_RXD0 DPSLP# H_DPSLP# 3
T104 LAN_RXD1 B21
T233 LAN_RXD2 LAN_RXD1
C22 LAN_RXD2 FERR# AD24 H_FERR# 3

LAN / GLAN
5VPCU T226
20MIL 20MIL LAN_TXD0 D21 AG29 R432 0/F/06
H_PWRGD 3
+1.05V
Q42 T105 LAN_TXD1 LAN_TXD0 CPUPWRGD/GPIO49
E20 LAN_TXD1
R625 *1.2K/06
VCCRTC_1 R628 *1K/06
VCCRTC_3 3 1 T112 LAN_TXD2 C20 AF27
LAN_TXD2 IGNNE# H_IGNNE# 3
T99
*MMBT3904 AH21 AE24
GLAN_DOCK#/GPIO13 INIT# H_INIT# 3

2
R626 T145 AC20
INTR H_INTR 3

CPU
R334 24.9/F/04 GLAN_COMP_SB RCIN# SI-2 add for R849
2

+1.5V_PCIE D25 GLAN_COMPI RCIN# AH14 RCIN# 37,48


*4.7K/06 C25 GLAN_COMPO
AD23
fix ESD 56/04
NMI H_NMI 3
ACZ_BCLK AJ16 AG28 H_SMI#_R R425 0/F/06 issue
HDA_BIT_CLK SMI# H_SMI# 3
ACZ_SYNC

1
AJ15 HDA_SYNC
STPCLK# AA24 H_STPCLK# 3
R629 ACZ_RST# AE14
C HDA_RST# H_THERMTRIP_R R406 24.9/F/06 C
THRMTRIP# AE27 PM_THRMTRIP# 3,7
*15K/06 add RTC Bat rechargeable circuit ACZ_SDIN0 AJ17
29 ACZ_SDIN0 HDA_SDIN0
ACZ_SDIN1 AH17 AA23
31 ACZ_SDIN1 HDA_SDIN1 TP8 T127 PDD[15:0] 32
ACZ_SDIN2 AH15 HDA_SDIN2

IHDA
T255 ACZ_SDIN3 AD13 V1 PDD0
T132 HDA_SDIN3 DD0 PDD1
DD1 U2 Should be 2" close ICH7
ACZ_SDOUT AE13 V3 PDD2
HDA_SDOUT DD2 PDD3 C560
DD3 T1
AE10 V4 PDD4
33 LAN_DISABLE# HDA_DOCK_EN#/GPIO33 DD4
AG14 T5 PDD5 *SFI0603-050E101NP/06
+3V R691 10K/06 T143 HDA_DOCK_RST#/GPIO34 DD5 PDD6
DD6 AB2
SATA_LED# AF10 T6 PDD7
36 SATA_LED# SATALED# DD7
T3 PDD8
C576 3900P/25V/04 SATA_RXN0_C DD8 PDD9
32 SATA_RXN0 AF6 SATA0RXN DD9 R2
C577 3900P/25V/04 SATA_RXP0_C AF5 T4 PDD10
32 SATA_RXP0 SATA0RXP DD10
CKL:1n ~ 20nF C587 3900P/25V/04 SATA_TXN0_C AH5 V6 PDD11 ACZ_SDOUT R654 33/04
32 SATA_TXN0 SATA0TXN DD11 ACZ_SDOUT_AUDIO 29
C590 3900P/25V/04 SATA_TXP0_C AH6 V5 PDD12
32 SATA_TXP0 SATA0TXP DD12
U1 PDD13
DD13 PDD14 C814
AG3 SATA1RXN DD14 V2
SI-1 T244 AG4 U6 PDD15 *10P/50V/04
SATA1RXP DD15

IDE
CKL:1n ~ 20nF T243 AJ4
modified SATA1TXN PDA[2:0] 32
T135 AJ3 AA4 PDA0
T136 SATA1TXP DA0 PDA1 ACZ_SYNC R649 33/04
DA1 AA1 ACZ_SYNC_AUDIO 29

SATA
C597 3900P/25V/04 SATA_RXN2_C AF2 AB3 PDA2
35 SATA_RXN2 SATA2RXN DA2
C600 3900P/25V/04 SATA_RXP2_C AF1
35 SATA_RXP2 SATA2RXP
C606 3900P/25V/04 SATA_TXN2_C AE4 Y6 C816
35 SATA_TXN2 SATA2TXN DCS1# PDCS1# 32
C609 3900P/25V/04 SATA_TXP2_C AE3 Y5 *10P/50V/04
35 SATA_TXP2 SATA2TXP DCS3# PDCS3# 32

2 CLK_PCIE_SATA# AB7 SATA_CLKN DIOR# W4 PDIOR# 32


2 CLK_PCIE_SATA AC6 SATA_CLKP DIOW# W3 PDIOW# 32
Y2 ACZ_BCLK R653 33/04
DDACK# PDDACK# 32 BIT_CLK_AUDIO 29
AG1 Y3 IRQ14
B SATARBIAS# IDEIRQ IRQ14 32 B
R655 24.9/F/06 SATA_BIAS AG2 Y1 PDIORDY
SATARBIAS IORDY PDIORDY 32
Place within W5 C813
DDREQ PDDREQ 32
25mils/15mils *10P/50V/04
500 mils of ICH8M REV 1.0
ICH7
ACZ_RST# R646 33/04
ACZ_RST#_AUDIO 29
intel check list
SB Strap define to stuff
XOR Chain Entrance Strap 33ohm
ICH8-M Internal VR Enable ACZ_SDOUT R639 33/04
ACZ_SDOUT_AUDIO_MDC 31
strap ICH_RSV0 HDA_SDOUT Description C807
(Internal VR for ICH8-M LAN100_SLP Strap *10P/50V/04

Vccsus1_05,VccSus1_5 and (Internal VR for VccLAN1_05 and 0 0 RSVD


VccCL1_5) VccCL1.05)
ACZ_SYNC R640 33/04
ACZ_SYNC_AUDIO_MDC 31
Low = Internal VR disable 0 1 Enter XOR Chain
Low = Internal VR disable LAN100_SLP High = Internal VR
INTVRMEN High = Internal VR enable(Default) C809
enable(Default) 1 0 Normal opration(Default) *10P/50V/04

1 1 Set PCIE port config bit 1


ACZ_BCLK R643 33/04
BIT_CLK_AUDIO_MDC 31
VCCRTC VCCRTC +3V
C810
*10P/50V/04

A A
R443 R444 R644 ACZ_RST# R645 33/04
ACZ_RST#_AUDIO_MDC 31
332K/F/06 332K/F/06 *1K/06

ICH_INTVRMEN LAN100_SLP ACZ_SDOUT


ICH_TP3 23

R417 R414
PROJECT : AT3
*0 *0
R428
Quanta Computer Inc.
*1K
Size Document Number Rev
Custom ICH7-M HOST(1/4) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 21 of 48
5 4 3 2 1
5 4 3 2 1

+3V

MINI CARD PCI-E


39
39
39
PCIE_RXN0
PCIE_RXP0
PCIE_TXN0
C805
C802
.1U/10V/04
.1U/10V/04
PCIE_TXN0_C
PCIE_TXP0_C
P27
P26
N29
N28
U42D
PERN1
PERP1
PETN1
DMI0RXN
DMI0RXP
DMI0TXN
V27
V26
U29
U28
DMI_RXN0
DMI_RXP0
DMI_TXN0
7
7
7
STOP#
REQ2#
FRAME#
6
7
8
RP61
5
4
3
REQ3#
INTD#
22

Direct Media Interface


39 PCIE_TXP0 PETP1 DMI0TXP DMI_TXP0 7
REQ1# 9 2 DEVSEL#
M27 Y27 +3V 10 1 TRDY#
35 PCIE_RXN1 PERN2 DMI1RXN DMI_RXN1 7
35 PCIE_RXP1 M26 PERP2 DMI1RXP Y26 DMI_RXP1 7
C800 .1U/10V/04 PCIE_TXN1_C 8.2KX8
EXPRESS CARD (NEW CARD) 35 PCIE_TXN1
C799 .1U/10V/04 PCIE_TXP1_C
L29
L28
PETN2 DMI1TXN W29
W28
DMI_TXN1 7
+3V
35 PCIE_TXP1 PETP2 DMI1TXP DMI_TXP1 7
RP62

PCI-Express
39 PCIE_RXN5 K27 PERN3 DMI2RXN AB26 DMI_RXN2 7
SERR#
D MINI CARD PCI-E
SI-2 Add
39 PCIE_RXP5
C906 .1U/10V/04 PCIE_TXN5_C
K26
J29
PERP3 DMI2RXP AB25
AA29
DMI_RXP2 7
IRDY#
6
7
5
4
D
39 PCIE_TXN5 PCIE_TXP5_C PETN3 DMI2TXN DMI_TXN2 7
C907 .1U/10V/04 J28 AA28 PERR# 8 3 REQ0#
for 39 PCIE_TXP5 PETP3 DMI2TXP DMI_TXP2 7
LOCK# INTG#
9 2
support T118 PCIE_RXN3 H27 AD27 +3V 10 1 INTF#
PERN4 DMI3RXN DMI_RXN3 7
RBSON T117 PCIE_RXP3 H26 AD26 +1.5V
PERP4 DMI3RXP DMI_RXP3 7
T239 PCIE_TXN3 G29 AC29 8.2KX8
card PETN4 DMI3TXN DMI_TXN3 7
T240 PCIE_TXP3 G28 AC28 +3V
PETP4 DMI3TXP DMI_TXP3 7
RP63
T113 PCIE_RXN4 F27 T26
PERN5 DMI_CLKN CLK_PCIE_ICH# 2
T115 PCIE_RXP4 F26 T25 R379 INTA# 6 5
PERP5 DMI_CLKP CLK_PCIE_ICH 2
T238 PCIE_TXN4 E29 24.9/F/06 7 4 INTE#
T237 PCIE_TXP4 PETN5 INTC#
E28 PETP5 DMI_ZCOMP Y23 15/15mils 8 3
Y24 DRI_IRCOMP_R Place within 500 9 2 INTB#
DMI_IRCOMP INTH#
33 PCIE_RXN2_LAN D27 PERN6/GLAN_RXN
mils of ICH7 +3V 10 1
33 PCIE_RXP2_LAN D26 PERP6/GLAN_RXP USBP0N G3 USBP0- 32
C795 .1U/10V/04 PCIE_TXN2_C USB Connector 8.2KX8
PCIE-LAN 33 PCIE_TXN2_LAN
C797 .1U/10V/04 PCIE_TXP2_C
C29
C28
PETN6/GLAN_TXN USBP0P G2
H5
USBP0+ 32
33 PCIE_TXP2_LAN PETP6/GLAN_TXP USBP1N USBP1- 32
USBP1P H4 USBP1+ 32 USB Connector
T106 C23 H2
SPI_CLK USBP2N USBP2- 32
T232 B23 H1 FINGERPRINT
SPI_CS0# USBP2P USBP2+ 32 RP53
T109 SPI_CS1# E22 J3
SPI_CS1# USBP3N USBP3- 32

SPI
J2 Carama USB USBOC#2 6 5
USBP3P USBP3+ 32
T111 D23 K5 USBOC#4 7 4 USBOC#1
SPI_MOSI USBP4N USBP4- 38
F21 K4 Docking SI-2-1 USBOC#6 8 3 USBOC#7
SPI_MISO USBP4P USBP4+ 38
T114 K2 USBOC#3 9 2 USBOC#0
USBP5N USBP5- 35
T148 USBOC#0 AJ19 OC0# USBP5P K1 USBP5+ 35 BLUETOOTH swaped 3VSUS 10 1 USBOC#5
T253 USBOC#1 AG16 L3 for fix
OC1#/GPIO40 USBP6N USBP6- 39
T247 USBOC#2 WWAN
T137 USBOC#3
AG15
AE15
OC2#/GPIO41 USB USBP6P L2
M5
USBP6+ 39 dash 10P8R-10K
OC3#/GPIO42 USBP7N USBP7- 35
C T140 USBOC#4 AF15 M4 NEW CARD issue C
OC4#/GPIO43 USBP7P USBP7+ 35
T146 USBOC#5 AG17 M2 USBOC#8 R676 10K/04 3VSUS
OC5#/GPIO29 USBP8N USBP8- 35
T129 USBOC#6 AD12 M1 USB Connector
OC6#/GPIO30 USBP8P USBP8+ 35
T246 USBOC#7 AJ18 N3 USBOC#9 R426 10K/04 3VSUS
OC7#/GPIO31 USBP9N USBP9- 32
T134 USBOC#8 AD14 N2 USB Connector
OC8# USBP9P USBP9+ 32
T256 USBOC#9 AH18 OC9#
USBRBIAS# F2 SI-1 modified from HP request
F3 USB_RBIAS_PN CHECK LIST suggest pull up 10k
USBRBIAS
ICH8M REV 1.0 25mils/15mils
Place within 500 R632 A16 SWAP Override strap
mils of ICH8 22.6/F/06

PCI_GNT#3 Low = A16 swap override enabled


High = Default

GNT3# R332 *1K


U42B
28,40 AD[0..31]
AD0 D20 A4 REQ0#
AD0 REQ0# REQ0# 28
AD1 GNT0# ICH8 Boot BIOS select
AD2
E19
D19
AD1 PCI GNT0# D7
E18 REQ1#
GNT0# 28
AD2 REQ1#/GPIO50 REQ1# 40
AD3 A20 C18 GNT1#
AD3 GNT1#/GPIO51 GNT1# 40
AD4 D17 B19 REQ2# T225 PCI_GNT#0 SPI_CS#1 Boot BIOS Location
AD5 AD4 REQ2#/GPIO52 GNT2# T107
A21 AD5 GNT2#/GPIO53 F18
AD6 A19 A11 REQ3# T227
AD7 AD6 REQ3#/GPIO54 GNT3# T101 0 1 SPI(Default)
C19 AD7 GNT3#/GPIO55 C10
AD8 A18
AD9 AD8
B
B16 AD9 C/BE0# C17 C/BE0# 28,40 B
AD10 A12 E15 1 0 PCI
AD10 C/BE1# C/BE1# 28,40
AD11 E16 F16
AD11 C/BE2# C/BE2# 28,40
AD12 A14 E17
AD12 C/BE3# C/BE3# 28,40
AD13 G16 1 1 LPC
AD14 AD13 IRDY#
A15 AD14 IRDY# C8 IRDY# 28,40
AD15 B6 D9
AD15 PAR PAR 28,40
AD16 C11 G6 SPI_CS1# R337 *1K
AD16 PCIRST# PCIRST# 28,40
AD17 A9 D16 DEVSEL#
AD17 DEVSEL# DEVSEL# 28,40
AD18 D11 A7 PERR# GNT0# R331 *1K
AD18 PERR# PERR# 28,40
AD19 B12 B7 LOCK#
AD20 AD19 PLOCK# SERR#
C12 AD20 SERR# F10 SERR# 28,37,40
AD21 D10 C16 STOP#
AD21 STOP# STOP# 28,40
AD22 C7 AD22 TRDY# C9 TRDY#
TRDY# 28,40 PCI ROUTING
AD23
AD24
F13 AD23 FRAME# A17 FRAME#
FRAME# 28,40 TABLE IDSEL INTERUPT DEVICE
E11 AD24
AD25
AD26
E13 AD25 PLTRST# AG24 PLT_RST-R#
PCLK_ICH
PLT_RST-R# 7,20 REQ0# / GNT0# AD25 INTE#,INTF# RICOH832
E12 AD26 PCICLK B10 PCLK_ICH 2
AD27 D8 AD27 PME# G7 PCI_PME# 28,40
+3V
MINI PCI
AD28
AD29
A6 AD28 REQ1# / GNT1# AD22 INTC#,INTD# for debug
E8 AD29
AD30 D6
AD31 AD30
A3 AD31 C792

T224 INTA# F9
Interrupt I/F F8 INTE# 0.1U/16V/06
PIRQA# PIRQE#/GPIO2 INTE# 28
T229 INTB# B5 G11 INTF# U41
PIRQB# PIRQF#/GPIO3 INTF# 28
5

INTC# C5 F12 INTG# T98


40 INTC# PIRQC# PIRQG#/GPIO4
INTD# A10 B3 INTH# T228 PLT_RST-R# 2
40 INTD# PIRQD# PIRQH#/GPIO5
4 PLTRST# 23,32,33,35,37,39
A ICH8M REV 1.0 1 A

TC7SH08FU Don't connect to PCI device / Express card


3

PROJECT : AT3
PCLK_ICH R328 *0 C484 *33P/50V Quanta Computer Inc.
for EMI request Size Document Number Rev
Custom ICH7-M M PCI E(2/4) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 22 of 48
5 4 3 2 1
5 4 3 2 1

3V_S5

SI-2 Add
for fix
re-boot
fail
+3V 2
R833

2K/F/04
1

1
2
U26
5
+3V

C608 .1U/16V/04
PCLK_SMB
PDAT_SMB
PCIE_WAKE#
R617
R272
R399
2.2K/06
2.2K/06
1K/06
3V_S5

SMB_LINK_ALERT#
SMLINK0
R621
R619
10K/06
10K/06
3V_S5
RI#
DNBSWON#
SYS_RST#-1
SMB_ALERT#
R624
R271
R615
R273
8.2K/06
10K/06
10K/06
10K/06
SWI#_R

CLKRUN#
SERIRQ
SCI#_R
R280

R433
R656
R662
10K/06

8.2K/06
8.2K/06
10K/06
3V_S5
+3V
23
44 VR_PWRGD_CK410#
3 4 VR_PWRGD_CK410 PM_BATLOW#_R R387 8.2K/06 SMLINK1 R618 10K/06 +3V
KBSMI#_R R281 10K/06
NL17SZ14DFT2G SI-1 has modified it PM_RSMRST#_R R658 10K/06
R809
,please measure BOM
100K/04
SI-1 modified
D has add( intel these pin if unused require 8.2k to D
checklist add) 10k pull-up to +3v
SI-1 add
U42C
PCLK_SMB R816 0/04 AJ26 AJ12 BOARD_ID1
2,35 PCLK_SMB SMBCLK SATA0GP/GPIO21
PDAT_SMB R817 0/04 AD19 AJ10 BOARD_ID0
2,35 PDAT_SMB SMBDATA SATA1GP/GPIO19 BOARD_ID3
SMB_LINK_ALERT# AG21 AF11

SATA
GPIO
T236 LINKALERT# SATA2GP/GPIO36

SMB
+3V SMLINK0 AC17 AG11 BOARD_ID4
T235 SMLINK1 SMLINK0 SATA3GP/GPIO37
T231 AE19 SMLINK1
AG9 14M_ICH
CLK14 14M_ICH 2
RI# AF17 G5 CLKUSB_48

Clocks
T138 RI# CLK48 CLKUSB_48 2
T110 F4 D3 T108
R450 R315 SYS_RST# R614 0/04 SYS_RST#-1 SUS_STAT#/LPCPD# SUSCLK
3 SYS_RST# AD15 SYS_RESET#
*10K/F/06 *10K/F/06 AG23 R616 100/F/06
SLP_S3# SUSB# 37,48
R682 0/04 AG12 AF21 R326 100/F/06 SI-2 change from
7 PM_BMBUSY# BMBUSY#/GPIO0 SLP_S4# SUSC# 37,48
SLP_S5# AD18 100ohm to 499
SMB_ALERT# AG22 T130
T257 SMBALERT#/GPIO11 ohm check list
S4_STATE#/GPIO26 AH27

GPIO
R402 0/F/06 PM_STPPCI_ICH# AE20 T249 -- series 500ohm
2 PM_STPPCI# STP_PCI#/GPIO15

SYS
R436 0/F/06 PM_STPCPU_ICH# AG18 AE23 ICH_PWROK R677 *100K/04
2 PM_STPCPU# STP_CPU#/GPIO25 PWROK to IMVP6+
CLKRUN# AH11 AJ14 DPRSLPVR-ICH R620 499/F DPRSLPVR
28,37,48 CLKRUN# CLKRUN#/GPIO32 DPRSLPVR/GPIO16 DPRSLPVR 7,44

Power MGT
PCIE_WAKE# AE17 AE21 PM_BATLOW#_R R642 0/04 LAN_RST pin : 1.if used pci
33,35,39 PCIE_WAKE# WAKE# BATLOW# PM_BATLOW# 37
SERIRQ AF12 DNBSWON#
28,37,40,48 SERIRQ SERIRQ DNBSWON# 37 LAN please tie to PLTRST#
AC13 C2 C819 *.1U/16V/04
5 THERM_ALERT# THRM# PWRBTN# R665 *100/F/06 2.if used PHY LAN please tie
LAN_REST 33,37,48
C VR_PWRGD_CK410 AJ20 AH20 PLTRST_LAN# R666 100/F/06 C
VRMPWRGD LAN_RST# PLTRST# 22,32,33,35,37,39 to RSMRST#
+3V R364 8.2K/06
AJ22 AG27 PM_RSMRST#_R R659 100/F/06 RSMRST#
T245 TP7 RSMRST# RSMRST# 37,48
AJ8 E1 R623 0/04
T254 TACH1/GPIO1 CK_PWRGD CK_PWG 2
KBSMI# R405 0/04
KBSMI#_R AJ9
37 KBSMI# TACH2/GPIO6
SCI# R386 0/04
SCI#_R AH9 E3 R622 0/04
37 SCI# TACH3/GPIO7 CLPWROK ECPWROK 7,16,37,48
SWI# R611 0/04
SWI#_R AE16
37 SWI# GPIO8
AC19 AJ25 SUSM# 3V_S5 +3V
T128 GPIO12 SLP_M#
AG8 T251
T248 TACH0/GPIO17
30 AMPBEEP_EN AH12 GPIO18 CL_CLK0 F23 CL_CLK0 7
LCD_BK AE11 AE18
26 LCD_BK GPIO20 CL_CLK1 ICH_CL_CLK1 39

Controller Link
GPIO
BOARD_ID2 AG10
R687 0/04 SCLOCK/GPIO22 R631 R338
39 WAN_OFF# AH25 QRT_STATE0/GPIO27 CL_DATA0 F22 CL_DATA0 7
R671 0/04 AD16 AF19 3.24K/F/06 3.24K/F/06
39 RF_OFF# QRT_STATE1/GPIO28 CL_DATA1 ICH_CL_DATA1 39
R420 0 AG13
36 BTLED SATACLKREQ#/GPIO35
+3V R768 2 1 10K/04 AF9 D24 CL_VREF0_SB
R769 2 SLOAD/GPIO38 CL_VREF0
1 10K/04 AJ11 SDATAOUT0/GPIO39 CL_VREF1 AH23 CL_VREF1_SB
SI-1 add R770 2 1 10K/04 AD10 SDATAOUT1/GPIO48
CL_RST# AJ23 CL_RST#0 7,39
AD9 C511
30 ACZ_SPKR SPKR
AJ27 R284 0/04 C798 R344
MEM_LED/GPIO24 BT_OFF# 35

MISC
R427 0 MCH_ICH_SYNC#_R AJ13 AJ24 ME_SMC_ALERT# R633 453/F/04 .1U/10V/04
7 MCH_ICH_SYNC# MCH_SYNC# ME_EC_ALERT/GPIO10
AF22 T250 453/F/04 .1U/10V/04
21 ICH_TP3 EC_ME_ALERT/GPIO14
AJ21 AG19 T141
+3V R435 *10K TP3 WOL_EN/GPIO9 T144
ICH8M REV 1.0
R819 Controller Link 0
1 2 3VSUS Controller Link 1
B 3VSUS VREF for IAMT B
10K/04 VREF for IAMT support only
CRB STUFF SI-1 ADD (ww36 support only
No Reboot strap C818 .047U/10V/04
2K%1 request )
Low = Default +3V R657 2K/F/04
HDA_SPKR High = No
5

Reboot U43
2 +3V +3V +3V +3V +3V
7,44 DELAY_VR_PWRGOOD
4 ICH_PWROK
7,16,37,48 ECPWROK 1
+3V
TC7SH08FU R667 R660 R652
R661 100K/06 R692 R688 R690
3

ACZ_SPKR R411 *10K 10K/06 *10K/06 *10K/06


*10K/06 *10K/06 *10K/06

SI-2 Change
BOARD_ID3 BOARD_ID4 BOARD_ID0 BOARD_ID1 BOARD_ID2

15 " 15" R760 R761 R448 R689


PAV UMA PRE UMA 15”PAV Discrete 17” PAV Discrete 17” PAV Discrete 17” PAV UMA 10K/06 10K/06 R693 10K/06 10K/06
Board ID 965GM 965PM+G86MV+128M 965PM+G86MV+128M 965PM+G84MV+256M 965GM 10K/06
965GM
(0:0:0) (0:0:1) (0:1:0) (0:1:1) (1:0:0) (1:0:1)
A A
R693 R692 R693 R692 R693 R692 SI-1 modify (for
ID0 Stuff Stuff Stuff Stuff Stuff Stuff board ID select
)

R448 R448 R688 R688 R448 R448 PROJECT : AT3


ID1 Stuff Stuff Stuff Stuff Stuff Stuff Quanta Computer Inc.
R689 R689 R689 R689 R690 R690 Size Document Number Rev
Custom ICH7-M GPIO(3/4) 1A
ID2 Stuff Stuff Stuff Stuff Stuff Stuff NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 23 of 48
5 4 3 2 1
5 4 3 2 1

24
3V_S5 +3V 1.5V_A 1.5A
VCCRTC
C575 C550 C549
1.5V_B 675mA +1.05V

2
D40 D12
1U .1U/10V/04
.1U/10V/04 U42F
VCC1.05 1.13A
AD25 A13 +1.05V_SB R613 0/12
PDZ5.6B PDZ5.6B VCCRTC VCC1_05[01]
VCC1_05[02] B13
V5REF 1mA A16 V5REF[1] VCC1_05[03] C13
U42E R627 10/06 +5V R352 100/06 +5VREF_SB C502 C508

1
5V_S5 T7 V5REF[2] VCC1_05[04] C14
A23 K7 D14 +1.5V
VSS[001] VSS[099] C794 C522 +5VREF_SUS_SB VCC1_05[05] .047U/10V/04 .022U/04
A5 VSS[002] VSS[100] L1 G4 V5REF_SUS VCC1_05[06] E14
AA2 VSS[003] VSS[101] L13 VCC1_05[07] F14
AA7 L15 .1U/10V/04 .1U/10V/04 AA25 G14
VSS[004] VSS[102] VCC1_5_B[01] VCC1_05[08]
A25 VSS[005] VSS[103] L26 AA26 VCC1_5_B[02] VCC1_05[09] L11
AB1 VSS[006] VSS[104] L27 V5REF_SUS 1mA AA27 VCC1_5_B[03] VCC1_05[10] L12
D AB24 VSS[007] VSS[105] L4 AB27 VCC1_5_B[04] VCC1_05[11] L14
VCCDMIPLL_ICH
VCCDMIPLL 23mA D
AC11 L5 AB28 L16 L75 1UH R650 1/08
VSS[008] VSS[106] +1.5V_PCIE VCC1_5_B[05] VCC1_05[12]
AC14 VSS[009] VSS[107] M12 AB29 VCC1_5_B[06] VCC1_05[13] L17
AC25 VSS[010] VSS[108] M13 D28 VCC1_5_B[07] VCC1_05[14] L18
AC26 M14 L49 D29 M11 C806 C808
VSS[011] VSS[109] VCC1_5_B[08] VCC1_05[15]

CORE
AC27 VSS[012] VSS[110] M15 +1.5V E25 VCC1_5_B[09] VCC1_05[16] M18
AD17 M16 E26 P11 .01U/04 10U
VSS[013] VSS[111] VCC1_5_B[10] VCC1_05[17]

1
AD20 M17 BLM21PG220SN1D/08 E27 P18
VSS[014] VSS[112] C529 C536 C516 VCC1_5_B[11] VCC1_05[18]
AD28 VSS[015] VSS[113] M23 + F24 VCC1_5_B[12] VCC1_05[19] T11
AD29 M28 C503 F25 T18 +1.25V
VSS[016] VSS[114] 220U/4V 22U/6.3V/08 22U/6.3V/08 2.2U/06 VCC1_5_B[13] VCC1_05[20]
AD3 VSS[017] VSS[115] M29 G24 VCC1_5_B[14] VCC1_05[21] U11 VCC_DMI 50mA

2
AD4 VSS[018] VSS[116] M3 H23 VCC1_5_B[15] VCC1_05[22] U18
+1.5V +1.25V_DMI R651 0/08 +1.05V
AD6 VSS[019] VSS[117] N1 H24 VCC1_5_B[16] VCC1_05[23] V11 VCPU_IO 1mA
AE1 VSS[020] VSS[118] N11 J23 VCC1_5_B[17] VCC1_05[24] V12
AE12 VSS[021] VSS[119] N12 J24 VCC1_5_B[18] VCC1_05[25] V14
AE2 N13 K24 V16 C815 R398 0/06
VSS[022] VSS[120] VCC1_5_B[19] VCC1_05[26]
AE22 VSS[023] VSS[121] N14 K25 VCC1_5_B[20] VCC1_05[27] V17
AD1 N15 VCCSATAPLL 47mA L23 V18 22U/6.3V/08
VSS[024] VSS[122] VCC1_5_B[21] VCC1_05[28] C559 C582 C554
AE25 VSS[025] VSS[123] N16 L24 VCC1_5_B[22]

VCCA3GP
AE5 N17 R445 0/08 +1.5V_SATA +1.5V_APLL_RR L50 10UH/08 +1.5V_APLL L25 R29
VSS[026] VSS[124] VCC1_5_B[23] VCCDMIPLL .1U/10V .1U/10V/04 4.7U/10V/06
AE6 VSS[027] VSS[125] N18 M24 VCC1_5_B[24]
AE9 N26 C556 C557 M25 AE28
VSS[028] VSS[126] VCC1_5_B[25] VCC_DMI[1] +1.05V_V_CPU_IO
AF14 VSS[029] VSS[127] N27 N23 VCC1_5_B[26] VCC_DMI[2] AE29
10U/06 1U/16V/06 +3V
AF16 VSS[030] VSS[128] N4 SI-2 modified ( N24 VCC1_5_B[27]
AF18 VSS[031] VSS[129] N5 remove R374 ) N25 VCC1_5_B[28] V_CPU_IO[1] AC23
AF3 VSS[032] VSS[130] N6 P24 VCC1_5_B[29] V_CPU_IO[2] AC24
AF4 VSS[033] VSS[131] P12 P25 VCC1_5_B[30]
AG5 P13 R24 AF29 +V3.3_DMI_ICH R418 0/06
VSS[034] VSS[132] VCC1_5_B[31] VCC3_3[01]
AG6 VSS[035] VSS[133] P14 R25 VCC1_5_B[32]
AH10 P15 R26 AD2 +V3.3_SATA_ICH R641 0/06
VSS[036] VSS[134] VCC1_5_B[33] VCC3_3[02]
AH13 VSS[037] VSS[135] P16 R27 VCC1_5_B[34]
AH16 P17 T23 AC8 +V3.3S_VCCPCORE_ICH VCC3.3 278mA
VSS[038] VSS[136] VCC1_5_B[35] VCC3_3[03]
AH19 VSS[039] VSS[137] P23 T24 VCC1_5_B[36] VCC3_3[04] AD8

VCCP_CORE
AH2 P28 T27 AE8 C812 C591
VSS[040] VSS[138] VCC1_5_B[37] VCC3_3[05]
C
AF28 VSS[041] VSS[139] P29 T28 VCC1_5_B[38] VCC3_3[06] AF8 C
AH22 R11 T29 .1U/10V/04 .1U/10V
VSS[042] VSS[140] C548 VCC1_5_B[39] +V3.3S_IDE_ICH
AH24 VSS[043] VSS[141] R12 U24 VCC1_5_B[40] VCC3_3[07] AA3
AH26 VSS[044] VSS[142] R13 U25 VCC1_5_B[41] VCC3_3[08] U7
AH3 R14 1U/16V/06 V23 V7 C803
VSS[045] VSS[143] VCC1_5_B[42] VCC3_3[09]
AH4 VSS[046] VSS[144] R15 V24 VCC1_5_B[43] VCC3_3[10] W1
AH8 R16 V25 W6 .1U/10V/04 R360 0/06
VSS[047] VSS[145] VCC1_5_B[44] VCC3_3[11]

IDE
AJ5 VSS[048] VSS[146] R17 W25 VCC1_5_B[45] VCC3_3[12] W7
B11 R18 Y25 Y7 R636 0/06
VSS[049] VSS[147] VCC1_5_B[46] VCC3_3[13]
B14 VSS[050] VSS[148] R28
B17 R4 AJ6 A8 +V3.3S_PCI_ICH R340 0/06
VSS[051] VSS[149] VCCSATAPLL VCC3_3[14]
B2 VSS[052] VSS[150] T12 VCC3_3[15] B15
B20 VSS[053] VSS[151] T13 AE7 VCC1_5_A[01] VCC3_3[16] B18
B22 T14 C510 AF7 B4
VSS[054] VSS[152] VCC1_5_A[02] VCC3_3[17]

ARX
B8 VSS[055] VSS[153] T15 AG7 VCC1_5_A[03] VCC3_3[18] B9
C24 T16 1U/16V/06 AH7 C15 C483 C494 C501
VSS[056] VSS[154] VCC1_5_A[04] VCC3_3[19]
C26 VSS[057] VSS[155] T17 AJ7 VCC1_5_A[05] VCC3_3[20] D13

PCI
C27 T2 D5 .1U/10V .1U/10V .1U/10V
VSS[058] VSS[156] VCC3_3[21]
C6 VSS[059] VSS[157] U12 AC1 VCC1_5_A[06] VCC3_3[22] E10
D12 VSS[060] VSS[158] U13 AC2 VCC1_5_A[07] VCC3_3[23] E7

ATX
D15 VSS[061] VSS[159] U14 AC3 VCC1_5_A[08] VCC3_3[24] F11
D18 VSS[062] VSS[160] U15 AC4 VCC1_5_A[09] VCCHDA 32mA
D2 U16 AC5 AC12 +3V_1.5V_HDA_IO_ICH R401 0/06 +3V
VSS[063] VSS[161] VCC1_5_A[10] VCCHDA
D4 VSS[064] VSS[162] U17 VCC_SUSHDA 32mA
E21 U23 AC10 AD11 +VCCSUSHDA R400 0/06 3V_S5 C566
VSS[065] VSS[163] VCC1_5_A[11] VCCSUSHDA
E24 VSS[066] VSS[164] U26 AC9 VCC1_5_A[12]
E4 U27 J6 TP_VCCSUS1_05_ICH_1 C555 Can be connect to .1U/10VCan be connect to
VSS[067] VSS[165] VCCSUS1_05[1] TP_VCCSUS1_05_ICH_2
E9 VSS[068] VSS[166] U3 AA5 VCC1_5_A[13] VCCSUS1_05[2] AF20 +3V_S5 or +3V or +1.5V
F15 U5 VCCUSBPLL 10mA AA6 0.1U/16V/06
+1.5V_S5
VSS[069] VSS[167] R630 0/06 +1.5V_USB VCC1_5_A[14] TP_VCCSUS1_5_ICH_1
E23 VSS[070] VSS[168] V13 VCCSUS1_5[1] AC16
F28 VSS[071] VSS[169] V15 G12 VCC1_5_A[15]
F29 V28 C793 G17 J7 TP_VCCSUS1_5_ICH_2 3V_S5
VSS[072] VSS[170] VCC1_5_A[16] VCCSUS1_5[2]
F7 VSS[073] VSS[171] V29 H7 VCC1_5_A[17]
G1 W2 .1U/10V/04 C3 +V3.3A_ICH R397 0/06 VCC_SUS3.3 177mA
VSS[074] VSS[172] VCCSUS3_3[01]
E2 VSS[075] VSS[173] W26 AC7 VCC1_5_A[18]
B G10 VSS[076] VSS[174] W27 AD7 VCC1_5_A[19] VCCSUS3_3[02] AC18 B
G13 Y28 AC21 C574 C598
VSS[077] VSS[175] VCCSUS3_3[03]
G19 VSS[078] VSS[176] Y29 D1 VCCUSBPLL VCCSUS3_3[04] AC22

VCCPSUS
G23 Y4 AG20 .1U/10V .022U
VSS[079] VSS[177] VCCSUS3_3[05]
G25 VSS[080] VSS[178] AB4 F1 VCC1_5_A[20] VCCSUS3_3[06] AH28

USB CORE
G26 VSS[081] VSS[179] AB23 L6 VCC1_5_A[21]
G27 AB5 C796 L7 P6
VSS[082] VSS[180] VCC1_5_A[22] VCCSUS3_3[07]
H25 VSS[083] VSS[181] AB6 M6 VCC1_5_A[23] VCCSUS3_3[08] P7
H28 AD5 .1U/10V/04 M7 C1
VSS[084] VSS[182] VCC1_5_A[24] VCCSUS3_3[09] +V3.3A_USB_ICH R634 0/08
H29 VSS[085] VSS[183] U4 VCCSUS3_3[10] N7
H3 W24 +1.5V_SATA W23 P1
VSS[086] VSS[184] VCC1_5_A[25] VCCSUS3_3[11] C801
H6 VSS[087] VCCSUS3_3[12] P2
J1 A1 TP_VCCLAN1_05_ICH_1 F17 P3 C921 C922 C923 C924
VSS[088] VSS_NCTF[01] VCCLAN1_05[1] VCCSUS3_3[13]

VCCPUSB
J25 A2 TP_VCCLAN1_05_ICH_2 G18 P4 4.7U/10V/06
VSS[089] VSS_NCTF[02] VCCLAN1_05[2] VCCSUS3_3[14] .1U/10V .1U/10V .1U/10V .1U/10V
J26 VSS[090] VSS_NCTF[03] A28 VCCGLAN3.3 1mA VCCSUS3_3[15] P5
J27 A29 +3V R343 0/06 +3V_VCCLAN F19 R1
VSS[091] VSS_NCTF[04] VCCLAN3_3[1] VCCSUS3_3[16]
J4 VSS[092] VSS_NCTF[05] AH1 G20 VCCLAN3_3[2] VCCSUS3_3[17] R3
J5 AH29 C504 R5
VSS[093] VSS_NCTF[06] +1.5V_VCCGLANPLL VCCSUS3_3[18]
K23 VSS[094] VSS_NCTF[07] AJ1 A24 VCCGLANPLL VCCSUS3_3[19] R6
K28 AJ2 .1U/10V/04
VSS[095] VSS_NCTF[08]

GLAN POWER
K29 AJ28 A26 G22 TP_VCCCL1_05_ICH
VSS[096] VSS_NCTF[09] VCCGLAN1_5[1] VCCCL1_05
K3 VSS[097] VSS_NCTF[10] AJ29 VCCGLLAN_PLL --23mA A27 VCCGLAN1_5[2]
K6 B1 B26 A22 VCCCL1_5_INT_ICH
VSS[098] VSS_NCTF[11] R612 1/08 L74 1UH VCCGLAN1_5[3] VCCCL1_5 TP_VCCLAN1_05_ICH_1 C507 0.1U/16V/06
VSS_NCTF[12] B29 +1.5V B27 VCCGLAN1_5[4]
B28 F20 +V3.3M_ICH C481 C482 TP_VCCLAN1_05_ICH_2 C506 0.1U/16V/06
ICH8M REV 1.0 C791 C790 VCCGLAN1_5[5] VCCCL3_3[1]
VCCCL3_3[2] G21
B25 1U/16V/06 *.1U/04 TP_VCCSUS1_05_ICH_1 C512 0.1U/16V/06
10U/06 2.2U/06 VCCGLAN3_3 TP_VCCSUS1_05_ICH_2 C607 0.1U/16V/06
ICH8M REV 1.0
TP_VCCSUS1_5_ICH_1 T120
VCCGLAN1.5 80mA TP_VCCSUS1_5_ICH_2 T131
+1.5V_PCIE R342 0/06 +3V TP_VCCCL1_05_ICH T119

C521 VCCL3.3 18mA - 64mA (S3)


+3V R341 0/06 +3V_GLAN
A A
4.7U/10V/06
VCCGLAN3.3 18mA

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom ICH7-M POWER(4/4) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 24 of 48
5 4 3 2 1
5 4 3 2 1

C7 .1U/10V/04
CRT PORT
+3V
25
5V_CRT2
D30 *BAV99W
F1 40 mils CN14
2 1 +5VCRT 40 MIL 070546FR015S202CR 1 CRT_R1
+5V 3

17
FUSE1A6V_POLY SSM14 spec is 40V 1A
D 2 D
5 15
SI-1 modified CRT_R_1 L60 BK1608HS470/06 CRT_R1 10 D27 *BAV99W
4 14
for fix CRT CRT_G_1 L59 BK1608HS470/06 CRT_G1 9
1 CRT_G1
3
rise time CRT_B_1
3 13
L58 BK1608HS470/06 CRT_B1 8
issue 2
2 12
7
C649 C647 C645 1 11 D26 *BAV99W
R496 R495 R492 C646 C648 C650 6
5.6P/06 5.6P/06 5.6P/06 1 CRT_B1
150/F/04 150/F/04 150/F/04 5.6P/06 5.6P/06 5.6P/06 3
EMI

16
2

D23 *BAV99W
close conn within
600mils 1
3
DDCCLK2
+5V
R5 0/04 DDCCLK2
2
R491 39/04 CRTVSYNC
R490 39/04 CRTHSYNC D24 *BAV99W
1

1
C27 .1U/10V/04 CRTVSYNC
U30 R7 0/04 DDCDAT2 3

VSYNC1 2
7,15 VSYNC_COM 2 4 PR_VSYNC 38
AHCT1G125DCH D25 *BAV99W
C8 C14 C15 C18
C 1 CRTHSYNC C
3
5

*470P/50V/04 *47P/50V/06 *470P/50V/04


U29 AHCT1G125DCH
2
2 4 HSYNC1 *47P/50V/06
7,15 HSYNC_COM PR_HSYNC 38
D29 *BAV99W

+3V 1 DDCDAT2
3
SI-1 modified
R12 2.2K/04
CRT SWITCH for fix CRT
2
+3V
2

rise time
DDCCLK PR_RED
U51 issue
7,15 DDCCLK 1 3 DDCCLK2 38 38 PR_RED 2 IA0
CRT_R_1 3
Q2 PR_GEN IA1 CRT_R
38 PR_GEN 5 IB0 YA 4 CRT_R 7,15
2N7002E CRT_G_1 6 7 CRT_G
DDCCLK2 IB1 YB CRT_G 7,15
+3V PR_BLU 11 9 CRT_B inputs function
38 PR_BLU IC0 YC CRT_B 7,15
CRT_B_1 10 12
R10 2.2K/04 IC1 YD
+3V 14 ID0
2

DDCDAT2 13 R834
ID1 +5V_SW
38 PR_INSERT# 1 SEL VCC 16 +5V /E SET
DDCDATA 1 3 DDCDAT2 38 15 8 R835
7,15 DDCDATA /E GND

1
0/06 10K/F/04
Q1 R4 R494 74CBT3257 C937 L L Y - port 0
2N7002E 0.1uF/10V/04
2.2K/04 2.2K/04 L H Y - port 1

2
EMI
+5VCRT 2 1 +5V_CRT2 H X Disconnect
CH501H-40PT L-F D22
B B

+3V
38 S-CVBS-DO

38 S-YD-DO
D19 2
38 S-CD-DO
TV_CHROMA
3
*BAV99W
1
filter for HDTV

C870 8.2P/50V/06
TV_OUT D21 2
TV_LUMA
C871 8.2P/50V/06 3
*BAV99W
C872 8.2P/50V/06 1
5

S-CD L1 0.56uH/08 TV_CHROMA 6 CN13


5

7,15 S-CD1 6 2
D20
S-YD L3 0.56uH/08 TV_LUMA 4 CHROMA LUMA TV_COMP
7,15 S-YD1 4 3
S-CVBS L2 0.56uH/08 TV_COMP 7 *BAV99W
7,15 S-CVBS1 7 1
GND GND
SI-1 MODIFY SHIELD SHIELD
C642 C643 C641 C640 C2 C1 9 COMP 8
A R1 R489 R486 9 8 A
82P/04 82P/04 82P/04 82P/X7R/04 82P/X7R/04 82P/X7R/04 3 1
3 1
2

150/F/04 150/F/04 150/F/04


2

SUY-030005FR007S102FU
PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom CRT/TV_OUT 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 25 of 48
5 4 3 2 1
1 2 3 4 5 6 7 8

+12V_ALW
+3V
CN1

2
AO3404 ID

G_0
R2 L4 LCDVCC_R
current C9
LCDVCC
PBY201209T-4A/08 1
2
T
330K/06 5.8A .1U/10V/04
3 O

3
5VSUS LCDVCC +3V
Q32 EDIDCLK 4

1
7,15,16 EDIDCLK 5
AO3404 EDIDDATA
7,15,16 EDIDDATA 6 P

1
LCDONG 2 C5 C4 C3
7

1
TXLOUT0-
15 TXLOUT0- 8 A

1
R487 .1U/10V/04 .01U/16V/04 10U/6.3V/08 TXLOUT0+
15 TXLOUT0+ 9

3
A A
R3

2
100K/06
15 TXLOUT1-
TXLOUT1- 10
11
G_1 N
22/08 TXLOUT1+

1
+3V
15 TXLOUT1+ 12 E

2
2 13

1
TXLOUT2-

2
Q33 Q35 C6 LCDDISCHG
15
15
TXLOUT2-
TXLOUT2+
TXLOUT2+ 14
15
A

3
PDTC144EU 2N7002E .022U/16V/04 R484 2.2K/04 EDIDCLK
R485 2.2K/04 EDIDDATA TXLCLKOUT- 16 L

2
15 TXLCLKOUT- 17

3
TXLCLKOUT+

1
7,16 DISP_ON 2 15 TXLCLKOUT+ 18 G_2
TXUOUT0- 19
DISP_ON 15 TXUOUT0- 20
LCDON# 2 Q34 SI-2 change R488 2K/04 TXUOUT0+
15 TXUOUT0+ 21
2N7002E
1 to 2k from LVDS_BLON R562 2K/04 TXUOUT1- 22
15 TXUOUT1- 23
Nvidi TXUOUT1+
15 TXUOUT1+ 24 G_3
recommend TXUOUT2- 25

1
3VPCU 15 TXUOUT2- 26
TXUOUT2+
15 TXUOUT2+ 27
TXUCLKOUT- 28
15 TXUCLKOUT- 29
TXUCLKOUT+
15 TXUCLKOUT+ 30
31 G_4
R498 DPST_PWM R9 *0/04 +5V R6 0/08 INV_5V 32
7,16 DPST_PWM 33
33K/06 Close to EC
PWM_VADJ R8 0/04 VADJ1 34
37,48 PWM_VADJ 35
D31
LVDS_BLON R497 1K/04 PN_BLON LID_EC# PN_BLON BLONCON 36
7,16 LVDS_BLON 2 1 LID_EC# 35,36,37,48 2 1 37
CH501H-40PT L-F D28 VIN_BLIGHT 38
B B
CH500H 39
3VPCU 3VPCU 3VPCU 40
3

G_5
R493
1

2
C23 C13 C20 100K/04
LCD_BK 2 C644 C16 C12 C10 C11
OUT

VDD

OUT

VDD

OUT

VDD
23 LCD_BK
Q36 HE1 *.1U/10V/04HE3 .1U/10V/04 HE2 *.1U/10V/04 C22
*EC2648 *EC2648 *EC2648 .1U/10V/04
GND

GND

GND
N

S
PDTC144EU 0.1U/50V/06
22P/50V/06
1

VIN_BLIGHT HE2 -- 3A STUFF *4.7U/10V/08


.1U/10V/04 FOX-GS12401-1011
3

3
4.7U/10V/08

L5 0/08 SI-2 (change 3A from


VIN
3

1
HE1 to HE2
OUT

VDD

OUT

VDD

OUT

VDD
C25 C17 C19 C21
0.1U/50V/06 .01U/50V/040.1U/50V/06 *10U/25V/12
GND

GND

GND
N

S
HE4 HE6 HE5
SI-1 modify *EM-6781-T3 *EM-6781-T3 *EM-6781-T3
2

2
footprint

C DB "short" and reserve common mode L39 C

L32 *BLM18PG181SN1/06 choke pads for EMI final tune TX2_HDMI+ 4 3


15 TX2_HDMI+
HDMI_SCL 1 2 HDMISCL TX2_HDMI- 1 2
15 TX2_HDMI-

SI-2 modified for


HDMI_SDA 1
L29
2

*BLM18PG181SN1/06C333
HDMISDA

C336
*WCM2012-90
HDMI PORT
L36 CN23
NVIDIA recommend to *12P/50V/04 *12P/50V/04 15 TX1_HDMI+ TX1_HDMI+ 4 3 20
TX1_HDMI- TX2_HDMI+ SHELL1
use 150 - 15 TX1_HDMI- 1 2 19 D2+
18 D2 Shield
220@100MHZ BEAD *WCM2012-90 TX2_HDMI- 17 HDMIC_5V
L38 TX1_HDMI+ D2-
16 D1+
15 TX0_HDMI+ TX0_HDMI+ 4 3 15
TX0_HDMI- 1 TX1_HDMI- D1 Shield
15 TX0_HDMI- 2 14 D1-
D44 *CH501H-40PT L-F TX0_HDMI+ 13
HDMIC_5V *WCM2012-90 D0+ C782
2 1 12 D0 Shield
TX0_HDMI- 11 *.1U/10V/04
L34 TXC_HDMI+ D0-
10 CK+
D45 *CH501H-40PT L-F 15 TXC_HDMI+ TXC_HDMI+ 4 3 9 LAYOUT must support
TXC_HDMI- TXC_HDMI- CK Shield
2 1 15 TXC_HDMI- 1 2 8 CK-
7 connectors from JAE,
*WCM2012-90 CE Remote
6 NC Molex and Acon. for EMI request
HDMISCL 5
HDMISDA DDC CLK
4 DDC DATA
3 GND
R115 R547 +5V F2 2 1 HDMIC_5V 2
HDMI_DET R607 HDMIDET_R *FUSE1A6V_POLY 1 +5V
16 HDMI_DET HP DET
*2K/04 *2K/04 *1K/04 21
SHELL2
D D
R606 *C12806-11904-L

*15K/04
15 HDMI_SCL HDMI_SCL

15 HDMI_SDA
HDMI_SDA
PROJECT : AT3
SI-1 modified for fix HDMI issue
Quanta Computer Inc.
Size Document Number Rev
Custom LCD CONN/HDMI CONN 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 26 of 48
1 2 3 4 5 6 7 8
5 4 3 2 1

5 IN1 CARD READER


XD,MMC/SD,MS/MSP
SCREW HOLE
27
VCC_XD VCC_XD

C638 270P/50V/06

H-C244D181P2
HOLE18

H-C244D181P2
HOLE17

H-C244D181P2
HOLE19

H-C244D181P2
HOLE20

H-S315D110P2
HOLE11

H-O173X118D173X118N H-C256D157P2
HOLE14

H-S315D110P2
HOLE26

H-S315D110P2
HOLE8
CN10
SD_CDZ 1
28 SD_CDZ CD_SD
MS_DATA2_SD_DAT2 2
D MS_DATA3_SD_DAT3 DAT2_SD C628 D

1
3 CD/DAT3_SD
MS_BS_SD_CMD 4 41 .01U/16V/04
CMD_SD VCC_XD XD-D7 VCC_XD
5 VSS_SD D7_XD 40
6 39 XD-D6
SD_CLK_MS_CLK_XD-RE# VDD_SD D6_XD XD-D5
7 CLK_SD D5_XD 38
8 37 XD-D4
MS_DATA0_SD_DAT0 VSS_SD D4_XD MS_DATA3_SD_DAT3 R430
9 DAT0_SD D3_XD 36
MS_DATA1_SD_DAT1 10 35 MS_DATA2_SD_DAT2
DAT1_SD D2_XD 10K/06

H-S315D110P2
HOLE24

H-TO6X7BO8X9D2_7X3_7P2
HOLE1

H-C244D157P2
HOLE7

H-C256D157P2
HOLE12

HOLE9

H-C244D157P2
HOLE6
SD_WP 11 34 MS_DATA1_SD_DAT1
WP_SD D1_XD MS_DATA0_SD_DAT0
12 VSS_MS D0_XD 33
C625 .01U/16V/04 13 32
SD_CLK_MS_CLK_XD-RE# VCC_MS GND_XD XD-WP#_L R429 0/06 XD-WP#

1
14 SCLK_MS -WP_XD 31
MS_DATA3_SD_DAT3 15 30 MS_BS_SD_CMD
MS_CDZ RESERVE_MS -WE_XD XD-ALE
28 MS_CDZ 16 INS_MS ALE_XD 29
MS_DATA2_SD_DAT2 17 28 XD-CLE
MS_DATA0_SD_DAT0 RESERVE_MS CLE_XD XD-CE#
18 SDIO_MS -CE_XD 27
MS_DATA1_SD_DAT1 19 26 SD_CLK_MS_CLK_XD-RE#
MS_BS_SD_CMD RESERVE_MS -RE_XD SD_WP
20 BS_MS R/-B_XD 25
21 24B XD_CD
VSS_MS GND_XD XD_CD 28
22 GND GND 23
24A C639
GND 270P/50V/06

H-C244D157P2
HOLE10

H-C315D110P2
HOLE4

H-C315D110P2
HOLE22

H-C315D110P2
HOLE23

H-S315D110P2
HOLE3

H-S315D110P2
HOLE5

H-C315D110IN1-256P2
HOLE13

H-C315D110P2
HOLE25
MSX039-X0-0X00

1
VCC_XD VCC_XD

C
CN11 TD C
SD_CDZ 1 CD_SD

H-C315D110P2
HOLE21

H-S315D110P2
HOLE15

H-O216X138T0D156X78N
HOLE16

H-C138T0D78N
HOLE2

H-C138T0D78N
HOLE27
MS_DATA2_SD_DAT2 2
MS_DATA3_SD_DAT3 DAT2_SD
3 CD/DAT3_SD
MS_BS_SD_CMD 4 41
CMD_SD VCC_XD XD-D7

1
5 VSS_SD D7_XD 40
6 39 XD-D6
SD_CLK_MS_CLK_XD-RE# VDD_SD D6_XD XD-D5
7 CLK_SD D5_XD 38
8 37 XD-D4
MS_DATA0_SD_DAT0 VSS_SD D4_XD MS_DATA3_SD_DAT3
9 DAT0_SD D3_XD 36
MS_DATA1_SD_DAT1 10 35 MS_DATA2_SD_DAT2
SD_WP DAT1_SD D2_XD MS_DATA1_SD_DAT1
11 WP_SD D1_XD 34
12 33 MS_DATA0_SD_DAT0
VSS_MS D0_XD
13 VCC_MS GND_XD 32
SD_CLK_MS_CLK_XD-RE# 14 31 XD-WP#_L
MS_DATA3_SD_DAT3 SCLK_MS -WP_XD MS_BS_SD_CMD
15 RESERVE_MS -WE_XD 30
MS_CDZ 16 29 XD-ALE
MS_DATA2_SD_DAT2 INS_MS ALE_XD XD-CLE
17 RESERVE_MS CLE_XD 28
MS_DATA0_SD_DAT0 18 27 XD-CE#
MS_DATA1_SD_DAT1 SDIO_MS -CE_XD SD_CLK_MS_CLK_XD-RE#
19 26
MS_BS_SD_CMD 20
RESERVE_MS
BS_MS
-RE_XD
R/-B_XD 25 SD_WP
XD_CD
EMI PAD
21 VSS_MS GND_XD 24B
22 GND GND 23
GND 24A

*4IN1-R013-J00-LR-42P
PAD9 PAD4

*EMIPAD *EMIPAD
bom create 2'nd source
MDIO03 R419 56/04 SD_WP

1
B 28 MDIO03 B
MDIO17 R673 56/04 XD-D7
28 MDIO17
MDIO16 R678 56/04 XD-D6
28 MDIO16
PAD1 PAD7 PAD10 PAD16
MDIO15 R703 56/04 XD-D5
28 MDIO15
*EMIPAD *EMIPAD *EMIPAD *EMIPAD
MDIO14 R705 56/04 XD-D4
28 MDIO14
MDIO13 R471 56/04 MS_DATA3_SD_DAT3
28 MDIO13

1
MDIO12 R469 56/04 MS_DATA2_SD_DAT2
28 MDIO12
MDIO11 R462 56/04 MS_DATA1_SD_DAT1
28 MDIO11
MDIO10 R463 56/04 MS_DATA0_SD_DAT0
28 MDIO10
MDIO08 R472 56/04 MS_BS_SD_CMD
28 MDIO08
MDIO05 R431 56/04 XD-WP#
28 MDIO05
MDIO19 R706 56/04 XD-ALE PAD13
28 MDIO19 PAD11 PAD12 PAD14
MDIO18 R707 56/04 XD-CLE 1 1 1 EMIPAD
28 MDIO18
MDIO02 R710 56/04 XD-CE# +3V VCC_XD
28 MDIO02
SU-27 SU-27 SU-27
MDIO09 R712 56/04 SD_CLK_MS_CLK_XD-RE#

1
28 MDIO09
3 1

Q25
moden cable sprig
AO3408L
A A
2

VCC_XD VCC_XD

C856 R719 C850 C843 C839 MC_PWR_CTRL_0 1 3 XD_PWON R451 10K/04


28 MC_PWR_CTRL_0 +5V
2.2U/6.3V/06 150K/06 .1U/10V/04 .1U/10V/04 .1U/10V/04
PROJECT : AT3
Q26 Quanta Computer Inc.
CLOSE CONN PDTC144EU
2

Size Document Number Rev


Custom CARD READER/HOLE 1A
+3V NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 27 of 48
5 4 3 2 1
5 4 3 2 1

22,40 AD[0..31]
AD31
AD30
AD29
AD28
125
126
127
1
U23B
AD31
AD30
AD29
VCC_PCI1
VCC_PCI2
VCC_PCI3
10
20
27
32
+3V

C584
C541
C514
.01U/16V/04
.01U/16V/04
10U/6.3V/08
+3V

+3V
Serial EEPROM

28
AD27 AD28 VCC_PCI4 R353 R354 C528 *.01U/16V/04
2 AD27 VCC_PCI5 41
AD26 3 128 10K/06 10K/06
AD25 AD26 VCC_PCI6 U20
5 AD25
PCI_CLK_5C832 AD24 6 61 C588 .01U/16V/04 8 1
AD23 AD24 VCC_RIN C552 .1U/10V/04 VCC A0
D
9 AD23 7 NC A1 2 D
AD22 11 120 VCC_ROUT_832 SCL 6 3
AD21 AD22 VCC_ROUT5 C610 .01U/16V/04 SDA SCL A3
12 AD21 VCC_ROUT4 114 5 SDA GND 4
AD20 14 64 C616 .01U/16V/04
R460 AD19 AD20 VCC_ROUT3 C581 0.47U/10V/06 *24C02
15 AD19 VCC_ROUT2 34
*22/04 AD18 17 16 C525 .47U/10V/06
AD17 AD18 VCC_ROUT1
18 AD17
AD16 19 67 3VSUS C611 .01U/16V/04
AD16 VCC_3V
PCI_CLK_5C832_D

AD15 36 86 3VSUS C547 10U/6.3V/08


AD14 AD15 VCC_MD
37 AD14 * NOT Use EEPROM :
AD13 38 R199 : installed ( 57pin pull hi )
AD12 AD13
39 AD12
R2 When HWSPND# is controlled by R207,U15,C198 : NOT installed
AD11 40 69 HWSPND# R373 10K/04
AD10 AD11 HWSPND# +3V system, the pull-up resistor(R2)
42 AD10 * Use EEPROM :
AD9 43 dose not need to apply. R207,U15,C198 : installed
AD8 AD9 RH832_58P R347 10K/04
44 AD8 MSEN 58 +3V R199 : NOT installed ( 57 pin pull low )
AD7 46 55 RH832_55P R350 10K/04
AD7 XDEN

PCI / OTHER
C618 AD6 47 R348 100K/04
*22P/50V/04 AD5 AD6 RH832_57P R349 *100K/04
48 AD5 UDIO5 57
AD4 49 65 SCL
AD3 AD4 UDIO3 SDA
50 AD3 UDIO4 59
AD2 51 56 UDIO2_RH832
AD2 UDIO2 T124
AD1 52 60 UDIO1_RH832
AD1 UDIO1 T123
AD0 53
PAR AD0
22,40 PAR 33 PAR
C/BE3# 7
22,40 C/BE3# C/BE3#
C/BE2# 21 115 L_INTE# R458 0/04
22,40 C/BE2# C/BE2# INTA# INTE# 22
C/BE1# 35 116 L_INTF# R459 0/04
22,40 C/BE1# C/BE1# INTB# INTF# 22
C/BE0# 45
22,40 C/BE0# C/BE0#
AD25 RC832_ID 8 66 RH832_T R362 100K/04 TPA0P R369 0/04
C R422 100/04 IDSEL TEST C
REQ0# 124 1 2 CN32
22 REQ0# REQ#
GNT0# 123 4 4 3 1394_CONN
22 GNT0# GNT# GND1
SI-2 modified add FRAME# 23 13
22,40 FRAME# FRAME# GND2
IRDY# 24 22 +3V L51 L1394_TPA0+ 1
0ohm 22,40 IRDY# IRDY# GND3 1

1
TRDY# 25 28 *WCM2012-110
22,40 TRDY# TRDY# GND4
DEVSEL# 26 54 TPA0N R380 0/04 L1394_TPA0- 2
22,40 DEVSEL# DEVSEL# GND5 2
STOP# 29 62
22,40 STOP# STOP# GND6
PERR# 30 63 SHIELD GND L1394_TPB0+ 3
22,40 PERR# PERR# GND7 3
SERR# 31 68 R836 TPB0P R365 0/04
22,37,40 SERR# SERIRQ SERR# GND8
72 118 L1394_TPB0- 4
23,37,40,48 SERIRQ RPCICGRST#_L UDIO0/SRIRQ# GND9 4
RPCICGRST# R837 *0/04 71 122 100K/04 1 2
37,48 RPCICGRST# GBRST# GND10

5
6
7
8
PCIRST# 119 4 3
22,40 PCIRST# PCIRST# RPCICGRST#_L
R838 0/04
SHIELD GND PCI_CLK_5C832 121 L48 *WCM2012-110

5
6
7
8
2 PCI_CLK_5C832 PCICLK AGND1 99
AGND2 102 SI-2 modified
ADD GND shield PCI_PME1# 70 103 C938 TPB0N R359 0/04
PME# AGND3
AGND4 107
CLKRUN# 117 111 1U
23,37,48 CLKRUN# CLKRUN# AGND5 AS CLOSE AS
R5C832T_V00 POSSIBLE TO 1394
CoreLogic CLOCKRUN# R441 *100K/04 CONNECTOR.
When CLKRUN# is controlled by
system, the pull-down *TPA/TPA#,TPB/TPB# pair trace : As close as possible.
resistor(R14) dose not need to *TPA/TPA#,TPB/TPB# pair trace : Same length
apply. (80 mils) L55 electrically.And layot with shields.
10nH/06 *Termination resistor for TPA+/- TPB+/- : As close as
1394_AVDD
+3V possible to its cable driver (device pin out).
U23A
27 MDIO17 MDIO17 87 98 C614 .01U/16V/04
B MDIO17 AVCC_PHY1 C615 .01U/16V/04 B
AVCC_PHY2 106
27 MDIO16 MDIO16 92 110 C622 .1U/10V/04
MDIO16 AVCC_PHY3 C617 10U/6.3V/08
AVCC_PHY4 112
27 MDIO15 MDIO15 89 MDIO15

27 MDIO14 MDIO14 91 SD_CDZ SD_CDZ 27


MDIO14 TPBIAS0 C620 .33U/16V/06
TPBIAS0 113
MDIO13 90 C623 .01U/16V/04 MS_CDZ
27 MDIO13 MDIO13 MS_CDZ 27
MDIO12 93 R457 R456
27 MDIO12 MDIO12 56.2/F/04 56.2/F/04 AS CLOSE AS POSSIBLE TO R5C833
MDIO11 81 3VSUS 3VSUS
27 MDIO11 MDIO11
SHIELD GND
MDIO10 82 108 TPA0N
IEEE1394/MEM CARD

27 MDIO10 MDIO10 TPAN0


109 TPA0P
MDIO05 TPAP0
27 MDIO05 75 MDIO05 R454 56.2/F/04 RH832_TPB C624 270P/50V/06
MDIO08 88 R455 56.2/F/04 R464 5.11K/F/04
27 MDIO08 MDIO08
104 TPB0N R841 R853
MDIO19 TPBN0 TPB0P *10K/04 *10K/04
27 MDIO19 83 MDIO19 TPBP0 105

2
MDIO18 85 AS CLOSE AS POSSIBLE TO R5C832
27 MDIO18 MDIO18 PCI_PME1# 1 3 PCI_PME# 22,40
MDIO02 78
27 MDIO02 MDIO02 1394_XIN
94 C592 22P/04 Q20
MDIO03 XI *2N7002E
27 MDIO03 77 MDIO03
D14 1 2CH501H-40PT L-F SD_CDZ 80 24.576MHZ Y4
27 XD_CD MDIO00
A D13 1 2CH501H-40PT L-F MS_CDZ 79 A
Close to CHIP MDIO01 1394_XOUT C602 27P/04
XO 95 R5C833 not stuff
MDIO09 84
27 MDIO09 MDIO09
(MDIO09 ADD GND SHIDLE)
MC_PWR_CTRL_0 76 96 VREF_PWR C604 *.01U/16V/04
27 MC_PWR_CTRL_0 MDIO04 FIL0
101 REXT R453 10K/04
36 CARD_LED
CARD_LED 74 MDIO06
REXT
VREF 100 FIL0_PWR C613 .01U/16V/04 PROJECT : AT3
73 MDIO07 RSV 97
AS CLOSE AS POSSIBLE TO R5C832
Quanta Computer Inc.
R5C832T_V00/R5C833 ADD GND shield
Size Document Number Rev
Custom RICOH832 Controller 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 28 of 48
5 4 3 2 1
A B C D E

AVDD +5V
+3V U27 L57 0/08

1
L56

0/08
2
3V_DVDD

C627 C630
.1U/10V/04
C631
.1U/10V/04
10U/10V/08
C629
5

2
Vout

BYP

GND
Vin

EN
1

3
C633 C634 C632
.1U/10V/04 .047U/10V/04
1U/04
1 2

C636 C635
.1U/10V/04
10U/10V/08
29
1
C626 C599 MIC1-VREFO-R 1U/04 TPS793475
T150
C621 CH501H-40PT L-F D15 System MIC L
.01U/16V/04
1U/04 .1U/16V/04 AVDD 2 1 MIC2-VREFO-R AGND
AGND AGND MAINON

2
INT MIC R MAINON 37,41,42,43,45,46,47,48
CH501H-40PT L-F D16
R461 SI-2 Add 2 1 MIC2-VREFO-L INT MIC L Vset=1.242V
SI-1 modify EMI request R452
*20K/F/04 MIC1-VREFO-L System MIC R
C910
.1U/16V/04 R383 4.7K/06
AGND
10K/04 AVDD R408 4.7K/06 AVDD
30 AMPL C601
30 AMPR
10U/10V/08 DOCK_MIC_R 38 AGND SHIELD

36

35

34

33

32

31

30

29

28

27

26

25
U25
DOCK_MIC_L 38

Sense B
LINE-OUT-R

NC

MIC1-VREFO-R
LINE-OUT-L

GPIO1

MIC2-VREFO

LINE1-VREFO

MIC1-VREFO-L

AVSS1

AVDD1
VREF
AGND AGND R384 *4.7K/06 AVDD SI-2 remove from REALTEK
R385 *4.7K/06 request for fix INTERNAL MIC
37 24 DOCK_MIC_RL C562 1U/06 DOCK_MIC_R AGND can not use utility to test
MONO LINE1-R
AVDD 38 23 DOCK_MIC_LL C563 1U/06 DOCK_MIC_L MIC1-VREFO-R R388 2.2K/04
AVDD2 LINE1-L
HP-L 39 22 MIC1_R C564 1U/06 EXT_MIC_R
30 HP-L HP-OUT-L MIC1-R
AGND SHIELD
AGND R468 20K/F/06 40 21 MIC1_L C565 1U/06 EXT_MIC_L
JDREF MIC1-L
HP-R 41 20 CDAUDR C569 1U/04 R378 47K/04 CDINR2 MIC1-VREFO-L R389 2.2K/04
30 HP-R HP-OUT-R CD-R CDINR2 32
R391 47K/04
AGND 42 19 CDGND C570 1U/04 AGND CDGND1 1 2
AVSS2 CD-GND CDGND1 32
R394 47K/04 AGND AGND
43
ALC268 18 CDAUDL C571 1U/04 R393 47K/04 CDINL2 C939 .01U/16V/04
NC CD-L CDINL2 32
MIC2-VREFO-R R395 3.3K/04
44 17 MIC2_R C572 1U/04 INT_MICR
NC MIC2-R INT_MICR 36 AGND SHIELD
45 16 MIC2_L C573 1U/04 INT_MICL
NC MIC2-L MIC2-VREFO-L R396 3.3K/04 INT_MICL 36
46 DMIC-CLK NC 15

R465 0/04 47 14 1 2
30,37,48 VOLMUTE# EAPD NC
GPIO0-DMIC-12

GPIO3/DMIC-34

AGND
SPDIF SENSEA R416 10K/F/04 DOCK_MIC_Sense# C940 .01U/16V/04
SDATA-OUT

48 SPDIFO Sense A 13

SDATA-IN

DVDD-I/O
DVSS-I/O

PCBEEP
RESET#
BIT-CLK

3V_DVDD R412 20K/F/04 SENSE_MIC


DVDD

SYNC
DVSS

R466
*10K/04 R421 39.2K/F/04 HP_PLG_1 SI-2 modified from HP request
3V_DVDD
R764 10

11

12
10K/04 BIT_CLK_AUDIO
1

9
2

1 Q50 C596 1U/04 ACZ_SDOUT_AUDIO 1


PC_BEEP 30
ACZ_RST#_AUDIO 21
36,38 MUTE_LED 3 1 ACZ_SYNC_AUDIO 21
SDI R438 22/04 C612 C619
ACZ_SDIN0 21
BITCLK R446 22/04
BIT_CLK_AUDIO 21
2N7002E *22P/04 *22P/04
ACZ_SDOUT_AUDIO 21
SI-1 mofidied for fix MUTE LED issue

+5V 5VPCU MIC_PLUG=H ---- INTERNAL MIC HP_PLUG=H ---- EAR PHONE
DOCK_MIC_Sense# MIC_PLUG=L ---- EXTERNAL MIC HP_PLUG=L ---- PR_SPKER
MIC JACK DECT PIN IS NORMAL MIC JACK DECT PIN IS
+3V +5V CLOSE TYPE NORMAL CLOSE TYPE
NO STUFF ( HP spec +3V C637 C854
*.1U/10V/04 *.1U/10V/04
does not support SPDIF +5V
) SENSE_MIC
CN37 R473 HP_PLG_1
R390 R404 47K/04
5VPCU 1

3
for EMI request 10K/04 10K/04 R474
37,38,48 CIR_IN 2

3
SI-2 Change 47K/04 SI-2 Change
3

3
R467 *0/04 Q27
20,38 SPDIF 4 Q24 EXT-MIC-PLUG Q29
5 2 2 PDTC144EU
EARP_L 2N7002E HP_PLG 2
30 EARP_L 6 PDTC144EU

3
EARP_R
30 EARP_R HP_PLG 7 Q22 C914 C915
8 2
1000P/50V/04

1
EXT-MIC-PLUG 9 R371 MMBT3904 1000P/50V/04

1
C912 10 10K/04
3

1
*180P/50V/06 EXT_MIC_L 11 DOCK_MIC_L DKMIC_SEN Q18 AGND
2 SI-1 mofidied SI-1 mofidied
C913 12
13 MMBT3904 EAR PHONE SYSTEM/DK SWAGND
EXT_MIC_R C544 R372 AGND
*180P/50V/06 14 1U/6.3V/06 47K/04
1

TO AUDIO/B CON. AGND CWP143-A0G1Z


AGND AGND
DOCK MIC DETECT

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom Azalia CONEXANT20549-12 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 29 of 48
A B C D E
1 2 3 4 5 6 7 8

L76
BK2125HS220/08
5VAMP
R478 100K/06 AVDD
INT. SPEAKER

30
.01U/16V/04 AVDD U28
+5V
5 1

1
C837 C868 C869 C852 10U/6.3V/08 2
C845 + C836 JACK_DETECT# 38
4.7U/10V/08 .1U/10V/04 SE/BTL# 4 3
22U/6.3V/08 .1U/10V/04
U48

1
R_SPK+ NL17SZ14DFT2G

2
19 VDD ROUT+ 21
16 R_SPK-
R735 *1K/04 ROUT- R_SPK- R239 0/08 R_SPK-4
7 PVDD1
AGND AGND 18 4 L_SPK+
R736 0/04 C862 .047U/10V/04 PVDD2 LOUT+ L_SPK- R_SPK+ R244 0/08 R_SPK+3
29 AMPR LOUT- 9
RRIN-2 23
A RLINEIN R_SPK-4 36 A
R737 1K/04 RIN-1 C866 0.47U/10V/06 RRIN-1 20 14 BEEP_AMP C392
RHPIN PC-BEEP R_SPK+3 36
AGND
R739 *15K/04 C846 1 20.47U/10V/06 AMP_RIN+ 8 RIN+
C863 *.1U/10V/04
AGND *180P/50V/06
C391
15 SE/BTL# *180P/50V/06
AGND SE/BTL L_SPK+2 36
R731 *15K/04LIN-1 C847 1 20.47U/10V/06 AMP_LIN+ 10 17 SI-1 DEL EMI request
AGND LIN+ HP/LINE L_SPK-1 36
R732 1K/04 C861 0.47U/10V/06 RLIN-1 6
RLIN-2 LHPIN AMP_SHDN# R729 10K/04
5 LLINEIN SHUTDOWN 22 AVDD
R724 0/04 C858 .047U/10V/04 AGND
29 AMPL AMP_BYPS D17 L_SPK+ R243 0/08 L_SPK+2
2 1 11 BYPASS GND4 1
R730 *1K/04 AGND C851 4.7U/10V/08 24 2 1
GND3 VOLMUTE# 29,37,48
AGND R720 1K/04 AMP_GA0 2 13 L_SPK- R242 0/08 L_SPK-1
R716 *1K/04 AMP_GA1 GAIN0 GND2 CH501H-40PT L-F
5VAMP 3 GAIN1 GND1 12

1
SI-2 remove r739 ,r731 from R721 *10K/04 25
R713 10K/04 GND5 D18
26
realtek request for fix BO GND6
27
GND7 CH501H-40PT L-F C390 C389
voice when audio jack GND8 28 *180P/50V/06
AGND 29 *180P/50V/06
unplug GND9 AMP_BYPS_H AMP_BYPS SI-1 DEL EMI request

2
GND10 30
31 R475 15K/04
GND11
0312 Gain Table R413 0/06
GND12
GND13
32
33 AGND

GAIN0 GAIN1 SE/BTL AV(INV) R477 0/06 AGND


0 0 0 6dB R470 0.1u/06
TPA0312 PWP24
R_SPK+ R255 0/08 DOCK_RSPK+ DOCK_RSPK+ 38
0 1 0 10dB R434 0/06 L_SPK+ R254 0/08 DOCK_LSPK+ DOCK_LSPK+ 38
1 0 0 15.6dB R738 0.1u/06
B 1 1 0 21.6dB R810 0.1u/06 C895 C896
B

*180P/50V/06
x x 1 4.1dB SI-1 ADD EMI request *180P/50V/06

AGND
AUDIO AMPLIFIER SI-1 ADD EMI request

PCSPK BEEP
SI-1 add R765 R765 0/04
5VAMP
AVDD
and remove * AVDD SI-1 add
part C848 *.1U/16V/04
C859 *.1U/16V/04 AGND
R807 and
AGND remove
R728
10K/04 U47
*part TO AMP
TO CODE

5
*TC7SH08FU
5

1 C867 0.1UF/06
37,48 KEY_BEEP R733 1K/04 BEEP_AMP
29 PC_BEEP 2 4
4 2
3

23 AMPBEEP_EN 1
U45
R717 *NC7SZ86 R734 C865

3
23 ACZ_SPKR 2
C860 R711 *1K/04 *2200PF/06
3

1000P/50V/04 *10K/04 *150K/06


Q47 (AMP BEEP ENABLE R723
C C
PDTC144EU 10K/04
1

AT SYSTEM BOOT)
H=ENABLE
AGND AGND AGND
AGND L=DISABLE AGND AGND AGND AGND

R807 0/04
AGND

LINE OUT Amplifier


U46 MAX4411
LINE OUT C840 4.7U/08
EP 21
22
MAX4411 EP can NOT be
connected to GND. Please
Amplifier 29 HP-L
HP-L C842 1U/6.3V/04 AOUTR_L_HP R718 4.7K/06 INL_4411 13 INL
EP
EP 23
24
leave EP pins floating.
EP
EP 25
HP-R C855 1U/6.3V/04 AOUTR_R_HP R722 4.7K/06 INR_4411 15
29 HP-R INR HP_OUTL R842
9 40.2/F/04 EARP_L
OUTL HP_OUTR R843 EARP_L 29
11 40.2/F/04 EARP_R
OUTR EARP_R 29
C853 4.7U/08 4
NC1
29,37,48 VOLMUTE# 14 SHDNR NC2 6
R715 0/04 18 SHDNL NC3 8
NC4 12 SI-2 modified from HP recommend
D C838 1U/6.3V/04 C1P_4411 1 16 D
C1P NC5 L77 +3V
NC6 20
C1N_4411 3 10 BLM11A601S/06
C1N SVDD VCC3_4411
PVDD 19 1 2
5 PVSS PGND 2
PVSS_4411 7 17
SVSS SGND
C849
C857 PROJECT : AT3
C841
QFN20-4X4-5-25P 1U/6.3V/04 10U/10V/08 Quanta Computer Inc.
1U/6.3V/04
Size Document Number Rev
Custom JACK/AMP_TAP0312 1A
AGND AGND AGND NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 30 of 48
1 2 3 4 5 6 7 8
A B C D E

+VA

R424
T147

T139
No Ground Plane In DAA Section

Homologation Area
31
*Contact_Vendor/06

3VSUS R423
4 4
MR10
*10K/06 MQ1

C583

C605 0.1 uF/06


U24
0.1 uF/06 1 16
NC1 GPIO_A/EE_SC
2 VDDIO GPIO_B/EE_SD/PNPID 15
BIT_CLK_AUDIO_MDC 3 14
BCLK/BIT_CLK NC3 MR5
4 VD VA 13
ACZ_SDIN1_MDC 5 12 MR11 MQ4
ACZ_SDOUT_AUDIO_MDC SDI/SDATA_IN GND MR3
6 SDO/SDATA_OUT AOUT 11
ACZ_SYNC_AUDIO_MDC 7 10 R376 56.2/04C1A
SYNC C1A MQ2
ACZ_RST#_AUDIO_MDC 8 9 R377 56.2/04C2A MC4 MR1
RST#/RESET# C2A
MR2 MC10
Si3054
SI-2 change footprint MQ5 MR4
MU1
1 16 MR6
QE DCT2
2 DCT IGND 15
ACZ_RST#_AUDIO_MDC 3 14
ACZ_SYNC_AUDIO_MDC ACZ_RST#_AUDIO_MDC 21 RX DCT3
MC1 4 13
BIT_CLK_AUDIO_MDC ACZ_SYNC_AUDIO_MDC 21 IB QB
C1A 5 12
ACZ_SDOUT_AUDIO_MDC BIT_CLK_AUDIO_MDC 21 C1B QE2
ACZ_SDOUT_AUDIO_MDC 21 6 C2B SC 11
ACZ_SDIN1_MDC R437 33/04 MC2 7 10 MQ3
ACZ_SDIN1 21 VREG VREG2
C2A 8 9
RNG1 RNG2
3 3
Si3080
MC5 MC6

MC7
MR9
MZ1

MC3
MR8

MD2
MFB2 MFB4

MC9

MJP1

MD1 1
MRV1 2
Modem Header
MH2 FID1 FID2
MC8

*Test Point *Test Point *Test Point


2 2
MR7 MF1

MFB1 MFB3

DESIGN SUBJECT TO CHANGE SILICON LABORATORIES CONFIDENTIAL

1 1

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom MODEM(DAA) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 31 of 48
A B C D E
5 4 3 2 1

+3V +5V
5VSUS

32
40 mils (Iout=1A)
USBX2 2
U21

VIN1 OUT3 8 USB0PWR SI-2 change footprint

2
3 7
CD-ROM VIN2 OUT2

1
R608 4 6
10K/06 EN OUT1 C517 C518 C538
1 GND OC 5
*470P/50V/04 .1U/10V/04
IDERST# C495 G545C2PU8 100U/6.3V
22,23,33,35,37,39 PLTRST# 1 3
Q41 CN25 1U/6.3V/04 (TPS2061D)

2
DTC144EUA CDAUD_L CDAUD_R
CD_GND 1 2
IDERST# 3 4 PDD8
R370 1K/04 CDAUD_L PDD7 5 6 PDD9
D 29 CDINL2 7 8 D
PDD6 PDD10
29 CDINR2 R367 1K/04 CDAUD_R PDD5 9 10 PDD11 USB 0
PDD4 11 12 PDD12
R392 1K/04 CD_GND PDD3 13 14 PDD13 R329 0/04
29 CDGND1 15 16 CN29
PDD2 PDD14
PDD1 17 18 PDD15 L46 USB0PWR
19 20 4 GND 5
PDA[0..2] PDD0 PDDREQ 1 2 USB0+1 6
21 PDA[0..2] 21 22 22 USBP0+ 2 GND
PDIOR# 4 3 USB0-1 7
23 24 22 USBP0- 3 GND
PDD[0..15] PDIOW# 8
21 PDD[0..15] PDIORDY 25 26 PDDACK# *WCM2012-90 1 GND
IRQ14 27 28 IOCS16#
29 30 T223
PDIOW# PDA1 DIAG# R325 0/04
21 PDIOW# 31 32
PDDREQ PDA0 PDA2 C487 C474
21 PDDREQ 33 34
PDIORDY PDCS1# PDCS3# *47P/50V/06 *47P/50V/06 020173MR004S582ZL

1
21 PDIORDY PDIOR# 35 36
21 PDIOR# 37 38 CDVCC
IRQ14
21 IRQ14 CDVCC 39 40

2
PDDACK# C490
21 PDDACK# 41 42
PDCS1# *Clamp-Diode/06 C477
21 PDCS1# 43 44
PDCS3# CD.46 *Clamp-Diode/06
21 PDCS3# 45 46 T222
R197 470/04 CSEL
CD_P49 47 48 CD.50

51
52
T89 49 50 T221

51
52
C124E7-25001-L 5VSUS 40 mils (Iout=1A)
U18
+5V 2 8 USB1PWR
VIN1 OUT3
3 VIN2 OUT2 7 SI-2 change footprint

1
NC for slave 4 EN OUT1 6
PDIOR# R228 *4.7K/04 1 5 C496
PDIOW# R223 *4.7K/04 GND OC C386 C387
C C
C499 G545C2PU8 *470P/50V/04 .1U/10V/04 100U/6.3V
check list +3V 1U/6.3V/04 (TPS2061D)

2
PDIORDY R234 4.7K/04 CDVCC
-- need to IRQ14 R236 8.2K/04 L40 0/08
pull-up 120 mils
DIAG# +5V
R233 *4.7K/04 5VSUS
USB 1
R214 *10K/04 C356 C346 C357 C347 C364
.1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 10U/6.3V/08 R246 0/04
CN27
L41 USB1PWR
4 GND 5
1 2 USB1+1 6
22 USBP1+ 2 GND
4 3 USB1-1 7
22 USBP1- 3 GND
1 GND 8
*WCM2012-90

R240 0/04
C427 C397

1
*47P/50V/06 *47P/50V/06 020173MR004S582ZL

+3V 3VSUS
SI-2 swaped for fix dash issue

2
C417 C399
R851 *0/08 *Clamp-Diode/06 *Clamp-Diode/06

R852 0/08 SI-2 change


SATA_1 C881 .1U/10V/04
CN38
CON.
5VSUS
B CONNECTOR USBX1 CN19
5VSUS
B

CN28 R766 0/04 FINGER_USB9+ 4


22 USBP2+ FINGER_USB9- 3 4
R767 0/04
22 USBP2- 2 22 USBP9+ 3
1 22 USBP9- 2
1 C741
GND1 1 .1U/10V/04
TXP 2 SATA_TXP0 21
3 3800-E04N-00R
TXN SATA_TXN0 21
4 SI-1 add AF1043-A2G1Z
GND2
RXN 5 SATA_RXN0 21
6
RXP
GND3 7
3VSATA
SATA_RXP0 21
USB fingerprint CON
8 R311 0/08 USB CAMERA CONNECT CN5
3.3V +3V
3.3V 9 4
10 R205 0/04 CAM_USB3+
3.3V 22 USBP3+ CAM_USB3- 3
GND 11 22 USBP3- 2
12 HDD_VDD 5VSUS 3.6V-CAMARA R206 0/04
GND 3.6V-CAMARA 1
GND 13
14 R275 0/08 +5V 3800-E04N-00R
5V U49
5V 15
16 3 4 SI-1 mofidied C578
5V VIN VOUT R818 *.1U/10V/04
GND 17 from HP
RSVD 18
19 C879 request *0/12
GND
20 1
12V
12V 21 3VSATA HDD_VDD 1U/6.3V/04 SHDN R1 R828
215K/F/04
12V 22
C946 5VSUS
A 2 GND SET 5 A
C455

C459

C476

4.7U/10V/06
C11804-12204-L IC(5P) G913C (SOT23-5)EP

C449 C440 C453 C450 R827


10U/6.3V/08 4.7U/10V/08.1U/10V/04 22U/08 R2 100K/F/04
4.7U/10V/08

4.7U/10V/08

.1U/10V/04

PROJECT : AT3
SI-2 modified for fix
camera power fail Quanta Computer Inc.
Size Document Number Rev
Vout=1.25(1+R1/R2) NB5/RD1/HW2
Custom SATA HDD/CD-ROM/USBX3 1A

Date: Tuesday, January 09, 2007 Sheet 32 of 48


5 4 3 2 1
5 4 3 2 1

33
T : Stuffed for RTL8111B(10/100/1000) giga LAN part number AJ081110006

E : Stuffed for 8101E(10/100)

SI-1 BOM add to fix


LAN_TX# 10/100 LAN LED issue
D D
LAN_D1.5 LAN_D1.5

LAN_A3.3 LAN_A3.3 R345 0/04 LAN_GLINK100#

XTAL1 LAN_GLINK10#
Y3 LAN_GLINK1000#
1 2 XTAL2
LANVCC LANVCC
GVDD
25MHZ LAN_D1.5
34 CTRL15 CTRL15

C500 C493 C486 C491 R330 2.49K/F/04 LAN_D1.5


27P/06
for 93C56 used. NC if 93C46 is used.
27P/06
.1U/10V/04 .1U/10V/04 LAN_D1.5
R327 *2K/F/04
U19 R407 *10K/04

65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
LANVCC
LANVCC

VCTRL15

CKTAL2
CKTAL1
AVDD33
VDD15
LED_TX#
LED_100#
LED_10#
LED_1000#
VDD33
VDD15

VDD15
GND
RSET

GVDD

NC
NC
34 CTRL18 CTRL18 1 48 EESK U22
LAN_A3.3 VCTRL18 EESK EEDI +3V EECS
2 AVDD33 EEDI 47 1 CS VCC 8
LAN_A3.3 MDI0+ 3 46 LANVCC LANVCC EESK 2 7 C553
MDI0- MDIP0 VDD33 EEDO EEDI SK DC .1U/16V/04
4 MDIN0 EEDO 45 3 DI ORG 6
LAN_A1.8 LAN_A1.8 EECS EEDO
R21 value should be 2.49K MDI1+
5
6
AVDD18 EECS 44
43 LAN_D1.5
4 DO GND 5
MDIP1 VDD15
(1%) for 8111B/8111C MDI1-
LAN_A1.8
7
8
MDIN1 NC 42
41 LAN_D1.5 93C46-3GR
AVDD18
application. R21 should be MDI2+ 9 MDIP2
RTL8111B/8111C/8101E VDD15
NC 40 R356 3.6K/06 R381
MDI2- 10 39 1K/04 1 2 LANVCC
C
2.0K(1%) for 8101E LAN_A1.8 11
MDIN2
AVDD18
NC
VDD15 38 LAN_D1.5 C
MDI3+ LANVCC
application MDI3-
12
13
MDIP3 VDD33 37
36
LANVCC
ISOLATEB R358 *0/F/06
MDIN3 ISOLATEB# LAN_DISABLE# 21
LAN_A1.8 14 35
AVDD18 NC

LANWAKEB#
LAN_D1.5 LAN_D1.5 15 34 if ISOLATEB pin

PDAT_SMB
PCLK_SMB
VDD15 NC

2
REFCLK_N
REFCLK_P
LANVCC 16 33 LAN_D1.5

PERSTB#
VDD33 VDD15 pull-low,the LAN

EVDD18

EVDD18
LANVCC R355

VDD15

VDD15
AGND

HSON
AGND
HSOP
chip will not drive

HSIN
HSIP
15K/04
BLOCK A is only for RTL8101E application. it's PCI-E outputs
( excluding

1
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
PCIE_WAKE# pin )
LAN_REST#

T103 LAN_D1.5
T100
MDI0+

MDI1+
MDI0-

MDI1-

LAN-AGND
PCIE_WAKE# PCIE_RXN2_LAN_L C513 .1U/10V/04
23,35,39 PCIE_WAKE# PCIE_RXN2_LAN 22
PCIE_RXP2_LAN_L C509 .1U/10V/04
PCIE_RXP2_LAN 22
LAN_D1.5 LAN_D1.5 LAN_E1.8
LAN_E1.8
LAN_E1.8 LAN_E1.8 CLK_PCIE_LAN#
CLK_PCIE_LAN# 2
R320 R319 R318 R317 CLK_PCIE_LAN
CLK_PCIE_LAN 2
*49.9/F/06 *49.9/F/06 *49.9/F/06 *49.9/F/06 PCIE_TXP2_LAN
22 PCIE_TXP2_LAN
PCIE_TXN2_LAN LAN-AGND
22 PCIE_TXN2_LAN
R335 *0/04
23,37,48 LAN_REST
R333 0/04
22,23,32,35,37,39 PLTRST#
C461 R339 0/04
C460
*.01U/16V/04 *.01U/16V/04 LAN_A1.8 R351 0/04

Remove R70 LAN-AGND


Block A
B for 8111B R316 B

RJ45 and 8111C *0/04

CN21 U14
LANVCC R154 150/04 LAN_YLED 1 C475 .01U/16V/04 V_DAC 1 24 LAN_MCT0 R263 75/F/04
LAN_YLED# LED_YEL_P TCT1 MCT1
2 LED_YEL_N
C877 MDI0+ +LAN_MX0 R142 0/04
2 TD1+ MX1+ 23 +LAN_MX0_PR 38
+LAN_MX0 3 15
-LAN_MX0 MX0+ GND MDI0- -LAN_MX0 R143 0/04
4 MX0- 3 TD1- MX1- 22 -LAN_MX0_PR 38
*.1U/10V/04 +LAN_MX1 5 16
+LAN_MX2 MX1+ GND C466 .01U/16V/04 V_DAC 4 LAN_MCT1 R251 75/F/04
SI-1 modified 6 MX2+ TCT2 MCT2 21
-LAN_MX2 7
to fix giga C878 -LAN_MX1 8
MX2- MDI1+ 5 20 +LAN_MX1 R144 0/04
MX1- TD2+ MX2+ +LAN_MX1_PR 38
LAN LED issue +LAN_MX3 9
-LAN_MX3 MX3+ MDI1- -LAN_MX1 R145 0/04
10 MX3- GND 17 6 TD2- MX2- 19 -LAN_MX1_PR 38
*.1U/10V/04
LANVCC R180 150/04 LAN_GLED 11 18 C467 .01U/16V/04 V_DAC 7 18 LAN_MCT2 R252 75/F/04
LAN_GLED# LED_GRE_PGND TCT3 MCT3
12 LED_GRE_N
CHASSIS_GND

MDI2+ 8 17 +LAN_MX2 R146 0/04


CN2 TD3+ MX3+ +LAN_MX2_PR 38
TIP 13 MDI2- 9 16 -LAN_MX2 R147 0/04
2 TIP TD3- MX3- -LAN_MX2_PR 38
RING 14
1 RING C468 .01U/16V/04 V_DAC 10 LAN_MCT3 R253 75/F/04
TCT4 MCT4 15
3800N-E002-NNN C100F9-110A4-L
MDI3+ 11 14 +LAN_MX3 R148 0/04
TD4+ MX4+ +LAN_MX3_PR 38
C746 C745 MDI3- 12 13 -LAN_MX3 R149 0/04
TD4- MX4- -LAN_MX3_PR 38
470P/3KV-18 08 470P/3KV-180 8 C398
NS892403/2404
1000P/3KV
close U6
NS892403:GIGABIT
LAN_GLINK10# D36 1 2 CH501H-40PT L-F C755 .1U/10V/04 C127 .1U/10V/04
A A
LAN_GLED#
NS892405:10/100
LAN_GLINK100# D35 1 2 CH501H-40PT L-F
C754 .01U/16V/04 C133 .01U/16V/04
LAN_GLINK1000# D37 1 2 CH501H-40PT L-F
CHASSIS_GND

CHASSIS_GND

LAN_TX# D4 1 2 CH501H-40PT L-F LAN_YLED#

C732 C256 PROJECT : AT3


*.1U/10V/04 *.1U/10V/04 Quanta Computer Inc.
Size Document Number Rev
Custom RTL8111B/8111C/8101E 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 33 of 48
5 4 3 2 1
5 4 3 2 1

T : Stuffed for RTL8111B(10/100/1000)

E : Stuffed for 8101E(10/100)


LANVCC
1.2W
L47 0/08
LANVCC 34
LANVCC_L 364mA

all component place


D near lan power C515 C531 C535 C485 these CAP are for LAN CHIP LANVCC D
.1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04
mosfet C539 pins--16, 37, 46 and 53.placement close lan
C540
22U/6.3V/08 .1U/10V/04
chip

LAN_A3.3

L45 0/08

C480 C505 these CAP are for LAN CHIP LAN_A3.3


.1U/10V/04 .1U/10V/04
pins-- 2 and 59.placement close lan chip

LANVCC
3

C C
MMJT9435T1
Only For 8111B application
33 CTRL18
CTRL18 1
Q19

LAN_A1.8
Power domain chart
L52 0/08
2
4

LAN_A1.8
RTL8111B /
RTL8101E
these cap are for lan
C561 C567
22U/08 C472 C470 C471 C469 chip LAN_A1.8 LANVCC 3.3V
.1U/10V/04
L54 *0/08 .1U/10V/04.1U/10V/04 .1U/10V/04 .1U/10V/04 pins--5, 8, 11 and 14.
placement close chip LAN_D1.8 1.8V
C568
22U/08 LAN_A1.8 1.8V

LAN_E1.8 LAN_D1.5 1.5V


Only For 8101E application R361 0/12

C497 C498 these cap are for lan chip


.1U/10V/04 .1U/10V/04
B LAN_D1.8 pins, such as 22 and 28. B

placement close lan chip Q1 Q3


LAN-AGND
RTL8111B Need Need

LANVCC
RTL8101E N/A N/A
3

Only For 8111B application LAN_D1.5


33 CTRL15
CTRL151 MMJT9435T1
Q21
2
4

A
L53 *0/08 C586 C585 C530 C534 C519 C520 C527 C526 C532 C492 C533 C478 A
22U/08 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04.1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04
.1U/10V/04

C546
22U/08
PROJECT : AT3
these cap are for lan chip LAN_D1.5 pins-- 15, Quanta Computer Inc.
Only For 8101E application 21, 32, 33, 38, 41, 43, 49, 52 and 58.placement
Size Document Number Rev
close lan chip A3 LAN POWER 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 34 of 48
5 4 3 2 1
A B C D E

SATA_2 CONNECTOR
For 17"W Second HDD
NEWCARD
CN9 AC B TO B
35
PCIE_WAKE#
1 2 PCIE_WAKE# 23,33,39
PCLK_SMB PLTRST#
2,23 PCLK_SMB 3 4 PLTRST# 22,23,32,33,37,39
PDAT_SMB CPPE#
D 2,23 PDAT_SMB 5 6 D
CN33 LID_EC# T149
7 8 LID_EC# 26,36,37,48
NEW-CARD_CLK_REQ#
9 10 NEW-CARD_CLK_REQ# 2
CLK_PCIE_NEW_C#
2 CLK_PCIE_NEW_C# CLK_PCIE_NEW_C 11 12
GND1 1 2 CLK_PCIE_NEW_C 13 14
TXP 2 SATA_TXP2 21 15 16
TXN 3 SATA_TXN2 21 17 18
4 PCIE_RXN1
GND2 22 PCIE_RXN1 19 20
5 SATA_RXN2 21 PCIE_RXP1
RXN 22 PCIE_RXP1 21 22
RXP 6 SATA_RXP2 21 23 24 +1.5V
GND3 7 25 26
3VSATA_2 PCIE_TXN1
22 PCIE_TXN1 PCIE_TXP1 27 28
22 PCIE_TXP1 29 30 3VPCU
8 R410 0/08
3.3V +3V 31 32 3V_S5
3.3V 9 33 34 +3V
10 USBP7-
3.3V 22 USBP7- 35 36
11 USBP7+
GND HDD2_VDD 22 USBP7+ 37 38
GND 12 39 40
GND 13 41 42 5VSUS
14 R375 0/08 +5V
5V 22 USBP8- 43 44
5V 15 22 USBP8+ 45 46
5V 16 47 48
17

51
52
GND 49 50
RSVD 18
19

51
52
GND
12V 20
12V 21
22 3VSATA_2 HDD2_VDD
12V

C C
*Serial ATA

C579 C594 C593 C542 C543 C545


C537 5VSUS
10U/6.3V/08 4.7U/6.3V/08 .1U/10V/04 10U/6.3V/084.7U/6.3V/08.1U/10V/04 22U/08 +3V 3V_S5 +1.5V

1
C580 C551 C829 C558 C523 C524

10U/6.3V/08 .1U/10V/04 .1U/10V/04 .1U/10V/04 10U/6.3V/08 .1U/10V/04

2
3VPCU 3VSUS

BLUETOOTH R278
4.7K/04
1

R190 0/04 Q7 SI-2 modified (remove


2 AO3409
serial resistors) from HP
recommend
B B
C331
3

*.1U/10V/04
3

2 Q15 BC0EX1
23 BT_OFF# BBC0EX1 39
PDTC144EU 24mil
BTV BC0EX2
BBC0EX2 39
C758
1

C319
10U .1U/10V/04

SI-1 modify footprint


CN3

8
7 USB5+
6 USBP5+ 22
USB5-
5 USBP5- 22
BLUELED
4 BLUELED 36,39
BC0EX1
3 BC0EX2
2 BTCON_P1
1 T88
3800-E08N-00R

A A

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom NEW CARD/BT 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 35 of 48
A B C D E
5 4 3 2 1

3VPCU
3VPCU
+3V

+3V

C864 C844
CN12

1
for EMI
request
+3V

C393

*.1U/10V/04
C394
*.1U/10V/04
CN8
MY5
MY6
MY3
MY7
C423
C410
C409
C412
220P/50V/06
220P/50V/06
220P/50V/06
220P/50V/06
MY1
MY2
MY4
MY0
C422
C414
C413
C424
220P/50V/06
220P/50V/06
220P/50V/06
220P/50V/06
MX7
MX0
MX5
MX1
C376
C366
C425
C375
220P/50V/06
220P/50V/06
220P/50V/06
220P/50V/06
36
*.1U/10V/04 *.1U/10V/04 2
PWR_LED# 3 1
MBATLED0# 4 2 MY8 C411 220P/50V/06 MX4 C426 220P/50V/06 MY12 C408 220P/50V/06
for EMI 5 5,17,37,41,48 MBCLK 3
STAT_LED# MY9 C377 220P/50V/06 MX6 C374 220P/50V/06 MY13 C407 220P/50V/06
request WLSLED_ON# 6 37,48 NUMLED#
MEPACK 4 MY10 C404 220P/50V/06 MX3 C367 220P/50V/06 MY14 C406 220P/50V/06
D 7 37,48 MEPACK 5 D
WLSLED_OFF# MEP_DATA MY11 C405 220P/50V/06 MX2 C368 220P/50V/06 MY15 C403 220P/50V/06
8 37,48 MEP_DATA 6
RF_SW# MEP_CLK
37,39,48 RF_SW# 9 37,48 MEP_CLK 7 MY16 C370 220P/50V/06
10 MUTE_LED 8 MY17 C369 220P/50V/06
FOR 17" LED AND WIRLESS SW BOARD 29,38 MUTE_LED 9
*PTI-AF710L-A2G1T 10
11
5,17,37,41,48 MBDATA 12
SI-2 modified for fix s3 not
KEYBOARD PULL-UP
PTI=AF712L-A2G1T
support wirless LED
CN6
FOR CAP SW BOARD CONN
CN7 RP39 MX1 1
3VSUS MY2 MX7 1
3VPCU 1 10 1 2 2
PWR_LED2# NBSWON1# R232 MY1 9 2 MY4 MX6 3
NBSWON1# 2 150/04 MY5 MY7 MY9 3
37,48 NBSWON1# 3 8 3 4 4
C388 1 2 PWR_LED2# MY0 7 4 MY8 MX4 5
26,35,37,48 LID_EC# 4 5

1
G1 R235 MY9 6 5 MX5 6
*.1U/10V/04 5 *SHORT_ PAD1 10K/04 MY0 6
30 R_SPK-4 6 7 7

3
10P8R-10K MX2 8
30 R_SPK+3 7 3VPCU 8
MX3 9
30 L_SPK+2 8 9
MY5

2
30 L_SPK-1 RP38 10
9 MY14 MY1 10
10 2 10 1 11 11
for EMI MY13 9 2 MY11 MX0 12
29 INT_MICL 11 2N7002E 12

3
MY12 8 3 MY10 MY2 13
request 29 INT_MICR 12 Q11 MY3 7 4 MY15 MY4 14
13
MY6 MY7 14
6 5 15 15
AGND AF312K-A2G1Z PWR_LED# MY8

1
2 16 16
C 10P8R-10K MY6 17 C
2N7002E MY3 17
18 18
Q12 R225 10K/06 MY16 MY12 19
R224 10K/06 MY17 MY13 19
20 20
MY14

1
21 21
MY11 22
MY10 22
23 23
FOR POWER ON SW BOARD MY15 24
MY16 24
25 25
MY[0..17] MY17 26
37,48 MY[0..17] 26

MX[0..7]
37,48 MX[0..7]
AF1263-A2G1Z
LED5 Blue
PWR_LED# 1 2 PWR_LEDH R482 1 2 150/F/04
37,39,48 PWR_LED# 3VPCU

LED6 Blue
MBATLED0# 1 2 BAT_LEDH R483 1 2 150/F/04
37,39,48 MBATLED0#

LED7 Blue
STAT_LED# 1 2 HDD_LED R481 1 2 150/F/04
21 SATA_LED# +3V
LED1 Blue
CAPSLED# 1 2 CAP_LED R160 1 2 150/F/04
37,48 CAPSLED# +3V
FOR 15.4" LED

B B

LED2 *Blue R188 *150/04


1 2 CAP_LED1 1 2 +3V
FOR 17" LED
LED9 3P BLUE LED
CLED_ON 1 2 CARD_LED1 1 2 +3V
Q23
3

R403 150/F/04

2 Q46
28 CARD_LED
2N7002E
SI-1 modified
1 3 WLSLED_ON#
PDTC144EU
1

3VSUS +3V
+3V SI-1 modified
+3V 3VSUS
2

R709 R805 R820 R806 150/04


*10K/04 R708 Blue 1 2 +3V
2

Q30 10K/04 10K/04


*10K/04 R480 *150/04
PDTC144EU 2 WSLEDP
3 1 2 3VSUS
WLSLED_OFF#
WLSLED_L 1 LED ORANGE/BLUE
39 WWAN# 1 3
SI-1 modified
1 3 LED8
39 RF_LINK#
A A
3

Q28
3 1
Amber
PDTC144EU Q44 2
PDTC144EU
2

+3V 2N7002E
Q45 PROJECT : AT3
Quanta Computer Inc.
2

R476 150/04 3 1
35,39 BLUELED
1

Q31 Size Document Number Rev


PDTC144EU Custom LED/KEYBOARD/SW 1A
NB5/RD1/HW2
FOR WIRLESS LED 23 BTLED Date: Tuesday, January 09, 2007 Sheet 36 of 48
2

5 4 3 2 1
5 4 3 2 1

R221 470K/04 3920_RST# C365 1U/6.3V/04

37
3VPCU STRAP PIN
SCI1# D9 1 2 SW1010CPT 3VPCU
SCI# 23 U13
SERIRQ 3 11 C451 .1U/10V/04
23,28,40,48 SERIRQ SERIRQ VCC1
21,39,48 LFRAME#
LFRAME# 5 26 C395 .1U/10V/04 TP_SPI: Default flash access
LFRAME VCC2
PM_BATLOW1# D11 1 2 SW1010CPT PM_BATLOW# 23 21,39,48 LAD0
LAD0 12 37 C463 .1U/10V/04 MY2 49 Low: Boot from SPI flash part
LAD1 LAD0 VCC3 C465 .1U/10V/04
21,39,48 LAD1 10 LAD1 VCC4 105 HIGH: Boot from ISA flash
LAD2 9 127 C396 .1U/10V/04
21,39,48 LAD2
LAD3 LAD2 VCC5 C454 .1U/10V/04 part
21,39,48 LAD3 6 LAD3 VCC6 141
DNBSWON#1 D10 1 2 SW1010CPT PCLK_LPC_KB3920 14 75 C402 10U/6.3V/08 SI-1 DEL R209,R210,R218,R219,R220
DNBSWON# 23 2,48 PCLK_LPC_KB3920 PLTRST1# PCICLK AVCC
R282 100/06 15
22,23,32,33,35,39 PLTRST# PCIRST/GPIO5
23,28,48 CLKRUN#
CLKRUN# 44 MY3 50 TP_ISP: In System Programming Mode MY2 R208 *10K/04
CLKRUN
KBSMI#1 D7 1 2 SW1010CPT KBSMI# 23 Low: ISP mode
SCI1# MY3 R212 *0/04
D 48 SCI1# 24 SCI/GPIOE HIGH: Normal Mode D
GATEA20 1 71 TEMP_MBAT
21,48 GATEA20 GA20/GPIO0 AD0/GPI38 TEMP_MBAT 41,48
21,48 RCIN# RCIN# 2 72 MBATV
KBRST/GPIO1 AD1/GPI39 MBATV 41,48
SWI#1 D8 1 2 1SS355 48 3920_RST# 3920_RST# 42 73 AD_AIR
SWI# 23 ECRST AD2/GPI3A AD_AIR 41,48
74 SYS_I All hardware straps
AD3/GPI3B SYS_I 41,48
MX0 63 default internal
36,48 MX0 KSI0/GPIO30
MX1 64 76 CC-SET
36,48 MX1 KSI1/GPIO31 DA0/GPO3C CC-SET 41,48 pull-up, so don’t
SI-1 modify ( remove MX2 65 78 CELL_SLT
36,48 MX2 KSI2/GPIO32 DA1/GPO3D CELL_SLT 41,48
SLPBTN# R241 0/04 R245 and add R241 ) MX3 66 79 DA_VADJ need pull-UP outside.
36,48 MX3 KSI3/GPIO33 DA2/GPO3E T92
MX4 67 80 D/C#
36,48 MX4 KSI4/GPIO34 DA3/GPO3F D/C# 41,48 A TEST need try
NBSWON1# R245 *0/04 MX5 68
SLP_BTN# 38 36,48 MX5 KSI5/GPIO35
MX6 69 25 PWM_VADJ --andrew ????
36,48 MX6 KSI6/GPIO36 PWM1/GPIOE PWM_VADJ 26,48
SI-1 modify MX7 70 27 KEY_BEEP (1KHz)
36,48 MX7 KSI7/GPIO37 PWM2/GPIO10 KEY_BEEP 30,48
MY0 47 30 FAN1ON
36,48 MY0 KSO0/GPIO20 FANPWM1/GPIO12 FAN1ON 38,48
MY1 48 31 FAN2ON
MEPACK MEPACK_1 36,48 MY1 KSO1/GPIO21 FANPWM2/GPIO13 FAN2ON 38,48
MY2 49 32 FANSIG
36,48 MEPACK 36,48 MY2 KSO2/GPIO22 FANFB1/GPIO14 FAN1SIG 38,48
MY3 50 33 CIR_IN
ACIN ACIN_1 36,48 MY3 KSO3/GPIO23 FANFB2/GPIO15 CIR_IN 29,38,48
MY4 51
16,41,48 ACIN 36,48 MY4 KSO4/GPIO24
MY5 52 85 MBCLK
VOLME_UP# VOLME_UP#_1 36,48 MY5
MY6 53
KSO5/GPIO25 SCL1/GPIO44
86 MBDATA
MBCLK 5,17,36,41,48 SELECT KBC TPYE
38,48 VOLME_UP# 36,48 MY6 KSO6/GPIO26 SDA1/GPIO45 MBDATA 5,17,36,41,48
MY7 54 87 SLPBTN#_2
VOLME_DN# VOLME_DN#_1 36,48 MY7 KSO7/GPIO27 SCL2/GPIO46
MY8 55 88
38,48 VOLME_DN# 36,48 MY8 KSO8/GPIO28 SDA2/GPIO47 T93
MY9 56 PIN NAME USE KBC3920 USE KBC3926
SIM_DETECT SIM_DETECT_1 36,48 MY9 KSO9/GPIO29
MY10 57
39,48 SIM_DETECT 36,48 MY10 KSO10/GPIO2A
MY11 58
RF_SW# RF_SW#_1 36,48 MY11 KSO11/GPIO2B S5_ON_2
MY12 59 4 MY2 R208 REMOVE R208
36,39,48 RF_SW# 36,48 MY12 KSO12/GPIO2C GPIO2 SUSON_2 T263
MY13 60 7
S5_ON S5_ON_1 36,48 MY13 KSO13/GPIO2D GPIO3 T264
MY14 61 8 SUSB#
47,48 S5_ON 36,48 MY14 KSO14/GPIO2E GPIO4 MAINON_2 SUSB# 23,48
MY15 62 16 BIOS_A0 REMOVE R808 R808
MAINON 36,48 MY15 KSO15/GPIO2F GPIO6 T265
MAINON_1 MY16 89 17 HWPG
29,41,42,43,45,46,47,48 MAINON 36,48 MY16 KSO16/GPIO48 GPIO7 HWPG 42,43,45,46,48
MY17 90 18 PM_BATLOW1#
LAN_POWER LAN_POWER_1 36,48 MY17 KSO17/GPIO49 GPIO8 MEPACK_2 PM_BATLOW1# 48
47,48 LAN_POWER GPIO9 19 T266
MEP_CLK 91 20 SUSC#
C LAN_REST LAN_REST_1 36,48 MEP_CLK PSCLK1/GPIO4A GPIOA SUSC# 23,48 C
MEP_DATA 92 21 LAN_REST_1
23,33,48 LAN_REST 36,48 MEP_DATA PSDAT1/GPIO4B GPIOB LAN_REST_1 23,33,48
MEPACK_1 93 22 SWI#1
SLPBTN# SLPBTN#_1 36,48 MEPACK_1 ACIN_1 PSCLK2/GPIO4C GPIOC SWI#1 48
94 23 NBSWON1#
16,41,48 ACIN_1 TPCLK PSDAT2/GPIO4D GPIOD NBSWON1# 36,48
95 29 BL/C# SI-2 modified
48 TPCLK PSCLK3/GPIO4E GPIO11 BL/C# 41,48
TPDATA 96 34 MBATLED0# remove ISA
LID_EC# LID_EC#_1 48 TPDATA PSDAT3/GPIO4F GPIO16 MBATLED0# 36,39,48
35 PWR_LED#
26,35,36,48 LID_EC# GPIO17 PWR_LED# 36,39,48 BIOS
BIOS_RD# 135 36 KBSMI#1
48 BIOS_RD# RD GPIO18 KBSMI#1 48
BIOS_WR# 136
SUSON 48 BIOS_WR# WR
SUSON_1 BIOS_CS# 144 38 VRON
46,47,48 SUSON 48 BIOS_CS# SELMEM/SPICS GPIO19 VRON 43,44,48
R366 0/04 SERR#_1 97 40 NUMLED#
22,28,40 SERR# ECPWROK SELIO/GPIO50 GPIO1A LAN_POWER_2 NUMLED# 36,48
7,16,23,48 ECPWROK 84 SELIO2/GPIO43 GPIO1B 41 T267
SI-2 modified VOLME_UP#_1 125 43 ACIN_2
38,48 VOLME_UP#_1 VOLME_DN#_1 D0/GPXD0 GPIO1C VOLME_UP#_2 T268
remove ISA BIOS 38,48 VOLME_DN#_1 126 D1/GPXD1 GPIO1E 45 T269
BIOS_D2 VOLME_DN#_2
48 BIOS_D2
BIOS_D3
128
130
D2/GPXD2 GPIO1F 46
81 SLPBTN#_1
T270 TOUCH PAD CONNECTOR
48 BIOS_D3 D3/GPXD3 GPIO40 SLPBTN#_1 48
BIOS_D4 131 82 RPCICGRST#
48 BIOS_D4 D4/GPXD4 GPIO41 RPCICGRST# 28,48
BIOS_D5 132 83 DNBSWON#1
48 BIOS_D5 SIM_DETECT_1 D5/GPXD5 GPIO42 DNBSWON#1 48
133 99 ALERT L30 25 mils
CRY2 39,48 SIM_DETECT_1 RF_SW#_1 D6/GPXD6 GPIO52 ALERT 16,48
134 100 CAPSLED# 5VTP C330 .1U/10V/04
CRY1 CRY2 48 36,39,48 RF_SW#_1 D7/GPXD7 GPIO53 CAPSLED# 36,48 5VSUS
101 TP_LED1# BK1608HS800-T/06
DA_VADJ CRY1 48 BIOS_A0 GPIO54 TP_LED1# 48
111 102 TP_LED2#
PLTRST1# DA_VADJ 48 48 BIOS_A0 SUSON_1 A0/GPXA0 GPIO55 TP_LED2# 48
112 104 RSMRST#
SERR#_1 PLTRST1# 48 46,47,48 SUSON_1 MAINON_1 A1/GPXA1 GPIO56 RSMRST# 23,48
113 137 VOLMUTE#
SERR#_1 48 29,41,42,43,45,46,47,48 MAINON_1 LAN_POWER_1 A2/GPXA2 GPIO57 VOLMUTE# 29,30,48 4
114 142 SPI_CLK TPCLK L28 SBK160808T-221/06 TPCLK-1
47,48 LAN_POWER_1 S5_ON_1 A3/GPXA3 GPIO58 LID_EC#_1 SPI_CLK 48 3
115 143 TPDATA L31 SBK160808T-221/06 TPDATA-1
47,48 S5_ON_1 A4/GPXA4 GPIO59 LID_EC#_1 26,35,36,48 2
BIOS_A5 116 C489 18P/04 (Amber)
48 BIOS_A5 A5/GPXA5 1
BIOS_A6 117 C323
48 BIOS_A6 A6/GPXA6

3
BIOS_A7 CRY2 C327 LED3 R609 150/04
48 BIOS_A7 118 A7/GPXA7 XCLKO 140
BIOS_A8 119 Y2 *10P/50V/04 *10P/50V/04 TP_LED1# TPLD1 1 2
48 BIOS_A8 A8/GPXA8 1 3 +3V
BIOS_A9 120 32.768KHZ CN4 R610 150/04
48 BIOS_A9 A9/GPXA9 CRY1
BIOS_A10 121 138 AF1043-A2G1Z TP_LED2# TPLD2 1 2
48 BIOS_A10 A10/GPXA10 XCLKI 2 4 +3V
BIOS_A11 122
48 BIOS_A11 A11/GPXA11
T1 BIOS_A12

2
123 A12/GPXA12
B T2 BIOS_A13 124 13 C488 18P/04 PCLK_LPC_KB3920 R249 *0/04
C428 *33P/50V/04 (Blue) LED BLUE/AMBER B
T3 BIOS_A14 A13/GPXA13 GND1 R290 4.7K/04 TPCLK
110 A14/GPXA14 GND2 28 5VSUS
T4 BIOS_A15 109 39 R291 4.7K/04 TPDATA
SI-2 modified T5 BIOS_A16 A15/GPXA15 GND3
108 A16/GPXA16 GND4 103 for EMI request FOR 15.4"
remove ISA T6 BIOS_A17 107 129 close conn
T7 BIOS_A18 A17/GPXA17 GND5
106 A18/GPXA18 GND6 139
BIOS T8 BIOS_A19 98 77
A19/GPIO51 AGND SW1 SW2 (Amber)
*KB3920 2 1 2 1
MY7 MX4 MY7 MX4 *LED4 R312 *150/04
4 3 4 3
TP_LED1# TPLD3 1 2
1 3 +3V
NTC031-AA1G-A160T *NTC031-AA1G-A160T R313 *150/04
TP_LED2# TPLD4 1 2
2 4 +3V

FOR 15.4" FOR 17" (Blue) *LED BLUE/AMBER


FOR 17"

SI-1 ADD 3VPCU


+3V R274 *10K/04 HWPG 3VPCU

R314
R204 100K/04 CIR_IN U17
3VPCU NBSWON1# BIOS_CS# 10K/04
R222 10K/04 R346 1 8
R215 10K/04 VOLME_UP# SPI_CLK R813 0/04 CE# VDD
6 SCK
R207 10K/04 VOLME_DN# 10K/04 BIOS_WR#R814 0/04 5
R297 10K/04 SLPBTN# BIOS_RD# R815 0/04 SI SPI_7P
2 SO HOLD# 7
R248 4.7K/04 MBCLK
R261 4.7K/04 MBDATA SPI_3P 3 4
R247 *8.2K/04 PM_BATLOW# WP# VSS
A R262 10K/04 MEP_CLK MX25L8005 A
R276 10K/04 MEP_DATA
1M byte
ICH8 has internal SPI
pull-up BIOS
R289 *470K/04 LAD0
+3V
R294 *470K/04 LAD1 PROJECT : AT3
Quanta Computer Inc.
R300 *470K/04 LAD2
R304 *470K/04 LAD3
R306 *470K/04 LFRAME#
Size Document Number Rev
Custom KB3920/ROM/TP 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 37 of 48
5 4 3 2 1
A B C D E

CABLE DOCK
38
support 6A 200mils
CX000480005

+1.5V DOCK_VA L61


FBMJ3216HS480NT/12
SI-1 mofidied ( VA_P
41 DOCK_VA
BOM add for
support docking R522
SPIDF 33/04 C883 C658 C651 CN18
.1U/10V/04 0.1U/50V/06 0.1U/50V/06
4 4
VA_P 44 43 VA_P
VDD VDD

3 SPDDK_V
PR_GEN R45 0/04 CRT_GDK 38 39
25 PR_GEN CRT_RDK 38 39 S-YD-DO-PR
PR_RED R38 0/04 40 37 R510 0/04
25 PR_RED 40 37 S-CD-DO-PR S-YD-DO 25
Q37 34 35 R516 0/04
25 DDCDAT2 CRT_BDK 34 35 S-CVBS-DO-PR S-CD-DO 25
MMBT3904 PR_BLU R54 0/04 36 33 R518 0/04
25 PR_BLU PR_HSYNC_D 36 33 S-CVBS-DO 25
R531 510/F/04 SPDIF_DK 2 R811 0/06 30 31
20,29 SPDIF 25 PR_HSYNC 30 31
25 DDCCLK2 32 32 29 29 CIR_IN 29,37,48
SI-1 ADD EMI request USB4-1 26 27 PWR_ON
L68 0/06 26 27

1
R525 C681 SPD_DK SPDIF_DOCK R812 0/06 PR_VSYNC_D 28 25 MUTE_LED
25 PR_VSYNC 28 25 MUTE_LED 29,36
510/F/04 22 23 SLP_BTN#
USB4+1 22 23 SLP_BTN# 37
68P/50V/04 SI-1 ADD EMI request 24 21 JACK_DETECT#
24 21 JACK_DETECT# 30
18 19 VOLME_UP#
33 +LAN_MX3_PR 18 19 VOLME_UP# 37,48
20 17 VOLME_DN#
33 -LAN_MX3_PR 20 17 VOLME_DN# 37,48
R528 0/04 15 SPDIF_DOCK
15
33 +LAN_MX2_PR 14 14
2 3 USB4-1 16 13
22 USBP4- 33 -LAN_MX2_PR 16 13 AGND
1 4 USB4+1 10 11 RSPK_DK C60 100U/6.3V
22 USBP4+ 33 +LAN_MX1_PR 10 11 DOCK_RSPK+ 30
LSPK_DK C75 100U/6.3V

+ +
33 -LAN_MX1_PR 12 12 9 9 DOCK_LSPK+ 30
+3V 3VPCU L67 6 7
33 +LAN_MX0_PR 6 7 DOCK_MIC_R 29
*CMM211T-900M-S 8 5
33 -LAN_MX0_PR 8 5 DOCK_MIC_L 29
R526 0/04 2 3
2 3 AGND
1

VIN 4 1 DOCK_PRESENT
4 1
R844 PR_HSYNC_D C894 42 41
100K/04 R548 VSS VSS
46 46 45 45
*100K/04 PR_VSYNC_D 0.1U/50V/06
QL1122L-H212AR-7F
2

3 3
PR_INSERT#
PR_INSERT# 25
C892 C893
docking
*47P/50V/06 *47P/50V/06 SI-1 ADD EMI request
insert is HI
3

voltage
DOCK_PRESENT 1 2 DKPR# 2 Q40
R579 1K/04 2N7002E SI-1 ADD EMI request PR_GEN CRT_GDK
PR_RED
R573 PR_BLU CRT_RDK
2K/F/06
DOCK_MIC_R CRT_BDK S-YD-DO-PR
1

DOCK_MIC_L
RSPK_DK S-CD-DO-PR
LSPK_DK SI-1 ADD
JACK_DETECT# S-CVBS-DO-PR
D33 VOLME_DN# EMI request C941 C942 C943
2 1 SW1010CPT CIR_IN
+5V
C918 C919 C920 5.6P/06 5.6P/06 5.6P/06 R519 R517 R506
R520 1 2 10K/04 DK_PWRON 2 1 SW1010CPT PWR_ON
5VSUS
D34 C673 C677 C674 C897 C898 C902 C903 5.6P/06 5.6P/06 5.6P/06
1

S0: 4V *Check *150/F/04 *150/F/04 *150/F/04


R527 PR_GEN
S3: 2.5V voltage on 15K/04
DB
S4/S5: *120P/50V/04 *120P/50V/04 270P/25V/04 180P/50V/04 180P/50V/04 PR_RED
180P/50V/04
2

0V
180P/50V/04 PR_BLU
2 2

SI-2 modified for fix


R56 R30 R39
docking R.G.B signals
FAN measure fail
150/F/04 150/F/04 150/F/04

D39
EXTERNAL VGA CPU FAN
FAN RESEVRE 1 2
CN20 CN22
L72 L73 *SSM34PT L-F
*0/08 20 mil 20 mil 0/08
5VFAN2 5VFAN1
+5V 4 +5V 4
37,48 FAN2ON 3 37,48 FAN1ON 3
C739 C740 C749 C748
2 2
1 1
*2.2U/6.3V/06 *.1U/10V/04 2.2U/6.3V/06 .1U/10V/04
*PTI=CWP043-A0G1T
PTI=CWP043-A0G1T

near to connector.
+5V R594 4.7K/06 FAN1SIG
FAN1SIG 37,48
FAN2 PWM CONNECTOR
1 1

FAN1 PWM CONNECTOR

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom CABLE DOCKING/FAN 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 38 of 48
A B C D E
A B C D E

Mini PCI-E Card 1


WLAN
+3V 3VSUS
39
3VWLAN R669 0/12 R699 0/06

only resever AT3/5 not 3VWLAN +1.5V +1.5V 3VWLAN 3VSUS


D D
support IAMT CN35
51 Reserved +3.3V 52
R725 *0/04 49 50
7,23 CL_RST#0 Reserved GND
R726 *0/04 47 48 C825 C823 C834 C826 C833 C595 C821
23 ICH_CL_DATA1 Reserved +1.5V
R727 *0/04 45 46 MINI_BLED R679 *0/04 .01U/16V/04.1U/10V/04 10U/6.3V/08 .1U/10V/04 10U/6.3V/08 .1U/10V 1U/6.3V/04
23 ICH_CL_CLK1 Reserved LED_WPAN# BLUELED 35,36
43 44 RF_LINK#
Reserved LED_WLAN# RF_LINK# 36
41 Reserved LED_WWAN# 42
39 40 R680 10K/04
Reserved GND +3V
37 Reserved USB_D+ 38
35 GND USB_D- 36
PCIE_TXP0 33 34
22 PCIE_TXP0 PETp0 GND
PCIE_TXN0 31 32 DAT_SMB R696 0/04 CGDAT_SMB 2,13,14
22 PCIE_TXN0 PETn0 SMB_DATA
29 30 CLK_SMB R697 0/04 CGCLK_SMB 2,13,14 INTEL WLAN
GND SMB_CLK
27 GND +1.5V 28 CARD PIN 20
PCIE_RXP0 25 26 3VSUS
22 PCIE_RXP0 PERp0 GND W_DISABLE#
PCIE_RXN0 23 24
22 PCIE_RXN0 PERn0 +3.3Vaux
21 22 PLTRST# have R647 *10K/04
GND PERST# PLTRST# 22,23,32,33,35,37
R675 0/04 DEB_CLK 19 20 MINIRF_OFF# R702 0/04
2 PCLK_LPC_DEBUG Reserved W_DISABLE# RF_OFF# 23 internal
R670 0/04 DEB_RST# 17 18
22,23,32,33,35,37 PLTRST# Reserved GND pull-up 110k

2
15 16 LAD0_1 R672 0/04 LAD0 LAD0 21,37,48 ohm
CLK_PCIE_MINI GND Reserved LAD1_1 R700 0/04 LAD1
2 CLK_PCIE_MINI 13 REFCLK+ Reserved 14 LAD1 21,37,48
CLK_PCIE_MINI# 11 12 LAD2_1 R701 0/04 LAD2 LAD2 21,37,48
2 CLK_PCIE_MINI# REFCLK- Reserved
9 10 LAD3_1 R698 0/04 LAD3 LAD3 21,37,48
T152 CLK_MINI_OE# GND Reserved LFRAME#_1 R681 0/04 LFRAME# MINICAR_PME#
7 CLKREQ# Reserved 8 LFRAME# 21,37,48 23,33,35 PCIE_WAKE# 3 1
5 6 Q43
35 BBC0EX2 BT_CHCLK +1.5V
3 4 *PDTC144EU
35 BBC0EX1 BT_DATA GND
MINICAR_PME# 1 2
WAKE# +3.3V
C C
BT_DATA,BT_CHCLK,CLKREQ# 1827680-1 +3V
internal pull-DOWN 100k
ohm
R479
for 15' RF switch 10K/04
DEB_CLK R704 *0/04 C822 *33P/50V/04
SW3

23
36,37,48 RF_SW#
for EMI request
NSS508-012N-AAAD1B-A

WWAN -- have 2.8A 7W power SI-2 modified


Mini PCI-E Card 2 consumption
power pin 24.39.41
(BOM remove C589
)
WWAN(W/SIM) GND pin 37,43
need to be careful power
3VWWAN +1.5V

3VWWAN rail +3V

1
R668 0/12
+ C589 C831 C828 C824
C827 C835 .01U/16V/04 .1U/10V/04 10U/6.3V/08
B
MINIEC_5V +1.5V reserve *470U/4V .1U/10V/04 10U/6.3V/08
B

FOR KBC DEBUG

2
CN36
R714 *0/06 51 52
+5V Reserved +3.3V
49 Reserved GND 50
36,37,48 PWR_LED# 47 Reserved +1.5V 48
36,37,48 MBATLED0# 45 Reserved LED_WPAN# 46
43 44 3VWWAN
Reserved LED_WLAN#
41 Reserved LED_WWAN# 42 WWAN# 36 U44
39 Reserved GND 40
SI-2 Add 37 38 SHR_USB6+ R683 *0/04 1 4
Reserved USB_D+ SHR_USB6- USBP6+ 22 CH1 CH3 D43
35 36 R684 *0/04
GND USB_D- USBP6- 22
PCIE_TXP5 33 34 2 5
22 PCIE_TXP5 PETp0 GND GDAT_SMB VN VP 1
PCIE_TXN5 31 32 R685 0/04 CGDAT_SMB 2,13,14
22 PCIE_TXN5 PETn0 SMB_DATA GCLK_SMB
29 30 R686 0/04 CGCLK_SMB 2,13,14 3 6
GND SMB_CLK CH2 CH4 3
27 GND +1.5V 28
PCIE_RXP5 25 26 R694 0/06 +3V
22 PCIE_RXP5 PERp0 GND *CM1213_04ST 2
PCIE_RXN5 23 24 R695 *0/06 3VSUS
22 PCIE_RXN5 PERn0 +3.3Vaux
21 22 PLTRST#
GND PERST# WAN_OFF# PLTRST# 22,23,32,33,35,37 *BAV99W
19 Reserved W_DISABLE# 20 WAN_OFF# 23
17 18 CN34
Reserved GND UIM_PWR
15 16 UIM_VPP reserve C5 GND VCC C1
CLK_PCIE_MINI_C GND Reserved UIM_RST UIM_RST
2 CLK_PCIE_MINI_C 13 REFCLK+ Reserved 14 C6 VPP RST C2
CLK_PCIE_MINI_C# 11 12 UIM_CLK 3VWWAN
2 CLK_PCIE_MINI_C# REFCLK- Reserved UIM_CLK
9 10 UIM_DATA C7 C3
GND Reserved UIM_PWR I_O CLK
7 CLKREQ# Reserved 8
5 6 SW2 SW1 R741 *10K/04
BT_CHCLK +1.5V Detect2 Detect1
1

3 BT_DATA GND 4

1
A T153 1 2 C830 C832 R674 A
WAKE# +3.3V
1

*.1U/10V/04 *4.7U/10V/06 *15K/04 *CFS064-A0G16 R440


SIM_DETECT 37,48
1827680-1 *51/04
reserve 67910-0002 R664
*15K/04
2

2
PROJECT : AT3
2

3VWWAN C603
3VWWAN
*47P/50V/04
Quanta Computer Inc.
Size Document Number Rev
Custom MINI CARD X2 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 39 of 48
A B C D E
5 4 3 2 1

MINI PCI TYPE III SLOT 40


INTC#, INTD#
REQ1#/GNT1#
D_ID : AD22
D D

CN31

+3V 1 2
TIP RING +3V
3 LAN1 LAN2 4
5 LAN3 LAN4 6
7 LAN5 LAN6 8
9 LAN7 LAN8 10
11 LED_GP LED_YP 12
13 LED_GN LED_YN 14
15 NC1 NC2 16
22 INTD# 17 -INTB +5V 18 +5V
19 +3V -INTA 20 INTC# 22
21 R(IRQ3) R(IRQ4) 22
23 GND +3VAUX 24 3V_S5
2 PCLK_MINI 25 PCICLK -RST 26 PCIRST# 22,28
27 GND +3V 28
22 REQ1# 29 -REQ -GNT 30 GNT1# 22
31 +3V GND 32
22,28 AD31 33 AD31 -PME 34 PCI_PME# 22,28
22,28 AD29 35 AD29 (V) 36
37 GND AD30 38 AD30 22,28
22,28 AD27 39 AD27 +3V 40
22,28 AD25 41 AD25 AD28 42 AD28 22,28
43 (V) AD26 44 AD26 22,28
22,28 C/BE3# 45 -CBE3 AD24 46 AD24 22,28
47 48 AD22
22,28 AD23 AD23 IDSEL
49 50 R363 *100/06
GND GND AD22
C
22,28 AD21 51 AD21 AD22 52 AD22 22,28
C

22,28 AD19 53 AD19 AD20 54 AD20 22,28


55 GND PAR 56 PAR 22,28
22,28 AD17 57 AD17 AD18 58 AD18 22,28
22,28 C/BE2# 59 -CBE2 AD16 60 AD16 22,28
22,28 IRDY# 61 -IRDY GND 62
63 +3V -FRAME 64 FRAME# 22,28
65 -CLKRUN -TRDY 66 TRDY# 22,28
22,28,37 SERR# 67 -SERR -STOP 68 STOP# 22,28
69 GND +3V 70
22,28 PERR# 71 -PERR -DEVSEL 72 DEVSEL# 22,28
22,28 C/BE1# 73 -CBE1 GND 74
22,28 AD14 75 AD14 AD15 76 AD15 22,28
77 GND AD13 78 AD13 22,28
22,28 AD12 79 AD12 AD11 80 AD11 22,28
22,28 AD10 81 AD10 GND 82
83 GND AD9 84 AD9 22,28
22,28 AD8 85 AD8 -CBE0 86 C/BE0# 22,28
22,28 AD7 87 AD7 +3V 88
89 +3V AD6 90 AD6 22,28
22,28 AD5 91 AD5 AD4 92 AD4 22,28
93 (V) AD2 94 AD2 22,28
22,28 AD3 95 AD3 AD0 96 AD0 22,28
+5V 97 +5V (V) 98
22,28 AD1 99 AD1 SERIRQ 100 SERIRQ 23,28,37,48
101 GND GND 102
103 SYNC M66EN 104
105 SDIN0 SDOUT 106
107 BITCLK SDIN1 108
B
109 -AC_PRIMARY -RESET 110 B
111 BEEP -MPCICACK 112
113 AGND AGND 114
115 +MIC +SPK 116
117 -MIC -SPK 118
119 AGND AGND 120
121 122 R382 2 1 *10K/06
-RI NC4
+5V 123 +5VA +3VAUX 124 3V_S5

125 GND

126 GND
*MINIPCI_TYPE_III

rev.d

A A

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom MINI PCI TYPE III SLOT 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 40 of 48
5 4 3 2 1
1 2 3 4 5

PC35 0.1U/50V/06 PD3


PDS1040 VAD

41
PC30
2
TOP DC_JACK
38 DOCK_VA
3 PRWSRC C30: Add PD22 for 12cell battery issue
PL8 VA 1
65W/90W *0/12 0.1U/50V/06
PD1
CN17 PDS1040
J1-1 PL4 2 PQ61 AO4430 PR104
1 RL3720WT-R010
2 3
0/12 1 8 1 1 2
7 2
PC146 PC3 6 3

1P

2P
SI-1-2 3 0.1U/50V/06 SI-2 modify PC17
4 0.1U/50V/06 5
1U/25V/X6S/08
Add CW3064-AAG1Z PC202 8724_3D3_LDO
ACOK_IN BATDIS_G SI-1-2 1U/25V/X5R/08

4
PR182 100/04 8724_3D3_LDO
VAD-1
Add
VH28
VH28 PR183 47K/F_4
PD23 PR197 8724ACIN ACOK#
1 2 PR8

2
PR198 PQ64 2N7002EPT 100K/04 PR7

3
UDZS5.6BTE-17 200K/06 PQ67 PR193 100/04 100K/04
1

A VAD-1 200K/06 3 1 CELL_SLT = 1 -- 3 S A


PR196 2SB1197K
PQ65 SI-2 ADD CELL_SLT = 0 -- 4 S
2 2

8724CSSN
8724CSSP

3
VAD
3

0R/04 2N7002E PR114 PR113


PR200 VAD-1

1
PQ40 BATDIS_G

8724CELLS
3

2 CELL_SLT 37,48
200K/06 IMD2 PC145 825/F/06 1.33K/F/06

8724LDO
1

2
1U/25V/08 PQ39 Battery
PR199 PD17 2N7002EPT
SI power PQ66 PR115
6/8/12cell

4
3
2
1
200K/06 2N7002E

1
SW1010C
1

27
26
33/06

2
PU1 PC143 PL1 VIN CN15 VAD-1

1
PC27 1U/10V/06 HI0805R800R_5A/08 PQ3 PD18 *CONN_BATT VAD-1

CSSP
CSSN
PR12 29,37,42,43,45,46,47,48 MAINON 8724DCIN 1 17 1U/10V/06 AO4407 SSM34PT L-F BATT+ 6 6
75K/F/04 DCIN CELLS
17' use
VAD-1 8724ACIN

2
10 ACIN LDO 2 5 5
PD14 PC8 PC7

1
Setting the 8724DLOV SW1010C 0.1U/50V/06 10U/25V/X6S/12 PR180

5
6
7
8
37,48 CC-SET 13 ICTL DLOV 22 4 4 8 8
Vin min to PR11 10K/06
25.5K/F/04 PR9 8724BST PR111
8V BST 24 3 3 7 7
PC23 PC21 ACOK# 11 PC195 1
ACOK 0/F/06
1000P/04 8724LDO 1000P/04 25 8724DHI 2 1
1M/04 DHI PL3 2 1 PD20
3
8724VCTL 15 PC144 AO4912 HI0805R800R_5A/08
VA PD16 8724_3D3_LDO VCTL 0.1U/50V/06 G1 8 PQ1 .01U_0603_X7R
1 D1 2

4
CH501H
2 1 VAD-1 PC20 8724_3D3_LDO 12 23 8724LX 2 D1 S1/D2 7 PR6 PC9 BATCHG PL2 CN16 BAT54S
1000P/04 REFIN LX PL7 RL3720WT-R020 10U/25V/12 HI0805R800R_5A/08 CONN_BATT VH28
1

DLO 21 8724DLO 3 G2 6 8724LXR 1 2 6 6 PQ62


DOCK_VA PR15 PC22 9 IMZ2
ICHG
100K/F/04 .1U/10V/04 37,48 SYS_I PR13 28 20 4 S2 5 8.2UH-SIL104R_4.4A SMD 5

1P

2P
IINP PGND PC121 5
2 1

1
PR112 1 PR90 SMC

3
2 4 4 8 8
PD15 75K/F/04 8724SHDN *2.2/08 PR192
2

8 SHDN
CH501H 12.4K/F/06 19 8724CSIP *1500P/04 PR4 3 7 PR184 PC197
8724CCV CSIP 8724CSIN PC11 PC10 100K/F/04 3 7 100K/F/04 0.1U/50V/0805/X7R
7 CCV CSIN 18
PR16 Iinput=Vcls/Vref * 0.075/RS1 0.1U/50V/06 10U/25V/12

2
2 2 1 1
20K/F/04 8724CCI BATT+ PR185 47K_4

1
37,48 AD_AIR 6 CCI BATT 16 BATT+ Vref=4.096V,RS1=10m-ohm
PR18 47K_4 SI-2 Add
1K/04 8724CCS 5 37,48 MBATV
PC147 CCS 8724REF 3VPCU
REF 4 ADP TYPE VALUE P/N 15' use
.1U/10V/04 PR117
PR110 3 8724CLS PC81
GND

GND

12.4K/F/04 CLS 65W 39.2K/F CS33922FB15 .01U/25V/04 PR2


PC28 PC26 39.2K/F/04 14K/F/04
.1U/10V/04 .01U/16V/04 MAX8724 PR116 PC148 90W 20K/F CS32002FB29 VIN VAD-1
29

14

PC25 30K/04 1U/10V/06 PR1


.01U/16V/04 10K/F/04
B B

2
ACOK_IN TEMP_MBAT 37,48
PD21 PD22
PR3
330/04 PC82
8724_3D3_LDOSI-1-2 DTC144EUA .01U/25V/04 *SW1010C SW1010C
5VPCU

1
MODIFY PQ31 PR108

3
3VPCU VIN 330/04 PC196
5,17,36,37,48 MBDATA
ACOK 3 1 8724LDO
5VPCU 0.1U/50V/06 PU11
2 D/C# 37,48 5,17,36,37,48 MBCLK
1

5
PC114 PR87 TL331

1
PR14 PQ4 PD1112 1000P/04 PU7 22K/04 + 3

5
10K/04 DTA124EU SW1010C PR95 G1331 4
47.5K/F/04 PD1111 PD1110

1
1 + - 1
UDZS5.6BTE-17 UDZS5.6BTE-17
2

4
SI-2 ADD PR181 PR179
2

16,37,48 ACIN 3 -
BL/C# D/C# M/A# Status 22K_4 10K_4

2
SI-2 ADD Battery Low = 8V PR86
PR17 0 0 0 Chareg A batt
2

8724ACIN 15K/04 PR83 PC128 220K/04 0 0 1 Charge M batt


33.2K/F/04 1000P/04 0 1 0 Diccharge A batt
3

0 1 1 Discharge M batt
3

PD2 1 0 0 Free Dicharge PC198


SW1010C PC142 2 220P/50V/X7R_4
ACOK#
BL/C# 37,48 1 0 1 Free Dicharge
2
1

PQ2 PQ32 1 1 0 Free Dicharge


1U/25V/X5R/08 2N7002K 1 1 1 Free Dicharge
2N7002EPT PR10
1

1M_4
1

C C

D D

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
D SYSTEM CHARGER(MAX8724) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 41 of 48
1 2 3 4 5
5 4 3 2 1

DC/DC +3V_ALW/+5V_ALW/+5V_ALW2 /+12V_ALW


PR174
Place these CAPs 390K/04
PR175
close to FETs 150K/04
Place these CAPs
VIN
close to FETs

5V_AL +5V_VCC1
PR73
*47/06
D 2 1 D

2
PC106 PC105 PC87 PC86

1
2

2
0.1U/50V/06

0.1U/50V/06
+ PR75 PR74 PC120 +

10U/25V/X6S/12

10U/25V/X6S/12
PC104 0/08 0/08 1U/10V/06 PC89
1000P/04 1000P/04

2
2
PR177

2
*0/04 3.3 Volt +/- 5%
PC193 Countinue current:5A

2
0.1U/50V/06
PR173

1
5 Volt +/- 5% Peak current:7.5A

1
PC194 *0/04
.1U/10V/04 PC192
Countinue current:8A PC190 1U/10V/06 OCP minimum 10A

5
6
7
8
.1U/10V/04

2
Peak current:11A 3VPCU

1
OCP minimum 13A 2 1 4

8
7
6
5
PR172 +5V_VCC1
5VPCU 0/04 PQ50

8
7
6
5
4
3
2
1
45V_DH PC189 AO4468

1
*.1U/10V/04 PL12

LDO

ONLDO
LDOREFIN

IN
RTC

VCC
TON
REF
PC191 PR186 2.2uH_MPL73-2R2
PQ55 *.1U/10V/04 0/04 3V_LX +3.3V_ALWP

3
2
1
1 2
AO4468 PR170

2
9 32 402K/F/04
PL14 PR167 BYP REFIN2 PR50

2
10 OUT1 ILIM2 31 1 2

5
6
7
8

2
1.5uH_MPL73-1R5 309K/F/04 PU10 PC171
1
2
3
11 FB1 OUT2 30
+5V_ALWP 1 2 5V_LX 1 2 12 29 *2.2/08
ILIM1 SKIP

0.1U/50V/06
PGOOD1 13 ISL6236IRZA-T 28 PGOOD2 PR166
PGOOD1 PGOOD2
2

2
PC100 0/04 PC175

1
14 27 4 +
ON1 ON2
2

8
7
6
5

15 26 3V_DH *1500P/04
PR171 PR160 DH1 DH2 150U/6.3V/ESR18

1
16 LX1 LX2 25
2

C C
PC184 *0/04 *2.2/08 PC119

1
+ 37 PAD

2
150U/6.3V/ESR18 PC187 4 5V_DL 0.1U/50V/06 36 PC186

SECFB
PAD

2
AGND
PGND
0.1U/50V/06 PR168

BST1

BST2
1

VDD
PAD
PAD
PAD

DL1

DL2
0.1U/50V/06

*0/04
1

PC185 PQ48

3
2
1
2

*1500P/04 PQ59 PR164 AO4468

1
35
34
33

17
18
19
20
21
22
23
24
PR169 PR72 1/06

1
0/04 AO4704 1/06 1 2 Rds(on) 15m ohm
3V_DL
1
2
3

1 2
Rds(on) 13m ohm
1

PR161
PC111 5V_AL
1 0.1U/50V/06
*SHORT-1A
PD8 3 2 1

2
PC110
2

0.1U/50V/06
PC116 BAT54S PGOOD2
0.1U/50V/06

2
PC188

1
PD7 4.7U/10V/08 PR176
1

3
0/04
2

BAT54S PGOOD1

1
HWPG 37,43,45,46,48

1
+12V_ALWP 1 2
+12V_ALW
PR165
2

PC117 PR162 39K/F/04


200K/F/04
0.1U/50V/06
3VPCU
1

2
B B
5V_AL PC207 *10P/04
PR178
1 2

5
6
7
8
100K/F/04
PQ63
PC94

6
5
2
1
5,16 SYS_SHDN# AO6402L
4 .1U/10V/04
47 MAIND
3 SUSD 47
PQ49

Max Power Consumption 1.6W


AO4468
5VPCU
+3V 3VSUS

4
2A
PU6 5.92A

3
2
1
1 NC0 NC2 5
3VSUS 22,23,28,31,32,35,36,39,43,47
PR52 *0/F/06 2 6 VTT_SRC +2.5V
29,37,41,43,45,46,47,48 MAINON EN VO

5
6
7
8
PC183
3VPCU 3 8 .1U/10V/04 PC169
VIN GND0 PC170 .1U/10V/04
4 MAIND 4 .1U/10V/04
NC1
ADJ

PC108 PQ56
*.1U/06 5VPCU AO4468 3.8A
*SC4215 PC85 PC93 PC95
PC90 PC96 *10U/10V/08 *10U/10V/08 *0.1U/50V/06 +5V
7

*10U/10V/08 *0.1U/50V/06 SI-1 MODIFY


3
2
1

0.8V R1
5
6
7
8

VTT-ADJ PC172
.1U/10V/04
PR157
*32.4K/F/04 4 PC176 PC174
PR158 47 SUSD .1U/10V/04 .1U/10V/04
*15K/04 R2 3.4A
A A
PQ60
For G73 Only AO4468 5VSUS
3
2
1

PROJECT : AT3
Quanta Computer Inc.
PC182 PC179
.1U/10V/04 .1U/10V/04

Size Document Number Rev


Custom 3v/5v 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 42 of 48
5 4 3 2 1
5 4 3 2 1

42
D D

8717BST2
PC131

1
VIN 1U/10V/06
VIN
+1.5 Volt +/- 5%
+1.05 Volt +/- 5%
Countinue current:6.5A PD11
PC14 DAP202U Countinue current:13A
Peak current:8.5A

8717VCC
PC18 PC16

3
Peak current:16A

8
7
6
5
10U/25V/X6S/12 1000P/04

.01U/50V/X7R/06
OCP minimum 10A 5VPCU PC19 PC12 PC13
OCP minimum 20A

5
6
7
8
PR85 1000P/04 .01U/50V/X7R/06 10U/25V/X6S/12
4

PC137 PR101 PU8 10/06 PC134 4

1
+1.5V +1.5V_1 PQ36 0.1U/50V/06 1/06 1U/10V/06
AO4468 8717BST21 2 13 17

VCC
BST2 VDD PR94 PC132 PQ37
PL5 PR99 8717DH2 14 23 1 28717BST1 AO4468
1.5UH/10A DH2 BST1 1/06 +1.05V_1 +1.05V

1
2
3
C
5,46 +1.5V *2.2/08 8717LX2 15 22 8717DH1 0.1U/50V/06 PR5 PL6 C
LX2 DH1 1.5UH/20A-MPO104-1R5

3
2
1
1

8
7
6
5
21 8717LX1 *2.2/08
PC4 PR96 PQ35 LX1 +1.05V 2,3,4,6,9,10,21,24

2
AO4468

5
6
7
8

1
PC1 PC5 845/F/06 8717DL2 8717DL1
.1U/10V/04

4 16 DL2 DL1 20
2

+
8717CSH2 12 8717CSH1 PR88 PC122
1

CSH2 CSH1 24
330UF_2.5V_ESR9 PC138 4 1.62K/F/06 .1U/10V/04 PC6 PC2
*330UF_2V_ESR9 8717CSL2 8717CSL1

2
11 CSL2 CSL1 25
PQ38
0.22U/10V/06 10 26 8717FB1 AO4430
FB2 FB1 *220U/2.5V_ESR15
1
2
3

PC140 PC135 PC139 PC123 PC127 330UF_2.5V_ESR9


47P/04 RaPR107 *1500P/04 *100P/04 8717REF 100P/04
51.1K/F/06 PC15

3
2
1
3 *1500P/04 0.22U/10V/06 Rc
8717FB2 8717_ON1 REF PR77
6 ON1
PR106 8717_ON2 7 5.1K/F/06 PC124
ON2 PC133 *100P/04
37,44,48 VRON
8717ILIM2 8 0.22U/10V/06
PC141 *0/04 ILIM2
*100P/04
RbPR109
100K/F/06 PR100
PR103 8717ILIM1
0/04
28 ILIM1 8717PG1
MAINON PGOOD1 27
Vout=[1+(Rc/Rd)]*1 Rd
MAX8717PGOOD2 9 8717PG2 PR78 PC126
1K/04 29,37,41,42,45,46,47,48 MAINON 100K/F/06 *100P/04
8717REF
1 2 PJ1
2 5 8717REF
B SKIP1 FSEL B

2
AGND
AGND

PGND
PD12 PC136 4 *SHORT2 3VSUS 3VSUS
SW1010C 1U/10V/06 SKIP2 PR98
Vout=(1+Ra/Rb)*1
*0/04 FSET= GND=200KHz

1
REF f = 300KHz
29
19

18
PR80 PR82
VCC f = 500KHz 100K/04 *100K/04

1
PR97 8717REF

2
8717PG2
*SHORT-1A

2
PR91 PR102 PR81
150K/F/04 100K/F/04 0/04

8717ILIM1 8717ILIM2 8717PG1

1
HWPG 37,42,45,46,48

1
PR92 PR105
PD13
100K/F/04 100K/F/04
VRON 1 2

2
CH501H

A A

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom +-1.5V &VCCP+1.05V(MAX8743) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 43 of 48
5 4 3 2 1
1 2 3 4 5

5VSUS

PC50
VIN
44

2
10U/10V/08

1
PD5
CH501H
PR123
10/08

1
A VIN A

1
8771BST1 C876 C875 PC44 PC46 PC45

2
SI-2 ADD 8771VCC 220P/25V/04.1U/25V/04 2200P/04 PC47 PC49 PC48
10U/25V/X6S/12 *10U/25V/X6S/12 10U/25V/X6S/12

2
1
PR133
5VSUS PC56 237K/F/06 0.1U/50V/06 0.1U/50V/06

5
2.2U/10V/06
PR25 D

2
2

8771TON
2.2/06 G PQ43
PC157 NTMFS4707NT1G

19

25
4
PR195 S
*10K/04
0.22U/25V/06 ( 44A )
8

VCC

VDD
TON

1
2
3
8771BST1_R PL10 VCC_CORE
1
BST1 30
Do we need pull-high ? 0.45_25A_20%_PCMB104T-R45MN
28 8771LX1 1 2
PR137 LX1 8771DH1
7,23 DELAY_VR_PWRGOOD 2 PWRGD

1
0/F/06 29 3 4
DH1

1
PR128 #CLKEN 1 D PR24
23 VR_PWRGD_CK410# CLKEN
0/F/06 26 8771DL1 G *2.2/08 PC41
DL1 PC34 PC37 PC38 PC205 .01U/25V/04
4
S

2
4 CPU_VID0 31 D0 PGND1 27

2
PQ44

1
4 CPU_VID1 32 D1 PR23 330UF_2.5V_ESR9330UF_2.5V_ESR9330UF_2.5V_ESR9

1
2
3
4 CPU_VID2 33 D2
34 NTMFS4119NT1G PC40 2.1K/F/04 330UF_2.5V_ESR9
4 CPU_VID3 D3
35 PR134 PC161 *1500P/04
4 CPU_VID4 D4
36 1 2 PR22 PR122
4 CPU_VID5 D5 *4700P/04

1
4 CPU_VID6 37 D6

8771FB
*3.48K/F/04 NTC 10K_6-B4.25K/06
4.02K/F/04
B PR138 0/04 PR127 PR136 B
1 2 8771PSI 3 12 PC158
3 PM_PSI# PSI FB TP_VCCSENSE 4
PR125 0.22U/10V/06
#SHDN 38 3.48K/F/04 100/04 8771CSP1
37,43,48 VRON SHDN
PR135 PC159 PR126
0/04 3,7,21 H_DPRSTP# 1 2 DSTP 40 1000P/04 PR141 8771CSN1 VIN
PC59 PR130 0/04 DPRSTP PR142 100/04 SI-2 add in CPU socket
7,23 DPRSLPVR 2 1 DPSLP 39 DPRSLPVR
20K/04 0/04
0/04 PC65
VCC_CORE
*.1U/10V/04 PC64 10 8771CCI 1 2 8771CCI2
CCI
1 2 8771CCV 9 CCV 470P/04 PR31 VIN 10U/25V/X6S/12
470P/04 13 8771GNDS
GNDS TP_VSSSENSE 4

1
reserve for power up PR33 8771TIME 7 TIME 8771CSP1 100/04 C874 C873 PC24 PC29 PC32 PC33 PC149
sequence ---andrew CSP1 17
71.5K/F/04 PC63 16 8771CSN1 220P/25V/04 .1U/25V/04 2200P/04
8771REF CSN1 PR32

2
11 REF

5
15 8771CSN2 PC62 100/04
0.22U/10V/06 CSN2 1000P/04 0.1U/50V/06 10U/25V/X6S/12 *10U/25V/X6S/12
18 GND
D
41 14 8771CSP2 G
EP CSP2
4
PR140 S
8771THRM 6 21 8771DH2 PQ41
8771VCC THRM DH2 NTMFS4707NT1G

1
2
3
10K/F/06 24 8771DL2 PL9 VCC_CORE
5VSUS PR132 DL2 0.45_25A_20%_PCMB104T-R45MN
*NTC 10K_6-B4.25K 22 8771LX2 1 2
LX2
5 VRHOT

1
20 BST2_R 3 4
BST2

1
8771POUT 4 PR19
C PR131 POUT *2.2/08 PC43 C
PGND2 23 D
SI-2 Remove *56/04 G PC39 PC31 PC42 PC206 .01U/25V/04
2

PU3 MAX8770

2
4
S

2
PR139 330UF_2.5V_ESR9
10K/04 PR28 PC51 PC36 PR20 *330UF_2.5V_ESR9 *330UF_2.5V_ESR9

1
2
3
PR124 2.2/06 0.22U/25V/06 *1500P/04 2.1K/F/04
330UF_2.5V_ESR9
POUT1

PQ42 PR21 PR121


8771BST2 NTMFS4119NT1G

1
*SHORT-1A
PC162 4.02K/F/04 NTC 10K_6-B4.25K/06distribute evenly between N side and S
1

.1U/10V/04 side, preferably on secondary side.


PD4 PC160
CH501H Use differential routing away from switch nodes
8771CSP2 0.22U/10V/06
8771LX1 and 8771LX2
Sense lines are 18 mil wide, Z0=27.4 Ohm.
Use differential routing with 7 mil spacing. 8771CSN2 PR129
2

0/04
5VSUS Route external layer with solid GND reference
(no split planes).
Use 25 mil separation from any other signal.

Add layout note on pins 22 and 28 of MAX8771


controller. These nets have large voltage swings.
Need to route them away from the sensitive areas that
D D
are trying to detect small changes in voltage, such as
the voltage sense VccSense VssSense lines.

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom CPU_CORE(MAX8771) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 44 of 48
1 2 3 4 5
5 4 3 2 1

1.1 Volt +/- 5%


Countinue current:11A
VIN

PC70
5VPCU
PR35

*10/06 EC for NVDIA sequence


43

2
PC80 PC84 PC78 PC79 2 1 PC68
Peak current:13.5A *10U/25V/X6S/12 *10U/25V/X6S/12 *0.1U/50V/06 *2200P/04 1992VCC 2 1
E 5VSUS E
*10U/10V/08
OCP minimum 17A PD6

19

22
8
7
6
5
*CH501H PU4 *1U/10V/X5R/06
PR43

VDD

VCC
1992BST 17 BST VIN 1.8V_ON 47
4 24 PR144
*0/06 OVP/UVP *100K/04
to exiternal
1992DH 15 14 PD19
VGA core PQ9 DH V+ *SW1010C

2
power *AO4468 PC76 4 1 2
VGACORE PL11 *0.1U/50V/06 PGOOD HWPG 37,42,43,46,48
( 16.25A ) *1.0UH/25A-MPO104-1R0
1992LX 23 1992SHDN PR148 *0/04

1
2
3

1
20,47 VGACORE 16 LX SHDN MAINON 29,37,41,42,43,46,47,48

8
7
6
5

8
7
6
5
2
+ + PC72 PC69
PC73 PC74 PR42 PR44 *.1U/10V/04
*1.51K/F/06 1992DL
*330U/2V_ESR9

*330U/2V_ESR9
4 4 18 DL
*2.2/08 PR146
*0.1U/50V/06 PQ6 *75K/F/04
PQ8 7 1992REFIN 1992REF

1
*AO4468 *AO4468 REFIN

1
PC83 25
*1500P/04 GND PC71 PR147
D D
*470P/04

1
2
3

1
2
3
20 GND SKIP 13 *75K/F/06

2
OD 8 1992OD
PC75
1992CSP 11 PR38
CSP PR37 *16.9K/F/06
*0.22U/10V/06 1 1992TON
1992CSN TON
12 CSN From NA to Mounted
*0/04

PR40 *0/04 1992OUT 10 6 1992REF


OUT REF

1
9 FB TON=REF, F= 450KHz
PC66 PR34
*1U/10V/X5R/06 *100K/F/04 TON=OPEN, F= 300KHz
V_PWRCNTL NVDIA G3 3 LSAT

2
2 FBLANK
HI 1.0V PR39 *0/04 5 1992ILIM 1.5UH--DCR=4.2mOHM

2
16 V_PWRCNTL 21 GATE ILIM
LO 1.1V Current limit =:17A

1
*MAX1993ETG PC67
PR150 *470P/04 PR36
C *10K/04 PR41 *43K/F/04 C

2
*SHORT-1A

Vcs=I_L(A)*L_DCR(mOHM)=V_ILIM(mV)/10

PQ5

+1.5V
AO6402
Max Current ? A
6
5 4 +1.25V_1 +1.25V
2
1
B B
PC61 PC60
10U/10V/08 PC52
3

.1U/10V/04
PC54 PC58 .1U/10V/04
10U/6.3V/0810U/6.3V/08

PU2
PR30
37,42,43,46,48 HWPG 3 PC57
PGD 9338DRV
DRV 6
9338EN 4
29,37,41,42,43,46,47,48 MAINON EN 0.033U/50V/06
PR27 47/04
PR26
0/04 1 5 9338ADJ
GND

5VSUS VCC ADJ


PC53 150/F/04
*.1U/10V/04 PC55 G938
PR29
2

.1U/10V/04
100/F/04

A A

Vout1=(1+R1/R2)*0.5 PROJECT : AT3


Quanta Computer Inc.
Size Document Number Rev
Custom VGACORE (MAX1993) 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 45 of 48
5 4 3 2 1
A B C D E

VIN 1.8 Volt +/- 5%


1.8VSUS
( VTT/2A ) Countinue current:12A

25
4 SMDDR_VTERM PU5 Peak current:15A 4

1
PC181 PC178 PC177 PC173
1 24 OCP minimum 18A

GND
VTTGND VTT PC91 0.1U/50V/06 10U/25V/12 10U/25V/12 *10U/25V/12
*4.7U/10V/08

2
2 VTTSNS VLDOIN 23

5
1

1
PR152 PC88 D
PC92 PC97 3 22 1116VBST 1 2 G PQ57
10U/10V/08 10U/10V/08 GND VBST NTMFS4707NT1G
4
0/F/06 0.1U/50V/06 S 1.8VSUS
2

2
4 21 1116DRVH
MODE DRVH PL13 1.8VSUS_1

1
2
3
1.5UH/20A-MPO104-1R5
7,14 SMDDR_VREF 5 20 1116LL
VTTREF LL
1

1
( 3mA )

2
PC103 6 19 1116DRVL D +
33N/25V/06 COMP DRVL PR159 PC167 PC168 PC166
G

1
*2.2/08 330UF_2V_ESR9 *220U/2V_ESR15 PR54
2

2
4
S 143K/F/04 PC107

2
7 NC PGND 18
.1U/10V/04 *100P/04
PQ58

1
2
3

2
8 17 NTMFS4119NT1G
PR56 VDDQSNS CS_GND PC180
*0/04 PR48
V5FILT 9 16 1116CS *1500P/04
VDDQSET CS 5VPCU
7.87K/F/04 PC99
10 S3 V5IN 15 1116V5IN 2 1 PR53
3 29,37,41,42,43,45,47,48 MAINON 100K/04 3
PR55
11 S5 V5FILT 14 V5FILT 1U/10V/06
37,47,48 SUSON

1
10/06
12 13 PC102 PR51
NC PGOOD HWPG 37,42,43,45,48
1U/10V/06
TPS51116REGR

2
*SHORT-1A

For Discrete Only

+1.5V 1.8VSUS

2 2

PU9

5
6
7
8
3 5 ( 1.6A ) PC77
PC151 PC153 VIN NC .1U/10V/04
10U/6.3V/08 .1U/10V/04
*G966-25ADJ VGA1.2V 4
47 1.8V_OND
6 PQ7
VO VGA1.2V 15,17,20,47
PR118 AO4430
29,37,41,42,43,45,47,48 MAINON 2 VEN PC152 PC155
( 4.86A )
100K/F/06 5VSUS 4 8 10U/6.3V/08 PC154 .1U/10V/04
VPP GND 10U/6.3V/08 +1.8V

3
2
1
ADJ

PC150 1 9
0.47U/6.3V/04 PC156 POK GND1
+1.8V 15,17,18,19,47
.1U/10V/04
7

for G73&G8X VGA for G73&G8X VGA


PR120 PC164 PC165
1.2VADJ PLL power 10U/6.3V/08 .1U/10V/04 memory bus power
52.3K/F/06
37,42,43,45,48 HWPG R2 R1
PR119
100K/F/06 VO=(0.8(R1+R2)/R2)
R2<120Kohm

1 1

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom DDRII 1.8VSUS/SMDDR_VTERM 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 46 of 48
A B C D E
1 2 3 4 5

VIN VGACORE VGA1.2V +2.5V +5V +3V +1.25V +12V_ALW


45
PR65 PR156 PR155 PR64 PR63 PR154 PR153 PR70
1M/04 *22/08 *22/08 *22/08 22/08 22/08 *22/08 1M/04

A MAIND 42 A

3
PQ53 PQ52 PQ26 PQ25 PQ51 PQ54
*2N7002EPT *2N7002EPT *2N7002EPT 2N7002EPT 2N7002EPT *2N7002EPT

1
2 2 2 2 2 2 2 PC118

3
2200P/04

2
2 PR71 PQ27
29,37,41,42,43,45,46,48 MAINON 1M/04 2N7002EPT

1
PQ22
DTC144EUA
1

MAINON_G

VIN LANVCC_L +12V_ALW 3VPCU

PR47
VIN 3VSUS 5VSUS +12V_ALW PR49 1M/04

1
2
5
6
PR45 22/08 PQ10
1M/04 AO6402L
LAN_ON 3
B B
PR66 PR58 PR59 PR57 0.8A

3
1M/04 22/08 22/08 1M/04 PQ11
2N7002EPT LANVCC_L

4
1
SUSD LAN_POWER_G2 2
SUSD 42
PC98
3

3
PQ17 PQ18 2200P/04
2N7002EPT 2N7002EPT PQ12

2
1
2 2N7002EPT
37,48 LAN_POWER
3

PC109

1
2 2 2
2200P/04 PR46 PC101
PR67 PQ13 1M/04 .1U/10V/04

2
37,46,48 SUSON 2
1M/04 PQ14 DTC144EUA

1
2N7002EPT
PQ21
1

1
DTC144EUA
1

SUSON_G

For Discrete Only


VIN +1.8V +12V_ALW
C 5VPCU C

PR151
22/08

VIN 5V_S5 3V_S5 +12V_ALW 2 PQ15 PR143

3
AO3404L 1M/04
PR149
3VPCU (10mA) 1M/04
5V_S5 2
PR60
1

PR62 PR61 1M/04 PQ46


5V_S5 24 1.8V_OND 46
1
2
5
6

3
22/08 22/08 2N7002EPT
1

1
PR68 PQ19 PR145

3
1M/04 S5_OND AO6402L PC113 1M/04 PC163

1
3 45 1.8V_ON 2
.01U/25V/04 2200P/04
1

2
3

PQ24 PQ20 PC112 3V_S5 PQ45


2N7002EPT 2N7002EPT 2200P/04
0.07A DTC144EUA
2
4

1
2

3V_S5 23,24,35,40
S5_ONG 2 2 2 PQ47
1

2N7002EPT
PQ16 PC115

1
2N7002EPT .01U/25V/04
3

2
1

2 PR69
37,48 S5_ON
1M/04
D D
PQ23
DTC144EUA
1

PROJECT : AT3
Quanta Computer Inc.
Size Document Number Rev
Custom DISCHARGE 1A
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 47 of 48
1 2 3 4 5
5 4 3 2 1

3VPCU
U50
SERIRQ 3 9
23,28,37,40 SERIRQ SERIRQ VCC1
LFRAME# 4 22
21,37,39 LFRAME# LFRAME VCC2
LAD0 10 33
21,37,39 LAD0 LAD0 VCC3
LAD1 8 96
21,37,39 LAD1 LAD1 VCC4
LAD2 7 111
21,37,39 LAD2 LAD2 VCC5
LAD3 5 125
21,37,39 LAD3 PCLK_LPC_KB3920 12 LAD3 VCC6
2,37 PCLK_LPC_KB3920 PCICLK AVCC 67
PLTRST1# 13
D 37 PLTRST1# CLKRUN# PCIRST/GPIO5 D
23,28,37 CLKRUN# 38 CLKRUN
37 SCI1# SCI1# 20
GATEA20 SCI/GPIOE TEMP_MBAT
21,37 GATEA20 1 GA20/GPIO0 AD0/GPI38 63 TEMP_MBAT 37,41
21,37 RCIN# RCIN# 2 64 MBATV
KBRST/GPIO1 AD1/GPI39 MBATV 37,41
37 3920_RST# 3920_RST# 37 65 AD_AIR
ECRST AD2/GPI3A AD_AIR 37,41
66 SYS_I
AD3/GPI3B SYS_I 37,41
MX0 55
36,37 MX0 KSI0/GPIO30
MX1 56 68 CC-SET
36,37 MX1 KSI1/GPIO31 DA0/GPO3C CC-SET 37,41
MX2 57 70 CELL_SLT
36,37 MX2 KSI2/GPIO32 DA1/GPO3D CELL_SLT 37,41
MX3 58 71 DA_VADJ
36,37 MX3 KSI3/GPIO33 DA2/GPO3E DA_VADJ 37
MX4 59 72 D/C#
36,37 MX4 KSI4/GPIO34 DA3/GPO3F D/C# 37,41
MX5 60
36,37 MX5 KSI5/GPIO35
MX6 61 21 PWM_VADJ
36,37 MX6 KSI6/GPIO36 PWM1/GPIOE PWM_VADJ 26,37
MX7 62 23 KEY_BEEP (1KHz)
36,37 MX7 KSI7/GPIO37 PWM2/GPIO10 KEY_BEEP 30,37
MY0 39 26 FAN1ON
36,37 MY0 KSO0/GPIO20 FANPWM1/GPIO12 FAN1ON 37,38
MY1 40 27 FAN2ON
36,37 MY1 KSO1/GPIO21 FANPWM2/GPIO13 FAN2ON 37,38
MY2 41 28 FANSIG
36,37 MY2 KSO2/GPIO22 FANFB1/GPIO14 FAN1SIG 37,38
MY3 42 29 CIR_IN
36,37 MY3 KSO3/GPIO23 FANFB2/GPIO15 CIR_IN 29,37,38
MY4 43
36,37 MY4 KSO4/GPIO24
MY5 44 77 MBCLK
36,37 MY5 KSO5/GPIO25 SCL1/GPIO44 MBCLK 5,17,36,37,41
MY6 45 78 MBDATA
36,37 MY6 KSO6/GPIO26 SDA1/GPIO45 MBDATA 5,17,36,37,41
MY7 46 79 T260
C 36,37 MY7 KSO7/GPIO27 SCL2/GPIO46 C
MY8 47 80 T261
36,37 MY8 KSO8/GPIO28 SDA2/GPIO47
MY9 48
36,37 MY9 KSO9/GPIO29
MY10 49
36,37 MY10 KSO10/GPIO2A
MY11 50
36,37 MY11 KSO11/GPIO2B
MY12 51
36,37 MY12 KSO12/GPIO2C
MY13 52
36,37 MY13 KSO13/GPIO2D
MY14 53 6 SUSB#
36,37 MY14 KSO14/GPIO2E GPIO4 SUSB# 23,37
MY15 54
36,37 MY15 KSO15/GPIO2F
MY16 81 14 HWPG
36,37 MY16 KSO16/GPIO48 GPIO7 HWPG 37,42,43,45,46
MY17 82 15 PM_BATLOW1#
36,37 MY17 KSO17/GPIO49 GPIO8 PM_BATLOW1# 37
MEP_CLK 83 16 SUSC#
36,37 MEP_CLK PSCLK1/GPIO4A GPIOA SUSC# 23,37
MEP_DATA 84 17 LAN_REST_1
36,37 MEP_DATA MEPACK_1 PSDAT1/GPIO4B GPIOB LAN_REST_1 23,33,37
85 18 SWI#1
36,37 MEPACK_1 ACIN_1 PSCLK2/GPIO4C GPIOC SWI#1 37
86 19 NBSWON1#
16,37,41 ACIN_1 PSDAT2/GPIO4D GPIOD NBSWON1# 36,37
TPCLK 87 25 BL/C#
37 TPCLK PSCLK3/GPIO4E GPIO11 BL/C# 37,41
TPDATA 88 30 MBATLED0#
37 TPDATA PSDAT3/GPIO4F GPIO16 MBATLED0# 36,37,39
31 PWR_LED#
GPIO17 PWR_LED# 36,37,39
BIOS_RD# 119 32 KBSMI#1
37 BIOS_RD# RD GPIO18 KBSMI#1 37
BIOS_WR# 120
37 BIOS_WR# WR
BIOS_CS# 128 34 VRON
37 BIOS_CS# SELMEM/SPICS GPIO19 VRON 37,43,44
SERR#_1 89 36 NUMLED#
37 SERR#_1 ECPWROK SELIO/GPIO50 GPIO1A NUMLED# 36,37
7,16,23,37 ECPWROK 76 SELIO2/GPIO43
B VOLME_UP#_1 109 B
37,38 VOLME_UP#_1 VOLME_DN#_1 D0/GPXD0
37,38 VOLME_DN#_1 110 D1/GPXD1
BIOS_D2 112
37 BIOS_D2 D2/GPXD2
BIOS_D3 114 73 SLPBTN#_1
37 BIOS_D3 D3/GPXD3 GPIO40 SLPBTN#_1 37
BIOS_D4 115 74 RPCICGRST#
37 BIOS_D4 D4/GPXD4 GPIO41 RPCICGRST# 28,37
BIOS_D5 116 75 DNBSWON#1
37 BIOS_D5 D5/GPXD5 GPIO42 ALERT DNBSWON#1 37
SI-1 ADD 37,39 SIM_DETECT_1 SIM_DETECT_1 117 90
D6/GPXD6 GPIO52 ALERT 16,37
RF_SW#_1 118 91 CAPSLED#
36,37,39 RF_SW#_1 D7/GPXD7 GPIO53 CAPSLED# 36,37
92 TP_LED1#
BIOS_A0 GPIO54 TP_LED1# 37
10K/04 2 1R808 BIOS_A0 97 93 TP_LED2#
37 BIOS_A0 SUSON_1 A0/GPXA0 GPIO55 TP_LED2# 37
98 95 RSMRST#
37,46,47 SUSON_1 MAINON_1 A1/GPXA1 GPIO56 RSMRST# 23,37
99 121 VOLMUTE#
29,37,41,42,43,45,46,47 MAINON_1 LAN_POWER_1 A2/GPXA2 GPIO57 VOLMUTE# 29,30,37
100 126 SPI_CLK
37,47 LAN_POWER_1 S5_ON_1 A3/GPXA3 GPIO58 SPI_CLK 37
101 127 LID_EC#_1
37,47 S5_ON_1 A4/GPXA4 GPIO59 LID_EC#_1 26,35,36,37
BIOS_A5 102
37 BIOS_A5 A5/GPXA5
BIOS_A6 103
37 BIOS_A6 A6/GPXA6 CRY2
BIOS_A7 104 123
37 BIOS_A7 A7/GPXA7 XCLKO CRY2 37
BIOS_A8 105
37 BIOS_A8 A8/GPXA8
BIOS_A9 106
37 BIOS_A9 A9/GPXA9 CRY1
BIOS_A10 107 122
37 BIOS_A10 A10/GPXA10 XCLKI CRY1 37
BIOS_A11 108
37 BIOS_A11 A11/GPXA11

GND1 11
GND2 24
A 35 A
T259 GND3
124 V18R GND4 94
113
GND5
AGND 69 PROJECT : AT3
Quanta Computer Inc.
KB3926
Size Document Number Rev
B 1A
KB3926
NB5/RD1/HW2
Date: Tuesday, January 09, 2007 Sheet 48 of 48
5 4 3 2 1
www.s-manuals.com

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