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PCB STACK UP
OP8 SYSTEM DIAGRAM 01
DDRII-SODIMM1 DDRII 667/800 MHz
LAYER 1 : TOP AMD Lion CPU THERMAL
LAYER 2 : IN1 PAGE 6,7 Sabie SENSOR
A LAYER 3 : IN2 Tigris 14.318MHz A
S1G2 Processor PAGE 5
DDRII-SODIMM2 DDRII 667/800 MHz
LAYER 4 : VCC
638P (uPGA)/35W
LAYER 5 : IN3 PAGE 6,7 PAGE 3,4,5 CPU_CLK
LAYER 6 : BOT NBGFX_CLK CLOCK GEN
NBGPP_CLK ICS9LPRS476AKLFT-->HP
SBLINK_CLK SLG8SP628VTR-->HP
HT3 RTM880N-796 -->HP
PAGE 2
PCI-Express 16X
PCI-E HDMI
PAGE 25 ATI M92-S
X1 X1 NORTH BRIDGE for
Discrete
Mini PCI-E
CRT
LAN RS880 PAGE 24 only
Realtek Card
64 Bit,DDR2*4
PCIE-LAN
RTL8103E
A12
(Wireless LAN) LVDS
B
(10/100)
21mm X 21mm, 528pin BGA M92-S2 B
PAGE 23
Side port
PAGE 30 PAGE 33 PAGE 17,18,19
PAGE 8,9,10,11 20,21,22
10 PCI-E WLAN Card x1
256mb RAM
PAGE 33
for UMA only
RJ45 PAGE 8
ALINK X4 SBSRC_CLK
PAGE 30
SYSTEM CHARGER(ISL6251) USB2.0
PAGE 40 1,8,9 5 2 3
SATA - HDD
SATA0 150MB
SOUTH BRIDGE USB2.0 Ports Blueflame Webcam Flash Media
PAGE 29 PAGE 29 PAGE 29 RTS5159
SYSTEM POWER ISL6237 X2 X1 PAGE 23
PAGE 34 SB710 A14 PAGE 26
SATA - CD-ROM
SATA4 150MB
21mm X 21mm, 528pin BGA
DDR II SMDDR_VTERM PAGE 29
1.8V/1.8VSUS(RT8207) 4.5W(Ext)
C PAGE 37 SATA1 150MB 4.3W(Int) C
E-SATA Azalia
PAGE 29 PAGE 12,13.14.15.16
VCCP +1.1V AND +1.2V(RT8204)

PAGE 35
IDT
LPC 92HD75B2
VGACORE(1.1V~1.2V)Oz8118 MDC CONN PAGE 27
PAGE 38
PAGE 28
Keyboard PAGE 32 ENE KBC
Touch Pad PAGE 32
CPU CORE ISL6265HRTZ-T KB3926 Dx AUDIO
PAGE 36 Amplifier
TPA6017A2

PAGE 28
SMBUS TABLE PAGE 32
Clock gen/Robson/TV tuner
SB--SCL0/SD0 /DDR2/DDR2 thermal/Accelerometer +3V
D D
Ang MIC AUDIO CONN Audio
epress card (Phone/ MIC) Conn
Wlan Card +3VS5 PAGE 28 PAGE 28 PAGE 27
FAN SPI PROJECT : OP8
EC --SCL/SD Battery charge/discharge +3VPCU Quanta Computer Inc.
VGA thermal/system thermal +3V
PAGE 28 PAGE 35 Size Document Number Rev
EC--SCL2/SD2 Custom
Block Diagram 1A
NB5/RD2
Date: Friday, March 20, 2009 Sheet 1 of 42
1 2 3 4 5 6 7 8
5 4 3 2 1

+1.2V L45
600 ohm, 0.5A

BLM18PG181SN1D(180,1.5A)_6

C492
22U/6.3V_8
C489
0.1U/10V_4
C468
0.1U/10V_4
C494
0.1U/10V_4
+1.2V_CLKVDDIO

C490
0.1U/10V_4
C428
0.1U/10V_4
C485
0.1U/10V_4
CLOCKS name

NBGFX_CLKP
NBGFX_CLKN
RX780

RP48 STUFF
RS780

RP48 STUFF
Clock pin function

to NB for VGA reference clock 02


EXT_GFX_CLKP RP47 STUFF RP47 NC to M92-S external reference clock -RX780 only
EXT_GFX_CLKN

D
SBLINK_CLKP to NB for AC-LINK reference clock D
600 ohm, 0.5A +3V_CLKVDD SBLINK_CLKN RP43 STUFF RP43 STUFF

+3V L46 +3V_CLKVDD


BLM18PG181SN1D(180,1.5A)_6
C430 CLK_VGA_27M_SS R213,R215 R213,R215
C511 C434 C481 C491 C479 C446 C423 C412 C424 CLK_VGA_27M_NSS STUFF NC To M92-S 27Mhz - RX780 only
22U/6.3V_8 2.2U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

Need check the net name for the short pad

Place within 0.5" R178 *261_4


U11
of CLKGEN
+3V_CLKVDD 4 50 CPUCLKP RP42 4 3 *0_4P2R_4 CPUCLKP
VDDDOT CPUK8_0T CPUCLKP 3
16 49 CPUCLKN 2 1 CPUCLKN
VDDSRC CPUK8_0C CPUCLKN 3
26 VDDATIG
Place very 35 VDDSB
40 30 NBGFX_CLKP RP48 4 3 *0_4P2R_4 NBGFX_CLKP to NB for external Graphics
close to 48
VDD_SATA ATIG0T
29 NBGFX_CLKN 2 1 NBGFX_CLKN
NBGFX_CLKP 10
VDDCPU ATIG0C NBGFX_CLKN 10 reference clock
C/G 55 VDDHTT ATIG1T 28 EXT_GFX_CLKP_L RP47 4 3 0_4P2R_4 EXT_GFX_CLKP EXT_GFX_CLKP 17
+3V_CLKVDD EXT_GFX_CLKN_L EXT_GFX_CLKN
56 VDDREF ATIG1C 27 2 1 EXT_GFX_CLKN 17 to M92-S -RX780 only
L35 +3V_CLK_VDDA 63 Clock for Dis only
BLM18PG181SN1D(180,1.5A)_6 VDD48
C411 37 SBLINK_CLKP RP43 4 3 *0_4P2R_4 SBLINK_CLKP
SB_SRC0T SBLINK_CLKP 10
C396 11 36 SBLINK_CLKN 2 1 SBLINK_CLKN to NB for AC-LINK reference clock
VDDSRC_IO SB_SRC0C SBLINK_CLKN 10
C 2.2U/6.3V_6 0.1U/10V_4 17 32 SBSRC_CLKP RP46 4 3 *0_4P2R_4 SBSRC_CLKP C
VDDSRC_IO SB_SRC1T SBSRC_CLKP 12
25 31 SBSRC_CLKN 2 1 SBSRC_CLKN to SB
VDDATIG_IO SB_SRC1C SBSRC_CLKN 12
34 VDDSB_IO
+1.2V_CLKVDDIO 47 VDDCPU_IO PCIE_MINI1_CLKP RP45
SRC0T 22 4 3 *0_4P2R_4 PCIE_MINI1_CLKP PCIE_MINI1_CLKP 33
21 PCIE_MINI1_CLKN 2 1 PCIE_MINI1_CLKN to WLAN
SRC0C PCIE_MINI1_CLKN 33
1 GND48 SRC1T 20
C406 33P/50V_4 CG_XIN 7 19
GNDDOT SRC1C
10 GNDSRC SRC2T 15
2

18 GNDSRC SRC2C 14
Y1 PCIE_LAN_CLKP RP44 3 *0_4P2R_4 PCIE_LAN_CLKP
14.318MHZ
24
33
GNDATIG QFN64 SRC3T 13
12 PCIE_LAN_CLKN
4
2 1 PCIE_LAN_CLKN
PCIE_LAN_CLKP 30
GNDSB SRC3C PCIE_LAN_CLKN 30
43 9
1

C405 33P/50V_4 CG_XOUT GNDSATA SRC4T


46 GNDCPU SRC4C 8
52 6 CLK_VGA_27M_SS R217 33_4 OSC_SPREAD
GNDHTT SRC7T/27M_SS OSC_SPREAD 18
60 5 CLK_VGA_27M_NSS R213 75/F_4
GNDREF SRC7C/27M EVGA-XTALI 18
42 R215 100/F_4
SRC6T/SATAT
SRC6C/SATAC 41 27Mhz for Dis only SSIN - for M82 - 3.3V level input
CG_XIN 61 X_TALIN --for M92 -1.8V level input
CG_XOUT X1
62 X2
54 NBHTREFCLK0P R188 *0_4/S NBHT_REFCLKP
HTT0T/66M NBHT_REFCLKP 10
can remove MOSFET level shift 53 NBHTREFCLK0N R189 *0_4/S NBHT_REFCLKN
HTT0C/66M NBHT_REFCLKN 10
SB/clock gen / DDR2 is 3.3V/S0 PCLK_SMB 2
6,7,13,33 PCLK_SMB SMBCLK
PDAT_SMB 3
power level 6,7,13,33 PDAT_SMB SMBDAT
64 CLK48MUSB R174 22_4 CLK_48M_USB
48MHz_0 CLK_48M_USB 13
R191 22_4 CLK_48M_CR
CLK_48M_CR 26
CLK_PD# 51 Ra
PD# SEL_HT66 R171 158/F_4
REF0/SEL_HTT66 59
58 SEL_SATA R186 33_4
REF1/SEL_SATA EXT_SB_OSC 12
CLKREQ0# 23 57 SEL_27 R169 90.9/F_4
B *CLKREQ0# REF2/SEL_27 T25 EXT_NB_OSC 10 B
CLKREQ4# 38
CLKREQ3# *CLKREQ4#
39 *CLKREQ3# Rb
CLKREQ2# 44
CLKREQ1# *CLKREQ2#
45 *CLKREQ1#
+3V RX880 RS880
TGND

SI change 1.2V to 3.3V from AMD request


1.8V 1.1V
R207 *8.2K_4 CLKREQ1#
RTM880N-796_QFN64
65

R190 8.2K_4 CLK_PD# Ra 82.5R 158R


For EMI
Rb 130R 90.9R
+3V

C399 *10P/50V_4 EXT_NB_OSC R247 *8.2K_4 CLKREQ0# RES CHIP 130 1/16W +-1%(0402)L-F -->CS11302FB15
R212 *8.2K_4 CLKREQ2# +3V_CLKVDD RES CHIP 158 1/16W +-1%(0402) -->CS11582FB00
C404 *10P/50V_4 CLK_48M_USB R222 *8.2K_4 CLKREQ3# RES CHIP 90.9 1/16W +-1%(0402) -->CS09092FB15
R231 *8.2K_4 CLKREQ4# RES CHIP 82.5 1/16W +-1%(0402) -->CS08252FB11

if use clock SLG SLG8SP628VTR--AL8SP628000


C440 *10P/50V_4 EVGA-XTALI request pin , need
to pull Hi for
RTL RTM880N-796-- AL000880001
C456 *10P/50V_4 OSC_SPREAD
default sttting * default R173 R176 Clock chip has internal serial
*8.2K_4 8.2K_4
66 MHz 3.3V single ended HTT clock terminations
1 SEL_27 for differencial pairs, external resistors
SEL_HTT66 SEL_SATA
0* 100 MHz differential HTT clock SEL_HT66
are
A A
reserved for debug purpose.
100 MHz non-spreading differential SRC clock not need to
SEL_SATA 1 R192
8.2K_4 R185 stuff ,
0* 100 MHz spreading differential SRC clock *8.2K_4 R169 have
SEL_27 1* 27MHz non-spreading singled clock
pull LOW PROJECT : OP8
0 100 MHz spreading differential SRC clock
Quanta Computer Inc.
RS780M/RX780M
Size Document Number Rev
Custom 1A
Clock Generator
NB5/RD2
Date: Friday, March 20, 2009 Sheet 2 of 42
5 4 3 2 1
5 4 3 2 1

BLM21PG221SN1D(220,100M,2A)_8 CPU_THERMDC

03
+CPUVDDA
W/S= 15 mil/20mil CPU_THERMDA
H_THRMDC 5
+2.5V H_THRMDA 5
L32 CPU CLK
VLDT use 1.5A Max current CPU_LDT_RST# 300_4 R128
+1.2V +1.2V_VLDT C340 LS0805-100M-N C313 C294 C292 CPUCLKP CPU_PWRGD 300_4 R136
2 CPUCLKP
4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V_4 3300P/50V_4 CPUCLKN CPU_LDT_STOP# 300_4 R132
2 CPUCLKN
R384 *0_6/S CPU_LDT_REQ# 300/F_4 R458 +1.8V
Keep trace from resisor to CPU within 0.6"
R383 *0_6/S +1.2V_VLDT +CPUVDDA 250mA
keep trace from caps to CPU within 1.2" U24D
U24A W/S= 15 mil/20mil
SI Change from AMD request SI Change from AMD request
+CPUVDDA F8 M11
C645 10U/6.3V_8 +1.2V_VLDT +1.2V_VLDT 10U/6.3V_8 C766 CPUCLKIN R125 169/F_4 CPUCLKIN# +CPUVDDA VDDA1 KEY1
D1 VLDT_A0 HT LINK VLDT_B0 AE2 F9 VDDA2 KEY2 W18
C662 10U/6.3V_8 +1.2V_VLDT D2 AE3 +1.2V_VLDT 0.22U/6.3V_4 C745
D C676 0.22U/6.3V_4 +1.2V_VLDT VLDT_A1 VLDT_B1 +1.2V_VLDT 180P/50V_4 C757 CPUCLKP C326 3900P/25V_4 CPUCLKIN CPU_SVC_R D
D3 VLDT_A2 VLDT_B2 AE4 A9 CLKIN_H SVC A6
C671 180P/50V_4 +1.2V_VLDT D4 AE5 +1.2V_VLDT CPUCLKN C327 3900P/25V_4 CPUCLKIN# A8 A4 CPU_SVD_R
VLDT_A3 VLDT_B3 CLKIN_L SVD
HT_NB_CPU_CAD_H0 E3 AD1 HT_CPU_NB_CAD_H0 CPU_LDT_RST# B7
L0_CADIN_H0 L0_CADOUT_H0 10,12 CPU_LDT_RST# RESET_L
HT_NB_CPU_CAD_L0 E2 AC1 HT_CPU_NB_CAD_L0 CPU_PWRGD A7
L0_CADIN_L0 L0_CADOUT_L0 12 CPU_PWRGD PWROK
HT_NB_CPU_CAD_H1 E1 AC2 HT_CPU_NB_CAD_H1 CPU_LDT_STOP# F10 AF6 CPU_THERMTRIP_L#
L0_CADIN_H1 L0_CADOUT_H1 10,12 CPU_LDT_STOP# LDTSTOP_L THERMTRIP_L
HT_NB_CPU_CAD_L1 F1 AC3 HT_CPU_NB_CAD_L1 CPU_LDT_REQ#_CPU C6 AC7 CPU_PROCHOT_L#
HT_NB_CPU_CAD_H2 L0_CADIN_L1 L0_CADOUT_L1 HT_CPU_NB_CAD_H2 LDTREQ_L PROCHOT_L CPU_MEMHOT_L#
G3 AB1 AA8
HT_NB_CPU_CAD_L2 L0_CADIN_H2 L0_CADOUT_H2 HT_CPU_NB_CAD_L2 CPU_SIC MEMHOT_L
G2 L0_CADIN_L2 L0_CADOUT_L2 AA1 5 CPU_SIC AF4 SIC
HT_NB_CPU_CAD_H3 G1 AA2 HT_CPU_NB_CAD_H3 SideBand Temp sense I2C 5 CPU_SID AF5
HT_NB_CPU_CAD_H[15..0] L0_CADIN_H3 L0_CADOUT_H3 CPU_SID SID
HT_NB_CPU_CAD_L3 H1 AA3 HT_CPU_NB_CAD_L3 CPU_ALERT AE6 W7 CPU_THERMDC
8 HT_NB_CPU_CAD_H[15..0] L0_CADIN_L3 L0_CADOUT_L3 5 CPU_ALERT ALERT_L THERMDC
HT_NB_CPU_CAD_H4 J1 W2 HT_CPU_NB_CAD_H4 W8 CPU_THERMDA
HT_NB_CPU_CAD_L[15..0] HT_NB_CPU_CAD_L4 L0_CADIN_H4 L0_CADOUT_H4 HT_CPU_NB_CAD_L4 R74 44.2/F_4 CPU_HTREF0 THERMDA
K1 W3 R6
8 HT_NB_CPU_CAD_L[15..0] HT_NB_CPU_CAD_H5 L0_CADIN_L4 L0_CADOUT_L4 HT_CPU_NB_CAD_H5 R123 44.2/F_4 CPU_HTREF1 HT_REF0
L3 L0_CADIN_H5 L0_CADOUT_H5 V1 +1.2V_VLDT P6 HT_REF1
HT_NB_CPU_CLK_H[1..0] HT_NB_CPU_CAD_L5 L2 U1 HT_CPU_NB_CAD_L5 place them to CPU within 1.5"
8 HT_NB_CPU_CLK_H[1..0] HT_NB_CPU_CAD_H6 L0_CADIN_L5 L0_CADOUT_L5 HT_CPU_NB_CAD_H6 VDDIO_FB_H
L1 U2 36 CPU_VDD0_RUN_FB_H F6 W9 VDDIO_FB_H 37
HT_NB_CPU_CLK_L[1..0] HT_NB_CPU_CAD_L6 L0_CADIN_H6 L0_CADOUT_H6 HT_CPU_NB_CAD_L6 VDD0_FB_H VDDIO_FB_H VDDIO_FB_L
8 HT_NB_CPU_CLK_L[1..0] M1 L0_CADIN_L6 L0_CADOUT_L6 U3 36 CPU_VDD0_RUN_FB_L E6 VDD0_FB_L VDDIO_FB_L Y9 VDDIO_FB_L 37
HT_NB_CPU_CAD_H7 N3 T1 HT_CPU_NB_CAD_H7
HT_NB_CPU_CTL_H[1..0] HT_NB_CPU_CAD_L7 L0_CADIN_H7 L0_CADOUT_H7 HT_CPU_NB_CAD_L7
N2 R1 36 CPU_VDD1_RUN_FB_H Y6 H6 CPU_VDDNB_RUN_FB_H 36
8 HT_NB_CPU_CTL_H[1..0] HT_NB_CPU_CAD_H8 L0_CADIN_L7 L0_CADOUT_L7 HT_CPU_NB_CAD_H8 VDD1_FB_H VDDNB_FB_H
E5 L0_CADIN_H8 L0_CADOUT_H8 AD4 36 CPU_VDD1_RUN_FB_L AB6 VDD1_FB_L VDDNB_FB_L G6 CPU_VDDNB_RUN_FB_L 36
HT_NB_CPU_CTL_L[1..0] HT_NB_CPU_CAD_L8 F5 AD3 HT_CPU_NB_CAD_L8
8 HT_NB_CPU_CTL_L[1..0] HT_NB_CPU_CAD_H9 L0_CADIN_L8 L0_CADOUT_L8 HT_CPU_NB_CAD_H9 CPU_DBRDY
F3 L0_CADIN_H9 L0_CADOUT_H9 AD5 G10 DBRDY
HT_CPU_NB_CAD_H[15..0] HT_NB_CPU_CAD_L9 F4 AC5 HT_CPU_NB_CAD_L9 CPU_TMS AA9 E10 CPU_DBREQ# R143 300/F_4
8 HT_CPU_NB_CAD_H[15..0] HT_NB_CPU_CAD_H10 L0_CADIN_L9 L0_CADOUT_L9 HT_CPU_NB_CAD_H10 CPU_TCK TMS DBREQ_L
G5 AB4 AC9 +1.8V
HT_CPU_NB_CAD_L[15..0] HT_NB_CPU_CAD_L10 L0_CADIN_H10 L0_CADOUT_H10 HT_CPU_NB_CAD_L10 CPU_TRST# TCK CPU_TDO
H5 AB3 AD9 AE9
8 HT_CPU_NB_CAD_L[15..0] HT_NB_CPU_CAD_H11 L0_CADIN_L10 L0_CADOUT_L10 HT_CPU_NB_CAD_H11 CPU_TDI TRST_L TDO
H3 AB5 AF9
HT_CPU_NB_CLK_H[1..0] HT_NB_CPU_CAD_L11 L0_CADIN_H11 L0_CADOUT_H11 HT_CPU_NB_CAD_L11 TDI
H4 AA5
8 HT_CPU_NB_CLK_H[1..0] HT_NB_CPU_CAD_H12 L0_CADIN_L11 L0_CADOUT_L11 HT_CPU_NB_CAD_H12 R36 300/F_4 CPUTEST23 CPUTEST28H
K3 Y5 AD7 J7 T13
HT_CPU_NB_CLK_L[1..0] HT_NB_CPU_CAD_L12 L0_CADIN_H12 L0_CADOUT_H12 HT_CPU_NB_CAD_L12 TEST23 TEST28_H CPUTEST28L
K4 W5 H8 T14
8 HT_CPU_NB_CLK_L[1..0] HT_NB_CPU_CAD_H13 L0_CADIN_L12 L0_CADOUT_L12 HT_CPU_NB_CAD_H13 CPUTEST18 TEST28_L
L5 V4 T12 H10
C HT_CPU_NB_CTL_H[1..0] HT_NB_CPU_CAD_L13 L0_CADIN_H13 L0_CADOUT_H13 HT_CPU_NB_CAD_L13 CPUTEST19 TEST18 CPUTEST17 C
8 HT_CPU_NB_CTL_H[1..0] M5 L0_CADIN_L13 L0_CADOUT_L13 V3 T17 G9 TEST19 TEST17 D7 T19
HT_NB_CPU_CAD_H14 M3 V5 HT_CPU_NB_CAD_H14 E7 CPUTEST16
HT_CPU_NB_CTL_L[1..0] L0_CADIN_H14 L0_CADOUT_H14 TEST16 T18
HT_NB_CPU_CAD_L14 M4 U5 HT_CPU_NB_CAD_L14 R133 510/F_4CPUTEST25H E9 F7 CPUTEST15
8 HT_CPU_NB_CTL_L[1..0] L0_CADIN_L14 L0_CADOUT_L14 TEST25_H TEST15 T16
HT_NB_CPU_CAD_H15 N5 T4 HT_CPU_NB_CAD_H15 +1.8VSUS R87 510/F_4CPUTEST25L E8 C7 CPUTEST14
L0_CADIN_H15 L0_CADOUT_H15 TEST25_L TEST14 T21
HT_NB_CPU_CAD_L15 P5 T3 HT_CPU_NB_CAD_L15 place them to CPU within 1.5"
L0_CADIN_L15 L0_CADOUT_L15 R73 300/F_4 CPUTEST21 AB8 TEST21 TEST7 C3
HT_NB_CPU_CLK_H0 J3 Y1 HT_CPU_NB_CLK_H0 CPUTEST20 AF7 K8 R525 *300/F_4 +1.2V_VLDT
L0_CLKIN_H0 L0_CLKOUT_H0 T64 TEST20 TEST10
HT_NB_CPU_CLK_L0 J2 W1 HT_CPU_NB_CLK_L0 R376 300/F_4 CPUTEST24 AE7
HT_NB_CPU_CLK_H1 L0_CLKIN_L0 L0_CLKOUT_L0 HT_CPU_NB_CLK_H1 CPUTEST22 TEST24
J5 Y4 AE8 C4
HT_NB_CPU_CLK_L1 L0_CLKIN_H1 L0_CLKOUT_H1 HT_CPU_NB_CLK_L1 +1.8VSUS CPUTEST12 TEST22 TEST8 SI Add from AMD request
K5 Y3 T1 AC8
L0_CLKIN_L1 L0_CLKOUT_L1 R372 *300_4 CPUTEST27 TEST12
AF8
HT_NB_CPU_CTL_H0 HT_CPU_NB_CTL_H0 TEST27 CPUTEST29H
N1 R2 C9 T20
HT_NB_CPU_CTL_L0 L0_CTLIN_H0 L0_CTLOUT_H0 HT_CPU_NB_CTL_L0 R440 *0_4/S TEST29_H CPUTEST29L
P1 R3 C2 C8 T22
HT_NB_CPU_CTL_H1 L0_CTLIN_L0 L0_CTLOUT_L0 HT_CPU_NB_CTL_H1 TEST9 TEST29_L
P3 L0_CTLIN_H1 L0_CTLOUT_H1 T5 AA6 TEST6
HT_NB_CPU_CTL_L1 P4 R5 HT_CPU_NB_CTL_L1
L0_CTLIN_L1 L0_CTLOUT_L1
A3 H18
RSVD1 RSVD10
FOX PZ63826-284R-41F A5
RSVD2 RSVD9
H19
DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2) SOCKET_638_PIN B3 AA7
RSVD3 RSVD8
MLX 47296-4131 B5 D5
RSVD4 RSVD7
C1 RSVD5 RSVD6 C5
DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2)
TYC 4-1903401-2
DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2) SOCKET_638_PIN

CNTR_VREF
CNTR_VREF 5
+3V
Serial VID VFIX MODE VID Override Circuit
C776 0.1U/10V_4 SI Change from AMD request
B R137 *2.2K_4 B
R146 20K/F_4 R152 34.8K/F_4 R456 1K/F_4
SVC SVD Voltage Output
+3V
R457 1K/F_4
+1.8V 0 0 1.4V
CNTR_VREF R144 CPU_SVC_R R444 *0_4/S CPU_SVC
1K/F_4 CPU_SVD_R R443 *0_4/S CPU_SVD
CPU_SVC 36 0 1 1.2V
CPU_SVD 36
CPU_PWRGD R138 *0_4/S CPU_PWRGD_SVID_REG
CPU_PWRGD_SVID_REG 36 1 0 1.0V
2

R129
Q46 *BSS138_NL/SOT23 *0_4/S R453 *220_4
CPU_LDT_REQ#_CPU 1 3 CPU_LDT_RST# 1 3 CPU_LDT_RST_HTPA# R452 *220_4 1 1 0.8V
CPU_LDT_REQ# 10
Q20 R139 *220_4
BSS138_NL/SOT23
1

R463 *0_4/S G1
*SHORT_ PAD1
2

+1.8VSUS R26 10K/F_4


for debug only
2

+1.8VSUS R35 300_4 Q10 CPUTEST20 R28 300/F_4


MMBT3904 CPUTEST22 R30 300/F_4
CPU_MEMHOT_L# 3 1 CPU_MEMHOT# CPUTEST12 R70 *300/F_4
CPU_MEMHOT# 7,13
HDT Connector CPUTEST15
CPUTEST14
CPUTEST19
R86
R116
*300/F_4
*300/F_4
R83 *300/F_4
+1.8VSUS CPUTEST18 R85 *300/F_4
+1.8VSUS R29 10K/F_4
1 2
3 4
A R371 300_4 5 6 A
+1.8VSUS
2

Q9 CPU_DBREQ# 7 8
+1.8VSUS R370 10K/F_4 MMBT3904 CPU_DBRDY 9 10
CPU_THERMTRIP_L# 1 3 CPU_TCK 11 12
5 CPU_THERMTRIP_L# CPU_THERMTRIP# 13
CPU_TMS 13 14
+1.8VSUS R369 300_4 CPU_TDI 15 16
2

Q39 CPU_TRST#
CPU_TDO
17
19
18
20
PROJECT : OP8
CPU_PROCHOT_L# 1 3
MMBT3904
CPU_PROCHOT# 12
C28 *0.1U/10V_4
21
23
22
24 CPU_LDT_RST_HTPA#
Quanta Computer Inc.
KEY 25
Size Document Number Rev
Custom 1A
CN5 *HDT CONN
S1G2 HT,CTL I/F 1/3
NB5/RD2
Date: Friday, March 20, 2009 Sheet 3 of 42
5 4 3 2 1
A B C D E

PLACE THEM CLOSE TO


CPU WITHIN 1"
+0.9VSMVTT

D10
C10
B10
AD10
U24B

VTT1
VTT2
VTT3
MEM:CMD/CTRL/CLK VTT5
VTT6
VTT7
W 10
AC10
AB10
AA10
+0.9VSMVTT

750 mA
+1.8VSUS 6 MEM_MB_DATA[0..63]

+0.9VSMVREF 6,37
Processor Memory Interface
MEM_MB_DATA0 C11
U24C
MEM:DATA
G12 MEM_MA_DATA0
MEM_MA_DATA[0..63]
04
6
VTT4 VTT8 R67 R68 Reserved MEM_MB_DATA1 MB_DATA0 MA_DATA0 MEM_MA_DATA1
VTT9 A10 A11 MB_DATA1 MA_DATA1 F12
R374 39.2/F_4 M_ZP AF10 *0_4 MEM_MB_DATA2 A14 H14 MEM_MA_DATA2
R373 39.2/F_4 M_ZN MEMZP CPU_VTT_SENSE 2K/F_4 MEM_MB_DATA3 MB_DATA2 MA_DATA2 MEM_MA_DATA3
+1.8VSUS AE10 MEMZN VTT_SENSE Y10 CPU_VTT_SENSE 37 B14 MB_DATA3 MA_DATA3 G14
MEM_MB_DATA4 G11 H11 MEM_MA_DATA4
MEM_MA_RESET# H16 MB_DATA4 MA_DATA4
T15 RSVD_M1 MEMVREF W 17 MEMVREF_CPU MEM_MB_DATA5 E11 MB_DATA5 MA_DATA5 H12 MEM_MA_DATA5
MEM_MB_DATA6 D12 C13 MEM_MA_DATA6
4 MB_DATA6 MA_DATA6 4
6,7 MEM_MA0_ODT0 T19 MA0_ODT0 RSVD_M2 B18 MEM_MB_RESET# T23
MEM_MB_DATA7 A13 MB_DATA7 MA_DATA7 E13 MEM_MA_DATA7
V22 MEM_MB_DATA8 A15 H15 MEM_MA_DATA8
6,7 MEM_MA0_ODT1 MA0_ODT1 MB_DATA8 MA_DATA8
U21 W 26 R62 MEM_MB_DATA9 A16 E15 MEM_MA_DATA9
MA1_ODT0 MB0_ODT0 MEM_MB0_ODT0 6,7 MB_DATA9 MA_DATA9
V19 W 23 2K/F_4 C154 C133 MEM_MB_DATA10 A19 E17 MEM_MA_DATA10
MA1_ODT1 MB0_ODT1 MEM_MB0_ODT1 6,7 MB_DATA10 MA_DATA10
Y26 0.1U/10V_4 1000P/50V_4 MEM_MB_DATA11 A20 H17 MEM_MA_DATA11
MB1_ODT0 MEM_MB_DATA12 MB_DATA11 MA_DATA11 MEM_MA_DATA12
6,7 MEM_MA0_CS#0 T20 MA0_CS_L0 C14 MB_DATA12 MA_DATA12 E14
U19 V26 MEM_MB_DATA13 D14 F14 MEM_MA_DATA13
6,7 MEM_MA0_CS#1 MA0_CS_L1 MB0_CS_L0 MEM_MB0_CS#0 6,7 MB_DATA13 MA_DATA13
U20 W 25 MEM_MB_DATA14 C18 C17 MEM_MA_DATA14
MA1_CS_L0 MB0_CS_L1 MEM_MB0_CS#1 6,7 MB_DATA14 MA_DATA14
V20 U22 MEM_MB_DATA15 D18 G17 MEM_MA_DATA15
MA1_CS_L1 MB1_CS_L0 MEM_MB_DATA16 MB_DATA15 MA_DATA15 MEM_MA_DATA16
D20 MB_DATA16 MA_DATA16 G18
J22 J25 MEM_MB_DATA17 A21 C19 MEM_MA_DATA17
6,7 MEM_MA_CKE0 MA_CKE0 MB_CKE0 MEM_MB_CKE0 6,7 MB_DATA17 MA_DATA17
J20 H26 MEM_MB_DATA18 D24 D22 MEM_MA_DATA18
6,7 MEM_MA_CKE1 MA_CKE1 MB_CKE1 MEM_MB_CKE1 6,7 MB_DATA18 MA_DATA18
MEM_MB_DATA19 C25 E20 MEM_MA_DATA19
MEM_MB_DATA20 MB_DATA19 MA_DATA19 MEM_MA_DATA20
N19 MA_CLK_H5 MB_CLK_H5 P22 B20 MB_DATA20 MA_DATA20 E18
N20 R22 MEM_MB_DATA21 C20 F18 MEM_MA_DATA21
MA_CLK_L5 MB_CLK_L5 MEM_MB_DATA22 MB_DATA21 MA_DATA21 MEM_MA_DATA22
6 MEM_MA_CLK1_P E16 MA_CLK_H1 MB_CLK_H1 A17 MEM_MB_CLK1_P 6 B24 MB_DATA22 MA_DATA22 B22
F16 A18 MEM_MB_DATA23 C24 C23 MEM_MA_DATA23
6 MEM_MA_CLK1_N MA_CLK_L1 MB_CLK_L1 MEM_MB_CLK1_N 6 MB_DATA23 MA_DATA23
Y16 AF18 MEM_MB_DATA24 E23 F20 MEM_MA_DATA24
6 MEM_MA_CLK7_P MA_CLK_H7 MB_CLK_H7 MEM_MB_CLK7_P 6 MB_DATA24 MA_DATA24
AA16 AF17 MEM_MB_DATA25 E24 F22 MEM_MA_DATA25
6 MEM_MA_CLK7_N MA_CLK_L7 MB_CLK_L7 MEM_MB_CLK7_N 6 MB_DATA25 MA_DATA25
P19 R26 MEM_MB_DATA26 G25 H24 MEM_MA_DATA26
MA_CLK_H4 MB_CLK_H4 MEM_MB_DATA27 MB_DATA26 MA_DATA26 MEM_MA_DATA27
P20 MA_CLK_L4 MB_CLK_L4 R25 G26 MB_DATA27 MA_DATA27 J19
MEM_MB_DATA28 C26 E21 MEM_MA_DATA28
6,7 MEM_MA_ADD[0..15] MEM_MB_ADD[0..15] 6,7 MB_DATA28 MA_DATA28
MEM_MA_ADD0 N21 P24 MEM_MB_ADD0 MEM_MB_DATA29 D26 E22 MEM_MA_DATA29
MEM_MA_ADD1 MA_ADD0 MB_ADD0 MEM_MB_ADD1 MEM_MB_DATA30 MB_DATA29 MA_DATA29 MEM_MA_DATA30
M20 MA_ADD1 MB_ADD1 N24 G23 MB_DATA30 MA_DATA30 H20
MEM_MA_ADD2 N22 P26 MEM_MB_ADD2 MEM_MB_DATA31 G24 H22 MEM_MA_DATA31
MEM_MA_ADD3 MA_ADD2 MB_ADD2 MEM_MB_ADD3 MEM_MB_DATA32 MB_DATA31 MA_DATA31 MEM_MA_DATA32
M19 MA_ADD3 MB_ADD3 N23 AA24 MB_DATA32 MA_DATA32 Y24
MEM_MA_ADD4 M22 N26 MEM_MB_ADD4 MEM_MB_DATA33 AA23 AB24 MEM_MA_DATA33
MEM_MA_ADD5 MA_ADD4 MB_ADD4 MEM_MB_ADD5 MEM_MB_DATA34 MB_DATA33 MA_DATA33 MEM_MA_DATA34
L20 MA_ADD5 MB_ADD5 L23 AD24 MB_DATA34 MA_DATA34 AB22
MEM_MA_ADD6 M24 N25 MEM_MB_ADD6 MEM_MB_DATA35 AE24 AA21 MEM_MA_DATA35
MEM_MA_ADD7 MA_ADD6 MB_ADD6 MEM_MB_ADD7 MEM_MB_DATA36 MB_DATA35 MA_DATA35 MEM_MA_DATA36
3 L21 MA_ADD7 MB_ADD7 L24 AA26 MB_DATA36 MA_DATA36 W 22 3
MEM_MA_ADD8 L19 M26 MEM_MB_ADD8 MEM_MB_DATA37 AA25 W 21 MEM_MA_DATA37
MEM_MA_ADD9 MA_ADD8 MB_ADD8 MEM_MB_ADD9 MEM_MB_DATA38 MB_DATA37 MA_DATA37 MEM_MA_DATA38
K22 MA_ADD9 MB_ADD9 K26 AD26 MB_DATA38 MA_DATA38 Y22
MEM_MA_ADD10 R21 T26 MEM_MB_ADD10 MEM_MB_DATA39 AE25 AA22 MEM_MA_DATA39
MEM_MA_ADD11 MA_ADD10 MB_ADD10 MEM_MB_ADD11 MEM_MB_DATA40 MB_DATA39 MA_DATA39 MEM_MA_DATA40
L22 MA_ADD11 MB_ADD11 L26 AC22 MB_DATA40 MA_DATA40 Y20
MEM_MA_ADD12 K20 L25 MEM_MB_ADD12 MEM_MB_DATA41 AD22 AA20 MEM_MA_DATA41
MEM_MA_ADD13 MA_ADD12 MB_ADD12 MEM_MB_ADD13 MEM_MB_DATA42 MB_DATA41 MA_DATA41 MEM_MA_DATA42
V24 MA_ADD13 MB_ADD13 W 24 AE20 MB_DATA42 MA_DATA42 AA18
MEM_MA_ADD14 K24 J23 MEM_MB_ADD14 MEM_MB_DATA43 AF20 AB18 MEM_MA_DATA43
MEM_MA_ADD15 MA_ADD14 MB_ADD14 MEM_MB_ADD15 MEM_MB_DATA44 MB_DATA43 MA_DATA43 MEM_MA_DATA44
K19 MA_ADD15 MB_ADD15 J24 AF24 MB_DATA44 MA_DATA44 AB21
MEM_MB_DATA45 AF23 AD21 MEM_MA_DATA45
MEM_MB_DATA46 MB_DATA45 MA_DATA45 MEM_MA_DATA46
6,7 MEM_MA_BANK0 R20 MA_BANK0 MB_BANK0 R24 MEM_MB_BANK0 6,7 AC20 MB_DATA46 MA_DATA46 AD19
R23 U26 MEM_MB_DATA47 AD20 Y18 MEM_MA_DATA47
6,7 MEM_MA_BANK1 MA_BANK1 MB_BANK1 MEM_MB_BANK1 6,7 MB_DATA47 MA_DATA47
J21 J26 MEM_MB_DATA48 AD18 AD17 MEM_MA_DATA48
6,7 MEM_MA_BANK2 MA_BANK2 MB_BANK2 MEM_MB_BANK2 6,7 MB_DATA48 MA_DATA48
MEM_MB_DATA49 AE18 W 16 MEM_MA_DATA49
MEM_MB_DATA50 MB_DATA49 MA_DATA49 MEM_MA_DATA50
6,7 MEM_MA_RAS# R19 MA_RAS_L MB_RAS_L U25 MEM_MB_RAS# 6,7 AC14 MB_DATA50 MA_DATA50 W 14
T22 U24 MEM_MB_DATA51 AD14 Y14 MEM_MA_DATA51
6,7 MEM_MA_CAS# MA_CAS_L MB_CAS_L MEM_MB_CAS# 6,7 MB_DATA51 MA_DATA51
T24 U23 MEM_MB_DATA52 AF19 Y17 MEM_MA_DATA52
6,7 MEM_MA_WE# MA_W E_L MB_W E_L MEM_MB_WE# 6,7 MB_DATA52 MA_DATA52
MEM_MB_DATA53 AC18 AB17 MEM_MA_DATA53
MEM_MB_DATA54 MB_DATA53 MA_DATA53 MEM_MA_DATA54
AF16 MB_DATA54 MA_DATA54 AB15
SOCKET_638_PIN MEM_MB_DATA55 AF15 AD15 MEM_MA_DATA55
MEM_MB_DATA56 MB_DATA55 MA_DATA55 MEM_MA_DATA56
AF13 MB_DATA56 MA_DATA56 AB13
MEM_MB_DATA57 AC12 AD13 MEM_MA_DATA57
MEM_MB_DATA58 MB_DATA57 MA_DATA57 MEM_MA_DATA58
AB11 MB_DATA58 MA_DATA58 Y12
MEM_MB_DATA59 Y11 W 11 MEM_MA_DATA59
MEM_MB_DATA60 MB_DATA59 MA_DATA59 MEM_MA_DATA60
AE14 MB_DATA60 MA_DATA60 AB14
MEM_MB_DATA61 AF14 AA14 MEM_MA_DATA61
MEM_MB_DATA62 MB_DATA61 MA_DATA61 MEM_MA_DATA62
AF11 MB_DATA62 MA_DATA62 AB12
MEM_MB_DATA63 AD11 AA12 MEM_MA_DATA63
MB_DATA63 MA_DATA63
6 MEM_MB_DM[0..7] MEM_MA_DM[0..7] 6
MEM_MB_DM0 A12 E12 MEM_MA_DM0
2 +0.9VSMVTT Place close to socket MEM_MB_DM1 B16
MB_DM0 MA_DM0
C15 MEM_MA_DM1 2
MEM_MB_DM2 MB_DM1 MA_DM1 MEM_MA_DM2
A22 MB_DM2 MA_DM2 E19
MEM_MB_DM3 E25 F24 MEM_MA_DM3
MEM_MB_DM4 MB_DM3 MA_DM3 MEM_MA_DM4
AB26 MB_DM4 MA_DM4 AC24
C23 C198 C22 C119 C167 C201 C115 C136 MEM_MB_DM5 AE22 Y19 MEM_MA_DM5
4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V_4 0.22U/6.3V_4 0.22U/6.3V_4 0.22U/6.3V_4 MEM_MB_DM6 MB_DM5 MA_DM5 MEM_MA_DM6
AC16 MB_DM6 MA_DM6 AB16
MEM_MB_DM7 AD12 Y13 MEM_MA_DM7
MB_DM7 MA_DM7

6 MEM_MB_DQS0_P C12 MB_DQS_H0 MA_DQS_H0 G13 MEM_MA_DQS0_P 6


6 MEM_MB_DQS0_N B12 MB_DQS_L0 MA_DQS_L0 H13 MEM_MA_DQS0_N 6
6 MEM_MB_DQS1_P D16 MB_DQS_H1 MA_DQS_H1 G16 MEM_MA_DQS1_P 6
+0.9VSMVTT C16 G15
6 MEM_MB_DQS1_N MB_DQS_L1 MA_DQS_L1 MEM_MA_DQS1_N 6
6 MEM_MB_DQS2_P A24 MB_DQS_H2 MA_DQS_H2 C22 MEM_MA_DQS2_P 6
6 MEM_MB_DQS2_N A23 MB_DQS_L2 MA_DQS_L2 C21 MEM_MA_DQS2_N 6
6 MEM_MB_DQS3_P F26 MB_DQS_H3 MA_DQS_H3 G22 MEM_MA_DQS3_P 6
C204 C155 C117 C142 C140 C147 C208 C116 E26 G21
6 MEM_MB_DQS3_N MB_DQS_L3 MA_DQS_L3 MEM_MA_DQS3_N 6
1000P/50V_4 1000P/50V_4 1000P/50V_4 1000P/50V_4 180P/50V_4 180P/50V_4 180P/50V_4 180P/50V_4 AC25 AD23
6 MEM_MB_DQS4_P MB_DQS_H4 MA_DQS_H4 MEM_MA_DQS4_P 6
6 MEM_MB_DQS4_N AC26 MB_DQS_L4 MA_DQS_L4 AC23 MEM_MA_DQS4_N 6
6 MEM_MB_DQS5_P AF21 MB_DQS_H5 MA_DQS_H5 AB19 MEM_MA_DQS5_P 6
6 MEM_MB_DQS5_N AF22 MB_DQS_L5 MA_DQS_L5 AB20 MEM_MA_DQS5_N 6
6 MEM_MB_DQS6_P AE16 MB_DQS_H6 MA_DQS_H6 Y15 MEM_MA_DQS6_P 6
6 MEM_MB_DQS6_N AD16 MB_DQS_L6 MA_DQS_L6 W 15 MEM_MA_DQS6_N 6
6 MEM_MB_DQS7_P AF12 MB_DQS_H7 MA_DQS_H7 W 12 MEM_MA_DQS7_P 6
Close to CPU within 1500 mils 6 MEM_MB_DQS7_N AE12 MB_DQS_L7 MA_DQS_L7 W 13 MEM_MA_DQS7_N 6
MEM_MA_CLK7_P
MEM_MB_CLK7_P SOCKET_638_PIN
C636
C640 1.5P/50V_4
1 1.5P/50V_4 1
PLACE CLOSE TO PROCESSOR MEM_MA_CLK7_N
MEM_MB_CLK7_N
WITHIN 1.5 INCH
MEM_MA_CLK1_P
MEM_MB_CLK1_P
C293
C291
1.5P/50V_4
1.5P/50V_4
PROJECT : OP8
MEM_MB_CLK1_N
MEM_MA_CLK1_N Quanta Computer Inc.
Size Document Number Rev
Custom 1A
S1G2 DDRII MEMORY I/F 2/3
NB5/RD2
Date: Friday, March 20, 2009 Sheet 4 of 42
A B C D E
5 4 3 2 1

+VCORE0 U24E +VCORE1


AA4
AA11
AA13
AA15
U24F

VSS1
VSS2
VSS3
VSS66
VSS67
VSS68
J6
J8
J10
J12
+VCORE0
BOTTOM SIDE DECOUPLING
05
VSS4 VSS69
G4 VDD0_1 VDD1_1 P8 AA17 VSS5 VSS70 J14
H2 VDD0_2 VDD1_2 P10 AA19 VSS6 VSS71 J16
J9 VDD0_3 VDD1_3 R4 AB2 VSS7 VSS72 J18
J11 R7 AB7 K2 C244 C262 C261 C260 C241 C242 C255
VDD0_4 VDD1_4 VSS8 VSS73 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 0.22U/6.3V_4 0.01U/16V_4 180P/50V_4
J13 VDD0_5 VDD1_5 R9 AB9 VSS9 VSS74 K7
D
J15 VDD0_6 VDD1_6 R11 AB23 VSS10 VSS75 K9 D
K6 VDD0_7 VDD1_7 T2 AB25 VSS11 VSS76 K11
K10 VDD0_8 VDD1_8 T6 AC11 VSS12 VSS77 K13
K12 VDD0_9 VDD1_9 T8 AC13 VSS13 VSS78 K15
K14 T10 AC15 K17 +VCORE1
VDD0_10 VDD1_10 VSS14 VSS79
L4 VDD0_11 VDD1_11 T12 AC17 VSS15 VSS80 L6
L7 VDD0_12 VDD1_12 T14 AC19 VSS16 VSS81 L8
L9 VDD0_13 VDD1_13 U7 AC21 VSS17 VSS82 L10
L11 VDD0_14 VDD1_14 U9 AD6 VSS18 VSS83 L12
L13 U11 AD8 L14 C181 C220 C221 C218 C620 C180 C619 C185
VDD0_15 VDD1_15 VSS19 VSS84 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 0.22U/6.3V_4 0.01U/16V_4 180P/50V_4 0.01U/16V_4
L15 VDD0_16 VDD1_16 U13 AD25 VSS20 VSS85 L16
M2 VDD0_17 VDD1_17 U15 AE11 VSS21 VSS86 L18
M6 VDD0_18 VDD1_18 V6 AE13 VSS22 VSS87 M7
M8 VDD0_19 VDD1_19 V8 AE15 VSS23 VSS88 M9
M10 VDD0_20 VDD1_20 V10 AE17 VSS24 VSS89 AC6
N7 V12 AE19 M17 +CPUVDDNB +1.8VSUS
+CPUVDDNB VDD0_21 VDD1_21 VSS25 VSS90
N9 VDD0_22 VDD1_22 V14 AE21 VSS26 VSS91 N4
N11 VDD0_23 VDD1_23 W4 AE23 VSS27 VSS92 N8
3A VDD1_24 Y2 B4 VSS28 VSS93 N10
K16 VDDNB_1 VDD1_25 AC4 B6 VSS29 VSS94 N16
M16 AD2 +1.8VSUS B8 N18 C215 C184 C237 C193 C240 C263 C191 C668 C719
VDDNB_2 VDD1_26 VSS30 VSS95 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 0.22U/6.3V_4 0.22U/6.3V_4 180P/50V_4 180P/50V_4
P16 VDDNB_3 B9 VSS31 VSS96 P2
+1.8VSUS T16 Y25 B11 P7
VDDNB_4 VDDIO27 VSS32 VSS97
V16 VDDNB_5 VDDIO26 V25 B13 VSS33 VSS98 P9
2A VDDIO25 V23 B15 VSS34 VSS99 P11
H25 VDDIO1 VDDIO24 V21 B17 VSS35 VSS100 P17
J17 VDDIO2 VDDIO23 V18 B19 VSS36 VSS101 R8
K18 VDDIO3 VDDIO22 U17 B21 VSS37 VSS102 R10
K21 VDDIO4 VDDIO21 T25 B23 VSS38 VSS103 R16
K23 VDDIO5 VDDIO20 T23 B25 VSS39 VSS104 R18
C K25 VDDIO6 VDDIO19 T21 D6 VSS40 VSS105 T7 C
L17 T18 D8 T9
M18
VDDIO7
VDDIO8
VDDIO18
VDDIO17 R17 D9
VSS41
VSS42
VSS106
VSS107 T11 DECOUPLING BETWEEN PROCESSOR AND DIMMs
M21 VDDIO9 VDDIO16 P25 D11 VSS43 VSS108 T13
M23 P23 D13 T15
M25
VDDIO10
VDDIO11
VDDIO15
VDDIO14 P21 D15
VSS44
VSS45
VSS109
VSS110 T17 PLACE CLOSE TO PROCESSOR AS POSSIBLE
N17 VDDIO12 VDDIO13 P18 D17 VSS46 VSS111 U4
D19 VSS47 VSS112 U6
D21 U8 +1.8VSUS
SOCKET_638_PIN VSS48 VSS113
D23 VSS49 VSS114 U10
D25 VSS50 VSS115 U12
+1.8VSUS E4 U14
VSS51 VSS116
F2 VSS52 VSS117 U16
F11 U18 C669 C722 C720 C667 C73 C194
VSS53 VSS118 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V_4 0.22U/6.3V_4
3 CNTR_VREF F13 VSS54 VSS119 V2
F15 VSS55 VSS120 V7
R156 R157 R158 F17 V9
390_4 390_4 1K/F_4 VSS56 VSS121 +1.8VSUS
F19 VSS57 VSS122 V11
F21 VSS58 VSS123 V13
F23 VSS59 VSS124 V15
2

F25 VSS60 VSS125 V17


Q23 H7 W6
MBCLK2 CPU_SIC VSS61 VSS126 C107 C700 C670 C721 C708
18,32 MBCLK2 3 1 CPU_SIC 3 H9 VSS62 VSS127 Y21
H21 Y23 0.22U/6.3V_4 0.22U/6.3V_4 0.01U/16V_4 0.01U/16V_4 180P/50V_4
VSS63 VSS128
2

*BSS138_NL/SOT23 H23 N6
Q24 VSS64 VSS129
J4 VSS65
18,32 MBDATA2 MBDATA2 3 1 CPU_SID
CPU_SID 3
SOCKET_638_PIN
2

*BSS138_NL/SOT23
Q22
B B
SMBALERT# 3 1 CPU_ALERT
CPU_ALERT 3
*BSS138_NL/SOT23
PROCESSOR POWER AND GROUND
+3V +3V
+VCORE0 +VCORE1

+1.8VSUS EC7 0.01U/16V_4 +3VPCU C37 0.01U/16V_4

R162 *0_4 SYS_SHDN# C39 0.01U/16V_4


SYS_SHDN# 34,40
R141 R142 R140 +1.8V EC4 0.01U/16V_4 +3VPCU
reserve for C35 0.01U/16V_4
1

10K/F_4 10K/F_4 10K/F_4 power shutdown D26 EC2 0.01U/16V_4 C31 0.01U/16V_4
+1.8V +3V
C355 ( if can ) *CH500H
0.1U/10V_4
+3VPCU EC10 0.01U/16V_4
+3V
2

U6
+1.8VSUS EC8 0.01U/16V_4 +5V
18,32 MBCLK2 8 1 +5V EC1 *0.01U/16V_4
SCLK VCC H_THRMDA 3 +3V
R161 *0_4/S 3920_RST#
3920_RST# 32,40
18,32 MBDATA2 7 2 C325 Q26 EC14 *0.01U/16V_4 +5V EC5 0.01U/16V_4 +3VPCU
SDA DXP 1000P/50V_4
3

MMBT3904 D25
6 ALERT# DXN 3
2 2 1 ECPWROK +VGA_CORE EC13 *0.01U/16V_4 +1.8V
H_THRMDC 3 ECPWROK 16,32
13 PM_THERM# 4 OVERT# GND 5
EC12 *0.01U/16V_4 For fix HyperTransport nets
1

A MSOP CH501H-40PT A
across plane splits
G786P8 SMBALERT# R165 10K/F_4
+3V
3

R450 *10K/F_4 +3VS5 +3VS5 +3V +1.8V


+1.8VSUS
R459 *10K/F_4
PROJECT : OP8
PQ56 2 TEMP_FAIL 18 Quanta Computer Inc.
2

Q43 EC11 EC9 EC6 EC3


*MMBT3904 *2N7002E-G ADD VGA TEMP_ FAIL function
CPU_THERMTRIP_L# 1 3 SMBALERT# M92 is active Hi Size Document Number Rev
3 CPU_THERMTRIP_L# Custom
S1G2 PWR & GND 3/3 1A
1

*0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 NB5/RD2


Date: Friday, March 20, 2009 Sheet 5 of 42
5 4 3 2 1
5 4 3 2 1

06
+1.8VSUS +1.8VSUS

103
104
111
112
117
118

103
104
111
112
117
118
81
82
87
88
95
96

81
82
87
88
95
96
4,7 MEM_MA_ADD[0..15] MEM_MA_DATA[0..63] 4 4,7 MEM_MB_ADD[0..15] MEM_MB_DATA[0..63] 4
CN17 CN18
MEM_MA_ADD0 102 5 MEM_MA_DATA0 MEM_MB_ADD0 102 5 MEM_MB_DATA4

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
MEM_MA_ADD1 A0 DQ0 MEM_MA_DATA1 MEM_MB_ADD1 A0 DQ0 MEM_MB_DATA5
101 A1 DQ1 7 101 A1 DQ1 7
MEM_MA_ADD2 100 17 MEM_MA_DATA2 MEM_MB_ADD2 100 17 MEM_MB_DATA2
MEM_MA_ADD3 A2 DQ2 MEM_MA_DATA3 MEM_MB_ADD3 A2 DQ2 MEM_MB_DATA3
99 A3 DQ3 19 99 A3 DQ3 19
MEM_MA_ADD4 98 4 MEM_MA_DATA4 MEM_MB_ADD4 98 4 MEM_MB_DATA0
MEM_MA_ADD5 A4 DQ4 MEM_MA_DATA5 MEM_MB_ADD5 A4 DQ4 MEM_MB_DATA1
97 A5 DQ5 6 97 A5 DQ5 6
MEM_MA_ADD6 94 14 MEM_MA_DATA6 MEM_MB_ADD6 94 14 MEM_MB_DATA6
MEM_MA_ADD7 A6 DQ6 MEM_MA_DATA7 MEM_MB_ADD7 A6 DQ6 MEM_MB_DATA7
92 A7 DQ7 16 92 A7 DQ7 16
MEM_MA_ADD8 93 23 MEM_MA_DATA8 MEM_MB_ADD8 93 23 MEM_MB_DATA13
D MEM_MA_ADD9 A8 DQ8 MEM_MA_DATA9 MEM_MB_ADD9 A8 DQ8 MEM_MB_DATA12 D
91 A9 DQ9 25 91 A9 DQ9 25
MEM_MA_ADD10 105 35 MEM_MA_DATA10 MEM_MB_ADD10 105 35 MEM_MB_DATA11
MEM_MA_ADD11 A10 DQ10 MEM_MA_DATA11 MEM_MB_ADD11 A10 DQ10 MEM_MB_DATA10
90 A11 DQ11 37 90 A11 DQ11 37
MEM_MA_ADD12 89 20 MEM_MA_DATA12 MEM_MB_ADD12 89 20 MEM_MB_DATA8
MEM_MA_ADD13 A12 DQ12 MEM_MA_DATA13 MEM_MB_ADD13 A12 DQ12 MEM_MB_DATA9
116 A13 DQ13 22 116 A13 DQ13 22
MEM_MA_ADD14 86 36 MEM_MA_DATA14 MEM_MB_ADD14 86 36 MEM_MB_DATA14
MEM_MA_ADD15 A14 DQ14 MEM_MA_DATA15 MEM_MB_ADD15 A14 DQ14 MEM_MB_DATA15
4,7 MEM_MA_BANK[0..2] 84 A15 DQ15 38 4,7 MEM_MB_BANK[0..2] 84 A15 DQ15 38
43 MEM_MA_DATA16 43 MEM_MB_DATA16
MEM_MA_BANK0 107 DQ16 MEM_MA_DATA17 MEM_MB_BANK0 DQ16 MEM_MB_DATA17
BA0 DQ17 45 107 BA0 DQ17 45
MEM_MA_BANK1 106 55 MEM_MA_DATA18 MEM_MB_BANK1 106 55 MEM_MB_DATA18
MEM_MA_BANK2 85 BA1 DQ18 MEM_MA_DATA19 MEM_MB_BANK2 BA1 DQ18 MEM_MB_DATA19
4 MEM_MA_DM[0..7] BA2 DQ19 57 4 MEM_MB_DM[0..7] 85 BA2 DQ19 57
44 MEM_MA_DATA20 44 MEM_MB_DATA20
MEM_MA_DM0 DQ20 MEM_MA_DATA21 MEM_MB_DM0 DQ20 MEM_MB_DATA21
10 46 10 46
MEM_MA_DM1 DM0 DQ21 MEM_MA_DATA22 MEM_MB_DM1 DM0 DQ21 MEM_MB_DATA22
26 DM1 DQ22 56 26 DM1 DQ22 56
MEM_MA_DM2 52 58 MEM_MA_DATA23 MEM_MB_DM2 52 58 MEM_MB_DATA23
MEM_MA_DM3 DM2 DQ23 MEM_MA_DATA24 MEM_MB_DM3 DM2 DQ23 MEM_MB_DATA24
67 61 67 61
MEM_MA_DM4 DM3 DQ24 MEM_MA_DATA25 MEM_MB_DM4 DM3 DQ24 MEM_MB_DATA25
130 DM4 DQ25 63 130 DM4 DQ25 63
MEM_MA_DM5 147 73 MEM_MA_DATA26 MEM_MB_DM5 147 73 MEM_MB_DATA26
MEM_MA_DM6 DM5 DQ26 MEM_MA_DATA27 MEM_MB_DM6 DM5 DQ26 MEM_MB_DATA27
170 75 170 75
MEM_MA_DM7 DM6 DQ27 MEM_MA_DATA28 MEM_MB_DM7 DM6 DQ27 MEM_MB_DATA28
185 DM7 DQ28 62 185 DM7 DQ28 62
64 MEM_MA_DATA29 64 MEM_MB_DATA29
DQ29 MEM_MA_DATA30 DQ29 MEM_MB_DATA30
4 MEM_MA_DQS0_P 13 DQS0 DQ30 74 4 MEM_MB_DQS0_P 13 DQS0 DQ30 74
31 76 MEM_MA_DATA31 31 76 MEM_MB_DATA31
4 MEM_MA_DQS1_P DQS1 DQ31 4 MEM_MB_DQS1_P DQS1 DQ31
51 123 MEM_MA_DATA36 51 123 MEM_MB_DATA37
4 MEM_MA_DQS2_P DQS2 DQ32 4 MEM_MB_DQS2_P DQS2 DQ32
70 125 MEM_MA_DATA37 70 125 MEM_MB_DATA36
4 MEM_MA_DQS3_P DQS3 DQ33 4 MEM_MB_DQS3_P DQS3 DQ33
131 135 MEM_MA_DATA35 131 135 MEM_MB_DATA34
4 MEM_MA_DQS4_P DQS4 DQ34 4 MEM_MB_DQS4_P DQS4 DQ34
148 137 MEM_MA_DATA39 148 137 MEM_MB_DATA35
4 MEM_MA_DQS5_P DQS5 DQ35 4 MEM_MB_DQS5_P DQS5 DQ35
169 124 MEM_MA_DATA38 169 124 MEM_MB_DATA33
4 MEM_MA_DQS6_P DQS6 DQ36 4 MEM_MB_DQS6_P DQS6 DQ36
188 126 MEM_MA_DATA32 188 126 MEM_MB_DATA32
4 MEM_MA_DQS7_P DQS7 DQ37 4 MEM_MB_DQS7_P DQS7 DQ37
134 MEM_MA_DATA33 134 MEM_MB_DATA38
C DQ38 MEM_MA_DATA34 DQ38 MEM_MB_DATA39 C
4 MEM_MA_DQS0_N 11 DQS0 DQ39 136 4 MEM_MB_DQS0_N 11 DQS0 DQ39 136
29 141 MEM_MA_DATA40 29 141 MEM_MB_DATA40
4 MEM_MA_DQS1_N DQS1 DQ40 4 MEM_MB_DQS1_N DQS1 DQ40
49 143 MEM_MA_DATA41 49 143 MEM_MB_DATA45
4 MEM_MA_DQS2_N DQS2 DQ41 4 MEM_MB_DQS2_N DQS2 DQ41
68 151 MEM_MA_DATA46 68 151 MEM_MB_DATA47
4 MEM_MA_DQS3_N DQS3 DQ42 4 MEM_MB_DQS3_N DQS3 DQ42
129 153 MEM_MA_DATA47 129 153 MEM_MB_DATA46
4 MEM_MA_DQS4_N DQS4 DQ43 4 MEM_MB_DQS4_N DQS4 DQ43
146 140 MEM_MA_DATA44 146 140 MEM_MB_DATA44
4 MEM_MA_DQS5_N DQS5 DQ44 4 MEM_MB_DQS5_N DQS5 DQ44
167 142 MEM_MA_DATA45 167 142 MEM_MB_DATA41
4 MEM_MA_DQS6_N DQS6 DQ45 4 MEM_MB_DQS6_N DQS6 DQ45
186 152 MEM_MA_DATA42 186 152 MEM_MB_DATA43
4 MEM_MA_DQS7_N DQS7 DQ46 4 MEM_MB_DQS7_N DQS7 DQ46
154 MEM_MA_DATA43 154 MEM_MB_DATA42
DQ47 MEM_MA_DATA52 DQ47 MEM_MB_DATA52
157 157
DQ48 MEM_MA_DATA49 DQ48 MEM_MB_DATA53
4 MEM_MA_CLK1_P 30 159 4 MEM_MB_CLK1_P 30 159
CK0 DQ49 MEM_MA_DATA54 CK0 DQ49 MEM_MB_DATA50
4 MEM_MA_CLK1_N 32 173 4 MEM_MB_CLK1_N 32 173
CK0 DQ50 MEM_MA_DATA55 CK0 DQ50 MEM_MB_DATA51
4 MEM_MA_CLK7_P 164 175 4 MEM_MB_CLK7_P 164 175
CK1 DQ51 MEM_MA_DATA53 CK1 DQ51 MEM_MB_DATA48
4 MEM_MA_CLK7_N 166 CK1 DQ52 158 4 MEM_MB_CLK7_N 166 CK1 DQ52 158
160 MEM_MA_DATA48 160 MEM_MB_DATA49
DQ53 MEM_MA_DATA51 DQ53 MEM_MB_DATA54
4,7 MEM_MA_CKE0 79 174 4,7 MEM_MB_CKE0 79 174
CKE0 DQ54 MEM_MA_DATA50 CKE0 DQ54 MEM_MB_DATA55
4,7 MEM_MA_CKE1 80 176 4,7 MEM_MB_CKE1 80 176
CKE1 DQ55 MEM_MA_DATA61 CKE1 DQ55 MEM_MB_DATA56
179 179
DQ56 MEM_MA_DATA60 DQ56 MEM_MB_DATA60
4,7 MEM_MA_RAS# 108 181 4,7 MEM_MB_RAS# 108 181
RAS DQ57 MEM_MA_DATA63 RAS DQ57 MEM_MB_DATA58
4,7 MEM_MA_CAS# 113 CAS DQ58 189 4,7 MEM_MB_CAS# 113 CAS DQ58 189
109 191 MEM_MA_DATA62 109 191 MEM_MB_DATA59
4,7 MEM_MA_WE# WE DQ59 4,7 MEM_MB_WE# WE DQ59
MEM_MA_DATA56 MEM_MB_DATA61
SO-DIMM

4,7 MEM_MA0_CS#0 110 180 4,7 MEM_MB0_CS#0 110 180


S0 DQ60 MEM_MA_DATA57 S0 DQ60 MEM_MB_DATA57
4,7 MEM_MA0_CS#1 115 182 4,7 MEM_MB0_CS#1 115 182
S1 DQ61 S1 DQ61
(Normal)

192 MEM_MA_DATA58 192 MEM_MB_DATA62


DQ62 DQ62

(REVERSE)
114 194 MEM_MA_DATA59 114 194 MEM_MB_DATA63
4,7 MEM_MA0_ODT0 ODT0 DQ63 4,7 MEM_MB0_ODT0 ODT0 DQ63
4,7 MEM_MA0_ODT1 119 ODT1 4,7 MEM_MB0_ODT1 119 ODT1
50 MEMHOT_SODIMM#_1 R88 *0_4/S 50 MEMHOT_SODIMM#_2 R82 *0_4/S MEMHOT_SODIMM#
NC1 MEMHOT_SODIMM# 7 NC1

SO-DIMM
DIM1_SA0 198 69 MEM_MA_RESET#1 DIM2_SA0 198 69 MEM_MB_RESET#2
SA0 NC2 T68 SA0 NC2 T69
DIM1_SA1 200 83 DIM2_SA1 200 83
SA1 NC3 SA1 NC3
120 120
B PDAT_SMB NC4 MEM_MA_NC5 PDAT_SMB NC4 MEM_MB_NC5 B
2,7,13,33 PDAT_SMB 195 163 T63 195 163 T62
PCLK_SMB SDA NC/TEST PCLK_SMB SDA NC/TEST
2,7,13,33 PCLK_SMB 197 197
SCL SCL

+3V 199 +3V 199


C622 VDDspd C26 VDDspd

+0.9VSMVREF_DIMM 0.1U/10V_4 1 196 +0.9VSMVREF_DIMM 0.1U/10V_4 1 196


VREF VSS56 VREF VSS56
193 193
VSS55 VSS55
2 VSS0 VSS54 190 2 VSS0 VSS54 190
3 187 C318 o3 187
C324 C323 VSS1 VSS53 C321 1000P/50V_4 VSS1 VSS53
8 184 8 184
0.1U/10V_4 1000P/50V_4 VSS2 VSS52 oVSS2 VSS52
9 183 0.1U/10V_4 9 183
VSS3 VSS51 VSS3 VSS51
12 VSS4 VSS50 178 12 VSS4 VSS50 178
15 VSS5 VSS49 177 15 VSS5 VSS49 177
18 172 18 172
VSS6 VSS48 +1.8VSUS VSS6 VSS48
21 171 21 171
VSS7 VSS47 VSS7 VSS47
24 VSS8 VSS46 168 24 VSS8 VSS46 168
27 165 27 165
VSS9 VSS45 VSS9 VSS45
28 VSS10 VSS44 162 28 VSS10 VSS44 162
33 161 R130 33 161
VSS11 VSS43 VSS11 VSS43
34 156 2K/F_4 34 156
VSS12 VSS42 +0.9VSMVREF_DIMM VSS12 VSS42
39 VSS13 VSS41 155 39 VSS13 VSS41 155
40 VSS14 VSS40 150 40 VSS14 VSS40 150
41 149 41 149
VSS15 VSS39 VSS15 VSS39
42 145 42 145
VSS16 VSS38 VSS16 VSS38
47 144 47 144
VSS17 VSS37 R131 *0_4 +0.9VSMVREF_DIMM VSS17 VSS37
48 139 4,37 +0.9VSMVREF 48 139
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33

VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS18 VSS36 VSS18 VSS36
53 138 53 138
GND
GND

GND
GND
VSS19 VSS35 VSS19 VSS35
54 VSS20 VSS34 133 54 VSS20 VSS34 133

DDR SO-DIMM SOCKET 1.8V


201
202

59
60
65
66
71
72
77
78
121
122
127
128
132

201
202

59
60
65
66
71
72
77
78
121
122
127
128
132
A Only for reserved R119 A
2K/F_4
H=9.2
DDR SO-DIMM SOCKET 1.8V
H=5.2
DIM2_SA0
DIM2_SA1
R19
R21
10K/F_4
10K/F_4
+3V PROJECT : OP8
R22
R20
10K/F_4
10K/F_4
DIM1_SA0
DIM1_SA1
Quanta Computer Inc.
SMbus address A2
SMbus address A0 Size Document Number Rev
Custom 1A
DDR2 SODIMMS: A/B CHANNEL
NB5/RD2
Date: Friday, March 20, 2009 Sheet 6 of 42
5 4 3 2 1
5 4 3 2 1

4,6 MEM_MA_ADD[0..15]

4,6 MEM_MA_BANK[0..2]
MEM_MA_ADD[0..15]

MEM_MA_BANK[0..2]
4,6 MEM_MB_ADD[0..15]

4,6 MEM_MB_BANK[0..2]
MEM_MB_ADD[0..15]

MEM_MB_BANK[0..2]
07
+0.9VSMVTT +0.9VSMVTT

MEM_MA_CKE0 RP36 4 3 47_4P2R_4 MEM_MB_CKE0 RP33 4 3 47_4P2R_4


4,6 MEM_MA_CKE0 4,6 MEM_MB_CKE0
MEM_MA_BANK2 2 1 C132 0.1U/10V_4 +1.8VSUS MEM_MB_BANK2 2 1 C106 0.1U/10V_4 +1.8VSUS
MEM_MA_ADD12 RP32 4 3 47_4P2R_4 MEM_MB_ADD12 RP29 2 1 47_4P2R_4
D D
MEM_MA_ADD9 2 1 C192 0.1U/10V_4 MEM_MB_ADD9 4 3 C197 0.1U/10V_4
MEM_MA_ADD8 RP26 2 1 47_4P2R_4 MEM_MB_ADD8 RP25 4 3 47_4P2R_4
MEM_MA_ADD5 4 3 C178 0.1U/10V_4 +1.8VSUS MEM_MB_ADD5 2 1 C159 0.1U/10V_4 +1.8VSUS
MEM_MA_ADD3 RP24 2 1 47_4P2R_4 MEM_MB_ADD3 RP23 4 3 47_4P2R_4
MEM_MA_ADD1 4 3 C70 0.1U/10V_4 MEM_MB_ADD1 2 1 C67 0.1U/10V_4
MEM_MA_ADD10 RP19 4 3 47_4P2R_4 MEM_MB_ADD10 RP17 4 3 47_4P2R_4
MEM_MA_BANK0 2 1 C169 0.1U/10V_4 +1.8VSUS MEM_MB_BANK0 2 1 C85 0.1U/10V_4 +1.8VSUS
MEM_MA_WE# RP16 4 3 47_4P2R_4 MEM_MB_WE# RP15 4 3 47_4P2R_4
4,6 MEM_MA_WE# 4,6 MEM_MB_WE#
MEM_MA_CAS# 2 1 C66 0.1U/10V_4 MEM_MB_CAS# 2 1 C63 0.1U/10V_4
4,6 MEM_MA_CAS# 4,6 MEM_MB_CAS#
MEM_MA0_ODT1 RP10 4 3 47_4P2R_4 MEM_MB0_ODT1 RP9 4 3 47_4P2R_4
4,6 MEM_MA0_ODT1 4,6 MEM_MB0_ODT1
MEM_MA0_CS#1 2 1 C93 0.1U/10V_4 +1.8VSUS MEM_MB0_CS#1 2 1 C148 0.1U/10V_4 +1.8VSUS
4,6 MEM_MA0_CS#1 4,6 MEM_MB0_CS#1
MEM_MA_ADD15 RP35 4 3 47_4P2R_4 MEM_MB_CKE1 RP34 2 1 47_4P2R_4
4,6 MEM_MB_CKE1
MEM_MA_CKE1 2 1 C213 0.1U/10V_4 MEM_MB_ADD15 4 3 C62 0.1U/10V_4
4,6 MEM_MA_CKE1
MEM_MA_ADD7 RP30 4 3 47_4P2R_4 MEM_MB_ADD7 RP31 4 3 47_4P2R_4 C101 0.1U/10V_4 +1.8VSUS
MEM_MA_ADD14 2 1 C98 0.1U/10V_4 +1.8VSUS MEM_MB_ADD14 2 1
MEM_MA_ADD6 RP27 4 3 47_4P2R_4 C206 0.1U/10V_4
MEM_MA_ADD11 2 1 C68 0.1U/10V_4 MEM_MB_ADD6 RP28 4 3 47_4P2R_4
MEM_MB_ADD11 2 1 C129 0.1U/10V_4 +1.8VSUS
C158 0.1U/10V_4 +1.8VSUS
MEM_MA_ADD2 RP22 4 3 47_4P2R_4 MEM_MB_ADD2 RP21 4 3 47_4P2R_4 C207 0.1U/10V_4
MEM_MA_ADD4 2 1 C69 0.1U/10V_4 MEM_MB_ADD4 2 1
C81 0.1U/10V_4 +1.8VSUS
MEM_MA_BANK1 RP20 2 1 47_4P2R_4 MEM_MB_BANK1 RP18 4 3 47_4P2R_4
MEM_MA_ADD0 4 3 C74 0.1U/10V_4 +1.8VSUS MEM_MB_ADD0 2 1
C205 0.1U/10V_4
4,6 MEM_MA0_CS#0 MEM_MA0_CS#0 RP14 4 3 47_4P2R_4 C212 0.1U/10V_4 4,6 MEM_MB0_CS#0 MEM_MB0_CS#0 RP13 4 3 47_4P2R_4
4,6 MEM_MA_RAS# MEM_MA_RAS# 2 1 4,6 MEM_MB_RAS# MEM_MB_RAS# 2 1 C135 0.1U/10V_4 +1.8VSUS
C87 0.1U/10V_4 +1.8VSUS
C MEM_MA_ADD13 RP12 4 3 47_4P2R_4 MEM_MB0_ODT0 RP11 2 1 47_4P2R_4 C71 0.1U/10V_4 C
4,6 MEM_MB0_ODT0
MEM_MA0_ODT0 2 1 C214 0.1U/10V_4 MEM_MB_ADD13 4 3
4,6 MEM_MA0_ODT0

+1.8VSUS

C79 C177 C150 C714 C137 C75


0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

PLACE CLOSE TO SOCKET( PER EMI/EMC)

B B
+3VS5

+3V R362
*10K/F_4

R363
CPU_MEMHOT# 3,13
*10K/F_4
3

Close DDR2 socket


+3V
U2 R361 *33_4 2
3

7 8 C27 0.1U/10V_4 Q35


A0 +VS *2N7002E-G
+3V 6 A1
5
1

A2 MEMHOT_SODIMM#
O.S 3 2

PDAT_SMB 1 Q36
2,6,13,33 PDAT_SMB SDA
PCLK_SMB 2 4 *2N7002E-G
2,6,13,33 PCLK_SMB SCL GND
1

*DS75U+T&R
Address:92h

A R360 10K/F_4 MEMHOT_SODIMM# A


+3V MEMHOT_SODIMM# 6

PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
DDR2 SODIMMS TERMINATIONS
NB5/RD2
Date: Friday, March 20, 2009 Sheet 7 of 42
5 4 3 2 1
5 4 3 2 1

U25A
HT_CPU_NB_CAD_H0
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
HT_CPU_NB_CAD_H2
HT_CPU_NB_CAD_L2
HT_CPU_NB_CAD_H3
Y25
Y24
V22
V23
V25
V24
U24
HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
PART 1 OF 6
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
D24
D25
E24
E25
F24
F25
F23
HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
HT_NB_CPU_CAD_H2
HT_NB_CPU_CAD_L2
HT_NB_CPU_CAD_H3
HT_CPU_NB_CAD_H[15..0]

HT_CPU_NB_CAD_L[15..0]

HT_CPU_NB_CLK_H[1..0]
HT_CPU_NB_CAD_H[15..0]

HT_CPU_NB_CAD_L[15..0]

HT_CPU_NB_CLK_H[1..0]
3

3
08
HT_CPU_NB_CAD_L3 HT_RXCAD3P HT_TXCAD3P HT_NB_CPU_CAD_L3 HT_CPU_NB_CLK_L[1..0]
U25 HT_RXCAD3N HT_TXCAD3N F22 HT_CPU_NB_CLK_L[1..0] 3
HT_CPU_NB_CAD_H4 T25 H23 HT_NB_CPU_CAD_H4
HT_CPU_NB_CAD_L4 HT_RXCAD4P HT_TXCAD4P HT_NB_CPU_CAD_L4 HT_CPU_NB_CTL_H[1..0]
T24 HT_RXCAD4N HT_TXCAD4N H22 HT_CPU_NB_CTL_H[1..0] 3
HT_CPU_NB_CAD_H5 P22 J25 HT_NB_CPU_CAD_H5

HYPER TRANSPORT CPU I/F


HT_CPU_NB_CAD_L5 HT_RXCAD5P HT_TXCAD5P HT_NB_CPU_CAD_L5 HT_CPU_NB_CTL_L[1..0]
P23 HT_RXCAD5N HT_TXCAD5N J24 HT_CPU_NB_CTL_L[1..0] 3
HT_CPU_NB_CAD_H6 P25 K24 HT_NB_CPU_CAD_H6
D
HT_CPU_NB_CAD_L6 HT_RXCAD6P HT_TXCAD6P HT_NB_CPU_CAD_L6 HT_NB_CPU_CAD_H[15..0] D
P24 HT_RXCAD6N HT_TXCAD6N K25 HT_NB_CPU_CAD_H[15..0] 3
HT_CPU_NB_CAD_H7 N24 K23 HT_NB_CPU_CAD_H7
HT_CPU_NB_CAD_L7 HT_RXCAD7P HT_TXCAD7P HT_NB_CPU_CAD_L7 HT_NB_CPU_CAD_L[15..0]
N25 HT_RXCAD7N HT_TXCAD7N K22 HT_NB_CPU_CAD_L[15..0] 3
HT_CPU_NB_CAD_H8 AC24 F21 HT_NB_CPU_CAD_H8 HT_NB_CPU_CLK_H[1..0]
HT_CPU_NB_CAD_L8 HT_RXCAD8P HT_TXCAD8P HT_NB_CPU_CAD_L8 HT_NB_CPU_CLK_H[1..0] 3
AC25 HT_RXCAD8N HT_TXCAD8N G21
HT_CPU_NB_CAD_H9 AB25 G20 HT_NB_CPU_CAD_H9 HT_NB_CPU_CLK_L[1..0]
HT_CPU_NB_CAD_L9 HT_RXCAD9P HT_TXCAD9P HT_NB_CPU_CAD_L9 HT_NB_CPU_CLK_L[1..0] 3
AB24 HT_RXCAD9N HT_TXCAD9N H21
HT_CPU_NB_CAD_H10 AA24 J20 HT_NB_CPU_CAD_H10 HT_NB_CPU_CTL_H[1..0]
HT_CPU_NB_CAD_L10 HT_RXCAD10P HT_TXCAD10P HT_NB_CPU_CAD_L10 HT_NB_CPU_CTL_H[1..0] 3
AA25 HT_RXCAD10N HT_TXCAD10N J21
HT_CPU_NB_CAD_H11 Y22 J18 HT_NB_CPU_CAD_H11 HT_NB_CPU_CTL_L[1..0]
HT_CPU_NB_CAD_L11 HT_RXCAD11P HT_TXCAD11P HT_NB_CPU_CAD_L11 HT_NB_CPU_CTL_L[1..0] 3
Y23 HT_RXCAD11N HT_TXCAD11N K17
HT_CPU_NB_CAD_H12 W 21 L19 HT_NB_CPU_CAD_H12
HT_CPU_NB_CAD_L12 HT_RXCAD12P HT_TXCAD12P HT_NB_CPU_CAD_L12
W 20 HT_RXCAD12N HT_TXCAD12N J19
HT_CPU_NB_CAD_H13 V21 M19 HT_NB_CPU_CAD_H13
HT_CPU_NB_CAD_L13 HT_RXCAD13P HT_TXCAD13P HT_NB_CPU_CAD_L13
V20 HT_RXCAD13N HT_TXCAD13N L18
HT_CPU_NB_CAD_H14 U20 M21 HT_NB_CPU_CAD_H14 signals RS880 RX880
HT_CPU_NB_CAD_L14 HT_RXCAD14P HT_TXCAD14P HT_NB_CPU_CAD_L14
U21 HT_RXCAD14N HT_TXCAD14N P21
HT_CPU_NB_CAD_H15 U19 P18 HT_NB_CPU_CAD_H15
HT_CPU_NB_CAD_L15 HT_RXCAD15P HT_TXCAD15P HT_NB_CPU_CAD_L15
U18 HT_RXCAD15N HT_TXCAD15N M18 HT_TXCALP RES CHIP 1.21K 1/16W +-1%(0402)
R430 R430 P/N : CS21212FB18
HT_CPU_NB_CLK_H0 T22 H24 HT_NB_CPU_CLK_H0 301 ohm 1% 1.21k ohm 1%
HT_CPU_NB_CLK_L0 HT_RXCLK0P HT_TXCLK0P HT_NB_CPU_CLK_L0
T23 HT_RXCLK0N HT_TXCLK0N H25 HT_TXCALN
HT_CPU_NB_CLK_H1 AB23 L21 HT_NB_CPU_CLK_H1
HT_CPU_NB_CLK_L1 HT_RXCLK1P HT_TXCLK1P HT_NB_CPU_CLK_L1
AA22 HT_RXCLK1N HT_TXCLK1N L20
HT_RXCALP RES CHIP 301 1/16W +-1%(0402)
HT_CPU_NB_CTL_H0 M22 M24 HT_NB_CPU_CTL_H0 R434 R434 P/N : CS13012FB14
HT_CPU_NB_CTL_L0 HT_RXCTL0P HT_TXCTL0P HT_NB_CPU_CTL_L0
M23 HT_RXCTL0N HT_TXCTL0N M25 301 ohm 1% 1.21k ohm 1%
HT_CPU_NB_CTL_H1 R21 P19 HT_NB_CPU_CTL_H1 HT_RXCALN
HT_CPU_NB_CTL_L1 HT_RXCTL1P HT_TXCTL1P HT_NB_CPU_CTL_L1
C R20 HT_RXCTL1N HT_TXCTL1N R18 C

R430 1.21K/F_4 HT_RXCALP C23 B24 HT_TXCALP R434 1.21K/F_4


HT_RXCALN HT_RXCALP HT_TXCALP HT_TXCALN
A24 HT_RXCALN HT_TXCALN B25

RS880

U19

SPM_BA0 L2 BA0 DQ15 B9 SPM_DQ15 This block is for UMA RS880 only , RX880 can
SPM_BA1 L3 B1 SPM_DQ14

SPM_A12
BA1 DQ14
DQ13 D9 SPM_DQ9
SPM_DQ12
remove all component
R2 A12 DQ12 D1
SPM_A11 P7 D3 SPM_DQ8
SPM_A10 A11 DQ11 SPM_DQ10
M2 A10/AP DQ10 D7
SPM_A9 P3 C2 SPM_DQ13 +1.8V
SPM_A8 A9 DQ9 SPM_DQ11
P8 A8 DQ8 C8
SPM_A7 SPM_DQ5 +1.8V_MEM_VDDQ
SPM_A6
P2 A7 DQ7 F9
SPM_DQ3 U25D 40mils wdith or more
N7 A6 DQ6 F1
SPM_A5 N3 H9 SPM_DQ4 PAR 4 OF 6 R385 *0_6
SPM_A4 A5 DQ5 SPM_DQ1 SPM_A0 SPM_DQ0
N8 A4 DQ4 H1 AB12 MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC) AA18
SPM_A3 N2 H3 SPM_DQ0 SPM_A1 AE16 AA20 SPM_DQ1
SPM_A2 A3 DQ3 SPM_DQ7 SPM_A2 MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC) SPM_DQ2 C38 C646 C43
M7 A2 DQ2 H7 V11 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) AA19
SPM_A1 M3 G2 SPM_DQ2 SPM_A3 AE15 Y19 SPM_DQ3 *1U/10V_4 *10U/6.3V_8 *10U/6.3V_8
SPM_A0 A1 DQ1 SPM_DQ6 SPM_A4 MEM_A3(NC) MEM_DQ3/DVO_D0(NC) SPM_DQ4
M8 A0 DQ0 G8 AA12 MEM_A4(NC) MEM_DQ4(NC) V17
SPM_A5 AB16 AA17 SPM_DQ5
SPM_A6 MEM_A5(NC) MEM_DQ5/DVO_D1(NC) SPM_DQ6
AB14 MEM_A6(NC) MEM_DQ6/DVO_D2(NC) AA15
SPM_CLKN K8 A9 +1.8V_MEM_VDDQ SPM_A7 AD14 Y15 SPM_DQ7
R24 *100_4 SPM_CLKP CK VDDQ1 SPM_A8 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) SPM_DQ8
B
J8 CK VDDQ2 C1 AD13 MEM_A8(NC) MEM_DQ8/DVO_D3(NC) AC20 B
C3 SPM_A9 AD15 AD19 SPM_DQ9
VDDQ3 MEM_A9(NC) MEM_DQ9/DVO_D5(NC)

SBD_MEM/DVO_I/F
Within 200mils SPM_CKE K2 C7 SPM_A10 AC16 AE22 SPM_DQ10
CKE VDDQ4 SPM_A11 MEM_A10(NC) MEM_DQ10/DVO_D6(NC) SPM_DQ11 C47 C44 C42
VDDQ5 C9 AE13 MEM_A11(NC) MEM_DQ11/DVO_D7(NC) AC18
E9 SPM_A12 AC14 AB20 SPM_DQ12 *0.1U/10V_4 *0.1U/10V_4 *1U/10V_4
VDDQ6 SPM_A13 MEM_A12(NC) MEM_DQ12(NC) SPM_DQ13
VDDQ7 G1 Y14 MEM_A13(NC) MEM_DQ13/DVO_D9(NC) AD22
SPM_CS# L8 G3 AC22 SPM_DQ14
CS VDDQ8 SPM_BA0 MEM_DQ14/DVO_D10(NC) SPM_DQ15
VDDQ9 G7 AD16 MEM_BA0(NC) MEM_DQ15/DVO_D11(NC) AD21
SPM_WE# K3 G9 SPM_BA1 AE17
WE VDDQ10 SPM_BA2 MEM_BA1(NC) SPM_DQS0P
AD17 MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC) Y17
SPM_RAS# K7 A1 W 18 SPM_DQS0N
RAS VDD1 L61 SPM_RAS# MEM_DQS0N/DVO_IDCKN(NC) SPM_DQS1P
VDD2 E1 W 12 MEM_RASb(NC) MEM_DQS1P(NC) AD20 IOPLLVDD18 - memory PLL
SPM_CAS# L7 J9 SPM_CAS# Y12 AE21 SPM_DQS1N not applicable to RX780
CAS VDD3 SPM_WE# MEM_CASb(NC) MEM_DQS1N(NC)
VDD4 M9 AD18 MEM_W Eb(NC)
SPM_DM0 F3 R1 *BLM18PG181SN1D(180,1.5A)_6 SPM_CS# AB13 W 17 SPM_DM0 SI stage add L71 , L72
SPM_DM1 LDM VDD5 SPM_CKE MEM_CSb(NC) MEM_DM0(NC) SPM_DM1
B3 UDM AB18 MEM_CKE(NC) MEM_DM1/DVO_D8(NC) AE19
J1 MEM_VDDQ_VDDL SPM_ODT V14
VDDL MEM_ODT(NC) *BLM18PG181SN1D(180,1.5A)_6 L71
VSSDL J7 IOPLLVDD18(NC) AE23 +1.8V
SPM_ODT K9 SPM_CLKP V15 AE24 *BLM18PG181SN1D(180,1.5A)_6 L72 +1.1V
ODT SPM_CLKN MEM_CKP(NC) IOPLLVDD(NC)
W 14 MEM_CKN(NC)
+1.8V_MEM_VDDQ C675 AD23 C680 C681
SPM_DQS0P *1U/10V_4 R400 *40.2/F_4 SPM_COMPP IOPLLVSS(NC) *2.2U/6.3V_6
F7 LDQS AE12 MEM_COMPP(NC)
SPM_DQS0N E8 A7 R397 *40.2/F_4 SPM_COMPN
AD12 AE18 SPM_VREF1 *2.2U/6.3V_6 IOPLLVDD- memory PLL
LDQS VSSQ1 MEM_COMPN(NC) MEM_VREF(NC)
VSSQ2 B2 +1.8V_MEM_VDDQ not applicable to RX780
B8 RS880
VSSQ3
VSSQ4 D2
R41 SPM_DQS1P B7 D8 R394 *1K/F_4 R393 *1K/F_4
C65 *1K/F_4 SPM_DQS1N UDQS VSSQ5
A8 UDQS VSSQ6 E7
*0.1U/10V_4 F2
VSSQ7
VSSQ8 F8
A SPM_VREF J2 H2 C695 *0.1U/10V_4 C694 *0.1U/10V_4 +1.8V_MEM_VDDQ A
VREF VSSQ9
VSSQ10 H8
A2 NC#A2
C57 R34 E2 A3
*0.1U/10V_4 *1K/F_4 SPM_BA2 NC#E2 VSS1
L1 NC#L1 VSS2 E3
R3 NC#R3 VSS3 J3

SPM_A13
R7
R8
NC#R7 VSS4 N1
P9
PROJECT : OP8
NC#R8 VSS5
Quanta Computer Inc.
SI add A13 for side port function *HYB18T512161B2F-25 Size Document Number Rev
Custom 1A
RS740/RS780-HT LINK I/F 1/5
NB5/RD2
Date: Friday, March 20, 2009 Sheet 8 of 42
5 4 3 2 1
5 4 3 2 1

PEG_RX15
PEG_RX#15
PEG_RX14
PEG_RX#14
PEG_RX13
PEG_RX#13
D4
C4
A3
B3
C2
C1
U25B
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
PART 2 OF 6
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
A5
B5
A4
B4
C3
B2
C_PEG_TX15
C_PEG_TX#15
C_PEG_TX14
C_PEG_TX#14
C_PEG_TX13
C_PEG_TX#13
C332
C333
C339
C338
C336
C337
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
PEG_TX15
PEG_TX#15
PEG_TX14
PEG_TX#14
PEG_TX13
PEG_TX#13
17 PEG_RX#[15:0]

17 PEG_RX[15:0]
PEG_RX#[15:0]

PEG_RX[15:0]

Close to North Bridge


PEG_TX#[15:0]

PEG_TX[15:0]
PEG_TX#[15:0] 17

PEG_TX[15:0] 17
9
PEG_RX12 GFX_RX2N GFX_TX2N C_PEG_TX12 C335 0.1U/10V_4 PEG_TX12
E5 GFX_RX3P GFX_TX3P D1
PEG_RX#12 F5 D2 C_PEG_TX#12 C334 0.1U/10V_4 PEG_TX#12
PEG_RX11 GFX_RX3N GFX_TX3N C_PEG_TX11 C735 0.1U/10V_4 PEG_TX11
G5 GFX_RX4P GFX_TX4P E2
PEG_RX#11 G6 E1 C_PEG_TX#11 C734 0.1U/10V_4 PEG_TX#11
PEG_RX10 GFX_RX4N GFX_TX4N C_PEG_TX10 C729 0.1U/10V_4 PEG_TX10
H5 GFX_RX5P GFX_TX5P F4
PEG_RX#10 H6 F3 C_PEG_TX#10 C730 0.1U/10V_4 PEG_TX#10
D PEG_RX9 GFX_RX5N GFX_TX5N C_PEG_TX9 C727 0.1U/10V_4 PEG_TX9 C_PEG_TX15 D
J6 GFX_RX6P GFX_TX6P F1 C_PEG_TX15 25
PEG_RX#9 J5 F2 C_PEG_TX#9 C724 0.1U/10V_4 PEG_TX#9 C_PEG_TX#15
GFX_RX6N GFX_TX6N C_PEG_TX#15 25
PEG_RX8 J7 H4 C_PEG_TX8 C726 0.1U/10V_4 PEG_TX8
PEG_RX#8 GFX_RX7P GFX_TX7P C_PEG_TX#8 C725 0.1U/10V_4 PEG_TX#8 C_PEG_TX14
J8 H3

PCIE I/F GFX


GFX_RX7N GFX_TX7N C_PEG_TX14 25
PEG_RX7 L5 H1 C_PEG_TX7 C723 0.1U/10V_4 PEG_TX7 C_PEG_TX#14
GFX_RX8P GFX_TX8P C_PEG_TX#14 25
PEG_RX#7 L6 H2 C_PEG_TX#7 C718 0.1U/10V_4 PEG_TX#7
PEG_RX6 GFX_RX8N GFX_TX8N C_PEG_TX6 C716 0.1U/10V_4 PEG_TX6 C_PEG_TX13
M8 GFX_RX9P GFX_TX9P J2 C_PEG_TX13 25
PEG_RX#6 L8 J1 C_PEG_TX#6 C717 0.1U/10V_4 PEG_TX#6 C_PEG_TX#13
GFX_RX9N GFX_TX9N C_PEG_TX#13 25
PEG_RX5 P7 K4 C_PEG_TX5 C710 0.1U/10V_4 PEG_TX5
PEG_RX#5 GFX_RX10P GFX_TX10P C_PEG_TX#5 C712 0.1U/10V_4 PEG_TX#5 C_PEG_TX12
M7 K3 C_PEG_TX12 25
PEG_RX4 GFX_RX10N GFX_TX10N C_PEG_TX4 C713 0.1U/10V_4 PEG_TX4 C_PEG_TX#12
P5 GFX_RX11P GFX_TX11P K1 C_PEG_TX#12 25
PEG_RX#4 M5 K2 C_PEG_TX#4 C715 0.1U/10V_4 PEG_TX#4
PEG_RX3 GFX_RX11N GFX_TX11N C_PEG_TX3 C707 0.1U/10V_4 PEG_TX3
R8 M4
PEG_RX#3 P8
GFX_RX12P
GFX_RX12N
GFX_TX12P
GFX_TX12N M3 C_PEG_TX#3 C709 0.1U/10V_4 PEG_TX#3 To HDMI CONN
PEG_RX2 R6 M1 C_PEG_TX2 C706 0.1U/10V_4 PEG_TX2
PEG_RX#2 GFX_RX13P GFX_TX13P C_PEG_TX#2 C705 0.1U/10V_4 PEG_TX#2
R5 M2
PEG_RX1 GFX_RX13N GFX_TX13N C_PEG_TX1 C703 0.1U/10V_4 PEG_TX1
P4 GFX_RX14P GFX_TX14P N2
PEG_RX#1 P3 N1 C_PEG_TX#1 C704 0.1U/10V_4 PEG_TX#1
PEG_RX0 GFX_RX14N GFX_TX14N C_PEG_TX0 C699 0.1U/10V_4 PEG_TX0
T4 P1
PEG_RX#0 GFX_RX15P GFX_TX15P C_PEG_TX#0 C701 0.1U/10V_4 PEG_TX#0
T3 GFX_RX15N GFX_TX15N P2

AE3 GPP_RX0P GPP_TX0P AC1


AD4 GPP_RX0N GPP_TX0N AC2
PCIE_RXP1 AE2 AB4 PCIE_TXP1_C C88 0.1U/10V_4
33 PCIE_RXP1 GPP_RX1P GPP_TX1P PCIE_TXP1 33
PCIE_RXN1 AD3 AB3 PCIE_TXN1_C C89 0.1U/10V_4 TO WLAN
33 PCIE_RXN1 GPP_RX1N GPP_TX1N PCIE_TXN1 33
PCIE_RXP2_LAN AD1 AA2 PCIE_TXP2_C C679 0.1U/10V_4
30 PCIE_RXP2_LAN GPP_RX2P GPP_TX2P PCIE_TXP2_LAN 30
PCIE_RXN2_LAN AD2 PCIE I/F GPP AA1 PCIE_TXN2_C C696 0.1U/10V_4 TO PCIE-LAN
30 PCIE_RXN2_LAN GPP_RX2N GPP_TX2N PCIE_TXN2_LAN 30
V5 Y1
GPP_RX3P GPP_TX3P
W6 Y2
GPP_RX3N GPP_TX3N
U5 Y4
C GPP_RX4P GPP_TX4P C
U6 GPP_RX4N GPP_TX4N Y3
U8 V1
GPP_RX5P GPP_TX5P
U7 GPP_RX5N GPP_TX5N V2

AA8 AD7 A_TX0P_C C686 0.1U/10V_4 PCIE_NB_SB_TX0P 12


12 PCIE_SB_NB_RX0P SB_RX0P SB_TX0P
Y8 AE7 A_TX0N_C C687 0.1U/10V_4 PCIE_NB_SB_TX0N 12
12 PCIE_SB_NB_RX0N SB_RX0N SB_TX0N
AA7 AE6 A_TX1P_C C685 0.1U/10V_4 PCIE_NB_SB_TX1P 12
12 PCIE_SB_NB_RX1P SB_RX1P SB_TX1P
Y7 AD6 A_TX1N_C C684 0.1U/10V_4 PCIE_NB_SB_TX1N 12
12 PCIE_SB_NB_RX1N SB_RX1N SB_TX1N
AA5 PCIE I/F SB AB6 A_TX2P_C C90 0.1U/10V_4 PCIE_NB_SB_TX2P 12
12 PCIE_SB_NB_RX2P SB_RX2P SB_TX2P
AA6 AC6 A_TX2N_C C91 0.1U/10V_4 PCIE_NB_SB_TX2N 12
12 PCIE_SB_NB_RX2N SB_RX2N SB_TX2N
W5 AD5 A_TX3P_C C688 0.1U/10V_4 PCIE_NB_SB_TX3P 12
12 PCIE_SB_NB_RX3P SB_RX3P SB_TX3P
Y5 AE5 A_TX3N_C C689 0.1U/10V_4 PCIE_NB_SB_TX3N 12
12 PCIE_SB_NB_RX3N SB_RX3N SB_TX3N
AC8 NB_PCIECALRP R390 1.27K/F_4
PCE_CALRP(PCE_BCALRP) NB_PCIECALRN R389 2K/F_4
PCE_CALRN(PCE_BCALRN) AB8 +1.1V

RS880

RS880 Display Port Support (muxed on GFX)

GFX_TX0,TX1,TX2 and TX3


DP0
AUX0 and HPD0

B GFX_TX4,TX5,TX6 and TX7 B


DP1
AUX1 and HPD1

A A

PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
RS740/RS780-PCIE I/F 2/5
NB5/RD2
Date: Friday, March 20, 2009 Sheet 9 of 42
5 4 3 2 1
5 4 3 2 1

10
U25C
+3V_AVDD_NB F12 A22 LA_DATAP0
AVDD1(NC) TXOUT_L0P(NC) LA_DATAP0 23
E12 PART 3 OF 6 B22 LA_DATAN0
AVDD2(NC) TXOUT_L0N(NC) LA_DATAN0 23
+1.8V_AVDDDI_NB F14 A21 LA_DATAP1
AVDDDI(NC) TXOUT_L1P(NC) LA_DATAP1 23
G15 B21 LA_DATAN1
AVSSDI(NC) TXOUT_L1N(NC) LA_DATAN1 23
R91 for UMA use 140 ohm +1.8V_AVDDQ_NB H15 B20 LA_DATAP2
AVDDQ(NC) TXOUT_L2P(NC) LA_DATAP2 23
for DIS use 150 ohm H14 A20 LA_DATAN2
AVSSQ(NC) TXOUT_L2N(DBG_GPIO0) LA_DATAN2 23
A19 LA_DATAP3
TXOUT_L3P(NC) T75
140ohm CS11402FB19 E17 B19 LA_DATAN3

CRT/TVOUT
C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2) T79
150ohm CS11502FB21 F17 Y(DFT_GPIO2)
F15 B18 LB_DATAP0
COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC) LB_DATAP0 23
A18 LB_DATAN0
TXOUT_U0N(NC) LB_DATAN0 23
18,24 CRT_R R58 *0_4 CRT_R_1 G18 A17 LB_DATAP1
RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3) LB_DATAP1 23
R91 *140/F_4 G17 B17 LB_DATAN1
REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2) LB_DATAN1 23
18,24 CRT_G R49 *0_4 CRT_G_1 E18 D20 LB_DATAP2
GREEN(DFT_GPIO1) TXOUT_U2P(NC) LB_DATAP2 23
R92 *150/F_4 F18 D21 LB_DATAN2
GREENb(NC) TXOUT_U2N(NC) LB_DATAN2 23
D 18,24 CRT_B R46 *0_4 CRT_B_1 E19 D18 LB_DATAP3 D
BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5) T80
R93 *150/F_4 F19 D19 LB_DATAN3
BLUEb(NC) TXOUT_U3N(NC) T76

18,19,24 HSYNC_COM R120 *0_4 HSYNC_INT A11 B16 LA_CLK


DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1) LA_CLK 23
18,19,24 VSYNC_COM R106 *0_4 VSYNC_INT B11 A16 LA_CLK#
DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3) LA_CLK# 23
R104 *0_4 DDCDATA_INT E8 D16 LB_CLK
18,24 DDCDATA DAC_SDA(PCE_TCALRN) TXCLK_UP(PCIE_RESET_GPIO4) LB_CLK 23
R105 *0_4 DDCCLK_INT F8 D17 LB_CLK#
18,24 DDCCLK DAC_SCL(PCE_RCALRN) TXCLK_UN(PCIE_RESET_GPIO1) LB_CLK# 23
R102 *715/F_6 DAC_RSET_NB G14 DAC_RSET(PWM_GPIO1) +1.8V_VDDLTP18_NB
VDDLTP18(NC) A13
+1.1V_PLLVDD A12 B13
+1.8V_PLLVDD18 PLLVDD(NC) VSSLTP18(NC)
Only for UMA D14

LVTM
PLLVDD18(NC) +1.8V_VDDLT_18_NB
B12 A15

PLL PWR
PLLVSS(NC) VDDLT18_1(NC)
VDDLT18_2(NC) B15
+1.8V_VDDA18HTPLL H17 A14
VDDA18HTPLL VDDLT33_1(NC)
VDDLT33_2(NC) B14
+1.8V_VDDA18PCIEPLL D7 VDDA18PCIEPLL1
E7 VDDA18PCIEPLL2 VSSLT1(VSS) C14
VSSLT2(VSS) D15
NB_RST#_IN D8 C16
12 NB_PLTRST# SYSRESETb VSSLT3(VSS)
NB_PWRGD_IN A10 C18
16 NB_PWRGD_IN POWERGOOD VSSLT4(VSS)
NB_LDT_STOP# C10 C20

PM
NB_ALLOW_LDTSTOP LDTSTOPb VSSLT5(VSS)
C12 ALLOW_LDTSTOP VSSLT6(VSS) E20
VSSLT7(VSS) C22
NBHT_REFCLKP C25
2 NBHT_REFCLKP HT_REFCLKP
NBHT_REFCLKN C24 I RS880 only Change from AMD request
2 NBHT_REFCLKN HT_REFCLKN

2 EXT_NB_OSC E11 REFCLK_P/OSCIN(OSCIN)

CLOCKs
NB_REFCLK_N F11 I E9 R124 *0_4 DISP_ON
REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP) DISP_ON 19,23
+1.1V F7 R103 *0_4 DPST_PWM
LVDS_BLON(PCE_RCALRP) DPST_PWM 19,23
R108 RS780 RS780 R94 NBGFX_CLKP T2 G12 R101 *0_4 LVDS_BLON
2 NBGFX_CLKP GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2) LVDS_BLON 18,23
4.7K_4 4.7K_4 NBGFX_CLKN T1 I/O
2 NBGFX_CLKN GFX_REFCLKN
NBGPP_CLKP U1
T8 GPP_REFCLKP SI Remove for AMD request
NBGPP_CLKN U2 I/O
T4 GPP_REFCLKN
C C
SBLINK_CLKP V4
2 SBLINK_CLKP GPPSB_REFCLKP(SB_REFCLKP)
SBLINK_CLKN V3
2 SBLINK_CLKN GPPSB_REFCLKN(SB_REFCLKN)
NB_I2C_DATA A9 R438
18,23 EDIDDATA I2C_DATA
NB_I2C_CLK B9 D9 TMDS_HPD0 *0_4/S
18,23 EDIDCLK
B8
I2C_CLK MIS. TMDS_HPD(NC)
D10 TMDS_HPD1
TMDS_HPD 18,25
25 HDMI_DDC_DATA DDC_DATA/AUX0N(NC) HPD(NC) T74
25 HDMI_DDC_CLK A8 DDC_CLK/AUX0P(NC)
RS740_DFT_GPIO1 B7 D12 SUS_STAT#_NB R117 *0_4/S
T78 AUX1P(NC) TVCLKIN(PWM_GPIO5) SUS_STAT# 13
T77 A7 AUX1N(NC)
THERMALDIODE_P AE8
R14 *0_4/S STRP_DATA B10 AD8
35 DYN_PWR_EN STRP_DATA THERMALDIODE_N
G11 RSVD TESTMODE D13 TEST_EN

RS780_AUX_CAL C8 R441
T81 AUX_CAL(NC) 1.8K_4
RS880

RX780 -->NC / RS780 --- ADD *BLM18PG181SN1D(180,1.5A)_6


+1.1V +1.1V_PLLVDD
+3V L28 +3V_AVDD_NB L65
*BLM18PG181SN1D(180,1.5A)_6 PLLVDD - Graphics PLL +1.8V
not applicable to
AVDD-DAC Analog C762 *BLM18PG181SN1D(180,1.5A)_6
C278 RX780 +1.8V_VDDLTP18_NB
not applicable to RX780 0_6
0_6 L66
C761 VDDLTP18 - LVDS or DVI/HDMI PLL
0_6 not applicable to RX780
+1.8V
Enables Debug Bus acess
B through memory T/O pads and GPIO. RS780 +1.8V
B
*BLM21PG221SN1D(220,100M,2A)_8
0 : Enable RS780 , Default VSYNC_INT R107 3K_4 L26 +1.8V_PLLVDD18 R84 *0_6 +1.8V_AVDDDI_NB AVDDI-DAC Digital +1.8V_VDDLT_18_NB
+3V
1 : Disable RS780 *BLM18PG181SN1D(180,1.5A)_6 not applicable to RX780 L68
(RS780 use VSYNC#) C271 VDDLT18 - LVDS or
DVI/HDMI digital
C316 C275 0_4 C769 C758
10U/6.3V_8 not applicable to
0_6
0_6 *0.1U/10V_4 RX780
*BLM18PG181SN1D(180,1.5A)_6 AVDDQ-DAC Bandgap Reference
PLLVDD18 - Graphics PLL +1.8V_AVDDQ_NB not applicable to RX780
L27
Indicates if memory Side port RS780 not applicable to RX780
is available or not C279
HSYNC_INT R122 3K_4 +3V 0_6
0: available RS780 , Default
1: Not available RS780 R121 *3K_4
( RS780 use HSYNC#)

+1.8V
VDDA18PCIEPLL -PCIE PLL
For extrnal EEPROM Debug only 20mils width
RS780/RX780 L25 +1.8V_VDDA18PCIEPLL

STRP_DATA R447 2K/F_4 BLM18PG181SN1D(180,1.5A)_6

C282 R154 *0_4/S NB_LDT_STOP#


3,12 CPU_LDT_STOP#
2.2U/6.3V_6
SI Remove for AMD request

MV change:
VDDA18HTPLL -HT LINK PLL
A A
20mils width
L24 +1.8V_VDDA18HTPLL

BLM18PG181SN1D(180,1.5A)_6

C288
2.2U/6.3V_6

3 CPU_LDT_REQ#
R159 0_4 NB_ALLOW_LDTSTOP
PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
12 ALLOW_LDTSTOP Custom
RS740/RS780-SYSTEM I/F 3/5 1A
NB5/RD2
Date: Friday, March 20, 2009 Sheet 10 of 42
5 4 3 2 1
5 4 3 2 1

11

AE14
AC3
AC4

M11
AA4
AB5
AB1
AB7

AE1
AE4
AB2

D11

E14
E15

K14

L15
J15
J12
W1
W2
W4
W7
W8
M6
G1
G2
G4

G8
D3
D5

H7

R7

N4

R1
R2
R4

U4
A2
B1

E4

P6

V7

V8
V6

Y6
RX780/RS780 POWER DIFFERENCE TABLE

L1
L2
L4
L7
J4
U25F

VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
PIN NAME RX780 RS780 PIN NAME RX780 RS780
VDDHT +1.1V +1.1V IOPLLVDD NC +1.1V

VDDHTRX +1.1V +1.1V AVDD NC +3.3V


PART 6/6

D D
GROUND VDDHTTX +1.2V +1.2V AVDDDI NC +1.8V

VDDA18PCIE +1.8V +1.8V AVDDQ NC +1.8V

VDDG18 +1.8V +1.8V PLLVDD NC +1.1V


VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VDD18_MEM NC +1.8V PLLVDD18 NC +1.8V
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VDDPCIE +1.1V +1.1V VDDA18PCIEPLL +1.8V +1.8V

VDDC +1.1V +1.1V VDDA18HTPLL +1.8V +1.8V


A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25

L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
VDD_MEM NC +1.8V/1.5V VDDLTP18 NC +1.8V

VDDG33 NC +3.3V VDDLT18 NC +1.8V

IOPLLVDD18 NC +1.8V VDDLT33 NC NC

VDDHT - HT +1.1V

C
LINK digital
I/O for
+1.1V 2A for RS880M VDDPCIE - PCIE-E Main power C
U25E
RX780/RS780 0.6A L58 +1.1V_VDDHT +1.1V_VDD_PCIE
0.7A R99 *0_8/S
J17 VDDHT_1 VDDPCIE_1 A6 +1.1V
*0_8/S K16 PART 5/6 B6
VDDHT_2 VDDPCIE_2
L16 VDDHT_3 VDDPCIE_3 C6
C693 C224 C265 C238 M16 D6 C226 C277 C268 C273 C281
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDHT_4 VDDPCIE_4 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 4.7U/6.3V_6
P16 VDDHT_5 VDDPCIE_5 E6
VDDHTRX - HT R16 VDDHT_6 VDDPCIE_6 F6
LINK RX I/O for T16 VDDHT_7 VDDPCIE_7 G7
RX780/RS780 0.45A L64 +1.1V_VDDHTRX VDDPCIE_8 H8
H18 VDDHTRX_1 VDDPCIE_9 J9
*0_8/S G19 K9
VDDHTRX_2 VDDPCIE_10
F20 VDDHTRX_3 VDDPCIE_11 M9
VDDHTTX - HT C770 C272 C763 C759 E21 L9
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDHTRX_4 VDDPCIE_12
LINK TX I/O for D22 VDDHTRX_5 VDDPCIE_13 P9
RX780/RS780 B23 VDDHTRX_6 VDDPCIE_14 R9
A23 VDDHTRX_7 VDDPCIE_15 T9

L13
0.5A +1.2V 2A for RS780M+SB700 +1.2V_VDDHTTX VDDPCIE_16 V9
+1.2V AE25 VDDHTTX_1 VDDPCIE_17 U9
*0_8/S AD24 7A VDDC - Core Logic power
VDDHTTX_2
AC23 VDDHTTX_3 VDDC_1 K12 +1.1V_DYN
C80 C152 C139 C195 C151 AB22 J14
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDHTTX_4 VDDC_2
AA21 VDDHTTX_5 VDDC_3 U16
Y20 J11 C203 C250 C252 C258 C29
VDDHTTX_6 VDDC_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 10U/6.3V_8
W 19 K15

POWER
VDDHTTX_7 VDDC_5
V18 VDDHTTX_8 VDDC_6 M12
U17 VDDHTTX_9 VDDC_7 L14
T17 VDDHTTX_10 VDDC_8 L11
R17 VDDHTTX_11 VDDC_9 M13
P17 M15
B +1.8V 1A for RS780M+SB700 M17
VDDHTTX_12 VDDC_10
N12
B
VDDHTTX_13 VDDC_11
L17
600mA +1.8V_VDDA18PCIE VDDC_12 N14
C239 C232 C202 C30
+1.8V J10 VDDA18PCIE_1 VDDC_13 P11 VDD_MEM For UMA RS780 only
P10 P13 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 10U/6.3V_8
BLM21PG221SN1D(220,100M,2A)_8 K10
VDDA18PCIE_2 VDDC_14
P14 Not applicable to RX780
C141 C126 C209 C166 C257 C188 VDDA18PCIE_3 VDDC_15
VDDA18PCIE - M10 VDDA18PCIE_4 VDDC_16 R12 memory I/O transform
PCIE TX stage 4.7U/6.3V_6 4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 L10 R15
VDDA18PCIE_5 VDDC_17
I/O for W9 VDDA18PCIE_6 VDDC_18 T11
H9 VDDA18PCIE_7 VDDC_19 T15
RX780/RS780 T10 U12
VDDA18PCIE_8 VDDC_20
R10 VDDA18PCIE_9 VDDC_21 T14
Y9 J16 BLM21PG221SN1D(220,100M,2A)_8
VDDA18PCIE_10 VDDC_22
AA9 VDDA18PCIE_11 +1.8V_VDD_MEM
1.8V(0.15A) L18
AB9 VDDA18PCIE_12 VDD_MEM1(NC) AE10 +1.8V
R110 *0_6/S
0.005A AD9 VDDA18PCIE_13 VDD_MEM2(NC) AA11
C149 C128 C127 C168 C138
VDD18 - RS780 I/O +1.8V AE9 VDDA18PCIE_14 VDD_MEM3(NC) Y11
transform U10 AD10 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_8
C267 VDDA18PCIE_15 VDD_MEM4(NC)
VDD_MEM5(NC) AB10
1U/10V_4 +1.8V_VDDG18_NB F9 AC10
VDDG18_1(VDD18_1) VDD_MEM6(NC) RS780
G9 VDDG18_2(VDD18_2) +3V_VDDG33 R111 *0_6/S
3.3V(0.03A)
R395 *0_6/S
0.005A +1.8V_VDD18_MEM
AE11 VDD18_MEM1(NC) VDDG33_1(NC) H11 +3V
+1.8V AD11 VDD18_MEM2(NC) VDDG33_2(NC) H12
C276 C274 VDD33 - 3.3V I/O
VDD18_MEM For UMA RS780 only C692 RS880 0.1U/10V_4 0.1U/10V_4
1U/10V_4 Not applicable to RX780
Not applicable to RX780
memory I/O transform

A A

PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
RS740/RS780-POWER5/5
NB5/RD2
Date: Friday, March 20, 2009 Sheet 11 of 42
5 4 3 2 1
5 4 3 2 1

10 NB_PLTRST#
17 PCIE_RST#
R223
R224
33_4
33_4
12
30 LAN_PLTRST# R225 33_4 U31A

R505 33_4 A_RST#_SB N2


SB710 P4
33 MINI_PLTRST# A_RST# PCICLK0 T53
Part 1 of 5 PCICLK1 P3 T111

PCI CLKS
9 PCIE_SB_NB_RX0P C807 0.1U/10V_4 A_RX0P_C V23 P1 PCI_CLK_TPM PCI_CLK_TPM 16
C806 0.1U/10V_4 A_RX0N_C PCIE_TX0P PCICLK2 PCI_CLK3
D 9 PCIE_SB_NB_RX0N V22 PCIE_TX0N PCICLK3 P2 PCI_CLK3 16 D
PLACE THESE 9 PCIE_SB_NB_RX1P C800 0.1U/10V_4 A_RX1P_C V24 T4 PCI_CLK4 PCI_CLK4 16
C799 0.1U/10V_4 A_RX1N_C PCIE_TX1P PCICLK4 PCI_CLK5
9 PCIE_SB_NB_RX1N V25 PCIE_TX1N PCICLK5/GPIO41 T3 PCI_CLK5 16
PCIE AC 9 PCIE_SB_NB_RX2P C809 0.1U/10V_4 A_RX2P_C U25 PCIE_TX2P

To RS780
C808 0.1U/10V_4 A_RX2N_C U24
COUPLING CAPS 9 PCIE_SB_NB_RX2N
C802 0.1U/10V_4 A_RX3P_C T23
PCIE_TX2N
9 PCIE_SB_NB_RX3P PCIE_TX3P
CLOSE TO U600 9 PCIE_SB_NB_RX3N C801 0.1U/10V_4 A_RX3N_C T22 PCIE_TX3N PCIRST# N1 PCIRST#_L R486 33_4 PCIRST# PCIRST# 32

PCI EXPRESS INTERFACE


PCIE_NB_SB_TX0P U22
9 PCIE_NB_SB_TX0P PCIE_RX0P
PCIE_NB_SB_TX0N U21 U2
9 PCIE_NB_SB_TX0N PCIE_RX0N AD0
PCIE_NB_SB_TX1P U19 P7
9 PCIE_NB_SB_TX1P PCIE_RX1P AD1
PCIE_NB_SB_TX1N V19 V4
9 PCIE_NB_SB_TX1N PCIE_RX1N AD2
PCIE_NB_SB_TX2P R20 T1 +3V
9 PCIE_NB_SB_TX2P PCIE_RX2P AD3
PCIE_NB_SB_TX2N R21 V3
9 PCIE_NB_SB_TX2N PCIE_RX2N AD4
PCIE_NB_SB_TX3P R18 U1
9 PCIE_NB_SB_TX3P PCIE_RX3P AD5
PCIE_NB_SB_TX3N R17 V1 PE_GPIO1 R313 8.2K_4
9 PCIE_NB_SB_TX3N PCIE_RX3N AD6
AD7 V2
R476 562/F_4 PCIE_CALRP_SB T25 T2 R328 *8.2K_4
R477 2.05K/F_4 PCIE_CALRN_SB PCIE_CALRP AD8
+1.2V_PCIE_VDDR T24 PCIE_CALRN AD9 W1
AD10 T9
+1.2V L37 BLM18PG181SN1D(180,1.5A)_6 +1.2V_PCIE_PVDD P24 R6 SB_GPIO65 R284 *100K/F_4
PCIE_PVDD AD11
40mA AD12 R7
PCIE_PVDD-- PCIE PLL POWER P25 PCIE_PVSS AD13 R5
C439 C467 U8
10U/6.3V_8 1U/10V_4 AD14 R297 10K/F_4
AD15 U5 +3V
AD16 Y7
AD17 W8
AD18 V9
AD19 Y8
AD20 AA8
C
AD21 Y4 C

AD22 Y3
Y2 AD23
AD23 AD23 16
AA2 AD24
AD24 AD24 16
AB4 AD25
AD25 AD25 16
SBSRC_CLKP N25 AA1 AD26
2 SBSRC_CLKP PCIE_RCLKP/NB_LNK_CLKP AD26 AD26 16
SBSRC_CLKN N24 AB3 AD27
2 SBSRC_CLKN PCIE_RCLKN/NB_LNK_CLKN AD27 AD27 16
RTC_X1 AB2 AD28
AD28 AD28 16
Y5 K23 NB_DISP_CLKP AD29 AC1

PCI INTERFACE
K22 NB_DISP_CLKN AD30 AC2
3 2 AD1 D29
AD31 RB500V-40
M24 NB_HT_CLKP CBE0# W2
+AVBAT
M25 NB_HT_CLKN 100MHZ CBE1# U7 +3VPCU
CBE2# AA7 All the PCI bus has
RTC_X2
R305
4 1 P17
M18
CPU_HT_CLKP CBE3# Y1
AA6 build-in Pull-UP/Down 20MIL R510 499/F_4 +3VRTC_1 R512 10_4 +3VRTC
CPU_HT_CLKN FRAME#
32.768KHZ DEVSEL# W5 resistors
D28
M23 AA5
20MIL 20MIL

2+VCCRTC_2
*20M_6 R321 20M_6 SLT_GFX_CLKP IRDY# RB500V-40
M22 SLT_GFX_CLKN TRDY# Y5
U6 C834
PAR
J19 GPP_CLK0P STOP# W6
C569 C579 1U/10V_4
18P/50V_4 18P/50V_4
J18 GPP_CLK0N PERR# W4
V7 SERR#
SERR# 32 Change from 20MIL
SERR#
Change for SB710 chip L20 GPP_CLK1P REQ0# AC3
0ohm to 1K
L19 AD4 R508
GPP_CLK1N REQ1#
REQ2# AB7 for safty
R285 *0_4/S 1K/F_4

CLOCK GENERATOR
M19 GPP_CLK2P REQ3#/GPIO70 AE6 RF_OFF# 33 issue
M20 AB6 T45

+BAT 1
GPP_CLK2N REQ4#/GPIO71
GNT0# AD2
B FOR A14 chip N22
P22
GPP_CLK3P GNT1# AE4
AD5
20MIL B
GPP_CLK3N GNT2# PE_GPIO1
GNT3#/GPIO72 AC6
L18 AE5 R482 *0_4/S LCD_BK 23
2 EXT_SB_OSC 25M_48M_66M_OSC GNT4#/GPIO73

1
AD6 CLKRUN#_R R480 *0_4/S
CLKRUN# CLKRUN# 32
V5 BT1
LOCK# T42
T125 J21 25M_X1 INTE# BAT_CONN
AD3 T114

2
INTE#/GPIO33 INTF#
INTF#/GPIO34 AC4 T55
AE2 INTG#
INTG#/GPIO35 T112
T35 J20 AE3 INTH#
25M_X2 INTH#/GPIO36 T59
LPC_CLK0 16
LPC_CLK1 16
G22 LPC_CLK0 R236 22_4
LPCCLK0 PCLK_LPC_DEBUG 33
E22 LPC_CLK1 R202 10_4
LPCCLK1 PCLK_LPC_KB3920 32
RTC_X1 A3 H24 LAD0
X1 LAD0 LAD0 32,33
RTC XTAL

H23 LAD1 for EMI


LAD1 LAD1 32,33
J25 LAD2 C420 suggestion
LAD2 LAD2 32,33
J24 LAD3
LAD3 LAD3 32,33
LPC

RTC_X2 B3 H25 LFRAME# 5.6P/50V_6 C464


X2 LFRAME# LFRAME# 32,33
H22 LDRQ0#_SB 22P/50V_4
LDRQ0# T28
AB8 LDRQ1#_SB
LDRQ1#/GNT5#/GPIO68 T39
AD7 SB_GPIO65
BMREQ#/REQ5#/GPIO65 T51
+3VS5 R201 10K/F_4 V15 SERIRQ
SERIRQ SERIRQ 32
ALLOW_LDTSTOP F23
10 ALLOW_LDTSTOP ALLOW _LDTSTP
CPU_PROCHOT# F24 C3 RTC_CLK
3 CPU_PROCHOT# PROCHOT# RTCCLK RTC_CLK 16
3 CPU_PWRGD CPU_PWRGD F22 C2 INTRUDER_ALERT# R493 *1M/F_4 +AVBAT
CPU_LDT_STOP# LDT_PG INTRUDER_ALERT# +AVBAT
CPU

RTC

3,10 CPU_LDT_STOP# G25 LDT_STP# VBAT B2 +AVBAT


3,10 CPU_LDT_RST# CPU_LDT_RST# G24 LDT_RST#
INTRUDER_ALERT# Left not connected (Southbridge
A
20MIL 1
G3 has 50-kohm internal pull-up to VBAT).
A

SB710 *SHORT_ PAD1 C826


IC CTRL(528P) SB710 A14(218-0660017) 0.1U/10V_4
P/N : AJ066000T01
2

PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
SB700-PCIE/PCI/CPU/LPC 1/4
NB5/RD2
Date: Friday, March 20, 2009 Sheet 12 of 42
5 4 3 2 1
5 4 3 2 1

+3VS5

R319

R180
NC only ,Can't be install
*2.2K_4

*2.2K_4
SB_TEST0

SB_TEST1 Check BIOS for no connetcor pin for the power


E1
U31D

SB710 Part 4 of 5
13
RI# PCI_PME#/GEVENT4# CLK_48M_USB
T113 E2 RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC C8 CLK_48M_USB 2
R296 *2.2K_4 SB_TEST2 SLP_S2 H7 CLK_48M_USB
T43 SLP_S2/GPM9#
SUSB# F5 G8 USB_RCOMP_SB R263 11.8K/F_6
32 SUSB# SLP_S3# USB_RCOMP

USB MISC
SUSC# G1
32 SUSC# SLP_S5#

ACPI / WAKE UP EVENTS


DNBSWON# H2 for EMI
32 DNBSWON# PW R_BTN#
SB_PWRGD_IN H1
D +3V SCL0/SDATA0 16 SB_PWRGD_IN PW R_GOOD D
is 3V tolerance Clock gen/Robson/TV SUS_STAT# K3 C516
10 SUS_STAT# SUS_STAT#
AMD datasheet define it tuner SB_TEST2 H5 E6 USB_FSD13P *2.2P/50V_4
TEST2 USB_FSD13P T54
SB_TEST1 H4 E7 USB_FSD13N
/DDR2/DDR2 TEST1 USB_FSD13N T57
R238 2.2K_4 PCLK_SMB SB_TEST0 H3
thermal/Accelerometer GATEA20 TEST0 USB_FDS12P
Y15 F7

USB 1.1
32 GATEA20 GA20IN/GEVENT0# USB_FSD12P T38
R241 2.2K_4 PDAT_SMB RCIN# W 15 E8 USB_FSD12N
32 RCIN# KBRST#/GEVENT1# USB_FSD12N T40
SCI# K4
32 SCI# LPC_PME#/GEVENT3#
KBSMI# K24 H11
32 KBSMI# LPC_SMI#/EXTEVNT1# USB_HSD11P
Change for test point for Debug mode T56 GEVENT5# F1 J10
SYS_RST# S3_STATE/GEVENT5# USB_HSD11N
T124 J2 SYS_RESET#/GPM7#
30,33 PCIE_WAKE# H6 W AKE#/GEVENT8# USB_HSD10P E11 USBP10+ 33
32 SWI# R198 0_4 SWI#_L F2 F11 WLAN Min-Card
BLINK/GPM6# USB_HSD10N USBP10- 33
R181 *0_4/S SB_THERMTRIP# J6
3 CPU_THERMTRIP# SMBALERT#/THRMTRIP#/GEVENT2#
WD_PWRGD W 14 A11
16 WD_PWRGD NB_PW RGD USB_HSD9P USBP9+ 29
+3VS5 USB_HSD9N B11 USBP9- 29 BLUETOOTH
SCL1/SDATA1 is 3V/S5 tolerance C840 RSMRST# D3
32 RSMRST# RSMRST#
AMD datasheet define it 100P/50V_4 C10
USB_HSD8P USBP8+ 29
USB_HSD8N D10 USBP8- 29 USB Connector
R492 2.2K_4 SB_SMBCLK1
R494 2.2K_4 SB_SMBDATA1 AE18 G11
T29 SATA_IS0#/GPIO10 USB_HSD7P
SATA_IS1 AD18 H12
T106 CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N
R230 *0_4 LAN_DISABLE#_SB AA19 Si Change USB port reference Raven 2.0 design
30,32 LAN_DISABLE# SMARTVOLT/SATA_IS2#/GPIO4
remove pull hi W 17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E12
( chip internal SB_NWD_CLK_REQ# V17 E14
T36 CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N
have pull hi ) W 20 CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
ACZ_SPKR W 21 C12
27,28 ACZ_SPKR SPKR/GPIO2 USB_HSD5P USBP5+ 29

USB 2.0
PCLK_SMB AA18 D12 USB Connector
2,6,7,33 PCLK_SMB SCL0/GPOC0# USB_HSD5N USBP5- 29
PDAT_SMB W 18
+3VS5 2,6,7,33 PDAT_SMB SDA0/GPOC1#
SCL2/SDATA2 is 3V/S5 tolerance SB_SMBCLK1 K1 B12
SB_SMBDATA1 SCL1/GPOC2# USB_HSD4P
C AMD datasheet define it K2 SDA1/GPOC3# USB_HSD4N A12 C

GPIO
T33 AA20 DDC1_SCL/GPIO9
R204 2.2K_4 SB_SCLK2 Y18 G12
T37 DDC1_SDA/GPIO8 USB_HSD3P USBP3+ 26
R205 2.2K_4 SB_SDATA2 PM_BATLOW# C1 G14 USB card reader
32 PM_BATLOW# LLB#/GPIO66 USB_HSD3N USBP3- 26
SES_INT Y19
T34 SHUTDOW N#/GPIO5
GEVENT7# G5 H14
+3V T50 DDR3_RST#/GEVENT7# USB_HSD2P USBP2+ 23
USB_HSD2N H15 USBP2- 23 Carama USB
USB_HSD1P A13 USBP1+ 29
R290 3K_4 SUS_STAT# B13 E-SATA and USB Connector
USB_HSD1N USBP1- 29

USB_HSD0P B14
CPU_MEMHOT# B9 A14
3,7 CPU_MEMHOT# USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N
R264 *0_4 SMBALERT#_1 B8
5 PM_THERM# USB_OC5#/IR_TX0/GPM5#
+3VS5 R276 10K/F_4 A8 A18
USB_OC4#/IR_RX0/GPM4# IMC_GPIO8

USB OC
Change from AMD request SB_JTAG_TDO A9 B18
SB_JTAG_TCK USB_OC3#/IR_RX1/GPM3# IMC_GPIO9
E5 USB_OC2#/GPM2# IMC_PW M0/IMC_GPIO10 F21
+3VS5 SB_JTAG_TDI F8 D21 SB_SCLK2
SB_JTAG_RST# USB_OC1#/GPM1# SCL2/IMC_GPIO11 SB_SDATA2
E4 USB_OC0#/GPM0# SDA2/IMC_GPIO12 F19
R288 2.2K_4 DNBSWON# R483 *10K/F_4 E20 SB_SCLK3
SCL3_LV/IMC_GPIO13 T32
ACZ_BCLK M1 E21 5158_RST_R#
AZ_BITCLK SDA3_LV/IMC_GPIO14 5158_RST_R# 26
ACZ_SDOUT M2 E19
R339 *10K/F_4 ACZ_SDIN0 AZ_SDOUT IMC_PW M1/IMC_GPIO15 SB_GPIO16
J7 AZ_SDIN0/GPIO42 IMC_PW M2/IMC_GPO16 D19 SB_GPIO16 16
R336 *10K/F_4 ACZ_SDIN1 J8 E18 SB_GPIO17 SPI/LPC define
To Azalia SB_GPIO17 16

HD AUDIO
R275 *10K/F_4 ACZ_SDIN2_R AZ_SDIN1/GPIO43 IMC_PW M3/IMC_GPO17
L8 AZ_SDIN2/GPIO44
R506 *10K/F_4 ACZ_SDIN3_R M3 G20
ACZ_SDOUT R487 33_4 ACZ_SYNC AZ_SDIN3/GPIO46 IMC_GPIO18
ACZ_SDOUT_AUDIO 27 L6 AZ_SYNC IMC_GPIO19 G21
ACZ_RST# M4 D25
16 ACZ_RST# AZ_RST# IMC_GPIO20
C830 *10P/50V_4 L5 D24

INTEGRATED uC
AZ_DOCK_RST#/GPM8# IMC_GPIO21
B
HD audio IMC_GPIO22 C25 B
interface is IMC_GPIO23 C24
ACZ_SYNC R303 33_4 B25
ACZ_SYNC_AUDIO 27 3.3S5 voltage IMC_GPIO24
IMC_GPIO25 C23
C562 *10P/50V_4
IMC_GPIO26 B24
IMC_GPIO27 B23
ACZ_BCLK R489 33_4 A23
BIT_CLK_AUDIO 27 IMC_GPIO28
IMC_GPIO29 C22
C832 10P/50V_4 A22
IMC_GPIO30
IMC_GPIO31 B22
IMC_GPIO32 B21
ACZ_RST# R317 33_4 A21
ACZ_RST#_AUDIO 27 IMC_GPIO33
H19 IMC_GPIO0 IMC_GPIO34 D20
H20 C20

INTEGRATED uC
ACZ_SDIN0 IMC_GPIO1 IMC_GPIO35
ACZ_SDIN0 27 H21 SPI_CS2#/IMC_GPIO2 IMC_GPIO36 A20
F25 IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37 B20
Remove short pad IMC_GPIO38 B19
Modified for EMI suggestion D22 IMC_GPIO4 IMC_GPIO39 A19
E24 D18
To Modem Board E25
IMC_GPIO5
IMC_GPIO6
IMC_GPIO40
IMC_GPIO41 C18
D23 IMC_GPIO7
ACZ_SDOUT R488 33_4
ACZ_SDOUT_AUDIO_MDC 28
C831 *10P/50V_4

SB710
ACZ_SYNC R320 33_4
ACZ_SYNC_AUDIO_MDC 28 +3VSUS
C580 *10P/50V_4 C393
CN11
A 10P/50V_4 A

ACZ_BCLK R490 33_4 1 SB_JTAG_TCK


BIT_CLK_AUDIO_MDC 28 2 SB_JTAG_TDO
C833 10P/50V_4 3 SB_JTAG_TDI
SB JTAG 4
5
SB_TEST1

ACZ_RST# R312 33_4


ACZ_RST#_AUDIO_MDC 28
6 SB_JTAG_RST# PROJECT : OP8
7
8 Quanta Computer Inc.
ACZ_SDIN1 *S/W JTAG DEBUG Size Document Number Rev
ACZ_SDIN1 28 Custom
SB700-ACPI/GPIO/USB 2/4 1A
Remove short pad NB5/RD2
Date: Friday, March 20, 2009 Sheet 13 of 42
5 4 3 2 1
5 4 3 2 1

SATA PORT 0,1,2,3


can support AHCI
mode
PLACE SATA AC COUPLING
CAPS CLOSE TO SB600

C540 0.01U/16V_4 SATA_TXP0_C AD9


U31B

SB710 AA24
14
29 SATA_TXP0 SATA_TX0P IDE_IORDY T86
C539 0.01U/16V_4 SATA_TXN0_C AE9 Part 2 of 5 AA25
SATA1 29 SATA_TXN0 SATA_TX0N IDE_IRQ
Y22
T84
IDE_A0 T31
C554 0.01U/16V_4 SATA_RXN0_C AB10 AB23
29 SATA_RXN0 SATA_RX0N IDE_A1 T87
C553 0.01U/16V_4 SATA_RXP0_C AC10 Y23
29 SATA_RXP0 SATA_RX0P IDE_A2 T82
IDE_DACK# AB24 T85
C533 0.01U/16V_4 SATA_TXP1_C AE10 AD25
D SATA ODD 29 SATA_TXP1
C529 0.01U/16V_4 SATA_TXN1_C AD10
SATA_TX1P IDE_DRQ
AC25
T88 D
29 SATA_TXN1 SATA_TX1N IDE_IOR# T90
IDE_IOW # AC24 T89
C515 0.01U/16V_4 SATA_RXN1_C AD11 Y25
29 SATA_RXN1 SATA_RX1N IDE_CS1# T91
C521 0.01U/16V_4 SATA_RXP1_C AE11 Y24 IF THERE IS NO IDE, TEST
29 SATA_RXP1 SATA_RX1P IDE_CS3# T83
AB12 AD24
POINTS FOR DEBUG BUS
29 SATA_TXP2 SATA_TX2P IDE_D0/GPIO15 T92
29 SATA_TXN2 AC12 SATA_TX2N IDE_D1/GPIO16 AD23 T96 IS MANDATORY
AE22
E-SATA IDE_D2/GPIO17 T93

ATA 66/100/133
29 SATA_RXN2 AE12 SATA_RX2N IDE_D3/GPIO18 AC22 T94 SIDE_PORT_ID1 SIDE_PORT_ID0
29 SATA_RXP2 AD12 SATA_RX2P IDE_D4/GPIO19 AD21 T101
IDE_D5/GPIO20 AE20 T98
AD13 SATA_TX3P IDE_D6/GPIO21 AB20 T97 0 0 Samsung

SERIAL ATA
AE13 SATA_TX3N IDE_D7/GPIO22 AD19 T105
IDE_D8/GPIO23 AE19 T102
AB14 SATA_RX3N IDE_D9/GPIO24 AC20 T104
AC14 SATA_RX3P IDE_D10/GPIO25 AD20 T103 0 1 Qimonda
IDE_D11/GPIO26 AE21 T100
AE14 SATA_TX4P IDE_D12/GPIO27 AB22 T30
AD14 SATA_TX4N IDE_D13/GPIO28 AD22 T99
IDE_D14/GPIO29 AE23 T27 1 0 Hynix
AD15 SATA_RX4N IDE_D15/GPIO30 AC23 T95
AE15 SATA_RX4P
AB16 SATA_TX5P
1 1 no supprot side port
AC16 SATA_TX5N
SPI_DI/GPIO12 G6 T44
AE16 SATA_RX5N SPI_DO/GPIO11 D2 T116
AD16 SATA_RX5P SPI_CLK/GPIO47 D1 T118
R361 SPI_HOLD#/GPIO31 F4 T58

SPI ROM
C R256 1K/F_4 SATA_RBIAS_PN V12 F3 C
SATA_CAL SPI_CS#/GPIO32 T117
SATA_X1 Y12 U15 R258 *0_4/S
SATA_X1 LAN_RST#/GPIO13 BT_OFF# 29
J1 ROM_RST# +3VS5 R526 10K/F_4 SIDE_PORT_ID0 R527 *10K/F_4
ROM_RST#/GPIO14 T115
PLACE SATA_CAL SATA_X2 AA12 SATA_X2 SB_FANOUT0
M8
RES VERY CLOSE SB_SATA_LED# W 11
FANOUT0/GPIO3
M5 SB_FANOUT1
T41
R287 10K/F_4 SIDE_PORT_ID1 R294 *10K/F_4
SATA_ACT#/GPIO67 FANOUT1/GPIO48 T48 +3VS5
TO BALL OF SB700 PLVDD_SATA-- FANOUT2/GPIO49 M7 T47
SATA PLL +3V R257 10K/F_4
AA11 P5 SB_FANTACH0
NOTE:

SATA PWR
POWER +1.2V_PLLVDD_SATA PLLVDD_SATA FANIN0/GPIO50 T52
P8 SB_FANTACH1
FANIN1/GPIO51 T46
R361 IS 1K 1% FOR 25MHz +3V_XTLVDD_SATA W 12 R8 PORT_80_PWR_DWN
XTLVDD_SATA FANIN2/GPIO52 T49
XTAL, 4.99K 1% FOR 100MHz XTLVDD_SATA-- SATA C6 TEMP_COMM R267 *0_4/S
TEMP_COMM
INTERNAL CLOCK crystal power TEMPIN0/GPIO61 B6 TEMPIN0
T108 +3VS5 R272 *10K/F_4 BOARD_ID0 R271 10K/F_4
A6 TEMPIN1
TEMPIN1/GPIO62 T107
A5 MB_THRMDA_SB

HW MONITOR
TEMPIN2/GPIO63 T109
C501 B5 R261 10K/F_4 BOARD_ID1 R251 *10K/F_4
TEMPIN3/TALERT#/GPIO64 T110
SATA_X1
VIN0/GPIO53 A4
27P/50V_4 B4 R286 *0_4 R277 *10K/F_4 BOARD_ID2 R265 10K/F_4
VIN1/GPIO54 BT_COMBO_EN# 33
2

Y4 C4 SIDE_PORT_ID0
R246 VIN2/GPIO55 SIDE_PORT_ID1
VIN3/GPIO56 D4
25MHZ 10M_6 D5 BOARD_ID0 R278 *10K/F_4 BOARD_ID3 R266 10K/F_4
VIN4/GPIO57 BOARD_ID1
D6
1

C487 VIN5/GPIO58 BOARD_ID2


VIN6/GPIO59 A7
SATA_X2 B7 BOARD_ID3
VIN7/GPIO60
27P/50V_4 +3VS5

B 5mA +3V_VDD_HWM L47 *0_6/S B


AVDD F6

SB710 G7 C566 C561 AVDD--H/W monitor


+3V AVSS *0.1U/10V_4 *2.2U/6.3V_6 Analog power

ID3 ID2 ID1 ID0


Add for design
C500
+1.2V ( 1.2V @ 60mA) +1.2V_PLLVDD_SATA 0 0 0 0
0.1U/10V_4 77mA OP8 UMA
U12 L42
5

TC7SH08FU 0 0 0 1 OP9 UMA


2 SB_SATA_LED# BLM21PG221SN1D(220,100M,2A)_8
4 C495 C520
27 SATA_LED#
1 1U/10V_4 0.1U/10V_4 C510 C509 0 0 1 0 OP8 Dis
22U/6.3V_8 22U/6.3V_8
3

0 0 1 1 OP9 Dis
+3V 1mA
( 3.3V @ 1.2mA) +3V_XTLVDD_SATA 0 1 0 0
L41
BLM18PG181SN1D(180,1.5A)_6 0 1 0 1
C504
1U/10V_4 0 1 1 0
A A
Place near 0 1 1 1
ball

PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
SB700-ACPI/GPIO/USB 2/4
NB5/RD2
Date: Friday, March 20, 2009 Sheet 14 of 42
5 4 3 2 1
5 4 3 2 1

PLACE ALL THE DECOUPLING CAPS ON

15
THIS SHEET CLOSE TO SB AS POSSIBLE.

VDD-- S/B CORE power


U31C +1.2V_VCC_SB_R
VDDQ--3.3V I/O power 0.8A 604mA R179
L9
SB710 L15 2 1 *0_8/S U31E
+3V VDDQ_1 VDD_1 +1.2V
M9 VDDQ_2 Part 3 of 5 VDD_2 M12

1
T15 VDDQ_3 VDD_3 M14 SB710

1
C571 U9 N13 A2
VDDQ_4 VDD_4 VSS_1

CORE S0
C537 C551 C564 C556 C517 C528 C565 U16 P12 C498 C513 C506 C497 C408 A25
100U/6.3V_3528 VDDQ_5 VDD_5 VSS_2

PCI/GPIO I/O
2 10U/6.3V_8 1U/10V_4 1U/10V_4 1U/10V_4 U17 P14 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_8 B1

2
D
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDQ_6 VDD_6 VSS_3 D
V8 VDDQ_7 VDD_7 R11 VSS_4 D7
W7 VDDQ_8 VDD_8 R15 T10 AVSS_SATA_1 VSS_5 F20
Y6 VDDQ_9 VDD_9 T16 U10 AVSS_SATA_2 VSS_6 G19
AMD : Change from 1u to 0.1u AA4 AMD : Change from 1u to 0.1u U11 H8
VDDQ_10 AVSS_SATA_3 VSS_7
AB5 VDDQ_11 U12 AVSS_SATA_4 VSS_8 K9
1.8V : FLASH MEMORY MODE(DEFAULT) AB21 VDDQ_12
CKVDD_1.2V-- Internal V11 AVSS_SATA_5 VSS_9 K11
clock Generator I/O V14 K16
3.3V: IDE MODE +VDD33_18 +1.2V_CKVDD W9
AVSS_SATA_6 VSS_10
L4
power AMD : Change from inductance to short pad AVSS_SATA_7 VSS_11
VDD33_18--3.3V IDE I/O power Y9 AVSS_SATA_8 VSS_12 L7

R216 2
1.8V flash memory I/O power 0.45A 286mA Y11 AVSS_SATA_9 VSS_13 L10
+3V 1 *0_8/S Y20 VDD33_18_1 CKVDD_1.2V_1 L21 L38 *0_6/S +1.2V Y14 AVSS_SATA_10 VSS_14 L11
AA21 VDD33_18_2 CKVDD_1.2V_2 L22 Y17 AVSS_SATA_11 VSS_15 L12

IDE/FLSH I/O

CLKGEN I/O
AA22 VDD33_18_3 CKVDD_1.2V_3 L24 AA9 AVSS_SATA_12 VSS_16 L14
1

1
AE25 VDD33_18_4 CKVDD_1.2V_4 L25 AB9 AVSS_SATA_13 VSS_17 L16
C441 C465 C442 C460 C443 C474 C445 C427 C433 AB11 M6
*10U/6.3V_8 *1U/10V_4 *2.2U/6.3V_6 AVSS_SATA_14 VSS_18
AB13 M10
2

2
SI Remove R219 from AMD request *0.1U/10V_4*0.1U/10V_4 *0.1U/10V_4 *2.2U/6.3V_6 *0.1U/50V_6 *0.1U/50V_6 AVSS_SATA_15 VSS_19
AB15 AVSS_SATA_16 VSS_20 M11
AB17 AVSS_SATA_17 VSS_21 M13
AC8 AVSS_SATA_18 VSS_22 M15
AMD : Change from 1u to 0.1u AMD : Remove Cap for internal clock AD8 N4
AMD : Remove Cap for IDE mode AVSS_SATA_19 VSS_23
AE8 N12
+1.2V_PCIE_VDDR
POWER AVSS_SATA_20 VSS_24
VSS_25 N14
VSS_26 P6
PCIE_VDDR--PCIE I/O power 844mA VSS_27 P9
+1.2V L69 P18 S5_3.3--3.3v standby power P10
PCIE_VDDR_1 +3VALW_R VSS_28
P19 PCIE_VDDR_2 A15 AVSS_USB_1 VSS_29 P11
BLM18PG181SN1D(180,1.5A)_6 P20 0.01A R239 *0_6/S B15 P13

A-LINK I/O
PCIE_VDDR_3 AVSS_USB_2 VSS_30
1

1
P21 PCIE_VDDR_4 S5_3.3V_1 A17 +3VS5 C14 AVSS_USB_3 VSS_31 P15
C431 C466 C438 C473 C447 C437 R22 A24 D8 R1
10U/6.3V_8 1U/10V_4 1U/10V_4 1U/10V_4 PCIE_VDDR_5 S5_3.3V_2 Change to 0603 AVSS_USB_4 VSS_32
C R24 B17 D9 R2 C
2

2
PCIE_VDDR_6 S5_3.3V_3 AVSS_USB_5 VSS_33

1
0.1U/10V_4 0.1U/10V_4 R25 J4 D11 R4

3.3V_S5 I/O
PCIE_VDDR_7 S5_3.3V_4 C455 C563 C461 C448 AVSS_USB_6 VSS_34
S5_3.3V_5 J5 D13 AVSS_USB_7 VSS_35 R9
AMD : Change from 1u to 0.1u 0.1U/10V_4 0.1U/10V_4 2.2U/6.3V_6 10U/6.3V_8

GROUND
L1 D14 R10

2
S5_3.3V_6 AVSS_USB_8 VSS_36
S5_3.3V_7 L2 D15 AVSS_USB_9 VSS_37 R12
+1.2V_AVDD_SATA E15 R14
AMD : Change from 1u to 0.1u AVSS_USB_10 VSS_38
AVDD_SATA--SATA phy power 0.2A F12 AVSS_USB_11 VSS_39 T11
+1.2V L70 AA14 S5_1.2V--1.2V standby power F14 T12
AVDD_SATA_1 AVSS_USB_12 VSS_40
AB18 AVDD_SATA_4 G9 AVSS_USB_13 VSS_41 T14
BLM18PG181SN1D(180,1.5A)_6 AA15 0.22A H9 U4

SATA I/O
AVDD_SATA_2 AVSS_USB_14 VSS_42
1

AA17 AVDD_SATA_3 S5_1.2V_1 G2 +1.2V_S5 H17 AVSS_USB_15 VSS_43 U14

CORE S5
C816 C812 C818 C817 C813 AC18 G4 J9 V6
AVDD_SATA_5 S5_1.2V_2 AVSS_USB_16 VSS_44

1
22U/6.3V_8 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 AD17 J11 Y21
2

AVDD_SATA_6 C827 C825 AVSS_USB_17 VSS_45


AE17 AVDD_SATA_7 J12 AVSS_USB_18 VSS_46 AB1
0.2A 1U/10V_4 1U/10V_4 J14 AB19

2
AVSS_USB_19 VSS_47
USB_PHY_1.2V_1 A10 +1.2V_USB_PHY_R J15 AVSS_USB_20 VSS_48 AB25
USB_PHY_1.2V_2 B10 K10 AVSS_USB_21 VSS_49 AE1
K12 AVSS_USB_22 VSS_50 AE24
AMD : Change from 1u to 0.1u K14
+3V_AVDD_USB AVSS_USB_23
For support USB K15 AVSS_USB_24
wakeup-->3V_S5 AVDDTX--USB Phy PCIE_CK_VSS_9 P23
Analog I/O power V5_VREF--PCI 5V TOLERANCE PCIE_CK_VSS_10 R16

L40
0.2A +5V_VREF
4mA R479 PCIE_CK_VSS_11 R19
+3VS5 A16 AVDDTX_0 V5_VREF AE7 1 2 1K/F_4 +5V PCIE_CK_VSS_12 T17
B16 AVDDTX_1 PCIE_CK_VSS_13 U18
BLM18PG181SN1D(180,1.5A)_6 C16 J16 +3V_AVDDCK 7mA H18 U20
AVDDTX_2 AVDDCK_3.3V PCIE_CK_VSS_1 PCIE_CK_VSS_14
1

D16 AVDDTX_3 1 2 +3V J17 PCIE_CK_VSS_2 PCIE_CK_VSS_15 V18

1
C493 C484 C814 C483 D17 K17 +1.2V_AVDDCK 44mA D27 J22 V20
10U/6.3V_8 10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 AVDDTX_4 PLL AVDDCK_1.2V C823 CH501H-40PT PCIE_CK_VSS_3 PCIE_CK_VSS_16
E17 K25 V21
2

AVDDTX_5 1U/10V_4 PCIE_CK_VSS_4 PCIE_CK_VSS_17


USB I/O

F15 E9 +3V_AVDDC M16 W 19

2
B AVDDRX_0 AVDDC PCIE_CK_VSS_5 PCIE_CK_VSS_18 B
F17 AVDDRX_1 M17 PCIE_CK_VSS_6 PCIE_CK_VSS_19 W 22
F18 AVDDRX_2 16mA M21 PCIE_CK_VSS_7 PCIE_CK_VSS_20 W 24
G15 AVDDRX_3 P16 PCIE_CK_VSS_8 PCIE_CK_VSS_21 W 25
G17 AVDDRX_4
G18 AVDDRX_5 F9 AVSSC AVSSCK L17
Part 5 of 5
1

SB710 SB710
C482 C503 C811 C477 C476 C478 C502
1U/10V_4 1U/10V_4 1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
2

+3VS5 +3V_AVDDC
+1.2V_S5 +1.2V_USB_PHY_R AVDDC--USB Analog PLL power
L44
R262 *0_6/S USB_PHY_1.2V--USB Phy BLM18PG181SN1D(180,1.5A)_6
digital power

1
C505 C496
1

0.1U/10V_4 10U/6.3V_8

2
C507 C508 C499
0.1U/10V_4 0.1U/10V_4 10U/6.3V_8
2

A +1.2V A
+1.2V_AVDDCK +3V +3V_AVDDCK
AVDDCK_1.2--USB Phy AVDDCK_3.3--Analog
digital power system PLL power
L39 L43
BLM18PG181SN1D(180,1.5A)_6 BLM18PG181SN1D(180,1.5A)_6
1

C480 C486 PROJECT : OP8


2.2U/6.3V_6 2.2U/6.3V_6 Quanta Computer Inc.
2

Size Document Number Rev


Custom 1A
SB700-PWR/DECOUPLING 4/4
NB5/RD2
Date: Friday, March 20, 2009 Sheet 15 of 42
5 4 3 2 1
5 4 3 2 1

OVERLAP COMMON PADS WHERE


POSSIBLE FOR DUAL-OP RESISTORS. 16
It must ready
refore RSMRST# REQUIRED STRAPS +3VS5

1
D +3V +3V +3VS5 D

R211
2.2K_4

2
1

1
intermal have pull
Hi 10K , confirm AMD
R500 R501 R337
10K/F_4 10K/F_4 *10K/F_4 ward this pull Hi
not need 13 SB_GPIO17
13 SB_GPIO16

2
12 PCI_CLK_TPM 12 PCI_CLK4 12 LPC_CLK0 12 RTC_CLK

1
12 PCI_CLK3 12 PCI_CLK5 12 LPC_CLK1 13 ACZ_RST#
GPIO16 R214 R242
*2.2K_4 2.2K_4 GPIO17

2
1

1
1

1
R504
10K/F_4 R304
R503 R499 R502 R221 R203 10K/F_4 TYPE GPIO16 GPIO17
2

10K/F_4 *10K/F_4 *10K/F_4 10K/F_4 10K/F_4

2
2

2
FWH L : 2.2K L : 2.2K
pull down pull down
PCI_CLK_TPM PCI_CLK3 PCI_CLK4 PCI_CLK5 LPC_CLK0 LPC_CLK1 RTC_CLK AZ_RST#
LPC NC L : 2.2K
C
pull down C
PULL BOOTFAIL USE RESERVED RESERVED IMC CLKGEN INTERNAL ENABLE PCI
HIGH TIMER DEBUG ENABLED ENABLED RTC ROM BOOT
L : 2.2K
ENABLED STRAPS SPI NC
pull down
DEFAULT

EXT. RTC
PULL BOOTFAIL IGNORE IMC CLKGEN (PD on X1, DISABLE PCI
LOW TIMER DEBUG DISABLED DISABLED apply ROM BOOT RSVD NC NC
DISABLED STRAPS 32KHz to DEFAULT
DEFAULT DEFAULT DEFAULT DEFAULT RTC_CLK)

NB_PWRGD_IN:
RS780/RX780 = 1.8V; RS740 = 3.3V
DEBUG STRAPS Do NOT share it with SB_PWRGD when use Internal Clk Gen
(Need SB PLL initialize firstly)
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
+3VS5 R292 10K/F_4 R281 *0_4/S SB_PWRGD_IN
SB_PWRGD_IN 13

C555 NB/SB POWER GOOD CIRCUIT


*2.2U/6.3V_6 +1.8V
12 AD28 +1.8V
B
12 AD27 B
12 AD26
12 AD25 U13 R269
12 AD24 1 5 C519 *0.1U/10V_4 300_4
NC VCC
12 AD23
2 2 RX780,RS780
36 VRM_PWRGD A
1

3 3 4 R274 *33_4 NB_PWRGD_IN


GND Y NB_PWRGD_IN 10
R496 R484 R497 R491 R485 R498
*2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 Use 2.2K PD. 1 *NL17SZ17DFT2G
5,32 ECPWROK
SOT-353
2

D17 SI remove R260


BAT54A

WD_PWRGD 13

PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

USE USE PCI USE ACPI USE IDE USE DEFAULT RESERVED
PULL LONG PLL BCLK PLL PCIE STRAPS
HIGH RESET
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT

PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM


AL17SZ17000 IC(5P) NL17SZ17DFT2G(SOT-353) SOT-353
LOW SHORT PCI PLL ACPI PLL PCIE STRAPS
A RESET BCLK ALUC1G17000 IC OTHER(5P) SN74AUC1G17DBVR(SOT23-5) SOT23-5 A

PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
SB700-STRAPS
NB5/RD2
Date: Friday, March 20, 2009 Sheet 16 of 42
5 4 3 2 1
5 4 3 2 1

17
POWER
+PCIE_VDDR=1.2V U22G

U22A +VDD_MEM1.8V=1.8V DP E/F POWER DP A/B POWER


+VGA_CORE=0.9~1.2V
+1.8V_DPE_VDD18 AG15 AE11 +1.8V
DPE_VDD18#1 NC_DPA_VDD18#1
AG16 DPE_VDD18#2 NC_DPA_VDD18#2 AF11

2.5GT/s bit rate


PEG_TX0 AF30 AH30 C_PEG_RXP0 C92 0.1U/10V_4 +1.1V_DPE_VDD10 AG20 AF6 +1.1V_DPB_VDD10
9 PEG_TX0 PCIE_RX0P PCIE_TX0P PEG_RX0 9 DPE_VDD10#1 DPA_VDD10#1
PEG_TX#0 AE31 AG31 C_PEG_RXN0 C84 0.1U/10V_4 AG21 AF7
9 PEG_TX#0 PCIE_RX0N PCIE_TX0N PEG_RX#0 9 DPE_VDD10#2 DPA_VDD10#2
D D
PEG_TX1 AE29 AG29 C_PEG_RXP1 C94 0.1U/10V_4 AG14 AE1
9 PEG_TX1 PEG_TX#1 PCIE_RX1P PCIE_TX1P C_PEG_RXN1 PEG_RX1 9 DPE_VSSR#1 DPA_VSSR#1
AD28 AF28 C99 0.1U/10V_4 AH14 AE3
9 PEG_TX#1 PCIE_RX1N PCIE_TX1N PEG_RX#1 9 DPE_VSSR#2 DPA_VSSR#2
AM14 DPE_VSSR#3 DPA_VSSR#3 AG1
AM16 DPE_VSSR#4 DPA_VSSR#4 AG6
PEG_TX2 AD30 AF27 C_PEG_RXP2 C100 0.1U/10V_4 AM18 AH5
9 PEG_TX2 PCIE_RX2P PCIE_TX2P PEG_RX2 9 DPE_VSSR#5 DPA_VSSR#5
PEG_TX#2 AC31 AF26 C_PEG_RXN2 C112 0.1U/10V_4
9 PEG_TX#2 PCIE_RX2N PCIE_TX2N PEG_RX#2 9
1.1V(S100,D200mA)
PEG_TX3 AC29 AD27 C_PEG_RXP3 C83 0.1U/10V_4 +1.8V_DPE_VDD18 AF16 AE13 +1.8V
9 PEG_TX3 PCIE_RX3P PCIE_TX3P PEG_RX3 9 DPF_VDD18#1 NC_DPB_VDD18#1
PEG_TX#3 AB28 AD26 C_PEG_RXN3 C82 0.1U/10V_4 AG17 AF13
9 PEG_TX#3 PCIE_RX3N PCIE_TX3N PEG_RX#3 9 DPF_VDD18#2 NC_DPB_VDD18#2
BLM18PG181SN1D(180,1.5A)_6
PEG_TX4 AB30 AC25 C_PEG_RXP4 C134 0.1U/10V_4 +1.1V_DPB_VDD10 L59
9 PEG_TX4 PCIE_RX4P PCIE_TX4P PEG_RX4 9 +1.1V

PCI EXPRESS INTERFACE


PEG_TX#4 AA31 AB25 C_PEG_RXN4 C146 0.1U/10V_4 AF22 AF8
9 PEG_TX#4 PCIE_RX4N PCIE_TX4N PEG_RX#4 9 +1.1V_DPE_VDD10 DPF_VDD10#1 DPB_VDD10#1
AG22 AF9 C677 C698 C118
DPF_VDD10#2 DPB_VDD10#2 10U/6.3V_8
PEG_TX5 AA29 Y23 C_PEG_RXP5 C120 0.1U/10V_4 0.1U/10V_4 1000P/50V_4
9 PEG_TX5 PCIE_RX5P PCIE_TX5P PEG_RX5 9
PEG_TX#5 Y28 Y24 C_PEG_RXN5 C131 0.1U/10V_4 AF23 AF10
9 PEG_TX#5 PCIE_RX5N PCIE_TX5N PEG_RX#5 9 DPF_VSSR#1 DPB_VSSR#1
AG23 DPF_VSSR#2 DPB_VSSR#2 AG9
AM20 DPF_VSSR#3 DPB_VSSR#3 AH8
PEG_TX6 Y30 AB27 C_PEG_RXP6 C153 0.1U/10V_4 AM22 AM6
9 PEG_TX6 PCIE_RX6P PCIE_TX6P PEG_RX6 9 DPF_VSSR#4 DPB_VSSR#4
PEG_TX#6 W 31 AB26 C_PEG_RXN6 C156 0.1U/10V_4 AM24 AM8
9 PEG_TX#6 PCIE_RX6N PCIE_TX6N PEG_RX#6 9 DPF_VSSR#5 DPB_VSSR#5

PEG_TX7 W 29 Y27 C_PEG_RXP7 C164 0.1U/10V_4


9 PEG_TX7 PCIE_RX7P PCIE_TX7P PEG_RX7 9
PEG_TX#7 V28 Y26 C_PEG_RXN7 C171 0.1U/10V_4
9 PEG_TX#7 PCIE_RX7N PCIE_TX7N PEG_RX#7 9
R51 150/F_4 AF17 AE10 R63 150/F_4
DPEF_CALR DPAB_CALR
C PEG_TX8 V30 W 24 C_PEG_RXP8 C187 0.1U/10V_4 C
9 PEG_TX8 PCIE_RX8P PCIE_TX8P PEG_RX8 9
PEG_TX#8 U31 W 23 C_PEG_RXN8 C199 0.1U/10V_4
9 PEG_TX#8 PCIE_RX8N PCIE_TX8N PEG_RX#8 9
+1.8V_DPE_PVDD AG18 DP PLL POWER AG8 +1.8V_DPA_PVDD
+1.8V_DPE_PVDD DPE_PVDD DPA_PVDD +1.8V_DPA_PVDD
AF19 DPE_PVSS DPA_PVSS AG7
PEG_TX9 U29 V27 C_PEG_RXP9 C183 0.1U/10V_4
9 PEG_TX9 PCIE_RX9P PCIE_TX9P PEG_RX9 9
PEG_TX#9 T28 U26 C_PEG_RXN9 C172 0.1U/10V_4
9 PEG_TX#9 PCIE_RX9N PCIE_TX9N PEG_RX#9 9
+1.8V_DPE_PVDD AG19 AG10 +1.8V_DPA_PVDD
+1.8V_DPE_PVDD NC_DPF_PVDD DPB_PVDD +1.8V_DPA_PVDD
PEG_TX10 T30 U24 C_PEG_RXP10 C210 0.1U/10V_4 AF20 AG11
9 PEG_TX10 PCIE_RX10P PCIE_TX10P PEG_RX10 9 NC_DPF_PVSS DPB_PVSS
PEG_TX#10 R31 U23 C_PEG_RXN10 C223 0.1U/10V_4
9 PEG_TX#10 PCIE_RX10N PCIE_TX10N PEG_RX#10 9

PEG_TX11 R29 T26 C_PEG_RXP11 C225 0.1U/10V_4 M92-S2


9 PEG_TX11 PCIE_RX11P PCIE_TX11P PEG_RX11 9
PEG_TX#11 P28 T27 C_PEG_RXN11 C234 0.1U/10V_4
9 PEG_TX#11 PCIE_RX11N PCIE_TX11N PEG_RX#11 9

PEG_TX12 P30 T24 C_PEG_RXP12 C236 0.1U/10V_4


9 PEG_TX12 PCIE_RX12P PCIE_TX12P PEG_RX12 9
PEG_TX#12 N31 T23 C_PEG_RXN12 C246 0.1U/10V_4
9 PEG_TX#12 PCIE_RX12N PCIE_TX12N PEG_RX#12 9

PEG_TX13 N29 P27 C_PEG_RXP13 C249 0.1U/10V_4 +1.1V_DPE_VDD10


9 PEG_TX13 PCIE_RX13P PCIE_TX13P PEG_RX13 9 +1.8V_DPA_PVDD
PEG_TX#13 M28 P26 C_PEG_RXN13 C253 0.1U/10V_4 1.1V(S100,D200mA)
9 PEG_TX#13 PCIE_RX13N PCIE_TX13N PEG_RX#13 9
1.8V(40mA)
+1.1V_DPE_VDD10 L51 +1.8V_DPA_PVDD L54
+1.1V +1.8V
PEG_TX14 M30 P24 C_PEG_RXP14 C269 0.1U/10V_4 C658 C663
9 PEG_TX14 PCIE_RX14P PCIE_TX14P PEG_RX14 9
PEG_TX#14 L31 P23 C_PEG_RXN14 C270 0.1U/10V_4 BLM18PG181SN1D(180,1.5A)_6 BLM18PG181SN1D(180,1.5A)_6
9 PEG_TX#14 PCIE_RX14N PCIE_TX14N PEG_RX#14 9
C114 C104 C648 0.1U/10V_4 1000P/50V_4 C649
10U/6.3V_8 10U/6.3V_8
PEG_TX15 L29 M27 C_PEG_RXP15 C256 0.1U/10V_4 0.1U/10V_4 1000P/50V_4
9 PEG_TX15 PCIE_RX15P PCIE_TX15P PEG_RX15 9
PEG_TX#15 K30 N26 C_PEG_RXN15 C264 0.1U/10V_4
B 9 PEG_TX#15 PCIE_RX15N PCIE_TX15N PEG_RX#15 9 B

CLOCK +1.8V_DPE_PVDD
EXT_GFX_CLKP AK30 1.8V(20mA) SI remove DPB power source
2 EXT_GFX_CLKP PCIE_REFCLKP
EXT_GFX_CLKN AK32 +1.8V_DPE_PVDD L10
2 EXT_GFX_CLKN PCIE_REFCLKN +1.8V
C54 C53
BLM18PG181SN1D(180,1.5A)_6
CALIBRATION 0.1U/10V_4 1000P/50V_4 C52
L9 Y22 M72_PCIE_CALRP R72 1.27K/F_4 10U/6.3V_8
NC#1 PCIE_CALRP
SI Add N9 NC#2
10K/F_4 1 2 R533 N10 AA22 M72_PCIE_CALRN R71 2K/F_4 +1.1V_PCIE_VDDC
NC_PW RGOOD PCIE_CALRN

12 PCIE_RST# AL27 PERSTB


1.8V -(300mA)
+1.8V_DPE_VDD18 L12 +1.8V
M92-S2 C111 C56
100MHz (+/-300ppm) input frequency, C103
0-0.7V single-ended swing 0.1U/10V_4 1U/10V_4 10U/6.3V_8 BLM18PG181SN1D(180,1.5A)_6

VGA Core BPP


VGA Core VDDC

+1.8V PCIE_VDDR
A A
+1.8V PCIE_PVDD
+1.8V VDDR1

PROJECT : OP8
Quanta Computer Inc.
3.3V_Delay VDDR3
Size Document Number Rev
20ms 20ms Custom 1A
M7X/M8X_PCIE_Interface
NB5/RD2
Date: Friday, March 20, 2009 Sheet 17 of 42
5 4 3 2 1
5 4 3 2 1

U22B

R414 10K/F_4

GPIO22(ROMCS#)
GPIO22
AE9
L9
N9
AE8
M93-S3/M92-S2
DVCNTL_0/ DVPDATA_18
DVCNTL_1 / NC
DVCNTL_2 / NC
DVDATA_12 / DVPDATA_16 DPA
TXCAP_DPA3P
TXCAM_DPA3N

TX0P_DPA2P
TX0M_DPA2N
AF2
AF4

AG3
AG5
+1.8V_AVDD_Q

+1.8V_AVDD_Q
1.8V(70mA)
L57
+1.8V
18
PD without external VBIOS ROM BLM18PG181SN1D(180,1.5A)_6
AH3
TX1P_DPA1P C674 C673 C659
AD7 AH1
DVDATA_9 / DVPDATA_12 TX1M_DPA1N 10U/6.3V_8
AC8
DVDATA_8 / DVPDATA_14 0.1U/10V_4 1U/10V_4
AC7 AK3
DVDATA_7 / DVPCNTL_0 TX2P_DPA0P
AB9 AK1
DVDATA_6 / DVPDATA_8 TX2M_DPA0N
AB8
DVDATA_5 / DVPDATA_6 TXC_HDMI_L+
AB7 AK5 TXC_HDMI_L+ 25
D DVDATA_4 DVPDATA_4 TXCBP_DPB3P TXC_HDMI_L- D
AB4 AM3 TXC_HDMI_L- 25
DVDATA_3 / DVPDATA_19 TXCBM_DPB3N
Y8 AK6 TX0_HDMI_L+
DVDATA_1 / DVPDATA_2 TX3P_DPB2P TX0_HDMI_L+ 25 +1.8V_A2VDD_Q
Y7 AM5 TX0_HDMI_L-
+VDDR4 DVDATA_0 / DVPDATA_0 TX3M_DPB2N TX0_HDMI_L- 25
Memory ID DPB 1.8V(70mA)
DVO AJ7 TX1_HDMI_L+
R401 TX4P_DPB1P TX1_HDMI_L+ 25
*10K/F_4 MEM_ID3 AC5 AH6 TX1_HDMI_L- +1.8V_A2VDD_Q L52
DPC_VDD18#2/DVPDAT23 TX4M_DPB1N TX1_HDMI_L- 25 +1.8V
R406 *10K/F_4 MEM_ID2 AC10
R402 *10K/F_4 MEM_ID1 DVDATA_10 / DVPDATA_22 TX2_HDMI_L+ BLM18PG181SN1D(180,1.5A)_6
MEM_ID[3:0] Vendor Type Vendor P/N AB2
DVDATA_2 / DVPDATA_21 TX5P_DPB0P
AK8 TX2_HDMI_L+ 25
R405 *10K/F_4 MEM_ID0 AD9 AL7 TX2_HDMI_L- C650 C124 C651
DVDATA_11 / DVPDATA_20 TX5M_DPB0N TX2_HDMI_L- 25
0000 Hynix 64*16-500MHZ H5P51G63EFR-20L 10U/6.3V_8
0001 Samsung (E die) 64*16-500MHZ K4N1G164QE-HC20 M93-S3/M92-S2 0.1U/10V_4 1U/10V_4
0010 Qimonda (Infineon) 64*16-500MHZ TBD W6
DPC_PVDD / DVPDATA_11
0011 Reserved M92-S2/M93-S3
0100 Reserved DVPDATA_3/TXCCP_DPC3P
V4
0101 Reserved AC6
DPC_VDD18#1/DVPDAT10 DVPCNTL_2/TXCCM_DPC3N
U5
0110 Reserved
0111 Reserved DVPDATA_7 / TX0P_DPC2P
W3
+VDDD1
1000 Reserved AA5
DPC_VDD10#1/DVPDAT15 DVPDATA_1 / TX0M_DPC2N
V2
1001 Reserved AA6
DPC_VDD10#2/DVPDAT17 1.8V(45mA VDD1DI)
1010 Reserved DVPCNTL_MV1 / TX1P_DPC1P
Y4
1011 Reserved W5 M92-S2: Use 0R to VDDR4 +VDDD1 L49
DVPDATA_9 / TX1M_DPC1N +1.8V
1100 Reserved
1101 Reserved U1 AA3 BLM18PG181SN1D(180,1.5A)_6
DPC_VSSR#1 / DVPCLK DVPDATA_13 / TX2P_DPC0P C632 C654 C641
1110 Reserved W1
DPC_VSSR#2 / DVPDAT5 DVPCNTL_1 / TX2M_DPC0N
Y2
+VDDR4
1111 Reserved 10U/6.3V_8
AA12 R69 0_4 0.1U/10V_4 1U/10V_4
VDDR4 / DPCD_CALR
AA1
DPC_VSSR#5/ DVPCNTL_MV0

PWRCNTL1 PWRCNTL0 V-CORE DPC


+VDDD2
1.8V(45mA VDD1DI)
H 0 0 1.1V 10,23 EDIDCLK R1
SCL
R3 I2C +VDDD2 L9
10,23 EDIDDATA SDA +1.8V
L_CRT_R R380 150/F_4
C AM26 L_CRT_R R56 0_4 BLM18PG181SN1D(180,1.5A)_6 C
M 0 1 1.0V GENERAL PURPOSE I/O R
RB
AK26
CRT_R 10,24
C113 C48 C46
19 GPIO0 GPIO0 U6 L_CRT_G R379 150/F_4 10U/6.3V_8
GPIO1 GPIO_0 L_CRT_G R47 0_4 0.1U/10V_4 1U/10V_4
19 GPIO1 U10 AL25 CRT_G 10,24
GPIO2 GPIO_1 G
T10 AJ25
M 1 0 1.0V 19 GPIO2
T9
GPIO3 U8
GPIO_2
GPIO_3_SMBDATA
GB L_CRT_B R378 150/F_4
GPIO4 U7 AH24 L_CRT_B R44 0_4
T7 GPIO_4_SMBCLK B CRT_B 10,24
GPIO5 T9 AG25
19 GPIO5 GPIO_5_AC_BATT BB
L 1 1 0.9V T8
GPIO_6 DAC1
10,23 LVDS_BLON R59 0_4 EXT_LVDS_BLON T7 AH26
GPIO_7_BLON HSYNC HSYNC_COM 10,19,24
19 GPIO8 GPIO8 P10 AJ27
GPIO_8_ROMSO VSYNC VSYNC_COM 10,19,24
GPIO9 P4
19 GPIO9 GPIO_9_ROMSI
GPIO10 P2
T70 GPIO_10_ROMSCK
GPIO11 N6 AD22 R61 499/F_4
19 GPIO11 GPIO_11 RSET
GPIO12 N5
BBEN BBP 19 GPIO12
19 GPIO13
GPIO13 N3
GPIO_12
GPIO_13 AVDD
AG24 +1.8V_AVDD_Q +1.8V_AVDD_Q
T3 HDMI_HP2 Y9 AE22 C672
GFX_CORE_CNTRL0 GPIO_14_HPD2 AVSSQ
38 GFX_CORE_CNTRL0 N1
OSC_SPREAD GPIO_15_PWRCNTL_0 +VDDD1 0.1U/10V_4
M4 AE23
L 0 V-CORE 2 OSC_SPREAD
VGA_ALERT R6
GPIO_16_SSIN
GPIO_17_THERMAL_INT
VDD1DI
VSS1DI
AD23 C628
+VDDD1
HPD3 W10
T6 GPIO_18_HPD3
TEMP_FAIL M2 M92-S2/M93-S3 0.1U/10V_4
H 1 +1.8V 5 TEMP_FAIL
38 GFX_CORE_CNTRL1 GFX_CORE_CNTRL1 P8
GPIO_19_CTF
GPIO_20_PWRCNTL_1 R2 / NC
AM12
20 BBEN BBEN P7 AK12 C657 *22P/50V_4 EVGA-XTALI
GPIO22 GPIO_21_BB_EN R2B / NC
19 GPIO22 N8
GPIO_22_ROMCSB

1
GPIO_23_CLKREQb N7 AL11
GPIO_23_CLKREQB G2 / NC Y7 R388
T11
GPIO_29 G2B / NC
AJ11
*27MHZ *10M_6
For Int Clk 27Mhz
SI Add GND from Check list R11
GPIO_30 CL=20PF
AK10

2
B2 / NC
T11 L6 AL9
JTAG_TRSTB B2B / NC C656 EVGA-XTALO
T10 L5
JTAG_TDI *22P/50V_4
T71 L3
JTAG_TCK
T72 L1 AH12
JTAG_TMS C / NC
T73 K4
JTAG_TDO DAC2 Y / NC
AM10
Need check again R52 5.11K/F_4 AF24 AJ9
TESTEN COMP / NC
SI Add GND from Check list
TESTEN AB13
*10K/F_4 T120 GENERICA
+3V_DELAY R60 LVDS_BLON W8 AL13 DAC2_VSY
B GENERICB H2SYNC DAC2_VSY 19 B
GENERICC W9 AJ13 DAC2_HSY
19 GENERICC GENERICC V2SYNC DAC2_HSY 19 +VDDD2
W7
R417 10K/F_4 GPIO_23_CLKREQb 150 OHM GENERICD
+3V_DELAY 10,25 TMDS_HPD AD10
GENERICE_HPD4 +VDDD2
AD19
*100K/F_4 R65 TMDS_HPD VDD2DI / NC C49
AC14 AC19
HPD1 VSS2DI / NC
+1.8V
1.8V+R6043(249R)=1.8V/3=0.6V
0.1U/10V_4 Thermal Sensor 781-1_3V R39 200/F_6
AE20 +3V_DELAY +3V_DELAY
R33 499/F_4 A2VDD / NC
+1.8V_A2VDD_Q C162 U3 C64 0.1U/10V_4
AE17 +1.8V_A2VDD_Q
R66 249/F_4 +0.6V_M92_VREFG A2VDDQ / NC 0.1U/10V_4 R55 *0_4/S MB_CLK2
AC16 5,32 MBCLK2 8 1
VREFG SMCLK VCC VGATHRM+
AE19
A2VSSQ R54 *0_4/S MB_DATA2
5,32 MBDATA2 7 2
SMDATA DXP C78
1.8V(120mADPLL_PVDD)
BLM18PG181SN1D(180,1.5A)_6 C58 0.1U/10V_4
R2SET / NC
AG13 R50 715/F_4
+3V_DELAY
R53 10K/F_4 VGA_ALERT 6
-ALT DXN
3 2200P/50V_4 w/s 10 / 10
+1.8V
L53 5 4 VGATHRM-
C644 DDC/AUX GND -OVT
C652 C110 AE6 HDMI_SCL 25 G781-1P8@EV
10U/6.3V_8 1U/10V_4 0.1U/10V_4 PLL/CLOCK DDC1CLK -VGATHRM
AE5 HDMI_SDA 25 +3V_DELAY
+1.8V_DPLL_PVDD DDC1DATA R42 10K/F_4
AF14
DPLL_PVDD I2C ADDRESS: 9AH
AE14 AD2 T67
DPLL_PVSS AUX1P
AD4 T2
BLM18PG181SN1D(180,1.5A)_6 AUX1N
+1.1V L8 +1.1V_DPLL_VDDC AD14 AC11
DPLL_VDDC DDC2CLK
AC13
C59 C51 C123 DDC2DATA
1.1V(300mA DPLL_VDDC)
10U/6.3V_8 1U/10V_4 0.1U/10V_4 EVGA-XTALI AM28 AD13
2 EVGA-XTALI XTALIN AUX2P
EVGA-XTALO AK28 AD11
XTALOUT AUX2N
AE16
DDCCLK_AUX5P
AD16
DDCDATA_AUX5N
BLM18PG181SN1D(180,1.5A)_6 1.8V(20mA TSVDD) AC1 DDCCLK 10,24
VGATHRM+ DDC6CLK
+1.8V T4 AC3 DDCDATA 10,24
L11 VGATHRM- DPLUS THERMAL DDC6DATA
T2
DMINUS
AD20
C55 C61 C143 DDCCLK_AUX3P
A AC20 A
DDCDATA_AUX3N
R5
10U/6.3V_8 1U/10V_4 0.1U/10V_4 +1.8V_TSVDD TS_FDO
AD17 AB22 T121
TSVDD NC#1
AC17
TSVSS NC#2
AC22 T122 SI Add from AMD check list

M92-S2
PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
M7X/M8X_Main
NB5/RD2
Date: Friday, March 20, 2009 Sheet 18 of 42
5 4 3 2 1
5 4 3 2 1

AA27
AB24
AB32
U22E

PCIE_VSS#1
PCIE_VSS#2
GND#1
GND#2
A3
A30
AA13
U22F

LVDS CONTROL
VARY_BL AB11
AB12
R40

0_4
0_4
10K/F_4

R37
R43
DPST_PWM 10,23 Strap Name Pin Straps description
19
Default Value
PCIE_VSS#3 GND#3 DIGON DISP_ON 10,23
AC24 PCIE_VSS#4 GND#4 AA16 Transmitter Power Savings Enable
AC26 AB10 TX_PWRS_ENB GPIO0
AC27
PCIE_VSS#5
PCIE_VSS#6
GND#5
GND#6 AB15
0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop) 1
AD25 PCIE_VSS#7 GND#7 AB6
AD32 AC9 AH20 EXT_TXUCLKOUT+ 23
PCI Express Transmitter De-emphasis Enable
D PCIE_VSS#8 GND#8 TXCLK_UP_DPF3P D
AE27 AD6 AJ19 TX_DEEMPH_EN GPIO1
AF32
PCIE_VSS#9
PCIE_VSS#10
GND#9
GND#10 AD8
TXCLK_UN_DPF3N EXT_TXUCLKOUT- 23 0: Tx de-emphasis disabled for mobile mode
1: Tx de-emphasis enabled (Default setting for Desktop) 1
AG27 PCIE_VSS#11 GND#11 AE7 TXOUT_U0P_DPF2P AL21 EXT_TXUOUT0+ 23
AH32 AG12 AK20 0 = Advertises the PCI-E device as 2.5 GT/s capable at power-on.
PCIE_VSS#12 GND#12 TXOUT_U0N_DPF2N EXT_TXUOUT0- 23 1 = Advertises the PCI-E device as 5.0 GT/s capable at power-on.
K28 AH10 BIF_GEN2_EN GPIO2
K32
PCIE_VSS#13
PCIE_VSS#14
GND#13
GND#14 AH28 TXOUT_U1P_DPF1P AH22 EXT_TXUOUT1+ 23
5.0 GT/s capability will be controlled by software. 0
L27 PCIE_VSS#15 GND#15 B10 TXOUT_U1N_DPF1N AJ21 EXT_TXUOUT1- 23
M32 B12 Enable CLKREQ# Power Management
PCIE_VSS#16 GND#16
N25 B14 AL23 STRAP_BIF_CLK_PM_EN GPIO8
N27
PCIE_VSS#17
PCIE_VSS#18
GND#17
GND#18 B16
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N AK22
EXT_TXUOUT2+ 23
EXT_TXUOUT2- 23
0 - CLKREQ# power management capability is disabled
1 - CLKREQ# power management capability is enabled
0
P25 PCIE_VSS#19 GND#19 B18
P32 PCIE_VSS#20 GND#20 B20 TXOUT_U3P AK24
R27 B22 AJ23 BIOS_ROM_EN GPIO22 Enable external BIOS ROM device
T25
PCIE_VSS#21
PCIE_VSS#22
GND#21
GND#22 B24
TXOUT_U3N 0 - Disable external BIOS ROM device
external BIOS ROM device
1 - Enable 0
T32 PCIE_VSS#23 GND#23 B26
U25 B6 LVTMDP
PCIE_VSS#24 GND#24
U27 PCIE_VSS#25 GND#25 B8
V32 PCIE_VSS#26 GND#26 C1 TXCLK_LP_DPE3P AL15 EXT_TXLCLKOUT+ 23
W 25 PCIE_VSS#27 GND#27 C32 TXCLK_LN_DPE3N AK14 EXT_TXLCLKOUT- 23
W 26 E28 AUDIO[0] VSYNC
W 27
PCIE_VSS#28
PCIE_VSS#29
GND#28
GND#29 F10 TXOUT_L0P_DPE2P AH16 EXT_TXLOUT0+ 23
1
Y25 PCIE_VSS#30 GND#30 F12 TXOUT_L0N_DPE2N AJ15 EXT_TXLOUT0- 23
Y32 PCIE_VSS#31 GND#31 F14
F16 AL17 AUD(1) HSYNC HSYNC - HDMI_EN
GND#32
GND#33 F18
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N AK16
EXT_TXLOUT1+ 23
EXT_TXLOUT1- 23
HDMI connector presence. 0 ?No HDMI connector is present on PCB 1
- HDMI connector is present on the PCB HDMI
1
GND#34 F2
GND#35 F20 TXOUT_L2P_DPE0P AH18 EXT_TXLOUT2+ 23
M6 GND#56 GND#36 F22 TXOUT_L2N_DPE0N AJ17 EXT_TXLOUT2- 23
N11 F24 If VIP_DEVICE_STRAP_EN is set to ?? then this pin
GND#57 GND#37 is used to sense whether a VIP slave device is connected to the
C N12 GND#58 GND#38 F26 TXOUT_L3P AL19 VIP_DEVICE_STRAP_DIS C
N13 F6 AK18 VIP Host interface. If VIP_DEVICE_STRAP_EN is set to ?? then
N16
GND#59 GND#39
F8
TXOUT_L3N
DAC2_VSY this pin is not used as a strap at all (i.e. its value during 0
N18
N21
GND#60
GND#61
GND#62
GND GND#40
GND#41
GND#42
G10
G27
reset is unimportant), and it can be used as a regular GPIO

P6 GND#63 GND#43 G31


P9 G8 M92-S2
GND#64 GND#44
R12 GND#65 GND#45 H14
R15 GND#66 GND#46 H17
R17 H2
R20
GND#67
GND#68
GND#47
GND#48 H20
+3V_DELAY
SMS_EN_HARD DAC2_HSY 0
T13 GND#69 GND#49 H6
T16 GND#70 GND#50 J27
T18 GND#71 GND#51 J31
T21 GND#72 GND#52 K11
T6 K2 18 GPIO0 GPIO0 R416 10K/F_4
GND#73 GND#53
U15 K22
U17
GND#74
GND#75
GND#54
GND#55 K6 18 GPIO1 GPIO1 R411 10K/F_4 CCBYPASS GENERICC 0
U20 GND#76
U3 18 GPIO2 GPIO2 R410 *10K/F_4
GND#77
U9 GND#78
V13 18 GPIO8 GPIO8 R413 *10K/F_4
GND#79
V16 GND#80
V18 R386 10K/F_4
V6
GND#81
GND#82
10,18,24 HSYNC_COM
R387 10K/F_4
Memory Aperture size
Y10 GND#83 VSS_MECH#1 A32 10,18,24 VSYNC_COM
Y15 GND#84 VSS_MECH#2 AM1
Y17 AM32 R409 *10K/F_4
Y20
GND#85
GND#86
VSS_MECH#3 18 GENERICC
R367 10K/F_4
GPIO9 GPIO13 GPIO12 GPIO11
B
Y6 GND#87 18 DAC2_VSY B
R368 10K/F_4
BIOSROM ROMIDCFG2 ROMIDCFG1 ROMIDCFG0
18 DAC2_HSY
M92-S2
18 GPIO22
GPIO22 R415 *10K/F_4 0 128M 0 0 0
GPIO5 R412 10K/F_4
18 GPIO5
0 256M 0 0 1
0 64M 0 1 0
+3V_DELAY
0 32M 0 1 1
0 512M 1 0 0
GPIO9 R423 *10K/F_4
18 GPIO9
GPIO13 R424 10K/F_4
0 1G 1 0 1
18 GPIO13

18 GPIO12
GPIO12 R422 *10K/F_4 0 2G 1 1 0
GPIO11 R419 *10K/F_4
18 GPIO11
0 4G 1 1 1
It is a shared pin strap with CONFIG[2:0] if BIOS_ROM_EN is set to 0.
A A

PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
M7X/M8X_GND / LVDS/ Straps
NB5/RD2
Date: Friday, March 20, 2009 Sheet 19 of 42
5 4 3 2 1
5 4 3 2 1

20
VDD_CT -- Level
translation between PCIE_VDDR--PCI-E I/O power. 1.8 V ± 5%
core and I/O,
excluding memory U22D
receivers.1.8 V ± 5% +1.8V_PCIE_VDDR
MEM I/O
1.8V(2.2A VDDR1+VDDRHA) PCIE 1.8V(500mA)
H13 AB23 +1.8V_PCIE_VDDR L60
+1.8V VDDR1#1 PCIE_VDDR#1 +1.8V
H16 VDDR1#2 PCIE_VDDR#2 AC23
H19 AD24 C125 BLM18PG181SN1D(180,1.5A)_6
C109 VDDR1#3 PCIE_VDDR#3 C682 C691 C144 C683 C678
J10 VDDR1#4 PCIE_VDDR#4 AE24
C247 C251 C748 C233 C245 C248 C254 C243 C102 J23 AE25 0.1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_8
1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 0.1U/10V_4 1U/10V_4 VDDR1#5 PCIE_VDDR#5
D
J24 VDDR1#6 PCIE_VDDR#6 AE26 D
J9 AF25 +1.1V
VDDR1#7 PCIE_VDDR#7
K10 VDDR1#8 PCIE_VDDR#8 AG26
K23 +1.1V_PCIE_VDDC 1.1V(2.0A)
VDDR1#9
K24 VDDR1#10
K9 L23 +1.1V_PCIE_VDDC L50
VDDR1#11 PCIE_VDDC#1 BLM21PG221SN1D(220,100M,2A)_8
L11 VDDR1#12 PCIE_VDDC#2 L24
C380 C368 C635 C280 C285 L12 L25 C627
VDDR1#13 PCIE_VDDC#3 C196 C174 C182 C219
L13 VDDR1#14 PCIE_VDDC#4 L26 PCIE_VDDC--PCI-E
10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 0.1U/10V_4 L20 M22 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_8 Digital Power
VDDR1#15 PCIE_VDDC#5
L21 VDDR1#16 PCIE_VDDC#6 N22 Supply (Either 1.0
L22 VDDR1#17 PCIE_VDDC#7 N23
1.8V(136mA VDD_CT) +1.8V_VDD_CT N24 V or 1.1 V) 1.0 V
PCIE_VDDC#8 -5% to 1.1 V +5%
PCIE_VDDC#9 R22
L14 BLM18PG181SN1D(180,1.5A)_6 +1.8V_VDD_CT T22
+1.8V LEVEL PCIE_VDDC#10
PCIE_VDDC#11 U22
C72 C145 TRANSLATION V22
C163 PCIE_VDDC#12 +VGA_CORE
AA20 VDD_CT#1 VDDC+VDDCI VDDC--Dedicated core
Gated 3.3V 10U/6.3V_8 1000P/50V_4 AA21 0.95~1.1V(15A peak )( Ripple < 87.2mV) power, provides power
Q7 0.1U/10V_4 VDD_CT#2
60mA by +3V_DELAY AB20 VDD_CT#3 VDDC#1 AA15 to the internal
AO3409 AB21 CORE N15
VDDC VDD_CT#4 VDDC#2 C639 C638 C33 logic. 0.9 V - 1.2 V
VDDC#3 N17
+3V 1 3 +3V_DELAY M93-S3/M92-S2 R13 C637 C211 (± 5%)
VDDC#4

POWER
R16 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_8
C633 C130 VDDC#5
VDD_R3 --IO power for AA17 VDDR3#1 VDDC#6 R18
3.3 V pins (e.g. C157 AA18 I/O R21
2

R31 1U/10V_4 1U/10V_4 0.1U/10V_4 VDDR3#2 VDDC#7


GPIO’s). 3.3 V ± 5% AB17 VDDR3#3 VDDC#8 T12
100K/F_4 AB18 T15
VDDR3#4 VDDC#9
1.8V(170mA VDDR5) VDDC#10 T17
V12 T20 C161 C176 C643 C625
L16 +VDDR5 VDDR4#1 / VDDR5 VDDC#11 C190
C +1.8V Y12 VDDR4#2 VDDC#12 U13 C
C105 C179 U12 U16 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_8
BLM18PG181SN1D(180,1.5A)_6 C97 C170 VDDR4#3 / VDDR5 VDDC#13
VDDC#14 U18
10U/6.3V_8 1U/10V_4 1U/10V_4 0.1U/10V_4 AA11 U21
+VDDR4 NC#1 / VDDR4 VDDC#15
Y11 DVCLK / VDDR4 VDDC#16 V15
VDDC#17 V17
+1.8V L62 V11 V20
C165 NC#3 / VDDR5 VDDC#18 C173 C175 C186 C626 C624
U11 NC#4 / VDDR5
BLM18PG181SN1D(180,1.5A)_6 C702 C711 Y13
D3 CH501H-40PT L-F 10U/6.3V_8 1U/10V_4 0.1U/10V_4 VDDC#20 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4
1.8V(170mA VDDR4) VDDC#21 Y16 10U/6.3V_8
1 2 Q8 Y18
VDDC#22
3

2N7002E Y21
MEM CLK VDDC#23 +BIF_VDDC
VDDC#19 V21
L22 BLM18PG181SN1D(180,1.5A)_6 VDDRH_1 L17 SI Add from AMD check list
+1.8V VDDRHA
R23 68.1K_4 2 C229
27,32,35,38,39,40 MAINON ISOLATED
C227 L16
10U/6.3V_8 0.1U/10V_4 VSSRHA CORE I/O 0.95V~1.1V(2A VDDCI)
1.8V(68mA PCIE_PVDD) M13 +VDDCI L21
PLL VDDCI#1 +VGA_CORE
M15 BLM21PG221SN1D(220,100M,2A)_8
1

L56 BLM18PG181SN1D(180,1.5A)_6 +PCIE_PVDD VDDCI#2 C217 C200


+1.8V AM30 PCIE_PVDD VDDCI#3 M16
C45 M17 C228 C216 C230 VDDCI--Isolated (clean)
C665 C664 VDDCI#4 1U/10V_4 1U/10V_4 1U/10V_4 0.1U/10V_4 10U/6.3V_8 core power for the l/O
VDDCI#5 M18
0.1U/10V_4 10U/6.3V_8 L8 M20
0.1U/10V_4 NC_MPV18 VDDCI#6 logic. Voltage level
VDDCI#7 M21
N20 should match that of
VDDCI#8 VDDC. POWER Same as VDDC
H7 NC_SPV18
+VGA_CORE 0.95V~1.1V(35mA SPV10)
L63 BLM18PG181SN1D(180,1.5A)_6 +VGA_CORE_SPV10 H8 SPV10
BBP -- Connect to VBBP back bias regulator / generator.
C732 C266 J7 If back bias is not used, connect directly to VDDC.
B
10U/6.3V_8 SPVSS B
VDD_R4 -- Power for DVPDATA_[23:12] - external
TMDS or GPIO; corresponds to 0.1U/10V_4
+VBBP Back Bias Enabled:
DVOA_MSB_VMODE register bit; '1' - 3.3 V(default); BACK BIAS (GPIO_21_BB_EN = 3.3 V):
1.5/1.8V 120mA
'0' - 1.8 V; 1.8 V ± 5% or 3.3 V ± 5% M11 1.5 V or 1.8 V
BBP#1
M12 BBP#2
VDD_R5 -- Power for DVP control pins C231
C222 Back Bias Disabled:
(DVPCNTL_[0-2] and DVPCLK) and
1U/10V_4 0.1U/10V_4 (GPIO_21_BB_EN = 0 V):
DVPDATA_[11:0] - external TMDS or GPIO; M92-S2 VDDC
corresponds to DVOA_LSB_VMODE register bit;
'1' - 3.3 V(default); '0' - 1.8 V; 1.8 V
± 5% or 3.3 V ± 5% +VBBP
*BLM18PG181SN1D(180,1.5A)_6 +1.1V_PCIE_VDDC +1.8V_PCIE_VDDR +VGA_CORE

+VGA_CORE L23

+1.8V or +1.1V @ 1A MAX C121 C642 C634 C32 C34


C160 C690
Q13 +1.8V 1U/10V_4 0.1U/10V_4 1U/10V_4 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8
2N7002E Q12
VDDRH_1 & VDDRH_2 --Dedicated power ME2303T1
pins for memory clock pads for each 3 1 +VGA_CORE 3 1
channel. Should have the same
voltage level as VDDR1.
2

R64 100K/F_4 SI Add from AMD check list


1 2 +5V
A A
3

+VGA_CORE
HCB1608KF-181T15_6
L73 +BIF_VDDC
2 Q11
18 BBEN
2N7002E
C844
10U/6.3V_8
C845
1U/6.3V_4 PROJECT : OP8
Quanta Computer Inc.
1

Size Document Number Rev


Custom 1A
M7X/M8X_Power_and_NC
NB5/RD2
Date: Friday, March 20, 2009 Sheet 20 of 42
5 4 3 2 1
5 4 3 2 1

22 ODTA0 ODTA0
ODTA1
MDA0
MDA1
MDA2
MDA3
K27
J29
H30
H32
U22C

DQA_0
DQA_1
DQA_2
MAA_0
MAA_1
MAA_2
K17
J20
H23
G23
MAA0
MAA1
MAA2
MAA3
21
22 ODTA1 DQA_3 MAA_3
MDA4 G29 G24 MAA4
DQA_4 MAA_4

MEMORY INTERFACE
22 RASA0# RASA0# MDA5 F28 H24 MAA5
RASA1# MDA6 DQA_5 MAA_5 MAA6
22 RASA1# F32 DQA_6 MAA_6 J19
MDA7 F30 K19 MAA7
CASA0# MDA8 DQA_7 MAA_7 MAA8
22 CASA0# C30 DQA_8 MAA_8 J14
22 CASA1# CASA1# MDA9 F27 K14 MAA9
D
MDA10 DQA_9 MAA_9 MAA10 D
A28 DQA_10 MAA_10 J11
22 WEA0# WEA0# MDA11 C28 J13 MAA11
WEA1# MDA12 DQA_11 MAA_11 MAA12
22 WEA1# E27 DQA_12 MAA_12 H11
MDA13 G26 G11 A_BA2
CSA0#_0 MDA14 DQA_13 MAA_13/BA2 A_BA0
22 CSA0#_0 D26 DQA_14 MAA_14/BA0 J16
MDA15 F25 L15 A_BA1
MDA16 DQA_15 MAA_15/BA1
A25 DQA_16
22 CSA1#_0 CSA1#_0 MDA17 C25 E32 DQMA#0
MDA18 DQA_17 DQMA_0 DQMA#1
E25 DQA_18 DQMA_1 E30
MDA19 D24 A21 DQMA#2
CKEA0 MDA20 DQA_19 DQMA_2 DQMA#3
22 CKEA0 E23 DQA_20 DQMA_3 C21
22 CKEA1 CKEA1 MDA21 F23 E13 DQMA#4
MDA22 DQA_21 DQMA_4 DQMA#5
D22 DQA_22 DQMA_5 D12
22 CLKA0 CLKA0 MDA23 F21 E3 DQMA#6
CLKA0# MDA24 DQA_23 DQMA_6 DQMA#7
22 CLKA0# E21 DQA_24 DQMA_7 F4
MDA25 D20
CLKA1 MDA26 DQA_25 QSA0
22 CLKA1 F19 DQA_26 RDQSA_0 H28
22 CLKA1# CLKA1# MDA27 A19 C27 QSA1
MDA28 DQA_27 RDQSA_1 QSA2
D18 DQA_28 RDQSA_2 A23
QSA#[7..0] MDA29 F17 E19 QSA3
22 QSA#[7..0] DQA_29 RDQSA_3
MDA30 A17 E15 QSA4
QSA[7..0] MDA31 DQA_30 RDQSA_4 QSA5
22 QSA[7..0] C17 DQA_31 RDQSA_5 D10
MDA32 E17 D6 QSA6
DQMA#[7..0] MDA33 DQA_32 RDQSA_6 QSA7
22 DQMA#[7..0] D16 DQA_33 RDQSA_7 G5
MDA34 F15
MDA[63..0] MDA35 DQA_34 QSA#0
22 MDA[63..0] A15 DQA_35 W DQSA_0 H27
MDA36 D14 A27 QSA#1
MAA[12..0] MDA37 DQA_36 W DQSA_1 QSA#2
22 MAA[12..0] F13 DQA_37 W DQSA_2 C23
MDA38 A13 C19 QSA#3
MDA39 DQA_38 W DQSA_3 QSA#4
C C13 DQA_39 W DQSA_4 C15 C
MDA40 E11 E9 QSA#5
A_BA0 MDA41 DQA_40 W DQSA_5 QSA#6
22 A_BA0 A11 DQA_41 W DQSA_6 C5
22 A_BA1 A_BA1 MDA42 C11 H4 QSA#7
A_BA2 MDA43 DQA_42 W DQSA_7
22 A_BA2 F11 DQA_43
MDA44 A9 L18 ODTA0
MDA45 DQA_44 ODTA0 ODTA1
support 1Gbit C9 DQA_45 ODTA1 K16
VRAM ( 64M X 16 ) MDA46 F9
MDA47 DQA_46 CLKA0
D8 DQA_47 CLKA0 H26
MDA48 E7 H25 CLKA0#
MDA49 DQA_48 CLKA0B
A7 DQA_49
MDA50 C7 G9 CLKA1
MDA51 DQA_50 CLKA1 CLKA1#
F7 DQA_51 CLKA1B H9
MDA52 A5
MDA53 DQA_52 RASA0#
E5 DQA_53 RASA0B G22
MDA54 C3 G17 RASA1#
MDA55 DQA_54 RASA1B
E1 DQA_55
MDA56 G7 G19 CASA0#
+1.8V MDA57 DQA_56 CASA0B CASA1#
G6 DQA_57 CASA1B G16
MDA58 G1
MDA59 DQA_58 CSA0#_0
G3 DQA_59 CSA0B_0 H22
MDA60 J6 J22
R76 MDA61 DQA_60 CSA0B_1
J1 DQA_61
100/F_4 MDA62 J3 G13 CSA1#_0
MDA63 DQA_62 CSA1B_0
J5 DQA_63 CSA1B_1 K13

MVREFD K26 K20 CKEA0


MVREFDA CKEA0 CKEA1
J26 MVREFSA CKEA1 J17
+1.8V +1.8V
R80 *243/F_4 J25 G25 WEA0#
B
R77 R426 *243/F_4 NC_MEM_CALRN0 W EA0B WEA1# B
K7 NC_MEM_CALRN1 W EA1B H10
C235 100/F_4
0.1U/10V_4 R90 R81 243/F_4 J8 AB16 T123
100/F_4 R79 *243/F_4 MEM_CALRP1 RSVD#1
K25 NC_MEM_CALRP0 RSVD#2 G14
RSVD#3 G20
L10 DRAM_RST SI Add GND from Check list
MVREFS
R78 4.7K_4 C846 0_4 K8
R75 4.7K_4 C847 0_4 CLKTESTA
L7 CLKTESTB
R89
C259 100/F_4
0.1U/10V_4 M92-S2
SI Add GND from Check list

Change MEMTEST to 240 1%


ohm to GND , AMD update

A A

PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
M7X/M8X/MEM_Interface
NB5/RD2
Date: Friday, March 20, 2009 Sheet 21 of 42
5 4 3 2 1
5 4 3 2 1

A_BA0
A_BA1

MAA12
MAA11
L2
L3

R2
U5
BA0
BA1

A12
DQ15
DQ14
DQ13
DQ12
B9
B1
D9
D1
MDA9
MDA13
MDA10
MDA15
MDA14
DDR2 BGA
MEMORY A_BA0
A_BA1

MAA12
L2
L3
U27
BA0
BA1
DQ15
DQ14
DQ13
B9
B1
D9
MDA6
MDA0
MDA7
MDA1
21 QSA[7..0]
QSA[7..0]

QSA#[7..0]
22
P7 D3 R2 D1 21 QSA#[7..0]
MAA10 A11 DQ11 MDA8 MAA11 A12 DQ12 MDA2
M2 D7 P7 D3
MAA9 A10/AP DQ10 MDA12 MAA10 A11 DQ11 MDA5 DQMA#[7..0]
P3 C2 M2 D7 21 DQMA#[7..0]
MAA8 A9 DQ9 MDA11 MAA9 A10/AP DQ10 MDA3
P8 C8 P3 C2
MAA7 A8 DQ8 MDA17 MAA8 A9 DQ9 MDA4 MDA[63..0]
P2 F9 P8 C8 21 MDA[63..0]
MAA6 A7 DQ7 MDA22 MAA7 A8 DQ8 MDA28
N7 F1 P2 F9
MAA5 A6 DQ6 MDA16 MAA6 A7 DQ7 MDA25 MAA[12..0]
N3 H9 N7 F1 21 MAA[12..0]
MAA4 A5 DQ5 MDA21 MAA5 A6 DQ6 MDA30
N8 H1 N3 H9
MAA3 A4 DQ4 MDA23 MAA4 A5 DQ5 MDA27
N2 H3 N8 H1
MAA2 A3 DQ3 MDA18 MAA3 A4 DQ4 MDA26
M7 H7 N2 H3
MAA1 A2 DQ2 MDA20 MAA2 A3 DQ3 MDA29 A_BA0
M3 G2 M7 H7 21 A_BA0
D
MAA0 A1 DQ1 MDA19 MAA1 A2 DQ2 MDA24 A_BA1 D
M8 G8 M3 G2 21 A_BA1
A0 DQ0 MAA0 A1 DQ1 MDA31 A_BA2
M8 G8 21 A_BA2
A0 DQ0
CLKA0# K8 A9
CLKA0 CK VDDQ1 CLKA0#
J8 C1 K8 A9
CK VDDQ2 CLKA0 CK VDDQ1
C3 J8 C1
CKEA0 VDDQ3 CK VDDQ2
K2 C7 C3
CKE VDDQ4 CKEA0 VDDQ3
C9 K2 C7
VDDQ5 CKE VDDQ4
E9 C9
VDDQ6 +1.8V VDDQ5
G1 E9
CSA0#_0 VDDQ7 VDDQ6 +1.8V
L8 G3 G1
CS VDDQ8 CSA0#_0 VDDQ7
G7 L8 G3
WEA0# VDDQ9 CS VDDQ8
K3 G9 G7
WE VDDQ10 WEA0# VDDQ9
K3 G9
RASA0# WE VDDQ10 CLKA0
K7 A1 21 CLKA0
RAS VDD1 RASA0#
E1 K7 A1
CASA0# VDD2 RAS VDD1 CLKA0#
L7 J9 E1 21 CLKA0#
CAS VDD3 CASA0# VDD2
M9 L7 J9
DQMA#2 VDD4 CAS VDD3
F3 R1 M9
DQMA#1 LDM VDD5 DQMA#3 VDD4 R149 R150
B3 F3 R1
UDM DQMA#0 LDM VDD5 56.2/F_4 56.2/F_4
J1 B3
VDDL UDM
J7 J1
ODTA0 VSSDL C372 VDDL
K9 J7
ODT ODTA0 VSSDL C773
K9
0.1U/10V_4 ODT
+1.8V QSA2 F7 0.1U/10V_4 C382
QSA#2 LDQS QSA3
E8 A7 F7
LDQS VSSQ1 +1.8V QSA#3 LDQS 470P/50V_4
B2 E8 A7
VSSQ2 LDQS VSSQ1
B8 B2
VSSQ3 VSSQ2
D2 B8
R97 QSA1 VSSQ4 VSSQ3
B7 D8 D2
4.99K/F_4 QSA#1 UDQS VSSQ5 QSA0 VSSQ4
A8 E7 B7 D8
UDQS VSSQ6 R464 QSA#0 UDQS VSSQ5
F2 A8 E7
VSSQ7 4.99K/F_4 UDQS VSSQ6 ODTA0
F8 F2 21 ODTA0
M_VREF1 (SSTL-1.8) VREF = .5*VDDQ VSSQ8 VSSQ7
J2 H2 F8
VREF VSSQ9 (SSTL-1.8) VREF = .5*VDDQ M_VREF2 VSSQ8 RASA0#
H8 J2 H2 21 RASA0#
VSSQ10 VREF VSSQ9
A2 H8
C283 NC#A2 VSSQ10 CASA0#
C E2 A3 A2 21 CASA0# C
R96 A_BA2 NC#E2 VSS1 C779 NC#A2
L1 E3 E2 A3
4.99K/F_4 0.1U/10V_4 BA2 VSS2 R462 A_BA2 NC#E2 VSS1 WEA0#
R3 J3 L1 E3 21 WEA0#
NC#R3 VSS3 4.99K/F_4 0.1U/10V_4 BA2 VSS2
Support 1Gbit R7
A15 VSS4
N1 R3
NC#R3 VSS3
J3
VRAM ( 64M X 16 ) R8 P9 Support 1Gbit R7 N1 21 CSA0#_0 CSA0#_0
A13 VSS5 A15 VSS4
VRAM ( 64M X 16 ) R8 P9
A13 VSS5 CKEA0
21 CKEA0
+1.8V HYB18T512161B2F-20
+1.8V HYB18T512161B2F-20

C367 C343 C371 C775 C771 C375 C374 C359 C378 C377 C743 C362
C750 C381 C373 C328 C331 C342 C742 C365 C341 C329 C322 C379 21 ODTA1 ODTA1
10U/6.3V_8 10U/6.3V_8 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.01U/16V_4
10U/6.3V_8 10U/6.3V_8 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.01U/16V_4 21 RASA1# RASA1#

21 CASA1# CASA1#

21 WEA1# WEA1#
U26 U4
A_BA0 L2 B9 MDA60 A_BA0 L2 B9 MDA43 21 CSA1#_0 CSA1#_0
A_BA1 BA0 DQ15 MDA59 A_BA1 BA0 DQ15 MDA47
L3 B1 L3 B1
BA1 DQ14 MDA61 BA1 DQ14 MDA41 CKEA1
D9 D9 21 CKEA1
MAA12 DQ13 MDA58 MAA12 DQ13 MDA46
R2 D1 R2 D1
MAA11 A12 DQ12 MDA56 MAA11 A12 DQ12 MDA44
P7 D3 P7 D3
MAA10 A11 DQ11 MDA62 MAA10 A11 DQ11 MDA42
M2 D7 M2 D7
MAA9 A10/AP DQ10 MDA57 MAA9 A10/AP DQ10 MDA45
P3 C2 P3 C2
MAA8 A9 DQ9 MDA63 MAA8 A9 DQ9 MDA40
P8 C8 P8 C8
MAA7 A8 DQ8 MDA52 MAA7 A8 DQ8 MDA35
P2 F9 P2 F9
MAA6 A7 DQ7 MDA50 MAA6 A7 DQ7 MDA37 CLKA1
N7 F1 N7 F1 21 CLKA1
MAA5 A6 DQ6 MDA53 MAA5 A6 DQ6 MDA33
N3 H9 N3 H9
MAA4 A5 DQ5 MDA49 MAA4 A5 DQ5 MDA38 CLKA1#
N8 H1 N8 H1 21 CLKA1#
MAA3 A4 DQ4 MDA48 MAA3 A4 DQ4 MDA36
N2 H3 N2 H3
MAA2 A3 DQ3 MDA54 MAA2 A3 DQ3 MDA32
M7 H7 M7 H7
MAA1 A2 DQ2 MDA51 MAA1 A2 DQ2 MDA39 R471 R470
M3 G2 M3 G2
MAA0 A1 DQ1 MDA55 MAA0 A1 DQ1 MDA34 56.2/F_4 56.2/F_4
M8 G8 M8 G8
A0 DQ0 A0 DQ0
B B
CLKA1# K8 A9 CLKA1# K8 A9
CLKA1 CK VDDQ1 CLKA1 CK VDDQ1
J8 C1 J8 C1
CK VDDQ2 CK VDDQ2 C786
C3 C3
CKEA1 VDDQ3 CKEA1 VDDQ3
K2 C7 K2 C7
CKE VDDQ4 CKE VDDQ4 470P/50V_4
C9 C9
VDDQ5 VDDQ5
E9 E9
VDDQ6 +1.8V VDDQ6 +1.8V
G1 G1
CSA1#_0 VDDQ7 CSA1#_0 VDDQ7
L8 G3 L8 G3
CS VDDQ8 CS VDDQ8
G7 G7
WEA1# VDDQ9 WEA1# VDDQ9
K3 G9 K3 G9
WE VDDQ10 WE VDDQ10
RASA1# K7 A1 RASA1# K7 A1
RAS VDD1 RAS VDD1
E1 E1
CASA1# VDD2 CASA1# VDD2
L7 J9 L7 J9
CAS VDD3 CAS VDD3
M9 M9
DQMA#6 VDD4 DQMA#4 VDD4
F3 R1 F3 R1
DQMA#7 LDM VDD5 DQMA#5 LDM VDD5
B3 B3
UDM UDM
J1 J1
VDDL VDDL
J7 J7
ODTA1 VSSDL C290 ODTA1 VSSDL C376
K9 K9
ODT ODT
0.1U/10V_4 0.1U/10V_4
QSA6 F7 QSA4 F7
+1.8V QSA#6 LDQS +1.8V QSA#4 LDQS
E8 A7 E8 A7
LDQS VSSQ1 LDQS VSSQ1
B2 B2
VSSQ2 VSSQ2
B8 B8
VSSQ3 VSSQ3
D2 D2
QSA7 VSSQ4 QSA5 VSSQ4
B7 D8 B7 D8
R428 QSA#7 UDQS VSSQ5 R147 QSA#5 UDQS VSSQ5
A8 E7 A8 E7
4.99K/F_4 UDQS VSSQ6 4.99K/F_4 UDQS VSSQ6
F2 F2
VSSQ7 VSSQ7
F8 F8
M_VREF3 VSSQ8 M_VREF4 VSSQ8
J2 H2 J2 H2
(SSTL-1.8) VREF = .5*VDDQ VREF VSSQ9 (SSTL-1.8) VREF = .5*VDDQ VREF VSSQ9
H8 H8
VSSQ10 VSSQ10
A2 A2
C744 NC#A2 C364 NC#A2
E2 A3 E2 A3
R429 A_BA2 NC#E2 VSS1 R148 A_BA2 NC#E2 VSS1
L1 E3 L1 E3
4.99K/F_4 0.1U/10V_4 BA2 VSS2 4.99K/F_4 0.1U/10V_4 BA2 VSS2
A R3 J3 R3 J3 A
NC#R3 VSS3 NC#R3 VSS3
R7
A15 VSS4
N1 Support 1Gbit R7
A15 VSS4
N1
Support 1Gbit R8 P9 VRAM ( 64M X 16 ) R8 P9
A13 VSS5 A13 VSS5
VRAM ( 64M X 16 )

HYB18T512161B2F-20 HYB18T512161B2F-20 DDR2 BGA MEMORY


+1.8V +1.8V

PROJECT : OP8
C358 C289 C315 C741 C740 C739 C366 C749 C189 C369 C311 C361 C345 C284 C784 C783 C787 C785 C354 C344 C370 C317 C314 Quanta Computer Inc.
10U/6.3V_8 10U/6.3V_8 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.01U/16V_4 10U/6.3V_8 10U/6.3V_8 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.01U/16V_4
Size Document Number Rev
C 1A
M92/VRAM_A0,A1
NB5/RD2
Date: Friday, March 20, 2009 Sheet 22 of 42
5 4 3 2 1
1 2 3 4 5 6 7 8

1. If LCD connector near GPU, then place these series Resistors near GPU
2. If LCD connector near N/B, then place these series Resistors near N/B
OPTION SIGNAL FROM NB to LVDS for UMA
+12VALW
+3V
23

2
C10
10 LA_CLK LA_CLK RP1 3 4 *0_4P2R_4 TXLCLKOUT+ +3V R1 *4.7K_4 EDIDCLK R6 AO3404 ID 0.1U/10V_4
10 LA_CLK# LA_CLK# 1 2 TXLCLKOUT- current
LA_DATAP0 RP2 3 4 *0_4P2R_4 TXLOUT0+ R2 *4.7K_4 EDIDDATA 330K_6 5.8A
10 LA_DATAP0

3
LA_DATAN0 1 2 TXLOUT0- +5VSUS N-MOS,5.8A
10 LA_DATAN0

1
LA_DATAP1 RP3 3 4 *0_4P2R_4 TXLOUT1+ Q1 +3VLCD
10 LA_DATAP1
LA_DATAN1 1 2 TXLOUT1- AO3404
10 LA_DATAN1
LA_DATAP2 RP4 3 4 *0_4P2R_4 TXLOUT2+ LCDONG 2
10 LA_DATAP2

1
LA_DATAN2 1 2 TXLOUT2-
10 LA_DATAN2

1
A A
R7

3
10 LB_CLK LB_CLK RP5 3 4 *0_4P2R_4 TXUCLKOUT+ R3
10 LB_CLK# LB_CLK# 1 2 TXUCLKOUT- 100K/F_4

1
LB_DATAP0 RP6 3 4 *0_4P2R_4 TXUOUT0+ 22_8
10 LB_DATAP0

2
LB_DATAN0 1 2 TXUOUT0- 2
10 LB_DATAN0

2
1
LB_DATAP1 RP7 3 4 *0_4P2R_4 TXUOUT1+
10 LB_DATAP1
LB_DATAN1 1 2 TXUOUT1- Q4 Q2 C11 LCDDISCHG
10 LB_DATAN1

3
LB_DATAN2 RP8 1 2 *0_4P2R_4 TXUOUT2- PDTC144EU 2N7002E 0.1U/10V_4
10 LB_DATAN2

2
LB_DATAP2 3 4 TXUOUT2+
10 LB_DATAP2

3
10,19 DISP_ON 2

OPTION SIGNAL FROM M92 to LVDS for discrete LCDON# 2 Q3

1
R10 2N7002E
19 EXT_TXLCLKOUT- EXT_TXLCLKOUT- RP49 3 4 0_4P2R_4 TXLCLKOUT- 2.2K_4
19 EXT_TXLCLKOUT+ EXT_TXLCLKOUT+ 1 2 TXLCLKOUT+ +3V_DELAY R420 4.7K_4 EDIDCLK
EXT_TXLOUT0- RP50 3 4 0_4P2R_4 TXLOUT0-
19 EXT_TXLOUT0-

1
EXT_TXLOUT0+ 1 2 TXLOUT0+ R418 4.7K_4 EDIDDATA
19 EXT_TXLOUT0+
EXT_TXLOUT1- RP51 3 4 0_4P2R_4 TXLOUT1-
19 EXT_TXLOUT1-
EXT_TXLOUT1+ 1 2 TXLOUT1+
19 EXT_TXLOUT1+
EXT_TXLOUT2+ RP52 1 2 0_4P2R_4 TXLOUT2+
19 EXT_TXLOUT2+
EXT_TXLOUT2- 3 4 TXLOUT2-
19 EXT_TXLOUT2-
EXT_TXUCLKOUT- RP53 3 4 0_4P2R_4 TXUCLKOUT-
19 EXT_TXUCLKOUT-
19 EXT_TXUCLKOUT+ EXT_TXUCLKOUT+ 1 2 TXUCLKOUT+
EXT_TXUOUT0+ RP54 1 2 0_4P2R_4 TXUOUT0+

G_0
19 EXT_TXUOUT0+
EXT_TXUOUT0- 3 4 TXUOUT0- +3VLCD_CON
19 EXT_TXUOUT0- 1
EXT_TXUOUT1- RP55 3 4 0_4P2R_4 TXUOUT1-
19 EXT_TXUOUT1- 2
EXT_TXUOUT1+ 1 2 TXUOUT1+
19 EXT_TXUOUT1+ 3
B EXT_TXUOUT2- RP56 3 4 0_4P2R_4 TXUOUT2- +3V B
19 EXT_TXUOUT2- 4
EXT_TXUOUT2+ 1 2 TXUOUT2+ 10,18 EDIDCLK
19 EXT_TXUOUT2+ 5
L2 +3VLCD_CON 10,18 EDIDDATA
+3VLCD 6
PBY201209T-4A_8 C6 10U/6.3V_8
C2 *0.1U/10V_4 C4 TXLOUT0- 7
C3 0.01U/16V_4 TXLOUT0+ 8
1000P/50V_4 9
TXLOUT1- 10 G_1
TXLOUT1+ 11
12
C849 0.1U/10V_4 TXLOUT2- 13
+1.8V +VGA_CORE 14
TXLOUT2+
15
C854 0.1U/10V_4 TXLCLKOUT- 16
+1.8V +VGA_CORE 17
TXLCLKOUT+
D1 CH501H-40PT 18 G_2
PN_BLON BLONCON C16 22P/50V_4 TXUOUT0- 19
2 1 20
SI Add for EMI TXUOUT0+
R13 33K_6 21
+3VPCU 22
R11 100K/F_4 TXUOUT1-
TXUOUT1+ 23
LVDS_BLON R12 1K/F_4 LID_EC# 24 G_3
10,18 LVDS_BLON 2 LID_EC# 31,32 25
TXUOUT2-
PN_BLON TXUOUT2+ 26
3 27
TXUCLKOUT- 28
1 HWPG 32,34,35,37,38 29
3

*WCM-2012-900T(400mA) TXUCLKOUT+
D2 30
LCD_BK BAT54A L1 4 USBP2+ 31 G_4
12 LCD_BK 2 13 USBP2+ 3 32
Q5 Del R21 and Pull hi R259 to 1 2 USBP2-
C 13 USBP2- 33 C
+3VS5, no-stuff Q5, add D7 +3.9V-CAMARA 34
*PDTC144EU to HWPG on PV
1

35
VADJ1 36
+VIN_BLIGHT BLONCON 37
C14 C15 38
.01U/16V_4 39
*4.7U/6.3V_6 40

G_5
+3.9V-CAMARA CN1
GS12401-1011-9F

+5V

+3V U1
3 4 +VIN_BLIGHT
C842 VIN VOUT
1 2 L3 FBM2125 HM330-T(4A,0.015)_8
+VIN
0.047U/10V U33 C17 1 C843
SHDN R1
5

R9 C13 C1 C5 C12 C7
10,19 DPST_PWM DPST_PWM 2 1U/10V_4 *215K/F_4 4.7U/6.3V_6 0.1U/50V_6 0.01U/50V_4 0.1U/50V_6 *10U/25V_12 0.1U/50V_6
4 R524 1K_4 VADJ1
PWM_VADJ 1 2 5
32 PWM_VADJ GND SET
C9 C8 AT5231H-3.9KER
3

TC7SH08FU
*4.7U/6.3V_6 0.01U/50V_4 R8
D R2 *100K/F_4 D

R5 *0_4

PROJECT : OP8
Quanta Computer Inc.
SI add U33,R524,C842 for Vari bright function Size Document Number Rev
Custom 1A
LCD CONN
NB5/RD2
Date: Friday, March 20, 2009 Sheet 23 of 42
1 2 3 4 5 6 7 8
5 4 3 2 1

CRT PORT

2
F1
1
40 mils
+5VCRT

+5VCRT
C661
0.1U/10V_4

40 MIL
24
R57 for UAM use 140 ohm +5V

16
for DIS use 150 ohm (AMD) FUSE1A6V_POLY

6
CRT_R L20 BLM18BA470SN1(47,300MA)_6 CRT_R1 1 11 +3V

D
7 D
CRT_G L19 BLM18BA470SN1(47,300MA)_6 CRT_G1 2 12 D8 *BAV99W
8 1
CRT_B L15 BLM18BA470SN1(47,300MA)_6 CRT_B1 3 13 CRT_R1
3
9
4 14 2
10
R57 R48 R45 C122 C95 C77 C76 C86 C108 5 15
D7 *BAV99W
150/F_4 150/F_4 150/F_4 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6
1 CRT_G1
EMI

17
3
CRT CONN
close conn CN16 2
within 600mils
CRT_R D6 *BAV99W
10,18 CRT_R
CRT_G
10,18 CRT_G 1
CRT_B +5V R32 *0_4/S CRTDDCCLK2 CRT_B1
10,18 CRT_B 3
PR_VSYNC R38 33_4 CRTVSYNC
+5V 2
PR_HSYNC R391 33_4 CRTHSYNC
D4 *BAV99W
5

1
C655 0.1U/10V_4 R398 *0_4/S CRTDDCDAT2
U20 1 DDCCLK2
3

10,18,19 VSYNC_COM 2 4 2
AHCT1G125DCH C50 C60 C666 C697
D5 *BAV99W
C *470P/50V_4 *47P/50V_4 *47P/50V_4 *47P/50V_4 C
1
5

CRTVSYNC
U21 AHCT1G125DCH 3

2
10,18,19 HSYNC_COM 2 4

D21 *BAV99W
+3V_DELAY R377 4.7K_4 +3V
1 CRTHSYNC
follow AMD 3
reference +3V R375 *4.7K_4
2

schematic change 2
for reduce DDCCLK 1 3
leakage to VDDR310,18 DDCCLK D22 *BAV99W
BUS Q37
2N7002E DDCCLK2 1 DDCDAT2
R382 4.7K_4 +3V 3
+3V_DELAY
R381 *4.7K_4 DDCDAT2 2
+3V
2

DDCDATA 1 3
10,18 DDCDATA
Q40
2N7002E
R27 R399

6.81K_4 6.81K_4

B B
+5VCRT 2 1 +5V_CRT2
+5VCRT
CH501H-40PT D20

A A

PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
CRT
NB5/RD2
Date: Friday, March 20, 2009 Sheet 24 of 42
5 4 3 2 1
5 4 3 2 1

HDMI HPD SENSE


+3V

R513
+3V_DELAYUMA

R514
use +3V for the detect pin
Dis use +3V_DELAY for the detect pin 26
*0_4 0_4
SI Change to 200K for detect pin
Q45
MMBT3904-7-F
R118

3
D D
2 HDMI_DET_R HDMI_DET

UMA/DISCRETE select for HDMI

1
200K/F_4
10,18 TMDS_HPD
for Layout for Layout R127
From RS780M concern concern 200K/F_4
R466
,placement close ,placement close 10K/F_4
north bridge HDMI conn

RP41
C_PEG_TX#15 C347 *0.1U/10V_4 TX2_HDMI-L TX2_HDMI+L 3 4 *0_4P2R_4 TX2_HDMI+
9 C_PEG_TX#15
C_PEG_TX15 C346 *0.1U/10V_4 TX2_HDMI+L TX2_HDMI-L 1 2 TX2_HDMI-
9 C_PEG_TX15
RP40
C_PEG_TX#14 C352 *0.1U/10V_4 TX1_HDMI-L TX1_HDMI-L 3 4 *0_4P2R_4 TX1_HDMI-
9 C_PEG_TX#14
C_PEG_TX14 C353 *0.1U/10V_4 TX1_HDMI+L TX1_HDMI+L 1 2 TX1_HDMI+
9 C_PEG_TX14
RP39
C_PEG_TX#13 C351 *0.1U/10V_4 TX0_HDMI-L TX0_HDMI+L 3 4 *0_4P2R_4 TX0_HDMI+
9 C_PEG_TX#13
C_PEG_TX13 C350 *0.1U/10V_4 TX0_HDMI+L TX0_HDMI-L 1 2 TX0_HDMI-
9 C_PEG_TX13
RP38
C_PEG_TX#12 C348 *0.1U/10V_4 TXC_HDMI-L TXC_HDMI-L 3 4 *0_4P2R_4 TXC_HDMI-
9 C_PEG_TX#12
9 C_PEG_TX12
C_PEG_TX12 C349 *0.1U/10V_4 TXC_HDMI+L TXC_HDMI+L 1 2 TXC_HDMI+ UMA AND DISCRETE HDMI I2C SELECT
Close to HDMI Connector
*0_4P2R_4
RP57 3 4 HDMI_SDATA
From M92-S2 10 HDMI_DDC_DATA
10 HDMI_DDC_CLK 1 2 HDMI_SCLK
TX2_HDMI_L- C789 0.1U/10V_4 TX2_HDMI-
18 TX2_HDMI_L-
C TX2_HDMI_L+ C788 0.1U/10V_4 TX2_HDMI+ Q59, Q60 Change C
18 TX2_HDMI_L+
TX1_HDMI_L- C781 0.1U/10V_4 TX1_HDMI- for Layout
Discrete DDC4 is 5V UMA 2N7002 to
18 TX1_HDMI_L- tolerance , the MOSFET +3V_DELAY +3V
FDV301N for AMD
TX1_HDMI_L+ C782 0.1U/10V_4 TX1_HDMI+ concern
18 TX1_HDMI_L+ +5V on PV
,placement close level shifter no need
TX0_HDMI_L- C780 0.1U/10V_4 TX0_HDMI-
18 TX0_HDMI_L-
TX0_HDMI_L+ C778 0.1U/10V_4 TX0_HDMI+ HDMI conn UMA DDC is 3V R403 R407
18 TX0_HDMI_L+
tolerance,the MOSFET 4.7K_4 *4.7K_4
TXC_HDMI_L- C774 0.1U/10V_4 TXC_HDMI-
18 TXC_HDMI_L- level shifter is need

2
TXC_HDMI_L+ C777 0.1U/10V_4 TXC_HDMI+
18 TXC_HDMI_L+
1 3HDMI_SCLK
18 HDMI_SCL

R472 499/F_4 TX2_HDMI+ +3V_DELAY +3V


Q41

+5V
R473 499/F_4 TX2_HDMI- 2N7002E DIS
UMA RS780M
3

R469 499/F_4 TX1_HDMI+ R404 R408 +5V


Q44
2N7002E R468 499/F_4 TX1_HDMI-
朝 715 ohm CS17152FB17 SI Change for DIS HDMI 4.7K_4 *4.7K_4

2
R465 499/F_4 TX0_HDMI+
DIS M92-S
R467 499/F_4 TX0_HDMI- 朝 499 ohm CS14992FB24 18 HDMI_SDA
1 3 HDMI_SDATA
1

R442 R461 499/F_4 TXC_HDMI+


1 2
100K/F_4
R460 499/F_4 TXC_HDMI- Close to HDMI Connector Q42
2N7002E
B B

HDMI PORT CN21


20
TX2_HDMI+ SHELL1
1 D2+SHELL3 22
2 D2 Shield
+5V_HDMVCC +5V_HDMVCC TX2_HDMI- 3
TX1_HDMI+ D2-
4 D1+
5 D1 Shield
2

TX1_HDMI- 6
D23 D24 TX0_HDMI+ D1-
7 D0+
CH501H-40PT 8 D0 Shield
TX0_HDMI- 9
TXC_HDMI+ D0-
10
1

CH501H-40PT CK+
11 CK Shield
TXC_HDMI- 12
R446 R454 CK-
13 CE Remote
2K_4 2K_4 14
HDMI_SCLK L29 1 HDMISCL NC
2 *0_6/S 15 DDC CLK
HDMI_SCLK HDMI_SDATA HDMI_SDATA L30 1 2 *0_6/S HDMISDA 16 DDC DATA
17 GND
+5V_HDMVCC 18
FUSE1A6V_POLY +5V
19 HP DET
SHELL4 23
+5V 2 1 SHELL2 21
A F2 A
C772 *0.1U/10V_4 HDMI CONN

HDMI_DET

PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
HDMI
NB5/RD2
Date: Friday, March 20, 2009 Sheet 25 of 42
5 4 3 2 1
8 7 6 5 4 3 2 1

For 5158

25
For 5158E SP6 R273 *0_4 SD_DAT1
SI remove R350 for langth trace Note:
CLK_48M_CR SP7 R280 *0_4/S MS-D0_SD-D0_XD-D6
2 CLK_48M_CR
SP6 R268 *0_4/S MS-D1_XD-D3_SD_D1
SP4 R254 *0_4/S SD/MMC MS XD SP8 R252 *0_4/S MS-D2_XD-D2
+3VSUS R250 100K/F_4 U14 SP16 R343 *0_4/S XD-RE#_SD-D2
43 SP19 For 5158E SP1 XD_CD# SP5 R259 *0_4/S MS-BS_XD-D5
XD_CLE/CF_D3 SP18 SP2 SD_WP SP15 R342 *0_4/S SD-D3_XD-WE
XD_CE#/CF_D11 42
13 41 SP17 SP3 SD_CD# SP11 R314 *0_4/S SD-CLK
CF_CD# XD_ALE/CF_D4 SP4 SD_DAT1 XD_D4 R523 *0_4/S MS-CLK
31 CARD_LED# 14 GPIO0
15 40 SP16 SP5 MS_BS XD_D5 SP2 R255 *0_4/S SD-WP
CF_D10 SD_DAT2/XD_RE#/CF_D12 SP15 SP6 MS_D1 XD_D3 SP13 R507 *0_4/S XD-WP#
16 CF_D9 SD_DAT3/XD_WE#/CF_D5 39
SP14
AL005158B10 -->RTS5158E SP7 SD_DAT0 MS_D0 XD_D6 SP19 R345 *0_4/S XD-CLE
17 CF_D2 XD_RDY/CF_D13 38
18 37 SP13 AL005158B00 -->RTS5158 SP8 SD_DAT7 MS_D2 XD_D2 SP4 R253 *0_4/S XD-D4
D XD_CD# CF_D8/SM_CD# SD_DAT4/XD_WP#/CF_D6 SP9 MS_INS# SP10 R291 *0_4/S MS-D3_XD-D7 D
19 CF_D1/XD_CD#
SP2 20 36 SD_CMD_R SP10 SD_DAT6 MS_D3 XD_D7 SP14 R353 *0_4/S XD-RB#
SD_CD# CF_D0/SM_WPM#/SD_WP SD_CMD SP12 SP11 SD_CLK MS_SCLK XD_D1 SP12 R322 *0_4/S XD-D0
21 CF_A0/SD_CD# SD_DAT5/XD_D0/CF_D14 35
22 34 SP11 SP12 SD_DAT5 XD_D0 SP17 R354 *0_4/S XD-ALE
SP4 CF_DMACK# SD_CLK/XD_D1/MS_CLK/CF_D7 SP10 SP13 SD_DAT4 XD_WP# SP18 R344 *0_4/S XD-CE#
23 CF_A1/XD_D4 SD_DAT6/XD_D7/MS_D3/CF_D15 31
24 30 SP14 XD_R/B# SD_CMD_R R331 *0_4/S SD-CMD
CF_DMARQ CF_CS0# MS_CD# SP15 SD_DAT3 XD_WE#
MS_INS#/CF_IORD# 29
R323 6.19K/F_4 RREF 2 28 SP8 SP16 SD_DAT2 XD_RE#
RREF SD_DAT7/XD_D2/MS_D2/CF_IOWR# SP7 SP17 XD_ALE
SD_DAT0/XD_D6/MS_D0/CF_RST# 27
26 SP6 SP18 XD_CE#
SD_DAT1/XD_D3/MS_D1/CF_IORDY SP5 SP19 XD_CLE
XD_D5/MS_BS/CF_A2 25
13 USBP3- 4 DM
13 USBP3+ 5 1
DP AV_PLL_IN C581 C530
0.1U/10V_4 SP11
C610 *5.6P/50V_4 CLK_48M_CR 1U/10V_4
48 XTLO
2

*12MHz 10 VREG R300 Can not more than 30p


R327 VREG_OUT +3VSUS_RTS
8 2 1 *0_8/S +3VSUS C572
*270K_4 Y6 5V_IN
3 *27P/50V_4
A3V3_ IN C558 C552 C557
33
1

XTLI D3V3_ IN 0.1U/10V_4 0.1U/10V_4 4.7U/6.3V_6


47 XTLI
C609 *5.6P/50V_4 0.1U/10V_4 C568
BG612000717
For 5158
11 +3VSUS
D3V3_OUT
MODE_SEL 45 0.1U/10V_4 C574 C514
MODE_SEL 4.7U/6.3V_6
R325 C585
10K/04 7 +3VSUS +3VCARD
C *47P/50V_4 A3V3_OUT D19 C
9 +3VCARD 5158_RST# 2 1 5158_RST_R#
For 5158 CARD_3V3_OUT 5158_RST_R# 13
6 C518 C573
AG33 C538 C532 C534 C526 RB501V-40
AG_PLL 46
32 0.1U/10V_4
R326 100K/F_4 5158_RST# 44 DGND2 1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
+3VSUS 12
C591 RST# DGND1 Add diode for 5158E cardreader driver lost issue
If SD_DAT1 connect to RTS5159
SP4 , MOD_SEL need to 1U/10V_4
let it to N.C

*spad-re63x213np
H34

*spad-c157np
H35

*spad-c157np
H36

*h-tr472bc315d118p2
H1

*H-TC236BC118D118P2
H2

*H-C315D118P2
H3

*H-C315D118P2
H4

*h-c354d118p2
H28

*H-TE3-8X9-13BC8P2
H9

*H-TO10X13BC8D8P2
H12

*h-tshebc315d118p2
H14

*H-TC236BC118D118P2
H27
4 IN1 CARD READER
+VIN
XD,SD,MS/MSP

1
+3VCARD +3VCARD
+3VCARD

C852
0.1U/50V_6

*spad-re142x339np
H37

*spad-c157np
H38

*spad-c134np
H39
R509

*H-TE8X9BC8D3P2
H23

*H-C315D118P2
H21

*H-TC8BE8X7_5D3P2
H19

*H-TC315BC394D118P2
H24

*H-C315D276P2
H22

*H-TO9X14BC8D3P2
H20

*H-O236X197D158X118P2
H26

*h-c354d118p2
H29

*H-C315D118P2
H25
*10K/F_4

1
B B

1
CN24
1 43 +VIN
XD_CD# XD-GND1 GND
2 XD-CD#
XD-RB# 3 42 SD-WP
XD-RE#_SD-D2 XD-R/B SD-WP
4 41
XD-CE# XD-RE SD-GND1 SD_CD#
5 XD-CE SD-CD# 40

*spad-op89-2
H40

*spad-c157np
H41

*spad-c157np
H42
XD-CLE 6 39
XD-CLE SD-GND2

*SPAD-RE100X200NP
PAD1

*H-O79X118D79X118
H11

*h-tc354bs354d118p2
H30

*h-c354d118p2
H31

*H-C55D55N
H5

*H-C67D67N
H8

*H-C197D87P2
H7

*H-C197D87P2
H6
XD-ALE 7 38 XD-RE#_SD-D2 C851
SD-D3_XD-WE XD-ALE SD-D2 SD_DAT1 0.1U/50V_6
8 37

1
XD-WP# XD-WE SD-D1 MS-D0_SD-D0_XD-D6
9 36

1
XD-WP SD-D0
10 XD-GND2 SD-GND 35
XD-D0 11 34 SD-CLK
SP11 XD-D0 SD-CLK
12 33
MS-D2_XD-D2 XD-D1 SD_VCC
13 XD-D2 SD-GND3 32
MS-D1_XD-D3_SD_D1 14 31 SD-CMD
XD-D4 XD-D3 SD-CMD SD-D3_XD-WE +VIN
15 XD-D4 SD-D3 30
MS-BS_XD-D5 16 29 Battery Hole
MS-D0_SD-D0_XD-D6 17 XD-D5 MS-GND2
28
MS-D3_XD-D7 XD-D6 MS-VCC MS-CLK
18 XD-D7 MS-SCLK 27
19 26 MS-D3_XD-D7
XD-VCC MS-P-D3

*spad-c157np
H43

*h-c118d118n
H44

*h-c91d91n
H45
20 25 MS_CD#
MS-GND1 MS-INS

*H-C236D181P2
H10

*H-C236D181P2
H15

*h-c307d181p2
H16

*H-C217D181P2
H18

*H-C217D181P2
H13

*H-C217D181P2
H17
MS-BS_XD-D5 21 24 MS-D2_XD-D2 C850 +1.8V
MS-D1_XD-D3_SD_D1 22 MS-BS MS-P-D2 MS-D0_SD-D0_XD-D6 0.1U/50V_6
23

1
MS-D1 MS-SDIO

1
C286
TAI-SOL 144-2300001900
0.1U/10V_4

A A
+3VCARD VGA Hole CPU Hole
Add for EMI request +Vcore0
+3VCARD
*h-tc315bc127d87p2
H52

*h-tc315bc127d87p2
H51

*H-R103X67D103X67N
H46

*SPAD-RE98X298NP-1
H47

*SPAD-RE98X298NP-2
H48

*SPAD-RE59X315NP-1
H49

*SPAD-RE59X315NP-2
H50
C828 R481
2.2U/6.3V_6 150K/F_4
PROJECT : OP8
1

1
C829 C810 C824
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 Quanta Computer Inc.
CLOSE CONN
Size Document Number Rev
Custom 1A
RTS5158 & CR SOCKET &HOLE
NB5/RD2
Date: Friday, March 20, 2009 Sheet 26 of 42
8 7 6 5 4 3 2 1
A B C D E

+3V_DVDD
Close to Pin6 +4.75VAVDD
L48

5
1

U15
2 *0_8

1
C550
+5V

.1U/10V_4 +5V
+5V
27
+3V +3V_DVDD +4.75VAVDD Vout Vin
10U/6.3V_8

1
C604 C586 4 C548
C543 C541 C527 C542 C602 .1U/10V_4 C584 BYP C547 C536
.1U/10V_4 10U/6.3V_8 .1U/10V_4 1U/6.3V_4 4.7U/6.3V_6 C578 2 3 1U/6.3V_4 *.1U/10V_4 10U/6.3V_8

2
1U/6.3V_4 GND EN
C544 C583 1U/6.3V_4 TPS793475 C549
C535 .1U/10V_4 .047U/25V_4
.1U/10V_4 C603
10U/6.3V_8 *.1U/10V_4 AGND AGND AGND 3475_EN R282 *10K/F_4
MAINON 20,32,35,38,39,40
R283 10K/F_4 +5V

AGND

17
6

1
U16 AGND SHIELD

DVDD_CORE

DVDD_LV

AVDD
EARPO_L C804 100UF_16V EARP_L

+
PORTA_L 26
AGND SHIELD TO Headphone jack
EARPO_R C803 100UF_16V EARP_R

+
13 ACZ_SDOUT_AUDIO 2 SDO PORTA_R 27
13 BIT_CLK_AUDIO 3
BITCLK AGND SHIELD
13 ACZ_SDIN0 R279 22_4 ACZ_SDIN0_ADC 5
SDI_CODEC
7
13 ACZ_SYNC_AUDIO
13 ACZ_RST#_AUDIO 8
SYNC
RESET#
Audio JACK: Normal Open
13 MIC1_L1 C577 2.2U/6.3V_6 EXT_MIC_L
PORTB_L
PORTB_R 14 MIC1_R1 C587 2.2U/6.3V_6 EXT_MIC_R SA_A# -->EXT HP
28 20 VREFOUT_B_L R329 4.7K_4
29
GPIO 7 / SPDIF OUT1
DMIC0 / GPIO1
VREFOUT-B R318 4.7K_4 SA_B# -->EXT MIC
C599 1U/6.3V_4 TO Audio Jack MIC
BIT_CLK_AUDIO ACZ_SDIN0_ADC
AGND Sense_B -->INT MIC

Digital
24 HP-L 28
PORT-D_L
PORT-D_R
25 HP-R 28TO Internal Speakers
C546 C545

Analog
*27P/50V_4 *27P/50V_4 R351 *0_6
15 INT_MIC_L1 C592 2.2U/6.3V_6 INT_MIC_R
PORTC_L INT_MIC_R1 C600 2.2U/6.3V_6 R301 *0_6
30 16
FOR EMI DMIC_CLK PORTC_R VREFOUT_C_L R346 2.2K_4
VREFOUT-C 21
C601 1U/6.3V_4 AGND R315 *0_6

R299 *0_6
11
PORTE_L R311 *0_6
12 AGND
PORTE_R C559 .1U/10V_4
32 9 R293 10K/F_4 R340 *0_6
SPDIF0 PCBEEP/Mono C560 .1U/10V_4 R289 47K_4 ACZ_SPKR 13,28
28 EAPD# 31
EAPD/GPIO0/SPDIF OUT 0 or 1 R295 *0_6
+3V_DVDD
R298 *5.11K/F_4 SENSE_A

VREFFILT
SENSE_A 10 +4.75VAVDD
Reserve for EAPD# R306 2.49K/F_4 SA_A# -->EXT Ear Phone C567 1 2 *1000P/50V_4
DVSS

AVSS

1 SA_A# 1

CAP2
DAP

23 R308 39.2K/F_4 SA_B#


SENSE_B R307 20K/F_4
C570 1000P/50V_4
AGND SA_B# -->EXT MIC AGND
33

18

19
22

IDT 92HD75B2X5 SENSE_B R341 100K/F_4 +4.75VAVDD


VREF_FLT

AGND
CAP2_AU

C606 1000P/50V_4

AGND AGND

C613 C605
INT_MIC_R
10U/6.3V_8 1U/6.3V_4 1
2 TO Internal Mic

C841 AGND CN4


AGND 1000P/50V_4 88266-020L

AGND From EMI request

C531 0.1U/10V_4 CN12 CN27


+3VPCU
+5VPCU 1 1
PWR_LED_R
2 2
+5V 3 3
2

EARP_L +3VPCU
EARP_R 4 4
SA_A# 5 5
6 6

2
SA_B# 7 7 MBATLED0_R
32 MBATLED0# 1 3
8 8
EXT_MIC_L 9 9 Q30
10 10 DDTC114TUA PWR_LED_R
31,32 PWR_LED# 1 3
C522 EXT_MIC_R 11 11 +3V
*180P/50V_4 C523 12 12 Q32
MBATLED0_R 13 13 DDTC114TUA
*180P/50V_4 14 14
2

SATA_LED_R
15 15
C524 3
C525 AGND HEADER 15_11 *HEADER 15_11
*180P/50V_4 *180P/50V_4
AGND
14 SATA_LED# 1 3 SATA_LED_R + 1 2 -
PROJECT : OP8
for EMI AGND TO AUDIO/B CON. Q31 Quanta Computer Inc.
AGND AGND DDTC114TUA Single Color ,Right angle
Co-layout LTW-110TLA
Size Document Number Rev
Custom 1A
TO Headphone jack Azalia 92HD75B2X5
NB5/RD2
Date: Friday, March 20, 2009 Sheet 27 of 42
A B C D E
1 2 3 4 5 6 7 8

AUDIO AMPLIFIER
+5VAMP

6 PVDD1
U17
ROUT+ 18
R_SPK+4

R_SPK-3
L4

L6
FBMA-11-160808-601A10T

FBMA-11-160808-601A10T

C21
R_SPK+

R_SPK- CN2
4
28
Change to 0.047u 15 PVDD2 ROUT- 14 3
16 C18
VDD *470P/50V_4 *470P/50V_4 2
LOUT+ 4 1
R333 0_4 HP_L_C C593 2 1 .047U/16V_6 C_SPKR_L 5 8 DC impedance 0.35ohm
27 HP-L LIN- LOUT-
R330 0_4 HP_R_C C588 2 1 .047U/16V_6 C_SPKR_R 17 INT SPEAKER CONN
27 HP-R RIN-
A SHUTDOW N 19 A
PC_BEEP 9 LIN+
INT. SPEAKER

C575

C598

C582

C597
7 12 L_SPK+2 L5 FBMA-11-160808-601A10T L_SPK+
RIN+ NC
EPAD 21

2
AGND C608 2 1 0.47U/10V_6 AMP_BYPASS 10 1 L_SPK-1 L7 FBMA-11-160808-601A10T L_SPK-
BYPASS GND1
GND2 11 Vrms = Vpp / 2 √2

100P/50V_4

100P/50V_4

100P/50V_4

100P/50V_4
AUDIO_G0 2 13

1
AUDIO_G1 GAIN0 GND3
3 GAIN1 GND4 20
+5VAMP SI-2 modified -- Power = (Vrms) 2/ R
TPA6017A2/FAN7031/LM4874 C19 C20
for EMI *470P/50V_4 *470P/50V_4 QT8 speaker -- 3.2ohm / 2W
AGND AGND AGND AGND AGND suggestion

6017A2 Gain Table R334 R309

*100K/F_4 100K/F_4 +3V R520 *0_6


GAIN0 GAIN1 AV RIN +5VAMP
AUDIO_G0 +5V R521 *0_6
0 0 6dB 90K
0 1 10dB 70K AUDIO_G1 R302 R522 *0_6
R332 *0_6/S

2
1 0 15.6dB 45K 2 499K/F_4
32 VOLMUTE#
R324 R310

1
1 1 21.6dB 25K 3 C590 C596 C589 C595 R352 *0_6
1K/F_4 *1K/F_4 10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.047U/25V_4
1 R355 *0_6
1 27 EAPD#

2
D18
BAT54A AGND

B AGND R386, R310 change B


AGND to SHORT-1A on PV

+5V
PC-BEEP G955 /FON
CPU FAN signal have
internal
C731 1U/10V_4

+5VAMP pull Hi to
VIN , R420 R421
C594 *.1U/16V/04 +3V maybe can
AGND remove 10K/F_4 U23
2 3 +5VFAN1
R435 VIN VO
GND 5
4.7K_6 FAN_SMBALERT# 1 6
/FON GND
5

7
1 C611 *0.1UF/06 TO AMP 32 FAN1ON 4
GND
8
32 KEY_BEEP VSET GND
4 R348 *1K/04 PC_BEEP
32 FAN1SIG
13,27 ACZ_SPKR 2 FANPWR = 1.6*VSET G995

U18 R349 CN20


TO CODE 20 mil
3

2
*NC7SZ86 *1K/04 +5VFAN1 1 1
2 2
C612 C607 3

1
.047U/16V_6 .047U/16V_6 C767 C768 3
AGND FAN CONN
AGND 2.2U/6.3V_6 0.1U/10V_4
R347 *0_4 Change to 0.047u
C C
AMP_GND

Modem CONN
MBZR1005014
H33

MBZR1005014
H32
1

+3V

MDC
CN26
1 2 C836 C838 C835
ACZ_SDOUT_AUDIO_MDC GND REV 0.1U/10V_4 2.2U/6.3V_6 1000P/50V_4
13 ACZ_SDOUT_AUDIO_MDC 3 A_SDO REV 4
5 GND VCC 6
ACZ_SYNC_AUDIO_MDC 7 8
13 ACZ_SYNC_AUDIO_MDC AC_SDIN1_MDC A_SYNC GND
13 ACZ_SDIN1 9 A_SDI GND 10
R316 33_4 11 12 R511 *0_4/S
A_RST# A_BCLK BIT_CLK_AUDIO_MDC 13
C576 *10P/50V_4 MDC CONN
13 ACZ_RST#_AUDIO_MDC For EMI
D C837 D
*10P/50V_4

PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
AMP_TPA6017/MDC1.5/CPU FAN
NB5/RD2
Date: Friday, March 20, 2009 Sheet 28 of 42
1 2 3 4 5 6 7 8
5 4 3 2 1

BLUETOOTH +3VPCU +3VSUS


LEFT SIDE USBX1 and E-SATA/USB COMBO
R357
4.7K_4
+5VSUS
U29 80 mils (Iout=2A) 29

1
2 8 USB0PWR
VIN1 OUT3
3 VIN2 OUT2 7
Q34 4 6 C805
ME2303T1 EN OUT1 C797 C798 +
2 1 GND OC 5

100UF_16V
*470P/50V_4 0.1U/10V_4
C793 G545B2PU8
1U/10V_4 (TPS2061D)

3
3
D D
C614 AL000545017
2 Q33 0.1U/10V_4
14 BT_OFF# IC(8P)G545B2P8U(MSOP-8) - 1.5A
PDTC144EU 24mil
BTV AL000545000

1
IC OTHER(8P) G545A2P8U(MSOP-8) - 2A
C616 C618
CN13 10U/6.3V_8 0.1U/10V_4
BLUE TOOTH CONN
87213-0600-6P-L Check the GMT for the chip

BTCON_P1
6 T119
BLUELED
5 BLUELED 31,32,33
USBP9- USBP1+
4 USBP9- 13
USBP9+ USBP1-
3 USBP9+ 13
2 BTV
1

*Clamp-Diode_6

1
2

2
C402
C395
*Clamp-Diode_6

SATA CD-ROM C389 C796


C C
0.1U/10V_4 *470P/50V_4
CN25
1 S1
2
GND1 USB & ESATA
14 SATA_TXP1 TXP
14 SATA_TXN1 3 14 CN22
TXN 14
4 GND2 16 16
5 *WCM-2012-900T(400mA) USB0PWR 1
14 SATA_RXN1 RXN USB Vcc
6 13 USBP1- 4 3 USBP1- 2
14 SATA_RXP1 RXP D-
7 1 2 USBP1+ 3
GND3 S7 13 USBP1+ D+
R478 1K/F_4 4
P1 L36 GND

*47P/50V_4

*47P/50V_4
1 2 8 DP

C419

C418
9 +5V
+5V 10 +5V 5 GND Shield 14
11 15 C413 0.01U/16V_4 SATA_TXP2_C 6
MD 15 14 SATA_TXP2 A+
12 17 C414 0.01U/16V_4 SATA_TXN2_C 7 15
GND 17 14 SATA_TXN2 A- Shield
13 GND 8 GND
P6 C394 0.01U/16V_4 SATA_RXN2_C 9 12
14 SATA_RXN2 B- Shield
SATA ODD C392 0.01U/16V_4 SATA_RXP2_C 10
14 SATA_RXP2 B+
11 GND Shield 13

Close to ESATA USB_ESATA_COMBO


CON from AMD
120 mils recommend
+5V

C815 C821 C819 C822 C820


B B
10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
RIGHT SIDE USBX2
CN23 +5VSUS

SATA HDD GND1 1


+3V_HDD1
1
2
+5VSUS

TXP 2 SATA_TXP0 14 3
TXN 3 SATA_TXN0 14 4
GND2 4 13 USBP8+ 5
5 C36
RXN SATA_RXN0 14 13 USBP8- 6
6 0.1U/10V_4
RXP SATA_RXP0 14 7
7 C459 C444
GND3 +3V_HDD1 13 USBP5+ 8
*10U/6.3V_8 *.1U/10V_4
13 USBP5- 9
10
3.3V 8
9 CN6
3.3V +5V: 2 A(4 Pin) DUAL USB CONN
3.3V 10
GND 11 PCB footprint
12 +5V_HDD1 +3V_HDD1 +3V +3V: 2 A(4 Pin)
GND BL123-10R-10P-L-QT6
GND 13
14 Gnd : (5 Pin)
5V R240 *0_8 +5V_HDD1
5V 15
5V 16
GND 17
RSVD 18
A
GND 19 A

12V 20
21 +5V_HDD1 +5V
12V
12V 22
C410 C415 C417 C407
R170 *0_8/S 10U/6.3V_8 4.7U/6.3V_6 0.1U/10V_4 10U/6.3V_8

LD2722F-SRLL6 PROJECT : OP8


Quanta Computer Inc.
Size Document Number Rev
Custom 1A
BT/USBX3/ESATA/SATA ODD/HDD
NB5/RD2
Date: Friday, March 20, 2009 Sheet 29 of 42
5 4 3 2 1
5 4 3 2 1

+DVDD12 +EVDD12
+3VLANVCC
Power trace Layout 寬 寬 > 30mil
+3V_LAN 30
+CTRL12DVDD R237 *0_6/S
Power trace Layout 寬 寬 > 30mil C469
LANVCC C436 C463 C462
4.7U/6.3V_6 .1U/10V_4 .1U/10V_4 .1U/10V_4
C397 C457 C409 C458 C421 C426 1.2W
.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 *.1U/10V_4 1U/10V_4 364mA
D D

CLOSE to Pin 29,37


CLOSE to Pin 10, 13, 30, 36 LAN-AGND
close to pin 19 +3V_A_LAN

C398 C435
.1U/10V_4 *.1U/10V_4

+CTRL12DVDD XTAL2
CLOSE to Pin 1
C403 10U/6.3V_8 XTAL1 1 2
C472 .1U/10V_4
C429 Y3 C416
R177 2.49K/F_4 LANRSET 25MHZ
33P/50V_4 33P/50V_4

+CTRL12A
C400 10U/6.3V_8 LAN_YLED#
C401 .1U/10V_4 +3V R199 1K/F_4
+3V_LAN +3V_LAN
Delete R261 and add D38 as current loss issue
U9
48
47
46
45
44
43
42
41
40
39
38
37
R232 100/F_4 U10
C R233 EECS 1 8 C
VCTRL12A/SROUT12
GND4
RSET
VCTR12DVDDSR
NC/VDDSR
NC/ENSWREG
CKTAL2
CKTAL1
NC/AVDD33
NC/LV_PLL
LED0
VDD33B
*1K/F_4 EESK_LED100# CS VCC C422
2 SK DC 7
EEDI_LED10# 3 6 .1U/10V_4
ISOLATEB EEDO DI ORG
2 1 LAN_DISABLE# 13,32 4 DO GND 5
D16
+3V_A_LAN 1 36 +DVDD12 *RB501V-40 if ISOLATEB pin *M93C46-WMN6TP
MDI0+ AVDD33 DVDD12B EESK_LED100# R220
2 MDIP0 LED1/EESK 35 pull-low,the LAN
MDI0- 3 34 EEDI_LED10# 15K/F_4 chip will not drive R196 1 2 +3V_LAN
MDIN0 LED2/EEDI EEDO 3.6K_4
4 NC/FB12 LED3/EEDO 33 it's PCI-E outputs
MDI1+ 5 32 EECS
MDI1- MDIP1 EECS ( excluding
6 MDIN1 GND3 31
PCIE_WAKE# pin ) Check the EEPROM for LAN
7 GND1 RTL8103EL DVDD12A 30 +DVDD12
8 NC/MDIP2 VDD33A 29 +3V_LAN
9 28 ISOLATEB
NC/MDIN2 ISOLATEB LAN_REST_R# R235 *0_4
+DVDD12 10 DVDD12/AVDD12 PERSTB 27 LAN_REST# 32
11 26 PCIE_WAKE# R210 *0_6/S
NC/MDIP3 LANW AKEB PCIE_WAKE# 13,33
12 NC/MDIN3 CLKREQB 25
+3V_LAN R209 *0_6/S
NC/SMDATA
REFCLK_N
REFCLK_P

NC/SMCLK
DVDD12

EVDD12

C839 0.1U/10V_4
HSON
EGND
HSOP
GND2

HSIN
HSIP

LAN-AGND
U32

5
DB modified to short-pad
13
14
15
16
17
18
19
20
21
22
23
24

12 LAN_PLTRST# 2
4 LAN_REST_R#
+DVDD12 LAN-AGND 1

TC7SH08FU
9 PCIE_TXP2_LAN

3
PCIE_RXN2_LAN_L C471 .1U/10V_4
B 9 PCIE_TXN2_LAN PCIE_RXN2_LAN 9 B
PCIE_RXP2_LAN_L C470 .1U/10V_4
PCIE_RXP2_LAN 9
PCIE_LAN_CLKP
2 PCIE_LAN_CLKP
PCIE_LAN_CLKN +EVDD12 FOR EMI
2 PCIE_LAN_CLKN
C764 .1U/10V_4
RJ45
CN19

+3V_LAN R433 *0_6/S LAN_GLED 12


LAN_GLED# LED_GRE_P
11 LED_GRE_N
Add for EMI request
8 RX1-
R534 *75/F_4 4
LAN_MX1- RX1+
LAN_Transformer 7 RX0-
3 TX1-
C853 6
*1000P/3KV_1808 LAN_MX1+ TX1+
U28 2
LAN_MX0- RX0+
5 TX0- GND1 14
MDI0+ 1 16 LAN_MX0+ Bios need change LAN_MX0+ 1
RD+ RX+ TX0+
GND 13
MDI0- 3 15 LAN_MCT0 C792 LAN_MCT0_1 R475 75/F_4
RD- CT 0.01U/100V_0603 R425 *0_6/S LAN_YLED
+3V_LAN 10 LED_YEL_P
V_DAC_1 2 14 LAN_MX0- EEDI_LED10# R515 *0_6 LAN_YLED# 9
CT RX- LED_YEL_N
MDI1+ 6 9 LAN_MX1-
TD+ TX-
MDI1- 8 10 LAN_MCT1 C791 LAN_MCT0_2 R474 75/F_4 EESK_LED100# R516 0_6 RJ45_CONN
TD- CMT 0.01U/100V_0603 .1U/10V_4
A V_DAC_2 7 11 LAN_MX1+ C733 Fixed RJ45 Pin define (0829) A
CT TX+ LAN_GLED# FOR EMI
C790
Link
C794 C795 NS681684 1000P/3KV_1808
.01U/16V_4 .01U/16V_4 LAN_YLED# LAN_YLED#

C760 C728
PROJECT : OP8
*.01U/16V_4 *.01U/16V_4 Quanta Computer Inc.
Size Document Number Rev
Custom 1A
RTL8102EL/RJ45
NB5/RD2
Date: Friday, March 20, 2009 Sheet 30 of 42
5 4 3 2 1
5 4 3 2 1

+PWLEDVCC NBSWON1# POWER BUTTON CONNECT


MY5 C297 220P/50V_4 MY1 C287 220P/50V_4 MX7 C303 220P/50V_4
31

1
C736 C738 G2 MY6 C755 220P/50V_4 MY2 C751 220P/50V_4 MX0 C296 220P/50V_4
C330 *SHORT_ PAD1 MY3 C309 220P/50V_4 MY4 C312 220P/50V_4 MX5 C301 220P/50V_4
0.1U/10V_4 0.1U/10V_4 MY7 C756 220P/50V_4 MY0 C300 220P/50V_4 MX1 C295 220P/50V_4

2
0.1U/10V_4

2
MY8 C310 220P/50V_4 MX4 C304 220P/50V_4 MY12 C754 220P/50V_4
MY9 C305 220P/50V_4 MX6 C302 220P/50V_4 MY13 C308 220P/50V_4
MY10 C752 220P/50V_4 MX3 C298 220P/50V_4 MY14 C753 220P/50V_4
D D
MY11 C307 220P/50V_4 MX2 C299 220P/50V_4 MY15 C306 220P/50V_4

+3VPCU
C737 0.1U/10V_4
1. +3VPCU(LIDSWITCH PWR)
2. PWR_LED#
3. GND
KEYBOARD PULL-UP CN8
4. NumLED MX1
1 1 1
PWR_LED_R# 5. +5VPCU (PWRLED PWR) RP37 MX7 2
2 MY0 MX6 2
3 10 1 3 3
NUMLED_R# 6. WLSLED_ON# MY15 9 2 MY5 MY9 4
R4271 4 4
+5VPCU 2 39_6 +PWLEDVCC 5
MY11 8 3 MY4 MX4 5 5
WLSLED_ON_R# 7. WLSLED_OFF# MY13 7 4 MY8 MX5 6
WLSLED_OFF_R# 6 MY3 MY0 6
7 6 5 7 7
RF_SW# 8. RF_SW# MX2 8
8 MX3 8
23,32 LID_EC# +3VPCU 10K_10P8R 9
9 MY5 9
32 NBSWON1# 10 9. LIDSWITCH MY1
10 10
RP58 11
CN7 MY10 MX0 11
DUAL USB CONN
10.POWERON# MY9
10 1
MY14 MY2
12 12
9 2 13 13
MY1 8 3 MY12 MY4 14
MY2 MY6 MY7 14
7 4 15 15
+3V MY7 6 5 MY8 16
+3VPCU MY6 16
17 17
C 10K_10P8R MY3 18 C
MY12 18
19 19
2

R530 R432 8.2K_4 MY16 MY13 20


10K/04 R431 8.2K_4 MY17 MY14 20
21 21
MY11 22
MY10 22
23 23
1 3 PWR_LED_R# MY15 24
27,32 PWR_LED# 32 RF_SW# MY[0..17] 24
MY16 25
32 MY[0..17] 25
Q17 MY17 26
DDTC114TUA 26
MX[0..7]
32 MX[0..7]
GB1RF260-1253-8F
+3V

Change from 144 to 114 chip for leakage current


2

+3V

3P WHITE LED

2
LED5 R356 360/F_6 朝朝 LED1 2P WHITE R25 360/F_6
1 3 CARD_LED1_L 1 2 CARD_LED1 1 2 1 2CAP_LED 1 2
26 CARD_LED# +5V +5V
FOR 16"
Q29 朝朝 LED2 *2P WHITE
DDTC114TUA 1 3 CAP_LED_L 1 2CAP_LED Del R167
+5V
2N7002E
32 CAPSLED#
FOR 17.3"
Q14 Q6
DDTC114TUA
Dual Color ,Right angle
B B
1 3 WLSLED_ON_R#
+3V
+3VPCU +3V

2
R126 DDTC114TUA
2

10K/F_4

Q28
朝朝 (Amber) LED3
R155 510_6
FOR 16"
R517 R518 TP_LED1# 1 3 TP_LED1_R TPLD3 1 2 Amber
32 TP_LED1# 4 2 +5V
10K/04 10K/04 R160 360/F_6
3

TP_LED2# 1 3 TP_LED2_R TPLD4 1 2 4 2 +


32 TP_LED2# 3 1 +5V
RB501V-40 D30 Anode
Q27 (White) LED 4P WHITE/AMBER 3 1 +
1 2 WLSLED_OFF_R# RF_LINK_R# 2
32 RF_LINK_1#
TPLD3 White
DDTC114TUA DDTC114TUA 4 2
FOR 17.3"

2
3

Q16 TPLD4
Q15 3 1
R519
1

+3V LED4 *LED 4P WHITE/AMBER


2N7002E Close LED1
RF_LINK_R# 2
32,33 RF_LINK#
C363
Close LED5 TPLD3
0_4
3

*AVL5CS
Q19 C615
1

2 DDTC114TUA CARD_LED1_L CARD_LED1


29,32,33 BLUELED
*AVL5CS C360
TP_LED1_R TPLD4
*AVLC5S
1

A Close LED3 C385 A


+3V TPLD3
NUMLED# C40 *AVLC5S
CAP_LED
2

DDTC114TUA *AVLC5S
C41 C383

C356 Q18
CAP_LED_L CAP_LED
*AVLC5S
TP_LED2_R
*AVLC5S
TPLD4
PROJECT : OP8
*.1U/10V_4 32 NUMLED# 1 3 NUMLED_R# Quanta Computer Inc.
Close LED4 Close LED2
Size Document Number Rev
Custom 1A
LED/KEYBOARD/SW_BOARD
NB5/RD2
Date: Friday, March 20, 2009 Sheet 31 of 42
5 4 3 2 1
5 4 3 2 1

+3VPCU +3VPCU +3VPCU_EC +5VPCU

12 SERIRQ
SERIRQ
LFRAME#
3
4
U8

SERIRQ VCC1 9
22
C388
C425
C432
4.7U/6.3V_6
0.1U/10V_4
0.1U/10V_4
L34
1
U7
*GMT_G910T21U

Vout Vin 3
+5VSUS R134

R135
4.7K_4

4.7K_4
TPCLK

TPDATA
32

GND
12,33 LFRAME# LFRAME VCC2
LAD0 10 33 C450 0.1U/10V_4 BLM18BA470SN1(47,300MA)_6 C390 close conn
12,33 LAD0 LAD0 VCC3
LAD1 8 96 C452 0.1U/10V_4
12,33 LAD1 LAD1 VCC4
LAD2 7 111 C449 0.1U/10V_4 1U/10V_4
12,33 LAD2

2
LAD3 LAD2 VCC5 C384 0.1U/10V_4
5 125
12,33 LAD3
PCLK_LPC_KB3920 12
LAD3 VCC6
67 C391 4.7U/6.3V_6 TOUCH PAD CONNECTOR
12 PCLK_LPC_KB3920 PCICLK AVCC
R197 *0_4/S 13
12 PCIRST# PCIRST/GPIO5
CLKRUN# 38 +3VPCU_EC 25 mils
D 12 CLKRUN# CLKRUN D
C747 0.1U/10V_4
+5VSUS
SCI1# 20
GATEA20 SCI/GPIOE TEMP_MBAT C746 0.1U/10V_4
13 GATEA20 1 GA20/GPIO0 AD0/GPI38 63 TEMP_MBAT 40 +5V
RCIN# 2 64 AD_TYPE
13 RCIN# KBRST/GPIO1 AD1/GPI39
3920_RST# 37 65 AD_AIR
ECRST AD2/GPI3A AD_AIR 40
66 SYS_I
AD3/GPI3B SYS_I 40 12
MX0 55
31 MX0 KSI0/GPIO30 11
MX1 56 68 CC-SET TPCLK L33 BLM18BA470SN1(47,300MA)_6 TPCLK-1
31 MX1 KSI1/GPIO31 DA0/GPO3C CC-SET 40 10
MX2 57 70 TPDATA L31 BLM18BA470SN1(47,300MA)_6 TPDATA-1
31 MX2 KSI2/GPIO32 DA1/GPO3D 9
MX3 58 71 FAN1ON TP_LED1#
31 MX3 KSI3/GPIO33 DA2/GPO3E FAN1ON 28 8
MX4 59 72 D/C# C320 TP_LED2#
31 MX4 KSI4/GPIO34 DA3/GPO3F D/C# 40 7
MX5 60 C319
31 MX5 KSI5/GPIO35 6
MX6 61 21 PWM_VADJ *10P/50V_4 *10P/50V_4 TP_L
31 MX6 KSI6/GPIO36 PW M1/GPIOF PWM_VADJ 23 5
MX7 62 23 KEY_BEEP (1KHz) TP_R
31 MX7 KSI7/GPIO37 PW M2/GPIO10 KEY_BEEP 28 4
MY0 3
31 MY0 39 KSO0/GPIO20 FANPW M1/GPIO12 26 CV-SET 40 2
MY1 40 27 EC_ACLIM
31 MY1 KSO1/GPIO21 FANPW M2/GPIO13 EC_ACLIM 40 1
MY2 41 28 FAN1SIG
31 MY2 KSO2/GPIO22 FANFB1/GPIO14 FAN1SIG 28
MY3 42 29
31 MY3 KSO3/GPIO23 FANFB2/GPIO15 4
MY4 43 TP_L_CONN CN9
31 MY4 KSO4/GPIO24 3
MY5 44 77 MBCLK Battery charge/discharge TP_R_CONN TOUCH PAD CONN
31 MY5 KSO5/GPIO25 SCL1/GPIO44 MBCLK 40 2
MY6 45 78 MBDATA Cap button PCB footprint
31 MY6 KSO6/GPIO26 SDA1/GPIO45 MBDATA 40 1
MY7 46 79 MBCLK2 BL121-12R-12P-L-QT6
31 MY7 KSO7/GPIO27 SCL2/GPIO46 MBCLK2 5,18
MY8 47 80 MBDATA2 VGA thermal
31 MY8 KSO8/GPIO28 SDA2/GPIO47 MBDATA2 5,18
MY9 48 system thermal
31 MY9 KSO9/GPIO29
MY10 49 CN10
31
31
MY10
MY11
MY11
MY12
50
KSO10/GPIO2A
KSO11/GPIO2B
*BL123-04R-TAND FOR 16"
51
31
31
MY12
MY13
MY13 52
KSO12/GPIO2C
KSO13/GPIO2D TOUCH PAD L/R FOR 17" only TOUCH PAD ON/OFF
C MY14 53 6 SUSB# SW1 C
31 MY14 KSO14/GPIO2E GPIO4 SUSB# 13
MY15 54 3 1
31 MY15 KSO15/GPIO2F
MY16 81 14 HWPG MY7 4 2 MX4
31 MY16 KSO16/GPIO48 GPIO7 HWPG 23,34,35,37,38
MY17 82 15 PM_BATLOW1# 6 5
31 MY17 KSO17/GPIO49 GPIO8
83 PSCLK1/GPIO4A GPIOA 16 SUSC#
SUSC# 13
TOUCH PAD L/R FOR 16"
SLPBTN# 84 17 RF_SW# TMG-533-S-V-TR
PSDAT1/GPIO4B GPIOB RF_SW# 31
R194 10K/F_4 85 18 SW3
+3VPCU PSCLK2/GPIO4C GPIOC
ACIN 86 19 NBSWON1# TP_L R145 1K/F_4 TP_L_CONN 3 1
40 ACIN PSDAT2/GPIO4D GPIOD NBSWON1# 31
TPCLK 87 25 4 2
PSCLK3/GPIO4E GPIO11 LAN_REST# 30

2
TPDATA 88 PSDAT3/GPIO4F GPIO16
GPIO17
30
31 SWI#1
EC_DEBUG1 33
C357
6 5
TOUCH PAD ON/OFF
BIOS_RD# 119 32 KBSMI#1 0.1U/10V_4
FOR 17.3"

1
BIOS_WR# RD GPIO18 TMG-533-S-V-TR
120 WR
BIOS_CS# 128 34 VRON SW2
SELMEM/SPICS GPIO19 VRON 35,36
R200 *0_4/S 89 36 NUMLED# SW4 3 1
12 SERR# SELIO/GPIO50 GPIO1A NUMLED# 31
76 TP_R R358 1K/F_4 TP_R_CONN 3 1 MY7 4 2 MX4
AD5/GPI43
109 D0/GPXD0
reserved for H/W CIR 4 2 6 5

2
110 D1/GPXD1 6 5
112 C617
D2/GPXD2 0.1U/10V_4
114 73

1
RF_LINK# D3/GPXD3 GPIO40 TMG-533-S-V-TR *TOUCH PAD EN SW
31,33 RF_LINK# 115 D4/GPXD4 GPIO41 74
BLUELED 116 75 OP_FAN_SEL
D5/GPXD5 AD4/GPI42 T24
117 90 DNBSWON#1 DB modified
T26 118
D6/GPXD6
D7/GPXD7
GPIO52
GPIO53 91 CAPSLED#
CAPSLED# 31
TOUCH PAD L/R
92 PWR_LED#
GPIO54 PWR_LED# 27,31
R226 *4.7K_4 BIOS_A0 97 93 ECPWROK
A0/GPXA0 GPIO55 ECPWROK 5,16
SUSON 98 95 RSMRST#
37,39 SUSON A1/GPXA1 GPIO56 RSMRST# 13
MAINON 99 121 VOLMUTE#
20,27,35,38,39,40 MAINON A2/GPXA2 GPIO57 VOLMUTE# 28
LAN_POWER 100 126 SPI_CLK
B 39 LAN_POWER A3/GPXA3 GPIO58 B
S5_ON 101 127 LID_EC#
38,39 S5_ON A4/GPXA4 GPIO59 LID_EC# 23,31
VR2.5_ON R531 *10K/F_4
37 VR2.5_ON 102
103
A5/GPXA5 Project Model GPIO42 +3VPCU
13,30 LAN_DISABLE# A6/GPXA6 CRY2 C453 22P/50V_4
31 RF_LINK_1#
MBATLED0#
104
105
A7/GPXA7 XCLKO 123 OPX 16" Low OP_FAN_SEL R532 10K/F_4
27 MBATLED0# A8/GPXA8
4

TP_LED1#
106
107
A9/GPXA9
122 CRY1 Y2
OPX 17.3" High +3VPCU
31 TP_LED1# A10/GPXA10 XCLKI
TP_LED2# 108 32.768KHZ GPIO42 control fan table
31 TP_LED2# A11/GPXA11
11
1

GND1 BLUELED R227 100K/F_4


GND2 24 29,31,33 BLUELED
Modify from RF LED control 35
GND3 C454 22P/50V_4
124 V18R GND4 94
113 C512
GND5
2

69 +3V R195 *10K/F_4 HWPG 0.1U/10V_4


C451 C475 AGND
0.1U/10V_4 4.7U/6.3V_6 U30 R248
1

KB3926 BIOS_CS# 1 8
+3VPCU CE# VDD
R184 10K/F_4 NBSWON1# SPI_CLK R229 33_4 6 10K/F_4
For KB3926 C version BIOS_WR# SCK
5 SI
BIOS_RD# 2 7 SPI_7P
R183 10K/F_4 SLPBTN# SO HOLD#
+3VPCU R172 4.7K_4 MBCLK R228 10K/F_4 SPI_3P 3 4
+3VPCU W P# VSS
R175 4.7K_4 MBDATA
R208 *8.2K_4 PM_BATLOW# MX25L8005
SCI1# D11 1 2 CH501H-40PT R166 *8.2K_4 CLKRUN#
SCI# 13
D9 R206 *8.2K_4 SERIRQ SST AKE5GFK0Z09 1M byte
1SS355

PM_BATLOW1# D13
SB internal pull Hi 10k WINBOND AKE3GFP0N08 SPI
A 1 2 CH501H-40PT PM_BATLOW# 13 BIOS A
to 3v_s5 PME AKE3GZP0500
AD_TYPE R168 100/F_4
AD_ID 40
DNBSWON#1 D14 RB500V-40
EON AKE3GZP0Q00
DNBSWON# 13
Change D12, D16 to RB500
for current loss
2

C387
R167
24.3K/F_4
PROJECT : OP8
KBSMI#1 D10 RB500V-40
KBSMI# 13
3920_RST#
3920_RST# 5,40 Quanta Computer Inc.
1

C386 0.1U/10V_4
SB internal pull Hi R163 47K_4 2 1 Size Document Number Rev
+3VPCU Custom
SWI#1 D12 1 2 *CH501H-40PT L-F KB3926/ROM/TP 1A
SWI# 13 10k to 3v_s5 0.1U/10V_4 NB5/RD2
Date: Friday, March 20, 2009 Sheet 32 of 42
5 4 3 2 1
A B C D E

Mini PCI-E Card 1 WLAN


+3V
+3VSUS

R366 *10K/F_4
+1.5V
33

2
C630 C629 C24
0.01U/16V_4 0.1U/10V_4 10U/6.3V_8
+1.5V
D D
3 1 MINICAR_PME#
13,30 PCIE_WAKE#
CN15 Q38
R359 *0_6 51 52 *PDTC144EU
+5V Reserved +3.3V
49 Reserved GND 50
47 Reserved +1.5V 48
45 46 MINI_BLED R15 *0_4 +3V
32 EC_DEBUG1 Reserved LED_W PAN# BLUELED 29,31,32
43 44 RF_LINK#
Reserved LED_W LAN# RF_LINK# 31,32
41 42 R16 10K/F_4
Reserved LED_W W AN# +3V
39 Reserved GND 40
37 Reserved USB_D+ 38 USBP10+ 13
35 36 C488 C631
GND USB_D- USBP10- 13
PCIE_TXP1 33 34 0.1U/10V_4 10U/6.3V_8
9 PCIE_TXP1 PETp0 GND
PCIE_TXN1 31 32 DAT_SMB R17 *0_4/S PDAT_SMB 2,6,7,13
9 PCIE_TXN1 PETn0 SMB_DATA
29 30 CLK_SMB R18 *0_4/S PCLK_SMB 2,6,7,13
GND SMB_CLK
27 GND +1.5V 28
PCIE_RXP1 25 26
9 PCIE_RXP1 PERp0 GND
PCIE_RXN1 23 24
9 PCIE_RXN1 PERn0 +3.3Vaux
21 22 MINI_PLTRST#
GND PERST# MINI_PLTRST# 12
PCLK_LPC_DEBUG 19 20
12 PCLK_LPC_DEBUG Reserved W _DISABLE# RF_OFF# 12
MINI_PLTRST# 17 18 INTEL WLAN
Reserved GND +3V
CARD PIN 20
15 16 LAD0 LAD0 12,32 W_DISABLE#
PCIE_MINI1_CLKP GND Reserved LAD1
2 PCIE_MINI1_CLKP 13 REFCLK+ Reserved 14 LAD1 12,32 have
PCIE_MINI1_CLKN 11 12 LAD2 LAD2 12,32
2 PCIE_MINI1_CLKN REFCLK- Reserved internal
9 10 LAD3 LAD3 12,32
T60 CLK_MINI_OE# GND Reserved LFRAME# pull-up 110k
7 CLKREQ# Reserved 8 LFRAME# 12,32
14 BT_COMBO_EN# 5 6 ohm C621 C25
BT_CHCLK +1.5V 0.1U/10V_4 1U/10V_4
3 BT_DATA GND 4
T61 MINICAR_PME# 1 2
W AKE# +3.3V
C C
MINI PCIE H=4.0
BT_DATA,BT_CHCLK,CLKREQ# R365
internal pull-DOWN 100k *10K/F_4
ohm

PCLK_LPC_DEBUG R364 *0_4 C623 *27PF/50V_4

for EMI request

B B

A A

PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Mini CARD
NB5/RD2
Date: Friday, March 20, 2009 Sheet 33 of 42
A B C D E
5 4 3 2 1

+3V 2,3,5,6,7,10,11,12,13,14,15,16,20,23,24,25,27,28,29,30,31,32,33,35,39

DC/DC +3VPCU/+ 5VPCU/ +12VALW


TON: 5V / 3.3V
34
GND = 400 / 500KHz
+5VPCU 27,31,32,35,36,37,38 REF = 400 / 300KHz
VCC = 200 / 300KHz
+3VPCU 5,12,23,27,29,31,32,36,37,38,40
+VIN
D +3VSUS 13,26,29,33,35,37,39 DB modify
D

+3VS5 5,7,12,13,14,15,16,39
+5VAL +5V_VCC1
+5VSUS 23,29,32,39

2200P/50VB_4

0.1U/50VB_6

10U/25VD_1206
PR153

PC196

PC197

PC194
+VIN PD15 PR152 2 1
+5V 5,15,20,23,24,25,27,28,29,31,32,33,35,38,39 UDZS5.6BTE-17 1K_4

4.7U/6.3VC_6
1 2 *47_6
+3VLANVCC 30,39 +

PC112
2 1
PR151 Place these CAPs 3.3 Volt +/- 5%

6237ONLDO
*0_4 150K/F_4
PR154 close to FETs

5 Volt +/- 5% Place these CAPs


+3VPCU
C/C:8A
10U/25VD_1206

0.1U/50VB_6

2200P/50VB_4
6237VIN PC108
close to FETs
PC92

PC165

PC166
PC109 PC110 1U/10VC_4
+5VPCU P/C:10A

5
6
7
8
0.1U/50VB_6
0.1U/10VC_4

PC111

REF
C/C:8A

1
*1U/10VC_4 6236AGND
6236AGND 4
P/C:10A PQ55

8
7
6
5
PR149 AO4496
0_4

2
8
7
6
5
4
3
2
1
4 6236AGND
6236AGND PL13 +3VPCU

LDOREFIN
LDO
IN
RTC
ONLDO
VCC
TON
REF

3
2
1
PC107 REFIN2 2.5uH/7.5A_10
Vout=0.7(Ra+Rb)/Rb PQ48 *0.1U/10VC_4 3V_LX

6236AGND
C C
AO4496 PR148

5
6
7
8

330U/6.3V_ESR25_6X5.8
+5VPCU 9 32 309K/F_4
+5VPCU Rb around 49.9k BYP REFIN2

6236AGND

0.1U/10VC_4
PL12 10 31 1 2
1
2
3

1
2.5uH/7.5A_10 6236FB1 OUT1 PU7 ILIM2 PR211
11 FB1 OUT2 30

PC198

PC199
PR143 1 2 12 29 4 2.2_6 +
309K/F_4 HW PG ILIM1 RT8206 SKIP PGOOD2 PR147
13 28

1
2

6237ON1 PGOOD1 PGOOD2 0_4


14 27

2
ON1 ON2
2

8
7
6
5
330U/6.3V_ESR25_6X5.8

PR203 5V_DH 15 26 3V_DH PC195

1
DH1 DH2
0.1U/10VC_4

Ra 2.2_6 5V_LX 16 25 2200P/50VA_6


LX1 LX2
1

PC192
PC190

+ PR144 4 5V_DL

SECFB
1

3
2
1
AGND
PGND
+3VPCU

0.1U/50VB_6

PC104
*0_4

BST1

BST2
VDD
PAD
1

DL1

DL2
PC105 PQ54
2

2
PC169 PQ51 0.1U/50VB_6 AO4712
2

2200P/50VA_6 AO4712

5VBST1R
Rb

33

17
18
19
20
21
22
23
24

5
6
7
8
Rds(on) 15m ohm PR146
PR145 PR136 1_6 *0_4

3VBST2R
1
2
3

0_4 5VBST1

3VBST2
Rds(on) 15m ohm 1 2

1
39 MAIND 4
1

PR135 PC106 PQ31


+5VAL 1 2 *0.1U/10VC_4 6236AGND SI4800BDY
6236AGND PD14 1_6 3V_DL
1 6236AGND
PC101 6236AGND

2
CHN217PT 3 PR210 PR140
I_lim*MOSFET(RDSON)=V_ILIM(mV)/10 +3V

3
2
1
PC102 0_4
2 0.1U/50VB_6 1U/10VC_4 PR142 PGOOD2
V_ILIM(mV)=5uA*R_ILIM +3V
*SHORT-1A 0_4
HW PG
6.76A
HW PG 23,32,35,37,38

1
B B
PC99 1
0.1U/50VB_6 PC100
PD13 3 6236AGND 6236AGND S0-S1
CHN217PT
PR134 0.1U/50VB_6 +3VPCU
+12VALW is +15V power level 2
0_6
+12V_ALW P
Please use +15VALW to +12VALW
2

prevent voltage

5
rating issue PR141 PC98
PR150
100K_4
0_4 2.2U/50VB_8 SI2 +3VS5 PQ29
+3VSUS
1

AP4228
+5VAL
PR137
6237ON2
0.5A 1.84A
5,40 SYS_SHDN# 2 1

0_4
S0-S5 +3VS5 +3VSUS S0-S3

4
+5VPCU +5VPCU

+3VSUS
5,7,12,13,14,15,16,39 +3VS5 +3VSUS 13,26,29,33,35,37,39
5
6
7
8

5
6
7
8

+5VSUS SUSD
39 S5_OND SUSD 39
MAIND4 PQ53 4 PQ16
39 MAIND
SI4800BDY
+5V 39 SUSD
SI4800BDY 4.5A +3VPCU
A A

4.31A S0-S3

3
For EMI-SI +5V For EMI-SI +5VSUS
DB modify
PQ25 +LANVCC
3
2
1

3
2
1

AO3404
S0-S1
39 LAN_ON 2
0.27A PROJECT : OP8
PC193 PC97 +3VLANVCC Quanta Computer Inc.
+5V 5,15,20,23,24,25,27,28,29,31,32,33,35,38,39 +5VSUS 23,29,32,39
0.1U/10VC_4 0.1U/10VC_4
1

Size Document Number Rev


Custom 1A
+3VLANVCC 30,39 +5V/+3V(ISL6237)
NB5/RD2
Date: Friday, March 20, 2009 Sheet 34 of 42
5 4 3 2 1
5 4 3 2 1

+1.1V & +1.2V 35


PD2
+5VPCU CH501H-40PT L-F
D +VIN D

2 1 RTBST

1U/10VC_4
PC11

2200P/50VB_4

10U/25VD_1206

*10U/25VD_1206
PR23
+VIN +1.2V

0.1U/50VB_6
10_6 DB modify

PC131

PC130

PC139

PC133
Ton=3.85p*R_TON*VOUT/(VIN-0.5) +3VSUS PC17 PR4
12A (4.3A+7.0A)

5
6
7
8
Frequency=Vout/(VIN*TON) 8204VDD BST

PR9 1U/10VC_4 2.2_6

13
2

9
604K_4 PC5 4
PR47 0.1U/50VB_6 PQ37 S0-S1

VDD

VDDP

BST
47K_4 RTTON 16 12 RTDH AO4496
TON DH
RTPG 4 11 RTLX
PR49 PGD LX +1.2V
PU1
RTLPPG 5 PL7
23,32,34,37,38 HWPG PR28

3
2
1
PR1 LPGD ILIM
0_4 RTEN 15
RT8204 ILIM 10
32,36 VRON EN/DEM

5
6
7
8
8 10.7K/F_4 1.5uH/13A_10
DL

1
0_4 17 PAD

*100P/50VA_4

0.1U/10VC_4
VOUT
3 +

LDRI
LEN
FB

LFB
PC2

PC178
RTDL 4 PR199 PC167
C 20,27,32,38,39,40 MAINON C
2.2_6 390U/2.5V_6X5.8ESR10

RTFB

2
PR5 *0_4 PQ36

14

1
AO4712
DB modify PR37 PR46
reserved for pwr seq -- andrew 10K/F_4 PC154

RTLEN
6.49K/F_6 2200P/50VA_6

3
2
1
PR48 R1 R2
3.82A RTPG
RDSon=15m-ohm
0_4
PC22
PQ52
S0-S1 PC3 *100P/50VA_4
SI3456 *100P/50VA_4
+1.2V +1.1V
6 Vo=0.75(R1+R2)/R2
5 4
2 +1.2V R_ILIM=I_LIMIT*Rsense/20uA +1.1V 8,9,10,11,17,18,20,39
.1U/10V/04

1
+1.2V 2,3,11,12,14,15
PC182

PC180 PC181 PC184 Keep R2 higher than 10Kohm


10U/4VD_8 .1U/10V/04 10U/4VD_8 RTLDRI
+1.1V_DYN 11
9338DRV 3

PC32

5
6
7
8
22P/50VA_4 PC177
B 10U/4VD_8 B
PR209 PR207 PC187 PR66
*0_4 PU10 47/F_4 0.033U/25VB_6 0_6 4
23,32,34,37,38 HWPG 3 6 PQ49
PGD DRV ME4856
RTPG 9338EN 4 EN 9338ADJ +1.1V PC40
+1.1V 7.0A
G9338 ADJ 5
PR208 +5V 22P/50VA_4
0_4 PR205 +1.1V_DYN
1 2 R1

3
2
1
PC186 VCC GND 127/F_6
*.1U/10V/04
S0-S1
PR206
PC189 R2 100/F_4

0.1U/10VC_4
PC170

10U/4VD_8

10U/4VD_8
.1U/10V/04 R1
+3V

*22P/50VA_4

PC175

PC179
PR63

PC35
6.81K/F_4 PR54
Vout1= 0.5 * ( 1 + R1/R2 ) 5.11K/F_6

RTLFB
3

PR90
*10K/F_4
DYN_PWR_EN High Low PR91 Vo=0.75(R1+R2)/R2
10 DYN_PWR_EN 2
PQ5 R2 PR41
A 2K_4 2N7002E-G 10K/F_4 A

+1.1V_DYN 1.0 1.1 PC61


PR92 0.1U/10VC_4
1

10K/F_4
PROJECT : OP8
PR31 for UMA only
Quanta Computer Inc.
Size Document Number Rev
B 1A
+1.2V & +1.1V(RT8204)
NB5/RD2
Date: Friday, March 20, 2009 Sheet 35 of 42
5 4 3 2 1
A B C D E F G H

4A +CPUVDDNB

UGATE_NB 8

7 S1/D2
PQ46

G1 D1 1

D1 2
+VIN

36

2200P/50VB_4

0.1U/50VB_6

10U/25VD_1206
PR198

1
390U/2.5V_ESR10_6X5.8
ISL6265 Pin1 OFS VFIXEN 3 CPU_VDDNB_RUN_FB_H PL10 6 G2 3 LGATE_NB

PC153

PC159

PC151
3.3UH/11A_10
47/F_4 + 5 S2 4

2
PC183
1.2V
V X FDS6900AS

0.1U/10VC_4
PR197

PC176
3.3V 3 CPU_VDDNB_RUN_FB_L
X V 47/F_4
1 1
5V 6265AGND
X X

+5VPCU PR99

1000P/50VB_4
10_6

PC51
PR95
VFIXEN VID Codes 22.1K/F_4

2
PC52
SVC SVD Output 1U/10VC_4

1
+VIN +VIN
PR100

1
10_6 6265AGND

1200P/50VB_6
0 0 1.4 PR81

PC146
0_4 Pre DB modify

2200P/50VB_4

0.1U/50VB_6

10U/25VD/1206

10U/25VD/1206
1

1
PC147

PC143
0 1 1.2

2
2

PC27

PC137
PR189

44.2K/F_6
PR192

0_4

PR82
PC53 LGATE_NB

2
5
1 0 1.0 0.01U/50VB_4 PR195

33P/10VB_4

PC148
*short 16.2K/F_4 PHASE_NB

2
6265AGND
1 1 0.8 4

+5VPCU PR94 UGATE_NB PQ39


0_4 6265AGND PC145 AON6428L
1 2 0.1U/50VB_6
36A
+3VPCU

49

48

47

46

45

44

43

42

41

40

39

38

37
PR84 PU3

3
2
1
+3VPCU *0_4 PL8 +VCORE0

GND

VIN

VCC

FB_NB

COMP_NB

FSET_NB

VSEN_NB

RTN_NB

OCSET_NB

PGND_NB

LGATE_NB

PHASE_NB

UGATE_NB
1 2 PR191 0.36uH/25A_11
PR85 6265AGND 1_6
10K_4 PR96 1 2
PR83 1 36 BOOT_NB
OFS/VFIXEN BOOT_NB
3 4

5
PR76 PC49

330U/2V_ESR9_7
2 0_4 *10K_4 2

1
330U/2V_ESR9_7
16 VRM_PWRGD 1 2 2 35 BOOT_0 PR202
PGOOD BOOT_0 2.2_8

PC86

PC85
PR70 0_4 1_6 0.22U/25VB_6 4
3 CPU_PWRGD_SVID_REG 1 2 3 34 UGATE_0

2
PWROK UGATE_0

2200P/50VA_6
PC161
PR65 0_4
CPU_SVID
1 2 4 33 PHASE_0
3 CPU_SVD SVD PHASE_0
PR58 0_4 ISP_0

3
2
1
1 2 5 32 PQ42
3 CPU_SVC SVC PGND_0 AON6718L ISN_0
PR51 PR50 0_4
1 2 6 31 LGATE_0 +5VPCU +VIN
32,35 VRON ENABLE LGATE_0
6265AGND

PC141
PC42
PR186 180P/50VA_4 Pin 49 is GND Pin
7 30 2 1
10K_4 RBIAS PVCC

2200P/50VB_4

0.1U/50VB_6

10U/25VD/1206

10U/25VD/1206
107K/F_4 PR187
ISL6265HRTZ-T

1
4.7U/6.3VC_6

PC138

PC142

PC30

PC140
PR36 DB modify 10K/F_4 8 29 LGATE_1
OCSET LGATE_1

5
255/F_4
PC28

2
PR39 4700P/25VB_4 9 28
1K/F_4 VDIFF_0 PGND_1
4 36A
10 27 PHASE_1
FB_0 PHASE_1 +VCORE1
PC16 PQ40
PR33 11 26 UGATE_1 AON6428L
54.9K/F_4 COMP_0 UGATE_1 PL9

3
2
1
1200P/50VB_6 PR31 PR42 PC38 0.36uH/25A_11 PC87 PC88
12 25 1 2
VW_0 BOOT_1

COMP_1
VDIFF_1
VSEN_0

VSEN_1
PC19 6.81K/F_4 1_6 0.22U/25VB_6 3 4
RTN_0

RTN_1

5
ISN_0

ISN_1
ISP_0

VW_1

ISP_1
180P/50VA_4

FB_1

1
330U/2V_ESR9_7

330U/2V_ESR9_7
PR201
PC18 4 2.2_8
13

14

15

16

17

18

19

20

21

22

23

24
3 3
1000P/50VB_4

2
2200P/50VA_6
PR184

PC155
Close to ISP_0

3
2
1
CPU 3.92K/F_4 PQ43
2

socket AON6718L
1

1
PR21

PR20

*1000P/50VB_4
PR182 PR183 PC129
18.2K/F_4 0.1U/50VB_6
+VCORE0
1

2
PR30
10_4 ISN_0 PC12 PC23 18.2K/F_4
0.1U/50VB_6
2

1
0_4 0_4 PR29
3 CPU_VDD0_RUN_FB_H ISP_1
PR18

*6.81K/F_4

PR17

3 CPU_VDD0_RUN_FB_L 3.92K/F_4
1

ISN_1
+VCORE0 +VCORE1
PR181 Parallel 0_4
PR204
2 1
2

10_4 PR185 2 1

+1.8VSUS 0.001_2512

Close to 1K/F_4
1

*1200P/50VB_6

CPU socket Reserve for uni-plane


PC7

PR139 PR19
*0_4
For Tigris
*4700P/25VB_4

Reserve for uni-plane


*10_4
2

PC6

Location Value Part Number


*180P/50VA_4
*1K/F_4

PR24

3 CPU_VDD1_RUN_FB_L
PC4

3 CPU_VDD1_RUN_FB_H
PR19 NC +VCORE0 5,26
4 4
+VCORE1 5
*54.9K/F_4

PR138 PR185 1K/F_4 CS21002FB24


PR3

PR7
+VCORE1
*255/F_4 +CPUVDDNB5
10_4 PR139 NC

PR204 0.001_2512 CS+001AGM13

PC12,PR17,PC4,PC7,
NC
PROJECT : OP8
PR3,PR24,PC6,PR7 Quanta Computer Inc.
Size Document Number Rev
C 1A
CPU_CORE(ISL6265)
NB5/RD2
Date: Friday, March 20, 2009 Sheet 36 of 43
A B C D E F G H
A B C D E

37
+2.5V 3
+1.8VSUS 3,4,5,6,7,36,38

+1.8VSUS
+VIN

4 4
0.1U/10VC_4

0.1U/10VC_4

0.1U/10VC_4

100U/25V_6.3X7.7

100U/25V_6.3X7.7

*10U/25VD_1206

10U/25VD_1206
PC37

PC144
I_lim(Valley)=10uA*R_ILIM/RDS_ON
PC114

PC191

PC103

PC163

PC174
+ +
+5VPCU
PR34
For OCP set.
51116_V5FILT

2
10_6
PC26 PC15

0.1U/50VB_6

2200P/50VB_4
2.2U/6.3VC_6 1U/10VC_4
+1.8VSUS

1
+3VSUS

PC43

PC45
DB modify

15

14
5
PU2
23.65A Ra=(Vout-0.75)/0.75*Rb
PC46 PR71 PR43

V5IN

V5FILT
VBST 22 16 CS PR190
VBST CS 10K_4
4
S0~S3 0.1U/50VB_6 2.2_6 8.45K/F_6
Rb value from 100K to 300K ohm PQ38
PGOOD 13 HW PG 23,32,34,35,38
AON6428L
1.8V_DH 21 DRVH
+1.8VSUS 11 S5ON PR15
SUSON 32,39

1
2
3
PL6 S5 0_4
+1.8VSUS 1.8V_LX 20 10 S3ON PR11
LL RT8207 S3 0_4
1

*100P/50VA_4
1.5uH/10A_10 23 +1.8VSUS
VLDOIN
0.1U/10VC_4

*100P/50VA_4
+

PC8
3 PC158 PR200 3
PC152

PC9
2.2_6 4 1.8_DL 19 PC47
2

DRVL 1U/10VC_4

2
2200P/50VA_6
Ra VTTGND 1

PC160
PQ41
390U/2.5V_6X5.8ESR10 PR14 4
14.3K/F_4 AON6718L MODE PC67 PC62 +0.9VSMVTT
8
+0.9VSMVT

1
2
3
PC10 VDDQSNS 10U/4VD_8 10U/4VD_8
*100P/50VA_4 9 24
VDDQSET VTT +0.9VSMVTT 4,7

COMP 6
VTTSNS 2 VTTSNS PR52
*0_4/S
2.25A
COMP
18
S0~S3

CS_GND
PGND

VTTREF
PR27 7 PR53 CPU_VTT_SENSE 4
51116_V5FILT NC *0_4
12 25

GND
PR32 NC PAD
*0_4 *14.3K/F_4 PR16 0_4 PR38
MODE +1.8VSUS
VDDIO_FB_H 3

17

3
51116_V5FILT PR22
fix model change to adjust model 619K/F_4 0_4
Rb +VIN
PR35
PR13 0_6 PR2
10K/F_4
*0_4 PR12
4,6 +0.9VSMVREF
*SHORT-1A
VDDIO_FB_L 3 Mode Discharge Mode
PC33
0.033U/25VB_6
2 V5IN No discharge 2

VDDQ Tracking discharge


+2.5V
0.25A +1.8VSUS
Gnd Non-tracking discharge
Close to CPU
SI power S0~S1
PC119
5
6
7
PU8 8 0.1U/10VC_4
V_TRIP(mV)=R_TRIP(Kohm)*10(uA)
PR157 +2.5V
10K_4
PQ19
32 VR2.5_ON 1 SHDN VOUT 4 39 1.8V_OND 4
ME4856
I_OCP=V_trip/Rds_on+I_Ripple/2
3 +
+1.8V
PC115
+3VPCU VIN R1 PR156 PC113 10.4A VDDQSET VDDQ(V) VTTREF and Vtt Note
0.1U/10VC_4 100K/F_4 4.7U/6.3VC_6
1

2 5SET
S0~S1
3
2
1

PC116 GND SET


1U/10VC_4 +1.8V GND 2.5 V_ vddqsns/2 DDR
2

G913C Vout=1.25(1+R1/R2)
PR155
+1.8V 3,5,8,10,11,15,16,17,18,20,21,22,26,39 V5IN 1.8 V _vddqsns/2 DDR2
100K/F_4 PC117
R2 0.1U/10VC_4
FB adjustable V_VDDQSNS/2 1.5V<VDDQ<3V
1 1

Discrete:SI4856 PROJECT : OP8


UMA:SI4800 Quanta Computer Inc.
Size Document Number Rev
Custom 1A
1.8VSUS/DDR_VTER/+1.8V/2.5V
NB5/RD2
Date: Friday, March 20, 2009 Sheet 37 of 42
A B C D E
5 4 3 2 1

ATI M92-S2
PWRCNTL1 PWRCNTL0 V-CORE
+VIN

PC24
+VIN

PC90
+VIN

PC36
+VIN

PC164
+VGA_CORE 5,20
+1.2V_S5 15
38
0.1U/50VB_6 0.1U/50VB_6 0.1U/50VB_6 0.1U/50VB_6
+1.5V 33
H 0 0 1.0V
PR103 +5VPCU +VIN
D M 0 1 0.95V *20_6 D

*CH501H-40PT L-F
2

*10U/25VD_1206

*10U/25VD_1206
8118VDDA
M 1 0 0.95V

PD8

*2200P/50VB_4

*0.1U/50VB_6
PR111 PC59 PC84
+VGA_CORE

PC171

PC89

PC173

PC91
*1K_4 *1U/10VC_4 *1U/10VC_4

5
6
7
8
+5VPCU
L 1 1 0.9V 11A

1
8118AGND PR123

16

5
PC75 *0_6 4
S0~S1

8118AGND
PR125 8118VIN 2 8 8118BST

VDDA

VDDP
*10K_4 VIN BST
*0.01U/50VB_4 9 8118HDR PQ47 DCR=8.1m-ohm (max)
PD9 HDR *AO4496
PR124 8118PG 4 PL11 +VGA_CORE
23,32,34,35,37 HWPG PGD
*0_4 PC74

3
2
1
*SW1010CPT *0.1U/50VB_6 +VGA_CORE 5,20
39 VCORE_PG

5
6
7
8
PR121 10 8118LX *1.5UH/16A_PCMC104T-1R5MN

1
8118EN LX
3
20,27,32,35,39,40 MAINON ON/SKIP PU5 PR114 PR102 +
*100P/50VA_4

*15K_4 7 8118LDR 4 *2.2_6 DB modify *68K/F_4 PR98 PC188 PC185


8118VSET LDR *51.1/F_4 *0.1U/10VC_4 *390U/2.5V_ESR10_6X5.8
13 *OZ8119

2
VSET
PC81

*100P/50VA_6
PR122
*10K_4 +8118VREF 14 PQ50
VREF

PC80
*AO4712 PR104 PC64
11 8118CSP
8118TSET CSP
15

3
2
1
C PR74 PR80 TSET *75K/F_4 *5600P/_4 C
*86.6K/F_6 *63.4K/F_4

GNDA1

GNDP
DB modify 8118AGND

OCT
12 8118CSN
CSN

*1000P/50VB_4
3

*0.1U/50VB_6
PR59 PR89

17

6
+VIN +VIN +VIN

PC57

PC60
PR116 *604K/F_6 *49.9K/F_4
*1000P/50VB_4

*1000P/50VB_4

*22P/50VA_4
*0_4

*0.022U/25VB_6

PC54

PC68
2 PR75 PR69
18 GFX_CORE_CNTRL0
PC58

*49.9K/F_6 *130K/F_6

PC70
PQ9
*2N7002E-G PR62 PC82 PC172 PC1
*604K/F_6 0.1U/50VB_6 0.1U/50VB_6 0.1U/50VB_6
1

PR117
*0_4
2 PR77
18 GFX_CORE_CNTRL1
8118AGND
PQ10
*2N7002E-G *short
8118AGND
1

PR172
+1.5V
10K_4
B
+5V 0.35A B

PC121 S0~S1
0.1U/10VC_4 PU9
+1.8VSUS 1 8 +1.5V
PR214 POK GND
2 7
10K_4
S5EN_G966
+1.2V_S5 3
VEN
VIN
ADJ
VO
6
+1.5V 33
32,39 S5_ON 4 5
VPP NC

9
+5V
0.5A PC125 PC123 G966

9
10U/4VD_8 0.1U/10VC_4 R1 PR174 PC122 PC126
PC205 41.2K/F_6 0.1U/10VC_4 10U/4VD_8
*0.1U/10VC_4 S0~S5
PU11 PC127
+3VPCU 1 8 +1.2V_S5 0.1U/10VC_4
POK GND
2 7
VEN ADJ
3 6 +1.2V_S5 15
VIN VO PR173
+5VPCU
4
VPP NC
5 R2
9

R1 47K/F_4
966ADJ

G966
9

PC203 PC204 PR212 PC201 PC202


10U/4VD_8 0.1U/10VC_4 51.1K/F_6 10U/4VD_8 0.1U/10VC_4

PC200 DB modify Vo=0.8(1+R1/R2)


0.1U/10VC_4
R2
PR213
100K/F_4 Vo=0.8(R1+R2)/R2
A A
R2<120Kohm

PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
VGA PWR OZ8118/1.2V_S5/+1.5
NB5/RD2
Date: Friday, March 20, 2009 Sheet 38 of 42
5 4 3 2 1
1 2 3 4 5

+12VALW
39
+5V +3V +1.1V

+VIN PR165
1M_4
PR170 PR168 PR163
A *22_8 *22_8 *22_8 A
PR166
MAIND 34
1M_4 PQ26

1
*2N7002E-G PQ23 PQ21
*2N7002E-G *2N7002E-G PC120
2200P/50VB_4

2
MAINON_G 2 2 2 2

PQ24

3
2N7002E-G
+3VSUS +5VSUS +12VALW

1
2 PR167
20,27,32,35,38,40 MAINON 1M_4

PR93 PR109 PQ22

1
+VIN PR64 *22_8 1M_4 PDTC144EU
*22_8

SUSD
SUSD 34
PR105

3
1M_4 PQ3 PQ7

1
*2N7002E-G *2N7002E-G
PC71 +12VALW
SUSON_G 2 2 2 2200P/50VB_4 +3VLANVCC

2
PQ8
2N7002E-G PR176
3

PR88 +VIN 1M_4


1

1
B 1M_4 PR169 B
2 *22_8
32,37 SUSON LAN_ON
LAN_ON 34
PR171
PQ4 1M_4
1

1
PDTC144EU PQ28
*2N7002E-G PC124
2200P/50VB_4

2
2 2

3
PQ30
2N7002E-G
32 LAN_POW ER 2

1
PR175
1M_4
PQ27

1
PDTC144EU LAN_POW ER_G

+12VALW

+3VS5

PR177

+VIN
1M_4
For Discrete Only
PR178
C *22_8 S5_OND C
S5_OND 34
+1.8V
PR179 PQ33
3

1M_4 *2N7002E-G
PC128
2200P/50VB_4 +VIN
2

2 2 PR162 +12VALW
*22_8
3

PQ32

3
PR180 PR161
1

2 1M_4 2N7002E-G 1M_4 PR164


32,38 S5_ON
1M_4
PR160 2
PQ34 S5_ONG *0_4
1

PDTC144EU PQ18
20,27,32,35,38,40 MAINON 1.8V_OND 37

3
*2N7002E-G

1
PR158

3
2 1M_4 PC118
38 VCORE_PG
2200P/50VB_4

2
PR159
0_4 PQ17 2

1
PDTC144EU
PQ20
Discrete : PR169 2N7002E-G
UMA : PR170

1
D D

PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
DISCHARGE
NB5/RD2
Date: Friday, March 20, 2009 Sheet 39 of 42
1 2 3 4 5
5 4 3 2 1

PC206 0.1U/50VB_6
40
+VAD +VAD
DB modify
PL1
+VAD PD18 HI0805R800R-00/5A_8
TOP DC_JACK
*P4SMAJ20A
65W/90W PC168 PC162
0.1U/50VB_6 0.1U/50VB_6
PL3 +VA PQ45 PQ6 +BATCHG PL2
AD_ID 32 +PRWSRC
HI0805R800R_5A/08 PD17 IRFR3709ZCTRPBF FDS6679AZ HI0805R800R-00/5A_8 CN14
2 1 8 +BATT 7 8
CN3 7 8
3 4 3 2 7
J1-1 1 3 6 SMD 6 10
3 5 PL4 6 10
4 6 4 5
HI0805R800R_5A/08 SD840S/40V/8A +VIN SMC 5 9

1
PR196 PR79 5 9
D D
PC20 PC150 100_4 PC149 RC7520WT-R020 4 2

BATDIS_G
9 2 0.1U/50VB_6 0.1U/50VB_6 ACOK_IN 1U/25VC_8 4 2
1 2
10 1
3 3 1 1
DC-IN CONN PR193

+BATCHG
2

2
+VH28 100K/F_4 BATDIS_G DB modify
PR44 PR45 BP07061-BA015
PR10 *0_2/S *0_2/S +3VPCU
JACK-LED 0_6 J1-1 +6251_VDD PR26 PR25
PD16 330_4 330_4

1
PR6 PD1 *SW1010CPT PD6
3

10K_6 *SW1010CPT PC135 PC136 PC134 PC31


2 1 PC14 1000P/50V_4 +VIN
5,32 3920_RST#

2
32 MBDATA
ACOK# 2 PQ15 *UDZS5.6BTE-17 PC76 PR8 PR55

10U/25VD_1206

*10U/25VD_1206
2N7002K PR57 2.2U/6.3VC_6 10K/F_4 1K/F_4

1
5,34 SYS_SHDN#
*100K/F_4 TEMP_MBAT 32
32 MBCLK

2200P/50VB_4

0.1U/50VB_6
PR101 PR106 +6251_VDD +6251_VDD PC25

1
2_6 20_4 0.1U/50VB_6
1

PC34

1
UDZS5.6BTE-17

UDZS5.6BTE-17
2 PR67 .01U/16V_4
CSIP CSIN 4.7_6 PC13

VREF = 5.075V

PD4

PD3
PC65 0.01U/50VB_4
PQ2 PR56
*2N7002E-G +6251_VDDP +VIN +VIN

2
*470_4 PTC

2
0.1U/50VB_6 PC50 PD7

5
6
7
8
Close to AC soft start MOSFET CH501H-40PT L-F

19

20

15
1

1
+VAD 4.7U/6.3VC_6 PC44 PC29

CSIN

VDD
CSIP

VDDP
PR108 20_4 4 0.1U/50VB_6 0.1U/50VB_6

1
C CSOP_1 CSOP PR87 PC56 PQ35 C
3 21 CSOP
2

1
PQ11 16 6251_BOOT AO4496
BOOT

2
IMD2 PC72
1_6 0.1U/50VB_6
0.047U/25VB_4 17 6251_UGATE

1
CSON_1 CSON UGATE PR194
22

3
2
1
CSON PL5 RL3720WT-R020
PR112 20_4 ACOK# 23 18 6251_PHASE 2 1
4

ACPRN PHASE

5
6
7
8
PQ44 10UH/4.4A_10

2P

1P

10U/25VD/1206

10U/25VD/1206
PR118 +DCIN 24 14 6251_LGATE AO4496
DCIN LGATE

PC157

PC156
10_6 PR188
ISL6251A 4 2.2_8
20,27,32,35,38,39 MAINON PC78 13
+VA 1U/25VC_8 PGND +6251_VREF
12 CSOP_1
GND

2
PD11 PC132
SW1010CPT PD10 PR61 2200P/50VA_4
2 1 +VAD2 PR115 100K/F_4 11 PR73 240K/F_4 CSON_1

3
2
1
6251_ACIN VADJ 21K/F_4
2
ACSET

1
SW1010CPT Setting the Vin PC77 10 6251_VADJ
min to 11.42V 6251_EN ACLIM
3
EN

0.1U/10VC_4
PR127 PR120 PR126 6251_ACLIM

VCOMP
For ACSET 2 1

ICOMP
CELLS
CV-SET 32

CHLIM

2
VRFE
75K/F_4 1.26V
100K/F_4

ICM
12.4K/F_4 PC39 PR60

2
Setting the Vin min to 15.88V 0.01U 240K/F_4

1
For EN = 1.06V PC41 PR68

9
32 AD_AIR PU4 0.01U 11.8K/F_4

1
+6251_VREF

VREF = 2.39V
6251_CHLIM PR72

6251_VCOMP1

6251_ICM
B 6251_CELLS PR78 11.8K/F_4 V ACLIM = VREF * B
PR129 PR113 (Rhi // 152K) / (Rhi // 152K + Rlow// 152K)
CC-SET 32 EC_ACLIM 32
PC83 12.4K/F_4 7.15K/F_6 Input curretn = 2.9A (71.5K , 10K)
0.1U/10VC_4 6251_ICOMP 100K_4 (0.05/Vref * Vaclim + 0.05 ) / Rsense
PC48
2

PC55 Charging Curret setting 0.1U/10VC_4


PR110 PC69 100P/50VA_4 PR86 I chg = 165mV / Rsense * (Vchlim / 3.3V) ADP TYPE PR72 Value P/N
0_4 6800P/25VB_4 100K_4
1

ACOK 3 1 +6251_VDD CLOSE TO EC SIDE 65W 40.2K/F CS34022FB15


PC66 PR97
100P/50VA_4 SYS_I 32 90W 3.48K/F CS23482FB12
PR130 PQ12 ONLY for 3S battery pack
10K_4 PDTA124EU Input Current monitor
PR107 100_4 V icm = 19.9 * (Vcsip - Vcsin)
2

10K_4
PC63
32 ACIN 3300P/25VB_4
2

ACOK#
PR131 PC73
15K_4 0.01U/50VB_4
1

+VAD2 PR133 PU6 +VH28


6251_ACIN PR132 22_6
BATDIS_G 1 8
VIN Vout
3

1
100_4 ACOK_IN PR40 2
0_4 PC94 GND 6251_ACIN PC96
P2805 PG 6
PR128 PC79 .1U/50V_6 4 .1U/50V_6

2
NC
2 2

CP
3 5
CN D_CAP
1

100K/F_4 1U/25VC_8
CH501H-40PT L-F

A A

1
PQ13 PQ14 PD5

7
PD12

2N7002E-G PR119 2N7002E-G 2 PC93


1

D/C# 32
1M_4 PQ1 1U/50V_6

2
PDTC144EU 2 1
2

*CH501H-40PT L-F
1

PC95
PC21
*10U/6.3VD_8
0.01U/50V_6
PROJECT : OP8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
CHARGER ( ISL6251)
NB5/RD2
Date: Friday, March 20, 2009 Sheet 40 of 42
5 4 3 2 1
www.s-manuals.com

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