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Title Page
MSI
MS-7549 Ver:1.1 Cover Sheet 1
D
Block Diagram 2 D

CPU:
GPIO Configuration 3
AMD M2 Athlon 64/Athlon 64 FX AM2R2
Clock Distribution 4
System Chipset: Power Deliver Chart 5
AMD/ATI RS780
ISL6323CR & UPI6262 6
AMD/ATI SB700
Clock-Gen ICS9LPRS477 7

On Board Chipset: AMD AMr2 940 8, 9,10


FINTEK Super I/O -- F71882 FIRST LOGICAL DDR DIMM 11
LAN -- RTL8111C
DDR Terminatior 12
HD Codec -- ALC888
BIOS -- SPI ROM 8M AMD/ATI RS780 COLAY RS740 13, 14,15,16,17
C C

AMD/ATI SB700 18, 19,20,21,22


Main Memory:
DDR II X 2 (Max 4GB) PCI EXPRESS X16 & X 1 SLOT 23
PCI Slot 1,2 24
Expansion Slots:
USB connectors 25
PCI-E X 1 *1
VGA CONN / TVOUT 26
PCI-E X 16 *1
LAN - Realtek 8111C 27
PCI 2.2 Slot X 2

Clock Generator: Azalia Codec-ALC888 28


Controller--ICS9LPRS477 DVI&HDMI 29
LPC-F71882 / FDD / COM / LPT 30
B
PWM: B

IDE Conn / FAN 31


ISL6323CR 3+1 Phase
VCC_DDR&VCC1_1 NB 32
ACPI by UPI 33
ATX/Front Panel/KB/EMI 34
BOM - Option Parts 35
POWER OK MAP 36
RESET MAP 37
History 38

A A

Micro Star Restricted Secret


Title Rev
Cover Sheet
1.1
Document Number MS-7549
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Wednesday, November 05, 2008
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 1 of 38
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5 4 3 2 1

Project RS-780 BLOCK DIAGRAM

DDRII 400,533,667,800 UNBUFFERED UNBUFFERED


AMD 128bit DDRII DIMM1 10 DDRII DIMM3 11
D D

AM2/AM2g2
AM2 SOCKET DDRII 400,533,667,800 UNBUFFERED UNBUFFERED
7,8,9 128bit DDRII DIMM2 10 DDRII DIMM4 11

OUT
DDRII FIRST LOGICAL DIMM DDRII SECOND LOGICAL DIMM
HyperTransport LINK 16x16 2.6GHZ(HT3)

IN
ATI NB - RS780
DVI CON TMDS
22
HyperTransport LINK0 CPU I/F
1 16X PCIE VIDEO I/F
1 4X PCIE I/F WITH SB
PCIE GFX x16 PCIE x16
31 2 1X PCIE I/F

C C

4X1 PCIE INTERFACE


13,14,15,16

Realtek PCIE x1 SLOT1


8111C(B)/8101E 25 31
A-LINK
4X PCIE

HD AUDIO HDR
USB-5 USB-4 USB-3 USB-2 USB-1 USB-0 29
REAR REAR REAR REAR REAR REAR USB 2.0
ATI SB - SB700
AZALIA
30 30 30 30 30 30 USB2.0 (12) AZALIA CODEC
29
SATA2 (4 PORTS)
USB-11 USB-10 USB-9 USB-8 USB-7 USB-6 AC97 2.3
HDR HDR HDR HDR HDR HDR
HD AUDIO 1.0
30 30 30 30 30 30
ACPI 1.1 SERIAL ATA 2.0 SATA#0 SATA#1 SATA#2 SATA#3
B B
SPI I/F 24 24 24 24
PCI/PCI BRIDGE

PCI BUS
SPI Bus SPI ROM 8M
19
17,18,19,20,21
CPU CORE POWER PCI SLOT 1 PCI SLOT 2
ACPI CONTROLLER NB CORE POWER 30 30
Intersil ISL6323
uPI Intersil ISL6612A 6
27
LPC BUS
CPU VLDT Power
RS780 CORE POWER
PCIE & SB POWER
27 TPM Pin Header
ITE SIO Fintek 71882 33
26

A
DDR2 DRAM POWER A

27

ATX CON & DUAL POWER KBD SERIAL MICRO-START INT'L CO.,LTD.
27 FLOPPY LPT
MOUSE PORT Title
22 23 22 23 BLOCK Diagram
Size Document Number Rev
Custom MS-7549 1.1
Date: Wednesday, November 05, 2008 Sheet 2 of 38
5 4 3 2 1
5 4 3 2 1

SB700/750 GPIO Config


SB700/750 GPIO Config SB700/750 GPIO Config
GPIO Name Type Function description Pin Page GPIO Name Type Function description Pin Page GPIO Name Type Function description Pin Page
PCICLK5/GPIO41 3.3V PCI_CLK5 T3 19 AZ_DOCK_RST#/GPM8# 3.3V Unused L5 21 IDE_D4/GPIO19 3.3V Unused AD21 20
REQ3#/GPIO70 PREQ#3 AE6 19 PS2_DAT/EC_GPIO0 Unused H19 21 IDE_D5/GPIO20 Unused AE20
REQ4#/GPIO71 PREQ#4 AB6 19 PS2_CLK/EC_GPIO1 Unused H20 21 IDE_D6/GPIO21 Unused AB20
GNT3#/GPIO72 Unused AC6 19 SPI_CS2#/EC_GPIO2 Unused H21 21 IDE_D7/GPIO22 Unused AD19
GNT4#/GPIO73 Unused AE5 19 IDE_RST#/F_RST#/EC_GPO3 Unused F25 21 IDE_D8/GPIO23 Unused AE19
INTE#/GPIO33 PCI_INTA# AD3 19 PS2KB_DAT/EC_GPIO4 Unused D22 21 IDE_D9/GPIO24 Unused AC20
INTF#/GPIO33 PCI_INTB# AC4 19 PS2KB_CLK/EC_GPIO5 Unused E24 21 IDE_D10/GPIO25 Unused AD20
INTG#/GPIO33 PCI_INTC# AE2 19 PS2M_DAT/EC_GPIO6 Unused E25 21 IDE_D11/GPIO26 Unused AE21
D D
INTH#/GPIO33 PCI_INTD# AE3 19 PS2M_CLK/EC_GPIO7 Unused D23 21 IDE_D12/GPIO27 Unused AB22
LDRQ1#/GNT5#/GPIO68 Unused AB8 19 USBCLK/14M_25M_48M_OSC USB_48M_CLK C8 21 IDE_D13/GPIO28 Unused AD22
BMREQ#/REQ5#/GPIO68 PREQ#5 AD7 19 KSO_16/EC_GPIO8 Unused A18 21 IDE_D14/GPIO29 Unused AE23
RI#/EXTEVNT0# RI# E2 19 KSO_17/EC_GPIO9 Unused B18 21 IDE_D15/GPIO30 Unused AC23
SLP_S2/GPM9# Unused H7 19 EC_PWM0/EC_GPIO10 Unused F21 21 SPI_DI/GPIO12 SPI_DATAIN G6
GA20IN/GEVENT0# A20GATE Y15 19 SCL2/EC_GPIO11 Unused D21 21 SPI_DO/GPIO11 SPI_DATAOUT D2
KBRST#/GEVENT1# KBRST# W15 19 SDA2/EC_GPIO12 Unused F19 21 SPI_CLK/GPIO47 SPI_CLK D1
LPC_PME#/GEVENT3# LPC_PME# K4 19 SCL3_LV/EC_GPIO13 Unused E20 21 SPI_HOLD#/GPIO31 SPI_HOLD_L F4
LPC_SMI#/EXTEVNT1# LPC_SMI3 K24 19 SDA3_LV/EC_GPIO14 Unused E21 21 SPI_CS#/GPIO32 SPI_CS# F3
S3_STATE/GEVENT5# Unused F1 19 EC_PWM1/EC_GPIO15 Unused E19 21 LAN_RST#/GPIO14 CPU_PRESENT# U15
SYS_RESET#/GPM7# FP_RST# J2 19 EC_PWM2/EC_GPIO16 SB_GP16 D19 21 ROM_RST#/GPIO14 Unused J1
WAKE#/GEVENT8# WAKE# H6 19 EC_PWM3/EC_GPIO17 Unused E18 21 FANOUT0/GPIO3 Unused M8
BLINK/GPM6# Unused F2 19 KSI_0/EC_GPIO18 Unused G20 21 FANOUT1/GPIO48 COM_GPIO M5
MBALERT#THRMTRIP#/GEVENT2# SMBALERT# J6 19 KSI_1/EC_GPIO19 Unused G21 21 FANOUT2/GPIO49 Unused M7
SATA_ISO#/GPIO10 SB_GPIO10 AE18 19 KSI_2/EC_GPIO20 Unused D25 21 FANIN0/GPIO50 Unused P5
CLK_REQ3#/SATA_IS1#/GPIO6 SB_GPIO6 AD18 19 KSI_3/EC_GPIO21 Unused D24 21 FANIN1/GPIO51 Unused P8
SMARTVOLT/SATA_IS2/GPIO4 SB_GPIO4 AA19 19 KSI_4/EC_GPIO22 Unused C25 21 FANIN2/GPIO52 Unused E8
CLK_REQ0#SATA_IS3#/GPIO0 SB_GPIO0 W18 19 KSI_5/EC_GPIO23 Unused C24 21 TEMPIN0/GPIO61 Unused B6
CLK_REQ1#/SATA_IS4#/GPIO3 SB_GPIO39 V17 19 KSI_6/EC_GPIO24 Unused B25 21 TEMPIN1/GPIO62 Unused A6
CLK_REQ2#/SATA_IS5#/GPIO40 SB_GPIO40 W20 19 KSI_7/EC_GPIO25 Unused C23 21 TEMPIN2/GPIO63 Unused A5
SPKR/GPIO2 SPKR W21 19 KSO_0/EC_GPIO26 Unused B24 21 TEMPIN3/TALERT#/GPIO64 TALERT3 B5
SCL0/GPOC0# SCLK AA18 19 KSO_1/EC_GPIO27 Unused B23 21 VIN0/GPIO53 Unused A4
C SDA0/GPOC1# SDATA W18 19 KSO_2/EC_GPIO28 Unused A23 21 VIN1/GPIO54 Unused B4 C

SCL1/GPOC2# SCLK1 K1 19 KSO_3/EC_GPIO29 Unused C22 21 VIN2/GPIO55 Unused C4


SDA1/GPOC3# SDATA1 K2 19 KSO_4/EC_GPIO30 Unused A22 21 VIN3/GPIO56 Unused D4
DDC1_SCL/GPIO9 Unused AA20 19 KSO_5/EC_GPIO31 Unused B22 21 VIN4/GPIO57 Unused D5
DDC1_SDA/GPIO8 SPI_WP# Y18 19 KSO_6/EC_GPIO32 Unused B21 21 VIN5/GPIO58 Unused D6
LLB3/GPIO66 LC_SENSE C1 19 KSO_7/EC_GPIO33 Unused A21 21 VIN6/GPIO59 Unused A7
SHUTDOWN#/GPIO5 SB_GPIO5 Y19 21 KSO_8/EC_GPIO34 Unused D20 21 VIN7/GPIO60 Unused B7
DDR3_RST#/GEVENT7# Unused G5 21 KSO_9/EC_GPIO35 Unused C20 21
SB_OC6#/IR_TX1/GEVENT6# OC6# B9 21 KSO_10/EC_GPIO36 Unused A20 21
USB_OC5#IR_TX0/GPM5# OC5# B8 21 KSO_11/EC_GPIO37 Unused B20 21
USB_OC4#IO_RX0/GPM4# OC4# A8 21 KSO_12/EC_GPIO38 Unused B19 21
USB_OC3#/IR_RX1/GPM3# OC3# A9 21 KSO_13/EC_GPIO39 Unused A19 21
USB_OC2#/GPM2# OC2# E5 21 KSO_14/EC_GPIO40 Unused D18 21
USB_OC1#/GPM1# OC1# F8 21 KSO_15/EC_GPIO41 Unused C18 21
USB_OC0#/GPM0# OC0# E4 21 SATA_ACT#/GPIO67 SATA_LED# W11 21
AZ_SDIN0/GPIO42 SDATA_IN_R J7 21 IDE_D0/GPIO15 Unused AD24 21
AZ_SDIN1/GPIO43 Unused J8 21 IDE_D1/GPIO16 Unused AD23 21
AZ_SDIN2/GPIO44 Unused L8 21 IDE_D2/GPIO17 Unused AE22 21
AZ_SDIN3/GPIO46 Unused M3 21 IDE_D3/GPIO18 Unused AC22 21

F71882 GPIO Config


GPIO Name Type Function description Pin Page

PCI Config.
B VIDO5/GP27 3.3V Unused AD21 20 B

VIDO4/GP26 Unused AE20


VIDO1/GP21/VGP0 Unused AB20 DEVICE MCP1 INT Pin REQ#/GNT# IDSEL CLOCK
PME#/GP54 Unused AD19 PCI_INTE#
PCI_INTF# PREQ#0
KRST#/GP62 Unused AE19 PCI Slot 1 AD18 PCICLK0
GA20/JP7 Unused AC20 PCI_INTG# PGNT#0
KDAT/GP61 Unused AD20 PCI_INTH#
KCLK/GP60 Unused AE21 PCI_INTF#
PCI_INTG# PREQ#1
MDAT/GP57 Unused AB22 PCI Slot 2 AD19 PCICLK1
MCLK/GP56 Unused AD22 PCI_INTH# PGNT#1
SUSC#/GP53 Unused AE23 PCI_INTE#
PSON#/GP42 Unused AC23
PANSWH#/GP43 SPI_DATAIN G6
PWRON#/GP44 SPI_DATAOUT D2
PCIRST3#/GP11 SPI_CLK D1
PCIRST2#/GP12 SPI_HOLD_L F4
FAN_CTL3/GP36 SPI_CS# F3
FAN_TAC3/GP36 CPU_PRESENT# U15
FAN_CTL2/GP51 Unused J1
FAN_TAC2/GP52 Unused M8
FAN_CTL1 COM_GPIO M5
FAN_TAC1 Unused M7
VID2/GP32 Unused P5
A A
VID3/GP33 Unused P8
VID3/GP33 Unused E8 MICRO-START INT'L CO.,LTD.
VID4/GP34 Unused B6 Title
GPIO Configuration
VID5/GP35 Unused A6
Size Document Number Rev
Custom MS-7549 1.1
Date: Wednesday, November 05, 2008 Sheet 3 of 38

5 4 3 2 1
5 4 3 2 1

DIMM3 DIMM4
D D
CPU_HT_CLK
DIMM1 DIMM2 PCI CLK0
PCI SLOT 0 33MHz
NB_HT_CLK 33MHZ

3 PAIR MEM CLK


PCI CLK1
3 PAIR MEM CLK

3 PAIR MEM CLK


3 PAIR MEM CLK

PCI SLOT 1 33MHz


25M_48M_66M_OSC 33MHZ

AMD/ATI SB PCI CLK2


IEEE1394 33MHz
SB700 33MHZ

PCI CLK3 SUPER IO IT8718F


HT REFCLK AMD/ATI NB NB_DISP_CLK 33MHZ
100MHz DIFF RS780 33MHz
AM2/AM2g2 CPU
RS780
1 PAIR CPU CLK
200MHZ PCI CLK4
AM2 SOCKET TPM 33MHz
33MHZ
NB-OSCIN GPP_CLK3
14.318MHZ

NB ALINK PCIE CLK PCIE_RCLK/ PCI CLK5


C NB_LNK_CLK LEO CHIP 33MHz C
100MHZ 33MHZ

SB ALINK PCIE CLK


100MHZ
LPC_CLK0
EXTERNAL
33MHZ
CLK GEN. NB GFX PCIE CLK
100MHZ
LPC CLK1
NB GPP PCIE CLK
100MHZ (RX780) 33MHZ

PCIE GFX CLK SLT_GFX_CLK


100MHZ PCIE GFX SLOT 1 - 16 LANES
SB_BITCLK
PCIE GPP CLK HD AUDIO
GPP_CLK0 48MHZ
100MHZ PCIE GPP SLOT 1 - 1 LANE ALC 662/883
25MHz
PCIE GPP CLK 25MHZ
LAN GPP_CLK1
100MHZ PCIE GPP SLOT 2 - 4 LANES OSC
INPUT
PCIE GPP CLK GPP_CLK2

25MHz
100MHZ PCIE GBE
B B

USB CLK
USB_CLK
48MHZ

SIO CLK
48MHZ 25MHz SATA 32.768KHz

14.31818MHz

External clock mode


A A
Internal clock mode

MICRO-START INT'L CO.,LTD.


Title
Clock Distribution
Size Document Number Rev
Custom MS-7549 1.1
Date: Wednesday, November 05, 2008 Sheet 4 of 38
5 4 3 2 1
5 4 3 2 1

Power Deliver Chart

AMD AM2r2 CPU


VDDA25 (S0, S1)
2.5V Shunt VDDA 2.5V 0.2A
Regulator
VDDCORE
0.8-1.55V 110A
VRM SW VCCP (S0, S1) / VCC_NB (S0, S1)
CPU REGUALTOR
D ATX P/S WITH 1A STBY CURRENT PW D
VCC_DDR (S0, S1, S3) DDR2 MEM I/F
5VSB 5V 3.3V 12V -12V 12V VDD MEM 1.8V 10A
+/-5% +/-5% +/-5% +/-5% +/-5% +/-5% VTT_DDR (S0, S1, S3)
VTT MEM 0.9V 2A
0.9V VTT_DDR
DDRII DIMMX4
REGULATOR VLDT 1.2V 0.5A
VDD MEM 12A
5VDIMM Linear 1.8V VDD SW VTT_DDR 2A
REGULATOR REGULATOR
NB_VCC1P1 (S0, S1)
1.1V VCC Linear
REGULATOR
NB RS780
VDDHT/RX 1.1V 1.2A
VCC_1V2 (S0, S1)
1.8V VCC Linear 1.2V VCC Linear VDDHTTX 1.2V 0.5A
REGULATOR REGULATOR
VDDPCIE 1.1V 2A
NB CORE VDDC 7A
1.1V
+1.8V_S0 (S0, S1)
VDDA18PCIE 1.8V 0.9A
PLLs 1.8V 0.1A
VDD18/VDD18_MEM
1.8V 0.01A
VDD_MEM 1.8V/1.5V0.5A
AVDD 3.3V 0.135A
C C

SB700

X4 PCI-E 0.8A
VCC3_SB Linear
REGULATOR
ATA I/O 0.5A

ATA PLL 0.01A

VCC3_SB (S0, S1, S3, S5) PCI-E PVDD 80mA

SB CORE 0.6A

CLOCK
+1.2VSB (S0, S1)
1.2V_SB Linear
REGULATOR 1.2V S5 PW 0.22A
VCC3_SB (S0, S1, S3, S5)
3.3V S5 PW 0.01A

USB CORE I/O 0.2A


VCC3 (S0, S1)
3.3V I/O 0.45A

+5VA Linear
B REGULATOR B
AUDIO CODEC
5VDUAL Linear
REGULATOR 3.3V CORE 0.1A
+5VA (S0, S1)
5V ANALOG 0.1A

SUPER I/O
VCC3_SB (S0, S1, S3, S5)
+3.3VDUAL (S3) 0.01A

+3.3V (S0, S1) 0.01A

+5V (S0, S1) 0.1A

PCI Slot (per slot) X1 PCIE per X16 PCIE per USB X6 FR USB X6 RL 2XPS/2
ENTHENET IEEE-1394 x1
5V 5.0A 3.3V 3.0A 3.3V 3.0A VDD VDD 5VDual 3.3V (S3) 0.1A 3.3V (S0, S1) 0.1A
A A
3.3V 7.6A 12V 0.5A 12V 5.5A 5VDual 5VDual 0.5A 3.3V (S0, S1) 0.5A 12V (S0, S1) 1.1A
12V 0.5A 3.3Vaux 0.1A 3.3VDual 0.1A 3.0A 3.0A
3.3VDual 0.375A
-12V 0.1A

MICRO-START INT'L CO.,LTD.


Title
Power Deliver Chart
Size Document Number Rev
C MS-7549 1.1
Date: Wednesday, November 05, 2008 Sheet 5 of 38
5 4 3 2 1
5 4 3 2 1

ISL6323CR CKT for Hybride


VIN
+12VIN
VCCP
C796
C753
VCC5_SB VCC5_SB VCC5 +12VIN C1u16X5 C10u16Y1206 EC73
R606 1+ 2
D 10.7KR1%0402 N-P0803BDG_TO252-3-RH
N-P0803BDG_TO252-3-RH D

D
R568 R631 Q83 Q94 CD680u4EL9-RH
R628 R595 1KR1%0402 R617 U_G1 R611 1R0805 G G

X_2.2R1%0805
10KR0402 2.2R1%0805 EC72

2.2R1%0805
R622 1+ 2

S
Q88
VCORE_EN# R633 B C778 10KR0402 CHOKE13 CH-0.5u40A-RH-1 CD680u4EL9-RH
33 VCORE_EN#
C0.1u16Y0402 PHASE1 1 2 VCCP
10KR0402 N-MMBT3904_NL_SOT23 C791 EC70

E
C4.7u10Y0805 C767 1+ 2

D
C1u25X0805-RH Q90 Q91 R620
VCC5 L_G1 R625 0R0805 G G 2.2R1%0805 CD680u4EL9-RH

75N02 CP55 CP54 EC62

S
7X7 QFN C775 1+

10
2
R623 U37 ISL6323CR X_COPPER X_COPPER
10KR0402 75N02 output CAP CD680u4EL9-RH
PVCC1_2 29

VCC
24 C784 C0.1u25X C1000p50X0402
EN R600 2.2R1%0805 IPHASE1 EC75
33 PWR_GOOD 37 VDDPWRGD BOOT1 31
8 PWROK_PWM 34 PWROK
ISEN1 1+ 2
9 32 U_G1 VIN
8 CPUVID5 VID5 UGATE1
8 33 PHASE1 CD680u4EL9-RH
8 CPUVID4 VID4 PHASE1
7 30 L_G1 EC64
8 CPUVID3 VID3/SVC LGATE1
8 CPUVID2 6 VID2/SVD
C790 1+ 2
5 C759
8 CPUVID1 VID1/SEL C10u16Y1206
4 20 ISEN1+ R616 255R1%0402-RH ISEN1 C1u16X5 CD680u4EL9-RH
8 CPUVID0 VID0/VFIXEN ISEN1+
C761 C795 21 ISEN1- C770 N-P0803BDG_TO252-3-RH
N-P0803BDG_TO252-3-RH

D
VCCP_NB R596 R567 1.2KR1%0402 ISEN1- IPHASE1 R571 C794 Q82 Q86 EC66
X_470R1%0402 C0.01u25X0402
48 COMP_NB 6.8KR1%0402-RH C0.1u16Y0402 U_G2 R599 1R0805 G G 1+ 2
X_C680p50X0402-RH C798 C10p50N0402-RH C0.1u16X0402
R605 1 FB_NB 27 R577 2.2R1%0805 R632 CD680u4EL9-RH

S
R613 360R1%0402 C793 BOOT2
100R0402 UPI6262_NB X_C0.1u16Y0402 26 U_G2 C783 C0.1u25X 10KR0402 CHOKE16 CH-0.5U40A-RH-1
UGATE2 PHASE2 PHASE2 EC69
PHASE2 25 1 2 VCCP
10 NB_VSEN
R579 0R0402 ISEN_NB_A R587 0R0402 2 VSEN_NB LGATE2 28 L_G2 1+ 2
C R589 C

D
C776 X_0R0402 R572 0R0402 6262_VCCNB 3 Q84 Q92 R634 CD680u4EL9-RH
X_C0.1u16Y0402 C780 RGND_NB ISEN2+ R597 255R1%0402-RH ISEN2 L_G2 R580 0R0805
ISEN2+ 22 G G 2.2R1%0805
X_C0.1u16Y0402 23 ISEN2- C771
R569 0R0402 ISEN2- IPHASE2 R641 C765 75N02 CP57 CP56
10 NB_GND

S
C757 C0.01u25X0402 6.8KR1%0402-RH
VCCP VCCP R642 1.2KR1%0402 18 C0.1u16X0402 C755 X_COPPER X_COPPER
R610 COMP PWM3 C0.1u16Y0402 75N02 C1000p50X0402
PWM3 35
100R0402 R640 R601 C766 X_C1000p50X0402 C752
X_470R1%0402 C33p50N0402 44 ISEN3+ R608 255R1%0402-RH ISEN3 IPHASE2 VCCP_NB
ISEN3+
X_100R0402

R621 17 43 ISEN3- C773 ISEN2


100R0402 FB ISEN3- IPHASE3 R643 C787
R588 0R0402 R574 R591 15 6.8KR1%0402-RH C0.1u16Y0402 +12VIN VIN EC68
COREFB_H 6262_VCCP RCOMP NB-output CAP
8 COREFB_H
560R1%0402-RH 1.1KR1%0402 VCC5 C0.1u16X0402 1+ 2
C774 C0.01u25X0402 36 R575 X_0R0805
C764 PWM4 CD680u4EL9-RH
C0.1u16Y0402 13 46 VCC5 R607 C797 C768
VSEN ISEN4+ R576 0R0805 C1u16X5 C10u16Y1206 EC71
ISEN4- 45 2.2R1%0805
R603 12 N-P0803BDG_TO252-3-RH 1+ 2

D
8 COREFB_L RGND
0R0402 U35 N-P0803BDG_TO252-3-RH

D
6 1 U_G3 R609 1R0805 G CD680u4EL9-RH
C760 C781 C758 R590 2.2R1%0805 VCC UGATE Q85 G Q93
PVCC_NB 42 +12VIN 7 PVCC BOOT 2
R614 X_C0.1u16Y0402 X_C0.1u16Y0402 R578 C0.1u16Y0402 R615 R581

S
100R0402 4.99KR1%0402 C754 C1u25X0805-RH C782 C1u16X5 2.2R1%0805 C788 C0.1u25X

S
40 R627 2.2R1%0805 8 10KR0402 CHOKE14 CH-0.5U40A-RH-1
BOOT_NB PHASE PHASE3
19 APA 1 2 VCCP
39 UGATE_NB C769 C0.1u25X 4
R592 56KR1%0402 UGATE_NB PHASE_NB GND
VCC5 16 38

D
C751 X_C0.1u16Y0402 RESET PHASE_NB LGATE_NB Q87 Q80 R593
LGATE_NB 41
PWM3 3 5 L_G3 R598 0R0805 G G
R626 69.8KR1%0402-RH PWM LGATE 2.2R1%0805
14 OFS
47 ISL6612ACBZT_SOIC8-RH 75N02 CP52 CP58
GND

S
ISEN_NB
5

VCC5 R612 11 C763


FS R604 X_6.2KR1%0402 C1000p50X0402 X_COPPER X_COPPER
X_10KR1%0402
GND
12V

+12VIN 3 1
49

B 75N02 B
PHASE_NB_A R624 ISEN_NB_A IPHASE3
R619 R586 6.8KR1%0402-RH ISEN3
12V

GND

4 2
X_10KR0402 120KR1%0402 C772 C0.1u16X0402
C779 C785 VIN
C0.1u16X0402
X_C0.01u25X0402 JPWR3
PWRCONN4P_CREAM-RH-1 BOTTOM PAD
C762
CONNECT TO GND C1u16X5 C786
Through 8 VIAs C10u16Y1206

D
CHOKE12 Q81
1 2 UGATE_NB R629 1R0805 G
+12VIN
VIN
R602
1

C789CH-1.1u27A2.5m-RH C792 VCC5 N-P0803BDG_TO252-3-RH


+

S
EC63 EC76 EC74 EC65 EC67 input CAP VCCP_NB
10KR0402 CHOKE15 CH-0.5U40A-RH-1
2

X_C0.01u25X0402 C0.1u16Y0402 R618 X_2.2R/0603 PHASE_NB 1 2


CD1000u16EL20-RH-3 CD1000u16EL20-RH-3
CD1000u16EL20-RH-3 CD1000u16EL20-RH-3

D
CD1000u16EL20-RH-3 C756 Q76 Q89 R594
X_C0.1u16Y0402 LGATE_NB R630 0R0805 G G 2.2R1%0805
VCC_DDR CP53 CP51

S
R573 X_300R0402 CPUVID1 C777
1

U38 X_COPPER X_COPPER


LOW FOR SVID 3 7 6262_VCCP_R R635 X_0R0402 6262_VCCP
BUS_SELVCC

GND OUT2 75N02 75N02 C1000p50X0402


R582 R583 4 PHASE_NB_A
7,11,20,33 SDA0 SDA
3VDUAL X_27R0402 X_27R0402 6 ISEN_NB_A
R637 OUT3
6262_VCCNB X_0R0402 6262_VCCNB_R 8 5
OUT1 SCL SCL0 7,11,20,33
R585
X_4.7KR0402 UPI6262_NBR639 X_0R0402 BUS_SEL=100%VCC
D

Q77 Q79 X_UP6262M8_SOT23-8-RH


A G G VCORE_EN# A
R638 R636
C

R584
Q78 X_N-2N7002_SOT23 VCC5
S

B X_1KR0402 X_10KR0402
10 CPU_CORE_TYPE
I2C address:0X60
X_N-2N7002_SOT23 R643=10K;R644=OPEN
E

X_4.7KR0402

R570 300R0402
MICRO-START INT'L CO.,LTD.
Title
X_N-MMBT3904_NL_SOT23 STL6740 3+1PHASE
Size Document Number Rev
Custom MS-7549 1.1
Date: Wednesday, November 12, 2008 Sheet 6 of 38
5 4 3 2 1
5 4 3 2 1

VCC3 CP7 CLK_VDD


X_Copper

L11 X_30L3A-15_0805-RH
C347 C338 C342 C325 C339 C320 C281 C272
C10u10Y0805 C0.1u16X0402-2 X_C0.1u16X0402-2 C0.1u16X0402-2 X_C0.1u16X0402-2 X_C0.1u16X0402-2 X_C0.1u16X0402-2 X_C0.1u16X0402-2

1- PLACE ALL THE SERIES TERMINATION


RESISTORS AS CLOSE AS U41 AS POSSIBLE
D D
2- ROUTE ALL CPUCLK/#, NBSRCCLK/#, GPPCLK/# AS DIFFERENT PAIR RULE
3- PUT DECOUPLING CAPS CLOSE TO U41
POWER PIN
VCC3
CP9 X_Copper

L12 CLK_VDDA

X_30L3A-15_0805-RH U16A
C287 C299
X_C10u10Y0805 C0.1u16X0402-2 44 50 CPU_CLK
CLK_VDD VDDA CPUKG0T_LPRS CPU_CLK 8
43 49 CPU_CLK#
GNDA CPUKG0C_LPRS CPU_CLK# 8
CPUKG1T_LPRS/SRC7T_LPRS 46
60 VDDREF CPUKG1C_LPRS/SRC7C_LPRS 45
61 RN22
GNDREF NBGFX_SRCCLK_R
ATIG0T_LPRS 38 1 2 NBGFX_SRCCLK 15
39 37 NBGFX_SRCCLK#_R 3 4 NBGFX_SRCCLK# 15
VCC3 VDDSATA ATIG0C_LPRS GFX_CLKP_R
42 GNDSATA ATIG1T_LPRS 36 5 6 GFX_CLKP 23
CP6 X_Copper 35 GFX_CLKN_R 7 8
ATIG1C_LPRS GFX_CLKN 23
VDD48 64 32
VDD48 ATIG2T_LPRS 8P4R-0R0402
3 GND48 ATIG2C_LPRS 31
L10 30
ATIG3T_LPRS
48 VDDCPU ATIG3C_LPRS 29
X_30L3A-15_0805-RH 47
C275 GNDCPU
SB_SRC0T_LPRS 27
C C1u6.3Y0402-RH 56 VDDHTT SB_SRC0C_LPRS 26 C
53 GNDHTT SB_SRC1T_LPRS 23
SB_SRC1C_LPRS 22
34 VDDATIG
SRC0T_LPRS 21
11 VDDSRC SRC0C_LPRS 20
16 19 GPPCLK0 GPPCLK0 23
VDDSRC SRC1T_LPRS GPPCLK0#
25 VDDSB_SRC SRC1C_LPRS 18 GPPCLK0# 23
SRC2T_LPRS 15
28 GNDATIG SRC2C_LPRS 14
C256 14.318MHZ16P_D-RH 33 13 CK_PE_100M_LAN
GNDATIG SRC3T_LPRS CK_PE_100M_LAN 27
12 CK_PE_100M_LAN#
SRC3C_LPRS CK_PE_100M_LAN# 27
10 9 NBLINKCLK
GNDSRC SRC4T_LPRS NBLINKCLK 15
2

C22p50N 17 8 NBLINKCLK#
GNDSRC SRC4C_LPRS NBLINKCLK# 15
Y2 R202 24 7 DOC1#
GNDSB_SRC **DOC_1/SRC5T_LPRS DOC0#
X_1MR 6
1

C255 TXC1 **DOC_0/SRC5C_LPRS SBSRCCLK


62 X1 SRC6T/SATAT_LPRS 41 SBSRCCLK 18
TXC2 SBSRCCLK#

65
63 X2 SRC6C/SATAC_LPRS 40 SBSRCCLK# 18 U16B
C22p50N CLK_VDD
R216 X_4.7KR0402 52 55 HTREFCLK

THERMPAD
CLK_VDD RESTORE# HTT0T_LPRS/66M HTREFCLK 15
20,30,33,34 FP_RST# R206 0R0402 RST#_CLK 54 HTREFCLK#
HTT0C_LPRS/66M HTREFCLK# 15
R235 0R0402 4
6,11,20,33 SCL0 SMBCLK
R239 0R0402 5 2 SIO_CLK_R R227 33R0402 DOC R225
6,11,20,33 SDA0 SMBDAT **SEL_CPU1#/48MHz_0 SIO_CLK 30
1 USBCLK_EXT_R R228 0R0402 10KR0402
**SEL_DOC/48MHz_1 USBCLK_EXT 20
CLK_VDD R217 1KR0402 PD# 51 PD# USBCLK_EXT_R
CLK_VDD 59 REF0/SEL_HTT66 C306 C311
58 C10p50N0402 C10p50N0402 ICS9LPRS477BKLFT_MLF64-RH
B REF1/SEL_SATA B
NB NB_OSC_14M
57 REF2/SEL_OC_MODE**
RS740 R214 R213 R215 EMI suggest
3.3V 33R serial X_10KR0402
RX780 1.8V 75R/100R X_10KR0402 X_10KR0402 ICS9LPRS477BKLFT_MLF64-RH

RS780 1.1V 150R/75R SEL_HTT66


R205 SEL_SATA
SEL_OC_MODE
15 NB_OSC_14M
SEL_SATA R663 X_0R0402 25M_48M_66M_OSC
25M_48M_66M_OSC 18 VCC3
150R1%0402
R212 R204 C835
R200 10KR0402 10KR0402 X_10p/50v/N/4
75R1%0402 C249
X_C10p50N0402

Reserved for EMI 0906 R245


4.7KR0402
EXT CLK FREQUENCY SELECT TABLE(MHZ)
REF0/SEL_HTT66 HTT CLOCK FS2 FS1 FS0 CPU SRCCLK HTT PCI USB COMMENT DOC0#
[2:1]
0 100.00 DIFFERENTIAL R243 X_4.7KR0402 DOC1#
0 0 0 Hi-Z 100.00 Hi-Z Hi-Z 48.00 Reserved

A
1 66.66 SINGLE END 0 0 1 X 100.00 X/3 X/6 48.00 Reserved A

0 1 0 180.00 100.00 60.00 30.00 48.00 Reserved


0 1 1 220.00 100.00 36.56 73.12 48.00 Reserved Micro Star Restricted Secret
1 0 0 100.00 100.00 66.66 33.33 48.00 Reserved Title Rev
Clock-Gen ICS9LPRS477
1 0 1 133.33 100.00 66.66 33.33 48.00 Reserved 1.1
Document Number MS-7549
1 1 1 200.00 100.00 66.66 33.33 48.00 Normal HAMMER operation
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Tuesday, November 11, 2008
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 7 of 38
5 4 3 2 1
5 4 3 2 1

VCC_DDR

CPU_THRIP# 20

300R/4

300R/4
TALERT# 19,30
D D

2
4
6
8
R184

R185
CPU_HOT RN18
CPU_HOT 18
8P4R-4.7KR0402

1
3
5
7
Q37
HT_CADIN_H[15..0] CPU_HOT 4
13 HT_CADIN_H[15..0]
TALERT# 3 5
HT_CADIN_L[15..0] VDDA_25 VDDA25 CPU_THRIP_L# 1
13 HT_CADIN_L[15..0]
CPU_THRIP# 6 2
HT_CADOUT_H[15..0]
13 HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0] L2
13 HT_CADOUT_L[15..0]

80/2A/B8 VDDA25
VCCA_1V2 VCCA_1V2 VCC_DDR
place near the PWM IC
C84 C77
4.7u/16v/Y5/1206 C85 CPU1D
7 CPU_CLK
C94 C187 C97 C95 C230 C236 C253 C210 C213 C89
C234 3900p/50vX7/6 C10
X_0.22u/16v/X7/6 R116 VDDA1
4.7u/16v/Y5/1206 D10 VDDA2
C83 169R/6/1% R143 R141
0.22u/16v/X7/6 X_0.22u/16v/X7/6 X_4.7u/16v/Y5/1206 X_0.22u/16v/X7/6 3900p/50vX7/6 CPUCLKIN 0.22u/16v/X7/6 3300p/50v/X7/4 A8
0.22u/16v/X7/6 X_0.22u/16v/X7/6 X_4.7u/16v/Y5/1206 0.22u/16v/X7/6 CPUCLKIN# CLKIN_H
7 CPU_CLK# B8 CLKIN_L

1K/4/5%

1K/4/5%
18 LDT_PWRGD LDT_PWRGD C9 D2 CPUVID5
LDT_STOP# PWROK VID(5) CPUVID4
15,18 LDT_STOP# D8 LDTSTOP_L VID(4) D1
C
15,18 LDT_RST# LDT_RST# C7 C1 CPUVID3 C
VCC_DDR RESET_L VID(3) CPUVID2
CPU1A E3
C74 TP20 CPU_PRESENT_L VID(2) CPUVID1
AL3 CPU_PRESENT_L VID(1) E2
N6 AD5 X_1000p/50v/X7/6 E1 CPUVID0
13 HT_CLKIN_H1 L0_CLKIN_H(1) L0_CLKOUT_H(1) HT_CLKOUT_H1 13 VID(0)
13 HT_CLKIN_L1 P6 L0_CLKIN_L(1) L0_CLKOUT_L(1) AD4 HT_CLKOUT_L1 13
N3 AD1 R176 1K/4/5% THERM_SIC AL6 AK7 CPU_THRIP_L#
13 HT_CLKIN_H0 L0_CLKIN_H(0) L0_CLKOUT_H(0) HT_CLKOUT_H0 13 SIC THERMTRIP_L
N2 AC1 R177 1K/4/5% THERM_SID AK6 AL7 CPU_HOT
13 HT_CLKIN_L0 L0_CLKIN_L(0) L0_CLKOUT_L(0) HT_CLKOUT_L0 13 SID PROCHOT_L
V4 Y6 TP21 CPU_TDI AL10 AK10 CPU_TDO TP19
13 HT_CTLIN_H1 L0_CTLIN_H(1) L0_CTLOUT_H(1) HT_CTLOUT_H1 13 TDI TDO 6 CPUVID5
V5 W6 TP17 CPU_TRST_L AJ10
13 HT_CTLIN_L1 L0_CTLIN_L(1) L0_CTLOUT_L(1) HT_CTLOUT_L1 13 TRST_L 6 CPUVID4
U1 W2 TP16 CPU_TCK AH10
13 HT_CTLIN_H0 L0_CTLIN_H(0) L0_CTLOUT_H(0) HT_CTLOUT_H0 13 TCK 6 CPUVID3
V1 W3 TP23 CPU_TMS AL9
13 HT_CTLIN_L0 L0_CTLIN_L(0) L0_CTLOUT_L(0) HT_CTLOUT_L0 13 TMS 6 CPUVID2
TP5
VCC_DDR 6 CPUVID1
HT_CADIN_H15 U6 Y5 HT_CADOUT_H15 CPU_DBREQ_L A5 B6 CPU_DBRDY
L0_CADIN_H(15) L0_CADOUT_H(15) DBREQ_L DBRDY 6 CPUVID0
HT_CADIN_L15 V6 Y4 HT_CADOUT_L15
HT_CADIN_H14 L0_CADIN_L(15) L0_CADOUT_L(15) HT_CADOUT_H14 VCC_DDR
T4 L0_CADIN_H(14) L0_CADOUT_H(14) AB6 6 COREFB_H G2 VDD_FB_H VDDIO_FB_H AK11
HT_CADIN_L14 T5 AA6 HT_CADOUT_L14 G1 AL11
L0_CADIN_L(14) L0_CADOUT_L(14) 6 COREFB_L VDD_FB_L VDDIO_FB_L
HT_CADIN_H13 R6 AB5 HT_CADOUT_H13 TP9
HT_CADIN_L13 L0_CADIN_H(13) L0_CADOUT_H(13) HT_CADOUT_L13 TP10 CPU_VTT_SENSE CPU_PSI_L
T6 L0_CADIN_L(13) L0_CADOUT_L(13) AB4 E12 VTT_SENSE PSI_L F1
HT_CADIN_H12 P4 AD6 HT_CADOUT_H12 R183 VCCA_1V2
HT_CADIN_L12 L0_CADIN_H(12) L0_CADOUT_H(12) HT_CADOUT_L12
P5 L0_CADIN_L(12) L0_CADOUT_L(12) AC6 39.2R/6/1%
HT_CADIN_H11 M4 AF6 HT_CADOUT_H11 CPU_M_VREF F12 V8 HTREF1 R181 44.2R/6/1%
HT_CADIN_L11 L0_CADIN_H(11) L0_CADOUT_H(11) HT_CADOUT_L11 CPU_STRAP_HI_E11 M_VREF HTREF1 HTREF0 R182 44.2R/6/1%
M5 L0_CADIN_L(11) L0_CADOUT_L(11) AE6 AH11 M_ZN HTREF0 V7
HT_CADIN_H10 L6 AF5 HT_CADOUT_H10 CPU_STRAP_LO_F11 AJ11
HT_CADIN_L10 L0_CADIN_H(10) L0_CADOUT_H(10) HT_CADOUT_L10 M_ZP
M6 L0_CADIN_L(10) L0_CADOUT_L(10) AF4
HT_CADIN_H9 K4 AH6 HT_CADOUT_H9 CPU_TEST25_H A10 C11 C180 C181
HT_CADIN_L9 L0_CADIN_H(9) L0_CADOUT_H(9) HT_CADOUT_L9 R180 CPU_TEST25_L TEST25_H TEST29_H
K5 L0_CADIN_L(9) L0_CADOUT_L(9) AG6 B10 TEST25_L TEST29_L D11 1000p/50v/X7/4 1000p/50v/X7/4
HT_CADIN_H8 J6 AH5 HT_CADOUT_H8 39.2R/6/1% R112 300R/4 F10
HT_CADIN_L8 L0_CADIN_H(8) L0_CADOUT_H(8) HT_CADOUT_L8 R113 300R/4 TEST19 R115
K6 L0_CADIN_L(8) L0_CADOUT_L(8) AH4 E9 TEST18
AJ7 TEST13 80.6R/6/1%
HT_CADIN_H7 U3 Y1 HT_CADOUT_H7 F6
B HT_CADIN_L7 L0_CADIN_H(7) L0_CADOUT_H(7) HT_CADOUT_L7 TEST9 B
U2 L0_CADIN_L(7) L0_CADOUT_L(7) W1
HT_CADIN_H6 R1 AA2 HT_CADOUT_H6 TP8 D6 AK8 TP22
HT_CADIN_L6 L0_CADIN_H(6) L0_CADOUT_H(6) HT_CADOUT_L6 TP11 TEST17 TEST24 TP14
T1 L0_CADIN_L(6) L0_CADOUT_L(6) AA3 E7 TEST16 TEST23 AH8
HT_CADIN_H5 R3 AB1 HT_CADOUT_H5 TP13 F8 AJ9 CPU_TEST22 VCC_DDR
HT_CADIN_L5 L0_CADIN_H(5) L0_CADOUT_H(5) HT_CADOUT_L5 TP6 TEST15 TEST22 CPU_TEST21
R2 L0_CADIN_L(5) L0_CADOUT_L(5) AA1 C5 TEST14 TEST21 AL8

300R0402
HT_CADIN_H4 N1 AC2 HT_CADOUT_H4 TP15 AH9 AJ8 TP18
L0_CADIN_H(4) L0_CADOUT_H(4) TEST12 TEST20

R179

R178
300R/4
HT_CADIN_L4 P1 AC3 HT_CADOUT_L4
HT_CADIN_H3 L0_CADIN_L(4) L0_CADOUT_L(4) HT_CADOUT_H3
L1 L0_CADIN_H(3) L0_CADOUT_H(3) AE2 E5 TEST7 TEST28_H J10
HT_CADIN_L3 M1 AE3 HT_CADOUT_L3 AJ5 H9 VCC_DDR R101
HT_CADIN_H2 L0_CADIN_L(3) L0_CADOUT_L(3) HT_CADOUT_H2 TEST6 TEST28_L TP24
L3 L0_CADIN_H(2) L0_CADOUT_H(2) AF1 30 THERMDC_CPU AG9 TEST5 TEST27 AK9 15R/6/1%
HT_CADIN_L2 L2 AE1 HT_CADOUT_L2 AG8 AK5 R175 300R/4
HT_CADIN_H1 L0_CADIN_L(2) L0_CADOUT_L(2) HT_CADOUT_H1 30 THERMDA_CPU TEST4 TEST26 CPU_M_VREF TP1
J1 L0_CADIN_H(1) L0_CADOUT_H(1) AG2 AH7 TEST3 TEST10 G7
HT_CADIN_L1 K1 AG3 HT_CADOUT_L1 AJ6 D4
HT_CADIN_H0 L0_CADIN_L(1) L0_CADOUT_L(1) HT_CADOUT_H0 TEST2 TEST8
J3 L0_CADIN_H(0) L0_CADOUT_H(0) AH1
HT_CADIN_L0 J2 AG1 HT_CADOUT_L0 R108 C88 C82
L0_CADIN_L(0) L0_CADOUT_L(0)
ZIF-SOCK940-RH-1 15R/6/1% 1000p/50v/X7/6
ZIF-SOCK940-RH-1 CPU_DBREQ_L
C66
X_C0.1u25Y 0.1u/25v/Y5/4
VCC_DDR
RN5
1 2 CPU_DBREQ_L
VCC_DDR VCC3 3 4 LDT_RST#
VCC_DDR 5 6 LDT_STOP#
7 8 LDT_PWRGD

R132 R68 CPU_PRESENT_L R172 1K/4/5% 8P4R/300R/6


4.7K/4 10K/4 CPU_TEST25_H R110 510R/0402

CPU_TEST25_L R114 510R/0402


B

A A
Q22
2N3904_SOT23 Micro Star Restricted Secret
LDT_PWRGD E C PWROK_PWM 6
Title Rev
K9 M2 HT I/F,CTRL&DEBUG 1.1
Document Number MS-7549
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Sunday, November 09, 2008
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 8 of 38

5 4 3 2 1
5 4 3 2 1

MEM_MA_DQS_L[7..0] MEM_MB_DQS_L[7..0]
11 MEM_MA_DQS_L[7..0] 11 MEM_MB_DQS_L[7..0]
MEM_MA_DQS_H[7..0] MEM_MB_DQS_H[7..0]
11 MEM_MA_DQS_H[7..0] 11 MEM_MB_DQS_H[7..0]
MEM_MA_DM[7..0] MEM_MB_DM[7..0]
11 MEM_MA_DM[7..0] 11 MEM_MB_DM[7..0]
MEM_MA_ADD[15..0] MEM_MB_ADD[15..0]
11,12 MEM_MA_ADD[15..0] 11,12 MEM_MB_ADD[15..0]
D D
MEM_MA_DATA[63..0] MEM_MB_DATA[63..0]
11 MEM_MA_DATA[63..0] 11 MEM_MB_DATA[63..0]

CPU1B
CPU1C
MEM_MA0_CLK_H2 AG21 AE14 MEM_MA_DATA63
11,12 MEM_MA0_CLK_H2 MA0_CLK_H(2) MA_DATA(63)
MEM_MA0_CLK_L2 AG20 AG14 MEM_MA_DATA62 MEM_MB0_CLK_H2 AJ19 AH13 MEM_MB_DATA63
11,12 MEM_MA0_CLK_L2 MA0_CLK_L(2) MA_DATA(62) 11,12 MEM_MB0_CLK_H2 MB0_CLK_H(2) MB_DATA(63)
MEM_MA0_CLK_H1 G19 AG16 MEM_MA_DATA61 MEM_MB0_CLK_L2 AK19 AL13 MEM_MB_DATA62
11,12 MEM_MA0_CLK_H1 MA0_CLK_H(1) MA_DATA(61) 11,12 MEM_MB0_CLK_L2 MB0_CLK_L(2) MB_DATA(62)
MEM_MA0_CLK_L1 H19 AD17 MEM_MA_DATA60 MEM_MB0_CLK_H1 A18 AL15 MEM_MB_DATA61
11,12 MEM_MA0_CLK_L1 MA0_CLK_L(1) MA_DATA(60) 11,12 MEM_MB0_CLK_H1 MB0_CLK_H(1) MB_DATA(61)
MEM_MA0_CLK_H0 U27 AD13 MEM_MA_DATA59 MEM_MB0_CLK_L1 A19 AJ15 MEM_MB_DATA60
11,12 MEM_MA0_CLK_H0 MA0_CLK_H(0) MA_DATA(59) 11,12 MEM_MB0_CLK_L1 MB0_CLK_L(1) MB_DATA(60)
MEM_MA0_CLK_L0 U26 AE13 MEM_MA_DATA58 MEM_MB0_CLK_H0 U31 AF13 MEM_MB_DATA59
11,12 MEM_MA0_CLK_L0 MA0_CLK_L(0) MA_DATA(58) 11,12 MEM_MB0_CLK_H0 MB0_CLK_H(0) MB_DATA(59)
AG15 MEM_MA_DATA57 MEM_MB0_CLK_L0 U30 AG13 MEM_MB_DATA58
MA_DATA(57) 11,12 MEM_MB0_CLK_L0 MB0_CLK_L(0) MB_DATA(58)
MEM_MA0_CS_L1 AC25 AE16 MEM_MA_DATA56 AL14 MEM_MB_DATA57
11,12 MEM_MA0_CS_L1 MA0_CS_L(1) MA_DATA(56) MB_DATA(57)
MEM_MA0_CS_L0 AA24 AG17 MEM_MA_DATA55 MEM_MB0_CS_L1 AE30 AK15 MEM_MB_DATA56
11,12 MEM_MA0_CS_L0 MA0_CS_L(0) MA_DATA(55) 11,12 MEM_MB0_CS_L1 MB0_CS_L(1) MB_DATA(56)
AE18 MEM_MA_DATA54 MEM_MB0_CS_L0 AC31 AL16 MEM_MB_DATA55
MA_DATA(54) 11,12 MEM_MB0_CS_L0 MB0_CS_L(0) MB_DATA(55)
MEM_MA0_ODT0 AC28 AD21 MEM_MA_DATA53 AL17 MEM_MB_DATA54
11,12 MEM_MA0_ODT0 MA0_ODT(0) MA_DATA(53) MB_DATA(54)
AG22 MEM_MA_DATA52 MEM_MB0_ODT0 AD29 AK21 MEM_MB_DATA53
MA_DATA(52) 11,12 MEM_MB0_ODT0 MB0_ODT(0) MB_DATA(53)
AE20 AE17 MEM_MA_DATA51 AL21 MEM_MB_DATA52
MA1_CLK_H(2) MA_DATA(51) MEM_MA_DATA50 MB_DATA(52) MEM_MB_DATA51
AE19 MA1_CLK_L(2) MA_DATA(50) AF17 AL19 MB1_CLK_H(2) MB_DATA(51) AH15
G20 AF21 MEM_MA_DATA49 AL18 AJ16 MEM_MB_DATA50
MA1_CLK_H(1) MA_DATA(49) MEM_MA_DATA48 MB1_CLK_L(2) MB_DATA(50) MEM_MB_DATA49
G21 MA1_CLK_L(1) MA_DATA(48) AE21 C19 MB1_CLK_H(1) MB_DATA(49) AH19
V27 AF23 MEM_MA_DATA47 D19 AL20 MEM_MB_DATA48
MA1_CLK_H(0) MA_DATA(47) MEM_MA_DATA46 MB1_CLK_L(1) MB_DATA(48) MEM_MB_DATA47
W27 MA1_CLK_L(0) MA_DATA(46) AE23 W29 MB1_CLK_H(0) MB_DATA(47) AJ22
AJ26 MEM_MA_DATA45 W28 AL22 MEM_MB_DATA46
MA_DATA(45) MEM_MA_DATA44 MB1_CLK_L(0) MB_DATA(46) MEM_MB_DATA45
AD27 MA1_CS_L(1) MA_DATA(44) AG26 MB_DATA(45) AL24
AA25 AE22 MEM_MA_DATA43 AE29 AK25 MEM_MB_DATA44
MA1_CS_L(0) MA_DATA(43) MEM_MA_DATA42 MB1_CS_L(1) MB_DATA(44) MEM_MB_DATA43
MA_DATA(42) AG23 AB31 MB1_CS_L(0) MB_DATA(43) AJ21
AC27 AH25 MEM_MA_DATA41 AH21 MEM_MB_DATA42
MA1_ODT(0) MA_DATA(41) MEM_MA_DATA40 MB_DATA(42) MEM_MB_DATA41
MA_DATA(40) AF25 AD31 MB1_ODT(0) MB_DATA(41) AH23
AJ28 MEM_MA_DATA39 AJ24 MEM_MB_DATA40
C MEM_MA_CAS_L MA_DATA(39) MEM_MA_DATA38 MB_DATA(40) MEM_MB_DATA39 C
11,12 MEM_MA_CAS_L AB25 MA_CAS_L MA_DATA(38) AJ29 MB_DATA(39) AL27
MEM_MA_WE_L AB27 AF29 MEM_MA_DATA37 MEM_MB_CAS_L AC29 AK27 MEM_MB_DATA38
11,12 MEM_MA_WE_L MA_WE_L MA_DATA(37) 11,12 MEM_MB_CAS_L MB_CAS_L MB_DATA(38)
MEM_MA_RAS_L AA26 AE26 MEM_MA_DATA36 MEM_MB_WE_L AC30 AH31 MEM_MB_DATA37
11,12 MEM_MA_RAS_L MA_RAS_L MA_DATA(36) 11,12 MEM_MB_WE_L MB_WE_L MB_DATA(37)
AJ27 MEM_MA_DATA35 MEM_MB_RAS_L AB29 AG30 MEM_MB_DATA36
MA_DATA(35) 11,12 MEM_MB_RAS_L MB_RAS_L MB_DATA(36)
MEM_MA_BANK2 N25 AH27 MEM_MA_DATA34 AL25 MEM_MB_DATA35
11,12 MEM_MA_BANK2 MA_BANK(2) MA_DATA(34) MB_DATA(35)
MEM_MA_BANK1 Y27 AG29 MEM_MA_DATA33 MEM_MB_BANK2 N31 AL26 MEM_MB_DATA34
11,12 MEM_MA_BANK1 MA_BANK(1) MA_DATA(33) 11,12 MEM_MB_BANK2 MB_BANK(2) MB_DATA(34)
MEM_MA_BANK0 AA27 AF27 MEM_MA_DATA32 MEM_MB_BANK1 AA31 AJ30 MEM_MB_DATA33
11,12 MEM_MA_BANK0 MA_BANK(0) MA_DATA(32) 11,12 MEM_MB_BANK1 MB_BANK(1) MB_DATA(33)
E29 MEM_MA_DATA31 MEM_MB_BANK0 AA28 AJ31 MEM_MB_DATA32
MA_DATA(31) 11,12 MEM_MB_BANK0 MB_BANK(0) MB_DATA(32)
MEM_MA_CKE1 L27 E28 MEM_MA_DATA30 E31 MEM_MB_DATA31
12 MEM_MA_CKE1 MA_CKE(1) MA_DATA(30) MB_DATA(31)
MEM_MA_CKE0 M25 D27 MEM_MA_DATA29 MEM_MB_CKE1 M31 E30 MEM_MB_DATA30
11,12 MEM_MA_CKE0 MA_CKE(0) MA_DATA(29) 12 MEM_MB_CKE1 MB_CKE(1) MB_DATA(30)
C27 MEM_MA_DATA28 MEM_MB_CKE0 M29 B27 MEM_MB_DATA29
MA_DATA(28) 11,12 MEM_MB_CKE0 MB_CKE(0) MB_DATA(29)
MEM_MA_ADD15 M27 G26 MEM_MA_DATA27 A27 MEM_MB_DATA28
MEM_MA_ADD14 MA_ADD(15) MA_DATA(27) MEM_MA_DATA26 MEM_MB_ADD15 MB_DATA(28) MEM_MB_DATA27
N24 MA_ADD(14) MA_DATA(26) F27 N28 MB_ADD(15) MB_DATA(27) F29
MEM_MA_ADD13 AC26 C28 MEM_MA_DATA25 MEM_MB_ADD14 N29 F31 MEM_MB_DATA26
MEM_MA_ADD12 MA_ADD(13) MA_DATA(25) MEM_MA_DATA24 MEM_MB_ADD13 MB_ADD(14) MB_DATA(26) MEM_MB_DATA25
N26 MA_ADD(12) MA_DATA(24) E27 AE31 MB_ADD(13) MB_DATA(25) A29
MEM_MA_ADD11 P25 F25 MEM_MA_DATA23 MEM_MB_ADD12 N30 A28 MEM_MB_DATA24
MEM_MA_ADD10 MA_ADD(11) MA_DATA(23) MEM_MA_DATA22 MEM_MB_ADD11 MB_ADD(12) MB_DATA(24) MEM_MB_DATA23
Y25 MA_ADD(10) MA_DATA(22) E25 P29 MB_ADD(11) MB_DATA(23) A25
MEM_MA_ADD9 N27 E23 MEM_MA_DATA21 MEM_MB_ADD10 AA29 A24 MEM_MB_DATA22
MEM_MA_ADD8 MA_ADD(9) MA_DATA(21) MEM_MA_DATA20 MEM_MB_ADD9 MB_ADD(10) MB_DATA(22) MEM_MB_DATA21
R24 MA_ADD(8) MA_DATA(20) D23 P31 MB_ADD(9) MB_DATA(21) C22
MEM_MA_ADD7 P27 E26 MEM_MA_DATA19 MEM_MB_ADD8 R29 D21 MEM_MB_DATA20
MEM_MA_ADD6 MA_ADD(7) MA_DATA(19) MEM_MA_DATA18 MEM_MB_ADD7 MB_ADD(8) MB_DATA(20) MEM_MB_DATA19
R25 MA_ADD(6) MA_DATA(18) C26 R28 MB_ADD(7) MB_DATA(19) A26
MEM_MA_ADD5 R26 G23 MEM_MA_DATA17 MEM_MB_ADD6 R31 B25 MEM_MB_DATA18
MEM_MA_ADD4 MA_ADD(5) MA_DATA(17) MEM_MA_DATA16 MEM_MB_ADD5 MB_ADD(6) MB_DATA(18) MEM_MB_DATA17
R27 MA_ADD(4) MA_DATA(16) F23 R30 MB_ADD(5) MB_DATA(17) B23
MEM_MA_ADD3 T25 E22 MEM_MA_DATA15 MEM_MB_ADD4 T31 A22 MEM_MB_DATA16
MEM_MA_ADD2 MA_ADD(3) MA_DATA(15) MEM_MA_DATA14 MEM_MB_ADD3 MB_ADD(4) MB_DATA(16) MEM_MB_DATA15
U25 MA_ADD(2) MA_DATA(14) E21 T29 MB_ADD(3) MB_DATA(15) B21
MEM_MA_ADD1 T27 F17 MEM_MA_DATA13 MEM_MB_ADD2 U29 A20 MEM_MB_DATA14
MEM_MA_ADD0 MA_ADD(1) MA_DATA(13) MEM_MA_DATA12 MEM_MB_ADD1 MB_ADD(2) MB_DATA(14) MEM_MB_DATA13
W24 MA_ADD(0) MA_DATA(12) G17 U28 MB_ADD(1) MB_DATA(13) C16
G22 MEM_MA_DATA11 MEM_MB_ADD0 AA30 D15 MEM_MB_DATA12
MEM_MA_DQS_H7 MA_DATA(11) MEM_MA_DATA10 MB_ADD(0) MB_DATA(12) MEM_MB_DATA11
AD15 MA_DQS_H(7) MA_DATA(10) F21 MB_DATA(11) C21
MEM_MA_DQS_L7 AE15 G18 MEM_MA_DATA9 MEM_MB_DQS_H7 AK13 A21 MEM_MB_DATA10
MEM_MA_DQS_H6 MA_DQS_L(7) MA_DATA(9) MEM_MA_DATA8 MEM_MB_DQS_L7 MB_DQS_H(7) MB_DATA(10) MEM_MB_DATA9
AG18 MA_DQS_H(6) MA_DATA(8) E17 AJ13 MB_DQS_L(7) MB_DATA(9) A17
B MEM_MA_DQS_L6 MEM_MA_DATA7 MEM_MB_DQS_H6 MEM_MB_DATA8 B
AG19 MA_DQS_L(6) MA_DATA(7) G16 AK17 MB_DQS_H(6) MB_DATA(8) A16
MEM_MA_DQS_H5 AG24 E15 MEM_MA_DATA6 MEM_MB_DQS_L6 AJ17 B15 MEM_MB_DATA7
MEM_MA_DQS_L5 MA_DQS_H(5) MA_DATA(6) MEM_MA_DATA5 MEM_MB_DQS_H5 MB_DQS_L(6) MB_DATA(7) MEM_MB_DATA6
AG25 MA_DQS_L(5) MA_DATA(5) G13 AK23 MB_DQS_H(5) MB_DATA(6) A14
MEM_MA_DQS_H4 AG27 H13 MEM_MA_DATA4 MEM_MB_DQS_L5 AL23 E13 MEM_MB_DATA5
MEM_MA_DQS_L4 MA_DQS_H(4) MA_DATA(4) MEM_MA_DATA3 MEM_MB_DQS_H4 MB_DQS_L(5) MB_DATA(5) MEM_MB_DATA4
AG28 MA_DQS_L(4) MA_DATA(3) H17 AL28 MB_DQS_H(4) MB_DATA(4) F13
MEM_MA_DQS_H3 D29 E16 MEM_MA_DATA2 MEM_MB_DQS_L4 AL29 C15 MEM_MB_DATA3
MEM_MA_DQS_L3 MA_DQS_H(3) MA_DATA(2) MEM_MA_DATA1 MEM_MB_DQS_H3 MB_DQS_L(4) MB_DATA(3) MEM_MB_DATA2
C29 MA_DQS_L(3) MA_DATA(1) E14 D31 MB_DQS_H(3) MB_DATA(2) A15
MEM_MA_DQS_H2 C25 G14 MEM_MA_DATA0 MEM_MB_DQS_L3 C31 A13 MEM_MB_DATA1
MEM_MA_DQS_L2 MA_DQS_H(2) MA_DATA(0) MEM_MB_DQS_H2 MB_DQS_L(3) MB_DATA(1) MEM_MB_DATA0
D25 MA_DQS_L(2) C24 MB_DQS_H(2) MB_DATA(0) D13
MEM_MA_DQS_H1 E19 J28 MEM_MB_DQS_L2 C23
MEM_MA_DQS_L1 MA_DQS_H(1) MA_DQS_H(8) MEM_MB_DQS_H1 MB_DQS_L(2)
F19 MA_DQS_L(1) MA_DQS_L(8) J27 D17 MB_DQS_H(1) MB_DQS_H(8) J31
MEM_MA_DQS_H0 F15 MEM_MB_DQS_L1 C17 J30
MEM_MA_DQS_L0 MA_DQS_H(0) MEM_MB_DQS_H0 MB_DQS_L(1) MB_DQS_L(8)
G15 MA_DQS_L(0) MA_DM(8) J25 C14 MB_DQS_H(0)
MEM_MB_DQS_L0 C13 J29
MEM_MA_DM7 MB_DQS_L(0) MB_DM(8)
AF15 MA_DM(7) MA_CHECK(7) K25
MEM_MA_DM6 AF19 J26 MEM_MB_DM7 AJ14 K29
MEM_MA_DM5 MA_DM(6) MA_CHECK(6) MEM_MB_DM6 MB_DM(7) MB_CHECK(7)
AJ25 MA_DM(5) MA_CHECK(5) G28 AH17 MB_DM(6) MB_CHECK(6) K31
MEM_MA_DM4 AH29 G27 MEM_MB_DM5 AJ23 G30
MEM_MA_DM3 MA_DM(4) MA_CHECK(4) MEM_MB_DM4 MB_DM(5) MB_CHECK(5)
B29 MA_DM(3) MA_CHECK(3) L24 AK29 MB_DM(4) MB_CHECK(4) G29
MEM_MA_DM2 E24 K27 MEM_MB_DM3 C30 L29
MEM_MA_DM1 MA_DM(2) MA_CHECK(2) MEM_MB_DM2 MB_DM(3) MB_CHECK(3)
E18 MA_DM(1) MA_CHECK(1) H29 A23 MB_DM(2) MB_CHECK(2) L28
MEM_MA_DM0 H15 H27 MEM_MB_DM1 B17 H31
MA_DM(0) MA_CHECK(0) MEM_MB_DM0 MB_DM(1) MB_CHECK(1)
B13 MB_DM(0) MB_CHECK(0) G31
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1

A A

Micro Star Restricted Secret


Title Rev
K9 M2 DDR MEMORY I/F 1.1
Document Number MS-7549
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Friday, November 07, 2008
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 9 of 38
5 4 3 2 1
5 4 3 2 1

D D

VCCP_NB
VCCP VCCP
CPU1F VCCP CPU1G CPU1H VCCA_1V2 CPU1I
VCC_DDR
A4 A3 L14 AK20 AA20 N17 AJ4 H6 VLDT_RUN_B
VDD VSS VDD VSS VDD VSS VLDT_A1 VLDT_B1
A6 VDD VSS A7 L16 VDD VSS AK22 AA22 VDD VSS N19 AJ3 VLDT_A2 VLDT_B2 H5
AA8 A9 L18 AK24 AB13 N21 AJ2 H2 R174
VDD VSS VDD VSS VDD VSS VTT_DDR VLDT_A3 VLDT_B3 VTT_DDR C102 C101 C99 C100
AA10 VDD VSS A11 M2 VDD VSS AK26 AB15 VDD VSS N23 AJ1 VLDT_A4 VLDT_B4 H1
AA12 AA4 M3 AK28 AB17 P2 X_0.01u/50v/Y5/6 CPU1E
VDD VSS VDD VSS VDD VSS
AA14 VDD VSS AA5 M7 VDD VSS AK30 AB19 VDD VSS P3 D12 VTT VTT AK12
AA16 AA7 M9 AL5 AB21 P8 C12 AJ12 0.01u/50v/Y5/6 L25 E20 X_1KR0402
VDD VSS VDD VSS VDD VSS VCC_DDR VTT VTT X_0.01u/50v/Y5/6 RSVD1 RSVD17
AA18 VDD VSS AA9 M11 VDD VSS B4 AB23 VDD VSS P10 B12 VTT VTT AH12 L26 RSVD2 RSVD18 B19
AB7 AA11 M13 B9 AC12 P12 A12 AG12 4.7u/10v/Y5/8 L31
VDD VSS VDD VSS VDD VSS VTT VTT RSVD3 ALERT_L
AB9 VDD VSS AA13 M15 VDD VSS B11 AC14 VDD VSS P14 VTT AL12 L30 RSVD4 RSVD19 AL4
AB11 AA15 M17 B14 AC16 P16 AB24 AK4 CPU_SA0 R173 0R0402
VDD VSS VDD VSS VDD VSS VDDIO RSVD20
AC4 VDD VSS AA17 M19 VDD VSS B16 AC18 VDD VSS P18 AB26 VDDIO VSS K24 W26 RSVD5 RSVD21 AK3
AC5 VDD VSS AA19 N8 VDD VSS B18 AC20 VDD VSS P20 AB28 VDDIO VSS K26 W25 RSVD6
AC8 VDD VSS AA21 N10 VDD VSS B20 AC22 VDD VSS P22 AB30 VDDIO VSS K28 AE27 RSVD7
AC10 AA23 N12 B22 AD11 R7 AC24 K30 VCCP_NB U24 F2
VDD VSS VDD VSS VDD VSS VDDIO VSS RSVD8 RSVD22 TP12
AD2 VDD VSS AB2 N14 VDD VSS B24 AD23 VDD VSS R9 AD26 VDDIO VSS L7 V24 RSVD9 RSVD23 F3
AD3 VDD VSS AB3 N16 VDD VSS B26 AE12 VDD VSS R11 AD28 VDDIO VSS L9 AE28 RSVD10
AD7 AB8 N18 B28 AF11 R13 AD30 L11 G4 NB_VSEN NB_VSEN 6
VDD VSS VDD VSS VDD VSS VDDIO VSS RSVD24 NB_GND
AD9 VDD VSS AB10 P7 VDD VSS B30 L20 VDD VSS R15 AF30 VDDIO VSS L13 Y31 RSVD11 RSVD25 G3 NB_GND 6
AE10 AB12 P9 C3 L22 R17 M24 L15 Y30 G5 CPU_CORE_TYPE CPU_CORE_TYPE 6
VDD VSS VDD VSS VDD VSS VDDIO VSS RSVD12 RSVD26
AF7 VDD VSS AB14 P11 VDD VSS D14 M21 VDD VSS R19 M26 VDDIO VSS L17 AG31 RSVD13
AF9 AB16 P13 D16 M23 R21 M28 L19 C628 C630 C639 C636 V31 AD25 R122 300R0402VCC_DDR
VDD VSS VDD VSS VDD VSS VDDIO VSS 10p/16v/X7/6 RSVD14 RSVD27
AG4 VDD VSS AB18 P15 VDD VSS D18 N20 VDD VSS R23 M30 VDDIO VSS L21 0.01u/50v/X7/6_B W31 RSVD15 RSVD28 AE24
AG5 VDD VSS AB20 P17 VDD VSS D20 N22 VDD VSS T8 P24 VDDIO VSS L23 AF31 RSVD16 RSVD29 AE25
AG7 VDD VSS AB22 P19 VDD VSS D22 P21 VDD VSS T10 P26 VDDIO VSS M8 RSVD30 AJ18
AH2 AC7 R4 D24 P23 T12 P28 M10 10p/16v/X7/6 AJ20
VDD VSS VDD VSS VDD VSS VDDIO VSS 10p/16v/X7/6 RSVD31
AH3 VDD VSS AC9 R5 VDD VSS D26 R22 VDD VSS T14 P30 VDDIO VSS M12 RSVD32 C18
B3 AC11 R8 D28 T23 T16 T24 M14 VCCP_NB C20
VDD VSS VDD VSS VDD VSS VDDIO VSS RSVD33
B5 VDD VSS AC13 R10 VDD VSS D30 U22 VDD VSS T18 T26 VDDIO VSS M16 RSVD34 G24
C B7 VDD VSS AC15 R12 VDD VSS E11 V23 VDD VSS T20 T28 VDDIO VSS M18 RSVD35 G25 C
C2 VDD VSS AC17 R14 VDD VSS F4 W22 VDD VSS T22 T30 VDDIO VSS M20 RSVD36 H25
C4 VDD VSS AC19 R16 VDD VSS F14 Y23 VDD VSS U4 V25 VDDIO VSS M22 RSVD37 V29
C6 VDD VSS AC21 R18 VDD VSS F16 VSS U5 V26 VDDIO VSS N4 RSVD38 W30
C8 VDD VSS AC23 R20 VDD VSS F18 VSS U7 V28 VDDIO VSS N5
VCCP_NB D3 AD8 T2 F20 1 U9 V30 N7 C611 C618 C623 C629 ZIF-SOCK940-RH-1
VDD VSS VDD VSS 1 VSS VDDIO VSS X_10u/10v/X5/8_B
D5 VDD VSS AD10 T3 VDD VSS F22 2 2 VSS U11 Y24 VDDIO VSS N9
D7 VDD VSS AD12 T7 VDD VSS F24 3 3 VSS U13 Y26 VDDIO VSS N11
D9 AD14 T9 F26 4 U15 Y28 N13 X_22u/6.3v/X5/8 X_10u/10v/X5/8_B
VDD VSS VDD VSS 4 VSS VDDIO VSS 22u/6.3v/X5/8
E4 VDD VSS AD16 T11 VDD VSS F28 5 5 VSS U17 Y29 VDDIO VSS N15
E6 VDD VSS AD20 T13 VDD VSS F30 6 6 VSS U19
E8 AD22 T15 G9 7 U21 ZIF-SOCK940-RH-1 VCCP
VDD VSS VDD VSS 7 VSS
E10 VDD VSS AD24 T17 VDD VSS G11 8 8 VSS U23
F5 VDD VSS AE4 T19 VDD VSS H8 VSS V2
F7 VDD VSS AE5 T21 VDD VSS H10 VSS V3
F9 AE9 U8 H12 V10 C109
VDD VSS VDD VSS VSS 22u/6.3v/X5/8_B
F11 VDD VSS AE11 U10 VDD VSS H14 VSS V12
G6 VDD VSS AF2 U12 VDD VSS H16 VSS V14
G8 VDD VSS AF3 U14 VDD VSS H18 VSS V16
G10 VDD VSS AF8 U16 VDD VSS H22 VSS V18
G12 VDD VSS AF10 U18 VDD VSS H24 VSS V20 For EMI VCC_DDR
H7 VDD VSS AF12 U20 VDD VSS H26 VSS V22
H11 VDD VSS AF14 V9 VDD VSS H28 VSS W9
H23 VDD VSS AF16 V11 VDD VSS H30 VSS W11
J8 VDD VSS AF18 V13 VDD VSS J4 VSS W13
J12 VDD VSS AF20 V15 VDD VSS J5 VSS W15
J14 AF22 V17 J7 W17 C165 C110 C179 C107 C192 C108 C117
VDD VSS VDD VSS VSS 1000p/50v/N/4
J16 VDD VSS AF24 V19 VDD VSS J9 VSS W19
J18 VDD VSS AF26 V21 VDD VSS J11 VSS W21
J20 AF28 W4 J13 W23 1000p/50v/N/4 1000p/50v/N/4 1000p/50v/N/4
VDD VSS VDD VSS VSS 1000p/50v/N/4 0.1u/25v/Y5/4 1000p/50v/N/4
J22 VDD VSS AG10 W5 VDD VSS J15 VSS Y8
J24 VDD VSS AG11 W8 VDD VSS J17 VSS Y10
K7 VDD VSS AH14 W10 VDD VSS J19 VSS Y12
K9 AH16 W12 J21 W7 VCCP
VDD VSS VDD VSS VSS VCC_DDR VCCP VCCP_NB VCCP
K11
K13
VDD
VDD
VSS
VSS
AH18
AH20
W14
W16
VDD
VDD
VSS
VSS
J23
K2
VSS
VSS
Y20
Y22
BOTTOM BOTTOM
K15 VDD VSS AH22 W18 VDD VSS K3
K17 AH24 W20 K8 ZIF-SOCK940-RH-1
B VDD VSS VDD VSS B
K19 VDD VSS AH26 Y2 VDD VSS K10
K21 VDD VSS AH28 Y3 VDD VSS K12
K23 AH30 Y7 K14 C614 C616 C619 C610 C622 C646 C625 C155
VDD VSS VDD VSS 0.22u/16v/X7/6_B 10p/16v/X7/6 X_2.2u/6.3v/X5/6_B
L4 VDD VSS AK2 Y9 VDD VSS K16 X_2.2u/6.3v/X5/6
L5 VDD VSS AK14 Y11 VDD VSS K18
L8 VDD VSS AK16 Y13 VDD VSS K20
L10 AK18 Y15 K22 10p/16v/X7/6 180p/50v/N/4_B
VDD VSS VDD VSS 0.22u/16v/X7/6_B X_2.2u/6.3v/X5/6_B
L12 VDD VSS Y14 Y21 VDD VSS Y18
Y17 VDD VSS Y16
Y19 ZIF-SOCK940-RH-1
VDD VCCP
ZIF-SOCK940-RH-1 BOTTOM

N12-9400050-L06 C633 C612 C617 C624 C632 C634 C641 C613 C620 C626

10u/6.3/X5/0805 C10u6.3X50805-1 10u/10v/X5/8_B X_10u/10v/X5/8_B X_10u/10v/X5/8_B 10u/10v/X5/8_B


X_22u/6.3v/X5/8_B 22u/6.3v/X5/8_B 10u/10v/X5/8_B 10u/10v/X5/8_B

VTT_DDR
VCC_DDR VCC_DDR
BOTTOM
1

C194 C87 C183 C76 C188 C178 C47


+

C205 C635 C206 C199 C202 C186 C631 C640 EC13 C621 C184 C615 C176 C627 C123 C124 C191 C207
0.22u/16v/X7/6 4.7u/10v/Y5/8_B X_4.7u/10v/Y5/8_B X_1000u/6.3v/8x11.5/3.5mm
2

X_0.22u/16v/X7/6 4.7u/10v/Y5/8 220p/50v/N/4 X_220p/50v/N/4


X_0.22u/16v/X7/6 220p/50v/N/4 1000p/50v/X7/6 X_1000p/50v/X7/6
1000p/50v/N/4 10u/10v/X5/8_B X_4.7u/10v/Y5/8 0.22u/16v/X7/6 X_0.01u/50v/X7/6 1000p/50v/N/4
X_4.7u/10v/Y5/8 4.7u/10v/Y5/8 1000p/50v/N/4 10u/10v/X5/8_B 4.7u/10v/Y5/8 1000p/50v/X7/6
X_10u/10v/X5/8_B

VTT_DDR VCC_DDR VCC3


C318
A A
Micro Star Restricted Secret
X_0.01u/16v/X7/4
C219 C91 C81 C48 Title Rev
0.22u/16v/X7/6 K9 M2 PWR & GND 1.1
X_0.22u/16v/X7/6 4.7u/10v/Y5/8 X_1000p/50v/X7/6 Document Number MS-7549
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Tuesday, November 11, 2008
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 10 of 38

5 4 3 2 1
5 4 3 2 1

MEM_MA_DQS_H[7..0] MEM_MB_DQS_H[7..0]
9 MEM_MA_DQS_H[7..0] 9 MEM_MB_DQS_H[7..0]
MEM_MA_DQS_L[7..0] MEM_MB_DQS_L[7..0]
9 MEM_MA_DQS_L[7..0] 9 MEM_MB_DQS_L[7..0]
MEM_MA_DM[7..0] MEM_MB_DM[7..0]
9 MEM_MA_DM[7..0] 9 MEM_MB_DM[7..0] VCC3
MEM_MA_ADD[15..0] MEM_MB_ADD[15..0]
9,12 MEM_MA_ADD[15..0] VCC3 9,12 MEM_MB_ADD[15..0]
MEM_MA_DATA[63..0] MEM_MB_DATA[63..0]
9 MEM_MA_DATA[63..0] 9 MEM_MB_DATA[63..0]

VCC_DDR
C337
VCC_DDR C451 C0.1u16Y0402
X_C0.1u16Y0402
D D

102

191
194
181
175
170

197

172
187
184
178
189

238

161
162
167
168
DIMM1

55
18
19

68

51
56
62
72
75
78

53
59
64

69

67

42
43
48
49
102

191
194
181
175
170

197

172
187
184
178
189

238

161
162
167
168
DIMM2

55
18
19

68

51
56
62
72
75
78

53
59
64

69

67

42
43
48
49

RC0
RC1
NC1

NC2

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC/TEST

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDDSPD
MEM_MB_DATA0 3
MEM_MB_DATA1 DQ0 MEM_MB_DQS_H0
4 7

RC0
RC1
NC1

NC2

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC/TEST

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDDSPD
MEM_MA_DATA0 MEM_MB_DATA2 DQ1 DQS0 MEM_MB_DQS_L0
3 DQ0 9 DQ2 DQS0# 6
MEM_MA_DATA1 4 7 MEM_MA_DQS_H0 MEM_MB_DATA3 10 16 MEM_MB_DQS_H1
MEM_MA_DATA2 DQ1 DQS0 MEM_MA_DQS_L0 MEM_MB_DATA4 DQ3 DQS1 MEM_MB_DQS_L1
9 DQ2 DQS0# 6 122 DQ4 DQS1# 15
MEM_MA_DATA3 10 16 MEM_MA_DQS_H1 MEM_MB_DATA5 123 28 MEM_MB_DQS_H2
MEM_MA_DATA4 DQ3 DQS1 MEM_MA_DQS_L1 MEM_MB_DATA6 DQ5 DQS2 MEM_MB_DQS_L2
122 DQ4 DQS1# 15 128 DQ6 DQS2# 27
MEM_MA_DATA5 123 28 MEM_MA_DQS_H2 MEM_MB_DATA7 129 37 MEM_MB_DQS_H3
MEM_MA_DATA6 DQ5 DQS2 MEM_MA_DQS_L2 MEM_MB_DATA8 DQ7 DQS3 MEM_MB_DQS_L3
128 DQ6 DQS2# 27 12 DQ8 DQS3# 36
MEM_MA_DATA7 129 37 MEM_MA_DQS_H3 MEM_MB_DATA9 13 84 MEM_MB_DQS_H4
MEM_MA_DATA8 DQ7 DQS3 MEM_MA_DQS_L3 MEM_MB_DATA10 DQ9 DQS4 MEM_MB_DQS_L4
12 DQ8 DQS3# 36 21 DQ10 DQS4# 83
MEM_MA_DATA9 13 84 MEM_MA_DQS_H4 MEM_MB_DATA11 22 93 MEM_MB_DQS_H5
MEM_MA_DATA10 DQ9 DQS4 MEM_MA_DQS_L4 MEM_MB_DATA12 DQ11 DQS5 MEM_MB_DQS_L5
21 DQ10 DQS4# 83 131 DQ12 DQS5# 92
MEM_MA_DATA11 22 93 MEM_MA_DQS_H5 MEM_MB_DATA13 132 105 MEM_MB_DQS_H6
MEM_MA_DATA12 DQ11 DQS5 MEM_MA_DQS_L5 VCC3 MEM_MB_DATA14 DQ13 DQS6 MEM_MB_DQS_L6
131 DQ12 DQS5# 92 140 DQ14 DQS6# 104
MEM_MA_DATA13 132 105 MEM_MA_DQS_H6 MEM_MB_DATA15 141 114 MEM_MB_DQS_H7
MEM_MA_DATA14 DQ13 DQS6 MEM_MA_DQS_L6 MEM_MB_DATA16 DQ15 DQS7 MEM_MB_DQS_L7
140 104 24 113

Y
MEM_MA_DATA15 DQ14 DQS6# MEM_MA_DQS_H7 MEM_MB_DATA17 DQ16 DQS7#
141 DQ15 DQS7 114 25 DQ17 DQS8 46
MEM_MA_DATA16 24 113 MEM_MA_DQS_L7 D18 MEM_MB_DATA18 30 45
MEM_MA_DATA17 DQ16 DQS7# SCL0 X_1PS226_SOT23 MEM_MB_DATA19 DQ18 DQS8#
25 DQ17 DQS8 46 Z 31 DQ19
MEM_MA_DATA18 30 45 MEM_MB_DATA20 143 188 MEM_MB_ADD0
MEM_MA_DATA19 DQ18 DQS8# MEM_MB_DATA21 DQ20 A0 MEM_MB_ADD1
31 DQ19 144 DQ21 A1 183
MEM_MA_DATA20 143 188 MEM_MA_ADD0 MEM_MB_DATA22 149 63 MEM_MB_ADD2

X
MEM_MA_DATA21 DQ20 A0 MEM_MA_ADD1 MEM_MB_DATA23 DQ22 A2 MEM_MB_ADD3
144 DQ21 A1 183 150 DQ23 A3 182
MEM_MA_DATA22 149 63 MEM_MA_ADD2 MEM_MB_DATA24 33 61 MEM_MB_ADD4
MEM_MA_DATA23 DQ22 A2 MEM_MA_ADD3 MEM_MB_DATA25 DQ24 A4 MEM_MB_ADD5
150 DQ23 A3 182 34 DQ25 A5 60
MEM_MA_DATA24 33 61 MEM_MA_ADD4 MEM_MB_DATA26 39 180 MEM_MB_ADD6
MEM_MA_DATA25 DQ24 A4 MEM_MA_ADD5 VCC3 MEM_MB_DATA27 DQ26 A6 MEM_MB_ADD7
34 DQ25 A5 60 40 DQ27 A7 58
MEM_MA_DATA26 39 180 MEM_MA_ADD6 MEM_MB_DATA28 152 179 MEM_MB_ADD8
MEM_MA_DATA27 DQ26 A6 MEM_MA_ADD7 MEM_MB_DATA29 DQ28 A8 MEM_MB_ADD9
40 DQ27 A7 58 153 DQ29 A9 177
C MEM_MA_DATA28 152 179 MEM_MA_ADD8 MEM_MB_DATA30 158 70 MEM_MB_ADD10 C

Y
MEM_MA_DATA29 DQ28 A8 MEM_MA_ADD9 MEM_MB_DATA31 DQ30 A10_AP MEM_MB_ADD11
153 DQ29 A9 177 159 DQ31 A11 57
MEM_MA_DATA30 158 70 MEM_MA_ADD10 D17 MEM_MB_DATA32 80 176 MEM_MB_ADD12
MEM_MA_DATA31 DQ30 A10_AP MEM_MA_ADD11 SDA0 X_1PS226_SOT23 MEM_MB_DATA33 DQ32 A12 MEM_MB_ADD13
159 DQ31 A11 57 Z 81 DQ33 A13 196
MEM_MA_DATA32 80 176 MEM_MA_ADD12 MEM_MB_DATA34 86 174 MEM_MB_ADD14
MEM_MA_DATA33 DQ32 A12 MEM_MA_ADD13 MEM_MB_DATA35 DQ34 A14 MEM_MB_ADD15
81 DQ33 A13 196 87 DQ35 A15 173
MEM_MA_DATA34 86 174 MEM_MA_ADD14 MEM_MB_DATA36 199

X
MEM_MA_DATA35 DQ34 A14 MEM_MA_ADD15 MEM_MB_DATA37 DQ36 MEM_MB_BANK2
87 DQ35 A15 173 200 DQ37 A16/BA2 54 MEM_MB_BANK2 9,12
MEM_MA_DATA36 199 MEM_MB_DATA38 205 190 MEM_MB_BANK1 MEM_MB_BANK1 9,12
MEM_MA_DATA37 DQ36 MEM_MA_BANK2 MEM_MB_DATA39 DQ38 BA1 MEM_MB_BANK0
200 DQ37 A16/BA2 54 MEM_MA_BANK2 9,12 206 DQ39 BA0 71 MEM_MB_BANK0 9,12
MEM_MA_DATA38 205 190 MEM_MA_BANK1 MEM_MA_BANK1 9,12 MEM_MB_DATA40 89
MEM_MA_DATA39 DQ38 BA1 MEM_MA_BANK0 MEM_MB_DATA41 DQ40 MEM_MB_WE_L
206 DQ39 BA0 71 MEM_MA_BANK0 9,12 90 DQ41 WE# 73 MEM_MB_WE_L 9,12
MEM_MA_DATA40 89 MEM_MB_DATA42 95 74 MEM_MB_CAS_L MEM_MB_CAS_L 9,12
MEM_MA_DATA41 DQ40 MEM_MA_WE_L VCC_DDR MEM_MB_DATA43 DQ42 CAS# MEM_MB_RAS_L
90 DQ41 WE# 73 MEM_MA_WE_L 9,12 96 DQ43 RAS# 192 MEM_MB_RAS_L 9,12
MEM_MA_DATA42 95 74 MEM_MA_CAS_L MEM_MA_CAS_L 9,12 MEM_MB_DATA44 208
MEM_MA_DATA43 DQ42 CAS# MEM_MA_RAS_L MEM_MB_DATA45 DQ44 MEM_MB_DM0
96 DQ43 RAS# 192 MEM_MA_RAS_L 9,12 209 DQ45 DM0/DQS9 125
MEM_MA_DATA44 208 VDDR_VREF MEM_MB_DATA46 214 126
MEM_MA_DATA45 DQ44 MEM_MA_DM0 MEM_MB_DATA47 DQ46 NC/DQS9# MEM_MB_DM1
209 DQ45 DM0/DQS9 125 215 DQ47 DM1/DQS10 134
MEM_MA_DATA46 214 126 MEM_MB_DATA48 98 135
MEM_MA_DATA47 DQ46 NC/DQS9# MEM_MA_DM1 R84 MEM_MB_DATA49 DQ48 NC/DQS10# MEM_MB_DM2
215 DQ47 DM1/DQS10 134 99 DQ49 DM2/DQS11 146
MEM_MA_DATA48 98 135 15R1% C53 MEM_MB_DATA50 107 147
MEM_MA_DATA49 DQ48 NC/DQS10# MEM_MA_DM2 MEM_MB_DATA51 DQ50 NC/DQS11# MEM_MB_DM3
99 DQ49 DM2/DQS11 146 108 DQ51 DM3/DQS12 155
MEM_MA_DATA50 107 147 VDDR_VREF MEM_MB_DATA52 217 156
MEM_MA_DATA51 DQ50 NC/DQS11# MEM_MA_DM3 X_0.1u/25v/Y5/4 MEM_MB_DATA53 DQ52 NC/DQS12# MEM_MB_DM4
108 DQ51 DM3/DQS12 155 218 DQ53 DM4/DQS13 202
MEM_MA_DATA52 217 156 MEM_MB_DATA54 226 203
MEM_MA_DATA53 DQ52 NC/DQS12# MEM_MA_DM4 C44 MEM_MB_DATA55 DQ54 NC/DQS13# MEM_MB_DM5
218 DQ53 DM4/DQS13 202 227 DQ55 DM5/DQS14 211
MEM_MA_DATA54 226 203 R86 0.1u/25v/Y5/4 MEM_MB_DATA56 110 212
MEM_MA_DATA55 DQ54 NC/DQS13# MEM_MA_DM5 15R1% MEM_MB_DATA57 DQ56 NC/DQS14# MEM_MB_DM6
227 DQ55 DM5/DQS14 211 111 DQ57 DM6/DQS15 223
MEM_MA_DATA56 110 212 MEM_MB_DATA58 116 224
MEM_MA_DATA57 DQ56 NC/DQS14# MEM_MA_DM6 MEM_MB_DATA59 DQ58 NC/DQS15# MEM_MB_DM7
111 DQ57 DM6/DQS15 223 117 DQ59 DM7/DQS16 232
MEM_MA_DATA58 116 224 MEM_MB_DATA60 229 233
MEM_MA_DATA59 DQ58 NC/DQS15# MEM_MA_DM7 MEM_MB_DATA61 DQ60 NC/DQS16#
117 DQ59 DM7/DQS16 232 230 DQ61 DM8/DQS17 164
MEM_MA_DATA60 229 233 MEM_MB_DATA62 235 165
MEM_MA_DATA61 DQ60 NC/DQS16# MEM_MB_DATA63 DQ62 NC/DQS17#
230 DQ61 DM8/DQS17 164 236 DQ63
MEM_MA_DATA62 235 165 195 MEM_MB0_ODT0
DQ62 NC/DQS17# ODT0 MEM_MB0_ODT0 9,12
MEM_MA_DATA63 236 2 77
DQ63 MEM_MA0_ODT0 VSS ODT1
ODT0 195 MEM_MA0_ODT0 9,12 5 VSS
B 2 77 8 52 MEM_MB_CKE0 MEM_MB_CKE0 9,12 B
VSS ODT1 VSS CKE0
5 VSS 11 VSS CKE1 171
8 52 MEM_MA_CKE0 MEM_MA_CKE0 9,12 14
VSS CKE0 VSS MEM_MB0_CS_L0
11 VSS CKE1 171 17 VSS CS0# 193 MEM_MB0_CS_L0 9,12
14 20 76 MEM_MB0_CS_L1 MEM_MB0_CS_L1 9,12
VSS MEM_MA0_CS_L0 VSS CS1#
17 VSS CS0# 193 MEM_MA0_CS_L0 9,12 23 VSS
20 76 MEM_MA0_CS_L1 MEM_MA0_CS_L1 9,12 26 185 MEM_MB0_CLK_H0 MEM_MB0_CLK_H0 9,12
VSS CS1# VSS CK0(DU) MEM_MB0_CLK_L0
23 VSS 29 VSS CK0#(DU) 186 MEM_MB0_CLK_L0 9,12
26 185 MEM_MA0_CLK_H0 MEM_MA0_CLK_H0 9,12 32 137 MEM_MB0_CLK_H1 MEM_MB0_CLK_H1 9,12
VSS CK0(DU) MEM_MA0_CLK_L0 VSS CK1(CK0) MEM_MB0_CLK_L1
29 VSS CK0#(DU) 186 MEM_MA0_CLK_L0 9,12 35 VSS CK1#(CK0#) 138 MEM_MB0_CLK_L1 9,12
32 137 MEM_MA0_CLK_H1 MEM_MA0_CLK_H1 9,12 38 220 MEM_MB0_CLK_H2 MEM_MB0_CLK_H2 9,12
VSS CK1(CK0) MEM_MA0_CLK_L1 VSS CK2(DU) MEM_MB0_CLK_L2
35 VSS CK1#(CK0#) 138 MEM_MA0_CLK_L1 9,12 41 VSS CK2#(DU) 221 MEM_MB0_CLK_L2 9,12
38 220 MEM_MA0_CLK_H2 MEM_MA0_CLK_H2 9,12 44
VSS CK2(DU) MEM_MA0_CLK_L2 VSS SCL0
41 VSS CK2#(DU) 221 MEM_MA0_CLK_L2 9,12 47 VSS SCL 120 SCL0 6,7,20,33
44 50 119 SDA0
VSS VSS SDA SDA0 6,7,20,33
47 120 SCL0 65
VSS SCL SCL0 6,7,20,33 VSS VDDR_VREF
50 119 SDA0 66 1
VSS SDA SDA0 VDDR_VREF
6,7,20,33 VSS VREF
65 VSS 79 VSS
66 1 VDDR_VREF 82 X1 VDDR_VREF
VSS VREF VSS X1
79 VSS 85 VSS SA0 239 VCC3
82 VSS X1 X1 88 VSS SA1 240
85 239 C54 91 101 C45
VSS SA0 VSS SA2
88 240 C0.1u16Y0402 94 X2

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS SA1 VSS X2 C0.1u16Y0402
91 VSS SA2 101 97 VSS X3 X3
94 X2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS X2 DDRII-240_ORANGE-RH
97 X3

100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237
VSS X3
DDRII-240_ORANG-RH
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237

Micro Star Restricted Secret

ADDRESS A0 ADDRESS A2 Title Rev


A FIRST LOGICAL DDR DIMM 1.1
A

Document Number MS-7549


MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Friday, November 07, 2008
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 11 of 38

5 4 3 2 1
5 4 3 2 1

VCC_DDR VCC_DDR
VTT_DDR
MEM_MA0_CLK_H2 MEM_MA_ADD15 C638 X_C22p50N0402 MEM_MB_ADD15 C121 X_C22p50N0402
9,11 MEM_MA0_CLK_H2
MEM_MA_ADD14 C637 X_C22p50N0402 MEM_MB_ADD14 C122 X_C22p50N0402
MEM_MB_ADD11 RN10 1 2 8P4R-47R0402 MEM_MA_ADD13 C662 X_C22p50N0402 MEM_MB_ADD13 C174 X_C22p50N0402
9,11 MEM_MB_ADD11
MEM_MA_ADD12 3 4 C193 MEM_MA_ADD12 C642 X_C22p50N0402 MEM_MB_ADD12 C126 X_C22p50N0402
9,11 MEM_MA_ADD12
MEM_MA_ADD11 5 6 C1.5p50N0402 MEM_MA_ADD11 C644 X_C22p50N0402 MEM_MB_ADD11 C131 X_C22p50N0402
9,11 MEM_MA_ADD11
MEM_MA_ADD9 7 8 MEM_MA0_CLK_L2 MEM_MA_ADD10 C656 X_C22p50N0402 MEM_MB_ADD10 C159 X_C22p50N0402
9,11 MEM_MA_ADD9 9,11 MEM_MA0_CLK_L2
MEM_MA_ADD14 RN9 1 2 8P4R-47R0402 MEM_MA_ADD9 C645 X_C22p50N0402 MEM_MB_ADD9 C130 X_C22p50N0402
9,11 MEM_MA_ADD14
MEM_MA_ADD15 3 4 MEM_MA_ADD8 C647 X_C22p50N0402 MEM_MB_ADD8 C137 X_C22p50N0402
9,11 MEM_MA_ADD15
MEM_MB_ADD12 5 6 MEM_MA0_CLK_H1 MEM_MA_ADD7 C648 X_C22p50N0402 MEM_MB_ADD7 C136 X_C22p50N0402
9,11 MEM_MB_ADD12 9,11 MEM_MA0_CLK_H1
MEM_MB_ADD9 7 8 MEM_MA_ADD6 C650 X_C22p50N0402 MEM_MB_ADD6 C141 X_C22p50N0402
D 9,11 MEM_MB_ADD9 D
MEM_MA_ADD7 RN11 1 2 8P4R-47R0402 MEM_MA_ADD5 C649 X_C22p50N0402 MEM_MB_ADD5 C142 X_C22p50N0402
9,11 MEM_MA_ADD7
MEM_MB_ADD7 3 4 C86 MEM_MA_ADD4 C652 X_C22p50N0402 MEM_MB_ADD4 C148 X_C22p50N0402
9,11 MEM_MB_ADD7
MEM_MB_ADD8 5 6 C1.5p50N0402 MEM_MA_ADD3 C651 X_C22p50N0402 MEM_MB_ADD3 C149 X_C22p50N0402
9,11 MEM_MB_ADD8
MEM_MA_ADD8 7 8 MEM_MA0_CLK_L1 MEM_MA_ADD2 C653 X_C22p50N0402 MEM_MB_ADD2 C151 X_C22p50N0402
9,11 MEM_MA_ADD8 9,11 MEM_MA0_CLK_L1
MEM_MB_ADD0 RN15 1 2 8P4R-47R0402 MEM_MA_ADD1 C654 X_C22p50N0402 MEM_MB_ADD1 C150 X_C22p50N0402
9,11 MEM_MB_ADD0
9,11 MEM_MB_BANK1 MEM_MB_BANK1 3 4 MEM_MA_ADD0 C655 X_C22p50N0402 MEM_MB_ADD0 C156 X_C22p50N0402
MEM_MB_ADD10 5 6 MEM_MA0_CLK_H0
9,11 MEM_MB_ADD10 9,11 MEM_MA0_CLK_H0
9,11 MEM_MB_BANK0 MEM_MB_BANK0 7 8 MEM_MA_CAS_L C660 X_C22p50N0402 MEM_MB_CAS_L C169 X_C22p50N0402
MEM_MA_WE_L C661 X_C22p50N0402 MEM_MB_WE_L C168 X_C22p50N0402
MEM_MB_ADD3 RN14 1 2 8P4R-47R0402 C140 MEM_MA_RAS_L C658 X_C22p50N0402 MEM_MB_RAS_L C163 X_C22p50N0402
9,11 MEM_MB_ADD3
MEM_MA_ADD2 3 4 C1.5p50N0402
9,11 MEM_MA_ADD2
MEM_MB_ADD1 5 6 MEM_MA0_CLK_L0 MEM_MA_BANK2 C643 X_C22p50N0402 MEM_MB_BANK2 C125 X_C22p50N0402
9,11 MEM_MB_ADD1 9,11 MEM_MA0_CLK_L0
MEM_MB_ADD2 7 8 MEM_MA_BANK1 C657 X_C22p50N0402 MEM_MB_BANK1 C158 X_C22p50N0402
9,11 MEM_MB_ADD2
MEM_MA_BANK0 C659 X_C22p50N0402 MEM_MB_BANK0 C162 X_C22p50N0402
MEM_MA0_CS_L0 RN19 1 2 8P4R-47R0402 MEM_MB0_CLK_H2
9,11 MEM_MA0_CS_L0 9,11 MEM_MB0_CLK_H2
MEM_MA_CAS_L 3 4
9,11 MEM_MA_CAS_L
9,11 MEM_MB_WE_L MEM_MB_WE_L 5 6
MEM_MA0_ODT0 7 8 C190
9,11 MEM_MA0_ODT0
C1.5p50N0402 Decoupling Between Processor and DIMMs
MEM_MB0_CLK_L2
9,11 MEM_MB0_CLK_L2
RN21 1 2 8P4R-47R0402
MEM_MB0_ODT0 3 4
9,11 MEM_MB0_ODT0
MEM_MB_ADD13 5 6 MEM_MB0_CLK_H1
9,11 MEM_MB_ADD13 9,11 MEM_MB0_CLK_H1
MEM_MB0_CS_L1 7 8
9,11 MEM_MB0_CS_L1
C80
C1.5p50N0402
MEM_MB0_CLK_L1
C 9,11 MEM_MB0_CLK_L1 C

MEM_MB0_CLK_H0
9,11 MEM_MB0_CLK_H0

C133
C1.5p50N0402 Layout: Spread out on VTT pour
MEM_MB0_CLK_L0 EMI
9,11 MEM_MB0_CLK_L0 VTT_DDR

C0.1u25Y0402-RH C0.1u25Y0402-RH C22P50Y0402-RH X_C0.1u25Y0402-RH X_C0.1u25Y0402-RH

C135 C212 C201 C132 C228 C227 C203 C196 C215 C233 C225 C224 C164 C211 C229

X_C0.1u25Y0402-RH 220p50Y0402-RH 220p50Y0402-RH C22P50Y0402-RH X_C0.1u25Y0402-RH C0.1u25Y0402-RH


C22P50Y0402-RH C0.1u25Y0402-RH X_C0.1u25Y0402-RH C0.1u25Y0402-RH

VTT_DDR
VTT_DDR
9 MEM_MB_CKE1 MEM_MB_CKE1 RN7 1 2 8P4R-47R0402
MEM_MB_CKE0 3 4
9,11 MEM_MB_CKE0
MEM_MB_ADD15 5 6
9,11 MEM_MB_ADD15
MEM_MB_ADD14 7 8
B 9,11 MEM_MB_ADD14 B
MEM_MA_ADD5 RN12 1 2 8P4R-47R0402 C175 C171 C182 C217 C143 C208 C197 C221
9,11 MEM_MA_ADD5
MEM_MB_ADD6 3 4 X_C0.1u25Y0402-RH
9,11 MEM_MB_ADD6
MEM_MA_ADD6 5 6
9,11 MEM_MA_ADD6
MEM_MB_ADD5 7 8 X_C0.1u25Y0402-RH C0.1u25Y0402-RH C0.1u25Y0402-RH X_C0.1u25Y0402-RH
9,11 MEM_MB_ADD5
MEM_MA_ADD4 RN13 1 2 8P4R-47R0402 C0.1u25Y0402-RH C0.1u25Y0402-RH X_C0.1u25Y0402-RH
9,11 MEM_MA_ADD4
MEM_MA_ADD3 3 4
9,11 MEM_MA_ADD3
MEM_MA_ADD1 5 6
9,11 MEM_MA_ADD1
MEM_MB_ADD4 7 8
9,11 MEM_MB_ADD4
MEM_MA_ADD0 RN16 1 2 8P4R-47R0402
9,11 MEM_MA_ADD0
MEM_MA_ADD10 3 4
9,11 MEM_MA_ADD10 VTT_DDR VCC_DDR
MEM_MA_BANK0 5 6
9,11 MEM_MA_BANK0
MEM_MA_BANK1 7 8
9,11 MEM_MA_BANK1

9,11 MEM_MB_RAS_L MEM_MB_RAS_L RN17 1 2 8P4R-47R0402


MEM_MB0_CS_L0 3 4 C216 C139 C127 C167 C200 C209 C177 C223
9,11 MEM_MB0_CS_L0
MEM_MA_RAS_L
9,11 MEM_MA_RAS_L
MEM_MA_WE_L
5
7
6
8
FOR EMI 07/17
9,11 MEM_MA_WE_L
X_C0.1u25Y0402-RH X_C0.1u25Y0402-RH X_C0.1u25Y0402-RH X_C0.1u25Y0402-RH
9,11 MEM_MB_BANK2 MEM_MB_BANK2 RN8 1 2 8P4R-47R0402 C0.1u25Y0402-RH X_C0.1u25Y0402-RH C0.1u25Y0402-RH X_C0.1u25Y0402-RH
MEM_MA_CKE1 3 4
9 MEM_MA_CKE1 VCC_DDR
MEM_MA_CKE0 5 6
9,11 MEM_MA_CKE0
MEM_MA_BANK2 7 8
9,11 MEM_MA_BANK2

MEM_MB_CAS_L RN20 1 2 8P4R-47R0402


9,11 MEM_MB_CAS_L MEM_MA_ADD13 C680 C681 C682 C683 C684 C685 C686 C687 C688 C689 C690 C691 C693 C692 C694 C695
9,11 MEM_MA_ADD13 3 4
5 6
MEM_MA0_CS_L1 7 8
A 9,11 MEM_MA0_CS_L1 A
X_C0.1u25Y0402-RH
220p50Y0402-RH
220p50Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
220p50Y0402-RH
X_C0.1u25Y0402-RH
220p50Y0402-RH
X_C0.1u25Y0402-RH
220p50Y0402-RH
220p50Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
220p50Y0402-RH

Micro Star Restricted Secret


Title Rev
DDR Terminatior 1.1
Document Number MS-7549
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Tuesday, November 11, 2008
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 12 of 38
5 4 3 2 1
5 4 3 2 1

D D

HT_CADOUT_H[15..0] HT_CADIN_H[15..0]
8 HT_CADOUT_H[15..0] 8 HT_CADIN_H[15..0]
HT_CADOUT_L[15..0] HT_CADIN_L[15..0]
8 HT_CADOUT_L[15..0] 8 HT_CADIN_L[15..0]

20 / 5 / 5 / 5 / 20 20 / 5 / 5 / 5 / 20
U15A
HT_CADOUT_H0 Y25 D24 HT_CADIN_H0
HT_CADOUT_L0 HT_RXCAD0P HT_TXCAD0P HT_CADIN_L0
HT_CADOUT_H1
Y24 HT_RXCAD0N PART 1 OF 6 HT_TXCAD0N D25
HT_CADIN_H1
HS_NB V22 HT_RXCAD1P HT_TXCAD1P E24
HT_CADOUT_L1 V23 E25 HT_CADIN_L1 RS780V
HT_CADOUT_H2 HT_RXCAD1N HT_TXCAD1N HT_CADIN_H2
V25 HT_RXCAD2P HT_TXCAD2P F24

MSI
HT_CADOUT_L2 V24 F25 HT_CADIN_L2 OPT
HT_CADOUT_H3 HT_RXCAD2N HT_TXCAD2N HT_CADIN_H3
U24 HT_RXCAD3P HT_TXCAD3P F23
HT_CADOUT_L3 U25 F22 HT_CADIN_L3
HT_CADOUT_H4 HT_RXCAD3N HT_TXCAD3N HT_CADIN_H4 X_RS780V
T25 HT_RXCAD4P HT_TXCAD4P H23

DDR
HT_CADOUT_L4 T24 H22 HT_CADIN_L4
2 1 HT_CADOUT_H5 HT_RXCAD4N HT_TXCAD4N HT_CADIN_H5

HYPER TRANSPORT CPU


P22 HT_RXCAD5P HT_TXCAD5P J25
HT_CADOUT_L5 P23 J24 HT_CADIN_L5
HT_CADOUT_H6 HT_RXCAD5N HT_TXCAD5N HT_CADIN_H6 RS760G
P25 HT_RXCAD6P HT_TXCAD6P K24
HT_CADOUT_L6 P24 K25 HT_CADIN_L6
HT_CADOUT_H7 HT_RXCAD6N HT_TXCAD6N HT_CADIN_H7
N24 HT_RXCAD7P HT_TXCAD7P K23 OPT
C HT_CADOUT_L7 N25 K22 HT_CADIN_L7 C
NB_HEATSINK HT_RXCAD7N HT_TXCAD7N
HT_CADOUT_H8 AC24 F21 HT_CADIN_H8 X_RS760G
HT_CADOUT_L8 HT_RXCAD8P HT_TXCAD8P HT_CADIN_L8
AC25 HT_RXCAD8N HT_TXCAD8N G21
HT_CADOUT_H9 AB25 G20 HT_CADIN_H9
HT_CADOUT_L9 HT_RXCAD9P HT_TXCAD9P HT_CADIN_L9
AB24 HT_RXCAD9N HT_TXCAD9N H21
HT_CADOUT_H10 AA24 J20 HT_CADIN_H10
HT_CADOUT_L10 HT_RXCAD10P HT_TXCAD10P HT_CADIN_L10
AA25 HT_RXCAD10N HT_TXCAD10N J21
HT_CADOUT_H11 Y22 J18 HT_CADIN_H11
HT_CADOUT_L11 HT_RXCAD11P HT_TXCAD11P HT_CADIN_L11
Y23 HT_RXCAD11N HT_TXCAD11N K17
HT_CADOUT_H12 W21 L19 HT_CADIN_H12
HT_CADOUT_L12 HT_RXCAD12P HT_TXCAD12P HT_CADIN_L12
W20 HT_RXCAD12N HT_TXCAD12N J19
HT_CADOUT_H13 V21 M19 HT_CADIN_H13
HT_CADOUT_L13 HT_RXCAD13P HT_TXCAD13P HT_CADIN_L13
V20 HT_RXCAD13N HT_TXCAD13N L18
HT_CADOUT_H14 U20 M21 HT_CADIN_H14
HT_CADOUT_L14 HT_RXCAD14P HT_TXCAD14P HT_CADIN_L14
U21 HT_RXCAD14N HT_TXCAD14N P21
HT_CADOUT_H15 U19 P18 HT_CADIN_H15
HT_CADOUT_L15 HT_RXCAD15P HT_TXCAD15P HT_CADIN_L15
U18 HT_RXCAD15N HT_TXCAD15N M18

I/F
8 HT_CLKOUT_H0 T22 HT_RXCLK0P HT_TXCLK0P H24 HT_CLKIN_H0 8
8 HT_CLKOUT_L0 T23 HT_RXCLK0N HT_TXCLK0N H25 HT_CLKIN_L0 8
8 HT_CLKOUT_H1 AB23 HT_RXCLK1P HT_TXCLK1P L21 HT_CLKIN_H1 8
8 HT_CLKOUT_L1 AA22 HT_RXCLK1N HT_TXCLK1N L20 HT_CLKIN_L1 8

8 HT_CTLOUT_H0 M22 HT_RXCTL0P HT_TXCTL0P M24 HT_CTLIN_H0 8


8 HT_CTLOUT_L0 M23 HT_RXCTL0N HT_TXCTL0N M25 HT_CTLIN_L0 8
8 HT_CTLOUT_H1 R21 HT_RXCTL1P HT_TXCTL1P P19 HT_CTLIN_H1 8
8 HT_CTLOUT_L1 R20 HT_RXCTL1N HT_TXCTL1N R18 HT_CTLIN_L1 8
B B
301R1%0402 R197 HT_RXCALP C23 B24 HT_TXCALP 301R1%0402 R198
HT_RXCALN HT_RXCALP HT_TXCALP HT_TXCALN
A24 HT_RXCALN HT_TXCALN B25

5 / 10 AMD-215-0674007-00-A01-RH 5 / 10

Check U10 New Version : Port Number


RX780/RS740/RS780 difference table (HT LINK)
SIGNALS RS740 RX780 RS780

VCCP HT_RXCALP 49.9R (GND)


1.21K 301R
HT_RXCALN 49.9R (VDDHT)

HT_TXCALP
100R 1.21K 301R
C96 C93 HT_TXCALN
X_C0.01u16X0402 X_C0.01u16X0402

A
Adding some 0.01僴uF stitching A
capacitors for crossing a split when
these signals change different reference
layer.
MICRO-STAR INt'L CO., LTD.
Title
RS780-HT L
Size Document Number Rev
1.1
MS-7549
Date: Tuesday, November 11, 2008 Sheet 13 of 38
5 4 3 2 1
5 4 3 2 1

20 / 5.5 / 4.5 / 5.5 / 20 20 / 5.5 / 4.5 / 5.5 / 20


U15B
23 GFX_RX0P D4 GFX_RX0P GFX_TX0P A5 GFX_TX0P 23
23 GFX_RX0N C4 GFX_RX0N PART 2 OF 6 GFX_TX0N B5 GFX_TX0N 23
23 GFX_RX1P A3 GFX_RX1P GFX_TX1P A4 GFX_TX1P 23
23 GFX_RX1N B3 GFX_RX1N GFX_TX1N B4 GFX_TX1N 23
23 GFX_RX2P C2 GFX_RX2P GFX_TX2P C3 GFX_TX2P 23
D 23 GFX_RX2N C1 GFX_RX2N GFX_TX2N B2 GFX_TX2N 23 D
23 GFX_RX3P E5 GFX_RX3P GFX_TX3P D1 GFX_TX3P 23
23 GFX_RX3N F5 GFX_RX3N GFX_TX3N D2 GFX_TX3N 23
23 GFX_RX4P G5 GFX_RX4P GFX_TX4P E2 GFX_TX4P 23
23 GFX_RX4N G6 GFX_RX4N GFX_TX4N E1 GFX_TX4N 23
23 GFX_RX5P H5 GFX_RX5P GFX_TX5P F4 GFX_TX5P 23
23 GFX_RX5N H6 GFX_RX5N GFX_TX5N F3 GFX_TX5N 23
23 GFX_RX6P J6 GFX_RX6P GFX_TX6P F1 GFX_TX6P 23
23 GFX_RX6N J5 GFX_RX6N GFX_TX6N F2 GFX_TX6N 23
23 GFX_RX7P J7 GFX_RX7P GFX_TX7P H4 GFX_TX7P 23
J8 H3

PCIE I/F GFX


23 GFX_RX7N GFX_RX7N GFX_TX7N GFX_TX7N 23
23 GFX_RX8P L5 GFX_RX8P GFX_TX8P H1 GFX_TX8P 23
23 GFX_RX8N L6 GFX_RX8N GFX_TX8N H2 GFX_TX8N 23
23 GFX_RX9P M8 GFX_RX9P GFX_TX9P J2 GFX_TX9P 23
23 GFX_RX9N L8 GFX_RX9N GFX_TX9N J1 GFX_TX9N 23
23 GFX_RX10P P7 GFX_RX10P GFX_TX10P K4 GFX_TX10P 23
23 GFX_RX10N M7 GFX_RX10N GFX_TX10N K3 GFX_TX10N 23
23 GFX_RX11P P5 GFX_RX11P GFX_TX11P K1 GFX_TX11P 23
23 GFX_RX11N M5 GFX_RX11N GFX_TX11N K2 GFX_TX11N 23
23 GFX_RX12P R8 GFX_RX12P GFX_TX12P M4 GFX_TX12P 23
23 GFX_RX12N P8 GFX_RX12N GFX_TX12N M3 GFX_TX12N 23
23 GFX_RX13P R6 GFX_RX13P GFX_TX13P M1 GFX_TX13P 23
23 GFX_RX13N R5 GFX_RX13N GFX_TX13N M2 GFX_TX13N 23
23 GFX_RX14P P4 GFX_RX14P GFX_TX14P N2 GFX_TX14P 23
23 GFX_RX14N P3 GFX_RX14N GFX_TX14N N1 GFX_TX14N 23
23 GFX_RX15P T4 GFX_RX15P GFX_TX15P P1 GFX_TX15P 23
23 GFX_RX15N T3 GFX_RX15N GFX_TX15N P2 GFX_TX15N 23
C C
AE3 AC1 PE0_TXP
23 PE0_RX GPP_RX0P GPP_TX0P PE0_TX 23
AD4 AC2 PE0_TXN
23 PE0_RX# GPP_RX0N GPP_TX0N PE0_TX# 23
AE2 AB4 TX_LANP1 C379 C0.1u10x0402
27 RX_LANP1 GPP_RX1P GPP_TX1P TXLANP1 27
AD3 AB3 TX_LANN1 C378 C0.1u10x0402
27 RX_LANN1 GPP_RX1N GPP_TX1N TXLANN1 27
AD1 GPP_RX2P GPP_TX2P AA2
AD2 GPP_RX2N PCIE I/F GPP GPP_TX2N AA1
V5 GPP_RX3P GPP_TX3P Y1
W6 GPP_RX3N GPP_TX3N Y2
U5 GPP_RX4P GPP_TX4P Y4
U6 GPP_RX4N GPP_TX4N Y3
U8 GPP_RX5P GPP_TX5P V1
U7 GPP_RX5N GPP_TX5N V2

A_RX0P A_TX0P_C C328


X7R C0.1u10X0402
18 A_RX0P AA8 SB_RX0P SB_TX0P AD7 A_TX0P 18
18 A_RX0N A_RX0N Y8 AE7 A_TX0N_C C326 C0.1u10X0402
SB_RX0N SB_TX0N A_TX0N 18
18 A_RX1P A_RX1P AA7 AE6 A_TX1P_C C370 C0.1u10X0402
SB_RX1P SB_TX1P A_TX1P 18
18 A_RX1N A_RX1N Y7 AD6 A_TX1N_C C372 C0.1u10X0402
SB_RX1N SB_TX1N A_TX1N 18
18 A_RX2P A_RX2P AA5 PCIE I/F SB AB6 A_TX2P_C C336 C0.1u10X0402
SB_RX2P SB_TX2P A_TX2P 18
18 A_RX2N A_RX2N AA6 AC6 A_TX2N_C C345 C0.1u10X0402
SB_RX2N SB_TX2N A_TX2N 18
18 A_RX3P A_RX3P W5 AD5 A_TX3P_C C375 C0.1u10X0402
SB_RX3P SB_TX3P A_TX3P 18
18 A_RX3N A_RX3N Y5 AE5 A_TX3N_C C376 C0.1u10X0402
SB_RX3N SB_TX3N A_TX3N 18
AC8 R258 1.27KR1%0402 VCC1_1
PCE_CALRP R252 2KR1%0402
PCE_CALRN AB8

B B
AMD-215-0674007-00-A01-RH
1.2V (RS740) 1.1V(RS780)
RX780/RS740/RS780 GPP difference table
RS740 RX780/RS780 RX780/RS740/RS780 GPP Routing table
PCE_CALRP 562R (GND) 1.27K (GND) RS740 RX780/RS780

GPP4 NC GPP4 GPP X4 CONNECTOR GPP[2:0] GPP[3:0]

GPP5 NC GPP5 GPP X1 CONNECTOR GPP4

GIGABIT ETHERNET GPP3 GPP5

RS780 Display Port Support (muxed on GFX)

GFX_TX0,TX1,TX2 and TX3


DP0
AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7


DP1
AUX1 and HPD1
A A

MICRO-STAR INt'L CO., LTD.


Title
RS780-PCIE I/F
Size Document Number Rev
1.1
MS-7549
Date: Tuesday, November 11, 2008 Sheet 14 of 38
5 4 3 2 1
5 4 3 2 1

+1.8V_S0
SPEC. HI:0.7VCC LOW:0.3VCC 3VDUAL
VCC3
R265 FB9
ANALOG POWER X5R
4.7KR0402 AVDD 15 MILS WIDTH
U17
1 6 NB_PWRGD_IN 220L2A-50 C283
33 SYS_PWRGD A1 Y1 C289 C698
2 5 NB_PWRGD_IN must have a pull-up +1.8V_S0 C4.7u6.3X5 C0.1u16Y0402 C1u16Y0402
GND VCC resister to +1.8V_S0 due to
3 4 NC7W207 output pin is op-drain
A2 Y2 R208 0R AVDDI 15 MILS WIDTH
X_NC7WZ07P6X_SC70-6 3VDUAL For meet power U15C
sequence C268 C696 F12 A22 TXD00P
C2.2u6.3X5 C0.1u25Y5 AVDD TXOUT_L0P TXD00N TXD00P 29
D
E12 AVDD PART 3 OF 6 TXOUT_L0N B22 TXD00N 29 D
R287 0R0402 SB_PWRGD F14 A21 TXD01P
33 SYS_PWRGD +1.8V_S0 AVDDDI TXOUT_L1P TXD01P 29
R291 G15 B21 TXD01N
FB8 AVDDQ 15 MILS WIDTH AVSSDI TXOUT_L1N TXD02P TXD01N 29
X_4.7KR0402 H15 AVDDQ TXOUT_L2P B20 TXD02P 29
H14 A20 TXD02N TXD10P_R R732 X_0R0402 TXD10P
R264 0R0402 NB_PWRGD_IN 220L2A-50 C273 AVSSQ TXOUT_L2N TXD10P_R TXD02N 29 TXD10N_R R731 X_0R0402 TXD10N TXD10P 29
20 WD_PWRGD SB_PWRGD 20 TXOUT_L3P A19 TXD10N 29
C276 C697 E17 B19 TXD10N_R
C2.2u6.3X5 C0.1u16Y0402 C1u16Y0402 C TXOUT_L3N TXD11N_R R733 X_0R0402 TXD11N

CRT/TVOUT
F17 Y TXD11N 29
F15 B18 TXD11P_R TXD11P_R R734 X_0R0402 TXD11P
COMP TXOUT_U0P TXD11N_R TXD12N_R R735 X_0R0402 TXD12N TXD11P 29
TXOUT_U0N A18 TXD12N 29
10 MILS WIDTH G18 A17 TXD12P_R TXD12P_R R736 X_0R0402 TXD12P
26 R RED TXOUT_U1P TXD12P 29
R478 140R1%0402 G17 B17 TXD12N_R
10 MILS WIDTH RED# TXOUT_U1N
26 G E18 GREEN TXOUT_U2P D20
R480 150R1%0402 F18 D21
10 MILS WIDTH GREEN# TXOUT_U2N
26 B E19 BLUE TXOUT_U3P D18
R479 150R1%0402 F19 D19 RS780
if chipset version is A13 ,then R pull down resistor should change to 140 ohm BLUE# TXOUT_U3N
HSYNC# A11 B16
16,26 HSYNC# DAC_HSYNC TXCLK_LP TXC0P 29 +1.8V_S0 Q40
VSYNC# B11 A16
16,26 VSYNC# DAC_VSYNC TXCLK_LN TXC0N 29 N-P8503BMG_SOT23-3-RH +1.8V_S0
F8 D16 CP38
26 DDC_CLK DAC_SCL TXCLK_UP
1.1V 26 DDC_DATA E8 DAC_SDA TXCLK_UN D17 2 1

S
G
VCC1_1 FB11220L2A-50 715R1%0402 R221 DAC_RSET G14 VDDLTP18 15 MILS WIDTH L32
PLL X5R RS780 DAC_RSET X_30L3A-15_0805-RH
VDDLTP18 A13
15 MILS WIDTH PLLVDD A12 B13 C307 C301
R211
15 MILS WIDTH PLLVDD18 PLLVDD VSSLTP18 0.1u/16v/Y5/4 C2.2u6.3X5
D14 PLLVDD18
+1.8V_S0 FB7 220L200mA 0402 C274 B12 A15

LVTM
PLLVSS VDDLT18 +12V
C313 C2.2u6.3X5 C279 B15 VDDLT18 15 MILS WIDTH L31

PLL PWR
FB6 220L2A-50 C2.2u6.3X5 C0.1u16Y0402 VDDLT18 X_30L3A-15_0805-RH
H17 VDDA18HTPLL VDDLT33 A14 RS780
4.7KR0402
15 MILS WIDTH VDDA18HTPLL B14 VDDLT33 TP25
FB10 220L2A-50 VDDA18PCIEPLL VDDLT33 C288 C296
15 MILS WIDTH D7 VDDA18PCIEPLL 2 1
E7 C14 1u/6.3v/Y5/4
C250 C305 C312 VDDA18PCIEPLL VSSLT CP37
VSSLT D15
C254 C0.1u16Y0402 SYSRESET# D8 C16
C2.2u6.3X5 C0.1u16Y0402 C2.2u6.3X5 NB_PWRGD_IN SYSRESET# VSSLT
A10 POWERGOOD VSSLT C18
LDT_STOP#_NB C10 C20 C10u6.3X50603-RH
ALLOW_LDTSTOP LDTSTOP# VSSLT
C12 E20

PM
C ALLOW_LDTSTOP VSSLT C
VSSLT C22
7 HTREFCLK HTREFCLK C25 ANALOG POWER X5R
HTREFCLK# HT_REFCLKP
7 HTREFCLK# C24 HT_REFCLKN
Stuff : RX780 R481
Nc : RS780 NB_OSC_14M NB_OSC_14M_R E11
7 NB_OSC_14M REFCLK_P

CLOCKs
F11 E9 R485 X_4.7KR0402 VCC3
R483 150R1%0402 R482 150R1%0402 REFCLK_N GPIO3
RX740/RS740/RS780 difference table VCC1_1 GPIO2 F7
7 NBGFX_SRCCLK T2 GFX_REFCLKP GPIO4 G12 R484
RS740 RX780 RS780 T1
7 NBGFX_SRCCLK# GFX_REFCLKN RX780 R155
NB_PWRGD IN 3.3V IN 1.8V IN 1.8V IN B9,A9 pulling up resistors are stuffed for not U1 RX780
working and hardware reseting issue.B8,A8 GPP_REFCLKP
U2 GPP_REFCLKN X_1.27KR1%0402
ALLOW_LDTSTOP OC OC OC/3.3V IN pulling up resistors are reserved.
OUT(default)/IN * X_1.27KR1%0402
7 NBLINKCLK V4 GPPSB_REFCLKP
LDT_STOP# 3.3V IN 1.8V IN 3.3V IN/OC VCC3 7 NBLINKCLK# V3 GPPSB_REFCLKN TMDS_HPD2 29 DVI/HDMI hot plug
IN(default)/IN * DVI_DDC_CLK B9
29 DVI_DDC_CLK I2C_CLK
DVI_DDC_DATA A9 D9
R257
29 DVI_DDC_DATA
SDA0_AUX0N B8
I2C_DATA MIS. TMDS_HPD
D10 TMDS_HPD1 R260 X_4.7KR0402
TMDS_HPD0 23
VCC3
23 SDA0_AUX0N DDC_DATA HPD
*, CLMC mode: NB send LDT_STOP#, ALLOW_LDTSTOP will become input R250 SCL0_AUX0P A8
23 SCL0_AUX0P DDC_CLK
X_4.7KR0402 X_4.7KR0402 DP_AUX1P B7 D12 R247 10KR0402 RS780
DP_AUX1N AUX1P TVCLKIN
A7 AUX1N
VCC3 AE8
DVI_DDC_DATA R248 X_2KR0402 STRP_DATA B10 THERMALDIODE_P
VCC3 STRP_DATA THERMALDIODE_N AD8
DVI_DDC_CLK
VCC3 TP26 G11 D13 TEST_EN
SUSE_STAT#, RS780C doesn't support sideport.
VSS TESTMODE
R236 R259 So SUSE_STAT# of SB700,just let it NC
4.7KR0402 RS740_DFT_GPIO1 C8 R233
AUX_CAL 1.8KR0402
150R0402 AMD-215-0674007-00-A01-RH
R262 R268

ALLOW_LDTSTOP
X_4.7KR0402 X_4.7KR0402 RS740/RX780/RS780 STRAPS
Note: for RS780, change 150R as AUX_CAL,
RS740/RX780/RS780: STRAP_DEBUG_BUS_GPIO_ENABLE
18 ALLOW_LDTSTOP
SDA0_AUX0N place close to pin C8
SCL0_AUX0P Enables the Test Debug Bus using GPIO and/or memory IO
B RS780 1 : Disable (RS740); Enable (RX780/RS780) B
RS740/RX780/RS780: LOAD_EEPROM_STRAPS 0 : Enable (RS740); Disable(RX780/RS780)
+1.8V_S0 VCC3 Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values RX780: pin DFT_GPIO5
0 : I2C Master can load strap values from EEPROM if connected, or use RS780: pin VSYNC RX780/RS740/RS780 DEBUG PIN MAPPING
R229 R238 default values if not connected RX780 RS740 RS780
X_4.7KR0402 X_4.7KR0402 RS740: pin DFT_GPIO1
DEBUG_OUT0 RED(DFT_GPIO0) LVDS_DIGON LVDS_DIGON
RS740 DFT_GPIO[4:2]: STRAP_PCIE_GPP_CFG[2:0]
B

X_N-MMBT3904_NL_SOT23 RS780: pin SUS_STAT# DEBUG_OUT1 GREEN(DFT_GPIO1) LVDS_ENA_BL LVDS_ENA_BL


Q42 These pin straps are used to configure PCI-E GPP mode.
8,18 LDT_STOP# E C LDT_STOP#_NB 111: register defined (register default to Config E) default DEBUG_OUT2 Y(DFT_GPIO2) LVDS_BLON LVDS_BLON
110: 4-0-0-0-0 Config A
R251 0R0402 DEBUG_OUT3 BLUE(DFT_GPIO3) TMDS_HPD TMDS_HPD
DP_AUX1P R269 X_3K/4
101: 4-4-0-0-0 Config B
RS780 100: 4-2-2-0-0 Config C
+1.8V_S0 DP_AUX1N R263 X_3K/4 DEBUG_OUT4 TXOUT_L2N(DBG_GPIO0) X AUX1N
VCC3 011: 4-2-1-1-0 Config D
SDA0_AUX0P 010: 4-1-1-1-1 Config E DEBUG_OUT5 TXCLK_LP(DBG_GPIO1) X AUX1P
others: register defined (default to Config E)
RS780 R255 SDA0_AUX0N DEBUG_OUT6 TXOUT_L3N(DBG_GPIO2) X HPD
R267
X_N-MMBT3904_NL_SOT23
X_4.7KR0402 DP_AUX1P
X_4.7KR0402 DEBUG_OUT7 TXCLK_LN(DBG_GPIO3) X AUX_CAL
DP_AUX1N
B

Q43 RS780 RS740/RX780/RS780: LOAD_EEPROM_STRAPS


RS780
Route AUX differentially
SYSRESET#
RX740/RS740/RS780 JTAG PIN MAPPING
8,18 LDT_RST# E C Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values RX780 RS740/RS780
0 : I2C Master can load strap values from EEPROM if connected, or use TRST TEST_EN TEST_EN
18,23,30 A_RST# R270 0R0402 default values if not connected
RS780 NB CLOCK INPUT TABLE TMS(TP220) PCIE_RST3(TP222) DDC_DATA(TP223)
NB CLOCKS RS740 RX780 RS780
RX780: pin DFT_GPIO1
RS780: pin SUS_STAT# TDI I2C_DATA I2C_DATA
A HT_REFCLKP TCK I2C_CLK I2C_CLK A
66M SE(SE) 100M DIFF 100M DIFF
HT_REFCLKN NC 100M DIFF 100M DIFF TDO(TP218) PWM_GPIO6(TP219) TMDS_HPD(TP221)
REFCLK_P
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V) 100M DIFF RS740/RX780/RS780: SIDE-PORT MEMORY ENABLE
REFCLK_N NC NC vref
100M DIFF Enables Side port memory
GFX_REFCLK 100M DIFF 100M DIFF 100M DIFF(IN/OUT)* 1. Disable (RS740/RS780) MICRO-STAR INt'L CO., LTD.
GPP_REFCLK NC 100M DIFF 100M DIFF(OUT) 0 : Enable (RS740/RS780)
RS780: pin HSYNC Title
GPPSB_REFCLK 100M DIFF 100M DIFF 100M DIFF RX780: Not Appicable RS780-SYSTEM I/F
Size Document Number Rev
1.1
* RS780 can be used as clock buffer to output two PCIE referecence clocks
By deault, chip will configured as input mode, BIOS can program it to output mode.
RS740 MS-7549
Date: Tuesday, November 11, 2008 Sheet 15 of 38
5 4 3 2 1
5 4 3 2 1

U15D
PAR 4 OF 6
AB12 MEM_A0 MEM_DQ0 AA18
AE16 MEM_A1 MEM_DQ1 AA20
V11 MEM_A2 MEM_DQ2 AA19
AE15 MEM_A3 MEM_DQ3 Y19
AA12 MEM_A4 MEM_DQ4 V17
AB16 MEM_A5 MEM_DQ5 AA17
AB14 MEM_A6 MEM_DQ6 AA15
D AD14 MEM_A7 MEM_DQ7 Y15 D
AD13 MEM_A8 MEM_DQ8 AC20
AD15 MEM_A9 MEM_DQ9 AD19

SBD_MEM/DVO_I/F
AC16 MEM_A10 MEM_DQ10 AE22
AE13 MEM_A11 MEM_DQ11 AC18
AC14 MEM_A12 MEM_DQ12 AB20 RS740/RX780/RS780: STRAP_DEBUG_BUS_GPIO_ENABLE
Y14 MEM_A13 MEM_DQ13 AD22
AC22 VCC3
MEM_DQ14 R240 3KR0402
AD16 MEM_BA0 MEM_DQ15 AD21 Enables the Test Debug Bus using GPIO and/or memory IO
AE17
AD17
MEM_BA1
Y17 R244 X_3KR0402 1 : Disable (RS740/RS780); Enable (RX780)
MEM_BA2 MEM_DQS0P 15,26 VSYNC#
MEM_DQS0N W18 0 : Enable (RS740/RS780); Disable(RX780)
W12 MEM_RAS# MEM_DQS1P AD20 RS740: pin DFT_GPIO5
Y12 MEM_CAS# MEM_DQS1N AE21
AD18 MEM_WE#
AB13 MEM_CS# MEM_DM0 W17
+1.8V_S0 VCC1_1
RS780: pin VSYNC
AB18 MEM_CKE MEM_DM1 AE19
V14 MEM_ODT
AE23 IOPLLVDD18 15 MILS WIDTH
IOPLLVDD18 IOPLLVDD 15 MILS WIDTH
V15 MEM_CKP IOPLLVDD AE24
W14 1.2V(RS740)
MEM_CKN C251 C266
IOPLLVSS AD23 RS740/RX780/RS780: SIDE-PORT MEMORY ENABLE
AE12 MEM_COMPP
AD12 AE18 MEM_VREF1 X_C2.2u6.3X5 Enables Side port memory
MEM_COMPN MEM_VREF X_C2.2u6.3X5 1. Disable (RS740/RS780)
AMD-215-0674007-00-A01-RH 0 : Enable (RS740/RS780)
R237 X_3KR0402 RS740: pin DFT_GPIO0
15,26 HSYNC#
RS780: pin HSYNC
R232 3KR0402 VCC3
VCC_DDR Have not side port memory,AMD suggest HSYNC pull hign
FOR RS780,R148,R162,C203 and C202 will be populated.
R224 RX780/RS780: STRAP_DEBUG_BUS_PCIE_ENABLE Enables Test debug bus
C using PCIE bus C
X_1KR1%0402
1. Disable (can be enabled
MEM_VREF1 thru nbcfg register)
0 : Enable
R222 C285
AMD: Please let MEM_VREF 0R RS780: configurable thru register
short to GND when Sideport X_C0.1u10X0402 setting only
is not used. RS740: Not supported

B B

A A

MICRO-STAR INt'L CO., LTD.


Title
RS780-SPMEM/STRAPS
Size Document Number Rev
1.1
MS-7549
Date: Tuesday, November 11, 2008 Sheet 16 of 38
5 4 3 2 1
5 4 3 2 1

AE14
RS740/RX780/RS780 POWER DIFFERENCE TABLE

AC3
AC4

M11
AA4
AB5
AB1
AB7

AE1
AE4
AB2

D11

E14
E15

K14

L15
J15
J12
W1
W2
W4
W7
W8
M6
G1
G2
G4

G8
D3
D5

H7

R7

N4

R1
R2
R4

U4
A2
B1

E4

P6

V7

V8
V6

Y6
L1
L2
L4
L7
J4
U15F
PIN NAME RS740 RX780 RS780 PIN NAME RS740 RX780 RS780

VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDDHT NC +1.1V +1.1V IOPLLVDD +1.2V NC +1.1V

VDDHTRX NC +1.1V +1.1V AVDD +3.3V NC +3.3V

VDDHTTX +1.2V +1.2V +1.2V AVDDDI +1.8V NC +1.8V

PART 6/6
D D
GROUND VDDA18PCIE NC +1.8V +1.8V AVDDQ +1.8V NC +1.8V

VDD18 +1.8V +1.8V +1.8V PLLVDD +1.2V NC +1.1V

VDD18_MEM NC NC +1.8V PLLVDD18 +1.8V NC +1.8V


VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VDDPCIE +1.2V +1.1V +1.1V VDDA18PCIEPLL +1.2V +1.8V +1.8V

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDDC +1.2V +1.1V +1.1V VDDA18HTPLL +1.8V +1.8V +1.8V

VDD_MEM +1.8V/1.5V NC +1.8V/1.5V VDDLTP18 +1.8V NC +1.8V


A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25

L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
VDD33 +3.3V NC +3.3V VDDLT18 +1.8V NC +1.8V

IOPLLVDD18 +1.8V NC +1.8V VDDLT33 +3.3V NC NC

AMD-215-0674007-00-A01-RH

CP4

VCC1_1
1.2A VCC1_1
C L9
X_Copper 120 MILS WIDTH U15E 300 MILS WIDTH 2A L15 C
VDDHT J17 A6 VDD_PCIE
1u25Y0402-RH VDDHT VDDPCIE
X_30L3A-15_0805-RH
K16 VDDHT PART 5/6 VDDPCIE B6
C364 X_30L3A-15_0805-RH
L16 VDDHT VDDPCIE C6
C664 C271 C277 C269 M16 D6 C367 C368 C365 C366
FB4 1u/16v/X5/6_B VDDHT VDDPCIE CP15
X_C10u10Y0805 P16 VDDHT VDDPCIE E6
R16 VDDHT VDDPCIE F6
C0.1u25Y0402-RH T16 G7 C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
X_220L2A-50 VDDHT VDDPCIE C1u16X5-RH C1u16X5-RH C10u6.3X5-RH X_Copper
70 MILS WIDTH VDDPCIE H8
CP1 VDDHTRX H18 J9
VDDHTRX VDDPCIE
G19 VDDHTRX VDDPCIE K9
C0.1u25Y0402-RH F20 M9
X_Copper C240 C241 VDDHTRX VDDPCIE
E21 VDDHTRX VDDPCIE L9
C239 1u/16v/X5/6_B D22 P9
VDDHTRX VDDPCIE
VCCA_1V2
0.5A B23 VDDHTRX VDDPCIE R9
C10u10Y0805 A23 T9
FB5 VDDHTRX VDDPCIE
45 MILS WIDTH VDDPCIE V9
VDDHTTX AE25 U9 300 MILS WIDTH
C663 VDDHTTX VDDPCIE X_C0.1u25Y0402-RH VCC1_1
AD24 VDDHTTX 7A
X_220L2A-50 C0.1u25Y0402-RH C0.1u25Y0402-RH C0.1u25Y0402-RH AC23 K12 X_C0.1u25Y0402-RH
C243 C244 C245 C246 VDDHTTX VDDC
X_C10u10Y0805 AB22 VDDHTTX VDDC J14
CP2 C0.1u16Y0402 AA21 U16
VDDHTTX VDDC C344 C252 C665 C667 C666 C282 C297
Y20 VDDHTTX VDDC J11
W19 VDDHTTX VDDC K15 X_C10u10Y0805

POWER
X_Copper C0.1u25Y0402-RH
ER_RS780A1.pdf V18
U17
VDDHTTX VDDC M12
L14 C10u6.3X5-RH
VDDHTTX VDDC
from 1.2V change to 1.35V T17 VDDHTTX VDDC L11 C0.1u25Y C0.1u25Y
R17 VDDHTTX VDDC M13
B +1.8V_S0
0.9A P17 VDDHTTX VDDC M15 B
M17 VDDHTTX VDDC N12
FB12 20 MILS WIDTH N14
VDDA18PCIE VDDC
J10 VDDA18PCIE VDDC P11
C0.1u25Y0402-RH P10 P13
X_220L2A-50 C315 C668 VDDA18PCIE VDDC
K10 VDDA18PCIE VDDC P14
CP10 C317 C314 M10 R12
C295 C1u16X5-RH
C0.1u16X VDDA18PCIE VDDC
L10 VDDA18PCIE VDDC R15
W9 VDDA18PCIE VDDC T11 AMD: Found R? will be changed to 0 ohm when
X_Copper H9 T15
C10u6.3X5-RH VDDA18PCIE VDDC RS780 doesn't use side-port memory.
T10 VDDA18PCIE VDDC U12
C10u6.3X5-RH R10 T14
VDDA18PCIE VDDC
Y9 VDDA18PCIE VDDC J16 30 MILS WIDTH 0.5A
AA9 VDDA18PCIE
AB9 VDDA18PCIE VDD_MEM AE10
AD9 VDDA18PCIE VDD_MEM AA11
+1.8V_S0 AE9 Y11 R230 RS780
VDDA18PCIE VDD_MEM
U10 VDDA18PCIE VDD_MEM AD10 0R0402
CP39 X_Copper 15 MILS WIDTH AB10
VDDG18 VDD_MEM
F9 VDDG18 VDD_MEM AC10
G9 VCC3
VDDG18 VDDG33 R226 NC_0R
15 MILS WIDTH AE11 VDD18_MEM VDDG33 H11 15 MILS WIDTH
R234 0R VDD18 AD11 H12
VDD18_MEM VDDG33 C290 RS780
RS780 C294 C669 C300
C0.1u16Y0402
1u/6.3v/Y5/4 C1u16X5-RH AMD-215-0674007-00-A01-RH C1u16X5-RH

RS780
A A

AMD: R? change to 0 ohm when RS780


doesn't use side-port memory. MICRO-STAR INt'L CO., LTD.
Title
RS780-POWER
Size Document Number Rev
1.1
MS-7549
Date: Tuesday, November 11, 2008 Sheet 17 of 38
5 4 3 2 1
5 4 3 2 1

RN31
PCI_CLK4 1 2 PCICLK4_SIO
PCICLK4_SIO 22,30
PCI_CLK1 PCICLK1_SLOT2
PCI_CLK2
3
5
4
6 TPM_PCLK
PCICLK1_SLOT2 24 For EMI C573
TPM_PCLK 22,30
PCI_CLK0 7 8 PCICLK0_SLOT1 PCICLK0_SLOT1
PCICLK0_SLOT1 24
C15p50N0402
SB710 8P4R_22R/4
PCICLK4_SIO C575
OPT U25A
C10p50N0402
15,23,30 A_RST# A_RST# R419 33R0402 N2
SB700 P4 PCI_CLK0 PCICLK1_SLOT2 C574
X_SB710 A_RST# PCICLK0 PCI_CLK1
Part 1 of 5 PCICLK1 P3

PCI CLKS
C457 C0.1u10X0402 A_RX0P_C V23 P1 PCI_CLK2 C560 C15p50N0402
14 A_RX0P PCIE_TX0P PCICLK2
D C458 C0.1u10X0402 A_RX0N_C V22 P2 PCICLK3 TPM_PCLK D
14 A_RX0N PCIE_TX0N PCICLK3 PCICLK3 22
C447 C0.1u10X0402 A_RX1P_C V24 T4 PCI_CLK4
14 A_RX1P PCIE_TX1P PCICLK4
C448 C0.1u10X0402 A_RX1N_C V25 T3 PCICLK5 PCICLK5 22 C15p50N0402
14 A_RX1N PCIE_TX1N PCICLK5/GPIO41
C465 C0.1u10X0402 A_RX2P_C U25
14 A_RX2P PCIE_TX2P
C464 C0.1u10X0402 A_RX2N_C U24
14 A_RX2N PCIE_TX2N
PLACE PCIE CAPS C449 C0.1u10X0402 A_RX3P_C T23
14 A_RX3P PCIE_TX3P
CLOSE TO U13 C450 C0.1u10X0402 A_RX3N_C T22 N1 PCI_RST# R400 33R0402
14 A_RX3N PCIE_TX3N PCIRST# PCIRST# 24

PCI EXPRESS INTERFACE


U22 AD[31..0]
14 A_TX0P PCIE_RX0P AD[31..0] 24
14 A_TX0N U21 U2 AD0
PCIE_RX0N AD0 AD1
14 A_TX1P U19 PCIE_RX1P AD1 P7 SIO PCICLK has been chaneged
14 A_TX1N V19 V4 AD2
R20
PCIE_RX1N AD2
T1 AD3 PCICLK5 to PCICLK4 for AMD
14 A_TX2P PCIE_RX2P AD3
14 A_TX2N R21 V3 AD4 recommand
PCIE_RX2N AD4 AD5
14 A_TX3P R18 PCIE_RX3P AD5 U1
14 A_TX3N R17 V1 AD6
PCIE_RX3N AD6 AD7
HS_SB AD7 V2
R352 562R1%0402 T25 T2 AD8
VCC_SB R344 2.05KR1%0402 PCIE_CALRP AD8 AD9
PCIE_VDDR T24 PCIE_CALRN AD9 W1

MSI
T9 AD10 VDD VCC3
L17 PCIE_PVDD AD10 AD11
P24 PCIE_PVDD AD11 R6
X_30L3A-15_0805-RH R7 AD12
AD12 AD13
P25 PCIE_PVSS AD13 R5

DDR
2 1 C459 U8 AD14 C444 C565
2 1 AD14 AD15
C1u6.3Y0402-RH AD15 U5 X_C0.1u16Y0402 X_C0.1u16Y0402
CP18 Y7 AD16
AD16 AD17
AD17 W8
V9 AD18
C446 AD18 AD19
AD19 Y8
SB_HEATSINK X_C10u6.3X50805 AA8 AD20
AD20 AD21
AD21 Y4
C Y3 AD22 Adding some 0.1僴uF stitching C
AD22 AD23
AD23 Y2 capacitors for crossing a split when
AA2 AD24
AD24 AD25 these signals change different
AD25 AB4
7 SBSRCCLK N25 AA1 AD26 reference layer.
PCIE_RCLKP/NB_LNK_CLKP AD26 AD27
7 SBSRCCLK# N24 PCIE_RCLKN/NB_LNK_CLKN AD27 AB3
AB2 AD28
AD28 AD29
K23 NB_DISP_CLKP AD29 AC1
K22 AC2 AD30

PCI INTERFACE
NB_DISP_CLKN AD30 AD31 PCI_CBE#[3..0]
AD31 AD1 PCI_CBE#[3..0] 24
M24 W2 PCI_CBE#0
NB_HT_CLKP CBE0# PCI_CBE#1
M25 NB_HT_CLKN CBE1# U7
AA7 PCI_CBE#2
CBE2# PCI_CBE#3
P17 CPU_HT_CLKP CBE3# Y1
M18 CPU_HT_CLKN FRAME# AA6 PCI_FRAME# 24
DEVSEL# W5 PCI_DEVSEL# 24
M23 SLT_GFX_CLKP IRDY# AA5 PCI_IRDY# 24
M22 SLT_GFX_CLKN TRDY# Y5 PCI_TRDY# 24
PAR U6 PCI_PAR 24
J19 GPP_CLK0P STOP# W6 PCI_STOP# 24
J18 GPP_CLK0N PERR# W4 PCI_PERR# 24
SERR# V7 PCI_SERR# 24
L20 GPP_CLK1P REQ0# AC3 PCI_REQ#0 24
L19 GPP_CLK1N REQ1# AD4 PCI_REQ#1 24
Add the cystal for SB700/SB750 A13 to solve the system time lag issue REQ2# AB7 PCI_REQ#2 24
M19 AE6 PCI_REQ#3 PCI_REQ#3 24
GPP_CLK2P REQ3#/GPIO70

CLOCK GENERATOR
M20 AB6 PCI_REQ#4 PCI_REQ#4 24
GPP_CLK2N REQ4#/GPIO71
GNT0# AD2 PCI_GNT#0 24
N22 GPP_CLK3P GNT1# AE4 PCI_GNT#1 24
X_14.318MHZ16P_D-RH P22 AD5 PCI_GNT#2 TP3
GPP_CLK3N GNT2# PCI_GNT#3 TP39 VCC3
GNT3#/GPIO72 AC6
B C455 X_C22p50N0402 SB14M_X1 25M_48M_66M_OSC PCI_GNT#4 PCI_CLKRUN# R394 X_10KR0402 B
7 25M_48M_66M_OSC L18 25M_48M_66M_OSC GNT4#/GPIO73 AE5
AD6 PCI_CLKRUN# TP37
CLKRUN#
2

LOCK# V5 PCI_LOCK# 24
Y3 R348 SB14M_X1 J21 LPC_AD[3..0]
25M_X1 LPC_AD[3..0] 30
X_10MR1%0402 AD3 PCI_INTE# 24
1

INTE#/GPIO33
INTF#/GPIO34 AC4 PCI_INTF# 24
C454 X_C22p50N0402 SB14M_X2 AE2 3VDUAL
INTG#/GPIO35 PCI_INTG# 24
SB14M_X2 J20 AE3
25M_X2 INTH#/GPIO36 PCI_INTH# 24
D21
G22 LPC_CLK0 LPCCLK0 22 X
LPCCLK0 LPC_CLK1
LPCCLK1 E22 LPCCLK1 22 Z VBAT
32K_X1 A3 H24 LPC_AD0 Y
X1 LAD0 LPC_AD1
H23
RTC XTAL

Y4 LAD1 LPC_AD2
LAD2 J25 S-BAT54C_SOT23
32.768KHZ12.5P_D-LF J24 LPC_AD3
LAD3
LPC

1 2 32K_X2 R349 B3 H25


X2 LFRAME# LPC_FRAME# 30
R382 VCC_DDR H22
LDRQ0# LPC_DRQ#0 30 BAT1
X_10MR1%0402 AB8 SB600_PCI_GNT5# TP35 VCC3 16mil
3
4

+1.8V_S0 300R0402 LDRQ1#/GNT5#/GPIO68 SB600_PCI_REQ5# R397 10KR0402 R254


BMREQ#/REQ5#/GPIO65 AD7 1 2
R354 X_1KR0402 V15 510R0402
SERIRQ SERIRQ 30
3VDUAL BAT2P-RH
15 ALLOW_LDTSTOP F23 ALLOW_LDTSTP JBAT1
8 CPU_HOT R346 X_NC0R0402 F24 PROCHOT# RTCCLK C3 TP38
R384 20MR 8 LDT_PWRGD LDT_PWRGD F22 C2 INTR_ALERT# R398 X_100KR0402 VBATIN 1
LDT_PG INTRUDER_ALERT# R242
LDT_STOP# R253
CPU

8,15 LDT_STOP# G25 LDT_STP# VBAT B2 2


RTC

C511 C508 LDT_RST# 510R0402 G


8,15 LDT_RST# G24 LDT_RST# 16mil 3
C18p50N0402 C18p50N0402
C531 C534 N31-1030151+N33-1020271-RH
100R0402
Note: LDT_PG, LDT_STP# & LDT_RST# are OD SB,SB700,A11,FCBGA-528pin C0.1u16Y0402
and require a PU to the CPU I/O rail. They are C1u6.3Y0402-RH The JBAT1 must be placedment and
A A

PLACE THESE COMPONENTS CLOSE TO U600, AND also in the S5 domain to prevent glitching at is convenient for customers
USE GROUND GUARD FOR 32K_X1 AND 32K_X2 power up.

Check U13 New Version : Port Number MICRO-STAR INt'L CO., LTD.
Title
SB700-PCIE/PCI/CPU/LPC
Size Document Number Rev
1.1
MS-7549
Date: Tuesday, November 11, 2008 Sheet 18 of 38
5 4 3 2 1
5 4 3 2 1

SATA1
SATA7P_PURPLE-P-RH PLACE SATA AC COUPLING

GND
9 CAPS CLOSE TO SB700

GND
1

TX+
2 SATA_TX0+_C U25B
SATA_TX0-_C

RX- TX-
3
C0.01u16X0402
SB700

GND
4
SATA_RX0-_C SATA_TX0+_C C569 SATA_TX0+ AD9
4 Ss 3 Ps 5
6 SATA_RX0+_C SATA_TX0-_C C563 SATA_TX0- AE9 SATA_TX0P
Part 2 of 5
IDE_IORDY AA24
AA25
PD_IORDY 31

RX+
SATA_TX0N IDE_IRQ PD_SIRQ 31
C0.01u16X0402 PDA_R0

GND
7 IDE_A0 Y22 PDA_R0 31
8 SATA_RX0-_C C547 C0.01u16X0402 SATA_RX0-AB10 AB23 PDA_R1

GND
SATA_RX0N IDE_A1 PDA_R1 31
SATA_RX0+_C C537 C0.01u16X0402 SATA_RX0+AC10 PDA_R2
1 Pm 2 Sm SATA_RX0P IDE_A2 Y23
AB24
PDA_R2 31
D IDE_DACK# PD_DACK# 31 D
SATA_TX1+_CC570 C0.01u16X0402 SATA_TX1+AE10 AD25
SATA2 SATA_TX1P IDE_DRQ PD_DREQ 31
SATA_TX1-_CC564 C0.01u16X0402 SATA_TX1- AD10 AC25
SATA_TX1N IDE_IOR# PD_IOR# 31
SATA7P_PURPLE-P-RH AC24
IDE_IOW# PD_IOW# 31
SATA_RX1-_C C548 C0.01u16X0402 SATA_RX1-AD11

GND
9 SATA_RX1N IDE_CS1# Y25 PD_CS#1 31
SATA_RX1+_C C538 C0.01u16X0402 SATA_RX1+AE11

GND
1 SATA_RX1P IDE_CS3# Y24 PD_CS#3 31

TX+
2 SATA_TX1+_C
SATA_TX1-_C SATA_TX2+_CC568 C0.01u16X0402 SATA_TX2+AB12 PDD0

RX- TX-
3 SATA_TX2P IDE_D0/GPIO15 AD24
SATA_TX2-_CC562 C0.01u16X0402 SATA_TX2- AC12 PDD1

GND
4 SATA_TX2N IDE_D1/GPIO16 AD23
5 SATA_RX1-_C AE22 PDD2 PDD[15..0]
IDE_D2/GPIO17 PDD[15..0] 31

ATA 66/100/133
SATA_RX1+_C SATA_RX2-_C C545 C0.01u16X0402 SATA_RX2-AE12 PDD3
N5N-07M0231-H06 6 AC22

RX+
SATA_RX2+_C C539 C0.01u16X0402 SATA_RX2+AD12 SATA_RX2N IDE_D3/GPIO18 PDD4

GND
7 SATA_RX2P IDE_D4/GPIO19 AD21
8 AE20 PDD5

GND
SATA_TX3+_CC505 C0.01u16X0402 SATA_TX3+AD13 IDE_D5/GPIO20 PDD6
SATA_TX3P IDE_D6/GPIO21 AB20

SERIAL ATA
SATA_TX3-_CC501 C0.01u16X0402 SATA_TX3- AE13 AD19 PDD7
SATA_TX3N IDE_D7/GPIO22 PDD8
SATA3 IDE_D8/GPIO23 AE19
SATA7P_PURPLE-P-RH SATA_RX3-_C C495 C0.01u16X0402 SATA_RX3-AB14 AC20 PDD9
SATA5 SATA_RX3N IDE_D9/GPIO24
SATA_RX3+_C C490 C0.01u16X0402 SATA_RX3+AC14 AD20 PDD10
SATA_RX3P IDE_D10/GPIO25 PDD11 Reserved for EMI 0906
GND
9 IDE_D11/GPIO26 AE21
SATA_TX4+_CC506 C0.01u16X0402 SATA_TX4+AE14 PDD12
GND

GND
9 1 SATA_TX4P IDE_D12/GPIO27 AB22
TX+
SATA_TX2+_C SATA_TX4-_CC502 C0.01u16X0402 SATA_TX4- AD14 PDD13
GND

1 2 SATA_TX4N IDE_D13/GPIO28 AD22


TX+

SATA_TX4+_C SATA_TX2-_C PDD14


RX- TX-

2 3 IDE_D14/GPIO29 AE23
SATA_TX4-_C SATA_RX4-_C C496 C0.01u16X0402 SATA_RX4-AD15 PDD15 SPI_CLK
RX- TX-

GND

3 4 SATA_RX4N IDE_D15/GPIO30 AC23


SATA_RX2-_C SATA_RX4+_C C491 C0.01u16X0402 SATA_RX4+AE15
GND

4 5 SATA_RX4P
5 SATA_RX4-_C 6 SATA_RX2+_C
RX+

SATA_RX4+_C SATA_TX5+_CC507 C0.01u16X0402 SATA_TX5+AB16 C529


GND

6 7
RX+

SATA_TX5-_CC503 C0.01u16X0402 SATA_TX5- AC16 SATA_TX5P X_C10p50N0402


GND

7 8
GND

SATA_TX5N SPI_DATAIN
8 G6
GND

SATA_RX5-_C C497 C0.01u16X0402 SATA_RX5-AE16 SPI_DI/GPIO12 SPI_DATAOUT R407


SATA_RX5N SPI_DO/GPIO11 D2
SATA_RX5+_C C492 C0.01u16X0402 SATA_RX5+AD16 D1 SPI_CLK X_0R0402
SATA4 SATA_RX5P SPI_CLK/GPIO47
C SATA7P_PURPLE-P-RH F4 SPIHOLD# SPI_HOLD# C
SATA6 SPI_HOLD#/GPIO31

SPI ROM
R393 1KR1%0402 SATA_CAL V12 F3 SPI_CS#
SATA_CAL SPI_CS1#/GPIO32
GND

9
SATA_X1
GND

GND

9 1 Y12 SATA_X1 LAN_RST#/GPIO13 U15 LAN_RST# 27


TX+

SATA_TX3+_C R272 IS 1K 1% FOR XTAL, SPI_WP#


GND

1 2 ROM_RST#/GPIO14 J1
TX+

SATA_TX5+_C SATA_TX3-_C SATA_X2


RX- TX-

2 3 AA12
SATA_TX5-_C 4.99K 1% FOR INTERNAL CLK SATA_X2
RX- TX-

GND

3 4 FANOUT0/GPIO3 M8
SATA_RX3-_C SATA_LED
GND

4 5 34 SATA_LED W11 SATA_ACT#/GPIO67 FANOUT1/GPIO48 M5


5 SATA_RX5-_C 6 SATA_RX3+_C M7 TEMP _COMM
RX+

SATA_RX5+_C FANOUT2/GPIO49
GND

6 7
RX+

connect to GND VCC3


GND

7 8 AA11 P5
GND

PLLVDD_SATA PLLVDD_SATA FANIN0/GPIO50 for AMD recommand

SATA PWR
8 P8
GND

FANIN1/GPIO51
XTLVDD_SATA W12 XTLVDD_SATA FANIN2/GPIO52 R8
R389
SATA7P_PURPLE-P-RH R392
SATA7P_PURPLE-P-RH TEMP_COMM C6
TEMPIN0/GPIO61 B6 10KR0402
TEMPIN1/GPIO62 A6
A5

HW MONITOR
SATA_X1 C530 C10p50N0402 TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64 B5 TALERT# 8,30

VIN0/GPIO53 A4
1

R395 Y5 25MHZ/18pf/HC49S B4
10MR1%0402 VIN1/GPIO54
Impendance 90 Ohm,refer to AN_SB700AB2 VIN2/GPIO55 C4
D4
2

SATA_X2 C533 C10p50N0402 VIN3/GPIO56


VIN4/GPIO57 D5
VIN5/GPIO58 D6
VIN6/GPIO59 A7
VIN7/GPIO60 B7

3VDUAL
B B
CP30
F6 AVDD_HWM
AVDD
NS_VIA CONNECTS
3VDUAL G7 C516 X_Copper HWM_AGND TO GND
8P4R-10KR0402 AVSS
C2.2u6.3X5
SB,SB700,A11,FCBGA-528pin
RN33
SPI_WP# 1 2
3 4 3VDUAL
SPI_HOLD# 5 6
7 8 SPI FLASH MEMORY

C10u10Y0805
C520
SPI_CS# R437 1K/4 C0.1u25Y0402-RH
C551
SST SPI ROM SPI DEBUG PORT
SPI1 Place close to SPI ROM
SPI_CS# 1 8 3VDUAL
SPI_DATAIN CS VCC SPI_HOLD#
2 DO HOLD 7
SPI_WP# 3 6 SPI_CLK
WP CLK SPI_DATAOUT
4 GND DIO 5
JSPI1
W25X80VSSIG-RH 1 2
SPI_DATAIN 3 4 SPI_DATAOUT
SPI_CS# 5 6 SPI_CLK
7 8
CP29 SPI_HOLD# 9
CP25 X_Copper VCC3 X_Copper
A XTLVDD_SATA H2X5[1]M-2PITCH_BLACK-RH A
VCC_SB PLLVDD_SATA L25
L22 15 MILS WIDTH
Part Number : N31-2051451-H06
15 MILS WIDTH
X_30L3A-15_0805-RH
X_30L3A-15_0805-RH
C499 C517 MICRO-STAR INt'L CO., LTD.
CAP CLOSE TO C1u6.3Y0402-RH CAP CLOSE TO THE C515
THE BALLS OF BALL OF SB C1u6.3Y0402-RH Title
C10u10Y0805 SB700-SATA/IDE/HWM/SPI
SB
Size Document Number Rev
1.1
MS-7549
Date: Wednesday, November 12, 2008 Sheet 19 of 38
5 4 3 2 1
5 4 3 2 1

U25D

SB700 Part 4 of 5
PCI_PME# E1
24 PCI_PME# PCI_PME#/GEVENT4#
TP4 RI# E2 C8
RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC USBCLK_EXT 7
TP36 SLP_S2 H7
SLP_S3# SLP_S2/GPM9# USB_RCOMP R486 11.8KR1%0402
30,33 SLP_S3# F5 SLP_S3# USB_RCOMP G8
SB_THRM# SLP_S5# G1

USB MISC
8 CPU_THRIP# 32,33 SLP_S5# SLP_S5#

ACPI / WAKE UP EVENTS


30 PWRBTIN# PWRBTIN# H2
SB_PWRGD PWR_BTN#
15 SB_PWRGD H1 PWR_GOOD
SUS_STAT# K3
R369 X_8.2KR0402 SB_TEST2 SUS_STAT#
D 3VDUAL H5 TEST2 USB_FSD13P E6 D
SB_TEST1 H4 E7 VCC3
SB_TEST0 TEST1 USB_FSD13N
H3 TEST0
A20GATE Y15 F7

USB 1.1
30 A20GATE KBRST# GA20IN/GEVENT0# USB_FSD12P
30 KBRST# W15 KBRST#/GEVENT1# USB_FSD12N E8
Cap have been unpopulate LPC_PME# K4 C561
30 LPC_PME# LPC_PME#/GEVENT3#
TP27 LPC_SMI# K24 H11 X_C0.1u16Y0402
for meet power sequence LPC_SMI#/EXTEVNT1# USB_HSD11P USBP11 25
S3_STATE F1 J10
32 S3_STATE S3_STATE/GEVENT5# USB_HSD11N USBN11 25
7,30,33,34 FP_RST# J2 SYS_RESET#/GPM7#
PE_WAKE# H6 E11
23,27 PE_WAKE# WAKE#/GEVENT8# USB_HSD10P USBP10 25
R396 SB_BLINK F2 F11 Added Cap 0.1僴uF stitching
BLINK/GPM6# USB_HSD10N USBN10 25
RSMRST# SB_THRM# J6
3VDUAL
WD_PWRGD W14
SMBALERT#/THRMTRIP#/GEVENT2#
A11
capacitors for crossing a split
15 WD_PWRGD NB_PWRGD USB_HSD9P USBP9 25
X_22KR0402 B11
USB_HSD9N USBN9 25
C532 30 RSMTST_IO RSMRST# D3 RSMRST#
X_C2.2u6.3X5 USB_HSD8P C10
D10
USBP8 25 90 OHM
USB_HSD8N USBN8 25
VCC3 TP2 GPIO10 AE18 G11
SATA_IS0#/GPIO10 USB_HSD7P USBP7 25
TP29 GPIO6 AD18 H12
CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N USBN7 25
SUS_STAT# R416 10KR0402 TP32 GPIO4 AA19
TP33 GPIO0 SMARTVOLT1/SATA_IS2#/GPIO4
W17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E12 USBP6 25
GB_ENABLE R399 X_10KR0402 TP34 PE0_PRSNTX16# V17 E14
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N USBN6 25
DDR3_RST# R391 X_10KR0402 TP28 GPIO40 W20
SCL0_S R370 2.2KR0402 SPKR CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
34 SPKR W21 SPKR/GPIO2 USB_HSD5P C12 USBP5 25

USB 2.0
SDA0_S R374 2.2KR0402 SCL0_S AA18 D12
SCL0/GPOC0# USB_HSD5N USBN5 25
WD_PWRGD R378 X_10KR0402 SDA0_S W18
SCL1 SDA0/GPOC1#
23 SCL1 K1 SCL1/GPOC2# USB_HSD4P B12 USBP4 25
3VDUAL SDA1 K2 A12
23 SDA1 SDA1/GPOC3# USB_HSD4N USBN4 25
Pulling up to VCC3 change to 3VDUAL .Refer to AMD demo circuit PD_DET AA20

GPIO
31 PD_DET DDC1_SCL/GPIO9
Y18 DDC1_SDA/GPIO8 USB_HSD3P G12 USBP3 25
C GB_ENABLE C1 G14 C
LLB#/GPIO66 USB_HSD3N USBN3 25
SB600 TP31 GPIO5 Y19
SCL1 R415 2,2KR0402 DDR3_RST# SMARTVOLT2/SHUTDOWN#/GPIO5
G5 DDR3_RST#/GEVENT7# USB_HSD2P H14 USBP2 25
SDA1 R414 2,2KR0402 H15
USB_HSD2N USBN2 25
SB_TEST2 R390 X_2.2KR0402 A13
USB_HSD1P USBP1 25
SB_TEST1 R403 X_2.2KR0402 B13
USB_HSD1N USBN1 25
SB_TEST0 R404 X_2.2KR0402
USB_HSD0P B14 USBP0 25
SB_BLINK R410 X_10KR0402 B9 A14
USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N USBN0 25
USB_OCP#5 B8
25 USB_OCP#5 USB_OCP#4 USB_OC5#/IR_TX0/GPM5#
25 USB_OCP#4 A8 USB_OC4#/IR_RX0/GPM4# IMC_GPIO8 A18

USB OC
USB_OCP#3 A9 B18
25 USB_OCP#3 USB_OCP#2 USB_OC3#/IR_RX1/GPM3# IMC_GPIO9
25 USB_OCP#2 E5 USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10 F21
R371 33R0402 SCL0_S USB_OCP#1 F8 D21
6,7,11,33 SCL0 25 USB_OCP#1 USB_OC1#/GPM1# SCL2/IMC_GPIO11
R373 33R0402 SDA0_S USB_OCP#0 E4 F19
6,7,11,33 SDA0 25 USB_OCP#0 USB_OC0#/GPM0# SDA2/IMC_GPIO12
SCL3_LV/IMC_GPIO13 E20
AZ_BIT_CLK_R M1 E21
RN32 AZ_SDATA_OUT_R M2 AZ_BITCLK SDA3_LV/IMC_GPIO14
AZ_SDOUT IMC_PWM1/IMC_GPIO15 E19
1 2 AZ_RST#_R J7 D19
22,28 AZ_RST# AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16 IMC_GPIO16 22
3 4 AZ_SYNC_R J8 E18
28 AZ_SYNC AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17 IMC_GPIO17 22
AZ_BIT_CLK_R

HD AUDIO
28 AZ_BIT_CLK 5 6 L8 AZ_SDIN2/GPIO44
7 8 AZ_SDATA_OUT_R 28 AZ_SDATA_IN0 M3 G20
28 AZ_SDATA_OUT AZ_SYNC_R AZ_SDIN3/GPIO46 IMC_GPIO18
L6 AZ_SYNC IMC_GPIO19 G21
8P4R-33R0402 AZ_RST#_R M4 D25
AZ_RST# IMC_GPIO20
L5 AZ_DOCK_RST#/GPM8# IMC_GPIO21 D24

INTEGRATED uC
IMC_GPIO22 C25
IMC_GPIO23 C24
3VDUAL B25
IMC_GPIO24
IMC_GPIO25 C23
B B
IMC_GPIO26 B24
R38310KR0402 USB_OCP#5 B23
IMC_GPIO27
IMC_GPIO28 A23
R381 10KR0402 USB_OCP#4 C22
RN26 IMC_GPIO29
Reserved for EMI 0906 IMC_GPIO30 A22
1 2 USB_OCP#3 B22
USB_OCP#1 IMC_GPIO31
AZ_BIT_CLK_R
For EMI(closed SB) 3
5
4
6 USB_OCP#2 IMC_GPIO32 B21
A21
USB_OCP#0 IMC_GPIO33
7 8 H19 IMC_GPIO0 IMC_GPIO34 D20
H20 IMC_GPIO1 IMC_GPIO35 C20

INTEGRATED uC
C542 8P4R-10KR0402 H21 A20
IDE_RST# SPI_CS2#/IMC_GPIO2 IMC_GPIO36
X_C33p50N0402 31 IDE_RST# F25 IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37 B20
IMC_GPIO38 B19
D22 IMC_GPIO4 IMC_GPIO39 A19
E24 IMC_GPIO5 IMC_GPIO40 D18
AZ_SDATA_OUT_R E25 C18
IMC_GPIO6 IMC_GPIO41
D23 IMC_GPIO7
VCC3
C543 R353 10KR0402 IDE_RST#
X_C33p50N0402
SB,SB700,A11,FCBGA-528pin

AZ_SYNC_R

C541
X_C33p50N0402

A A

PE_WAKE# MICRO-STAR INt'L CO., LTD.


Title
C513 SB700-ACPI/GPIO/USB/AUDIO
X_0.1u/16v/Y5/4
Size Document Number Rev
1.1
MS-7549
Date: Sunday, November 09, 2008 Sheet 20 of 38
5 4 3 2 1
5 4 3 2 1

SB700 A11

CP16
VCC3 VDD VCC_SB
U25C 1 2
SB700 100 MILS WIDTH
L9 L15 VDD R332 X_0R0805
VDDQ_1 VDD_1
M9 VDDQ_2 Part 3 of 5 VDD_2 M12
T15 M14 SB700 A12 U25E
C675 C676 VDDQ_3 VDD_3 C441
U9 VDDQ_4 VDD_4 N13
1

CORE S0
C476 C437 C673 C678 C438
+

C553
U16 VDDQ_5 VDD_5 P12
C10u6.3X50805 SB700

PCI/GPIO I/O
U17 VDDQ_6 VDD_6 P14 VSS_1 A2
D EC31 X_C1u10Y C1u10Y V8 R11 A25 D
2

VDDQ_7 VDD_7 X_C1u/6.3V/Y5/4 C1u10Y C1u10Y VSS_2


W7 VDDQ_8 VDD_8 R15 VSS_3 B1
Y6 T16 0.1u/16v/Y5/4_B D7
CD470u10EL11-2 C1u10Y VDDQ_9 VDD_9 VSS_4
AA4 VDDQ_10 T10 AVSS_SATA_1 VSS_5 F20
C1u10Y AB5 U10 G19
VDDQ_11 AVSS_SATA_2 VSS_6
AB21 VDDQ_12 U11 AVSS_SATA_3 VSS_7 H8
U12 AVSS_SATA_4 VSS_8 K9
CP20 X_Copper V11 K11
VCC3 AVSS_SATA_5 VSS_9
V14 AVSS_SATA_6 VSS_10 K16
CP19 30 MILS WIDTH VCC_SB W9 L4
VDD33_18 CKVDD_1.2V L18 AVSS_SATA_7 VSS_11
Y20 VDD33_18_1 CKVDD_1.2V_1 L21 Y9 AVSS_SATA_8 VSS_12 L7
AA21 VDD33_18_2 CKVDD_1.2V_2 L22 Y11 AVSS_SATA_9 VSS_13 L10

IDE/FLSH I/O
X_Copper X_30L3A-15_0805-RH

CLKGEN I/O
AA22 VDD33_18_3 CKVDD_1.2V_3 L24 Y14 AVSS_SATA_10 VSS_14 L11
C440 AE25 L25 C466 C452 C453 Y17 L12
C672 C674 VDD33_18_4 CKVDD_1.2V_4 AVSS_SATA_11 VSS_15
AA9 AVSS_SATA_12 VSS_16 L14
C10u6.3X50805 C4.7u6.3X5 C2.2u6.3X5 AB9 L16
X_C1u/6.3V/Y5/4 AVSS_SATA_13 VSS_17
AB11 AVSS_SATA_14 VSS_18 M6
X_C1u10Y C1u10Y AB13 M10
AVSS_SATA_15 VSS_19
AB15 AVSS_SATA_16 VSS_20 M11
AB17 AVSS_SATA_17 VSS_21 M13
AC8 M15
VCC_SB POWER 3VDUAL AD8
AVSS_SATA_18
AVSS_SATA_19
VSS_22
VSS_23 N4
AE8 AVSS_SATA_20 VSS_24 N12
L19 PCIE_VDDR CP22 N14
220L2A-50
20 MILS WIDTH S5_3.3V_1 VSS_25
P18 PCIE_VDDR_1 VSS_26 P6
P19 PCIE_VDDR_2 VSS_27 P9
P20 X_Copper P10
PCIE_VDDR_3 VSS_28

A-LINK I/O
C456 P21 A17 C677 A15 P11
C671 C670 C467 PCIE_VDDR_4 S5_3.3V_1 AVSS_USB_1 VSS_29
R22 PCIE_VDDR_5 S5_3.3V_2 A24 B15 AVSS_USB_2 VSS_30 P13
C4.7u6.3X5 R24 B17 C14 P15
PCIE_VDDR_6 S5_3.3V_3 X_C1u10Y AVSS_USB_3 VSS_31
R25 J4 D8 R1

3.3V_S5 I/O
C C1u10Y PCIE_VDDR_7 S5_3.3V_4 CP31 AVSS_USB_4 VSS_32 C
S5_3.3V_5 J5 D9 AVSS_USB_5 VSS_33 R2
C1u10Y C0.1u16Y0402 L1 20 MILS WIDTH S5_3.3V_2 D11 R4
VCC_SB S5_3.3V_6 AVSS_USB_6 VSS_34
S5_3.3V_7 L2 D13 AVSS_USB_7 VSS_35 R9
AVDD_SATA X_Copper

GROUND
D14 AVSS_USB_8 VSS_36 R10
L23 C549 D15 R12
X_30L3A-15_0805-RH AVSS_USB_9 VSS_37
AA14 AVDD_SATA_1
15 MILS WIDTH +1.2VALW C1u10Y E15 AVSS_USB_10 VSS_38 R14
CP27 AB18 F12 T11
C498 AVDD_SATA_4 AVSS_USB_11 VSS_39
AA15 AVDD_SATA_2 F14 AVSS_USB_12 VSS_40 T12

SATA I/O
C493 C486 C485 AA17 G2 G9 T14
AVDD_SATA_3 S5_1.2V_1 AVSS_USB_13 VSS_41

CORE S5
X_Copper X_C0.1u16Y0402C0.1u16Y0402 AC18 G4 C679 H9 U4
C1u10Y AVDD_SATA_5 S5_1.2V_2 C1u10Y USB_PHY AVSS_USB_14 VSS_42
AD17 AVDD_SATA_6 H17 AVSS_USB_15 VSS_43 U14
C10u6.3X50805 AE17 J9 V6
AVDD_SATA_7 CP26 AVSS_USB_16 VSS_44
15 MILS WIDTH J11 AVSS_USB_17 VSS_45 Y21
A10 USB_PHY_1.2V J12 AB1
USB_PHY_1.2V_1 AVSS_USB_18 VSS_46
USB_PHY_1.2V_2 B10 J14 AVSS_USB_19 VSS_47 AB19
X_Copper J15 AB25
C504 C500 AVSS_USB_20 VSS_48
K10 AVSS_USB_21 VSS_49 AE1
3VDUAL C10u10Y0805 K12 AE24
CP23 X_Copper AVDD_USB AVSS_USB_22 VSS_50
K14 AVSS_USB_23
C1u10Y K15
L21 AVSS_USB_24
PCIE_CK_VSS_9 P23
X_30L3A-15_0805-RH A16 AE7 V5_VREF 10 MILS WIDTH 1KR R409 R16
AVDDTX_0 V5_VREF VCC5 PCIE_CK_VSS_10
B16 AVDDTX_1 PCIE_CK_VSS_11 R19
C487 C16 J16 AVDDCK_3.3V T17
C488 C489 C479 C478 AVDDTX_2 AVDDCK_3.3V PCIE_CK_VSS_12
D16 AVDDTX_3
15 MILS WIDTH PCIE_CK_VSS_13 U18
X_C10u6.3X50805 C0.1u16Y0402 D17 K17 AVDDCK_1.2V C546 VCC3 H18 U20
AVDDTX_4 AVDDCK_1.2V PCIE_CK_VSS_1 PCIE_CK_VSS_14
PLL

E17 15 MILS WIDTH C1u10Y J17 V18


C1u10Y AVDDTX_5 PCIE_CK_VSS_2 PCIE_CK_VSS_15
USB I/O

F15 AVDDRX_0 AVDDC E9 +3.3V_AVDDC J22 PCIE_CK_VSS_3 PCIE_CK_VSS_16 V20


C1u10Y C0.1u16Y0402 F17 15 MILS WIDTH K25 V21
AVDDRX_1 D30 PCIE_CK_VSS_4 PCIE_CK_VSS_17
F18 M16 W19

Z
AVDDRX_2 PCIE_CK_VSS_5 PCIE_CK_VSS_18
G15 AVDDRX_3 M17 PCIE_CK_VSS_6 PCIE_CK_VSS_19 W22
B B
G17 AVDDRX_4 M21 PCIE_CK_VSS_7 PCIE_CK_VSS_20 W24
G18 AVDDRX_5 P16 PCIE_CK_VSS_8 PCIE_CK_VSS_21 W25

F9 L17

Y
SB,SB700,A11,FCBGA-528pin AVSSC AVSSCK
Part 5 of 5
S-BAT54A_SOT23 SB,SB700,A11,FCBGA-528pin

VCC3 CP21
AVDDCK_3.3V
L20
X_Copper

X_30L3A-15_0805-RH C469

C2.2u6.3X5

VCC_SB
CP17
AVDDCK_1.2V
L16
X_Copper
C439
X_30L3A-15_0805-RH

C2.2u6.3X5

A A
3VDUAL CP28
+3.3V_AVDDC
L24
X_Copper

X_30L3A-15_0805-RH C512
MICRO-STAR INt'L CO., LTD.
C2.2u6.3X5 Title
SB700-POWER & DECOUPLING
Size Document Number Rev
1.1
MS-7549
Date: Sunday, November 09, 2008 Sheet 21 of 38
5 4 3 2 1
5 4 3 2 1

REQUIRED STRAPS NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK

D PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 LPCCLK0 LPCCLK1 AZ_RST# IMC_GPIO17 IMC_GPIO16 D

VCC3 VCC3 VCC3 VCC3 3VDUAL 3VDUAL 3VDUAL 3VDUAL 3VDUAL

R405 R427 R428 R417 R367 R362 R424 R364 R365


X_2.2KR0402 X_10KR0402 X_10KR0402 X_10KR0402 X_10KR0402 X_10KR0402 X_10KR0402 2.2KR0402 X_2.2KR0402

18,30 TPM_PCLK
18 PCICLK3
18,30 PCICLK4_SIO
18 PCICLK5
18 LPCCLK0
18 LPCCLK1
20,28 AZ_RST#
20 IMC_GPIO17
20 IMC_GPIO16

R420 R401 R429 R423 R366 R361 R425 R372 R368


10KR0402 10KR0402 X_10KR0402 X_10KR0402 10KR0402 10KR0402 10KR0402 X_2.2KR0402 2.2KR0402

C C

PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 LPC_CLK0 LPC_CLK1 AZ_RST# IMC_GPIO17 IMC_GPIO16


ROM TYPE:
WATCHDOG TIMER USE RESERVED RESERVED ENABLE PCI CLKGEN IMC
PULL ON NB_PWRGD DEBUG MEM BOOT ENABLED ENABLED H, H = Reserved
HIGH ENABLED STRAPS
H, L = SPI ROM DEFAULT

WATCHDOG TIMER IGNORE DISABLE PCI CLKGEN IMC L, H = LPC ROM


PULL ON NB_PWRGD DEBUG MEM BOOT DISABLED DISABLED
LOW DISABLED STRAPS DEFAULT L, L = FWH ROM
DEFAULT DEFAULT DEFAULT DEFAULT

B DEBUG STRAPS SB700 HAS 15K INTERNAL PU FOR PCI_AD[30:23] B

PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

USE USE PCI USE ACPI USE IDE USE DEFAULT RESERVED
PULL LONG PLL BCLK PLL PCIE STRAPS
HIGH RESET
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT

PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM


LOW SHORT PCI PLL ACPI PLL PCIE STRAPS
RESET BCLK

A A

MICRO-STAR INt'L CO., LTD.


Title
SB700-STRAPS
Size Document Number Rev
1.1
MS-7549
Date: Friday, November 07, 2008 Sheet 22 of 38
5 4 3 2 1
8 7 6 5 4 3 2 1

3VDUAL
PCI Express Slot x16/x1
PCI EXPRESS 1 Slot-1
R327
换带卡勾的P/N:N11-1640671-L06
+12V PCIE1_X1 +12V
X_4.7KR0402 PCI EXPRESS x16 Slot
PE_WAKE# VCC3
VCC3 +12V B1 A1
C428 +12V PCIE16_X1 3VDUAL 12V PRSNT1_#
B2 12V#B2 12V#A2 A2
X2 X2 B3 RSVD 12V#A3 A3
B1 12V#B1 PRSNT1# A1 B4 GND GND#A4 A4
X_C0.1u16Y0402 B2 A2 SCL1 B5 A5 VCC3
12V#B2 12V SDA1 SMCLK JTAG2
B3 RSVD#B3 12V#A3 A3 B6 SMDATA JTAG3 A6
D B4 GND#B4 GND A4 B7 GND#B7 JTAG4 A7 D
SCL1 B5 A5 B8 A8
20 SCL1 SMCLK JTAG2 3.3V JTAG5
SDA1 B6 A6 B9 A9
20 SDA1 SMDAT JTAG3 JTAG1 3.3V#A9
B7 GND#B7 JTAG4 A7 B10 3.3VAUX 3.3V#A10 A10
VCC3 B8 A8 PE_WAKE# B11 A11 A_RST#
3.3V#B8 JTAG5 WAKE_# PWRGD
B9 JTAG1 3.3V A9 X1 X1
3VDUAL B10 3.3VAUX 3.3V#A10 A10
PE_WAKE# B11 A11 A_RST# B12 A12
20,27 PE_WAKE# WAKE# PWRGD A_RST# 15,18,30 RSVD#B12 GND#A12
B13 GND#B13 REFCLK+ A13 GPPCLK0 7
From Clock Gen C363 C0.1u10X0402 PE0_TXC B14 A14
14 PE0_TX HSOP0+ REFCLK- GPPCLK0# 7
B12 A12 PE0_TXC# B15 A15
RSVD#B12 GND#A12 14 PE0_TX# HSOP0- GND#A15
B13 A13 GFX_CLKP C371 C0.1u10X0402 B16 A16
GND#B13 REFCLK+ GFX_CLKP 7 GND#B16 HSIP0+ PE0_RX 14
GFX_TX0P C402 C0.1u10X0402 GFX_TXC_0P B14 A14 GFX_CLKN PRSNT#1 B17 A17
14 GFX_TX0P HSOP0 REFCLK- GFX_CLKN 7 PRSNT2_# HSIP0- PE0_RX# 14
GFX_TX0N C432 C0.1u10X0402 GFX_TXC_0N B15 A15 B18 A18
14 GFX_TX0N HSON0 GND#A15 GND#B18 GND#A18
B16 A16 GFX_RX0P X2
GND#B16 HSIP0 GFX_RX0P 14 X2
R334 X_0R/4 B17 A17 GFX_RX0N R295 R314
15 SCL0_AUX0P PRSNT2# HSIN0 GFX_RX0N 14
B18 A18 X_0R0402 X_10KR0402
GND#B18 GND#A18

GFX_TX1P C399 C0.1u10X0402 GFX_TXC_1P B19 A19 SLOT-PCI36_WHITE-2PITCH-RH-4


14 GFX_TX1P HSOP1 RSVD
GFX_TX1N C429 C0.1u10X0402 GFX_TXC_1N B20 A20
14 GFX_TX1N HSON1 GND#A20
B21 A21 GFX_RX1P
GND#B21 HSIP1 GFX_RX1P 14
B22 A22 GFX_RX1N
GND#B22 HSIN1 GFX_RX1N 14
GFX_TX2P C400 C0.1u10X0402 GFX_TXC_2P B23 A23
14 GFX_TX2P HSOP2 GND#A23
GFX_TX2N C430 C0.1u10X0402 GFX_TXC_2N B24 A24
14 GFX_TX2N HSON2 GND#A24
B25 A25 GFX_RX2P
GND#B25 HSIP2 GFX_RX2P 14
B26 A26 GFX_RX2N
GND#B26 HSIN2 GFX_RX2N 14 +12V VCC3 +12V VCC3
GFX_TX3P C403 C0.1u10X0402 GFX_TXC_3P B27 A27 3VDUAL 3VDUAL
14 GFX_TX3P HSOP3 GND#A27
GFX_TX3N C433 C0.1u10X0402 GFX_TXC_3N B28 A28
14 GFX_TX3N HSON3 GND#A28
B29 A29 GFX_RX3P X_C0.1u16Y0402
GND#B29 HSIP3 GFX_RX3P 14
B30 A30 GFX_RX3N
RSVD#B30 HSIN3 GFX_RX3N 14

1
C R288 X_0R/4 C383 C460 EC32 C463 C427 C461 C385 C431 C384 C278 C386 C

+
15 SDA0_AUX0N B31 PRSNT2##B31 GND#A31 A31
B32 GND#B32 RSVD#A32 A32
CD470u16EL11.5 X_C0.1u16Y0402 X_C0.1u16Y0402 X_C0.1u16Y0402

2
X_C0.1u16Y0402 X_C0.1u16Y0402 X_C0.1u16Y0402 X_C0.1u16Y0402 X_C0.1u16Y0402 X_0.1u16Y0402
GFX_TX4P C407 C0.1u10X0402 GFX_TXC_4P B33 A33
14 GFX_TX4P HSOP4 RSVD#A33
GFX_TX4N C408 C0.1u10X0402 GFX_TXC_4N B34 A34
14 GFX_TX4N HSON4 GND#A34
B35 A35 GFX_RX4P
GND#B35 HSIP4 GFX_RX4P 14
B36 A36 GFX_RX4N
GND#B36 HSIN4 GFX_RX4N 14
GFX_TX5P C411 C0.1u10X0402 GFX_TXC_5P B37 A37 Placement Close To PCIE16_X1 Placement Between at PCIE_X1
14 GFX_TX5P HSOP5 GND#A37
GFX_TX5N C412 C0.1u10X0402 GFX_TXC_5N B38 A38
14 GFX_TX5N HSON5 GND#A38
B39 A39 GFX_RX5P
GND#B39 HSIP5 GFX_RX5P 14
B40 A40 GFX_RX5N
GND#B40 HSIN5 GFX_RX5N 14
GFX_TX6P C404 C0.1u10X0402 GFX_TXC_6P B41 A41
14 GFX_TX6P HSOP6 GND#A41
GFX_TX6N C434 C0.1u10X0402 GFX_TXC_6N B42 A42
14 GFX_TX6N HSON6 GND#A42
B43 A43 GFX_RX6P
GND#B43 HSIP6 GFX_RX6P 14
B44 A44 GFX_RX6N
GND#B44 HSIN6 GFX_RX6N 14
GFX_TX7P C413 C0.1u10X0402 GFX_TXC_7P B45 A45
14 GFX_TX7P HSOP7 GND#A45
GFX_TX7N C414 C0.1u10X0402 GFX_TXC_7N B46 A46
14 GFX_TX7N HSON7 GND#A46
B47 A47 GFX_RX7P
GND#B47 HSIP7 GFX_RX7P 14
TMDS_HPD0 R350 X_0R/4 PRSNT#2_48 B48 A48 GFX_RX7N
15 TMDS_HPD0 PRSNT2##B48 HSIN7 GFX_RX7N 14
B49 GND#B49 GND#A49 A49

GFX_TX8P C405 C0.1u10X0402 GFX_TXC_8P B50 A50


14 GFX_TX8P HSOP8 RSVD#A50
GFX_TX8N C435 C0.1u10X0402 GFX_TXC_8N B51 A51
14 GFX_TX8N HSON8 GND#A51
B52 A52 GFX_RX8P
GND#B52 HSIP8 GFX_RX8P 14
B53 A53 GFX_RX8N
GND#B53 HSIN8 GFX_RX8N 14
GFX_TX9P C415 C0.1u10X0402 GFX_TXC_9P B54 A54
14 GFX_TX9P HSOP9 GND#A54
GFX_TX9N C416 C0.1u10X0402 GFX_TXC_9N B55 A55
14 GFX_TX9N HSON9 GND#A55
B56 A56 GFX_RX9P
GND#B56 HSIP9 GFX_RX9P 14
B57 A57 GFX_RX9N
B GND#B57 HSIN9 GFX_RX9N 14 B
GFX_TX10P C417 C0.1u10X0402 GFX_TXC_10P B58 A58
14 GFX_TX10P HSOP10 GND#A58
GFX_TX10N C418 C0.1u10X0402 GFX_TXC_10N B59 A59
14 GFX_TX10N HSON10 GND#A59
B60 A60 GFX_RX10P
GND#B60 HSIP10 GFX_RX10P 14
B61 A61 GFX_RX10N
GND#B61 HSIN10 GFX_RX10N 14
GFX_TX11P C419 C0.1u10X0402 GFX_TXC_11P B62 A62
14 GFX_TX11P HSOP11 GND#A62
GFX_TX11N C420 C0.1u10X0402 GFX_TXC_11N B63 A63
14 GFX_TX11N HSON11 GND#A63
B64 A64 GFX_RX11P
GND#B64 HSIP11 GFX_RX11P 14
B65 A65 GFX_RX11N
GND#B65 HSIN11 GFX_RX11N 14
GFX_TX12P C421 C0.1u10X0402 GFX_TXC_12P B66 A66
14 GFX_TX12P HSOP12 GND#A66
GFX_TX12N C422 C0.1u10X0402 GFX_TXC_12N B67 A67
14 GFX_TX12N HSON12 GND#A67
B68 A68 GFX_RX12P
GND#B68 HSIP12 GFX_RX12P 14
B69 A69 GFX_RX12N
GND#B69 HSIN12 GFX_RX12N 14
GFX_TX13P C423 C0.1u10X0402 GFX_TXC_13P B70 A70
14 GFX_TX13P HSOP13 GND#A70
GFX_TX13N C424 C0.1u10X0402 GFX_TXC_13N B71 A71
14 GFX_TX13N HSON13 GND#A71
B72 A72 GFX_RX13P
GND#B72 HSIP13 GFX_RX13P 14
B73 A73 GFX_RX13N
GND#B73 HSIN13 GFX_RX13N 14
GFX_TX14P C409 C0.1u10X0402 GFX_TXC_14P B74 A74
14 GFX_TX14P HSOP14 GND#A74
GFX_TX14N C410 C0.1u10X0402 GFX_TXC_14N B75 A75
14 GFX_TX14N HSON14 GND#A75
B76 A76 GFX_RX14P
GND#B76 HSIP14 GFX_RX14P 14
B77 A77 GFX_RX14N
GND#B77 HSIN14 GFX_RX14N 14
GFX_TX15P C425 C0.1u10X0402 GFX_TXC_15P B78 A78
14 GFX_TX15P HSOP15 GND#A78
GFX_TX15N C426 C0.1u10X0402 GFX_TXC_15N B79 A79
14 GFX_TX15N HSON15 GND#A79
B80 A80 GFX_RX15P
GND#B80 HSIP15 GFX_RX15P 14
TMDS_HPD0 R351 X_0R/4 PRSNT#2_81 B81 A81 GFX_RX15N
PRSNT2##B81 HSIN15 GFX_RX15N 14
B82 RSVD#B82 GND#A82 A82
X1 X1

SLOT-PCI164P_YELLOW-2PITCH-RH

A A

MICRO-START INT'L CO.,LTD.


Title
PCI EXPRESS X16 & X1 SLOT
Size Document Number Rev
Custom MS-7549 1.1
Date: Friday, November 07, 2008 Sheet 23 of 38
8 7 6 5 4 3 2 1
5 4 3 2 1

AD[31..0]
18 AD[31..0]
PCI_CBE#[3..0]
18 PCI_CBE#[3..0]

PCI SLOT 2 (PCI VER: 2.2 COMPLY) 3VDUAL


PCI SLOT 1 (PCI VER: 2.2 COMPLY)
-12V +12V
-12V +12V PCI2
PCI1 B1 A1 R402
-12V TRST#
B1 -12V TRST# A1 B2 TCK +12V A2
D B2 A2 B3 A3 X_2.7KR0402 D
TCK +12V GND TMS PCI_PME#
B3 GND TMS A3 B4 TDO TDI A4
B4 TDO TDI A4 VCC5 B5 +5V +5V A5
B5 A5 B6 A6 PCI_INTF#
VCC5 +5V +5V PCI_INTG# +5V INTA# PCI_INTH# C554
B6 +5V INTA# A6 PCI_INTE# 18 B7 INTB# INTC# A7
18 PCI_INTF# B7 A7 PCI_INTE# B8 A8 X_C0.1u25Y0402-RH
INTB# INTC# PCI_INTG# 18 INTD# +5V VCC5
18 PCI_INTH# B8 INTD# +5V A8 VCC5 B9 PRSNT#1 RESERVED A9
B9 A9 B10 A10 VCC3
PRSNT#1 RESERVED RESERVED#B10 +5V(I/O)
B10 RESERVED#B10 +5V(I/O) A10 B11 PRSNT#2 RESERVED#A11 A11
B11 A11 B12 A12 3VDUAL
VCC3 PRSNT#2 RESERVED#A11 VCC3 3VDUAL GND GND
B12 GND GND A12 B13 GND GND A13
B13 A13 VCC3 B14 A14
GND GND RESERVED#B14 3.3VAUX
B14 RESERVED#B14 3.3VAUX A14 B15 GND RST# A15 PCIRST# 18
B15 GND RST# A15 PCIRST# 18 18 PCICLK1_SLOT2 B16 CLK +5V(I/O)#A16 A16
18 PCICLK0_SLOT1 B16 CLK +5V(I/O)#A16 A16 B17 GND GNT# A17 PCI_GNT#1 18
B17 GND GNT# A17 PCI_GNT#0 18 18 PCI_REQ#1 B18 REQ# GND A18
B18 A18 B19 A19 PCI_PME#
18 PCI_REQ#0 REQ# GND +5V(I/O)#B19 PME#
B19 A19 PCI_PME# AD31 B20 A20 AD30
+5V(I/O)#B19 PME# PCI_PME# 20 AD31 AD30
AD31 B20 A20 AD30 AD29 B21 A21
AD29 AD31 AD30 AD29 +3.3V AD28
B21 AD29 +3.3V A21 B22 GND AD28 A22
B22 A22 AD28 AD27 B23 A23 AD26
AD27 GND AD28 AD26 AD25 AD27 AD26
B23 AD27 AD26 A23 B24 AD25 GND A24 R408
AD25 B24 A24 B25 A25 AD24
AD25 GND R375 +3.3V AD24
B25 A25 AD24 PCI_CBE#3 B26 A26 ID2 AD19
PCI_CBE#3 +3.3V AD24 ID1 AD18 AD23 C/BE#3 IDSEL
B26 C/BE#3 IDSEL A26 B27 AD23 +3.3 A27
AD23 B27 A27 B28 A28 AD22
AD23 +3.3 AD22 AD21 GND AD22 AD20 100R0402
B28 GND AD22 A28 100R0402 B29 AD21 AD20 A29
AD21 B29 A29 AD20 AD19 B30 A30
AD19 AD21 AD20 AD19 GND AD18
B30 AD19 GND A30 B31 +3.3V AD18 A31
B31 A31 AD18 AD17 B32 A32 AD16
AD17 +3.3V AD18 AD16 PCI_CBE#2 AD17 AD16
B32 AD17 AD16 A32 B33 C/BE#2 +3.3V A33
C PCI_CBE#2 B33 A33 B34 A34 PCI_FRAME# C
C/BE#2 +3.3V PCI_FRAME# PCI_IRDY# GND FRAME#
B34 GND FRAME# A34 PCI_FRAME# 18 B35 IRDY# GND A35
PCI_IRDY# B35 A35 B36 A36 PCI_TRDY#
18 PCI_IRDY# IRDY# GND +3.3V TRDY#
B36 A36 PCI_TRDY# PCI_DEVSEL# B37 A37
+3.3V TRDY# PCI_TRDY# 18 DEVSEL# GND
PCI_DEVSEL# B37 A37 B38 A38 PCI_STOP#
18 PCI_DEVSEL# DEVSEL# GND GND STOP#
B38 A38 PCI_STOP# PCI_LOCK# B39 A39
GND STOP# PCI_STOP# 18 LOCK# +3.3V
PCI_LOCK# B39 A39 PCI_PERR# B40 A40
PCI_PERR# LOCK# +3.3V PERR# SMBCLK
18 PCI_PERR# B40 PERR# SMBCLK A40 B41 +3.3V SMBDAT A41
B41 A41 PCI_SERR# B42 A42
PCI_SERR# +3.3V SMBDAT SERR# GND PCI_PAR
18 PCI_SERR# B42 SERR# GND A42 B43 +3.3V PAR A43
B43 A43 PCI_PAR PCI_CBE#1 B44 A44 AD15
+3.3V PAR PCI_PAR 18 C/BE#1 AD15
PCI_CBE#1 B44 A44 AD15 AD14 B45 A45
AD14 C/BE#1 AD15 AD14 +3.3V AD13
B45 AD14 +3.3V A45 B46 GND AD13 A46
B46 A46 AD13 AD12 B47 A47 AD11
AD12 GND AD13 AD11 AD10 AD12 AD11
B47 AD12 AD11 A47 B48 AD10 GND A48
AD10 B48 A48 B49 A49 AD9
AD10 GND AD9 GND AD9
B49 GND AD9 A49 X1 X1 X2 X2
X1 X1 X2 X2
AD8 B52 A52 PCI_CBE#0
AD8 PCI_CBE#0 AD7 AD8 C/BE#0
B52 AD8 C/BE#0 A52 B53 AD7 +3.3V A53
AD7 B53 A53 B54 A54 AD6
AD7 +3.3V AD6 AD5 +3.3V AD6 AD4
B54 +3.3V AD6 A54 B55 AD5 AD4 A55
AD5 B55 A55 AD4 AD3 B56 A56
AD3 AD5 AD4 AD3 GND AD2
B56 AD3 GND A56 B57 GND AD2 A57
B57 A57 AD2 AD1 B58 A58 AD0
AD1 GND AD2 AD0 AD1 AD0
B58 AD1 AD0 A58 B59 +5V(I/O)#B59 +5V(I/O)#A59 A59
B59 A59 ACK64# B60 A60 REQ64#
ACK64# +5V(I/O)#B59 +5V(I/O)#A59 REQ64# ACK64# REQ64#
B60 ACK64# REQ64# A60 B61 +5V +5V A61
B61 +5V +5V A61 B62 +5V +5V A62
B62 +5V +5V A62
VCC5 SLOT-PCI120_WHITE-RH
B B
SLOT-PCI120_WHITE-RH

IDSEL = AD18 ACK64# R438 8.2KR0402 IDSEL = AD19


REQ64# R376 8.2KR0402
MASTER = PCI_REQ#0 MASTER = PCI_REQ#1
PCI_GNT#0 PCI_GNT#1
PCI PULL-UP / DOWN RESISTORS
PCI SLOT DECOUPLING CAPACITORS
VCC3
18 PCI_REQ#0 1 2 VCC3
VCC5 VCC3 3 4
18 PCI_REQ#1

1
RN28

+
18 PCI_REQ#2 5 6
C519 3VDUAL 7 8 X_8P4R-8.2KR EC37
18 PCI_REQ#3
X_C0.1u25Y0402-RH CD1000u63EL11.5-RH

2
C559 C518 C540 R418 X_8.2KR0402
18 PCI_REQ#4
X_C0.1u25Y0402-RH X_C0.1u25Y0402-RH X_C0.1u25Y0402-RH
C1 C558 C557
X_C0.1u25Y0402-RH X_C0.1u25Y0402-RH X_C0.1u25Y0402-RH PCI_DEVSEL# 1 2
18 PCI_DEVSEL# VCC3
C556 C555 PCI_TRDY# 3 4
18 PCI_TRDY#
X_C0.1u25Y0402-RH X_C0.1u25Y0402-RH PCI_IRDY# 5 6 RN29
18 PCI_IRDY#
C527 PCI_FRAME# 7 8 X_8P4R-8.2KR
18 PCI_FRAME#
X_C0.1u25Y0402-RH PCI_SERR# 1 2
18 PCI_SERR#
PCI_PERR# 3 4
18 PCI_PERR#
PCI_LOCK# 5 6 RN30
18 PCI_LOCK#
PCI_STOP# 7 8 X_8P4R-8.2KR
18 PCI_STOP#
A A

18 PCI_INTE# 1 2 VCC3
18 PCI_INTH# 3 4
For EMI 18 PCI_INTF# 5 6 RN27 Micro Star Restricted Secret
7 8 X_8P4R-8.2KR
18 PCI_INTG#
Title Rev
PCI Slot 1 2
1.1
Document Number MS-7549
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Friday, November 07, 2008
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 24 of 38
5 4 3 2 1
5 4 3 2 1

POWER CIRCUIT FOR USB PORT 4,5 POWER CIRCUIT FOR USB PORT 2,3 POWER CIRCUIT FOR USB PORT 0,1 POWER CIRCUIT FOR USB PORT 6,7
USB_LAN VCC5_SB VCC5_SB USB_FR1 VCC5_SB USB_FR2 VCC5_SB
VCC5 C226 X_C10u10Y0805 USB_1394 VCC5 VCC5 C604 X_C10u10Y0805 VCC5

1
EC24 C198 X_C10u10Y0805 C607 X_C10u10Y0805

+
X_CD470u10EL11-2 C593 C597
C218 C185

2
X_C0.1u16Y0402
C0.1u16Y0402 C0.1u16Y0402 X_C0.1u16Y0402
USB_LAN USB_1394 USB_FR1 USB_FR2

1
2

1
2

1
2

1
2
U12 U11 U28 U29
USB_DRV 5 USB_DRV 5 USB_DRV 5 USB_DRV 5

5VSB

5VSB

5VSB

5VSB
5VCC

5VCC

5VCC

5VCC
33 USB_DRV S3# S3# S3# S3#
20 USB_OCP#0 6 OC# VOUT1 7 20 USB_OCP#1 6 OC# VOUT1 7 20 USB_OCP#2 6 OC# VOUT1 7 20 USB_OCP#3 6 OC# VOUT1 7

+1

+1

+1

1
EC23 EC19 EC43 EC41

+
8 CD470u10EL11-2 8 CD470u10EL11-2 8 CD470u10EL11-2 8

GND

GND

GND

GND
USB_EN VOUT2 USB_EN VOUT2 USB_EN VOUT2 USB_EN VOUT2
30 USB_MODE 4 4 4 4

2
D EN EN EN EN D
UP7533AM8_SOT23-8-RH UP7533AM8_SOT23-8-RH UP7533AM8_SOT23-8-RH UP7533AM8_SOT23-8-RH

3
CD470u10EL11-2
Part Number ? UP7533?8

REAR PANEL USB CONNECTOR FOR USB PORT 4,5 FRONT PANEL USB CONNECTOR FOR USB PORT 0,1
USB_FR1
Trace lengths must be less 12 inches USB_FR1
L7 Trace lengths must be less 5 inches
USBP5 5 1 USBP5 USB_LAN USB_LAN D34
20 USBP5

5
USBN5 6 2 USBN5
20 USBN5 LAN_USB1A L27 JUSB2 USBP0 6 4 USBP1
USBP4 7 3 USBP4 5 23 20 USBN1 USBN1 5 1 USBN1 1 2
20 USBP4 PWR GND VCC VCC
USBN4 8 4 USBN4 USBN4 6 24 D16 USBP1 6 2 USBP1 USBN1 3 4 USBN0 USBN0 1 3 USBN1
20 USBN4 USB-5 GND 20 USBP1 USB0- USB1-

5
USBP4 7 USB+ GND 25 USBP1 5 6 USBP0
USB0+ USB1+
GND UP GND
8 26 USBP5 6 4 USBP4 20 USBN0 USBN0 7 3 USBN0 7 8 ESD-IP4220

2
X_CMC-L12-181D017-LF USBP0 8 USBP0 GND GND
1 PWR GND 27 20 USBP0 4 USBOC 10
Match pairs to 50 mil. USBN5 2 28 USBN5 1 3 USBN4
USB-1 GND
USBP5 3 GND 29 X_CMC-L12-181D017-LF H2X5[9]M_COLOR-RH
USB+
GNDDOWNGND
ESD-IP4220
4 30
N31-2051581-H06

2
CONN-RJ45_USBX2_LEDX2-22P-RH
USB0 # &1# swap? for layout
N58-22F0181-S42 NEAR USB CONNECTOR
NEAR USB CONNECTOR Match pairs to 50 mil.
22 / 7.5 / 7.5 / 7.5 / 22 / 7.5 / 7.5 / 7.5 / 22
22 / 7.5 / 7.5 / 7.5 / 22 / 7.5 / 7.5 / 7.5 / 22

FRONT PANEL USB CONNECTOR FOR USB PORT 6,7


C
REAR PANEL USB CONNECTOR FOR USB PORT 2,3 USB_1394 C

Trace lengths must be less 5 inches USB_FR2 USB_FR2


Trace lengths must be less 12 inches
D15

5
USB_1394 USBP3 6 4 USBP2 L26
L6
20 USBN7 USBN7 5 1 USBN7 D35

5
USBP3 5 1 USBP3 USBN3 1 3 USBN2 20 USBP7 USBP7 6 2 USBP7 JUSB1
20 USBP3
USBN3 6 2 USBN3 1 2 USBP6 6 4 USBP7
20 USBN3 VCC VCC
ESD-IP4220 20 USBN6 USBN6 7 3 USBN6 USBN7 3 4 USBN6

2
USBP2 7 USBP2 USBP6 8 USBP6 USBP7 USB0- USB1- USBP6 USBN6 USBN7
20 USBP2 3 20 USBP6 4 5 USB0+ USB1+ 6 1 3
USBN2 8 4 USBN2 7 8
20 USBN2 GND GND
USB1 X_CMC-L12-181D017-LF 10 ESD-IP4220

2
USBOC
X_CMC-L12-181D017-LF 9 11
Match pairs to 50 mil. 5 H2X5[9]M_COLOR-RH
1 5 Match pairs to 50 mil.
USBN3 2 UP 6 USBN2
N31-2051581-H06
USBP3 3 7 USBP2
4 8
1
10
DOWN
12 NEAR USB CONNECTOR
22 / 7.5 / 7.5 / 7.5 / 22 / 7.5 / 7.5 / 7.5 / 22
NEAR USB CONNECTOR

Trace lengths must be less 5 inches USB_FR3 USB_FR3


22 / 7.5 / 7.5 / 7.5 / 22 / 7.5 / 7.5 / 7.5 / 22 USB_FR3

L29
20 USBN9 USBN9 5 1 USBN9 D36

5
20 USBP9 USBP9 6 2 USBP9 JUSB3
1 2 USBP8 6 4 USBP9
USBN8 7 USBN8 USBN9 VCC VCC USBN8
20 USBN8 3 3 USB0- USB1- 4
20 USBP8 USBP8 8 4 USBP8 USBP9 5 6 USBP8 USBN8 1 3 USBN9
B USB0+ USB1+ B
7 GND GND 8
X_CMC-L12-181D017-LF 10 ESD-IP4220

2
USBOC

H2X5[9]M_COLOR-RH
Match pairs to 50 mil.
POWER CIRCUIT FOR USB PORT 8,9, N31-2051581-H06
USB_FR3 VCC5_SB VCC5
VCC5 C609 C10u10Y0805
NEAR USB CONNECTOR
1

EC42
+

C600
CD470u16EL2.5mm
22 / 7.5 / 7.5 / 7.5 / 22 / 7.5 / 7.5 / 7.5 / 22
2

C605 C608
X_C0.1u16Y0402 X_22u/6.3v/X5/8_B
USB_FR3
1
2

U31 X_10u/10v/X5/8_B
USB_DRV 5 USB_FR4 USB_FR4
5VSB
5VCC

S3#
20 USB_OCP#4 6 OC# VOUT1 7
+1

EC44 L28
8 CD470u10EL11-2 USBN11 5 1 USBN11 D32
GND

VOUT2 20 USBN11

5
USB_EN 4 20 USBP11 USBP11 6 2 USBP11 JUSB4
2

EN USBP10 USBP11
1 VCC VCC 2 6 4
20 USBN10 USBN10 7 3 USBN10 USBN11 3 4 USBN10
3

UP7533AM8_SOT23-8-RH USBP10 8 USBP10 USBP11 USB0- USB1- USBP10 USBN10 USBN11


20 USBP10 4 5 USB0+ USB1+ 6 1 3
7 GND GND 8
X_CMC-L12-181D017-LF 10 ESD-IP4220

2
USBOC
H2X5[9]M_COLOR-RH
POWER CIRCUIT FOR USB PORT 10,11 Match pairs to 50 mil.
N31-2051581-H06
USB_FR4 VCC5_SB
VCC5 C606 X_C10u10Y0805

C598
NEAR USB CONNECTOR
A
22 / 7.5 / 7.5 / 7.5 / 22 / 7.5 / 7.5 / 7.5 / 22 A

X_C0.1u16Y0402
USB_FR4
1
2

U30
USB_DRV 5
5VSB
5VCC

S3#
20 USB_OCP#5 6 OC# VOUT1 7
+1

EC40
CD470u10EL11-2
8
MICRO-STAR INt'L CO., LTD.
GND

USB_EN VOUT2
4
2

EN
UP7533AM8_SOT23-8-RH Title
3

USB Conn.
Size Document Number Rev
1.1
MS-7549
Date: Wednesday, November 12, 2008 Sheet 25 of 38
5 4 3 2 1
5 4 3 2 1

VGA CONN BLOCK VCC5 1PS226_SOT23


10 mils GND trace Adding EMI RGB sollution
Y X
D14 W/10 ; S/10 close VGA connector
X_1PS226_SOT23 X_1PS226_SOT23

Z
VCC5 VCC5 VGA_R FB3
15 R VGA_R L5
Y X Y X 120nH/300mA/0.7/6
D8
D11 VCC5 R145

Z
DDC_SCL DDC_SDA 140R1%0402 C154 C153
Y X 7.5 / 15 / 15 C15p50N0402 C22p50N0402

1PS226_SOT23

Z
VCC5 1PS226_SOT23 VCC5 1PS226_SOT23 D13 VGA_G FB2
15 G VGA_G L4
D D
Y X Y X 120nH/300mA/0.7/6

D10 D9 VCC5 R144

Z
HSYNC_A VSYNC_A 150R1%0402 C146 C145
Y X C15p50N0402 C22p50N0402
1PS226_SOT23
D12

Z
VGA_B FB1
15 B VGA_B L3
120nH/300mA/0.7/6
VCC5
10 mils GND trace
R136 C119 X_C0.1u25Y0402-RH R142
W/10 ; S/10 150R1%0402
C138 C134

5
+10KR0402 U8 C15p50N0402 C22p50N0402
VCC
1 A

Y 4 5V_HSYNC
HSYNC# 2 VCC5
15,16 HSYNC# B
GND
NC7SZ08M5X_SOT23-5 7.5 / 15 / 15

3
F1
VCC5 2 1 VGAPWR_FB
C129 X_C0.1u25Y0402-RH
F-MICROSMD110F-RH C98
VGA_DVI1A

5
U10 C0.1u25Y0402-RH

17
U88_1 1 A
VCC

Y 4 5V_VSYNC
15,16 VSYNC# VSYNC# 2 B DDC_SCL 15 5
GND 10
NC7SZ08M5X_SOT23-5 VSYNC_A 14 4

3
9
HSYNC_A 13 3 J_VGA_B
8
DDC_SDA 12 2 J_VGA_G
C HSYNC# R137 X_0R0402 5V_HSYNC 7 C
11 1 J_VGA_R
VSYNC# R139 X_0R0402 5V_VSYNC C120 C103 C111 C116 6
VCC3 VCC5 C47p50N0402

16
X_C470p50X0402 X_C470p50X0402C47p50N0402 C128 C114
VGA_DVI-RH-4

R134 R131 chage to 2.2K for SA C47p50N0402 C47p50N0402


2.2KR0402 R129
X_4.7KR0402 2.2KR0402
Q25

G
15 DDC_DATA DDC_DATA DDC_SDA_R

D
X_N-2N7002_SOT23
RN6
R133 0R0402 5V_VSYNC 1 2 VSYNC_A
5V_HSYNC 3 4 HSYNC_A
VCC3 DDC_SDA_R 5 6 DDC_SDA
DDC_SCL_R 7 8 DDC_SCL

8P4R-33R0402

R130
X_4.7KR0402
Q21

G
15 DDC_CLK DDC_CLK DDC_SCL_R

D
X_N-2N7002_SOT23

R128 0R0402

B B

A A

MICRO-STAR INt'L CO., LTD.


Title
VGA CONN / TVOUT
Size Document Number Rev
1.1
MS-7549
Date: Wednesday, November 12, 2008 Sheet 26 of 38
5 4 3 2 1
5 4 3 2 1

R261 X_0R0402 PCIE_LANRST


30 PCIERST1
VDD33
C259 c268close to PIN63 wide trace: 40mil R199 LAN_RST# R273 0R0402
C222 C1000P50X0402 19 LAN_RST# VDD33 VDD33

VDD33 C259 C0.1U25Y0402-RH AVDD33 R192 330R0402 LINK_100_C

LAN_LINK_UP
L14 L30
LINK_1000 3VDUAL X_180L1500m_90 VDD33 X_600L200m_500-1 AVDD33

GVDD
R218 R209 R195 2 1 2 1
CP3 C258 X_C0.1U25Y0402-RH VDD33 3.6KR0402 X_10KR0402 10KR0402 CP13 CP36
X_Copper U13 VDD33

VDD33

X_C22u6.3X50805-RH
CTRL15_VDD33 R203 X_10KR0402 EECS 1 CS 8
VCC

C0.1U25Y0402-RH
C343
RSET

XTAL2
XTAL1
R201 1 for disable EESK 2 SK 7 X_Copper X_Copper
DC
C22U6.3X50805-RH
C264

C0.1U25Y0402-RH
D C257 2.49KR1%0402 EEDI D
3 DI 6
on board ORG

C358
DVDD15 EEDO 4 DO 5
GND CP14 X_Copper
ROM ONLY 8111C C242
A93C46-10SU-2.7-RH
U14 X_C0.1U25Y0402-RH

65

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
GND

CKTAL2
CKTAL1
VCTRL15
NC18

NC19
VDD15
LED0
LED1
LED2
LED3
VDD33
NC20
NC21
NC22
VDD15
RSET
AVDD33

CTRL18 1 48 EESK
AVDD33 VCTRL18 EESK EEDI
2 AVDD33 EEDI/AUX 47
MDI_0+ 3 46 VDD33
MDI_0- MDIP0 VDD33 EEDO VDD33 L13
4 MDIN0 EEDO 45
AVDD18
C284

AVDD18 EECS X_600L200m_500-1


C0.1U25Y0402-RH

5 AVDD18 EECS 44
MDI_1+ 6 43 XTAL1 C248 C27P50N0402 2 1 EVDD18
MDI_1- MDIP1 VDD15 CP12
7 MDIN1 NC10 42

2
AVDD18 8 41 Y1 R189
AVDD18 MDI_2+ AVDD18 NC11 25MHZ18P_D-4 330R
9 NC4 NC12 40

C0.1U25Y0402-RH
C332

C0.1U25Y0402-RH
C331
MDI_2- 10 39 C220 X_Copper

1
NC5 NC13 XTAL2 C247 C27P50N0402 LAN_ACTLED C1000P/50X/2
11 NC6 NC14 38
MDI_3+ 12 37 VDD33 LAN_LINK_UP
MDI_3- NC7 VDD33 ISOLATEB R246 10K/4

20

19
13 NC8 ISOLATEB 36 VCC5
14 35 R241 20K/4 LAN_USB1B
NC9 NC15
15 34
LANWAKEB

VDD15 NC16

REFCLK_N
REFCLK_P
VDD33 16 33 C323
VDD33 NC17
PERSTB

EVDD18

EVDD18
X_C0.1U25Y0402-RH MDI_3- 9
VDD15

HSON
EGND

EGND
HSOP
MDI_2- 10
HSIN
HSIP
NC1
NC2

NC3
MDI_1-

9
11
MDI_0-
Power domain chart 12
13
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
RTL8111C-VCO-GR 14
MDI_3+ 15
RTL8111B /

16
C MDI_2+ C
16

C235 X_C1000P/50X/2
RTL8101E MDI_1+ 17
LANEGND

R188
EVDD18 EVDD18 MDI_0+ 18

3.3V RX_LANN C334 C0.1U10X0402


AVDD33 RX_LANP C333 C0.1U10X0402
RX_LANN1 14
RX_LANP1 14 AVDD18 DVDD15
CONN-RJ45_USBX2_LEDX2-22P-RH
CK_PE_100M_LAN# 7

22

21
AVDD18 1.8V LINK_100_C CP11
CK_PE_100M_LAN 7
LINK_1000
TXLANN1 14
TXLANP1 14
EVDD18 1.8V PCIE_LANRST X_Copper
C237 C231
PE_WAKE# 20,23 C1000P/50X/2 C1000P/50X/2
DVDD15 1.5V
For 8111C only
LANEGND

Q18 Q20 R169 R184 R167 R170 R160 R205 R164 R188 R186 R177 R175 R470 R472 L22 R471 C601 C186 C187 CHOKE
RTL8101E N/A N/A Need Need 2K N/A Need Need Need Need Need Need Need Need N/A N/A N/A N/A N/A N/A
For 8111C only
AVDD18

RTL8111B Need Need N/A N/A 2.49K Need N/A N/A N/A N/A N/A N/A N/A Need N/A N/A N/A N/A Need Need CTRL18 1 2 AVDD18

C0.1U25Y0402-RH
C310

C22U6.3X50805-RH
C298
X_C22U6.3X50805-RH
C321
L8
RTL8111B Need Need N/A N/A 2.49K Need N/A N/A N/A N/A N/A N/A N/A N/A Need Need Need Need N/A N/A CH-4.7uh/1.24A

C1U16Y
C316
B
C285 can't be stuffed B
otherwise causing energy
star issue
8101E 8111B 8111C
DVDD15 AVDD18
C308 X_C1U16Y Giga-Lan 10/100-Lan
C262 VDD33 16,37,46,53 16,37,46,53 VDD33 16,37,46,53
C0.1U25Y0402-RH N58-22F0181-S42 N58-22F0201-S42
C260 C319
C0.1U25Y0402-RH X_C0.1U25Y0402-RH
AVDD33 2 2,59 AVDD33 2,59 Link Yellow Link Yellow
C263 C304 Active Blinking Active Blinking
C0.1U25Y0402-RH C0.1U25Y0402-RH 1000 Orange 100 Green
C286 C292
AVDD18 5,8 5,8,11,14 AVDD12 8,11,14,58 100 Green 10 None
C0.1U25Y0402-RH C0.1U25Y0402-RH 10 None
C293
C0.1U25Y0402-RH
EVDD18 22,28 22,28 EVDD12 22,28 19 19
C303 VDD33
C0.1U25Y0402-RH
C330 C359 VDD15 15,21,43,49,58 15,21,32,33,38,41,43,49,52,58 DVDD12 21,32,38,43,49,52 20 Yellow 20 Yellow
C0.1U25Y0402-RH C10U10Y0805
C329 Orange
C0.1U25Y0402-RH GND 65 65 GND 65 21 21
C324 C309
C0.1U25Y0402-RH X_C0.1U25Y0402-RH
C327 C280
AGND 25,31 25,31 AGND 25,31 22 Green 22 Green
C0.1U25Y0402-RH X_C0.1U25Y0402-RH
C261
X_C0.1U25Y0402-RH

A A

Micro Star Restricted Secret


Title Rev
RTL8111C 1.1
Document Number MS-7549
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Tuesday, November 11, 2008
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 27 of 38
5 4 3 2 1
5 4 3 2 1

883 :B09-LC88304-R09 CLOSE TO


ALC888 JACK
ALC888 CODEC 888: B09-LC88804-R09
861D:B09-LC86124-R09
CONNECTOR
AUDIO1A (Upper)
LINE1_1R 1KR0402 R281 LINE1_1R_R 10
LINE1_JD 11
SURRBACK_L C586 C10u6.3X0805 SURR_BL LFEO C580 C10u6.3X0805 LFE_OUT 12
LINE1_1L 1KR0402 R280 LINE1_1L_R 13
SURRBACK_R C588 C10u6.3X0805 SURR_BR CENO C579 C10u6.3X0805 CENTER_OUT 18
SUR_O_R C584 C10u6.3X0805 SURR_OUTR
AUDIO1B (Middle)
D R434 20KR1%0402 LINE_FOUTR R277 75R0402 LINE_FOUTR_R 6 D
FRONT_JD 7
SPDIFO SUR_O_L C583 C10u6.3X0805 SURR_OUTL 8
VCC3 LINE_FOUTL R286 75R0402 LINE_FOUTL_R 9
Trace Width 20mils. +5VR 17

C10u10Y0805
C582

C0.1u25Y0402-RH
C578
X_C0.1u25Y0402-RH
C550

C10u10Y0805
C576

C0.1u25Y0402-RH
C572
AUDIO1C (Down)
U26 MIC1_R R275 1KR0402 MIC1_R_R

48
47
46
45
44
43
42

41
40
39

38
37
1
ALC888/LQFP48 MIC1_JD 2 14
EC45 1+ 2 CD10u25EL5-RH LINE_FOUTR 4 15

SPDIFO

SURR-OUT-R

L1_REFR
SPDIFI
SURR_BR

SURR-OUTL
SURR_BL
LFE-OUT
CEN-OUT
AVSS2

JDREF/JD3

AVDD2
36 FR_OUTR MIC1_L R276 1KR0402 MIC1_L_R 5 16
FR-OUTR FR_OUTL EC46 1+
FR-OUTL 35 2 CD10u25EL5-RH LINE_FOUTL 3

R385

R386

R454

R447

R387

R388
1 DVDD1 +5VR

C470p50X0402
C352

C470p50X0402
C351

C470p50X0402
C357

C470p50X0402
C360

C470p50X0402
C346

C470p50X0402
C348
2 34 SENSE_B
XTL_IN SENSEB/FMIC1 R430 X_10KR0402
3 XTL_OUT VREFOUT2 33
4 Only stuff for 883
DVSS1

X_22KR0402

X_22KR0402

22KR0402

22KR0402

X_22KR0402

X_22KR0402
32 MIC1_VREFO_R
MIC1_REFR/FMIC2 LINE2_VREFO
20 AZ_SDATA_OUT 5 SDATA_OUT L2_REF/JD4 31
20 AZ_BIT_CLK 6 BIT_CLK
7 30 MIC2_VREFO
R411 22R0402 ACSDIN0 DVSS2 MIC2_REF/AFILT2
20 AZ_SDATA_IN0 8 SDATA_IN L1_REFL/AFILT1 29
9 DVDD2
10 28 MIC1_VREFO_L AUDIO2A (Upper)
20 AZ_SYNC SYNC MIC1_REFL
11 SURR_OUTR R278 75R0402 SURR_OUTR_R 10
20,22 AZ_RST# RESET#
12 27 SURR_JD 11
PC_BEEP VREF
12
LINE2R/AUXR
LINE2L/AUXL
C566 26 SURR_OUTL R289 75R0402 SURR_OUTL_R 13
AVSS1

MIC2R/JD1
MIC2L/JD2

C10u6.3X50805
C536

C0.1u25Y0402-RH
C544
X_C22p50N0402 25 18
AVDD1 +5VR
SENSEA

CD-GND
C C

MIC2R
MIC1L

LIN1R

C0.1u25Y0402-RH
C535
LIN1L
CD-R
CD-L
AUDIO2B (Middle)
LFE_OUT R279 75R0402 LFE_OUT_R 6
CEN_JD 7
13

14
15

16
17

18
19
20

21
22

23
24
8
SENSE_A CENTER_OUT R290 75R0402 CENTER_OUT_R 9
CD_GND_C

17
LINE2_L LIN1R C521 C4.7U6.3X50805 LINE1_1R
CD_R_C
CD_L_C

LINE2_R
CD/IN HEADERS AUDIO2C (Down)
MIC2_L LIN1L C522 C4.7U6.3X50805 LINE1_1L SURRBACK_R R272 75R0402 SURRBACK_R_R 1
CD1 MIC2_R SURRBACK_JD 2 14
MIC1_IN_R C523 C4.7U6.3X50805 MIC1_R 4 15
5 1 7 8 CD_L C528 C1u16Y SURRBACK_L R271 75R0402 SURRBACK_L_R 5 16

R449
2 5 6 MIC1_IN_L C524 C4.7U6.3X50805 MIC1_L 3

R440

R436

R435

R446

R441
3 3 4 CD_GND C526 C1u16Y

C470p50X0402
C349

C470p50X0402
C362

C470p50X0402
C350

C470p50X0402
C361

C470p50X0402
C340

C470p50X0402
C341
4 1 2 CD_R C525 C1u16Y MIC1_VREFO_L R413 4.7KR0402
8
6
4
2

X_22KR0402
RN38 MIC1_VREFO_R R422 4.7KR0402

X_22KR0402

X_22KR0402

X_22KR0402

X_22KR0402

X_22KR0402
BH1X4_BLACK-RH 8P4R-10KR0402 RN40

C0.1u25Y0402-RH
C552

C0.1u25Y0402-RH
C571
8P4R-47KR0402
7
5
3
1

LINE_IN SURR

B
ALC883 JACK DETECT R456 靠近JAUD1 SPDIF_OUT VCC5
LINE_OUT CEN/BAS B

SENSE_B R433 5.1KR1%0402 SURRBACK_JD

SENSE_A R421 5.1KR1%0402 FRONT_JD R431 10KR1%0402 CEN_JD C587


R452 47R0402 FR-IO-SEN X_C1u16Y JSP1 MIC1 SIDESURR
BH1X3_BLACK-RH
R406 10KR1%0402 LINE1_JD R451 X_20K/4/1% MIC2_JD 1
R426 20KR1%0402 MIC1_JD SPDIFO R432 10R0402 SPDIFO_R 2
R412 39.2KR1%0402SURR_JD R453 X_39.2K/4/1% LINE2_JD 3

C567
PN:N54-26F0151-S42
MIC2_VREFO X_100p/50v/N/4
Z

D39
S-BAT54A_SOT23
D40
Azalia Front Audio Connector
Y For EMI
X

LINE2_VREFO Z AUDIO CODE REGULATORS


X Place those component close to audio connector. VCC5_SB +5VR C388 X_C0.1u25Y0402-RH
+5VR
8
6
4
2

+12V

A
S-BAT54A_SOT23 RN37 JAUD1 Trace Width 30mils.
8P4R-4.7KR0402 YJ205-IA D37 R294 X_0R0402
C589 C4.7u10X50805-RH R460 U27 D31 S-1N5817_DO214AC C514 X_C0.1u25Y0402-RH
7
5
3
1

MIC2_L MIC2_L_R 1KR0402 R463 FRONT_MIC 1 2 X_10KR0402 LT1087S_SOT89 S-1N5817_DO214AC

C
MIC GND
3 VIN VOUT 2 A C
MIC2_R MIC2_R_R 1KR0402 R462 MIC_VREF 3 4 FRONT_IO#
MICPWR PRESENCE#
X_0.1u/25v/Y5/4
C581

A C590 C4.7u10X50805-RH CP41 A


ADJ
C10u16X51206-RH
C585

C1000p50X0402
C592
5 6 MIC2_JD R444 R461 0R0402
FLINE OUTR LINE NEXT R

C10u10Y0805
C603
EC39 CD100u16EL5-RH 100R1%0402
LINE2_R 1+ 2 LINE2_R_R R465 75R0402 LINE_OUT_R 7 8 X_Copper
1

FR-IO-SEN HPON
LINE2_L 1+ 2 LINE2_L_R R464 75R0402 LINE_OUT_L 10 LINE2_JD
EC38 CD100u16EL5-RH
9 FLINE OUTL LINE NEXT L <OrgAddr1> MICRO-STAR INt'L CO., LTD.
2
4
6
8

7
5
3
1

R459 R457 R442 Title


RN39 R458 CN7 39.2KR1%0402 20KR1%0402 348R1%0402
8P4R-22KR X_0R/4 8p4C-470p50N
ALC888 CO-LAY ALC883 CODEC
Size Document Number Rev
1
3
5
7

8
6
4
2

MS-7549 1.1
Date: Monday, November 10, 2008 Sheet 28 of 38
5 4 3 2 1
5 4 3 2 1

F-MICROSMD110F-RH
VCC5 L33 DVI CONNECTOR
DVIFS1 X_600L200m_500-1
1 2 2 1 HDMI5V
CP42 VGA_DVI1B

1
+
EC2 C59 25
X_10u/16v/4X5.2/1.5mm X_Copper 0.1u/25v/Y5/4 Shell

2
DVI_TXD00+ DVI_TXD01+ DVI_TXD02- D1
DVI_TXD02+ DATA2
Reserved for rear USB power D2 DATA2
VCC3 D3
R471 R474 TXD11N SHIELD24
15 TXD11N D4 DATA4
X_110R0402 X_110R0402 15 TXD11P TXD11P D5
Q28 X_N-2N7002_SOT23 DVI_DDC_CLK_R DATA4
D6 DDCCLK

G
DVI_TXD00- DVI_TXD01- 15 DVI_DDC_CLK R171 R156 DVI_DDC_DATA_R D7

D
D DDCDATA D
2.2KR0402 2.2KR0402 D8
R149 0R/4 DVI_TXD01- NC
D9 DATA1
DVI_TXD02+ DVI_TXC+ DVI_TXD01+ D10
R157 DVI_DDC_CLK_R DATA1
D11 SHIELD13
R168 DVI_DDC_DATA_R TXD10N D12
R477 R468
Shiner_Rev2.3c VCC3 15 TXD10N
TXD10P D13
DATA3
15 TXD10P DATA3

X_C10p50N0402

X_C10p50N0402
X_110R0402 X_110R0402 R153 0R/4 HDMI_DDC_CLK_R HDMI5V D14
Q33 R161 0R/4 HDMI_DDC_DATA_R VCC5
D15 GND5

C172

C161
DVI_TXD02- DVI_TXC- X_N-2N7002_SOT23 DVI_HOT_DET D16 HPDET

G
15 DVI_DDC_DATA DVI_TXD00- D17

D
DVI_TXD00+ DATA0
D18 DATA0
R165 0R/4 D19
HDMI_TXD00+ HDMI_TXD01+ VCC3 TXD12N SHIELD05
15 TXD12N D20 DATA5
15 TXD12P TXD12P D21 DATA5
D22 SHIELDCLK
R104 R111 DVI_TXC+ D23

C
Q29 DVI_TXC- CLK
X_220R0402 X_220R0402 D24 CLK
N-2N3904_SOT23 B R160 200K/4 DVI_HOT_DET
HDMI_TXD00- HDMI_TXD01- 26

C
Q35 R170 200K/4 HDMI_HOT_DET Shell1
R163

E
B C115 X_0.1u/25v/Y5/4
HDMI_TXD02+ HDMI_TXC+ C173 C166 VGA_DVI-RH-4
15 TMDS_HPD2

E
X_C470p50X0402
R109 R99 33R0402 R162
X_220R0402 X_220R0402 10K/4
VCC3
HDMI_TXD02- HDMI_TXC- N-2N3904_SOT23 X_C470p50X0402 TXD01P R473 X_0R0402 DVI_TXD01+
TXD01N R472 X_0R0402 DVI_TXD01-
R120 X_0R TXD02P R476 X_0R0402 DVI_TXD02+
TXD02N R475 X_0R0402 DVI_TXD02-

X_C1u6.3Y0402-RH

X_C1u6.3Y0402-RH
D7

C4.7u6.3X5-1

C4.7u6.3X5-1
TXD10N TXD11N
C C

C68

C92

C701

C700
TXD00P R470 X_0R0402 DVI_TXD00+
TXD00N R469 X_0R0402 DVI_TXD00-
R495 R493 S-BAS40WS_SOD323-RH TXC0P R467 X_0R0402 DVI_TXC+
X_110R/4 X_110R/4 TXC0N R466 X_0R0402 DVI_TXC-

TXD10P TXD11P

16
18
20
30
40
42
U7 HDMI CONNECTOR

2
8
DVI

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
TXD12N 38 DVI_TXC- CONN-HDMI19P_BLACK-RH-10
D0+A DVI_TXC+ HDMI1
D0-A 37
SHELL1 21
R494 15 TXC0N TXC0N 3 36 DVI_TXD01+ HDMI_TXD02+ 1 D2+
TXC0P D0+ D1+A DVI_TXD01-
X_110R/4 15 TXC0P 4 D0- D1-A 35 2 D2 Shield
HDMI_TXD02- 3 D2-
TXD12P 15 TXD01P TXD01P 6 34 DVI_TXD02+ HDMI_TXD01+ 4 D1+
TXD01N D1+ D2+A DVI_TXD02-
15 TXD01N 7 D1- D2-A 33 5 D1 Shield
HDMI_TXD01- 6 D1-
SEL spec. H:>2.67V L:<2.13V 32 DVI_TXD00+ HDMI_TXD00+ 7 D0+
D3+A DVI_TXD00-
D3-A 31 8 D0 Shield
HDMI_SEL_R 9 HDMI_TXD00- 9 D0- MEC1
SEL HDMI_TXC+
GND 29 HDMI_TXC-_F
10 CK+
11 CK Shield
TXD02P D0+B HDMI_TXC+_F HDMI_TXC-
15 TXD02P 11 D2+ D0-B 28 12 CK-
15 TXD02N TXD02N 12 13 CE Remote
D2- HDMI_TXD01+_F
D1+B 27 14 NC
26 HDMI_TXD01-_F HDMI_DDC_CLK_R 15 DDC CLK
TXD00P D1-B HDMI_DDC_DATA_R
15 TXD00P 14 D3+ 16 DDC DATA
15 TXD00N TXD00N 15 25 HDMI_TXD02+_F 17 GND
D3- D2+B HDMI_TXD02-_F HDMI5V
D2-B 24 18 +5V
VCC3 HDMI_HOT_DET 19 HP DET
SWAP 23 HDMI_TXD00+_F SWAP SHELL2 20
ZHU1104 D3+B HDMI_TXD00-_F ZHU1104
D3-B 22

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B R154 B
1.8KR0402
N5I-19M0161-L06
1
5
10
13
17
19
21
39
41
43
HDMI_SEL_R PI3HDMI412FT-BZHE_TQFN42-RH

C699 U2:I94-3H4121C-P22
R152 X_0.1u/16v/Y5/4 VCC_15
1.5KR0402-1
VCC5 RN51
HDMI_TXD02+_F 1 2 HDMI_TXD02+
HDMI_SEL VCC3 UP7707M5-00_SOT23-5-RH HDMI_TXD02-_F 3 4 HDMI_TXD02-
C60 U5 R95 HDMI_TXD00+_F 5 6 HDMI_TXD00+
C4.7u6.3X5-1

1u/6.3v/Y5/4 1 VIN 130R1%0402 VCC_15 HDMI_TXD00-_F HDMI_TXD00-


VCC5_SB VOUT 5 7 8
C55

R91 8P4R-0R
R166 10KR0402 C64 C67 C75 C702 C72

GND
X_10KR0402 3 EN X_0.1u/16v/Y5/4
C4.7u6.3X5-1 X_0.1u/16v/Y5/4
X_0.1u/16v/Y5/4
X_C4.7u6.3X5-1

FB
R150 R159 RN52
X_2.2KR0402 10KR0402 HDMI_SEL HDMI_TXC-_F 1 2 HDMI_TXC-

4
HDMI_HOT_DET Q34 R93 HDMI_TXC+_F 3 4 HDMI_TXC+
D
HDMI_CTL G 147R1%0402 HDMI_TXD01+_F 5 6 HDMI_TXD01+
S R158 HDMI_TXD01-_F 7 8 HDMI_TXD01-
Q27 X_N-2N7002_SOT23 150KR0402
D
DVI_HOT_DET G VCC_15=0.8(1+1.3/1.47)=1.507 8P4R-0R
S
ADD FOR EMI
R151 2.2KR0402 N-2N7002_SOT23 ZHU1104
R148
150KR0402

0R0402
R164 CFG :CFG: RS780-no1394: mount DVI connector
HDMI_CTL HDMI_SEL
A A
Truth Table Configration
30 B_ID0 R169 HDMI_SEL
L Dx to DxA HDMI default: R825,Q102,Q101,R823,R824stuff
0R0402 SEL
DVI default: R826,Q102,R822,R823 stuff MICRO-STAR INt'L CO., LTD.
H Dx to DxB
Title
HDMI / DVI CONNECTOR
Size Document Number Rev
1.1
MS-7549
Date: Wednesday, November 12, 2008 Sheet 29 of 38

5 4 3 2 1
5 4 3 2 1

PARALLAL PORT

Super I/O VCC5


D38
5V_PR SLCT
PE
7
5
CN5
8
6 8p4C-220p50N
BAS32L_LL34 BUSY 3 4
ACK# 1 2
RN35
LPC SUPER I/O F71882 JLPT1 P_PD7 1 10 CN6
STB# 1 2 AFD# P_PD6 2 9 ACK# P_PD4 1 2
P_PD0 3 4 ERR# P_PD5 3 8 BUSY P_PD5 3 4 8p4C-220p50N
VCC3 P_PD1 5 6 INIT# P_PD4 4 7 PE P_PD6 5 6
P_PD2 7 8 S_SLIN# 5 6 SLCT P_PD7 7 8
U21 P_PD3 9 10
D D
A_RST# 29 7 DRVDEN0 P_PD4 11 12 10P8R-2.2KR CN4
15,18,23 A_RST# LRESET# DENSEL#
R359 LPC_DRQ#0 30 17 INDEX# P_PD5 13 14 STB# 1 2
18 LPC_DRQ#0 LDRQ# INDEX#
X_4.7KR0402 SERIRQ 31 8 MOA# P_PD6 15 16 RN34 P_PD0 3 4
18 SERIRQ SERIRQ MOA#
LPC_FRAME# 32 9 DSA# P_PD7 17 18 INIT# 1 10 AFD# 5 6 8p4C-220p50N
18 LPC_FRAME# LFRAM# DRVA#
LPC_FRAME# PCICLK4_SIO 38 11 DIR# ACK# 19 20 S_SLIN# 2 9 STB# P_PD1 7 8
18,22 PCICLK4_SIO PCICLK DIR#
SIO_CLK 39 12 STEP# BUSY 21 22 P_PD3 3 8 P_PD0
7 SIO_CLK CLKIN STEP#
10 WRDATA# PE 23 24 P_PD2 4 7 AFD# CN3
LPC_AD0 WDATA# WE# SLCT P_PD1 INIT#
18 LPC_AD[3..0] 33 LAD0 WGATE# 14 25 5 6 7 8
LPC_AD1 34 16 TRACK0# S_SLIN# 5 6 8p4C-220p50N
LPC_AD2 LAD1 TRK0# WP# BH2X13_BLACK-RH 10P8R-2.2KR P_PD3
35 LAD2 WPT# 18 3 4
LPC_AD3 36 15 RDDATA# P_PD2 1 2
LAD3 RDATA# HEAD#
HDSEL# 13
3VDUAL 47 19 DSKCHG# R445
VIDIN5/OUT5/SID DSKCHG# ERR# ERR# C601
46 VIDIN4/OUT4
45 VIDIN3/OUT3
44 100 SLCT 2.2KR0402 C100p50N0402
4.7KR0402 VIDIN2/OUT2 SLCT PE
43 VIDIN1/OUT1 PE 101
R342 42 102 BUSY
VIDIN0/OUT0 BUSY ACK#
ACK# 103
54 104 S_SLIN#
25 USB_MODE
53
VIDOUT5/GPIO5/SIC SLIN#
105 INIT# SERIAL PORT 1
VIDOUT0/GPIO4 INIT# ERR#
52 VIDOUT0/GPIO3 ERR# 106
GPIO2_SEL 51 107 AFD# U23 C510 X_C0.1u25Y0402-RH
GPIO1_SEL VIDOUT0/GPIO2 AFD# STB#
50 VIDOUT0/GPIO1 STB# 108
GPIO0_SEL 49 109 P_PD0 20 1 +12VCOM
VIDOUT0/GPIO0 PD0 VCC5 VCC VDD +12V
110 P_PD1 NRIA# 2 19 RIA# D28 1N4148
4.7KR0402 R341 PD1 P_PD2 NCTSA# RA1 RY1 CTSA#
3VDUAL 55 SLOTOCC#/GPIO06 PD2 111 3 RA2 RY2 18
56 112 P_PD3 NDSRA# 4 17 DSRA#
GPIO07/Turbo1#/WDTRST# PD3 P_PD4 NSINA RA3 RY3 SINA
57 VSI/SST PD4 113 7 RA4 RY4 14
58 114 P_PD5 NDCDA# 9 12 DCDA#
VSO PD5 P_PD6 RA5 RY5
PD6 115
93 116 P_PD7 RTSA# 16 5 NRTSA
5VSBIN VIN6 PD7 DTRA# DA1 DY1 NDTRA
94 VIN5 15 DA2 DY2 6
C VCC3 95 SOUTA 13 8 NSOUTA C
5VIN VIN4 DA3 DY3 -12VCOM D29 1N4148
96 VIN3 IRTX/GPIO42 27 11 GND VSS 10 -12V
+12VIN_IO 97 28
CPUVCORE VIN2 IRRX/GPIO43 DCDA# X_C0.1u25Y0402-RH
98 118 GD75232_SSOP20
Vcore(VIN1) DCD1# RIA# C509
RI1# 119
C472 C473 C389 21 120 CTSA#
31 CPU-FAN FANIN1 CTS1#
22 121 DTRA#
31 CPU-FANPWM FAN_CTL1 DTR1#/FAN60_100
23 122 RTSA# JCOM1 NRIA# 1 2
31 SYS-FAN1 FANIN2 RTS1#/VIDOUT_TRAP
24 123 DSRA# NDCDA# 1 2 NSINA NCTSA# 3 4
31 SIO_SYS1_FAN FAN_CTL2 DSR1# SOUTA NSOUTA NDTRA NDSRA# CN1
25 FANIN3/GPIO40 SOUT1/Config4E_2E 124 3 4 5 6
C0.1u25Y0402-RH X_C0.1u25Y0402-RH 26 125 SINA 5 6 NDSRA# NRTSA 7 8 8p4C-330p50N
X_C0.1u25Y0402-RH SYS_TMP FAN_CTL3*/GPIO41 SIN1 NRTSA NCTSA#
89 D3+ (System) DCD2 126 7 8
CPU_TMP_2 90 127 NRIA# 9 NDTRA 1 2
THERMDA_CPU D2+ RI2# NSINA
8 THERMDA_CPU 91 D1+(CPU) CTS2# 128 3 4
TMP_VREF 92 1 H2X5[10]M_BLACK-RH NSOUTA 5 6 CN2
VREF DTR2#/FWH_TRAP RTSB# NDCDA# 8p4C-330p50N
RTS2#/HPWM_DC 2 7 8
TMP_VREF 79 3
20 LPC_PME# PME#/GPIO25 DSR2#
SOUT2/SPI_TRAP 5
29 B_ID0 59 GPIO10/SPI_SLK/ FANIN4 SIN2 6
C382 THERMDC_CPU_R 60 66
GPIO11/SPI_CS0#/FANCTL4 GPIO17
61 GPIO12/SPI_MISO/FANCTL1_1
62 PIO13/SPI_MOSI/BEEP
X_C0.1u25Y0402-RH 63 40
GPIO14/FWH_DIS/WDTRST#/SPI_CS1# KBRST# KBRST# 20
GA20 41 A20GATE 20
TALERT# KBDAT VCC5
8,19 TALERT# 67 OVT# KDATA 69
70 KBCLK
KBDATA 34 FLOPPY CONNECTOR
KCLK KBCLK 34
LED1 64 71 MSDAT
GPIO15/LED_VSB/ALERT# MDAT MSDATA 34
C707 is reserved for decoupling TMP_VREF LED2 65 72 MSCLK RDDATA# 1 2 FDD1
GPIO16/LED_VCC/Turbo2# MCLK MSCLK 34
74 WP# 3 4 RN36
PCIRST1#/GPIO20 TRACK0# 8P4R-1KR0402 DRVDEN0
27 PCIERST1 75 PCIRST2#/GPIO21 VSB 68 3VDUAL 5 6 1 2
76 86 VBAT INDEX# 7 8 3
PCIRST3#/GPIO22 VBAT DSKCHG#
7,20,33,34 FP_RST# 77 GPIO23/RSTCON# VCC 4 VCC3
78 37 R363 1KR0402 7 8 INDEX#
32,33,34 ATX_PWROK ATXPG_IN/GPIO24 VCC 3VDUAL VCC3
B 84 99 9 10 MOA# B
PWROK/GPIO32 VCC C393 C394
Chasiss Intrusion 34 PSIN 80
81
PWSIN#/GPIO26
20 C0.1u25Y0402-RH C0.1u25Y0402-RH
11
13
12
14 DSA#
20 PWRBTIN# PWSOUT#/GPIO27 GND JTPM1
20,33 SLP_S3# 82 S3#/GPIO30 GND 48 15 16
VBAT ATX_PSON# 83 73 1 2 17 18 DIR#
33,34 ATX_PSON# PSON# /GPIO31 GND 18,22 TPM_PCLK
RSMTST_IO 85 117 A_RST# 3 4 19 20 STEP#
20 RSMTST_IO RSMRST# /GPIO33 GND
CHASSIS 87 88 THERMDC_CPU_R LPC_AD0 5 6 SERIRQ 21 22 WRDATA#
COPEN# AGND(D-) THERMDC_CPU 8
LPC_AD1 7 8 VCC5 23 24 WE#
R309 8P4R-4.7KR0402 F71882FG LPC_AD2 9 25 26 TRACK0#
2MR RN23 VCC5_SB CP40 LPC_AD3 11 12 27 28 WP#
JCI1 ATX_PSON# 1 2 LPC_FRAME# 13 14 29 30 RDDATA#
1 CHASSIS 3VDUAL 3 4 FP_RST# 31 32 HEAD#
2 5 6 PWRBTIN# X_Copper H2X7[10]M-2PITCH_BLACK-RH 33 34 DSKCHG#
N31-1020011-C09 7 8 RSMTST_IO
H1X2M_BLACK-RH
BH2X17[4][5][6]_BLACK-RH

3VDUAL R317
LPC I/O STRAPPING RESISTOR VCC5 Thermal Resistor
GPIO0_SEL R318
LED 5VIN 10KR1%0402
R343 1KR0402 DTRA# R487 X_4.7KR0402 R488 X_4.7KR0402 R304 100KR1% +12VIN_IO
+12V
GPIO1_SEL 47KR1%0402-RH VCCP
R347 X_1KR0402 SOUTA R315
R489 X_4.7KR0402 R490 X_4.7KR0402 CPUVCORE
R345 1KR0402 RTSA# GPIO2_SEL 3VDUAL VCC5_SB
R319 10KR0402
R360 X_1KR0402 RTSB# R491 X_4.7KR0402 R492 X_4.7KR0402 VCC5_SB C391
X_10KR1%0402 THERMDA_CPU THERMDC_CPU_R
5VSBIN R308 X_47KR1%0402-RH R316
8P4R-4.7KR0402 R331 R333 C2200p50X0402 10KR1%0402
RN24 330R 330R
TMP_VREF
A Don't STUFF STUFF GPIO1 GPIO0
1
3
2
4
Q53
R320 R309 change
A

RTSB# PWM FAN LINEAR FAN 780G +SB700( HDMI+DVI) 1 1 LED1 5 6 2 6 SUS_LED 34 from 5% to1%
LED2 7 8 1 P-MMBT3906LT1G_SOT23-RH THERMDC_CPU_R
RTSA# PIN49-54=VID_OUT PIN49-54=GPIO 760G +SB710(DVI) 1 0 5 3 X_10KR0402
PWR_LED 34
4 Q51 SYS_TMP CPU_TMP_2
PIN42-47=VIDIN PIN42-47=VIDIN/OUT 780V+SB700(DVI) 0 1

E
SOUTA 4E 2E 780V +SB700( HDMI+DVI) 0 0 B
C392
C2200p50X0402 RT1
MSI
<OrgAddr1> MICRO-STAR INt'L CO., LTD.
X_10KRT1%-RH
DTRA# FAN START DUTY 60% FAN START DUTY 100% Title

C
THERMDC_CPU_R THERMDC_CPU_R LPC-F71882 / FDD / COM / LPT
Size Document Number Rev
NOTE: LOCATE CLOSE MS-7549 1.1
STATUS PANEL Date: Tuesday, November 11, 2008 Sheet 30 of 38
5 4 3 2 1
5 4 3 2 1

Optics Orientation Holes


IDE 1 Mounting Holes
change IDE1 from BLUE to ORANGE FM1 FM2 FM3
PDD[15..0]
19 PDD[15..0]

X_OPTICS X_OPTICS X_OPTICS MH1 MH2 MH5 MH4


IDE1
D D
HD_RST# R305 33R0402 HDRST#P 1 2 FM4 FM6 FM5
20 IDE_RST#

9
1

9
1

9
1

9
1
PDD7 3 4 PDD8
PDD6 5 6 PDD9 MH1 MH2 MH5 MH4
PDD5 7 8 PDD10 7 2 7 2 7 2 7 2
PDD4 9 10 PDD11 X_OPTICS X_OPTICS X_OPTICS
PDD3 11 12 PDD12 6 3 6 3 6 3 6 3
PDD2 13 14 PDD13 FM7 FM8
PDD1 15 16 PDD14
PDD0 17 18 PDD15

4
19
19 PD_DREQ 21 22 X_OPTICS X_OPTICS
19 PD_IOW# 23 24
19 PD_IOR# 25 26
19 PD_IORDY 27 28
29 30 BH2X20[20]_YELLOW-RH
19 PD_DACK#
19 PD_SIRQ 31 32
19 PDA_R1 33 34 PD_DET 20
19 PDA_R0 35 36 PDA_R2 19
19 PD_CS#1 37 38 PD_CS#3 19
39 40 MH3 MH6
34 PD_LED
R191

9
1

9
1
R220 R190 R194 R196 C232 15KR0402
X_5.6KR0402 4.7KR0402 X_4.7KR0402 MH3 MH6
VCC3 7 2 7 2
VCC3
X_10KR0402 X_C4700p25X0402 6 3 6 3
VCC3
R193 Simulation
X_8.2KR0402 R298

4
C PDD7 C
JS1 JS2
PD_SIRQ X_10KR0402
SIM2 SIM1

X_PIN1*2 X_PIN1*2
VCC5

CPU FAN
FAN CONTROL +12V

U36B +12V SYSFAN1

8
AS358MTR-E1_SOIC8-RH

S
B B
5 +
7 G
SIO_SYS1_FAN 6 D26 X_1N4148
30 SIO_SYS1_FAN -
+12V Q75

D
R325 27K/4

4
D5 1N4148 SYS-FAN1 30
R83 VCC5 P06P03LCG_SOT89 R326 4.7KR0402 R330
R67 27K/4
CPU-FAN 30 C398
4.7KR0402 R61 X_1000p/50v/X7/4 10KR0402

C36 SYSFAN1
R564
X_1000p/50v/X7/4 10KR0402 3
R51 2
4.7K/4 D4 1
1N4148 10KR1%0402

1
C395 BH1X3_White

+
R565 R566 EC79
R52 3.9KR0402 X_0R0805 X_C10u16Y1206
D100u16EL11-RH

2
CPU-FANPWM 30
200R/4

+12V

CPUFAN1
+12V 4
3 MEC1
2
1
A A
BH1X4_White

C10u16Y1206
C21 OSC CAP:C71-1011631-N07
Micro Star Restricted Secret
Title Rev
IDE Conn / FAN 1.1
Document Number MS-7549
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Tuesday, November 11, 2008
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 31 of 38
5 4 3 2 1
5 4 3 2 1

DDR VTT Power


To CPU Copper trace width > 250mils , Fill
island behind DIMM > 400mils .
VCC_DDR
VCC_DDR
D 3VDUAL D

U9
R135
8 1 1KR1%0402
VREF2 VIN VTT_DDR
7 ENABLE GND 2
6 VCNTL VREF1 3
5 BOOT_SEL VOUT 4
GND 9

1
R140

+
W83310DG_SOP8-RH R138 EC25 EC16
1KR1%0402 X_CD1000u63EL11.5-RH

2
1KR0402

CD470u10EL11-2

NB 1.1V POWER
colay 252/263 footprint for Q32/33 temp high
C C

1.25VREF_NB 1_2VREF
VCC_DDR
+12V
R339

CD1000u63EL11.5-RH
R338

1
X_3.3KR1%0402 2.2KR1%0402

X_C0.1u16Y0402

+
N-P75N02LDG_TO252-3-RH

N-P75N02LDG_TO252-3-RH

EC27
C291
U20B R231
8

20KR0402

2
Q46

Q41
1.1VREF 5 +
7 G G
C436 6
C0.1u16Y0402 -

S
R340 AS358MTR-E1_SOIC8-RH
4

24.9KR1%0402

R296
NB_V1_1
VCC1_1

X_CD1000u63EL11.5-RH
CD1000u63EL11.5-RH
0R
10A
1

EC30
R328

+
EC29
X_357R1% C270
2

2
C1u16Y

VCC1_1
X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402
C267

C355

C302

B B

Iripple=10*0.6*0.8/1=4.8A
2.35*3*1.7=11.985A>10.08A
DDR II 1.8V POWER S-BAT54C_SOT23 X_S-BAT54A_SOT23
CHOKE2
D2
+12V Y X 5VDIMM 5VDIMM_IN 1 2 5VDIMM
Z

D3

C0.01u16X0402
CD1800u6.3EL20-RH-2

CD1800u6.3EL20-RH-2
1

1
C63

+
Z

EC3

EC5

C51
C42
C71 CH-1.2u15A3.0m-RH
2

2
R10 10u/10v/X5/8_B
X

X_0R
C10u10Y0805

VCC_DDR
C0.1u16Y0402
R31
R2 C2 1u/25v/X7/8 X_0R0805
D

2.2R0805 Q12
C23 G VCC_DDR
10A
5

1_8VREF R43 2KR1%0402 U2 C1u25X0805


1_8VREF
7 1 R42 0R N-P09N03LDG_TO252-3-RH CHOKE3
VCC

Vref BOOT C113 C1u16Y


1 2
R36 C12 R19 8
D

1u/6.3v/Y5/4 X_2.2R0805 PHASE R30 0R0805 Q20 CH-1.1u27A2.5m-RH EC21 1+


2 2CD1000u63EL11.5-RH
GND

X_12.1K/4/1% UG R126 0R0805 R117


6 FB LG 4 G
C5 2.2R0805 EC20 1+ 2CD1000u63EL11.5-RH
X_C3300p50X0402 UP6103S8_SOP8-RH
S
3

Q4 EC11 1+ 2CD1000u63EL11.5-RH
D

N-2N7002_SOT23 C90
VCC5_SB R26 1KR0402 G R4 3.01KR1%0402 C4 N-P75N02LDG_TO252 C3300p50X0402
X_C3300p50X0402 R125
C7 C3 X_41.2KR1%0402
S

A X_C0.1u16Y0402 R3 X_C0.01u16X0402 R5 R698 close to U35 Pin 6 A


X_1KR1%0402 X_12.1K/4/1%

X_4.7KR0402
20,33 SLP_S5# R40
Q1
R28 2 6
20 S3_STATE
4.7KR0402 1 Micro Star Restricted Secret
30,33,34 ATX_PWROK 5 3
4 Title Rev
R1 VCC_DDR&VCC1_1 NB 1.1
4.7KR0402
Document Number MS-7549
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Wednesday, November 12, 2008
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 32 of 38
5 4 3 2 1
5 4 3 2 1

3VDUAL VCC5

VCC5_SB

R299 VCC5_SB R297


D39 is reserved 10KR0402
X_10KR0402
VCC5_SB VCORE_EN# 6
30,32,34 ATX_PWROK D25 X_S-RB751V-40_SOD323-RH EN_HT
SYS_PWRGD 15
R118 R292

D
10KR0402 Q18 D23 S-RB751V-40_SOD323-RH X_10KR0402

X_N-2N7002_SOT23
7,20,30,34 FP_RST#

D
VCORE_EN G
VCC_DDR R119 SLP_S3# D22 X_S-RB751V-40_SOD323-RH G
VCC5_SB

Q47
4.7KR0402 N-2N7002_SOT23 SLP_S3#

S
Q19 D24 S-RB751V-40_SOD323-RH

X_N-2N3904_SOT23
C

S
D D

Q48
G R274
Q16
R100 4.7KR0402 B
6 PWR_GOOD
2 6 N-2N7002_SOT23 R266
D6

S
1 4.7KR0402 X_4.7KR0402

E
5 3 Q49 C356
ATX_PWROK 30,32,34 VCC1_1
C78

R105
C4.7u6.3X5-1

4 G X_C0.1u16X
X_4.7KR0402

C
S-RB751V-40_SOD323-RH Q44 N-2N7002_SOT23

S
R256 10KR0402 B ATHLON64 POWER GOOD & ENABLES CIRCUIT
N-2N3904_SOT23

E
VDDA_25 C335
10KR0402 C4.7u6.3x5r
R103
SB700 & RS780 POWER GOOD CIRCUIT
R106 C79
4.7KR0402
C0.1u16X

use Slp_s3# control SYS_PWRGD


refer to AMD reference
circuit 1.25VREF_NB
VCC3

Chage 1087 to 7707 for Power up seqence


R282 +12V
10KR0402 R285 C238
20KR0402 X_C0.1u25Y0402-RH
C U19A C

D
3 Q38
VDDA_25 POWER +
1 VCC18_G1 G

VDDA_25
2 - N-P45N02LDG_TO252-RH

S
VCC3 VDDA_25 C369 AS358MTR-E1_SOIC8-RH

4
0.3A
U6 C0.1u25Y0402-RH R283
UP7707M5-00_SOT23-5
300mA 665R1%0402
1.5A
1 5 VCC18_FB1
VIN VOUT +1.8V_S0
X_C22u6.3X50805-RH

1
C58

C70 C353 R284

+
GND

C61

1u/6.3v/Y5/4 C56 1.5KR1%0402 EC26


FB

3 EN X_C1000p50X
R92 1u/6.3v/Y5/4 CD470u6.3EL11.5-RH

2
C62 2.1K/6/1%
2

X_0.1u/16v/Y5/4 4.7u/10v/Y5/8
R98 10K/4 VCC3
30,32,34 ATX_PWROK

VCC3 R249 0R
R102 X_10K/4 R97

Z
1K/4/1% 1_2VREF D19
Y D20 X Y X
+12V
ER_RS780E1.pdf 1PS226_SOT23 X_1PS226_SOT23
VCC_DDR
R310 R313
20KR0402
from 1.35V change to normal 1.2V
10KR0402
U19B

8
AS358MTR-E1_SOIC8-RH 1_2VREF 1.25VREF_NB
1.5A

D
5 Q39 VCC_DDR
+ VCCA_1V2_DRV VCCA_1V2 +12V
7 G

X_10KR0402
C387 6 -

R336
N-IPD06N03LA_TO252 R337

S
VCCA_1V2_SEN R311 0R1%0402 1KR1%0402

4
VCC5_SB VCC5 C0.1u16Y0402 U20A R322 C354

8
20KR0402 X_C0.1u16Y0402

+
VCC3 EC28 1.25VREF 3 Q50
B
R312 + D B
CD470u63EL11.5-RH 1 G

2
R9 R8 X_1KR1%0402 2 S
- N-P45N02LDG_TO252-RH
X_47K/4/5% 27K/4/5%
D

R20 Q6 C406 R329 AS358MTR-E1_SOIC8-RH

4
X_1K/4/5% N-2N7002_SOT23 FIELD OEM/ODM COST DOWN 24.9KR1%0402
X_N-2N7002_SOT23

G
1.20V
D

0.1u/16v/Y5/4
G R45 0R/4/5% R597,R598,R599 R324
1.9A
S
Q3

ADD ,Q56,R603 R601,R602,R600


VCC3 VCC_SB
R7
S

USB_PHY
R597,R598,R599 0R
X_0R/4/5%

51K/4/5%

1
R44

R6 REMOVE R601,R602,R600 ,Q56,R603 3VDUAL USB_PHY R323

+
1.2V
X_5.1K/4/5% X_357R1% EC33
+1.2VALW CD470u63EL11.5-RH

2
CHANGE R602=C0.1u/16VY5V0402 R602=51Kohm/0402 U24 1.2V 0.6A CP24
3 VIN VOUT 2
DDR REF
R379 X_Copper SCL,SDA change to be NB 1.25V REF VCC5
ADJ

C481 R1 C475 C484 V_FSB_VTT REF


800mA connected to SM BUS0 1_2VREF

5VDIMM FOR DDR


X_0R VCC5_SB
LT1087S_SOT89 C474 because that SM BUS1 can

X_11KR1%0402

N-2N7002_SOT23
D
1

C10u10Y0805 C10u10Y0805 X_C4.7u10X50805-RH R300 10R0402 C374 C0.1u16Y0402


VCC5_SB not be writen

R303
30,34 ATX_PSON# G

Q52
VCC5 R14 510R0402 R11 10R VCC5_SB

reference Voltage6,7,11,20
R380 C0.1u25Y0402-RH
S

S
1
R13 10KR0402 C9 C0.1u16Y0402 R2 U18
30,32,34 ATX_PWROK P-P06P03LCG_SOT89-3-RH
G 0R R302 0R0402 SCL0_A 3 7 1_8VREF

5VSB
Q7 5VDIMM SCL0 SCL 1.8V 1_8VREF
1
2

U1 C18 R306 0R0402 SDA0_A 4


6,7,11,20 SDA0
D

SLP_S3# 5VSBDRV1 SDA 1.25VREF_NB_6261 R301 100R/0603


5 7 6
5VCC
5VSB

20,30 SLP_S3# S3# 5VSB_DRV 1.25V 1.25VREF_NB


SLP_S5# 6

GND
20,32 SLP_S5# S5# VCC3
C18000p16X0402 PWR_GOOD EN_HT 8 5 1_2VREF_6261
EN 1.2V 1_2VREF

3VDUAL
C29 R307 100R/0603
D

Q10 X_C0.1u25Y0402-RH VCC5_SB VCC5_SB R293 UP6261M8_SOT23-8-RH


GND

1.25VREF_NB
S

2
R35 MODE 4 8 5VDRV1 G C477 C1u16Y0805 0R0402
MODE 5VCC_DRV R377 10R0402 Q55 G 5VDRV1

N-2N7002_SOT23
D
X_0R0402 UP7501M8_SOT23-8-RH N-APM3023NUC-TRL_TO252-RH 3VDUAL
S
3

R27 R12 N-IPD20N03L_TO252 6261 EN SPEC. HI:1.4V LOW:0.4V C380 G


30,34 ATX_PSON#
D
4

3.3V

Q45
A 4.7KR0402 1.5KR-RH C6 U22 A
1 C381 C377
VCTRL

S
VCC5 POK C0.1u16Y0402 C0.1u16Y0402
VOUT 6
2 EN
1

FOR GPIO CONTROL S5 POWER OR SHUTDOWN +12V C0.022u16X0402-RH R355


+

3 C468 10KR1%0402 EC35 C0.1u16Y0402


R15 VCC5 VIN
CD470u63EL11.5-RH
2

S5 S3 MODE 5VDUAL REMARK 200KR0402 7 200KR0402 R358 5VDRV1 Micro Star Restricted Secret
GND

GND

R356 FB
5 VREF ADD R497 to increase the driving of 1.2VREF
1

1 1 X VCC5 S0/S1/S2 EC1 X_C18000p16X0402 Title Rev


+

25 USB_DRV ;Each output is capable of 700uA sinking


X_0R0402 UP7706U8_PSOP8-RH R357 ACPI BY UPI
8

9
1

1 0 X VCC5_SB S3 X_CD470u63EL11.5-RH current and 300uA souring current 1.1


+

3.3KR1%0402
2

R16 C480 EC34 Document Number MS-7549


0 X 1 VCC5_SB S4/S5 56KR1%0402 X_C22u6.3X50805-RH CD470u63EL11.5-RH
2

MICRO-STAR INT'L CO.,LTD. Last Revision Date:


0 X 0 SHUTDOWM S4/S5 No. 69, Li-De St, Jung-He City, Wednesday, November 12, 2008
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 33 of 38

5 4 3 2 1
5 4 3 2 1

ATX connector / Front Panel


VCC3
R439 X_330R

ESD Protect SATA_LED 19 USB_1394


Intel Front Panel PS2 KEYBOARD & MOUSE CONNECTOR
PD_LED 31

X
C591 D33

S-BAT54A_SOT23
X_C180p50N0402 C8 R18

2
4
6
8
X_1KR0402

Z
RN4
SUS_LED 8P4R-4.7KR0402

16
17
D D

1
3
5
7
PWR_LED C0.1u25Y0402-RH JKBMS1
MSDAT R55 0R 7 10
30 MSDATA
8
EMI MSCLK R60 0R 11
30 MSCLK
For MSI / Intel Front Panel C596 C594
12
MS
9
VCC3 C595 KBDAT R59 0R 1 4
3VDUAL 30 KBDATA
X_C0.1u25Y0402-RH JFP1 2
KBCLK R65 0R 5
30 KBCLK
R450 330R HDD+ 1 2 PWR_LED X_C0.1u25Y0402-RH 6 3
HDD+ PLED PWR_LED 30
X_C0.1u25Y0402-RH KB
HDD- 3 4 SUS_LED R448 EMI
SUS_LED 30

13
14
15
HDD- SLED C40
4.7KR0402
RESET- 5 6PWSW+ Near Super I/O C220p50N0402 C30
R455 RESET- PWSW+ C220p50N0402
RESET+ 7 8PWSW- PWSW+ R443 100R1%0402 EMI suggest
7,20,30,33 FP_RST# RESET+ PWSW- PSIN 30 C32 CONN-KB_MS-RH
33R0402 9 C220p50N0402 C35
R456 NC C602 C220p50N0402
C599
100R0402 H2X5[10]M_COLORS-RH EMI
X_C0.1u25Y0402-RH
C0.1u25Y0402-RH
EMI solution
MSI Front Panel Connector
C C
JFP2 Adding JFP2 connector
1 GND SPEAKER 2

SUS_LED 3 4 SPK
SLED BUZ+ VCC5
PWR_LED 5 6 R335
PLED BUZ- VCC5 VCC3
X_0R0402 X_BAS32L_LL34 D27 VCC5 VCC5
VCCSPK 8
BUZZER
H2X4[7]M_COLOR-RH RN25
1 2
3 4 C483 C322 C577
5 6
7 8 SPK

8P4R-100R0402 X_C0.1u25Y0402-RH X_C0.1u25Y0402-RH X_C0.1u25Y0402-RH


C

Q54 C443
R321 B
20 SPKR
2.2KR0402 N-2N3904_SOT23
E

C0.1u25Y0402-RH

B VCC5 B
ATX Connector
3VDUAL VCCP

X_C0.1u25Y0402-RH

X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH

X_C0.1u25Y0402-RH

X_C0.1u25Y0402-RH

X_C0.1u25Y0402-RH

X_C0.1u25Y0402-RH

X_C0.1u25Y0402-RH
C373

C390

C147

C22

C20

C445

C401

C470
25

ATXPWR1
13 1
25

VCC3 3.3V 3.3V VCC3

-12V 14 -12V 3.3V 2


C112 C204 C214
X_C0.1u25Y0402-RH 15 3 X_C0.1u25Y0402-RH
X_C1000p50X0402 GND GND
16 4 +1.8V_S0
30,33 ATX_PSON# P_ON 5V VCC5 VCC5
1

VCC3 VCC5
C462

C195 C170
+

X_C0.1u25Y0402-RH

17 GND GND 5
EC36 C0.1u25Y0402-RH VCC3
C1000p50X0402 18 6 C396
2

GND 5V R147 X_C0.1u25Y0402-RH


X_C0.1u25Y0402-RH

X_C0.1u25Y0402-RH

X_C0.1u25Y0402-RH

X_C0.1u25Y0402-RH

X_C0.1u25Y0402-RH
19 GND GND 7 10KR0402
C494

C442

C265

C397

C471
CD1000u63EL11.5-RH C482
20 8 X_C0.1u25Y0402-RH
-5V POK ATX_PWROK 30,32,33
21 5V 5VSB 9 VCC5_SB
C152
22 10 C0.1u25Y0402-RH
VCC5 5V +12V +12V
23 5V +12V 11
C189 C144 C118 CP33
X_C0.1u25Y0402-RH 24 12 X_C0.1u25Y0402-RH
GND 3.3V VCC3
CP32 X_Copper
A A
X_C0.1u25Y0402-RH

PWRCONN24P_CREAM-RH-1 CP34 X_Copper

Micro Star Restricted Secret


CP35 X_Copper
Title Rev

X_Copper ATX/Front Panel/KB/EMI 1.1


Document Number MS-7549
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Wednesday, November 12, 2008
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 34 of 38
5 4 3 2 1

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