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MS_7641 Ver:3.1
Title Page
MSI
Cover Sheet 1
D
Block Diagram 2 D
CPU:
GPIO Configuration 3
AMD AM3
Clock Distribution 4
System Chipset: Power Deliver Chart 5
AMD/ATI 760G/785G/880G
ISL6323B 6
AMD/ATI RS710
Clock-Gen RTM-880N-793 7
Controller--RTM-880N-793 FAN 29
VCC_DDR&VCC1_1 NB 30
B
PWM: B
ACPI by UPI 31
UPI1601
ATX/Front Panel/KB/EMI 32
BOM - Option Parts 33
POWER OK MAP 34
RESET MAP 35
History 36
A A
AM3
AM3 SOCKET DDRIII 800, 1066, 1333 UNBUFFERED
7,8,9 128bit DDRIII DIMM2 10
OUT
DDRIII LOGICAL DIMM
HyperTransport LINK 16x16 2.6GHZ(HT3)
IN
ATI NB - RS760/740/880
HyperTransport LINK0 CPU I/F
1 16X PCIE VIDEO I/F
1 4X PCIE I/F WITH SB
PCIE GFX x16 PCIE x16
31 2 1X PCIE I/F
1 USB3.0
C C
PCI BUS
SPI Bus SPI ROM 8M
19
17,18,19,20,21
CPU CORE POWER PCI SLOT 1
ACPI CONTROLLER NB CORE POWER 24
Intersil ISL6323
uPI Intersil ISL6612A 6
32
LPC BUS
CPU VLDT Power
RS760 CORE POWER
PCIE & SB POWER
31,32 TPM Pin Header
Fintek SIO 71889ED 29
29
A
DDR3 DRAM POWER A
31
ATX CON & DUAL POWER KBD SERIAL MICRO-START INT'L CO.,LTD.
33 FLOPPY
MOUSE PORT Title
29 34 29 02 BLOCK DIAGRAM
Size Document Number Rev
Custom MS_7641 0A
Date: Monday, July 25, 2011 Sheet 2 of 36
5 4 3 2 1
5 4 3 2 1
PCI Config.
VIDO5/GP27 3.3V Unused AD21 20
VIDO4/GP26 Unused AE20
VIDO1/GP21/VGP0 Unused AB20 DEVICE MCP1 INT Pin REQ#/GNT# IDSEL CLOCK
PME#/GP54 Unused AD19 PCI_INTE#
PCI_INTF# PREQ#0
KRST#/GP62 Unused AE19 PCI Slot 1 AD21 PCICLK0
GA20/JP7 Unused AC20 PCI_INTG# PGNT#0
KDAT/GP61 Unused AD20 PCI_INTH#
KCLK/GP60 Unused AE21 PCI_INTF#
PCI_INTG# PREQ#1
MDAT/GP57 Unused AB22 PCI Slot 2 AD22 PCICLK1
MCLK/GP56 Unused AD22 PCI_INTH# PGNT#1
SUSC#/GP53 Unused AE23 PCI_INTE#
PSON#/GP42 Unused AC23
PANSWH#/GP43 SPI_DATAIN G6
PWRON#/GP44 SPI_DATAOUT D2
PCIRST3#/GP11 SPI_CLK D1
PCIRST2#/GP12 SPI_HOLD_L F4
FAN_CTL3/GP36 SPI_CS# F3
FAN_TAC3/GP36 CPU_PRESENT# U15
FAN_CTL2/GP51 Unused J1
FAN_TAC2/GP52 Unused M8
FAN_CTL1 COM_GPIO M5
FAN_TAC1 Unused M7
A VID2/GP32 Unused P5 A
VID3/GP33 Unused P8
VID3/GP33 Unused E8
VID4/GP34 Unused B6
VID5/GP35 Unused A6
DIMM3 DIMM4
D D
CPU_HT_CLK
DIMM1 DIMM2 PCI CLK0
PCI SLOT 0 33MHz
NB_HT_CLK 33MHZ
25MHz
100MHZ PCIE GBE
B B
USB CLK
USB_CLK
48MHZ
SIO CLK
48MHZ 25MHz SATA 32.768KHz
14.31818MHz
SB700
X4 PCI-E 0.8A
VCC3_SB Linear
REGULATOR
ATA I/O 0.5A
SB CORE 0.6A
CLOCK
+1.2VSB (S0, S1)
1.2V_SB Linear
REGULATOR 1.2V S5 PW 0.22A
VCC3_SB (S0, S1, S3, S5)
3.3V S5 PW 0.01A
+5VA Linear
B REGULATOR B
AUDIO CODEC
5VDUAL Linear
REGULATOR 3.3V CORE 0.1A
+5VA (S0, S1)
5V ANALOG 0.1A
SUPER I/O
VCC3_SB (S0, S1, S3, S5)
+3.3VDUAL (S3) 0.01A
PCI Slot (per slot) X1 PCIE per X16 PCIE per USB X6 FR USB X6 RL 2XPS/2
ENTHENET IEEE-1394 x1
5V 5.0A 3.3V 3.0A 3.3V 3.0A VDD VDD 5VDual 3.3V (S3) 0.1A 3.3V (S0, S1) 0.1A
A A
3.3V 7.6A 12V 0.5A 12V 5.5A 5VDual 5VDual 0.5A 3.3V (S0, S1) 0.5A 12V (S0, S1) 1.1A
12V 0.5A 3.3Vaux 0.1A 3.3VDual 0.1A 3.0A 3.0A
3.3VDual 0.375A
-12V 0.1A
VCC_DDR
H-MOS: D03-0903B4B-N03
PWROK_PWM
8 PWROK_PWM
C46 R163
CPUVID1
AVL: D03-0496300-O05
VCCP
L-MOS: D03-0603B2B-N03
X_C0.1u16X0402-RH-1
VIN
+12VIN X_300R0402 LOW FOR SVID
8 CPU_CORE_TYPE
R173
AVL: D03-0490610-O05
VCC5_SB VCC5 +12VIN X_300R0402 C756 C96 EC13
R107 C1u16X5 C10U16X51206 1+ 2
10.7KR1%0402 N-P0803BDG_TO252
D
Q23 CD820u2.5SO-RH-3
R556 R32 1KR1%0402 VR_EN R558 R116 U_G1 R132 1R0805 G
10KR0402 2.2R1%0805 2.2R1%0805 EC22
R141 1+ 2
C
CHOKE5
S
Q16 VCC_VRM
VCORE_EN# R657 B 10KR0402 CD820u2.5SO-RH-3
30 VCORE_EN#
PHASE1 1 2 VCCP
10KR0402 N-MMBT3904_NL_SOT23 EC9
E
C39 1+ 2
D
D C50 C1U25X0805 Q74 Q27 R127 D
VCC5 L_G1 R159 0R0805 CH-0.5u40A0.81m-RH CD820u2.5SO-RH-3
C4.7u10X7R0805 G G 2.2R1%0805
AMD Vcore Set To 1.2V On SVI MODE
1. Move R155 (Page 8) To R921 CP43 CP42 EC44
S
2. Connect 300R%0402 On R920 & R922 7X7 QFN 1+
10
2
C64 R151 U4 ISL6323B C151 X_COPPER X_COPPER
X_300R1%0402
X_C0.1u16X0402-RH-1 10KR0402 29 C1000p50X0402 CD820u2.5SO-RH-3
VCC
PVCC1_2 C47 N-P0403BDG_TO252 N-P0403BDG_TO252
24 EN
R921
37 31 R91 2.2R1%0805 IPHASE1 EC47
30 VCORE_VLD VDDPWRGD BOOT1
8 PWROK_PWM 34 PWROK
ISEN1 1+ 2
9 32 U_G1 C0.1U25X VIN
8 CPUVID5 VID5 UGATE1
8 33 PHASE1 CD820u2.5SO-RH-3
8 CPUVID4 VID4 PHASE1
7 30 L_G1
8 CPUVID3 VID3/SVC LGATE1
6 EC14
8 CPUVID2 VID2/SVD
8 CPUVID1 5 VID1/SEL 1+ 2
4 20 ISEN1+ R117 1.5KR1%0402 ISEN1 C324 C328
8 CPUVID0 VID0/VFIXEN ISEN1+
C49 ISEN1- C17 N-P0803BDG_TO252 CD820u2.5SO-RH-3
300R1%0402
21 C1u16X5 C10U16X51206
D
VCCP_NB ISEN1-
C0.1u16X7R0402
C5
R920
S
VCC_DDR R112 360R1%0402 FB_NB BOOT2 CD820u2.5SO-RH-3
100R0402 26 U_G2 C0.1U25X 10KR0402
C51 X_C0.1u16X7R0402 UGATE2 PHASE2 PHASE2 EC8
PHASE2 25 1 2 VCCP
8 NB_VSEN
ISEN_NB_A R87 0R0402 2 VSEN_NB LGATE2 28 L_G2 1+ 2
R89 X_0R0402
D
R97 0R0402 UP6262 NB_FB 3 Q25 Q75 R676 CD820u2.5SO-RH-3
C40 RGND_NB ISEN2+ R49 1.5KR1%0402 ISEN2 L_G2 R128 0R0805 CH-0.5u40A0.81m-RH EC10
ISEN2+ 22 G G 2.2R1%0805
X_C0.1u16X7R0402 C44
ISEN2- 23 ISEN2- C15 1+ 2
X_C0.1u16X7R0402 IPHASE2 R25 C2 CP53 CP47
8 NB_GND
S
C11 8.66KR1%0402 C0.1u16X7R0402
VCCP R154 C0.1u16X0402 C122 X_COPPER X_COPPER X_C470u2.5SO-HF
18 COMP
R110 C8 2.55KR1%0402 35 PWM3 C1000p50X0402
R6 C34 C0.01u25X0402 PWM3 N-P0403BDG_TO252 N-P0403BDG_TO252
100R0402 Bottom
X_470R1%0402 44 ISEN3+ R93 1.5KR1%0402 ISEN3 IPHASE2
R7 X_C1000p50X0402 C100p50N0402 ISEN3+ ISEN3- C148 ISEN2
17 FB ISEN3- 43
100R0402 C21 IPHASE3 R142 C167
R14 604R1%0402 R24 15 8.66KR1%0402 C0.1u16X7R0402 +12VIN VIN
R96 0R0402 1.1KR1%0402 RCOMP C0.1u16X0402
8 COREFB_H
C0.01u25X0402 36
UP6262_ FB PWM4
C19 13 46 R184
X_C0.1u16X7R0402 VSEN ISEN4+ C757 C153 VCCP_NB
ISEN4- 45 VCC5 2.2R1%0805
12 N-P0803BDG_TO252 C1u16X5 C10U16X51206
D
8 COREFB_L RGND U14 Q32
6 1 U_G3 R172 1R0805 G EC4
VCC UGATE
C PVCC_NB 42 R101 2.2R1%0805 +12VIN 7 PVCC BOOT 2 1+ 2 C
R114 C1 C33 R41 C26 R191 C323 R168
CHOKE7
S
100R0402 X_C0.1u16X7R0402 4.99KR1%0402
C0.1u16X7R0402 C71 C1U25X0805 C67 C175 2.2R1%0805 C0.1U25X CD820u2.5SO-RH-3
40 R504 2.2R1%0805 C1u16X5 8 10KR0402
BOOT_NB PHASE
5
12V
VCC_VRM
D
RESET PHASE_NB LGATE_NB Q61 Q31 R138 CD820u2.5SO-RH-3
LGATE_NB 41 CH-0.5u40A0.81m-RH
PWM3 3 5 L_G3 R137 0R0805 G G
R156 69.8KR1%0402-RH PWM LGATE 2.2R1%0805
2 4 14
GND
12V
GND
S
R111 ISEN_NB
VCC_VRM 11 FS
X_10KR1%0402 R99 X_6.2KR1%0402 C147 X_COPPER X_COPPER
JPWR2 C1000p50X0402
49
PWRCONN4P_CREAM-RH-1 C42 C95 N-P0403BDG_TO252 N-P0403BDG_TO252
X_C0.01u25X0402 PHASE_NB_A R143 ISEN_NB_A IPHASE3
R126 R122 8.66KR1%0402 ISEN3
X_10KR0402 91KR1%0402 C0.1u16X0402
C159
C0.1u16X0402
CHOKE8 VIN BOTTOM PAD
+12VIN 1 2 CONNECT TO GND
EC20 EC92 EC93 EC12 C185
1
C54
2
2
CD270u16SO-RH-2
CD270u16SO-RH-2
CD270u16SO-RH-2
CD270u16SO-RH-2
C0.1u16Y0402
C0.01u25X0402 VIN
C146 C97
C1u16X5 C10U16X51206
D
Q12
UGATE_NB R526 1R0805 G
R95
N-P0803BDG_TO252-3-RH
CHOKE3
S
VCCP_NB
10KR0402
PHASE_NB D 1 2
Q11 R31
LGATE_NB R16 0R0805 CH-0.5u40A0.81m-RH
G 2.2R1%0805
U3
3 7 6262_VCCP_R R2 X_0R0402 UP6262_ FB
BUS_SELVCC
GND OUT2
X_UP6262BM8_SOT23-8-RH
R60 R70
VCC5
X_1KR0402 X_10KR0402
if UPI6262 will stuffed ,need change R75 R43 R96 to49.9 ohm
A A
R426
X_4.7KR0402
1- PLACE ALL THE SERIES TERMINATION
RESISTORS AS CLOSE AS U41 AS POSSIBLE
D VCCA_1V2 Q56 D
2- ROUTE ALL CPUCLK/#, NBSRCCLK/#, GPPCLK/# AS DIFFERENT PAIR RULE 2 6 PD#
R415
1
3- PUT DECOUPLING CAPS CLOSE TO U41 X_4.7KR0402 5 3
POWER PIN 4 C454
VCC3 X_C0.1u16X
CP16X_Copper
C442
X_C0.1u16X
L17 CLK_VDDA
X_30L3A-15_0805-RH U24
C444 C450
X_C10u10Y0805 C0.1u16X0402-2 44 50 CPU_CLK
CLK_VDD VDDA CPUK8_0T CPU_CLK 8
43 49 CPU_CLK# X_NN-CMKT3904_SOT363-6-RH
GNDA CPUK8_0C CPU_CLK# 8
CPUK8_1T 46
60 VDDREF CPUK8_1C 45
61 GNDREF
38 NBGFX_SRCCLK NBGFX_SRCCLK 14
ATIG0T NBGFX_SRCCLK#
39 VDDSATA ATIG0C 37 NBGFX_SRCCLK# 14
VCC3 42 36 GFX_CLKP
GNDSATA ATIG1T GFX_CLKP 22
CP28 X_Copper 35 GFX_CLKN
ATIG1C GFX_CLKN 22
VDD48 64 32
VDD48 ATIG2T
3 GND48 ATIG2C 31
L24 30
ATIG3T
48 VDDCPU ATIG3C 29
X_30L3A-15_0805-RH 47
C502 GNDCPU NBLINKCLK
SB_SRC0T 27 NBLINKCLK 14
C C1u6.3Y0402-RH 56 26 NBLINKCLK# C
VDDHTT SB_SRC0C NBLINKCLK# 14
53 23 SBSRCCLK
GNDHTT SB_SRC1T SBSRCCLK 17
22 SBSRCCLK#
SB_SRC1C SBSRCCLK# 17
34 VDDATIG
SRC0T 21
11 VDDSRC SRC0C 20
16 19 GPPCLK0 GPPCLK0 22
VDDSRC SRC1T GPPCLK0#
25 VDDSB SRC1C 18 GPPCLK0# 22
SRC2T 15
33 GNDATIG SRC2C 14
C478 14.318MHZ16P_D-RH 28 13 CK_PE_100M_LAN
GNDATIG SRC3T CK_PE_100M_LAN 26
12 CK_PE_100M_LAN#
SRC3C CK_PE_100M_LAN# 26
10 GNDSRC SRC4T 9
2
C22p50N 17 8
Y3 R463 GNDSRC SRC4C
24 GNDSB **DOC_1/SRC5T 7
X_1MR 6
1
6 CPUVID5
6 CPUVID4
6 CPUVID3
THERM_SIC R193 THERM_SIC_R
HT_CADIN_H[15..0] THERM_SIC_R 28 6 CPUVID2
12 HT_CADIN_H[15..0] 6 CPUVID1
THERM_SID R194 THERM_SID_R
HT_CADIN_L[15..0] THERM_SID_R 28 6 CPUVID0
VDDA_25 VDDA25
D
12 HT_CADIN_L[15..0] D
HT_CADOUT_H[15..0]
12 HT_CADOUT_H[15..0]
CPU_HOT
HT_CADOUT_L[15..0] L1 VDDA25 CPU_HOT 17
12 HT_CADOUT_L[15..0] VCC_DDR
VCC_DDR
80/2A/B8 C89 C90
C4.7u16Y1206 C76 CPU1D
7 CPU_CLK
C80
C3900p50X C0.22u16X X_C3300p50X0402 C10 R144 VCC_DDR
R149 VDDA_1 1KR0402 R155 R153
D10
C88 169R1% VDDA_2 MISC. 300R0402 300R0402
C3900p50X CPUCLKIN A8
CPUCLKIN# CLKIN_H CPU_CORE_TYPE
7 CPU_CLK# B8 CLKIN_L CORE_TYPE G5 CPU_CORE_TYPE 6
B
X_C1000p50X CPU_PRESENT_L PVIEN/VID1 CPUVID0 Q35
VID0 E1
N-MMBT3904_NL_SOT23
CPU1A R186 1KR0402 THERM_SIC THERMDC_CPU CPU_THRIP_L#
AL6 SIC THERMDC AG9 THERMDC_CPU 28 E C CPU_THRIP# 19
R187 1KR0402 THERM_SID AK6 AG8 THERMDA_CPU
R185 SID THERMDA THERMDA_CPU 28
12 HT_CLKIN_H1 N6 L0_CLKIN_H1 L0_CLKOUT_H1 AD5 HT_CLKOUT_H1 12 AK4 SA0 THERMTRIP_L AK7
P6 AD4 VCC_DDR R197 X_1KR0402 ALERT_L AL4 AL7 CPU_HOT
12 HT_CLKIN_L1 L0_CLKIN_L1 L0_CLKOUT_L1 HT_CLKOUT_L1 12 ALERT_L PROCHOT_L VCC_DDR
12 HT_CLKIN_H0 N3 L0_CLKIN_H0 L0_CLKOUT_H0 AD1 HT_CLKOUT_H0 12
N2 AC1 R245 X_1KR0402 CPU_TDI AL10 AK10 CPU_TDO VCC_DDR
12 HT_CLKIN_L0 L0_CLKIN_L0 L0_CLKOUT_L0 HT_CLKOUT_L0 12 VCC_DDR TDI TDO
CPU_TRST_L AJ10
CPU_TCK TRST_L
12 HT_CTLIN_H1 V4 L0_CTLIN_H1 L0_CTLOUT_H1 Y6 HT_CTLOUT_H1 12 AH10 TCK
V5 W6 CPU_TMS AL9 R208
12 HT_CTLIN_L1 L0_CTLIN_L1 L0_CTLOUT_L1 HT_CTLOUT_L1 12 TMS DDRPWRFB
12 HT_CTLIN_H0 U1 L0_CTLIN_H0 L0_CTLOUT_H0 W2 HT_CTLOUT_H0 12 4.7KR0402
V1 W3 CPU_DBREQ_L A5 B6 CPU_DBRDY R201
12 HT_CTLIN_L0 L0_CTLIN_L0 L0_CTLOUT_L0 HT_CTLOUT_L0 12 DBREQ_L DBRDY 300R0402
B
COREFB_H G2 AK11 Q39
VCC_DDR 6 COREFB_H VDD_FB_H VDDIO_FB_H
HT_CADIN_H15 U6 Y5 HT_CADOUT_H15 COREFB_L G1 AL11 R553 X_0R0402 N-MMBT3904_NL_SOT23
L0_CADIN_H15 L0_CADOUT_H15 6 COREFB_L VDD_FB_L VDDIO_FB_L
HT_CADIN_L15 V6 Y4 HT_CADOUT_L15 G4 NB_VSEN 6 E C
HT_CADIN_H14 L0_CADIN_L15 L0_CADOUT_L15 HT_CADOUT_H14 TP13 M_VDDIO_PWRGD VDDNB_FB_H TALERT# 18,28
T4 L0_CADIN_H14 L0_CADOUT_H14 AB6 F3 M_VDDIO_PWRGD VDDNB_FB_L G3 NB_GND 6
C HT_CADIN_L14 T5 AA6 HT_CADOUT_L14 VCCA_1V2 C
HT_CADIN_H13 L0_CADIN_L14 L0_CADOUT_L14 HT_CADOUT_H13 R205 TP11 CPU_VDDR_SENSE CPU_PSI_L
R6 L0_CADIN_H13 L0_CADOUT_H13 AB5 E12 VDDR_SENSE PSI_L F1 TP1
HT_CADIN_L13 T6 AB4 HT_CADOUT_L13 39.2R1%
HT_CADIN_H12 L0_CADIN_L13 L0_CADOUT_L13 HT_CADOUT_H12 CPU_M_VREF HTREF1 R199 44.2R1%
P4 L0_CADIN_H12 L0_CADOUT_H12 AD6 F12 M_VREF HTREF1 V8
HT_CADIN_L12 P5 AC6 HT_CADOUT_L12 CPU_STRAP_HI_E11 AH11 V7 HTREF0 R200 44.2R1%
HT_CADIN_H11 L0_CADIN_L12 L0_CADOUT_L12 HT_CADOUT_H11 CPU_STRAP_LO_F11 M_ZN HTREF0
M4 L0_CADIN_H11 L0_CADOUT_H11 AF6 AJ11 M_ZP
HT_CADIN_L11 M5 AE6 HT_CADOUT_L11
HT_CADIN_H10 L0_CADIN_L11 L0_CADOUT_L11 HT_CADOUT_H10 CPU_TEST25_H CPU_TEST29_H C165 C166
L6 L0_CADIN_H10 L0_CADOUT_H10 AF5 A10 TEST25_H TEST29_H C11
HT_CADIN_L10 M6 AF4 HT_CADOUT_L10 R206 CPU_TEST25_L B10 D11 CPU_TEST29_L C1000p50X0402 C1000p50X0402
HT_CADIN_H9 L0_CADIN_L10 L0_CADOUT_L10 HT_CADOUT_H9 R145 300R0402 CPU_TEST19 TEST25_L TEST29_L R150
K4 L0_CADIN_H9 L0_CADOUT_H9 AH6 39.2R1% F10 TEST19
HT_CADIN_L9 K5 AG6 HT_CADOUT_L9 R146 300R0402 CPU_TEST18 E9 80.6R1%
L0_CADIN_L9 L0_CADOUT_L9 R552 TEST18
HT_CADIN_H8 J6 AH5 HT_CADOUT_H8 AJ7 46.4 ohm FOR AM3R2
HT_CADIN_L8 L0_CADIN_H8 L0_CADOUT_H8 HT_CADOUT_L8 AM3R2 need change to 1K TEST13 CPU_TEST24
K6 L0_CADIN_L8 L0_CADOUT_L8 AH4 F6 TEST9 TEST24 AK8 TP19
AH8 CPU_TEST23 R158 X_1KR0402
HT LINK
300R0402
R188
HT_CADIN_H6 R1 AA2 HT_CADOUT_H6 TP15 CPU_TEST15 F8 AJ8 CPU_TEST20 TP18
L0_CADIN_H6 L0_CADOUT_H6 TEST15 TEST20 VCC_DDR
R195
HT_CADIN_L6 T1 AA3 HT_CADOUT_L6 TP8 CPU_TEST14 C5
HT_CADIN_H5 L0_CADIN_L6 L0_CADOUT_L6 HT_CADOUT_H5 TP16 CPU_TEST12 TEST14
R3 L0_CADIN_H5 L0_CADOUT_H5 AB1 AH9 TEST12 TEST28_H J10
VCC_DDR
300R0402
HT_CADIN_L5 R2 AA1 HT_CADOUT_L5 H9
HT_CADIN_H4 L0_CADIN_L5 L0_CADOUT_L5 HT_CADOUT_H4 TEST28_L CPU_TEST27 R207 X_300R0402
N1 L0_CADIN_H4 L0_CADOUT_H4 AC2 E5 TEST7 TEST27 AK9
HT_CADIN_L4 P1 AC3 HT_CADOUT_L4 AJ5 AK5 CPU_TEST26
HT_CADIN_H3 L0_CADIN_L4 L0_CADOUT_L4 HT_CADOUT_H3 TEST6 TEST26 R198 300R0402
L1 L0_CADIN_H3 L0_CADOUT_H3 AE2 AH7 TEST3 TEST10 G7
HT_CADIN_L3 M1 AE3 HT_CADOUT_L3 AJ6 D4
HT_CADIN_H2 L0_CADIN_L3 L0_CADOUT_L3 HT_CADOUT_H2 TEST2 TEST8 1K ohm FOR AM3R2 R129
L3 L0_CADIN_H2 L0_CADOUT_H2 AF1
HT_CADIN_L2 L2 AE1 HT_CADOUT_L2 15R1%
HT_CADIN_H1 L0_CADIN_L2 L0_CADOUT_L2 HT_CADOUT_H1
J1 L0_CADIN_H1 L0_CADOUT_H1 AG2 C18 RSVD1 RSVD9 L30
HT_CADIN_L1 K1 AG3 HT_CADOUT_L1 C20 L31 CPU_M_VREF TP14
HT_CADIN_H0 L0_CADIN_L1 L0_CADOUT_L1 HT_CADOUT_H0 TP9 CPU_RSVD3 RSVD2 RSVD10
J3 L0_CADIN_H0 L0_CADOUT_H0 AH1 F2 RSVD3 RSVD11 AD25
HT_CADIN_L0 J2 AG1 HT_CADOUT_L0 G24 AE24
L0_CADIN_L0 L0_CADOUT_L0 RSVD4 RSVD12 R135 C85 C79
G25 AE25
RSVD5 INT. MISC. RSVD13
1
2
3
4
5
6
7
8
4
5
6
7
8
6
1
3
4
RN7 RN6
1 2 1 2 CPU_TEST25_H R167 X_510R0402
7
5
3
1
3 4 3 4
5 6 5 6 RN5 R134 CPU_TEST25_L R147 510R0402
7 8 7 8 X_8P4R-1KR0402 300R0402
8
6
4
2
4
3
1
6
CPU_TCK
IMC_TDO CPU_TDI IMC_DBREQ_L CPU_DBREQ_L CPU_DBREQ_L VCC3
19 IMC_TDO 19 IMC_DBREQ_L
REF15 REF16 REF17
IMC_TCK CPU_TCK IMC_TMS CPU_TMS
19 IMC_TCK 19 IMC_TMS
R68 R69 OPT OPT OPT
4.7KR0402 4.7KR0402
B X_1KR X_848R 1K X_46.4R
A Q60 A
N-MMBT3904_NL_SOT23
17 LDT_PWRGD E C PWROK_PWM 6
C32
X_C100p50N0402
MEM_MA_DQS_L[7..0] MEM_MB_DQS_L[7..0]
11 MEM_MA_DQS_L[7..0] 11 MEM_MB_DQS_L[7..0]
MEM_MA_DQS_H[7..0] MEM_MB_DQS_H[7..0]
11 MEM_MA_DQS_H[7..0] 11 MEM_MB_DQS_H[7..0]
MEM_MA_DM[7..0] MEM_MB_DM[7..0]
11 MEM_MA_DM[7..0] 11 MEM_MB_DM[7..0]
MEM_MA_ADD[15..0] MEM_MB_ADD[15..0]
11 MEM_MA_ADD[15..0] 11 MEM_MB_ADD[15..0]
MEM_MA_DATA[63..0] MEM_MB_DATA[63..0]
11 MEM_MA_DATA[63..0] 11 MEM_MB_DATA[63..0]
D D
CPU1B CPU1C
MA_DATA19 MB_DATA19
MEM CHB
MEM_MA_ADD15 M27 C26 MEM_MA_DATA18 MEM_MB_ADD15 N28 B25 MEM_MB_DATA18
MEM_MA_ADD14 MA_ADD15 MA_DATA18 MEM_MA_DATA17 MEM_MB_ADD14 MB_ADD15 MB_DATA18 MEM_MB_DATA17
N24 MA_ADD14 MA_DATA17 G23 N29 MB_ADD14 MB_DATA17 B23
MEM_MA_ADD13 AC26 F23 MEM_MA_DATA16 MEM_MB_ADD13 AE31 A22 MEM_MB_DATA16
MEM_MA_ADD12 MA_ADD13 MA_DATA16 MEM_MA_DATA15 MEM_MB_ADD12 MB_ADD13 MB_DATA16 MEM_MB_DATA15
N26 MA_ADD12 MA_DATA15 E22 N30 MB_ADD12 MB_DATA15 B21
MEM_MA_ADD11 P25 E21 MEM_MA_DATA14 MEM_MB_ADD11 P29 A20 MEM_MB_DATA14
MEM_MA_ADD10 MA_ADD11 MA_DATA14 MEM_MA_DATA13 MEM_MB_ADD10 MB_ADD11 MB_DATA14 MEM_MB_DATA13
Y25 MA_ADD10 MA_DATA13 F17 AA29 MB_ADD10 MB_DATA13 C16
MEM_MA_ADD9 N27 G17 MEM_MA_DATA12 MEM_MB_ADD9 P31 D15 MEM_MB_DATA12
MEM_MA_ADD8 MA_ADD9 MA_DATA12 MEM_MA_DATA11 MEM_MB_ADD8 MB_ADD9 MB_DATA12 MEM_MB_DATA11
R24 MA_ADD8 MA_DATA11 G22 R29 MB_ADD8 MB_DATA11 C21
MEM_MA_ADD7 P27 F21 MEM_MA_DATA10 MEM_MB_ADD7 R28 A21 MEM_MB_DATA10
MEM_MA_ADD6 MA_ADD7 MA_DATA10 MEM_MA_DATA9 MEM_MB_ADD6 MB_ADD7 MB_DATA10 MEM_MB_DATA9
R25 MA_ADD6 MA_DATA9 G18 R31 MB_ADD6 MB_DATA9 A17
MEM_MA_ADD5 R26 E17 MEM_MA_DATA8 MEM_MB_ADD5 R30 A16 MEM_MB_DATA8
B MEM_MA_ADD4 MA_ADD5 MA_DATA8 MEM_MA_DATA7 MEM_MB_ADD4 MB_ADD5 MB_DATA8 MEM_MB_DATA7 B
R27 MA_ADD4 MA_DATA7 G16 T31 MB_ADD4 MB_DATA7 B15
MEM_MA_ADD3 T25 E15 MEM_MA_DATA6 MEM_MB_ADD3 T29 A14 MEM_MB_DATA6
MEM_MA_ADD2 MA_ADD3 MA_DATA6 MEM_MA_DATA5 MEM_MB_ADD2 MB_ADD3 MB_DATA6 MEM_MB_DATA5
U25 MA_ADD2 MA_DATA5 G13 U29 MB_ADD2 MB_DATA5 E13
MEM_MA_ADD1 T27 H13 MEM_MA_DATA4 MEM_MB_ADD1 U28 F13 MEM_MB_DATA4
MEM_MA_ADD0 MA_ADD1 MA_DATA4 MEM_MA_DATA3 MEM_MB_ADD0 MB_ADD1 MB_DATA4 MEM_MB_DATA3
W24 MA_ADD0 MA_DATA3 H17 AA30 MB_ADD0 MB_DATA3 C15
E16 MEM_MA_DATA2 A15 MEM_MB_DATA2
MEM_MA_DQS_H7 MA_DATA2 MEM_MA_DATA1 MEM_MB_DQS_H7 MB_DATA2 MEM_MB_DATA1
AD15 MA_DQS_H7 MA_DATA1 E14 AK13 MB_DQS_H7 MB_DATA1 A13
MEM_MA_DQS_L7 AE15 G14 MEM_MA_DATA0 MEM_MB_DQS_L7 AJ13 D13 MEM_MB_DATA0
MEM_MA_DQS_H6 MA_DQS_L7 MA_DATA0 MEM_MB_DQS_H6 MB_DQS_L7 MB_DATA0
AG18 MA_DQS_H6 AK17 MB_DQS_H6
MEM_MA_DQS_L6 AG19 J28 MEM_MB_DQS_L6 AJ17 J31
MEM_MA_DQS_H5 MA_DQS_L6 MA_DQS_H8 MEM_MB_DQS_H5 MB_DQS_L6 MB_DQS_H8
AG24 MA_DQS_H5 MA_DQS_L8 J27 AK23 MB_DQS_H5 MB_DQS_L8 J30
MEM_MA_DQS_L5 AG25 MEM_MB_DQS_L5 AL23
MEM_MA_DQS_H4 MA_DQS_L5 MEM_MB_DQS_H4 MB_DQS_L5
AG27 MA_DQS_H4 MA_DM8 J25 AL28 MB_DQS_H4 MB_DM8 J29
MEM_MA_DQS_L4 AG28 MEM_MB_DQS_L4 AL29
MEM_MA_DQS_H3 MA_DQS_L4 MEM_MB_DQS_H3 MB_DQS_L4
D29 MA_DQS_H3 MA_CHECK7 K25 D31 MB_DQS_H3 MB_CHECK7 K29
MEM_MA_DQS_L3 C29 J26 VCC_DDR MEM_MB_DQS_L3 C31 K31 VCC_DDR
MEM_MA_DQS_H2 MA_DQS_L3 MA_CHECK6 MEM_MB_DQS_H2 MB_DQS_L3 MB_CHECK6
C25 MA_DQS_H2 MA_CHECK5 G28 C24 MB_DQS_H2 MB_CHECK5 G30
MEM_MA_DQS_L2 D25 G27 MEM_MB_DQS_L2 C23 G29
MEM_MA_DQS_H1 MA_DQS_L2 MA_CHECK4 MEM_MB_DQS_H1 MB_DQS_L2 MB_CHECK4
E19 MA_DQS_H1 MA_CHECK3 L24 D17 MB_DQS_H1 MB_CHECK3 L29
MEM_MA_DQS_L1 F19 K27 MEM_MB_DQS_L1 C17 L28
MEM_MA_DQS_H0 MA_DQS_L1 MA_CHECK2 R189 MEM_MB_DQS_H0 MB_DQS_L1 MB_CHECK2 R190
F15 MA_DQS_H0 MA_CHECK1 H29 C14 MB_DQS_H0 MB_CHECK1 H31
MEM_MA_DQS_L0 G15 H27 1KR0402 MEM_MB_DQS_L0 C13 G31 1KR0402
MA_DQS_L0 MA_CHECK0 MB_DQS_L0 MB_CHECK0
MEM_MA_DM7 AF15 W30 MEM_MA_EVENT_L MEM_MA_EVENT_L 11 MEM_MB_DM7 AJ14 V29 MEM_MB_EVENT_L MEM_MB_EVENT_L 11
MEM_MA_DM6 MA_DM7 MA_EVENT_L MEM_MB_DM6 MB_DM7 MB_EVENT_L
AF19 MA_DM6 AH17 MB_DM6
MEM_MA_DM5 AJ25 MEM_MB_DM5 AJ23
MEM_MA_DM4 MA_DM5 MEM_MB_DM4 MB_DM5
AH29 MA_DM4 AK29 MB_DM4
MEM_MA_DM3 B29 MEM_MB_DM3 C30
MEM_MA_DM2 MA_DM3 MEM_MB_DM2 MB_DM3
E24 MA_DM2 A23 MB_DM2
MEM_MA_DM1 E18 MEM_MB_DM1 B17
MEM_MA_DM0 MA_DM1 MEM_MB_DM0 MB_DM1
A H15 MA_DM0 B13 MB_DM0 A
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
VCCP VCCP
CPU1E CPU1F
X_C0.01u50Y5
C0.01u50Y5
H11 B24 U22 N15 A6 AA13 AJ1 H1 VLDT_RUN_B
VDD_13 VSS_13 VDD_98 VSS_98 VDDNB_2 VSS_172 VLDT_A_1 VLDT_B_1
H23 VDD_14 VSS_14 B26 V9 VDD_99 VSS_99 N17 B5 VDDNB_3 VSS_173 AA15 AJ2 VLDT_A_2 VLDT_B_2 H2
C109
C110
J8 VDD_15 VSS_15 B28 V11 VDD_100 VSS_100 N19 B7 VDDNB_4 VSS_174 AA17 AJ3 VLDT_A_3 VLDT_B_3 H5
D J12 B30 V13 N21 C6 AA19 CPU_VDDR_B AJ4 H6 C111 C108 D
VDD_16 VSS_16 VDD_101 VSS_101 VDDNB_5 VSS_175 VLDT_A_4 VLDT_B_4 CPU_VDDR C10u6.3X50805 X_C0.01u50Y5
J14 VDD_17 VSS_17 C3 V15 VDD_102 VSS_102 N23 C8 VDDNB_6 VSS_176 AA21
J16 VDD_18 VSS_18 D14 V17 VDD_103 VSS_103 P2 D7 VDDNB_7 VSS_177 AA23
J18 VDD_19 VSS_19 D16 V19 VDD_104 VSS_104 P3 D9 VDDNB_8 VSS_178 AB2 A12 VDDR_1 VDDR_5 AG12
J20 VDD_20 VSS_20 D18 V21 VDD_105 VSS_105 P8 E8 VDDNB_9 VSS_179 AB3 B12 VDDR_2 VDDR_6 AH12
J22 VDD_21 VSS_21 D20 V23 VDD_106 VSS_106 P10 E10 VDDNB_10 VSS_180 AB8 C12 VDDR_3 VDDR_7 AJ12
J24 D22 W4 P12 F9 AB10 VCC_DDR D12 AK12
VDD_22 VSS_22 VDD_107 VSS_107 VDDNB_11 VSS_181 VDDR_4 VDDR_8
K7 VDD_23 VSS_23 D24 W5 VDD_108 VSS_108 P14 F11 VDDNB_12 VSS_182 AB12 VDDR_9 AL12
K9 VDD_24 VSS_24 D26 W8 VDD_109 VSS_109 P16 G10 VDDNB_13 VSS_183 AB14
K11 VDD_25 VSS_25 D28 W10 VDD_110 VSS_110 P18 G12 VDDNB_14 VSS_184 AB16 M24 VDDIO_1
K13 VDD_26 VSS_26 D30 W12 VDD_111 VSS_111 P20 VSS_185 AB18 M26 VDDIO_2 VSS_215 AF18
K15 VDD_27 VSS_27 E11 W14 VDD_112 VSS_112 P22 VSS_186 AB20 M28 VDDIO_3 VSS_216 AF20
K17 VDD_28 VSS_28 F4 W16 VDD_113 VSS_113 R7 VSS_187 AB22 M30 VDDIO_4 VSS_217 AF22
K19 F14 W18 R9 AC7 P24 AF24
POWER/GND4
VDD_29 VSS_29 VDD_114 VSS_114 VSS_188 VDDIO_5 VSS_218
K21 VDD_30 VSS_30 F16 W20 VDD_115 VSS_115 R11 VSS_189 AC9 P26 VDDIO_6 VSS_219 AF26
K23 F18 W22 R13 AC11 P28 AF28
POWER/GND3
VDD_31 VSS_31 VDD_116 VSS_116 VSS_190 VDDIO_7 VSS_220
L4 VDD_32 VSS_32 F20 Y2 VDD_117 VSS_117 R15 VSS_191 AC13 P30 VDDIO_8 VSS_221 AG10
L5 VDD_33 VSS_33 F22 Y3 VDD_118 VSS_118 R17 VSS_192 AC15 T24 VDDIO_9 VSS_222 AG11
L8 VDD_34 VSS_34 F24 Y7 VDD_119 VSS_119 R19 VSS_193 AC17 T26 VDDIO_10 VSS_223 AH14
L10 VDD_35 VSS_35 F26 Y9 VDD_120 VSS_120 R21 VSS_194 AC19 T28 VDDIO_11 VSS_224 AH16
L12 VDD_36 VSS_36 F28 Y11 VDD_121 VSS_121 R23 VSS_195 AC21 T30 VDDIO_12 VSS_225 AH18
L14 VDD_37 VSS_37 F30 Y13 VDD_122 VSS_122 T8 VSS_196 AC23 V25 VDDIO_13 VSS_226 AH20
L16 G9 Y15 T10 AD8 V26 AH22
POWER/GND2
VDD_38 VSS_38 VDD_123 VSS_123 VSS_197 VDDIO_14 VSS_227
L18 G11 Y17 T12 AD10 V28 AH24
POWER/GND1
C186
C192
C177
C188
R12 VDD_74 VSS_74 K30 AD11 VDD_159 VSS_159 Y8
R14 L7 AD23 Y10 C101 C0.22u16X
VDD_75 VSS_75 VDD_160 VSS_160
X_C2200p10X0402
X_C2200p10X0402
X_C2200p10X0402
X_C2200p10X0402
R16 L9 AE10 Y12 C87 X_C0.01u50X C195 C0.22u16X
VDD_76 VSS_76 VDD_161 VSS_161
R18 VDD_77 VSS_77 L11 AE12 VDD_162 VSS_162 Y14
R20 L13 AF7 Y16 C648 C646 C102 C103 C0.22u16X
VDD_78 VSS_78 VDD_163 VSS_163 X_C2.2u6.3X5 C91 C0.22u16X C211 X_C0.22u16X
R22 VDD_79 VSS_79 L15 AF9 VDD_164 VSS_164 Y18 X_C2.2u6.3X5
T2 VDD_80 VSS_80 L17 AF11 VDD_165 VSS_165 Y20
T3 L19 AG4 Y22 VCCP_NB
VDD_81 VSS_81 VDD_166 VSS_166 C82 C4.7u10Y0805 C169 C0.22u16X
T7 VDD_82 VSS_82 L21 AG5 VDD_167 VSS_167 AA4
T9 L23 AG7 AA5 X_C2.2u6.3X5 C92 C4.7u10Y0805
VDD_83 VSS_83 VDD_168 VSS_168 bottom
T11 VDD_84 VSS_84 M8 AH2 VDD_169 VSS_169 AA7
T13 M10 AH3 AA9 C77 C4.7u10Y0805 C210 X_C0.22u16X
VDD_85 VSS_85 VDD_170 VSS_170 VCC_DDR VCCP_NB
VCC_DDR VCCP_NB
ZIF-SOCKET941-RH ZIF-SOCKET941-RH C81 C10u6.3X50805 C75 X_C4.7u10Y0805 C179 C4.7u10Y0805
C98 C180p50N0402
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
C1000p50X0402
X_C0.1u25Y0402-RH
C470p50X0402
X_C180p50N0402
C470p50X0402
C470p50X0402
C470p50X0402
C1000p50X0402
X_C0.01u50X
bottom
C615 C22u6.3X1206 C104 C0.01u50X C173 C4.7u10Y0805
bottom
VCCP
VCCA_1V2 CAP VCC_DDR
VCC_DDR CAP C645 X_C22u6.3X1206
VCCP CAP VCCP
VCCA_1V2 bottom
C355 C0.22u16X C628 C180p50N0402
C164 C4.7u10Y0805 VCC_DDR C636 C22u6.3X1206
MEM_MA_DQS_H[7..0]
9 MEM_MA_DQS_H[7..0] MEM_MB_DQS_H[7..0]
MEM_MA_DQS_L[7..0] 9 MEM_MB_DQS_H[7..0]
9 MEM_MA_DQS_L[7..0] MEM_MB_DQS_L[7..0]
MEM_MA_DM[7..0] VCC3 9 MEM_MB_DQS_L[7..0]
9 MEM_MA_DM[7..0] MEM_MB_DM[7..0] VCC3
MEM_MA_ADD[15..0] 9 MEM_MB_DM[7..0]
9 MEM_MA_ADD[15..0] MEM_MB_ADD[15..0]
MEM_MA_DATA[63..0] 9 MEM_MB_ADD[15..0]
9 MEM_MA_DATA[63..0] MEM_MB_DATA[63..0]
9 MEM_MB_DATA[63..0]
C241
X_C0.1u16Y0402 C353
VCC_DDR VTT_DDR VCC_DDR C0.1u16Y0402
VTT_DDR
MEM_MB_EVENT_L
MEM_MB_EVENT_L 9
MEM_MA_EVENT_L
MEM_MA_EVENT_L 9
D D
170
173
176
179
182
183
186
189
191
194
197
236
120
240
167
187
198
51
54
57
60
62
65
66
69
72
75
78
68
53
79
48
49
170
173
176
179
182
183
186
189
191
194
197
236
120
240
167
187
198
DIMM1
51
54
57
60
62
65
66
69
72
75
78
68
53
79
48
49
DIMM2
VTT
VTT
NC/ERR_OUT
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
NC/PAR_IN
RSVD
NC/TEST4
FREE1
FREE2
FREE3
FREE4
MEM_MA_DATA0 3 188 MEM_MA_ADD0
VTT
VTT
NC/ERR_OUT
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
NC/PAR_IN
RSVD
NC/TEST4
FREE1
FREE2
FREE3
FREE4
MEM_MA_DATA1 DQ0 A0 MEM_MA_ADD1 MEM_MB_DATA0 MEM_MB_ADD0
4 DQ1 A1 181 3 DQ0 A0 188
MEM_MA_DATA2 9 61 MEM_MA_ADD2 MEM_MB_DATA1 4 181 MEM_MB_ADD1
MEM_MA_DATA3 DQ2 A2 MEM_MA_ADD3 MEM_MB_DATA2 DQ1 A1 MEM_MB_ADD2
10 DQ3 A3 180 9 DQ2 A2 61
MEM_MA_DATA4 122 59 MEM_MA_ADD4 MEM_MB_DATA3 10 180 MEM_MB_ADD3
MEM_MA_DATA5 DQ4 A4 MEM_MA_ADD5 MEM_MB_DATA4 DQ3 A3 MEM_MB_ADD4
123 DQ5 A5 58 122 DQ4 A4 59
MEM_MA_DATA6 128 178 MEM_MA_ADD6 MEM_MB_DATA5 123 58 MEM_MB_ADD5
MEM_MA_DATA7 DQ6 A6 MEM_MA_ADD7 MEM_MB_DATA6 DQ5 A5 MEM_MB_ADD6
129 DQ7 A7 56 128 DQ6 A6 178
MEM_MA_DATA8 12 177 MEM_MA_ADD8 MEM_MB_DATA7 129 56 MEM_MB_ADD7
MEM_MA_DATA9 DQ8 A8 MEM_MA_ADD9 MEM_MB_DATA8 DQ7 A7 MEM_MB_ADD8
13 DQ9 A9 175 12 DQ8 A8 177
MEM_MA_DATA10 18 70 MEM_MA_ADD10 MEM_MB_DATA9 13 175 MEM_MB_ADD9
MEM_MA_DATA11 DQ10 A10/AP MEM_MA_ADD11 MEM_MB_DATA10 DQ9 A9 MEM_MB_ADD10
19 DQ11 A11 55 18 DQ10 A10/AP 70
MEM_MA_DATA12 131 174 MEM_MA_ADD12 MEM_MB_DATA11 19 55 MEM_MB_ADD11
MEM_MA_DATA13 DQ12 A12 MEM_MA_ADD13 MEM_MB_DATA12 DQ11 A11 MEM_MB_ADD12
132 DQ13 A13 196 131 DQ12 A12 174
MEM_MA_DATA14 137 172 MEM_MA_ADD14 MEM_MB_DATA13 132 196 MEM_MB_ADD13
MEM_MA_DATA15 DQ14 A14 MEM_MA_ADD15 VCC3 MEM_MB_DATA14 DQ13 A13 MEM_MB_ADD14
138 DQ15 A15 171 137 DQ14 A14 172
MEM_MA_DATA16 21 MEM_MB_DATA15 138 171 MEM_MB_ADD15
MEM_MA_DATA17 DQ16 MEM_MB_DATA16 DQ15 A15
22 39 21
Y
MEM_MA_DATA18 DQ17 CB0 MEM_MB_DATA17 DQ16
27 DQ18 CB1 40 22 DQ17 CB0 39
MEM_MA_DATA19 28 45 D21 MEM_MB_DATA18 27 40
MEM_MA_DATA20 DQ19 CB2 SCL0 X_1PS226_SOT23 MEM_MB_DATA19 DQ18 CB1
140 DQ20 CB3 46 Z 28 DQ19 CB2 45
MEM_MA_DATA21 141 158 MEM_MB_DATA20 140 46
MEM_MA_DATA22 DQ21 CB4 MEM_MB_DATA21 DQ20 CB3
146 DQ22 CB5 159 141 DQ21 CB4 158
MEM_MA_DATA23 147 164 MEM_MB_DATA22 146 159
X
MEM_MA_DATA24 DQ23 CB6 MEM_MB_DATA23 DQ22 CB5
30 DQ24 CB7 165 147 DQ23 CB6 164
MEM_MA_DATA25 31 MEM_MB_DATA24 30 165
MEM_MA_DATA26 DQ25 MEM_MA_DQS_H0 MEM_MB_DATA25 DQ24 CB7
36 DQ26 DQS0 7 31 DQ25
MEM_MA_DATA27 37 6 MEM_MA_DQS_L0 MEM_MB_DATA26 36 7 MEM_MB_DQS_H0
MEM_MA_DATA28 DQ27 DQS0# MEM_MA_DQS_H1 VCC3 MEM_MB_DATA27 DQ26 DQS0 MEM_MB_DQS_L0
149 DQ28 DQS1 16 37 DQ27 DQS0# 6
MEM_MA_DATA29 150 15 MEM_MA_DQS_L1 MEM_MB_DATA28 149 16 MEM_MB_DQS_H1
MEM_MA_DATA30 DQ29 DQS1# MEM_MA_DQS_H2 MEM_MB_DATA29 DQ28 DQS1 MEM_MB_DQS_L1
155 DQ30 DQS2 25 150 DQ29 DQS1# 15
MEM_MA_DATA31 156 24 MEM_MA_DQS_L2 MEM_MB_DATA30 155 25 MEM_MB_DQS_H2
Y
MEM_MA_DATA32 DQ31 DQS2# MEM_MA_DQS_H3 MEM_MB_DATA31 DQ30 DQS2 MEM_MB_DQS_L2
C 81 DQ32 DQS3 34 156 DQ31 DQS2# 24 C
MEM_MA_DATA33 82 33 MEM_MA_DQS_L3 D19 MEM_MB_DATA32 81 34 MEM_MB_DQS_H3
MEM_MA_DATA34 DQ33 DQS3# MEM_MA_DQS_H4 SDA0 X_1PS226_SOT23 MEM_MB_DATA33 DQ32 DQS3 MEM_MB_DQS_L3
87 DQ34 DQS4 85 Z 82 DQ33 DQS3# 33
MEM_MA_DATA35 88 84 MEM_MA_DQS_L4 MEM_MB_DATA34 87 85 MEM_MB_DQS_H4
MEM_MA_DATA36 DQ35 DQS4# MEM_MA_DQS_H5 MEM_MB_DATA35 DQ34 DQS4 MEM_MB_DQS_L4
200 DQ36 DQS5 94 88 DQ35 DQS4# 84
MEM_MA_DATA37 201 93 MEM_MA_DQS_L5 MEM_MB_DATA36 200 94 MEM_MB_DQS_H5
X
MEM_MA_DATA38 DQ37 DQS5# MEM_MA_DQS_H6 MEM_MB_DATA37 DQ36 DQS5 MEM_MB_DQS_L5
206 DQ38 DQS6 103 201 DQ37 DQS5# 93
MEM_MA_DATA39 207 102 MEM_MA_DQS_L6 MEM_MB_DATA38 206 103 MEM_MB_DQS_H6
MEM_MA_DATA40 DQ39 DQS6# MEM_MA_DQS_H7 MEM_MB_DATA39 DQ38 DQS6 MEM_MB_DQS_L6
90 DQ40 DQS7 112 207 DQ39 DQS6# 102
MEM_MA_DATA41 91 111 MEM_MA_DQS_L7 MEM_MB_DATA40 90 112 MEM_MB_DQS_H7
MEM_MA_DATA42 DQ41 DQS7# MEM_MB_DATA41 DQ40 DQS7 MEM_MB_DQS_L7
96 DQ42 DQS8 43 91 DQ41 DQS7# 111
MEM_MA_DATA43 97 42 MEM_MB_DATA42 96 43
DQ43
DDR3 DQS8# VCC_DDR DQ42 DQS8
X_C0.1u25Y0402-RH
MEM_MA_DATA44 209 MEM_MB_DATA43 97 42
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
210
215
216
DQ44
DQ45
DQ46
DQ47
DM0/DQS9
NC/DQS9#
DM1/DQS10
125
126
134
MEM_MA_DM0
MEM_MA_DM1 VDDR_VREF_DQ
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
209
210
215
DQ43
DQ44
DQ45
DQ46
DDR3 DQS8#
DM0/DQS9
NC/DQS9#
125
126
MEM_MB_DM0
C62
MEM_MA_DATA50 105 144 R119 MEM_MB_DATA49 100 143 MEM_MB_DM2
MEM_MA_DATA51 DQ50 NC/DQS11# MEM_MA_DM3 15R1% MEM_MB_DATA50 DQ49 DM2/DQS11
106 DQ51 DM3/DQS12 152 105 DQ50 NC/DQS11# 144
MEM_MA_DATA52 218 153 MEM_MB_DATA51 106 152 MEM_MB_DM3
MEM_MA_DATA53 DQ52 NC/DQS12# MEM_MA_DM4 VDDR_VREF_DQ MEM_MB_DATA52 DQ51 DM3/DQS12
219 DQ53 DM4/DQS13 203 218 DQ52 NC/DQS12# 153
MEM_MA_DATA54 224 204 MEM_MB_DATA53 219 203 MEM_MB_DM4
MEM_MA_DATA55 DQ54 NC/DQS13# MEM_MA_DM5 MEM_MB_DATA54 DQ53 DM4/DQS13
225 DQ55 DM5/DQS14 212 224 DQ54 NC/DQS13# 204
MEM_MA_DATA56 108 213 C69 MEM_MB_DATA55 225 212 MEM_MB_DM5
MEM_MA_DATA57 DQ56 NC/DQS14# MEM_MA_DM6 R113 C58 MEM_MB_DATA56 DQ55 DM5/DQS14
109 DQ57 DM6/DQS15 221 C1000p16X0402 108 DQ56 NC/DQS14# 213
MEM_MA_DATA58 114 222 15R1% C0.1u25Y0402-RH MEM_MB_DATA57 109 221 MEM_MB_DM6
MEM_MA_DATA59 DQ58 NC/DQS15# MEM_MA_DM7 MEM_MB_DATA58 DQ57 DM6/DQS15
115 DQ59 DM7/DQS16 230 114 DQ58 NC/DQS15# 222
MEM_MA_DATA60 227 231 MEM_MB_DATA59 115 230 MEM_MB_DM7
MEM_MA_DATA61 DQ60 NC/DQS16# MEM_MB_DATA60 DQ59 DM7/DQS16
228 DQ61 DM8/DQS17 161 227 DQ60 NC/DQS16# 231
MEM_MA_DATA62 233 162 MEM_MB_DATA61 228 161
MEM_MA_DATA63 DQ62 NC/DQS17# MEM_MB_DATA62 DQ61 DM8/DQS17
234 DQ63 233 DQ62 NC/DQS17# 162
195 MEM_MA0_ODT0 MEM_MB_DATA63 234
ODT0 MEM_MA0_ODT0 9 DQ63
2 77 MEM_MA0_ODT1 195 MEM_MB0_ODT0
VSS ODT1 MEM_MA0_ODT1 9 VCC_DDR ODT0 MEM_MB0_ODT0 9
X_C0.1u25Y0402-RH
5 50 MEM_MA_CKE0 MEM_MA_CKE0 9 2 77 MEM_MB0_ODT1
VSS CKE0 VSS ODT1 MEM_MB0_ODT1 9
8 169 MEM_MA_CKE1 MEM_MA_CKE1 9 5 50 MEM_MB_CKE0 MEM_MB_CKE0 9
VSS CKE1 MEM_MA0_CS_L0 VSS CKE0 MEM_MB_CKE1
11 VSS CS0# 193 MEM_MA0_CS_L0 9 8 VSS CKE1 169 MEM_MB_CKE1 9
14 76 MEM_MA0_CS_L1 VDDR_VREF_CA 11 193 MEM_MB0_CS_L0
B VSS CS1# MEM_MA0_CS_L1 9 VSS CS0# MEM_MB0_CS_L0 9 B
C154
17 71 MEM_MA_BANK0 MEM_MA_BANK0 9 14 76 MEM_MB0_CS_L1 MEM_MB0_CS_L1 9
VSS BA0 MEM_MA_BANK1 VSS CS1# MEM_MB_BANK0
20 VSS BA1 190 MEM_MA_BANK1 9 17 VSS BA0 71 MEM_MB_BANK0 9
23 52 MEM_MA_BANK2 MEM_MA_BANK2 9 R181 20 190 MEM_MB_BANK1 MEM_MB_BANK1 9
VSS BA2 15R1% VSS BA1 MEM_MB_BANK2
26 VSS 23 VSS BA2 52 MEM_MB_BANK2 9
29 73 MEM_MA_WE_L 26
VSS WE# MEM_MA_WE_L 9 VSS
32 192 MEM_MA_RAS_L MEM_MA_RAS_L 9 VDDR_VREF_CA 29 73 MEM_MB_WE_L
VSS RAS# VSS WE# MEM_MB_WE_L 9
35 74 MEM_MA_CAS_L MEM_MA_CAS_L 9 32 192 MEM_MB_RAS_L MEM_MB_RAS_L 9
VSS CAS# MEM_MA_RESET# VSS RAS# MEM_MB_CAS_L
38 VSS RESET# 168 MEM_MA_RESET# 9 35 VSS CAS# 74 MEM_MB_CAS_L 9
41 C171 38 168 MEM_MB_RESET# MEM_MB_RESET# 9
VSS MEM_MA0_CLK_H0 R183 C160 VSS RESET#
44 VSS CK0 184 MEM_MA0_CLK_H0 9 C1000p16X0402 41 VSS
47 185 MEM_MA0_CLK_L0 MEM_MA0_CLK_L0 9 15R1% C0.1u25Y0402-RH 44 184 MEM_MB0_CLK_H0 MEM_MB0_CLK_H0 9
VSS CK0# MEM_MA0_CLK_H1 VSS CK0 MEM_MB0_CLK_L0
80 VSS CK1(NU) 63 MEM_MA0_CLK_H1 9 47 VSS CK0# 185 MEM_MB0_CLK_L0 9
83 64 MEM_MA0_CLK_L1 MEM_MA0_CLK_L1 9 80 63 MEM_MB0_CLK_H1 MEM_MB0_CLK_H1 9
VSS CK1#(NU) VSS CK1(NU) MEM_MB0_CLK_L1
86 VSS 83 VSS CK1#(NU) 64 MEM_MB0_CLK_L1 9
89 1 VDDR_VREF_DQ VDDR_VREF_DQ 86
VSS VREFDQ VDDR_VREF_CA VSS VDDR_VREF_DQ
92 VSS VREFCA 67 VDDR_VREF_CA 89 VSS VREFDQ 1
95 118 SCL0 92 67 VDDR_VREF_CA
VSS SCL SCL0 6,7,19,30 VSS VREFCA
98 238 SDA0 95 118 SCL0
VSS SDA SDA0 6,7,19,30 VSS SCL SCL0 6,7,19,30
101 237 98 238 SDA0
VSS SA1 VDDR_VREF_DQ VDDR_VREF_DQ VDDR_VREF_CA VDDR_VREF_CA VSS SDA SDA0 6,7,19,30
MEC1
MEC2
MEC3
MEC1
MEC2
MEC3
104 117 VCC3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS SA0
DDRIII-240P_BLUE-RH
107
110
113
116
119
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
199
202
205
208
211
214
217
220
223
226
229
232
235
239
MEC1
MEC2
MEC3
DDRIII-240P_BLUE-RH
107
110
113
116
119
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
199
202
205
208
211
214
217
220
223
226
229
232
235
239
MEC1
MEC2
MEC3
C314 C66 C162 C771
ADDRESS A0 VTT_DDR
ADDRESS A2
C284 X_C4.7u6.3X5
A A
C344 X_C4.7u6.3X5
VTT_DDR
C269 C0.1u16Y0402
C268 X_C0.1u16Y0402
MICRO-START INT'L CO.,LTD.
Title
11 First Logical DDR DIMM
C266 C0.1u16Y0402
Size Document Number Rev
Custom MS_7641 30
Date: Tuesday, August 02, 2011 Sheet 11 of 36
5 4 3 2 1
5 4 3 2 1
D D
HT_CADOUT_H[15..0] HT_CADIN_H[15..0]
8 HT_CADOUT_H[15..0] 8 HT_CADIN_H[15..0]
HT_CADOUT_L[15..0] HT_CADIN_L[15..0]
8 HT_CADOUT_L[15..0] 8 HT_CADIN_L[15..0]
20 / 5 / 5 / 5 / 20 20 / 5 / 5 / 5 / 20
NB1A
HT_CADOUT_H0 Y25 D24 HT_CADIN_H0
HT_CADOUT_L0 HT_RXCAD0P HT_TXCAD0P HT_CADIN_L0
HT_CADOUT_H1
Y24 HT_RXCAD0N PART 1 OF 6 HT_TXCAD0N D25
HT_CADIN_H1
V22 HT_RXCAD1P HT_TXCAD1P E24 REF2
HT_CADOUT_L1 V23 E25 HT_CADIN_L1
HT_CADOUT_H2 HT_RXCAD1N HT_TXCAD1N HT_CADIN_H2
V25 HT_RXCAD2P HT_TXCAD2P F24
HT_CADOUT_L2 V24 F25 HT_CADIN_L2
HT_RXCAD2N HT_TXCAD2N
NB
HT_CADOUT_H3 U24 F23 HT_CADIN_H3
HT_CADOUT_L3 HT_RXCAD3P HT_TXCAD3P HT_CADIN_L3
U25 HT_RXCAD3N HT_TXCAD3N F22
HT_CADOUT_H4 T25 H23 HT_CADIN_H4
HT_CADOUT_L4 HT_RXCAD4P HT_TXCAD4P HT_CADIN_L4
T24 HT_RXCAD4N HT_TXCAD4N H22
HT_CADOUT_H5 HT_CADIN_H5
NB
HT_CADOUT_L10 AA25 J21 HT_CADIN_L10
HT_CADOUT_H11 HT_RXCAD10N HT_TXCAD10N HT_CADIN_H11
Y22 HT_RXCAD11P HT_TXCAD11P J18
HT_CADOUT_L11 Y23 K17 HT_CADIN_L11
HT_CADOUT_H12 HT_RXCAD11N HT_TXCAD11N HT_CADIN_H12
W21 HT_RXCAD12P HT_TXCAD12P L19
HT_CADOUT_L12 W20 J19 HT_CADIN_L12
HT_CADOUT_H13 HT_RXCAD12N HT_TXCAD12N HT_CADIN_H13
V21 HT_RXCAD13P HT_TXCAD13P M19
HT_CADOUT_L13 V20 L18 HT_CADIN_L13
HT_CADOUT_H14 HT_RXCAD13N HT_TXCAD13N HT_CADIN_H14 X_785G
U20 HT_RXCAD14P HT_TXCAD14P M21
HT_CADOUT_L14 U21 P21 HT_CADIN_L14
HT_CADOUT_H15 HT_RXCAD14N HT_TXCAD14N HT_CADIN_H15
U19 HT_RXCAD15P HT_TXCAD15P P18
HT_CADOUT_L15 U18 M18 HT_CADIN_L15
HT_RXCAD15N HT_TXCAD15N
I/F
8 HT_CLKOUT_H0 T22 HT_RXCLK0P HT_TXCLK0P H24 HT_CLKIN_H0 8
8 HT_CLKOUT_L0 T23 HT_RXCLK0N HT_TXCLK0N H25 HT_CLKIN_L0 8
8 HT_CLKOUT_H1 AB23 HT_RXCLK1P HT_TXCLK1P L21 HT_CLKIN_H1 8
8 HT_CLKOUT_L1 AA22 HT_RXCLK1N HT_TXCLK1N L20 HT_CLKIN_L1 8
AMD-215-0674007-00-A01-RH 5 / 10
HT_TXCALP
100R 1.21K 301R
C107 C106 HT_TXCALN
X_C0.01u16X0402 X_C0.01u16X0402
A
Adding some 0.01僴uF stitching A
capacitors for crossing a split when
these signals change different reference
layer.
MICRO-START INT'L CO.,LTD.
Title
13 760G&785G&880G-HT
Size Document Number Rev
Custom MS_7641 30
Date: Tuesday, July 26, 2011 Sheet 12 of 36
5 4 3 2 1
5 4 3 2 1
B B
AMD-215-0674007-00-A01-RH
1.2V (RS740) 1.1V(RS780)
RX780/RS740/RS780 GPP difference table
RS740 RX780/RS780 RX780/RS740/RS780 GPP Routing table
PCE_CALRP 562R (GND) 1.27K (GND) RS740 RX780/RS780
+1.8V_S0
SPEC. HI:0.7VCC LOW:0.3VCC CP4
X_Copper
VCC3
R289 FB6
ANALOG POWER X5R
RS780
330R0402 AVDD 15 MILS WIDTH
NB_PWRGD_IN X_220L2A-50 C278
C282
NB_PWRGD_IN must have a pull-up +1.8V_S0 C2.2u6.3X5 C0.1u16Y0402
resister to +1.8V_S0 due to
NC7W207 output pin is op-drain
R262 AVDDI 15 MILS WIDTH
3VDUAL For meet power NB1C
sequence C263 F12 A22
CP3 X_Copper C2.2u6.3X5 AVDD TXOUT_L0P
D
E12 AVDD PART 3 OF 6 TXOUT_L0N B22
D
F14 AVDDDI TXOUT_L1P A21
R360 X_R/2 SB_PWRGD R367 +1.8V_S0 G15 B21
30 SYS_PWRGD 15 MILS WIDTH AVSSDI TXOUT_L1N
X_4.7KR0402 FB4 AVDDQ H15 B20
AVDDQ TXOUT_L2P
H14 AVSSQ TXOUT_L2N A20
SB_PWRGD 19 X_220L2A-50 C261 A19
R368 X_R/2 NB_PWRGD_IN C262 TXOUT_L3P
19 WD_PWRGD E17 C TXOUT_L3N B19
C2.2u6.3X5 C0.1u16Y0402
CRT/TVOUT
F17 Y
F15 COMP TXOUT_U0P B18
TXOUT_U0N A18
C254 X_C10p50N0402 10 MILS WIDTH G18 A17
25 R RED TXOUT_U1P
R256 140R1%0402 G17 B17
C240 X_C10p50N0402 10 MILS WIDTH RED# TXOUT_U1N
25 G E18 GREEN TXOUT_U2P D20
R254 150R1%0402
C239 X_C10p50N0402 10 MILS WIDTH
F18
E19
GREEN# TXOUT_U2N D21
D18
if not support DVI can remove C684 C683 C685 C686
25 B BLUE TXOUT_U3P
R249 150R1%0402 F19 D19
BLUE# TXOUT_U3N +1.8V_S0
HSYNC# A11 B16 CP48
15,25 HSYNC# DAC_HSYNC TXCLK_LP
VSYNC# B11 A16 X_Copper
15,25 VSYNC# DAC_VSYNC TXCLK_LN
R303 F8 D16
25 DDC_CLK DAC_SCL TXCLK_UP
1.1V R311 E8 D17 FB11
25 DDC_DATA DAC_SDA TXCLK_UN
15 MILS WIDTH
VCC1_1 FB7 220L2A-50 715R1%0402 R267 DAC_RSET G14
PLL X5R RS780 DAC_RSET C683 X_220L2A-50
VDDLTP18 A13 RS780
Q67
15 MILS WIDTH PLLVDD A12 B13 C684 +1.8V_S0
220L2A-50 15 MILS WIDTH PLLVDD18 PLLVDD VSSLTP18 CP49 N-P8503BMG_SOT23-3-RH
D14 PLLVDD18 X_0.1u/16v/Y5/4
+1.8V_S0 FB5 C273 B12 A15 X_C2.2u6.3X5 15 MILS WIDTH X_Copper
LVTM
PLLVSS VDDLT18
S
C288 C2.2u6.3X5 C276 B15
PLL PWR
VDDLT18
G
FB3 220L2A-50 C2.2u6.3X5 C0.1u16Y0402 H17 A14 FB12
VDDA18HTPLL VDDLT33 R596
15 MILS WIDTH VDDA18HTPLL B14 VDDLT33 R261 X_0R0402 VCC3
FB10 220L2A-50 VDDA18PCIEPLL VDDLT33
15 MILS WIDTH D7 VDDA18PCIEPLL +12V
E7 C14 RS740 C685 X_220L2A-50
FB9 C333 C334 VDDA18PCIEPLL VSSLT X_C4.7u10X50805-RH C686
VSSLT D15 4.7KR0402
C649 C250 C0.1u16Y0402 SYSRESET# D8 C16 X_1u/6.3v/Y5/4 RS780
X_220L2A-50 C2.2u6.3X5 C0.1u16Y0402 C2.2u6.3X5 NB_PWRGD_IN SYSRESET# VSSLT
A10 POWERGOOD VSSLT C18
Stuff : RS740 LDT_STOP#_NB C10 C20
ALLOW_LDTSTOP_NB LDTSTOP# VSSLT
C12 E20
PM
C ALLOW_LDTSTOP VSSLT C
VSSLT C22
7 HTREFCLK HTREFCLK C25 ANALOG POWER X5R
HTREFCLK# HT_REFCLKP
7 HTREFCLK# C24 HT_REFCLKN R259 X_0R0402
NB_OSC_14M COMM_EN 22
7 NB_OSC_14M E11 REFCLK_P
CLOCKs
F11 E9 R295 4.7KR0402 VCC3
R288 150R1%0402 R287 150R1%0402 REFCLK_N GPIO3
VCC1_1 GPIO2 F7
7 NBGFX_SRCCLK T2 GFX_REFCLKP GPIO4 G12
7 NBGFX_SRCCLK# T1 GFX_REFCLKN R581
B9,A9 pulling up resistors are stuffed for not
ANALOG POWER X5R
U1 GPP_REFCLKP
working and hardware reseting issue.B8,A8 U2
pulling up resistors are reserved. GPP_REFCLKN
X_1.27KR1%0402
Stuff : RX780 7 NBLINKCLK V4 GPPSB_REFCLKP
Nc : RS780 7 NBLINKCLK# V3 GPPSB_REFCLKN
RX740/RS740/RS780 difference table I2C_CLK B9
I2C_DATA I2C_CLK TMDS_HPD0
A9 D9
RS740 RX780 RS780 22 DDC_DATA_B8 DDC_DATA_B8 B8
I2C_DATA MIS. TMDS_HPD
D10
TMDS_HPD0 22
DDC_DATA HPD RS740_DFT_GPIO5 15
22 DDC_CLK_A8 DDC_CLK_A8 A8
NB_PWRGD IN 3.3V IN 1.8V IN 1.8V IN DDC_CLK R281 10KR0402
15 RS740_DFT_GPIO0 B7 AUX1P TVCLKIN D12
VCC3 A7
ALLOW_LDTSTOP OC OC OC/3.3V IN AUX1N
THERMALDIODE_P AE8
OUT(default)/IN * R293 X_10KR0402 STRP_DATA B10 AD8 R283 X_10KR0402 VCC3
STRP_DATA THERMALDIODE_N
LDT_STOP# 3.3V IN 1.8V IN 1.8V IN/OC TP21 G11 D13 TEST_EN
IN(default)/IN * VSS TESTMODE
RS740_DFT_GPIO1 C8 R272 RX780/RS740/RS780 DEBUG PIN MAPPING
15 RS740_DFT_GPIO1 AUX_CAL 1.8KR0402 RX780 RS740 RS780
*, CLMC mode: NB send LDT_STOP#, ALLOW_LDTSTOP will become input RS780 & DDR3 based CPU: AMD-215-0674007-00-A01-RH
use an open-drain buffer and pulled up to 1.8V_S0 DEBUG_OUT0 RED(DFT_GPIO0) LVDS_DIGON LVDS_DIGON
through a 1-kR 5% resistor on the Northbridge side STRP_DATA RS740/RX780/RS780: STRAP_DEBUG_BUS_GPIO_ENABLE
+1.8V_S0 If not implemented: DEBUG_OUT1 GREEN(DFT_GPIO1) LVDS_ENA_BL LVDS_ENA_BL
RS740: Pulled up to 3.3 V with a 10-k? 5% resistor.
RS780: Not Connected. Enables the Test Debug Bus using GPIO and/or memory IO DEBUG_OUT2 Y(DFT_GPIO2) LVDS_BLON LVDS_BLON
RX780: Pulled up to 1.8 V with a 10-k? 5% resistor.
B 1 : Disable (RS740); Enable (RX780/RS780) B
Q33 GPP_REFCLK NC 100M DIFF 100M DIFF(OUT) 0 : I2C Master can load strap values from EEPROM if connected, or use
NN-CMKT3904_SOT363-6-RH default values if not connected
GPPSB_REFCLK 100M DIFF 100M DIFF 100M DIFF
8,17 LDT_RST# LDT_STOP#_NB RX780: pin DFT_GPIO1
4
3
1
6
* RS780 can be used as clock buffer to output two PCIE referecence clocks RS780: pin SUS_STAT#
8,17 LDT_STOP#
A By deault, chip will configured as input mode, BIOS can program it to output mode. A
NB1D
RS740/RX780/RS780 STRAPS RS740/RX780/RS780: LOAD_EEPROM_STRAPS
PAR 4 OF 6 Selects Loading of STRAPS from EEPROM
AB12 MEM_A0 MEM_DQ0 AA18 Note: for RS780, change R232 to 150R as AUX_CAL, 1 : Bypass the loading of EEPROM straps and use Hardware Default Values
AE16 MEM_A1 MEM_DQ1 AA20 place close to pin C8
D V11 AA19 0 : I2C Master can load strap values from EEPROM if connected, or use D
MEM_A2 MEM_DQ2 R297 150R0402 default values if not connected
AE15 MEM_A3 MEM_DQ3 Y19 14 RS740_DFT_GPIO1
AA12 MEM_A4 MEM_DQ4 V17 RS740: pin DFT_GPIO1
AB16 MEM_A5 MEM_DQ5 AA17
AB14 MEM_A6 MEM_DQ6 AA15
AD14 Y15 RS780: pin SUS_STAT#
MEM_A7 MEM_DQ7
AD13 MEM_A8 MEM_DQ8 AC20
AD15 MEM_A9 MEM_DQ9 AD19
SBD_MEM/DVO_I/F
AC16 MEM_A10 MEM_DQ10 AE22
AE13 MEM_A11 MEM_DQ11 AC18
AC14 MEM_A12 MEM_DQ12 AB20 RS740/RX780/RS780: STRAP_DEBUG_BUS_GPIO_ENABLE
Y14 MEM_A13 MEM_DQ13 AD22
AC22 VCC3
MEM_DQ14 R279 3KR0402
AD16 MEM_BA0 MEM_DQ15 AD21 Enables the Test Debug Bus using GPIO and/or memory IO
AE17 MEM_BA1 1 : Disable (RS740/RS780); Enable (RX780)
AD17 Y17 R282 X_3KR0402
MEM_BA2 MEM_DQS0P 14,25 VSYNC# 0 : Enable (RS740/RS780); Disable(RX780)
MEM_DQS0N W18
W12 MEM_RAS# MEM_DQS1P AD20 RS740: pin DFT_GPIO5
Y12 AE21 R291 X_3KR0402
MEM_CAS# MEM_DQS1N 14 RS740_DFT_GPIO5
AD18 MEM_WE# RS780: pin VSYNC
AB13 MEM_CS# MEM_DM0 W17
AB18 AE19 +1.8V_S0 VCC1_1
MEM_CKE MEM_DM1
V14 MEM_ODT
AE23 +1.8V_S0 15 MILS WIDTH
IOPLLVDD18 VCC1_1 15 MILS WIDTH
C
V15 MEM_CKP IOPLLVDD AE24 C
W14 1.2V(RS740)
MEM_CKN
IOPLLVSS AD23 RS740/RX780/RS780: SIDE-PORT MEMORY ENABLE
AE12 C237 C244
MEM_COMPP MEM_VREF1 X_C2.2u6.3X5 X_C2.2u6.3X5
AD12 MEM_COMPN MEM_VREF AE18 Enables Side port memory
R307 X_3KR0402 1. Disable (RS740/RS780)
14 RS740_DFT_GPIO0
AMD-215-0674007-00-A01-RH 0 : Enable (RS740/RS780)
14,25 HSYNC#
R278 X_3KR0402 RS740: pin DFT_GPIO0
RS780: pin HSYNC
R274 3KR0402 VCC3
Have not side port memory,AMD suggest HSYNC pull hign
FOR RS780,R148,R162,C203 and C202 will be populated.
RX780/RS780: STRAP_DEBUG_BUS_PCIE_ENABLE Enables Test debug bus
using PCIE bus
1. Disable (can be enabled
MEM_VREF1 thru nbcfg register)
0 : Enable
R264
A A
AE14
RS740/RX780/RS780 POWER DIFFERENCE TABLE
AC3
AC4
M11
AA4
AB5
AB1
AB7
AE1
AE4
AB2
D11
E14
E15
K14
L15
J15
J12
W1
W2
W4
W7
W8
M6
G1
G2
G4
G8
D3
D5
H7
R7
N4
R1
R2
R4
U4
A2
B1
E4
P6
V7
V8
V6
Y6
L1
L2
L4
L7
J4
NB1F
PIN NAME RS740 RX780 RS780 PIN NAME RS740 RX780 RS780
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDDHT NC +1.1V +1.1V IOPLLVDD +1.2V NC +1.1V
PART 6/6
D D
GROUND VDDA18PCIE NC +1.8V +1.8V AVDDQ +1.8V NC +1.8V
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDDC +1.2V +1.1V +1.1V VDDA18HTPLL +1.8V +1.8V +1.8V
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
VDD33 +3.3V NC +3.3V VDDLT18 +1.8V NC +1.8V
VCC1_1
VCC1_1 CP5 X_Copper
CP6 X_Copper
VDDPCIE 2.5A
VDDHT 0.6A
C NB1E C
L11 30L3A-15_0805-RH J17 A6 VDD_PCIE
VDDHT VDDPCIE
K16 VDDHT PART 5/6 VDDPCIE B6
L12 X_30L3A-15_0805-RH
L16 VDDHT VDDPCIE C6
C258
C10u6.3X5-RH
C248
C1u16X5-RH
C249
X_C1u16X5-RH
C259
X_C0.1u25Y0402-RH
C245
C0.1u25Y0402-RH
C335
C0.1u25Y0402-RH
C329
X_C0.1u25Y0402-RH
C325
C1u16X5-RH
C337
X_C1u16X5-RH
C347
C10u6.3X5-RH
M16 VDDHT VDDPCIE D6
P16 VDDHT VDDPCIE E6
R16 VDDHT VDDPCIE F6
T16 VDDHT VDDPCIE G7
VDDPCIE H8
L9 30L3A-15_0805-RH VDDHTRX H18 J9
VDDHTRX VDDPCIE
G19 VDDHTRX VDDPCIE K9
F20 VDDHTRX VDDPCIE M9
C228 C216 C230 C220 E21 L9
C10u6.3X5-RH C1u16X5-RH C0.1u25Y0402-RH X_C10u6.3X5-RH VDDHTRX VDDPCIE
D22 VDDHTRX VDDPCIE P9
CP2 X_Copper B23 R9
VCCA_1V2 VDDHTRX VDDPCIE NB1_2V
VDDHTRX 0.7A A23 VDDHTRX VDDPCIE T9
V9
VDDHTTX VDDPCIE
AE25 VDDHTTX VDDPCIE U9
AD24 VDDHTTX
FB2 X_220L2A-50 C0.1u25Y0402-RH C0.1u25Y0402-RH X_C0.1u25Y0402-RH AC23 K12
C224 C225 C226 C227 VDDHTTX VDDC
AB22 VDDHTTX VDDC J14
C223 C0.1u16Y0402 AA21 U16
VDDHTTX VDDC
C272
C0.1u25Y0402-RH
C214
C0.1u25Y0402-RH
C217
X_C0.1u25Y0402-RH
C650
C0.1u25Y
C651
C0.1u25Y
C330
C22u6.3X50805-RH
C277
C10u6.3X5-RH
C10u10Y0805 Y20 J11
VDDHTTX VDDC
W19 VDDHTTX VDDC K15
POWER
VDDHTTX 0.4A V18
U17
VDDHTTX VDDC M12
L14
VDDHTTX VDDC
T17 VDDHTTX VDDC L11
R17 VDDHTTX VDDC M13
B P17 VDDHTTX VDDC M15 B
+1.8V_S0 M17 N12 RS880P
VDDHTTX VDDC RS880P 22UF
VDDC N14
VDDA18PCIE J10 P11 VDDC RS880P: Nominal voltage is 1.2 V at 13 A
VDDA18PCIE VDDC
P10 VDDA18PCIE VDDC P13
FB8 220L2A-50 K10 P14
C295 C292 C293 C294 VDDA18PCIE VDDC
M10 VDDA18PCIE VDDC R12
C10u6.3X5-RH C0.1u16X C0.1u25Y0402-RH L10 R15
X_C0.1u25Y0402-RH VDDA18PCIE VDDC
W9 VDDA18PCIE VDDC T11
H9 VDDA18PCIE VDDC T15
T10 VDDA18PCIE VDDC U12
R10 VDDA18PCIE VDDC T14
Y9 VDDA18PCIE VDDC J16
AA9 VDDA18PCIE
AB9 VDDA18PCIE VDD_MEM AE10
AD9 VDDA18PCIE VDD_MEM AA11
+1.8V_S0 AE9 Y11
VDDA18PCIE VDD_MEM R273
U10 VDDA18PCIE VDD_MEM AD10
CP46 15 MILS WIDTH AB10
VDDG18 VDD_MEM RS780 RS740
F9 VDDG18 VDD_MEM AC10
G9 R284 VCC3
X_Copper VDDG18 VDDG33
15 MILS WIDTH AE11 VDD18_MEM VDDG33 H11 15 MILS WIDTH
R275 X_0R AD11 H12
VDD18_MEM VDDG33 C301
RS780 C1u16X5-RH C299
R268 C652 C0.1u16Y0402
X_0R0402 X_C1u16X5-RH AMD-215-0674007-00-A01-RH
RS780
A A
RN62
8P4R-22R0402
For EMI
M
PCI_CLK4 1 2 PCICLK4_SIO
PCICLK4_SIO 21,28
PCI_CLK0 3 4 PCICLK0_SLOT1
PCICLK0_SLOT1 23
PCI_CLK2 5 6 TPM_PCLK
TPM_PCLK 21,28
C873 X_C150p25N0402 PCICLK3_R 7 8 PCICLK3 21
SB1A
SI
14,22 A_RST# A_RST# R491 33R/4 A_RST#_R N2
SB700 P4 PCI_CLK0 C435
A_RST# PCICLK0 TP35 PCICLK3 X_C10p50N0402
Part 1 of 5 PCICLK1 P3
PCI CLKS
C419 C0.1u10X0402 A_RX0P_C V23 P1 PCI_CLK2
13 A_RX0P PCIE_TX0P PCICLK2
C421 C0.1u10X0402 A_RX0N_C V22 P2 PCICLK3_R C460
13 A_RX0N PCIE_TX0N PCICLK3
C434 C0.1u10X0402 A_RX1P_C V24 T4 PCI_CLK4 PCICLK0_SLOT1 C6.8p50N0402-RH
13 A_RX1P PCIE_TX1P PCICLK4
C416 C0.1u10X0402 A_RX1N_C V25 T3 PCICLK5 PCICLK5 21
13 A_RX1N PCIE_TX1N PCICLK5/GPIO41
C420 C0.1u10X0402 A_RX2P_C U25 C472
D 13 A_RX2P PCIE_TX2P D
C422 C0.1u10X0402 A_RX2N_C U24 PCICLK4_SIO C6.8p50N0402-RH
13 A_RX2N PCIE_TX2N
PLACE PCIE CAPS C431 C0.1u10X0402 A_RX3P_C T23 C875 C150p25N0402
13 A_RX3P PCIE_TX3P
CLOSE TO U13 C418 C0.1u10X0402 A_RX3N_C T22 N1 SB_PCI_RST# R469 33R/4
13 A_RX3N PCIE_TX3N PCIRST# SB_PCIRST# 28
outed with 85ohm ± 15% differential impedance
AD[31..0]
PCI INTERFACE
GPP0/1 is PCIEX1 NB_DISP_CLKN AD30 AD31 PCI_CBE#[3..0]
AD31 AD1 PCI_CBE#[3..0] 23
M24 W2 PCI_CBE#0
NB_HT_CLKP CBE0# PCI_CBE#1
M25 NB_HT_CLKN CBE1# U7
AA7 PCI_CBE#2
CBE2# PCI_CBE#3
P17 CPU_HT_CLKP CBE3# Y1
M18 CPU_HT_CLKN FRAME# AA6 PCI_FRAME# 23
DEVSEL# W5 PCI_DEVSEL# 23
M23 SLT_GFX_CLKP IRDY# AA5 PCI_IRDY# 23
M22 SLT_GFX_CLKN TRDY# Y5 PCI_TRDY# 23
PAR U6 PCI_PAR 23
J19 GPP_CLK0P STOP# W6 PCI_STOP# 23
J18 GPP_CLK0N PERR# W4 PCI_PERR# 23
SERR# V7 PCI_SERR# 23
L20 GPP_CLK1P REQ0# AC3 PCI_REQ#0 23
L19 AD4 LPC_AD[3..0]
GPP_CLK1N REQ1# PCI_REQ#1 23 LPC_AD[3..0] 28
REQ2# AB7 PCI_REQ#2 23
M19 AE6 PCI_REQ#3 PCI_REQ#3 23
GPP_CLK2P REQ3#/GPIO70
CLOCK GENERATOR
X
32K_X1 LPCCLK1 LPC_AD0 S-BAT54C_SOT23
A3 X1 LAD0 H24
H23 LPC_AD1
RTC XTAL
LAD1 LPC_AD2
LAD2 J25 Z VBAT
J24 LPC_AD3
LAD3
LPC
32K_X2 B3 H25
X2 LFRAME# LPC_FRAME# 28
VCC_DDR R484 300R0402 H22 LPC_DRQ#0 28
Y
LDRQ0# PCI_GNT5# TP30
LDRQ1#/GNT5#/GPIO68 AB8
AD7 PCI_REQ5# R765 10KR0402 VCC3 16mil
BMREQ#/REQ5#/GPIO65 BAT1
SERIRQ V15 SERIRQ 28
R513 1KR0402 1 2
F23 3VDUAL
14 ALLOW_LDTSTOP ALLOW_LDTSTP TP27
8 CPU_HOT R485 X_0R0402 F24 PROCHOT# RTCCLK C3 BAT2P/Holder
8 LDT_PWRGD LDT_PWRGD F22 C2 INTR_ALERT# R499 X_100KR0402
LDT_STOP# LDT_PG INTRUDER_ALERT# SB_VBAT
Note: LDT_PG, LDT_STP# & LDT_RST# are OD
CPU
LDT_RST# G24
and require a PU to the CPU I/O rail. They are 8,14 LDT_RST# LDT_RST#
also in the S5 domain to prevent glitching at
power up. SB,SB710,A11,FCBGA-528pin 16mil JBAT1
SB_VBAT R416 510R/0402 VBAT 1
2
A A
R493 20MR
C680 C732
C18p50N C18p50N
MICRO-START INT'L CO.,LTD.
Title
SB1B
SATA1
SATA7P_PURPLE-P-RH
SATA2
SATA7P_PURPLE-P-RH SATA_TX0+_C C533 C0.01u16X0402 SATA_TX0+ AD9
SB700 AA24
SATA_TX0-_C C532 C0.01u16X0402 SATA_TX0- SATA_TX0P IDE_IORDY
D AE9 SATA_TX0N Part 2 of 5 IDE_IRQ AA25 D
GND
GND
9 9 IDE_A0 Y22
1 1 SATA_RX0-_C C549 C0.01u16X0402 SATA_RX0- AB10 AB23
GND
GND
SATA_RX0N IDE_A1
TX+
TX+
2 SATA_TX0+_C 2 SATA_TX1+_C SATA_RX0+_C C551 C0.01u16X0402 SATA_RX0+AC10 Y23
SATA_TX0-_C SATA_TX1-_C SATA_RX0P IDE_A2
RX- TX-
RX- TX-
3 3 IDE_DACK# AB24
4 4 SATA_TX1+_C C541 C0.01u16X0402 SATA_TX1+ AE10 AD25
GND
GND
SATA_RX0-_C SATA_RX1-_C SATA_TX1-_C C536 C0.01u16X0402 SATA_TX1- SATA_TX1P IDE_DRQ
5 5 AD10 SATA_TX1N IDE_IOR# AC25
6 SATA_RX0+_C 6 SATA_RX1+_C AC24
RX+
RX+
SATA_RX1-_C C546 C0.01u16X0402 SATA_RX1-AD11 IDE_IOW#
GND
GND
7 7 SATA_RX1N IDE_CS1# Y25
8 8 SATA_RX1+_C C548 C0.01u16X0402 SATA_RX1+AE11 Y24
GND
GND
SATA_RX1P IDE_CS3#
SATA_TX2+_C C506 C0.01u16X0402 SATA_TX2+ AB12 AD24
SATA_TX2-_C C512 C0.01u16X0402 SATA_TX2- SATA_TX2P IDE_D0/GPIO15
SATA4 SATA3 AC12 SATA_TX2N IDE_D1/GPIO16 AD23
SATA7P_PURPLE-P-RH SATA7P_PURPLE-P-RH AE22
IDE_D2/GPIO17
ATA 66/100/133
SATA_RX2-_C C521 C0.01u16X0402 SATA_RX2- AE12 AC22
SATA_RX2+_C C520 C0.01u16X0402 SATA_RX2+AD12 SATA_RX2N IDE_D3/GPIO18
GND
GND
GND
IDE_D5/GPIO20
TX+
TX+
SERIAL ATA
RX- TX-
RX- TX-
GND
RX+
SATA_RX3P IDE_D10/GPIO25
GND
GND
7 7 IDE_D11/GPIO26 AE21
8 8 SATA_TX4+_C C466 C0.01u16X0402 SATA_TX4+ AE14 AB22
GND
GND
GND
9 9 AC16 SATA_TX5N
1 1 G6 SPI_DATAIN
GND
GND
SPI_DI/GPIO12
TX+
TX+
RX- TX-
SATA_RX5P SPI_CLK/GPIO47 D1
4 4 F4 SPIHOLD# R559 SPI_HOLD#
GND
GND
SPI_HOLD#/GPIO31
SPI ROM
5SATA_RX5-_C 5SATA_RX4-_C R465 1KR1%0402 SATA_CALRP V12 SATA_CAL SPI_CS1#/GPIO32 F3 SPI_CS# X_0R0402
6SATA_RX5+_C 6SATA_RX4+_C
RX+
RX+
SATA_X1
GND
GND
GND
SATA PWR
FANIN1/GPIO51 P8
XTLVDD_SATA W12 XTLVDD_SATA FANIN2/GPIO52 R8
C6 R492 R618
TEMP_COMM
TEMPIN0/GPIO61 B6 10KR0402
TEMPIN1/GPIO62 A6
CP32 A5
TEMPIN2/GPIO63
HW MONITOR
VCC3 X_Copper B5
XTLVDD_SATA TEMPIN3/TALERT#/GPIO64 TALERT# 8,28
C437 C22p50N0402 SATA_X1 L25 A4
VIN0/GPIO53
15 MILS WIDTH VIN1/GPIO54 B4
1
VIN2/GPIO55 C4
X_30L3A-15_0805-RH D4
Y4 R468 VIN3/GPIO56
D5
2
CP26 X_Copper
SPI FLASH MEMORY
B B
VCC_SB PLLVDD_SATA
L21
15 MILS WIDTH
X_30L3A-15_0805-RH
C561 C733
CAP CLOSE TO C1u6.3Y0402-RH
THE BALLS OF
C10u10Y0805
SB
SPI_HOLD#
8P4R-10KR0402 SPI DEBUG PORT
1 2
SPI_WP# 3 4
5 6 3VDUAL
7 8
JSPI1
SPI_CLK SPI_CS# R470 1KR1%0402 1 2
SPI_DATAIN 3 4 SPI_DATAOUT
3VDUAL SPI_CS# 5 6 SPI_CLK
C517 7 8
X_10p/50v/N/4 SPI_HOLD# 9
C559 C558
H2X5[1]M-2mm_Black
Part Number : N31-2051451-H06
C22U6.3X50805-RH
0.1u/25v/Y5/4
SPI1
A SPI_CS# 1 8 A
SPI_DATAIN CS VCC SPI_HOLD#
2 DO HOLD 7
19 SPI_WP# SPI_WP# 3 6 SPI_CLK
WP CLK SPI_DATAOUT
4 GND DIO 5
W25X16AVSSIG
SB1D
SB8X0 Pin USBCLK input ,or14M_25M_48M_OSC ouput
SB700 Part 4 of 5 Function set output pin by BIOS.
SB_PCI_PME# E1
22 SB_PCI_PME# PCI_PME#/GEVENT4#
OC1_SMI# SB SMI REG54 bit 20:16
TP29
RI# E2 C8
RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC USBCLK_EXT 7
TP24 H7 SLP_S2/GPM9#
D SLP_S3# F5 G8 USB_RCOMP R517 11.8K/4/1% D
R508 X_R/2 SB_THRM# 28,30 SLP_S3# SLP_S5# SLP_S3# USB_RCOMP
G1 R585 should near the SB pin under 1inche
USB MISC
8 CPU_THRIP# 28,30,31 SLP_S5# SLP_S5#
USB 1.1
28 A20GATE KBRST# GA20IN/GEVENT0# USB_FSD12P
28 KBRST# W15 KBRST#/GEVENT1# USB_FSD12N E8
Cap have been unpopulate LPC_PME# K4
28 LPC_PME# LPC_PME#/GEVENT3#
TP3
LPC_SMI# K24 H11
for meet power sequence LPC_SMI#/EXTEVNT1# USB_HSD11P USBP11 24
F1 S3_STATE/GEVENT5# USB_HSD11N J10 USBN11 24
R507 X_R/2 J2
7,28,30,32 FP_RST# SYS_RESET#/GPM7#
SB_PE_WAKE# H6 E11
22 SB_PE_WAKE# WAKE#/GEVENT8# USB_HSD10P USBP10 24
R487 SB_BLINK F2 F11
BLINK/GPM6# USB_HSD10N USBN10 24
RSMRST# SB_THRM# J6
3VDUAL SMBALERT#/THRMTRIP#/GEVENT2#
14 WD_PWRGD WD_PWRGD W14 A11
X_22KR0402 NB_PWRGD USB_HSD9P
USB_HSD9N B11
C464 28 RSMTST_IO R506 X_R/2 RSMRST# D3 RSMRST#
X_2.2u/6.3v/X5/6 USB_HSD8P C10
USB_HSD8N D10
RN64
8P4R-2.2KR0402-HE VCC3 TP26
GPIO10 AE18 G11
SATA_IS0#/GPIO10 USB_HSD7P USBP7 24
SCL0_S 1 2 TP7
GPIO6 AD18 H12
CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N USBN7 24
3 4 TP28
GPIO4 AA19
SUS_STAT# GPIO0 SMARTVOLT1/SATA_IS2#/GPIO4
5 6 TP25 W17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E12 USBP6 24
SDA0_S 7 8 TP23
PE0_PRSNTX16# V17 E14
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N USBN6 24
GB_ENABLE R633 X_10KR0402 TP34
GPIO40 W20
DDR3_RST# R409 X_10K/4 SPKR CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
32 SPKR W21 SPKR/GPIO2 USB_HSD5P C12 USBP5 24
USB 2.0
WD_PWRGD R431 X_10K/4 SCL0_S AA18 D12
SCL0/GPOC0# USB_HSD5N USBN5 24
C SDA0_S W18 C
SCL1_S SDA0/GPOC1#
K1 SCL1/GPOC2# USB_HSD4P B12 USBP4 24
RN65 Connected to battery monitor circuit SDA1_S K2 A12
for Low-Low Battery notification. SDA1/GPOC3# USB_HSD4N USBN4 24
8P4R-2.2KR0402-HE AA20
GPIO
3VDUAL SPI_WP# DDC1_SCL/GPIO9
1 2 18 SPI_WP# Y18 DDC1_SDA/GPIO8 USB_HSD3P G12 USBP3 24
3 4 GB_ENABLE C1 G14
LLB#/GPIO66 USB_HSD3N USBN3 24
SCL1_S 5 6 TP33
GPIO5 Y19
SDA1_S DDR3_RST# SMARTVOLT2/SHUTDOWN#/GPIO5
7 8 G5 DDR3_RST#/GEVENT7# USB_HSD2P H14 USBP2 24
3VDUAL H15
USB_HSD2N USBN2 24
SB_TEST2 R471 X_2.2K/4 A13
USB_HSD1P USBP1 24
SB_TEST1 R445 X_2.2K/4 B13
USB_HSD1N USBN1 24
SB_TEST0 R477 X_2.2K/4
USB_HSD0P B14 USBP0 24
SB_BLINK R630 X_10KR0402 B9 A14
USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N USBN0 24
RN13 USB_OCP#5 B8
USB_OCP#3 USB_OCP#4 USB_OC5#/IR_TX0/GPM5# IMC_DBREQ_L
2 1 A8 USB_OC4#/IR_RX0/GPM4# IMC_GPIO8 A18 IMC_DBREQ_L 8
USB OC
4 3 USB_OCP#2 USB_OCP#3 A9 B18 IMC_DBRDY
USB_OC3#/IR_RX1/GPM3# IMC_GPIO9 IMC_DBRDY 8
6 5 USB_OCP#1 USB_OCP#2 E5 F21
USB_OCP#4 USB_OCP#1 USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10
8 7 F8 USB_OC1#/GPM1# SCL2/IMC_GPIO11 D21
USB_OCP#0 E4 F19
8P4R-10K/4 USB_OC0#/GPM0# SDA2/IMC_GPIO12
SCL3_LV/IMC_GPIO13 E20
AZ_BIT_CLK_R M1 E21
R475 SCL0_S RN18 AZ_SDATA_OUT_R AZ_BITCLK SDA3_LV/IMC_GPIO14
6,7,11,30 SCL0 M2 AZ_SDOUT IMC_PWM1/IMC_GPIO15 E19
R481 SDA0_S 2 1 USB_OCP#0 J7 D19
6,7,11,30 SDA0 AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16 IMC_GPIO16 21
4 3 USB_OCP#5 J8 E18
AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17 IMC_GPIO17 21
HD AUDIO
6 5 L8 AZ_SDIN2/GPIO44
R482 SCL1_S 8 7 27 AZ_SDATA_IN0 AZ_SDATA_IN0 M3 G20
22 SCL1 AZ_SDIN3/GPIO46 IMC_GPIO18
R488 SDA1_S AZ_SYNC_R L6 G21
22 SDA1 AZ_SYNC IMC_GPIO19 IMC_CRST_L 8
8P4R-10K/4 AZ_RST#_R M4 D25
AZ_RST# IMC_GPIO20
L5 AZ_DOCK_RST#/GPM8# IMC_GPIO21 D24
INTEGRATED uC
B RN63 B
IMC_GPIO22 C25
1 2 AZ_BIT_CLK_R C24
27 AZ_BIT_CLK AZ_RST#_R IMC_GPIO23
21,27 AZ_RST# 3 4 IMC_GPIO24 B25
5 6 AZ_SYNC_R C23
27 AZ_SYNC AZ_SDATA_OUT_R IMC_GPIO25
27 AZ_SDATA_OUT 7 8
IMC_GPIO26 B24 IMC_TRST_L 8
8P4R-22R0402 B23
IMC_GPIO27 IMC_TDO 8
IMC_GPIO28 A23 IMC_TDI 8
IMC_GPIO29 C22 IMC_TMS 8
IMC_GPIO30 A22 IMC_TCK 8
IMC_GPIO31 B22
IMC_GPIO32 B21
AZ_BIT_CLK_R R456 X_10KR0402 A21
AZ_SDATA_IN0 R515 X_10KR0402 IMC_GPIO33
H19 IMC_GPIO0 IMC_GPIO34 D20
H20 IMC_GPIO1 IMC_GPIO35 C20
INTEGRATED uC
AZ_SDATA_OUT C447 C10p50N0402 H21 A20
SPI_CS2#/IMC_GPIO2 IMC_GPIO36
F25 IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37 B20
IMC_GPIO38 B19
D22 IMC_GPIO4 IMC_GPIO39 A19
E24 IMC_GPIO5 IMC_GPIO40 D18
E25 IMC_GPIO6 IMC_GPIO41 C18
D23 IMC_GPIO7
SB_PE_WAKE#
C465 SB,SB710,A11,FCBGA-528pin
X_0.1u/16v/Y5/4
A A
VCC_SB
CORE S0
C653 C461 C658 C659 C413 C740 C660 C409
D U16 VDDQ_5 VDD_5 P12
C10u6.3X50805 SB700 D
PCI/GPIO I/O
U17 VDDQ_6 VDD_6 P14 VSS_1 A2
C1u10Y X_C1u10Y X_C1u10Y C1u10Y V8 R11 A25
VDDQ_7 VDD_7 C1u10Y C1u10Y C1u10Y VSS_2
W7 VDDQ_8 VDD_8 R15 VSS_3 B1
Y6 VDDQ_9 VDD_9 T16 VSS_4 D7
AA4 VDDQ_10 T10 AVSS_SATA_1 VSS_5 F20
AB5 VDDQ_11 U10 AVSS_SATA_2 VSS_6 G19
AB21 VDDQ_12 if using external clock gen ,cap can remove U11
U12
AVSS_SATA_3 VSS_7 H8
K9
CP13 X_Copper AVSS_SATA_4 VSS_8
V11 AVSS_SATA_5 VSS_9 K11
VCC3 V14 K16
CP11 VCC_SB AVSS_SATA_6 VSS_10
30 MILS WIDTH W9 AVSS_SATA_7 VSS_11 L4
VDD33_18 Y20 L21 CKVDD_1.2V L15 Y9 L7
VDD33_18_1 CKVDD_1.2V_1 AVSS_SATA_8 VSS_12
AA21 VDD33_18_2 CKVDD_1.2V_2 L22 Y11 AVSS_SATA_9 VSS_13 L10
X_Copper
IDE/FLSH I/O
X_30L3A-15_0805-RH
CLKGEN I/O
AA22 VDD33_18_3 CKVDD_1.2V_3 L24 Y14 AVSS_SATA_10 VSS_14 L11
C414 AE25 L25 C432 C423 C427 Y17 L12
C655 C657 VDD33_18_4 CKVDD_1.2V_4 AVSS_SATA_11 VSS_15
AA9 AVSS_SATA_12 VSS_16 L14
C10u6.3X50805 X_C2.2u6.3X5 X_C2.2u6.3X5 X_C2.2u6.3X5 AB9 L16
AVSS_SATA_13 VSS_17
AB11 AVSS_SATA_14 VSS_18 M6
X_C1u10Y X_C1u10Y AB13 M10
AVSS_SATA_15 VSS_19
AB15 AVSS_SATA_16 VSS_20 M11
AB17 AVSS_SATA_17 VSS_21 M13
CP14 X_Copper AC8 M15
VCC_SB POWER 3VDUAL AD8
AVSS_SATA_18
AVSS_SATA_19
VSS_22
VSS_23 N4
AE8 AVSS_SATA_20 VSS_24 N12
L16 PCIE_VDDR CP18 N14
X_30L3A-15_0805-RH
20 MILS WIDTH S5_3.3V_1 VSS_25
P18 PCIE_VDDR_1 VSS_26 P6
P19 PCIE_VDDR_2 VSS_27 P9
P20 X_Copper P10
PCIE_VDDR_3 VSS_28
A-LINK I/O
CP15 X_Copper P21 A17 C445 A15 P11
C430 C656 C654 C438 PCIE_VDDR_4 S5_3.3V_1 AVSS_USB_1 VSS_29
R22 PCIE_VDDR_5 S5_3.3V_2 A24 B15 AVSS_USB_2 VSS_30 P13
C C10u6.3X5-RH X_C1u10Y C1u10Y C0.1u16Y0402 R24 B17 X_C1u10Y C14 P15 C
PCIE_VDDR_6 S5_3.3V_3 AVSS_USB_3 VSS_31
R25 J4 D8 R1
3.3V_S5 I/O
PCIE_VDDR_7 S5_3.3V_4 CP31 AVSS_USB_4 VSS_32
S5_3.3V_5 J5 D9 AVSS_USB_5 VSS_33 R2
L1 20 MILS WIDTH S5_3.3V_2 D11 R4
VCC_SB CP22 X_Copper S5_3.3V_6 AVSS_USB_6 VSS_34
S5_3.3V_7 L2 D13 AVSS_USB_7 VSS_35 R9
AVDD_SATA X_Copper
GROUND
D14 AVSS_USB_8 VSS_36 R10
C738 D15 R12
L20 X_30L3A-15_0805-RH AVSS_USB_9 VSS_37
AA14 AVDD_SATA_1
15 MILS WIDTH +1.2VALW C1u10Y USB_PHY E15 AVSS_USB_10 VSS_38 R14
AB18 AVDD_SATA_4 F12 AVSS_USB_11 VSS_39 T11
CP24 AA15 CP30 F14 T12
AVDD_SATA_2 AVSS_USB_12 VSS_40
SATA I/O
C484 C661 C483 C486 AA17 G2 G9 T14
AVDD_SATA_3 S5_1.2V_1 AVSS_USB_13 VSS_41
CORE S5
X_Copper C10u6.3X5-RH C1u10Y C0.1u16Y0402 C0.1u16Y0402 AC18 G4 H9 U4
AVDD_SATA_5 S5_1.2V_2 C662 C1u10Y X_Copper USB_PHY AVSS_USB_14 VSS_42
AD17 AVDD_SATA_6 H17 AVSS_USB_15 VSS_43 U14
AE17 AVDD_SATA_7 J9 AVSS_USB_16 VSS_44 V6
15 MILS WIDTH CP23 J11 Y21
USB_PHY_1.2V AVSS_USB_17 VSS_45
USB_PHY_1.2V_1 A10 J12 AVSS_USB_18 VSS_46 AB1
USB_PHY_1.2V_2 B10 J14 AVSS_USB_19 VSS_47 AB19
X_Copper J15 AB25
C493 C492 AVSS_USB_20 VSS_48
K10 AVSS_USB_21 VSS_49 AE1
3VDUAL C1u10Y C10u6.3X5-RH K12 AE24
CP21 X_Copper AVDD_USB AVSS_USB_22 VSS_50
K14 AVSS_USB_23
K15 AVSS_USB_24
PCIE_CK_VSS_9 P23
L19 X_30L3A-15_0805-RH A16 AE7 V5_VREF 10 MILS WIDTH 1KR R516 R16
AVDDTX_0 V5_VREF VCC5 PCIE_CK_VSS_10
B16 AVDDTX_1 PCIE_CK_VSS_11 R19
C16 AVDDTX_2 AVDDCK_3.3V J16 AVDDCK_3.3V PCIE_CK_VSS_12 T17
CP20 X_Copper C462 C479 C463 C480 C482 D16 15 MILS WIDTH U18
C0.1u16Y0402 AVDDTX_3 C739 VCC3 PCIE_CK_VSS_13
D17 AVDDTX_4 AVDDCK_1.2V K17 AVDDCK_1.2V H18 PCIE_CK_VSS_1 PCIE_CK_VSS_14 U20
PLL
E17 15 MILS WIDTH C1u10Y J17 V18
X_C10u6.3X50805 C1u10Y AVDDTX_5 PCIE_CK_VSS_2 PCIE_CK_VSS_15
USB I/O
F15 AVDDRX_0 AVDDC E9 +3.3V_AVDDC J22 PCIE_CK_VSS_3 PCIE_CK_VSS_16 V20
C1u10Y C0.1u16Y0402 F17 15 MILS WIDTH K25 V21
B AVDDRX_1 PCIE_CK_VSS_4 PCIE_CK_VSS_17 B
F18 M16 W19
Z
AVDDRX_2 D28 PCIE_CK_VSS_5 PCIE_CK_VSS_18
G15 AVDDRX_3 M17 PCIE_CK_VSS_6 PCIE_CK_VSS_19 W22
G17 AVDDRX_4 M21 PCIE_CK_VSS_7 PCIE_CK_VSS_20 W24
G18 AVDDRX_5 P16 PCIE_CK_VSS_8 PCIE_CK_VSS_21 W25
F9 L17
Y
SB,SB710,A11,FCBGA-528pin AVSSC AVSSCK
Part 5 of 5
S-BAT54A_SOT23
SB,SB710,A11,FCBGA-528pin
X_30L3A-15_0805-RH
C439
C2.2u6.3X5
VCC_SB
CP12 X_Copper
AVDDCK_1.2V
L13
X_30L3A-15_0805-RH C417
C2.2u6.3X5
A A
3VDUAL
CP25 X_Copper +3.3V_AVDDC
Wake on LAN not supported
L22
D D
REQUIRED STRAPS NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
Note: SB700/SB750 A12 IMC_GPO[17:16] require external
pull-up/pull-down resistors to configure ROM straps.
However, SB710/SB750 A14 IMC_GPO[17:16] require
only external pull-down resistors to configure ROM straps.
17,28 TPM_PCLK
17 PCICLK3
17,28 PCICLK4_SIO
17 PCICLK5
17 LPCCLK0
17 LPCCLK1
19,27 AZ_RST#
19 IMC_GPIO17
19 IMC_GPIO16
C C
R530
R518 10KR0402 R532 R514 R531 R534 R535 R441 R435
10KR0402 X_10KR0402 X_10KR0402 10KR0402 10KR0402 X_2.2KR0402 2.2KR0402
10KR0402
B B
USE USE PCI USE ACPI USE IDE USE DEFAULT RESERVED
PULL LONG PLL BCLK PLL PCIE STRAPS
HIGH RESET
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
A A
1
C R523 X_0R/4 C429 C424 EC34 C426 C371 C425 C557 C402 C356 C367 C357 C
+
14 DDC_DATA_B8 B31 PRSNT2##B31 GND#A31 A31
B32 GND#B32 RSVD#A32 A32
X_C0.1u16Y0402 CD270u16SO-RH-2 X_C0.1u16Y0402 X_C0.1u16Y0402 X_C0.1u16Y0402 X_C0.1u16Y0402
2
X_C0.1u16Y0402 X_C0.1u16Y0402 X_C0.1u16Y0402 X_C0.1u16Y0402 X_0.1u16Y0402
GFX_TX4P C381 C0.1u10X0402 GFX_TXC_4P B33 A33
13 GFX_TX4P HSOP4 RSVD#A33
GFX_TX4N C382 C0.1u10X0402 GFX_TXC_4N B34 A34
13 GFX_TX4N HSON4 GND#A34
B35 A35 GFX_RX4P
GND#B35 HSIP4 GFX_RX4P 13
B36 A36 GFX_RX4N
GND#B36 HSIN4 GFX_RX4N 13
GFX_TX5P C383 C0.1u10X0402 GFX_TXC_5P B37 A37 Placement Close To PCIE16_X1 Placement Between at PCIE1_X1
13 GFX_TX5P HSOP5 GND#A37
GFX_TX5N C384 C0.1u10X0402 GFX_TXC_5N B38 A38
13 GFX_TX5N HSON5 GND#A38
B39 A39 GFX_RX5P
GND#B39 HSIP5 GFX_RX5P 13
B40 A40 GFX_RX5N
GND#B40 HSIN5 GFX_RX5N 13
GFX_TX6P C377 C0.1u10X0402 GFX_TXC_6P B41 A41
13 GFX_TX6P HSOP6 GND#A41
GFX_TX6N C405 C0.1u10X0402 GFX_TXC_6N B42 A42
13 GFX_TX6N HSON6 GND#A42
B43 A43 GFX_RX6P
GND#B43 HSIP6 GFX_RX6P 13
B44 A44 GFX_RX6N
GND#B44 HSIN6 GFX_RX6N 13
GFX_TX7P C385 C0.1u10X0402 GFX_TXC_7P B45 A45
13 GFX_TX7P HSOP7 GND#A45
GFX_TX7N C386 C0.1u10X0402 GFX_TXC_7N B46 A46
13 GFX_TX7N HSON7 GND#A46
B47 A47 GFX_RX7P
GND#B47 HSIP7 GFX_RX7P 13
TMDS_HPD0 R524 X_0R/4 B48 A48 GFX_RX7N
14 TMDS_HPD0 PRSNT2##B48 HSIN7 GFX_RX7N 13
B49 GND#B49 GND#A49 A49
13 GFX_TX8P
GFX_TX8P
GFX_TX8N
C374 C0.1u10X0402
C401 C0.1u10X0402
GFX_TXC_8P
GFX_TXC_8N
B50
B51
HSOP8 RSVD#A50 A50
A51
Wake Up CTRL Circuit
13 GFX_TX8N HSON8 GND#A51
B52 A52 GFX_RX8P
GND#B52 HSIP8 GFX_RX8P 13
B53 A53 GFX_RX8N
GND#B53 HSIN8 GFX_RX8N 13 3VDUAL
GFX_TX9P C387 C0.1u10X0402 GFX_TXC_9P B54 A54
13 GFX_TX9P HSOP9 GND#A54
GFX_TX9N C388 C0.1u10X0402 GFX_TXC_9N B55 A55
13 GFX_TX9N HSON9 GND#A55
B56 A56 GFX_RX9P
GND#B56 HSIP9 GFX_RX9P 13
B57 A57 GFX_RX9N
B GND#B57 HSIN9 GFX_RX9N 13 B
GFX_TX10P C389 C0.1u10X0402 GFX_TXC_10P B58 A58
13 GFX_TX10P HSOP10 GND#A58
GFX_TX10N C390 C0.1u10X0402 GFX_TXC_10N B59 A59 R623
13 GFX_TX10N HSON10 GND#A59
B60 A60 GFX_RX10P
GND#B60 HSIP10 GFX_RX10P 13
B61 A61 GFX_RX10N
GND#B61 HSIN10 GFX_RX10N 13
GFX_TX11P C391 C0.1u10X0402 GFX_TXC_11P B62 A62 4.7KR/4
13 GFX_TX11P HSOP11 GND#A62
GFX_TX11N C392 C0.1u10X0402 GFX_TXC_11N B63 A63
13 GFX_TX11N HSON11 GND#A63
B64 A64 GFX_RX11P
GND#B64 HSIP11 GFX_RX11P 13
B65 A65 GFX_RX11N
GND#B65 HSIN11 GFX_RX11N 13
GFX_TX12P C393 C0.1u10X0402 GFX_TXC_12P B66 A66 PE_WAKE# R385 SB_PE_WAKE# SB_PE_WAKE# 19
13 GFX_TX12P HSOP12 GND#A66
GFX_TX12N C394 C0.1u10X0402 GFX_TXC_12N B67 A67
13 GFX_TX12N HSON12 GND#A67
B68 A68 GFX_RX12P
GND#B68 HSIP12 GFX_RX12P 13
B69 A69 GFX_RX12N
GND#B69 HSIN12 GFX_RX12N 13
GFX_TX13P C395 C0.1u10X0402 GFX_TXC_13P B70 A70
13 GFX_TX13P HSOP13 GND#A70
GFX_TX13N C396 C0.1u10X0402 GFX_TXC_13N B71 A71
13 GFX_TX13N HSON13 GND#A71
B72 A72 GFX_RX13P
GND#B72 HSIP13 GFX_RX13P 13
B73 A73 GFX_RX13N PE_WAKE#
GND#B73 HSIN13 GFX_RX13N 13
GFX_TX14P C379 C0.1u10X0402 GFX_TXC_14P B74 A74
13 GFX_TX14P HSOP14 GND#A74 3VDUAL
GFX_TX14N C380 C0.1u10X0402 GFX_TXC_14N B75 A75
13 GFX_TX14N HSON14 GND#A75
B76 A76 GFX_RX14P
GND#B76 HSIP14 GFX_RX14P 13
B77 A77 GFX_RX14N
GND#B77 HSIN14 GFX_RX14N 13
GFX_TX15P C397 C0.1u10X0402 GFX_TXC_15P B78 A78 C470
13 GFX_TX15P HSOP15 GND#A78
GFX_TX15N C398 C0.1u10X0402 GFX_TXC_15N B79 A79 C0.1u16Y0402
13 GFX_TX15N HSON15 GND#A79
B80 A80 GFX_RX15P R627
GND#B80 HSIP15 GFX_RX15P 13
TMDS_HPD0 R525 X_0R/4 B81 A81 GFX_RX15N
PRSNT2##B81 HSIN15 GFX_RX15N 13
B82 A82 4.7KR0402
RSVD#B82 GND#A82
X1 X1
SLOT-PCI164P_BLACK-2PITCH-RH
23 PCI_PME# PCI_PME# R388 SB_PCI_PME# 19
A A
AD[31..0]
17 AD[31..0]
PCI_CBE#[3..0]
17 PCI_CBE#[3..0]
8P4R-8.2KR0402-1
PCI_GNT#0
VCC5 VCC3
1
C586 C554 C550 3VDUAL R727 X_8.2KR0402
+
17 PCI_REQ#0
X_C0.1u25Y0402-RH X_C0.1u25Y0402-RH X_C0.1u25Y0402-RH R790 X_8.2KR0402 EC31
17 PCI_REQ#2
C563 C539 R536 X_8.2KR0402 CD470u6.3SO-RH
17 PCI_REQ#4 2
X_C0.1u25Y0402-RH X_C0.1u25Y0402-RH
C588
X_C0.1u25Y0402-RH R501
PCI_FRAME# 1 2
17 PCI_FRAME# VCC3
X_2.7KR0402 PCI_IRDY# 3 4
17 PCI_IRDY#
PCI_PME# PCI_TRDY# 5 6 RN15
17 PCI_TRDY#
PCI_DEVSEL# 7 8 X_8P4R-8.2KR0402-1
A 17 PCI_DEVSEL# A
PCI_STOP# 1 2
17 PCI_STOP#
C552 PCI_LOCK# 3 4
17 PCI_LOCK#
PCI_PERR# 5 6 RN16
17 PCI_PERR#
X_C0.1u25Y PCI_SERR# 7 8 X_8P4R-8.2KR0402-1
17 PCI_SERR#
For EMI
1 2
MICRO-START INT'L CO.,LTD.
17 PCI_INTE# VCC3
3 4 Title
17 PCI_INTG#
5 6 RN14 24 PCI Slot 1 & PCIE X 1 SLOT
17 PCI_INTF#
7 8 X_8P4R-8.2KR0402-1
17 PCI_INTH#
Size Document Number Rev
Custom MS_7641 30
Date: Friday, July 29, 2011 Sheet 23 of 36
5 4 3 2 1
5 4 3 2 1
5V_FUSB 5V_RUSB
POWER CIRCUIT FOR USB PORT 4,5 KB_PWR
EC46 EC21
EC57
+1
KB_PWR
+
+1
5V_FUSB
2
VCC5
CD470u6.3SO-RH
CD470u6.3SO-RH
FS_RUSB2
2
CD470u6.3SO-RH
2.6A_miniSMDM260
5V_RUSB VCC5
VCC5
FS_RUSB1 JUSB_PW1 FS_FUSB2 JUSB_PW2
2.6A_miniSMDM260 1 2.6A_miniSMDM260 1
2 2 EC25
G G
VCC5_SB 3 VCC5_SB 3
+1
X_CD470u6.3SO-RH
D N31-1030151+N33-1020271-RH N31-1030151+N33-1020271-RH D
2
5V_RUSB R351 X_0R0805
KB_PWR
R233 X_0R0805
5V_RUSB 5V_FUSB
REAR PANEL USB CONNECTOR FOR USB PORT 4,5 FRONT PANEL USB CONNECTOR FOR USB PORT 0,1
5V_FUSB
5V_RUSB C597
Trace lengths must be less 12 inches 5V_RUSB 5V_FUSB
C191
L10
USB1 C0.1u16Y0402
USBP5 5 1 USBP5 5 9 D33 X_C0.1u16Y0402
19 USBP5 5 9
5
USBN5 6 2 USBN5 USBN4 6
19 USBN5 6
UP
USBP4 7 10 D16 L26 JUSB1 USBP1 6 4 USBP0
7 10
5
USBP4 7 3 USBP4 8 19 USBP0 USBP0 5 1 USBP0 1 2
19 USBP4 8 VCC VCC
USBN4 8 4 USBN4 USBP5 6 4 USBP4 USBN0 6 2 USBN0 USBN0 3 4 USBN1 USBN1 1 3 USBN0
19 USBN4 19 USBN0 USB0- USB1-
1 11 USBP0 5 6 USBP1
USBN5 1 11 USBN5 USBN4 USBP1 7 USBP1 USB0+ USB1+ ESD-IP4220
2 1 3 19 USBP1 3 7 8
2
X_CMC-L12-181D017-LF 2 GND GND
DOWN
USBP5 3 12 USBN1 8 4 USBN1 10
3 12 19 USBN1 USBOC
Match pairs to 50 mil. 4 ESD-IP4220
2
4 X_CMC-L12-181D017-LF H2X5[9]M_BLACK-RH
CONN-USBX2
N31-2051581-H06
KB_PWR
Trace lengths must be less 12 inches KB_PWR
Trace lengths must be less 5 inches 5V_FUSB 5V_FUSB
C196 C599
L30
USB2 C0.1u16Y0402
USBP3 5 1 USBP3 5 9 X_C0.1u16Y0402
19 USBP3 5 9 L27
USBN3 6 2 USBN3 USBN2 6
19 USBN3 6
UP
USBP2 7 10 D24 19 USBP7 USBP7 5 1 USBP7 D34
7 10
5
USBP2 7 3 USBP2 8 19 USBN7 USBN7 6 2 USBN7 JUSB2
19 USBP2 8
USBN2 8 4 USBN2 USBP3 6 4 USBP2 1 2 USBP6 6 4 USBP7
19 USBN2 VCC VCC
1 11 19 USBP6 USBP6 7 3 USBP6 USBN7 3 4 USBN6
USBN3 1 11 USBN3 USBN2 USBN6 8 USBN6 USBP7 USB0- USB1- USBP6 USBN6 USBN7
X_CMC-L12-181D017-LF 2 2 1 3 19 USBN6 4 5 USB0+ USB1+ 6 1 3
DOWN12
USBP3 3 12 7 8
3 ESD-IP4220 X_CMC-L12-181D017-LF GND GND ESD-IP4220
Match pairs to 50 mil. 4 10
2
4 USBOC
CONN-USBX2 H2X5[9]M_BLACK-RH
B B
5V_RUSB
LAN_USB1A
5 PWR GND 23
19 USBN11 6 USB- GND 24
19 USBP11 7 USB+ GND 25
8 26
GND UP GND
1 PWR GND 27
19 USBN10 2 USB- GND 28
19 USBP10 3 USB+DOWN GND 29
4 GND GND 30
RJ45_USBX2_LEDX2_TX-GIGA-RH-5
5V_RUSB
A A
C778
X_C0.1u16Y0402
5
14 R L6 VGA_R
0.082u300mA
5
D15 D36
D DDC_SCL 6 4 DDC_SDA G 6 4 B R182 D
140R1%0402 C156 C155
VSYNC_A 1 3 HSYNC_A R 1 3 7.5 / 15 / 15 X_C10p50N0402 C22p50N0402
ESD-IP4220 ESD-IP4220
2
14 G L4 VGA_G
0.082u300mA
R180
150R1%0402 C150 C149
X_C10p50N0402 C22p50N0402
14 B L2 VGA_B
0.082u300mA
VCC5
10 mils GND trace
R169 C139 C0.1u25Y0402-RH R178
W/10 ; S/10 150R1%0402
C144 C142
5
Y 4 5V_HSYNC
14,15 HSYNC# HSYNC# 2 B
GND
VCC5
NC7SZ08M5X_SOT23-5 5V_VSYNC R166 39R0402-2 VSYNC_A 7.5 / 15 / 15
3
U7 C0.1u25Y0402-RH
17
U88_1 1 A
VCC VGA1
Y 4 5V_VSYNC DSUB-VGAF_BLUE-RH-2
14,15 VSYNC# VSYNC# 2 B DDC_SCL 15 5
GND 10
NC7SZ08M5X_SOT23-5 VSYNC_A 14 4
3
9
HSYNC_A 13 3
8
DDC_SDA 12 2
HSYNC# R580 X_0R/4 5V_HSYNC 7
C132 11 1
VSYNC# R582 X_0R/4 5V_VSYNC C141 C125 C137 6
VCC3 VGAPWR_FB X_C47p50N0402
16
X_C470p50X0402 X_C470p50X0402 C158 C138
X_C47p50N0402
X_N-2N7002_SOT23
R177
B VCC3 B
R165
X_4.7KR0402
Q28 R164
G
X_N-2N7002_SOT23
R179
A A
LAN_VDD33
3VDUAL
1
R276 LAN_VDD33 CP51
Y1 1MR
REF14
X_C0.1u16Y0402
C331
LAN_VDD33 C306 C22u6.3X50805-RH
25MHZ18P_D-4 CP50
2
REF11 REF5 REF6
C0.1u16Y0402
C303
X_C0.1u16Y0402
C275
2.49KR1%0402
D C231 C27P50N0402 LAN_XTAL1 D
LAN_VDD1.05C782 C0.1u16Y0402
R560 1KR0402
X_RTL8105EX_RTL8105E X_N58-22F0771-F02 C0.1u16Y0402
R299
LAN_LINK100#
for 10/100 LAN
LAN_XTAL2
LAN_XTAL1
LAN_VDD33 LAN_VDD33
LAN_GPO
C321 X_C0.1u16Y0402 C322 X_C0.1u16Y0402
RSET
EESK
RSET:2.49K ohm close to pin46 (5mil)
D56 D57
5
48
47
46
45
44
43
42
41
40
39
38
37
U13 MDI_0- 6 4 MDI_1- MDI_2- 6 4 MDI_3-
49
LED1/EESK
AVDD33
AVDD33
AVDD10
CKXTAL2
CKXTAL1
AVDD33
DVDD10(NC)
LED0
DVDD33
RSET
GPO/SMBALERT
GND MDI_0+ MDI_1+ MDI_2+ MDI_3+
1 3 1 3
ESD-IP4220 ESD-IP4220
2
MDI_0+ 1 36 REGOUT
MDI_0- MDIP0 REGOUT LAN_VDD33 C304 C0.1u16Y0402
2 MDIN0 VDDREG 35
C302 C0.1u16Y0402 LAN_VDD1.05 3 34 LAN_VDD33 C221 C4.7u6.3X50805
MDI_1+ AVDD10 VDDREG
4 MDIP1 ENSWREG 33 LAN_VDD33
MDI_1- 5 32 EEDI R211 10KR0402 EEDO R270 200R0402 LAN_ACT_LED3
C252 C0.1u16Y0402 LAN_VDD1.05 MDIN1 EEDI EEDO
6 AVDD10(NC) LED3/EEDO 31
MDI_2+ 7 30 EECS R209 10KR0402 EESK R252 200R0402 LINK1000#
MDI_2- MDIP2(NC) EECS LAN_VDD1.05 C781 C0.1u16Y0402
8 MDIN2(NC) DVDD10 29
C267 C0.1u16Y0402 LAN_VDD1.05 9 28 PE_WAKE# PE_WAKE# 22
C MDI_3+ AVDD10(NC) LANWAKEB LAN_VDD33 C253 C0.1u16Y0402 C
10 MDIP3(NC) DVDD33 27 R270 R252
MDI_3- 11 26 ISOLATEB R304 1KR1%0402
C255 C0.1u16Y0402 LAN_VDD33 MDIN3(NC) ISOLATEB PLTRSTBU2_LAN# R313 15KR1%0402
VCC3 8111E: 200R 8111E: 200R
12 AVDD33(NC) PERSTB 25
8105E: 510R 8105E: UNSTUFF
SMBDATA(NC)
SMBCLK(NC)
8111E: STUFF
DVDD10
EVDD10
8105E: UNSTUFF
HSON
HSOP
HSIN
HSIP
GND
REGOUT 1 2
R561 0R0805
CH-4.7u1.7A94mS-RH
LAN_VDD1.05
C0.1u16Y0402
C222
C10u6.3X50805-RH
C260
X_C4.7u6.3X50805
C289
C0.1u16Y0402
C265
X_C0.1u16Y0402
C271
C1u6.3Y0402-RH
C311
C1u6.3Y0402-RH
C307
X_C4.7u6.3X5-1
C774
RXLANN1 C298 C0.1u10X0402 RX_LANN1 13
RXLANP1 C300 C0.1u10X0402 RX_LANP1 13
LAN_EVDD1.05 C779 C0.1u10X0402
CK_PE_100M_LAN#
CK_PE_100M_LAN# 7
CK_PE_100M_LAN
CK_PE_100M_LAN 7
C0.1u16Y0402
TXLANN1
TXLANN1 13
C780
TXLANP1
TXLANP1 13
LAN_VDD33
C0.01u25X0402
C198
MDI_1+ 17
MDI_1- TD2+
C198 11 TD2- 30
R212 MDI_2+ 16 Yellow
Deep Mode WAKE Power CTRL Circuit X_220R
8111E: UNSTUFF
8105E: STUFF
MDI_2-
MDI_3+
10
TD3+
TD3-
5VDRV1 30 15 TD4+
MDI_3- 9 TD4-
VCC5_SB UP7704 2A VCC3 R214 510R0402
RCT
LINK1000#
14
21
GND
Orange
LAN_VDD33
COST DOWN LAN_LINK100# 21
22 22 31
VCC5_SB
C193 C1000p50X0402
R217 R214
S
LAN_LINK100#
D
4
3.3V
U38
R647 X_0R/4 1
VCTRL
POK LAN_ACT_LED3
VOUT 6
2 EN
1
A A
2N7002_SOT23 7 X_C0.018u16X0402-RH R646 5VDRV1 C1000p50X0402
GND
GND
VREF
UP7704U8_PSOP8 R644
8
9
1
+
3.3KR1%/4
EC76
CD470u6.3SO-RH
2
C691
C22u6.3X50805-RH
C690 C692
C10u10Y0805 C0.1u16Y0402 C0.1u16Y0402 AUDIO1A (Upper)
X_C10u10X50805-HF-2 LINE_IN_L R453 1KR0402 LINEIN_L_J LINEIN_R_J 10
LINE1_JD 11
LINE1_JD
25
38
12
1
9
U25 LINE_IN_R R451 1KR0402 LINEIN_R_J LINEIN_L_J 13
18
DVDD
AVDD1
AVDD2
DVDD-IO
47 36 LOUTR EC53 1+ 2 C10u10SO-RH LOUT_R
SPDIFI/EAPD FRONT-R LOUTL EC52 1+
FRONT-L 35 2 C10u10SO-RH LOUT_L C713 C714 JACK-AUDIOX6-26P_L-pbg_R-obl
D D
48 SPDIFO 887VD/888S/892: 75R C100p50N0402 C100p50N0402
GPIO1/DMIC-DATA
VREF MIC2R C695 C4.7u6.3X50805 MIC2_R
33 Sense C MIC2-R 17
C708 JDREF 40 16 MIC2L C696 C4.7u6.3X50805 MIC2_L 887VD/888S/892: 75R
C709 JDREF MIC2-L
C10u6.3X50805 C0.1u16X0402 20
889: 68R
CD-R
19
AVSS1
AVSS2
CD-GND
DVSS
Closed Codec 12 PCBEEP 18 AUDIO2A (Upper)
R813 CD-L SROUT_L R497 75R0402 SROUT_L_J SROUT_R_J 10
20KR1%0402 SURR_JD 11
C ALC887 SURR_JD C
887VD/888S/892: 4.7u/X5R 12
4
7
26
42 SROUT_R R498 75R0402 SROUT_R_J SROUT_L_J 13
pin2 889: 10u/X5R 18
888S: SPDFIO2
C720 C719 X_JACK-AUDIOX6-26P_L-pbg_R-obl
889 : GPIO0/DMIC-CLK R80 C100p50N0402 C100p50N0402
892 : GPIO0/DMIC-CLK/SPDIFO2 X_0R0402
887VD/888S/892: NC
pin3 F_MIC2_L CEN_OUT R512 75R0402 CEN_OUT_J AUDIO2B(Middle)
889: GND BASS_J 6
888S: GPIO1/DMIC_CLK
F_MIC2_R CEN_JD CEN_JD 7
889 : GPIO1/DMIC-DATA BASS R540 75R0402 BASS_J
887VD/888S/892: 75R reserve ESD protect 8
2
892 : REGREF CEN_OUT_J 9
889: 68R
ESD-0402
ESD-0402
17
8P4R-75R0402 C722 C721
pin4 LINE2_L 7 8 F_LINE2_L C100p50N0402 C100p50N0402 X_JACK-AUDIOX6-26P_L-pbg_R-obl
888S: GPIO0/DMIC-CLK LINE2_R 5 6 F_LINE2_R D53 D54
1
MIC2_L 3 4 F_MIC2_L
889: DVSS1 MIC2_R 1 2 F_MIC2_R
892: GPIO0/DMIC-CLK SURRBACK_L R541 75R0402 SURRBACK_L_J
RN17 AUDIO2C (Down)
LOUT_L_J F_LINE2_L SURRBACK_JD SURRBACK_R_J 1
D27
pin29 SURRBACK_R R542 75R0402 SURRBACK_R_J SURRBACK_JD 2 14
888S: LINE1-VREFO Y LOUT_R_J F_LINE2_R 4 15
LINE2_VREFO Z SURRBACK_L_J 5 16
889 : LINE1-VREFO
2
2
X C724 C723 3
892 : LDOVDD
ESD-0402
ESD-0402
ESD-0402
ESD-0402
S-BAT54A_SOT23 C100p50N0402 C100p50N0402
X_JACK-AUDIOX6-26P_L-pbg_R-obl
Y
pin37 MIC2_VREFO Z D50 D49 D52 D51
1
1
888S: PIN37-VREFO X
S-BAT54A_SOT23
889 : NC
2
4
6
8
D30
B 892 : PIN37-VREFO RN12 LIN_IN SURR B
8P4R-4.7K/4 D
N31-2051411-H06
1
3
5
7
JAUD1
F_MIC2_L 1 2
MIC GND BASS_J R687 X_22KR0402 SURRBACK_L_J R543 X_22KR0402
SENSE_A R248 5.1K1%4 FRONT_JD F_MIC2_R 3 4 CEN_OUT_J R688 X_22KR0402 SURRBACK_R_JR544 X_22KR0402 LIN_OUT CEN/BAS
MICPWR PRESENCE# SROUT_R_J R689 X_22KR0402 LOUT_L_J R546 22KR0402 E
R257 10K1%4 LINE1_JD F_LINE2_R 5 6 MIC2_JD SROUT_L_J R690 X_22KR0402 LOUT_R_J R551 22KR0402
FLINE OUTR LINE NEXT R
R124 20K1%4 MIC1_JD FR-IO-SEN R260 47R/4 7 8
HPON
R255 39.2K1%4 SURR_JD F_LINE2_L 9 10 LINE2_JD MIC1 SIDESURR
FLINE OUTL LINE NEXT L
F
Closed Codec H2X5[8]M_BLACK-RH R263
C725 R308 20K1%4
C1000p16X0402 39.2K1%4
SENSE_B R120 10K1%4 CEN_JD F_LINE2_L R309 22K/4
F_LINE2_R R347 22K/4
R253 5.1K1%4 SURRBACK_JD
A
LDOVDD A
REF7 R843
889/888S stuff
OPT
C687 887VD/892 UNSTUFF
X_N54-26F0111-K06 C688
C10u10X50805-HF-2
REF13 C0.1u16Y0402 MICRO-START INT'L CO.,LTD.
Title
OPT 28 Audio-ALC892
X_ALC892 Size Document Number Rev
Custom MS_7641 30
Date: Tuesday, July 26, 2011 Sheet 27 of 36
5 4 3 2 1
5 4 3 2 1
Super I/O
INDEX# 3 4 RN20 X_0R C286 X_C0.1u25Y0402-RH
TRACK0# 5 6 X_8P4R-1KR0402 RN60 X_8P4R-4.7KR0402 LPT no use pull high resistor need pull up
RDDATA# 7 8 2 1 DSRB# D7 CN3
DSKCHG# 4 3 CTSB# 5V_PR RSLCT 7 8
R423 X_1KR0402 VCC5
6 5 RIB# RPE 5 6 X_8p4C-330p50N
U9 8 7 DCDB# X_BAS32L_LL34 RBUSY 3 4
SB_PCIRST# R602 SINB RACK# JLPT1
17 SB_PCIRST#
LPC_DRQ#0
29
30
LRESET# DENSEL#/GPIO30 7
8
default GPIO X_4.7KR0402 RN3
1 2
STB# 1 2 AFD#
17 LPC_DRQ#0 LDRQ# MOA#/GPIO31
LPC Interface
SERIRQ 31 9 PRND7 1 10 CN4 PRND0 3 4 RERR#
17 SERIRQ SERIRQ DRVA#/GPIO32
LPC_FRAME# PRND6 RACK# PRND4 PRND1 PINIT#
VCC3 17 LPC_FRAME#
PCICLK4_SIO
32
38
LFRAM# WDATA#/GPIO33 10
11
default debug PORT PRND5
2
3
9
8 RBUSY PRND5
1
3
2
4 X_8p4C-330p50N PRND2
5
7
6
8 SLIN#
17,21 PCICLK4_SIO PCICLK DIR#/GPIO34
SIO_CLK 39 12 PRND4 4 7 RPE PRND6 5 6 PRND3 9 10
D 7 SIO_CLK CLKIN STEP#/GPIO35 VCC3 D
LPC_AD0 33 13 5 6 RSLCT PRND7 7 8 PRND4 11 12
FDC
17 LPC_AD[3..0] LAD0 HDSEL#/GPIO36
LPC_AD1 34 14 PRND5 13 14
R425 LPC_AD2 LAD1 WGATE#/GPIO37 RDDATA# RSLCT RN61
35 LAD2 RDATA#/GPIO50 15 2 18P4R-4.7KR0402 X_10P8R-2.2KR CN6 PRND6 15 16
X_4.7KR0402 LPC_AD3 36 16 TRACK0# RPE 4 3 STB# 1 2 PRND7 17 18
LAD3 TRK0#/GPIO51 INDEX# RBUSY RN4 PRND0 RACK#
INDEX#/GPIO52 17 6 5 3 4 19 20
LPC_FRAME# 18 WP# RACK# 8 7 SLIN# 1 10 AFD# 5 6 X_8p4C-330p50N RBUSY 21 22
THERM_SIC_R WPT#/GPIO53 DSKCHG# RERR# R789 PINIT# STB# PRND1 RPE
8 THERM_SIC_R 57 CIR_LED#/SCL DSKCHG#/GPIO54 19 2 9 7 8 23 24
THERM_SID_R 58 4.7KR0402 PRND3 3 8 PRND0 RSLCT 25
8 THERM_SID_R PECI/SDA
R608 X_0R/4 63 100 RSLCT PRND2 4 7 AFD# CN5
7,19,30,32 FP_RST# WDTRST#/GPIO14 SLCT/GPIO60
TALERT# R342 67 101 RPE 5 6 PRND1 SLIN# 7 8 X_BH2X13_BLACK-RH
8,18 TALERT# LPC_PME# OVT# PE/GPIO61 RBUSY PINIT# X_8p4C-330p50N
19 LPC_PME# 79 PME# BUSY/GPIO62 102 BOM 5 6
103 RACK# OPT G51- G51- G51- X_10P8R-2.2KR PRND3 3 4 R611
ACK#/GPIO63
Parallel Port
Ver LXA Ver LAA 5VIN add 20100509 +12VIN_IO 93 104 SLIN# M1SP994- M1SP995- M1SP996- PRND2 1 2
VIN6 SLIN# Ver LXA : stuff
Hardware Monitor
5VIN 94 105 PINIT# GPIO Q13 Q13 Q13
R608 : x o VIN5 INIT#/GPIO64 Ver LAA : don't stuff
C53 5VSBIN 95 106 RERR# R162
R605 : o x VIN4(VDIMM) ERR#/GPIO65 AFD# RERR# RERR# C235
96 VIN3(VDDA) AFD#/GPIO66 107
R609 : x o C0.01u25X0402 97 108 STB# EXTRA_GPIO0 L
R604 : 0R 10K CPUVCORE VIN2(VLDT) STB#/GPIO67 PRND0 X_2.7KR0402 X_C330p50X0402
98 VIN1(Vcore) PD0/GPIO70 109 L L
110 PRND1
PD1/GPIO71 PRND2
29 CPU-FAN 21 FANIN1 PD2/GPIO72 111
22 112 PRND3 EXTRA_GPIO1 L L
VCC5_SB 29 CPU-FANPWM FANCTL1 PD3/GPIO73
23 113 PRND4 L
29 SYS-FAN
24
FANIN2 PD4/GPIO74
114 PRND5 SERIAL PORT 1
29 SYS-FANPWM FANCTL2 PD5/GPIO75
25 115 PRND6
EXTRA_GPIO2 FANIN3/GPIO40 PD6/GPIO76 PRND7 C57 X_C0.1u25Y0402-RH
26 FANCTL3/GPIO41 PD7/GPIO77 116 EXTRA_GPIO2 L U5
Power Saving
3VSB_LAN_EN# SOUTA RTSA# NRTSA R133 0R C
near the SIO pin 26 3VSB_LAN_EN# 44 ERP_CTRL1# SOUT1/STRAP4E_2E 124 16 DA1 DY1 5
125 SINA DTRA# 15 6 NDTRA
TIMING_1 SIN1 DCDB# SOUTA DA2 DY2 NSOUTA
54 SUS_WARN#/TIMING_1 DCD2#/SEGG/GPIO20 126 13 DA3 DY3 8
R794 X_4.7KR TIMING_1 53 127 RIB# VCC3 11 10 -12VCOM D6 X_1N4148
3VDUAL SUS_ACK#/TIMING_2 RI2#/SEGF/GPIO21 GND VSS -12V
it strap as timing mode 46 128 CTSB#
R795 X_4.7KR TIMING_4 TIMING_4 DPWROK/TIMING_3 CTS2#/SEGA/GPIO22 SINB X_C0.1u25Y0402-RH
3VDUAL 47 6 GD75232_SSOP20
SLP_SUS#/TIMING_4 SIN2/SEGE/GPIO27 SOUTB C74
49 CIRWB#/GPIO01 SOUT2/SEGB/GPIO26/STRAP_DPORT 5
50 3 DSRB#
CIRTX/#GPIO02 DSR2#/L#/GPIO25 EXTRA_GPIO4 R406 EXTRA_GPIO0 R500
30 DUAL_SW 51 CIRRX#/GPIO03 RTS2#/SEGC/GPIO24 2
STRAP_TIMING 52 1 EXTRA_GPIO3 X_4.7KR0402 4.7KR0402 NRIA# 7 8
R787 X_2M/6 STRAP_TIMING DTR2#/SEGD/GPIO23 EXTRA_GPIO0 NCTSA#
VBAT 55 S(3P5)_Gate#/SLOTOCC#/GPIO04 IRTX/GPIO42 27 5 6
R786 4.7KR 56 28 EXTRA_GPIO1 R397 EXTRA_GPIO1 R398 JCOM1 NDSRA# 3 4 CN1
3VDUAL S(3)_Gate#/GPIO05/WDTRST# IRRX/GPIO43
62 X_4.7KR0402 4.7KR0402 NDCDA# 1 2 NSINA NRTSA 1 2 X_8p4C-330p50N
S(0P5)_Gate#/GPIO13/BEEP NSOUTA NDTRA
3 4
KBC Function
40 R395 EXTRA_GPIO2 R402 5 6 NDSRA# NDTRA 7 8
KBRST# KBRST# 19
LED1 64 41 A20GATE 19 X_4.7KR0402 4.7KR0402 NRTSA 7 8 NCTSA# NSINA 5 6
LED2 GPIO15/LED_VSB/ALERT# GA20 KBDATA NRIA# NSOUTA CN2
65 GPIO16/LED_VCC KDATA 69 KBDATA 32 9 3 4
66 70 KBCLK R444 EXTRA_GPIO3 R565 NDCDA# 1 2 X_8p4C-330p50N
GPIO17/CPU_PWGD KCLK KBCLK 32
SIO_HD_RST# 74 71 MSDATA X_4.7KR0402 4.7KR0402 H2X5[10]M_BLACK-RH
PCIRST1# MDATA MSDATA 32
26 PCIERST2 PCIERST2 75 72 MSCLK
PCIRST2# MCLK MSCLK 32
ACPI Function
TMP_VREF
F71869AD
F71869AD CP7
Ver LAA : don't stuff
X
D32
3VDUAL 3VDUAL VCC3
10KR1%0402
MOS_TMP
VSB3V Z JTPM1
C350 THERMDC_CPU X_Copper Y 17,21 TPM_PCLK 1 2
X_C0.1u25Y0402-RH PCIRST# 3 4 RT1
LPC_AD0 5 6 SERIRQ
8P4R-4.7KR0402 C287 X_BAT54A_SOT23 LPC_AD1 YT103S-1N
7 8 VCC5
RN9 C0.1u16Y0402 C291 LPC_AD2 9 THERMDC_CPU
3VDUAL 1 2 PWRBTIN# R606 X_0R/4 LPC_AD3 11 12
3 4 C589 LPC_FRAME# 13 14
VCC5_SB 5 6 ATX_PSON# VCC3 R788 SIO_HD_RST# X_C0.1u16Y0402 C1u6.3Y0402-RH
3VDUAL 7 8 RSMTST_IO X_4.7KR0402 H2X7[10]M-2PITCH_BLACK-RH
VCC3 C600
LPC I/O STRAPPING RESISTOR PCIRST# Use 1uF and 0.1uF close to pin65. ADD for POWER VRM mosfet temperature detect
2
4
6
8
X_10KR1%0402 VCC5_SB C361
Don't STUFF STUFF RN23 THERMDA_CPU THERMDC_CPU
8P4R-4.7KR0402 5VSBIN R340 X_47KR1%0402-RH R354
Q22
RTSA# Disable UVP Enable UVP C2200p50X0402 10KR1%0402
1
3
5
7
A 4 A
SOUTA 4E 2E LED1
Chasiss Intrusion 32 SUS_LED 3
1
5
DTRA# FAN START DUTY 60% FAN START DUTY 100% 3VDUAL 6 2 LED2
VBAT 32 PWR_LED
P-MMBT3906LT1G_SOT23-RH THERMDC_CPU
SOUTB ENABLE 80 Port internal pull hi com2 NN-CMKT3904_SOT363-6-RH
X_10KR0402
Q49 SYS_TMP
R358
E
FANPWMCTRL2 PWM FAN LINEAR FAN
R343
2MR B
C354
C2200p50X0402 MICRO-START INT'L CO.,LTD.
JCI1 Title
CHASSIS
LPC_PME#
C
2 THERMDC_CPU
N31-1020011-C09 Size Document Number Rev
H1X2M_BLACK-RH Custom MS_7641 30
Date: Friday, August 05, 2011 Sheet 28 of 36
5 4 3 2 1
5 4 3 2 1
CPU FAN
FAN CONTROL +12V
If using 3 pin fan, The Q40 will turn off to
avoid the VCC5(R527) bias to CPU-FANPWM.
D D3 1N4148 D
2
4
6
8
CPU-FANPWM RN24
28 CPU-FANPWM
C45
C1000p50X0402 10KR0402
R53 8P4R-4.7KR0402
1
3
5
7
X_4.7KR0402 D2
X_1N4148
solve 3pin and 4pin smart fan issue
D
G Q2
N-2N7002_SOT23
CPUFAN
S
4
D
3 MEC1
2 G Q7
28 CPU-FANPWM
1+
1 N-2N7002_SOT23
EC37
S
X_CD100u16SO-RH-2 BH1X4B_WHITE-RH-2
2
C68
X_C10u16Y1206
C C
SYSFAN
+12V
+12V
8
U12A
S
3 Q43 R258
+ P-P06P03LCG_SOT89-3-RH
1 G
SYS-FANPWM 2
B 28 SYS-FANPWM - B
AS358MTR-E1_SOIC8-RH X_0R0805
D
X_10KR0402 3
C1000p50X0402 2
1
1 +
R242 EC28 C229 BH1X3B-FR_WHITE-RH
CD100u16SO-RH-2 X_C10u16Y1206
2
10KR0402
R238
3.9KR1%
1.5A
3VDUAL
VCC3
1.25VREF_NB
R359 +12V
D39 is reserved 10KR0402
R335
4.7KR0402
VCORE_EN# 6
28,31,32 ATX_PWROK D22 X_S-RB751V-40_SOD323-RH R271 C327
SYS_PWRGD 14
20KR0402 X_C0.1u25Y0402-RH
D
Q18 7,19,28,32 FP_RST# D23 S-RB751V-40_SOD323-RH
8
VCORE_EN G U12B
D
VCC5_SB SLP_S3# 5 Q47
N-2N7002_SOT23 VCC5_SB + VCC18_G1
7 G
S
Q17 D20 S-RB751V-40_SOD323-RH 6
D - D
C349
8P4R-4.7KR0402 G N-P45N02LDG_TO252-RH
C0.1u25Y0402-RH
S
4
VDDA_25 N-2N7002_SOT23 R364 R317
D5
S
7 8 4.7KR0402 AS358MTR-E1_SOIC8-RH 10KR1%0402
D
5 6 Q52 VCC18_FB1
ATX_PWROK 28,31,32 NB1_2V +1.8V_S0
3 4 Q19 G
C4.7u6.3X5-1
1 2 2 6
C
X_S-RB751V-40_SOD323-RH
1
Q50 N-2N7002LT1G_SOT23-RH C339 R330
+
1
S
RN34 5 3 R331 10KR0402 B X_C1000p50X 10KR1%0402 EC27
C72
4 NN-CMKT3904_SOT363-6-RH CD820u2.5SO-RH-1
2
N-2N3904_SOT23
E
C348
C4.7u6.3x5r
Z
Y X
X_1PS226_SOT23
VCC_DDR
R216
1.02KR1%0402
Chage 1087 to 7707 for Power up seqence
R269 VCC_SB
20KR0402-2
U40A
8
C 1_2VREF C
D
SB_CORE_VREF 3 Q71
VDDA_25 POWER +12V +
1 SB_CORE_DRV G
VDDA_25
2 -
R337 R316 VCC_DDR N-P45N02LDG_TO252-RH
S
VCC3 VDDA_25
C516
C0.1u16Y0402
10KR0402 20KR0402 SB_CORE_SEN R338
4
0.3A
U1 U18A
300mA
8
UP7707M5-00_SOT23-5 3KR1%0402
D
1 5 3 Q41
VIN VOUT
1
+ VCCA_1V2
C22
C1U10Y0402-RH
VCCA_1V2_DRV R346
+
1 G
C345
EC35
C0.1u16Y0402
2 - X_8.87KR1%0402
C10
C10u6.3X50805
2
C23
C0.1u16Y0402
C20
X_C0.1u16X
4
EN R12 AS358MTR-E1_SOIC8-RH
1
C6
+
2.1K/6/1%
2
X_C0.1u16Y0402 EC24
R30 10K/4 R321 CD820u2.5SO-RH-1 SB_CORE_DRV R251 C436 SB_CORE_SEN
28,31,32 ATX_PWROK
2
X_8.87KR1%0402 X_1KR1%0402 X_C2.2n16Y0402
VCC3
R29 X_10K/4 R3 AS358MTR-E1_SOIC8-RH
1K/4/1% R781 X_1K/4/1% C518 X_C2.2n16Y0402
VCCA_1V2_DRV VCCA_1V2_SEN
3VDUAL
USB_PHY USB_PHY
1.2V
CPU_VDDR VCCA_1V2
C452
EC38
R56 add 0ohm.
X_CD100u16SO-RH-2
C0.1u25Y0402-RH
ADJ
1
C489
R39 add 1uF Cap C485 R434 CP38 X_Copper R221 X_0R0805
C10u16Y1206
R1
+
FIELD OEM/ODM COST DOWN 1KR C488
800mA R232 X_0R0805
LT1087S_SOT89 X_C4.7u10X50805-RH CP40 X_Copper
1
2
VCC5_SB VCC5 R597,R598,R599 C10u16Y1206
ADD ,Q56,R603 R601,R602,R600
VCC3
B R597,R598,R599 B
R56 R40 REMOVE R601,R602,R600 ,Q56,R603 R433
R2 CPU_VDDR 1.2V POWER
X_47K/4/5% X_27K/4/5%
D
G R57 X_0R/4/5%
S
Q3
VCC3
R39
S
X_0R/4/5%
R9
X_5.1K/4/5%
;Each output is capable of 700uA sinking 1_2VREF
R562 10R/4 C785 C0.1u16Y/4 current and 300uA souring current 1.25VREF_NB
R118
1
U37
SCL0 3 7 G2 D2
5VSB
S2
Q13
1
2
U2 G2
SLP_S3# 5 7 5VSBDRV1 C791
5VSB
5VCC
SLP_S5# 6
19,28,31 SLP_S5# S5#
D C789 C790
NP-P2003ND5G_TO252-5-RH C0.1u16Y/4 C0.1u16Y/4
GND
VCC5
+12V
VCC_DDR
1.25VREF_NB 1_2VREF
C601
X_C0.1u16Y0402 C606
R823 X_C10u10Y0805
DDR VTT Power R822 X_1.02KR1%0402 U40B
8
To CPU Copper trace width > 250mils , Fill X_1.02KR1%0402
D
VCC5_SB VCC1_1REF 5
island behind DIMM > 400mils . +
7 G
VCC_DDR
VCC_DDR 6 -
R821 Q72
S
R808 C605 X_10.7KR1%0402 X_N-P45N02LDG_TO252-RH
4
D D
X_0.1u/16v/Y5/4 R793
U17
R333 X_20KR0402-2
8 1 1KR1%0402 VTT_DDR
VREF2 VIN
7 ENABLE GND 2
6 3 VCC1_1
VCC5_SB VCNTL VREF1
5 BOOT_SEL VOUT 4
GND 9
R320 AS358MTR-E1_SOIC8-RH
1 +
uP7711_SOP8-RH
1
C882 C775 C776 R326 EC33 C590 X_0.01u/16v/X7/4 R819 X_20KR C604
+
EC36
X_CD820u2.5SO-RH-1
1KR1%0402 CD820u2.5SO-RH-1 X_1u/16v/Y/6
2
X_C1u6.3Y0402-RH
X_C0.1u16Y0402
X_C0.1u16Y0402
1KR0402
2
R818 X_3KR1%0402
C761
X_C0.1u16Y0402
R820
X_8.87KR1%0402
NB1_2V VCC1_1
R231 0R
NB 1.1V POWER VCC_DDR R227 0R
+12V R226 0R
D
C C
1.25VREF_NB 1_2VREF R323 X_20K/4 G C296
VCC1_1:RS780/RS760-1.1V RS740-1.2V X_C10u10Y0805
C351 Q48
S
0.1u/16v/Y5/4 N-P45N02LDG_TO252-RH
R345
R352 X_1.02KR1%0402
8
1.02KR1%0402
D
NB1_2VREF 5 U18B
+
7 G
6 AS358MTR-E1_SOIC8-RH Q46
C352 R336 - N-P45N02LDG_TO252-RH
S
C0.1u16Y0402 10.7KR1%0402
4
R324
20K/4
NB1_2V
1
C340 X_0.01u/16v/X7/4 R319 X_20KR
+
EC30
CD820u2.5SO-RH-1
EC29
CD820u2.5SO-RH-1
C326
X_1u/16v/Y/6
2
NB1_2V
R322 3KR1%0402
X_C0.1u16Y0402
X_C0.1u16Y0402
C0.1u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
C297
C285
C215
C264
C343
C664
X_C0.1u16Y0402
R325
8.87KR1%0402
B B
D1
S-BAT54C_SOT23
+12V X Y 5VDIMM
DDR II 1.8V POWER
Z
CHOKE2
6138_VCC
D55 5VDIMM_IN 1 2 5VDIMM
Y
R17 X_S-BAT54C_SOT23
2.2R0805 C94 CH-1.2u15A3.0m-RH
CD470u6.3SO-RH
CD470u6.3SO-RH
CD470u6.3SO-RH
1
1
6103_DDR_BOOT1 C59
+
Z
EC7
EC6
EC2
C73 X_C0.01u16X0402 VCC_DDR:
C37 1u/25v/X7/8
2
H-MOS主料:D03-0903B4B-N03、AVL:D03-0480900-O05
6138_VCC
VCC_DDR
C35
1u/6.3v/Y5/4
Q24
C13 G VCC_DDR
5
GND
R266
Q4 X_C3300p50X0402 C117
G R88 2.05KR1%0402 R22 N-NTD4806NT4G_DPAK3-RH C3300p50X0402 EC11 1+ 2CD820u2.5SO-RH-1
DDR3_FB 42.2KR1%0402
0R0402
C7 N-2N7002_SOT23 C41
S
X
C596
D29
S-BAT54A_SOT23
X_C180p50N0402 C16 R26
2
4
6
8
X_1KR0402
Z
RN1
SUS_LED 8P4R-4.7KR0402
16
17
D D
1
3
5
7
PWR_LED C0.1u25Y0402-RH KB_MS1
MSDATA R67 MSDATA_R 7 10
28 MSDATA
8
EMI MSCLK R79 MSCLK_R 11
28 MSCLK
For MSI / Intel Front Panel C607 C603
12
MS
9
VCC3 C609 KBDATA R71 KBDATA_R 1 4
VCC5_SB 28 KBDATA
X_C0.1u25Y0402-RH JFP1 2
KBCLK R82 KBCLK_R 5
28 KBCLK
R549 330R HDD+ 1 2 PWR_LED X_C0.1u25Y0402-RH 6 3
HDD+ PLED PWR_LED 28
X_C0.1u25Y0402-RH KB
HDD- 3 4 SUS_LED R545 EMI MINIDIN12P-RH
SUS_LED 28
13
14
15
HDD- SLED C43
4.7KR0402
RESET- 5 6PWSW+ C220p50N0402 C30
R537 RESET- PWSW+ C220p50N0402
RESET+ PWSW+ R548
Near Super I/O
100R1%0402
7,19,28,30 FP_RST# 7 RESET+ PWSW- 8
PSIN 28
EMI suggest
C31
33R0402 9 C220p50N0402 C38
R539 NC C602 C220p50N0402
C584
100R0402 H2X5[10]M_BLACK-RH EMI
X_C0.1u25Y0402-RH VCC5
C0.1u25Y0402-RH
VCCP EMI solution
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
C0.1u25Y0402-RH
C61
C84
C360
C585
C118
C545
C134
C135
MSI Front Panel Connector
C C
JFP2 Adding JFP2 connector
1 GND SPEAKER 2
SUS_LED 3 4
SLED BUZ+ VCC5
PWR_LED 5 6
PLED BUZ-
BUZ1 VCC3
BAS32L_LL34 D25
VCCSPK 8 VCC5
1
BUZZER VCC3 VCC5 VCC5
VCC3 VCC5
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
2
H2X4[7]M_COLOR-RH RN10
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
C197
C411
C257
C527
C468
1 2 C543
BUZZER-LF
C587
C579
3 4 X_C0.1u25Y0402-RH
C52
5 6
7 8 SPK C555
X_C0.1u25Y0402-RH
8P4R-150R0402
C
Q55 C410
R412 B
19 SPKR
2.2KR0402 N-2N3904_SOT23
E
C0.1u25Y0402-RH
B B
ATX Connector
3VDUAL +1.8V_S0
X_C0.1u25Y0402-RH
C0.1u25Y0402-RH
C453
C242
25
JPWR1
13 1
25
R349 X_0R0805
R363 X_0R0805
CP45 X_Copper
MICRO-START INT'L CO.,LTD.
Title
CP33 X_Copper 36 ATX/Front Panel/KB/EMI
Size Document Number Rev
Custom MS_7641 30
Date: Tuesday, August 02, 2011 Sheet 32 of 36
5 4 3 2 1
5 4 3 2 1
PCB1
X_MH1 X_MH2 X_MH3 X_MH4 X_MH5 X_MH6
D CPU1_X1 D
BAT1_X1
9
1
9
1
9
1
9
1
9
1
9
1
MH1 MH2 MH5 MH4 MH3 MH6
7 2 7 2 7 2 7 2 7 2 7 2
6 3 6 3 6 3 6 3 6 3 6 3
E95-0000015-H06
PK0-0764131-G37 BAT_CR2032
4
R387
R34 X_0R0402
R64 X_0R0402
R35 X_0R0402
FOR EMI
FOR EMI
LABEL
X_HDMI_LOGO
FM7 FM8
LABEL2 LABEL1
MEC2 MEC2
MEC2 OPT OPT
MEC2
B B
SIM2 SIM1
RUBBER1 RUBBER2 REF8 REF9 REF10
SIM2 SIM1
OPT OPT OPT OPT OPT
X_PIN1*2 X_PIN1*2
VCC5 RUBBER RUBBER CD100u16EL5-RH CD470u16EL11.5 CD1000u63EL11.5-RH
REF12
REF19
A A
OPT
OPT
CD10u16EL5-RH
CD1800u63EL11.5-RH
MICRO-START INT'L CO.,LTD.
Title
37 Mannual parts for BOM
Size Document Number Rev
Custom MS_7641 30
Date: Friday, August 05, 2011 Sheet 33 of 36
5 4 3 2 1
5 4 3 2 1
12V
5V
D D
3.3V
PD#
VDDA25
VCC_DDR
DDR_VTT
C C
VCCP
VRM_GD
+1.8V_S0
VCC1_1 VCC1VA2
VCC_SB
B B
SB_PWRGD NB_PWRGD
LDT_PG
LDT_STP#
LDT_RST#
A_RST#
A A
PCI_RST#
MICRO-START INT'L CO.,LTD.
Title
38 POS MAP
Size Document Number Rev
Custom MS_7641 30
Date: Monday, July 25, 2011 Sheet 34 of 36
5 4 3 2 1
5 4 3 2 1
ST6740
CPU_PWRGD
3-Phases Vcore PWROK MAP
AMD K9 940 1-Phases Vnb
D D
HT_CPU_PWRGD
C HT_VLD VCCDDR_VLD C
HTVDD_EN VDD_25_VLD
HT_MCP_PWRGD SYS_PWRGD CPU_VLD HT_PWRGD
CPUVDD_EN
SB700
B B
ATX_PWR_OK
SLP_S3#
PWRBTIN#
PS_ON#
I/O F71882 PSIN
ATX_PWR_OK
POWER CONN
Front Panel
A A
MS-7641-0A
Base on 7623-4.1 change as follow:
remove MARVELL ,USB3.0 ,1394,2DIMM,OC switch
D change ps2 to ps2+usb port D
MS-7641-30
Base on 7641.10 change as follow:
P6 change vrm intsil6323 to upI1601
C P24 add usb2 C