MSI 6507 Intel

8 7 6 5 4 3 2 1
Version 0B
Cover Sheet
Block Diagram
1
2
MS-6507 06/29/2001 Update
INTEL (R) Brookdale Chipset
GPIO Spec. 3
D
Willamette/Northwood 478pin mPGA-B Processor Schematics D
Clock CY28324 & ATA100 IDE CONNECTORS 4

mPGA478-B INTEL CPU Sockets 5-6
INTEL Brookdale MCH -- North Bridge 7-8
INTEL ICH2 -- South Bridge 9 - 10
LPC I/O W83627HF 11 CPU:
Willamette/Northwood mPGA-478B Processor
CNR RISER 12
AC'97 Codec 13
C
System Brookdale Chipset: C
Audio Amp TL072 & GAME 14

INTEL MCH (North Bridge) +
FWH-- BIOS & VCCVID 15 INTEL ICH2 (South Bridge)
SDR DIMM-168PIN DIMM1,2 16 On Board Chipset:
AGP 4X SLOT (1.5V) 17 BIOS -- FWH
PCI SLOT 1 & 2 & 3 18 LPC Super I/O -- W83627HF
Front Panel & Connectors 19 Clock Generation -- CY28324
USB & FAN Connectors 20 PCI SOUND -- C-MEDIA CMI8738
B B
D-LED & AUDIO 6 CHANNEL CONTROL 21
Votlage Regulator 22 Expansion Slots:

AGP2.0 SLOT * 1
HIP6301V CPU Power ( PWM )-VRM9.2 23
PCI2.2 SLOT * 3
IO Connectors 24
Realtek RTL8100(L) LAN 25
DDR Damping 26
DDR Termination 27
A A
DDR Termination Power 28

Title Rev
Jumper setting 29 M i c ro-Star MS-6507 0B
Document Number
Power Delivery Map 30 Cover Sheet
Last Revision Date:
Monday, July 23, 2001 Sheet 1 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
(478PINS)
(100MHz)
Power
Supply VRM Willamette/Northwood CK408 Clock
CONN 9.2 Socket (mPGA478-B) (100MHz)
(400MHz) Scalable Bus Scalable Bus/2
AGP 4 X (66MHz) AGP
AGP 4X
4X(1.5V) MCH: Memory
(1.5V)
AGP CONN
Controller HUB
( 5 93PINS/FCBGA) (133MHz)
DDR 1:2
( 66MHz X 4 ) HUB Interface
(14.318MHz)
C Heceta Hardware SM Bus C
Monitor ICH2: I/O PCI (33MHz)

PCI Slots 1:3
( 3 60PINS/EBGA)
Controller HUB
IDE CONN 1&2
(48MHz)
(33MHz)
(33MHz)
LPC Bus AC Link
USB Port 0:3 CNR Riser
(Shared slot)
AC '97 Audio
FWH: Firmware HUB AMP
Codec
PCI LAN / SIO
Realtek Line Out
Telephone In
RTL8100 MIC In
B Audio In B
Line In
PS2 Mouse & Parallel (1) Floppy Disk
DLED CD-ROM
Keyboard Serial (2) Drive CONN
A A
Title Rev
M i c ro-Star MS-6507 0B
Document Number
Block Diagram
Last Revision Date:
8 7 6 5 4 3 2 1
5 4 3 2 1
General Purpose I/O Spec.
D D
ICH2
GPIO Pin Type Function
GPIO 0 I Non Connect
GPIO 2~4 I Not Implemented
DEVICE ICH INT Pin IDSEL
GPIO 6 I AC97 Enabled/Disabled
FWH PCI Slot 1 INTA# AD16
GPIO Pin Type Function INTB#
GPIO 7 I None
INTC#
C
GPI 0 I ATA IDE 1 Detect C
GPIO 8 I LAN Wake Up INTD#

GPI 1 I ATA IDE 2 Detect
GPIO 9 I AC'97 Serial Data In
PCI Slot 2 INTB# AD17
GPI 2 I Reserved
GPIO 10 I Non Connect INTC#
GPI 3 I Reserved INTD#
INTA#
GPIO 12 I External SMI
GPIO 13 I LPC PME DLED-Super I/O PCI Slot 3 INTC# AD18
INTD#
GPIO 14~15 I Not Implemented GPIO Pin Type Function INTA#
INTB#
GPIO 16 O Non Connect GP32 I/OD DLED1
GPIO 17 O Non Connect GP24 I/OD DLED2 PCI Audio INTD#/INTE# AD23
INTA#
B GPIO 18 O Not Implemented GP34 I/OD DLED3 B
INTB#
GPIO 19 O Not Implemented GP33 I/OD DLED4 INTC#
GPIO 20 O Not Implemented
PCI Lan INTC#/INTF# AD22
GPIO 21 O Audio 6 channel control INTD#
INTA#
GPIO 22 O Non
INTB#
GPIO 23 OD BIOS Locked/Unlocked
GPIO 24 O Non
GPIO 25 O Non
GPIO 26 O Non
GPIO 27 I/O Non
A A
GPIO 28 I/O non

GPIO 29~31 I/O Not Implemented Title Rev
Document Number
GPIO Spec.
Last Revision Date:
5 4 3 2 1
8 7 6 5 4 3 2 1
*Trace less 0.5"

CLOCK GENERATOR BLOCK Shut Source Termination Resistors Pull-Down Capacitors
for good filtering from 10K~1M
CPUCLK R233 49.9
U18 CPUCLK# R234 49.9
FB18 X_600 39 41 R246 33 CPUCLK MCHCLK R229 49.9
VCC3 CPU_VDD CPU0 CPUCLK 5
40 R247 33 CPUCLK# MCHCLK# R230 49.9
+
CPU0# CPUCLK# 5
CB145 Rubycon CT34 CB144 CB154 ITP_CLK R232 X_49.9
0.1u 1u 0.1u 36 38 R239 33 MCHCLK ITP_CLK# R236 X_49.9
CPU_GND CPU1 MCHCLK 7
X_COPPER 37 R240 33 MCHCLK#
CPU1# MCHCLK# 7
D CP600 10u D
46
MREF_VDD 45 C_STP R243 X_33 ITP_CLK
CB151 3VMREF/CPU_STP# 44 P_STP R244 X_33 ITP_CLK# ITP_CLK 5 Trace less 0.2"
3VMREF#/PCI_STP# ITP_CLK# 5
0.1u 43
MREF_GND 49.9ohm for 50ohm M/B impedance CN16
32 31 1 2 MCH_66
3V66_VDD 3V66_0 MCH_66 7
30 RN17 3 4 ICH_66 X_10p
3V66_1 ICH_66 10
CB153 28 33 5 6 AGPCLK MCH_66 1 2
R228 0.1u 29 3V66_2 27 7 8 C157 10p AGPCLK 17 CLOCK STRAPPING RESISTORS ICH_66 3 4
for good filtering from 10K~1M X_0 3V66_GND 3V66_3 3V66_3 RN25 AGPCLK 5 6
6 FS2 7 8 7 8
FB20 X_600 VCC3V 9 FS2/PCI_F0 7 FS3 5 6 ICH_PCLK FS4 R324 10K VCC3V
VCC3 PCI_VDD FS3/PCI_F1 ICH_PCLK 9
8 MODE 3 4 FWH_PCLK FS3 R334 10K VCC3V CN18
+
MODE/PCI_F2 FWH_PCLK 15
CB166 Rubycon CT36 CB178 CB183 1 2 SIO_PCLK X_10p
SIO_PCLK 11
0.1u 1u 0.1u 5 10 FS4 FS1 R282 X_10K VCC3V SIO_PCLK 8 7
X_COPPER PCI_GND FS4/PCI0 11 BSEL0 R749 X_10K R283 10K FWH_PCLK 6 5
PCI1 5 BSEL0
CP601 10u 18 12 33 ICH_PCLK 4 3
PCI_VDD PCI2
100/133 select
14 7 8 PCICLK0 2 1
PCI3 PCICLK0 18
CB177 15 RN24 5 6 PCICLK1 FS0 R321 10K VCC3V
PCI4 PCICLK1 18
0.1u 13 16 33 3 4 PCICLK2 R322 X_10K CN17
PCI_GND PCI5 PCICLK2 18
17 1 2 PCICLK3 X_10p
*Put GND copper under Clock Gen. PCI6 PCICLK3 25 FS2 R326 X_10K PCICLK0 7 8
connect to every GND pin 24 R325 10K VCC3V PCICLK1 5 6
48_VDD FS0 R307 33 ICH_48 PCICLK2
* 40 mils Trace on Layer 4 22 3 4
FS0/48MHz ICH_48 10
CB164 23 FS1 R281 33 SIO_48 MODE R336 X_10K PCICLK3 1 2
with GND copper around it FS1/24_48MHz SIO_48 11
0.1u 21
48_GND
* put close to every power pin
C 2 C
REF_VDD 48 MUL0 R251 33 ICH_14 MUL0 R241 X_10K VCC3V ICH_48 C175 10p
* Trace Width 7mils. CB165 MUL0/REF0 MUL1 ICH_14 10 R231 10K SIO_48 C169 10p
1
0.1u 47 MUL1/REF1
* Same Group spacing 15mils REF_GND MUL1 R316 10K VCC3V
34 3 C171 18p R315 X_10K
* Different Group spacing 30mils CORE_VDD X1 32pF
CB152 X1 14M-32pf-HC49S-D
* Different mode spacing 7mils on itself 0.1u 33 4 C166 18p CRST# R305 10K VCC3V ICH_14 C164 10p
CORE_GND X2
SMBCLK 26 35 R227 475
10,11,12,16 SMBCLK SCLK IREF
R323 VTT_GD# SMBDATA 25 SMBCLK R255 4.7K
VCC3 10K 10,11,12,16 SMBDATA SDATA CRST# R306 0 CLK_RST# SMBDATA R254 4.7K VCC3 used only for EMI issue
20 CLK_RST# 19
R318 X_1KVTT_GD# 19 RST# 42 R245 4.7K VCC3V
Q36 VTT_GD# PWR_DN# VCC3V Trace less 0.2"
VCCP NPN-3904LT1-S-SOT23 CYP-CY28324 C_STP R242 X_1K VCC3V
R304 220 ICS950208 P_STP R235 X_1K
CY28323
R719 4.7K R718 220 Q705

+12V PRIMARY IDE BLOCK SECONDARY IDE BLOCK
R733
NPN-3904LT1-S-SOT23 ATA100 IDE CONNECTORS
C702 R190 4.7K IDE1 R186 4.7K IDE2
4.7u-0805 4.7K D2x20-1:21-BL-ZBT D2x20-1:21-WH-SBT
HD_RST# R188 33 1 2 HD_RST# R187 33 1 2
PDD7 3 4 PDD8 SDD7 3 4 SDD8
B 10 PDD[0..7] PDD[8..15] 10 10 SDD[0..7] SDD[8..15] 10 B
PDD4 9 10 PDD11 SDD4 9 10 SDD11
PDD3 11 12 PDD12 SDD3 11 12 SDD12
PDD2 13 14 PDD13 SDD2 13 14 SDD13
PDD1 15 16 PDD14 SDD1 15 16 SDD14
PDD0 17 18 PDD15 SDD0 17 18 SDD15
19 19
21 22 21 22
10 PD_DREQ 10 SD_DREQ
23 24 23 24
10 PD_IOW# 10 SD_IOW#
10 PD_IOR# 25 26 10 SD_IOR# 25 26
27 28 R129 470 27 28 R128 470
10 PD_IORDY 10 SD_IORDY
29 30 29 30
10 PD_DACK# 10 SD_DACK#
9 IRQ14 31 32 9 IRQ15 31 32
33 34 33 34
10 PD_A1 PD_DET 15 10 SD_A1 SD_DET 15
35 36 35 36
10 PD_A0 PD_A2 10 10 SD_A0 SD_A2 10
37 38 37 38
10 PD_CS#1 PD_CS#3 10 10 SD_CS#1 SD_CS#3 10
R189 33 39 40 R101 33 39 40
19 PD_LED 19 SD_LED
C79 R119 C76 C81 R120 C77

R191 8.2K 220p 10K X_4700p R103 8.2K 220p 10K X_4700p
VCC5 VCC5
VCC3 VCC3
R407 1K
VCC5_SB VCC5
14
A RESET BLOCK PCIRST# 9 8 HD_RST# A
7
U21D
VCC5_SB 7407-SOIC14
R388 330 Title Rev
VCC3
14
9 PCIRST# PCIRST# 1 2 PCIRST#1 7,11,15,25
VCC5_SB M i c ro-Star MS-6507 0B
7 R197 330 VCC3
U21A 14 Document Number
7407-SOIC14 C199 PCIRST# 3 4 PCIRST#2 17,18 Clock CY28323/4 & ATA100 IDE
7
X_10p U21B Last Revision Date:
7407-SOIC14 Monday, August 06, 2001 Sheet 4 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CPU SIGNAL BLOCK CPU GTL REFERNCE VOLTAGE BLOCK

VCCP
VCCPS+ 23
7 HA#[3..31] VCCPS- 23
ITP_CLK# 4 R81
ITP_CLK 4 2/3*Vccp 49.9
VID[0..4] 11,23 GTLREF1
HA#28
HA#18
HA#31
HA#30
HA#29
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#7
HA#6
HA#5
HA#4
HA#3
HA#8
VID2
VID0
VID4
VID3
VID1
C49 C48 C58 R79
220p 220p 1u 100
AD26
AC26
AE25
D D
AB1
AE1
AE2
AE3
AE4
AE5
W2
W1
M1
M4
M3
M6
T5
T4
T2
T1
U4
R6
U3
U1
R3
R2
N5
N4
N2
N1
Y1
V3
V2
P6
P4
P3
K1
K4
K2
A5
A4
L2
L3
L6
U7A
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
A10#
DBR#
A9#
A8#
A7#
A6#
A5#
A4#
A3#
VCC_SENSE
VID4#
VID3#
VID2#
VID1#
VID0#
VSS_SENSE
ITP_CLK1
ITP_CLK0
HDBI#0 E21
7 HDBI#[0..3] DBI0#
HDBI#1 G25 AA21 GTLREF1 VCCP
HDBI#2 DBI1# GTLREF3 GTLREF2
P26 AA6
HDBI#3 V21 DBI2# GTLREF2 F20
DBI3# GTLREF1 F6 R32
GTLREF0 2/3*Vccp X_49.9
AC3
V6 IERR# AB4 BPM#5 GTLREF2
B6 MCERR# BPM5# AA5 BPM#4
9 FERR# FERR# BPM4#
Y4 Y6 C36 C35 C13 R34
9 STPCLK# STPCLK# BPM3#
AA3 AC4 X_220p X_220pX_1u X_100
W5 BINIT# BPM2# AB5 BPM#1
9,15 HINIT# INIT# BPM1#
AB2 AC6 BPM#0
RSP# BPM0#
H5 H3 HREQ#4
7 HDBSY# DBSY# REQ4# HREQ#[0..4] 7
H2 J3 HREQ#3
7 HDRDY# DRDY# REQ3# HREQ#2 Every pin put one 220pF cap near it.
7 HTRDY# J6 J4
TRDY# REQ2# K5 HREQ#1
G1 REQ1# J1 HREQ#0 Trace Width 15mils, Space 15mils.
7 HADS# ADS# REQ0#
G4
7 HLOCK# LOCK# Keep the voltage dividers within 1.5 inches of the
G2 AD25
7 HBNR# BNR# TESTHI12
F3 A6 R77 4.7K
7 HIT# E3 HIT# TESTHI11 Y3 first GTLREF Pin
7 HITM# HITM# TESTHI10
D2 W4 R46 4.7K
7 HBPRI# BPRI# TESTHI9
C E2 U6 C
7 HDEFER# DEFER# TESTHI8 AB22
ITP_TDI TESTHI7
C1 AA20
Trace : 10 ITP_TDO D5 TDI TESTHI6 AC23 R82 4.7K CPU ITP BLOCK
ITP_TMS F7 TDO TESTHI5 AC24
mil width ITP_TRST# E6 TMS TESTHI4 AC20
ITP_TCK TRST# TESTHI3
10mil space D4 AC21
B3 TCK TESTHI2 AA2 R45 4.7K
11 CPU_TMPA THERMDA TESTHI1 VCCP
C4 AD24
11 VTIN_GND THERMDC TESTHI0
THERMTRIP# A2
15 THERMTRIP# THERMTRIP#
AF26 AF23
GND/SKTOCC# BCLK1# CPUCLK# 4
C3 AF22
10 PROCHOT# PROCHOT# BCLK0# CPUCLK 4
9 IGNNE# B2
B5 IGNNE# F4 HRS#2
9 HSMI# SMI# RS2# HRS#[0..2] 7
C6 G5 HRS#1
9 A20M# A20M# RS1#
AB26 F1 HRS#0
9 SLP# SLP# RS0#
A22 V5
R78 A7 RESERVED0 AP1# AC1
RESERVED1 AP0#
AD2 H6 HBR#0 7
X_0 RESERVED2 BR0#
AD3
AE21 RESERVED3 P1 R47 49.9
RESERVED4 COMP1 R80 49.9
AF24 L24 * Short trace
RESERVED5 COMP0
100/133 select
AF25
RESERVED6 L25
BSEL0 AD6 DP3# K26
4 BSEL0 BSEL0 DP2#
AD5 K25 ITP_TMS R17 39
BSEL1 DP1# VCCP
J26
CPU_GD AB23 DP0# ITP_TDO R10 75
B 10 CPU_GD PWRGOOD B
R5 HADSTB#1 7
CPURST# AB25 ADSTB1# L5
7 CPURST# RESET# ADSTB0# HADSTB#0 7
W23
DSTBP3# HDSTBP#3 7
HD#63 AA24 P23 ITP_TCK R15 27
7 HD#[0..63] D63# DSTBP2# HDSTBP#2 7
HD#62 AA22 Differential J23
D62# DSTBP1# HDSTBP#1 7
HD#61 AA25 F21
HD#60 Y21 D61# Host Data DSTBP0# W22 HDSTBP#0 7
D60# Strobes DSTBN3# HDSTBN#3 7
HD#59 Y24 R22
D59# DSTBN2# HDSTBN#2 7
HD#58 Y23 K22
HD#57 W25 E22
HD#56 Y26
HD#55 W26 D56# E5
D55# LINT1/NMI NMI 9
HD#54 V24 D1
D54# LINT0/INTR INTR 9
U21 D53#
V25 D52#
U23 D51#
U24 D50#
U26 D49#
T23 D48#
T22 D47#
T25 D46#
T26 D45#
R24 D44#
R25 D43#
P24 D42#
R21 D41#
N25 D40#
N26 D39#
M26 D38#
N23 D37#
M24 D36#
P21 D35#
N22 D34#
M23 D33#
H25 D32#
K23 D31#
J24 D30#
L22 D29#
M21 D28#
H24 D27#
G26 D26#
L21 D25#
D26 D24#
F26 D23#
E25 D22#
F24 D21#
F23 D20#
G23 D19#
E24 D18#
H22 D17#
D25 D16#
J21 D15#
D23 D14#
C26 D13#
H21 D12#
G22 D11#
B25 D10#
C24 D9#
C23 D8#
B24 D7#
D22 D6#
C21 D5#
A25 D4#
A23 D3#
B22 D2#
B21 D1#
D0#
V22
PGA-S478-F02
HD#53
HD#52
HD#51
HD#50
HD#49
HD#48
HD#46
HD#45
HD#44
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
HD#36
HD#35
HD#34
HD#33
HD#32
HD#31
HD#30
HD#29
HD#28
HD#26
HD#25
HD#24
HD#23
HD#22
HD#21
HD#20
HD#19
HD#18
HD#16
HD#15
HD#14
HD#13
HD#12
HD#11
HD#10
HD#47
HD#37
HD#27
HD#17
HD#9
HD#8
HD#7
HD#6
HD#5
HD#4
HD#3
HD#2
HD#1
HD#0
A A
CPU STRAPPING RESISTORS ALL COMPONENTS CLOSE TO CPU

Title Rev
BPM#0 R41 49.9
BPM#1 R42 49.9
VCCP
ITP_TDI R26 150 VCCP PROCHOT# R27 62 VCCP
BPM#4 R44 49.9 CPU_GD R76 300
BPM#5 R43 49.9 HBR#0 R64 49.9 Document Number
ITP_TRST# R16 680 CPURST# R83 49.9 INTEL mPGA478-B CPU1
THERMTRIP# R66 X_62
Last Revision Date:
Thursday, August 09, 2001 Sheet 5 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CPU VOLTAGE BLOCK VCC_VID 15,23

L2 4.7u-10% VCCP
L1 4.7u-10%
VCCP
AC10
AC12
AC14
AC16
AC18
AD11
AD13
AD15
AD17
AD19
AD20
AA10
AA12
AA14
AA16
AA18
AB11
AB13
AB15
AB17
AB19
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AF11
AF13
AF15
AF17
AF19
AF21
AF2
AF5
AF7
AF9
AF4
AF3
AC8
AD7
AD9
AA8
AB7
AB9
AE6
AE8
C10
C12
C14
C16
C18
C20
D11
D13
D15
D17
D19
A10
A12
A14
A16
A18
A20
B11
B13
B15
B17
B19
E10
E12
E14
E16
E18
E20
F11
F13
F15
F17
F19
F9
C8
D7
D9
A8
B7
B9
E8
U7B C57 C53 C56 C52
10u-1206 10u-1206 22u-1206 22u-1206
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC-VIDPRG
VCCA
VCC-IOPLL
VCC-VID
AD22
VSSA
D D10 D
A11 VSS
A13 VSS Y5
A15 VSS VSS Y25
VSS VSS
A17 Y22
A19 VSS VSS Y2
A21 VSS VSS W6
VSS VSS
A24 W3
A26 VSS VSS W24
A3 VSS VSS W21
VSS VSS
A9 V4
AA1 VSS VSS V26
AA11 VSS VSS V23
AA13 VSS VSS V1
VSS VSS
AA15 U5
AA17 VSS VSS U25
AA19 VSS VSS U22
VSS VSS
AA23 U2
AA26 VSS VSS T6
AA4 VSS VSS T3
VSS VSS
AA7 T24
AA9 VSS VSS T21
AB10 VSS VSS R4
AB12 VSS VSS R26
VSS VSS
AB14 R23
AB16 VSS VSS R1
AB18 VSS VSS P5
VSS VSS
AB20 P25
AB21 VSS VSS P22
C C
AB24 VSS VSS P2
VSS VSS
AB3 N6
AB6 VSS VSS N3
AB8 VSS VSS N24
AC11 VSS VSS N21
VSS VSS
AC13 M5
AC15 VSS VSS M25
AC17 VSS VSS M22
VSS VSS
AC19 M2
AC2 VSS VSS L4
AC22 VSS VSS L26
VSS VSS
AC25 L23
AC5 VSS VSS L1
AC7 VSS VSS K6
AC9 VSS VSS K3
VSS VSS
AD1 K24
VSS VSS
AD12VSS
AD14VSS
AD16VSS
AD18VSS
AD21VSS
AD23VSS
AD4 VSS
AD8 VSS
AE11VSS
AE13VSS
AE15VSS
AE17VSS
AE19VSS
AE22VSS
AE24VSS
AE26VSS
AE7 VSS
AE9 VSS
AF1 VSS
AF10VSS
AF12VSS
AF14VSS
AF16VSS
AF18VSS
AF20VSS
AF6 VSS
AF8 VSS
B10 VSS
B12 VSS
B14 VSS
B16 VSS
B18 VSS
B20 VSS
B23 VSS
B26 VSS
B4 VSS
B8 VSS
C11 VSS
C13 VSS
C15 VSS
C17 VSS
C19 VSS
C2 VSS
C22 VSS
C25 VSS
C5 VSS
C7 VSS
C9 VSS
D12 VSS
D14 VSS
D16 VSS
D18 VSS
D20 VSS
D21 VSS
D24 VSS
D3 VSS
D6 VSS
D8 VSS
E1 VSS
E11 VSS
E13 VSS
E15 VSS
E17 VSS
E19 VSS
E23 VSS
E26 VSS
E4 VSS
E7 VSS
E9 VSS
F10 VSS
F12 VSS
F14 VSS
F16 VSS
F18 VSS
F2 VSS
F22 VSS
F25 VSS
F5 VSS
F8 VSS
G21 VSS
G24 VSS
G3 VSS
G6 VSS
H1 VSS
H23 VSS
H26 VSS
H4 VSS
J2 VSS
J22 VSS
J25 VSS
J5 VSS
K21 VSS
VSS
AD10
PGA-S478-F02
B B
CPU DECOUPLING CAPACITORS CPU DECOUPLING CAPACITORS
VCCP VCCP VCCP
VCCP CB38 CB49 CB21

10u-1206 10u-1206 10u-1206
CB32 CB55 CB34 CB20 VCCP
10u-1206 10u-1206 10u-1206 10u-1206
CB29 CB61 CB27 CB17 + CT9
10u-1206 10u-1206 10u-1206 10u-1206 150u
CB47 CB41 CB54 CB51 + CT11
10u-1206 10u-1206 10u-1206 10u-1206 150u
CB14 CB50 CB42 + CT10
10u-1206 10u-1206 10u-1206 150u
CB35 CB52 CB48
10u-1206 10u-1206 10u-1206
CB39 CB58 CB45
10u-1206 10u-1206 10u-1206
CB44 CB22 CB25
10u-1206 10u-1206 10u-1206
A PLACE CAPS WITHIN CPU CAVITY SOLDER A
Title Rev
PLACE CAPS WITHIN CPU CAVITY M i c ro-Star MS-6507 0B

Document Number
INTEL mPGA478-B CPU2
Last Revision Date:
Monday, September 03, 2001 Sheet 6 of 36
8 7 6 5 4 3 2 1
5 4 3 2 1
U12A U12C
HA#3 T4 AA2 HD#0 R22 A3 MCH REFERENCE BLOCK
5 HA#[3..31] HA#4
HA#5
T5
T3
HA3#
HA4# HOST HD0#
HD1#
AB5
AA5
HD#1
HD#2
HD#[0..63] 5 VCC_AGP R29
U22
VCC1_5
VCC1_5 POWER GND
GND
A7
A11
HA#6 U3 HA5# HD2# AB3 HD#3 U26 VCC1_5 GND A15 VTT1 L5 4.7u_1206
HA6# HD3# VCC1_5 GND VCC_AGP
HA#7 R3 AB4 HD#4 W22 A19
HA#8 P7 HA7# HD4# AC5 HD#5 W29 VCC1_5 GND A23 CB107 C99 C102
HA#9 HA8# HD5# HD#6 VCC1_5 GND VTT_GND1 0.1u 22u-1206 10u-1206
R2 AA3 AA22 A27
HA#10 P4 HA9# HD6# AA6 HD#7 AA26 VCC1_5 GND D5
HA#11 R6 HA10# HD7# AE3 HD#8 AB21 VCC1_5 GND D9
HA#12 HA11# HD8# HD#9 VCC1_5 GND VTT2 L4 4.7u_1206
P5 AB7 AC29 D13 VCC_AGP
HA#13 P3 HA12# HD9# AD7 HD#10 AD21 VCC1_5 GND D17
HA#14 N2 HA13# HD10# AC7 HD#11 AD23 VCC1_5 GND D21 CB108 C101 C98
HA#15 HA14# HD11# HD#12 VCC1_5 GND VTT_GND2 0.1u 10u-1206 22u-1206
D N7 AC6 AE26 E1 D
HA#16 N3 HA15# HD12# AC3 HD#13 AF23 VCC1_5 GND E4
HA#17 K4 HA16# HD13# AC8 HD#14 AG29 VCC1_5 GND E26
HA#18 M4 HA17# HD14# AE2 HD#15 AJ25 VCC1_5 GND E29 VCCP
HA#19 HA18# HD15# HD#16 VCC1_5 GND
M3 AG5 N14 F8
HA#20 L3 HA19# HD16# AG2 HD#17 N16 VCC1_5 GND F12
HA#21 L5 HA20# HD17# AE8 HD#18 P13 VCC1_5 GND F16
HA#22 HA21# HD18# HD#19 VCC1_5 GND R130
K3 AF6 P15 F20
HA#23 J2 HA22# HD19# AH2 HD#20 P17 VCC1_5 GND F24 301
HA#24 M5 HA23# HD20# AF3 HD#21 R14 VCC1_5 GND G26
HA#25 HA24# HD21# HD#22 VCC1_5 GND HSWNG
J3 AG3 R16 H9
HA#26 L2 HA25# HD22# AE5 HD#23 T15 VCC1_5 GND H11
HA#27 H4 HA26# HD23# AH7 HD#24 U14 VCC1_5 GND H13 C68 C90 C87 R122
HA#28 N5 HA27# HD24# AH3 HD#25 U16 VCC1_5 GND H15 0.1u 0.01u 0.01u 150
HA#29 HA28# HD25# HD#26 VTT1 VCC1_5 GND
G2 AF4 T13 H17
HA#30 M6 HA29# HD26# AG8 HD#27 VTT2 T17 VCC1_5 GND H19
HA#31 L7 HA30# HD27# AG7 HD#28 VCC1_5 GND H21
HA31# HD28# HD#29 GND
AG6 V_DIMM A5 J1
V7 HD29# AF8 HD#30 A9 VCCSM GND J4
5 HBR#0 W3 BR0# HD30# AH5 HD#31 A13 VCCSM GND J6 Place 1 Cap. as Close as possible to
5 HBNR# BNR# HD31# VCCSM GND
5 HBPRI# Y7 AC11 HD#32 A17 J22 every pin of MCH
W5 BPRI# HD32# AC12 HD#33 A21 VCCSM GND J26
5 HLOCK# HLOCK# HD33# AE9 HD#34 A25 VCCSM GND J29 Trace width use 15 mils and 15mils space
V3 HD34# AC9 HD#35 C1 VCCSM GND K5
5 HADS# ADS# HD35# VCCSM GND
HREQ#0 U6 AE10 HD#36 C29 K7 VCCP
5 HREQ#[0..4] HREQ0# HD36# VCCSM GND
HREQ#1 T7 AD9 HD#37 D7 K27
HREQ#2 R7 HREQ1# HD37# AG9 HD#38 D11 VCCSM GND L1
HREQ#3 HREQ2# HD38# HD#39 VCCSM GND
U5 AC10 D15 L4
HREQ#4 U2 HREQ3# HD39# AE12 HD#40 D19 VCCSM GND L6
C C
HREQ4# HD40# AF10 HD#41 D23 VCCSM GND L8 R100
HD41# HD#42 VCCSM GND 49.9
5 HIT# Y5 AG11 D25 L22
Y3 HIT# HD42# AG10 HD#43 F6 VCCSM GND L24 HVREF
5 HITM# HITM# HD43# VCCSM GND
Y4 AH11 HD#44 F10 L26
5 HDEFER# DEFER# HD44# VCCSM GND
AG12 HD#45 F14 M23 C93 C70 C69 C88 C71 R99 C72
HD45# HD#46 VCCSM GND 0.01u 0.01u 0.01u 0.01u 0.01u 0.1u
U7 AE13 F18 N1
5 HTRDY# HTRDY# HD46# VCCSM GND
HRS#0 W2 AF12 HD#47 F22 N4 100
5 HRS#[0..2] RS0# HD47# VCCSM GND
HRS#1 W7 AG13 HD#48 G1 N8
HRS#2 RS1# HD48# HD#49 VCCSM GND
W6 AH13 G4 N13
RS2# HD49# AC14 HD#50 G29 VCCSM GND N15
V5 HD50# AF14 HD#51 H8 VCCSM GND N17 Place 1 Cap. as Close as possible to
5 HDBSY# DBSY# HD51# VCCSM GND
5 HDRDY# V4 AG14 HD#52 H10 N22 every pin of MCH
DRDY# HD52# AE14 HD#53 H12 VCCSM GND N29
HD53# AG15 HD#54 H14 VCCSM GND P6 Trace width use 15 mils and 15mils space
R5 HD54# AG16 HD#55 H16 VCCSM GND P8
5 HADSTB#0 HAD_STB0# HD55# VCCSM GND
N6 AG17 HD#56 H18 P14 VCC1_8
5 HADSTB#1 HAD_STB1# HD56# VCCSM GND
AH15 HD#57 H20 P16
AD4 HD57# AC17 HD#58 H22 VCCSM GND R1
5 HDSTBN#0 HD_STBN0# HD58# VCCSM GND
AD3 AF16 HD#59 H24 R4 R178
5 HDSTBP#0 HD_STBP0# HD59# VCCSM GND
AE6 AE15 HD#60 J5 R13 150
AE7 AH17 HD#61 J7 R15
AE11 AD17 HD#62 K6 R17 HUB_MREF
AD11 AE16 HD#63 K22 R26
AC15 K24 T6 C106 C107 C108 R176
5 HDSTBN#3 HD_STBN3# VCCSM GND
AC16 P22 K26 T8 0.01u 0.1u 0.1u 150
5 HDSTBP#3 HD_STBP3# 66IN MCH_66 4 VCCSM GND
J27 L23 T14
RSTIN# PCIRST#1 4,11,15,25 VCCSM GND
HDBI#0 AD5 AE17 T16
5 HDBI#[0..3] DBI0# CPURST# CPURST# 5 GND
HDBI#1 AG4 VTT_GND1 U13 T22
B
HDBI#2 DBI1# HVREF VTT_GND2 GND GND Place 0.01uF Cap. as Close as possible to MCH B
AH9 M7 U17 U1
HDBI#3 AD15 DBI2# H_VREF0 R8 AD12 GND GND U4
DBI3# H_VREF1 Y8 AD14 GND GND U15 Trace width use 15 mils and 15mils space
H_VREF2 GND GND
4 MCHCLK J8 AB11 AD16 U29
K8 BCLK H_VREF3 AB17 AD19 GND GND V6
4 MCHCLK# BCLK# H_VREF4 GND GND
AD22 V8
R98 24.9 AC2 AA7 HSWNG AE1 GND GND V22
R118 H_RCOMP0 H_SWNG0 GND GND
AC13 AD13 AE4 W1
24.9 H_RCOMP1 H_SWNG1 AE18 GND GND W4 MCH Trace Decoupling Capacitors
HL[0..10] HL0 P25 L28 HL6 HL[0..10] AE20 GND GND W8
9 HL[0..10] HL1
HL2
P24
N27
HI0
HI1 HUB LINK HI6
HI7
L27
M27
HL7
HL8
AE29
AF5
GND
GND
GND
GND
W26
Y6
HL3 P23 HI2 HI8 N28 HL9 AF7 GND GND Y22 VCCP VCCP VCC1_8
HL4 HI3 HI9 HL10 GND GND
M26 M24 AF9 AA1
HL5 M25 HI4 HI10 AF11 GND GND AA4 CB24 CB3 CB148
HI5 P26 HUB_MREF AF13 GND GND AA8 X_0.1u X_0.1u 0.1u
N25 HI_REF AF15 GND GND AA29 CB12 CB73 CB85
9 HL_STB HI_STB GND GND
N24 P27 R172 40.2 AF17 AB6 X_0.1u X_0.1u 0.1u
9 HL_STB# HI_STB# HL_RCOMP VCC1_8 GND GND
AF19 AB9 CB46 CB60
M8 L25 AF21 GND GND AB10 X_0.1u X_0.1u
VCCP U8
AA9
VTT
VTT POWER VCC1_8
VCC1_8
L29
M22
VCC1_8
AF25
AG1
GND
GND
GND
GND
AB12
AB13
CB69
X_0.1u
AB8 VTT VCC1_8 N23 AG18 GND GND AB14 MCH & ICH2
VTT VCC1_8 GND GND ADDRESS
AB18 N26 AG20 AB15
AB20 VTT VCC1_8 G9 AG22 GND GND AB16
AC19 VTT RSVD G10 AH19 GND GND AB19 DATA
AD18 VTT RSVD H6 AH21 GND GND AB22
VTT RSVD GND GND
AD20 J25 AH23 AC1
A AE19 VTT RSVD J23 AJ3 GND GND AC4 A
AE21 VTT RSVD G16 AJ5 GND GND AC18

VTT RSVD GND GND
AF18 G17 AJ7 AC20
AF20 VTT RSVD H7 AJ9 GND GND AC21
AG19 VTT RSVD H27 AJ11 GND GND AC23 Title Rev
VTT RSVD7 GND GND
AG21 K23 AJ13 AC26
AG23 VTT
VTT
RSVD8
RSVD9
K25 AJ15 GND
GND
GND
GND
AD6 M i c ro-Star MS-6507 0B
AJ19 AJ17 AD8
AJ21 VTT AD26 AJ27 GND GND AD10 Document Number
VTT NC0 GND GND
AJ23 AD27 Brookdale MCH1
VTT NC1
INT-82845 INT-82845 Last Revision Date:
Wednesday, August 29, 2001 Sheet 7 of 36
5 4 3 2 1
5 4 3 2 1
1" trace
U12B
close MCH
MD0 G28 E12 DDRMAA0
26 MD[0..63] MD1 F27 SDQ0
DDR SMA0 F17 DDRMAA1 DDRMAA[0..12] 16,26,27 5/23 update DDR_VTT
MD2 C28 SDQ1 SMA1 E16 DDRMAA2 MCH REFERENCE VOLTAGE
MD3 E28 SDQ2 SMA2 G18 DDRMAA3
MD4 H25 SDQ3 SMA3 G19 DDRMAA4
MD5 SDQ4 SMA4 DDRMAA5
G27 E18
MD6 F25 SDQ5 SMA5 F19 DDRMAA6 R500
MD7 B28 SDQ6 SMA6 G21 DDRMAA7
MD8 SDQ7 SMA7 DDRMAA8 30 DIMMREF
E27 G20
MD9 C27 SDQ8 SMA8 F21 DDRMAA9
MD10 B25 SDQ9 SMA9 F13 DDRMAA10 MRCOMP
MD11 SDQ10 SMA10 DDRMAA11
D C25 E20 D
MD12 B27 SDQ11 SMA11 G22 DDRMAA12 SM_REF
MD13 D27 SDQ12 SMA12 C500
MD14 D26 SDQ13 E9 DDRCS#0 C95 C97
MD15 SDQ14 SCS#0 DDRCS#1 0.1u 0.1u 0.1u
E25 F7
MD16 D24 SDQ15 SCS#1 F9 DDRCS#2
MD17 E23 SDQ16 SCS#2 E7 DDRCS#3
MD18 SDQ17 SCS#3
C22
MD19 E21 SDQ18 C16 CB0 DDRCS#[0..3]
SDQ19 SCB0 DDRCS#[0..3] 16,26,27
MD20 C24 D16 CB1
MD21 SDQ20 SCB1 CB2
B23 B15
MD22 D22 SDQ21 SCB2 C14 CB3
MD23 B21 SDQ22 SCB3 B17 CB4
MD24 C21 SDQ23 SCB4 C17 CB5
MD25 D20 SDQ24 SCB5 C15 CB6 MCH MEMORY CLOCK RC CIRCUITS
MD26 C19 SDQ25 SCB6 D14 CB7
MD27 D18 SDQ26 SCB7 CB[0..7] RN538
SDQ27 CB[0..7] 26
MD28 C20 F26 SDQS0 DCLK#1 7 8 DCLK#1
SDQ28 SDQS0 SDQS0 26 DCLK#1 16,26
MD29 E19 C26 SDQS1 DCLK1 5 6 DCLK1
SDQ29 SDQS1 SDQS1 26 DCLK1 16,26
MD30 C18 C23 SDQS2 DCLK#4 3 4 DCLK#4
SDQ30 SDQS2 SDQS2 26 DCLK#4 16,26
MD31 E17 B19 SDQS3 DCLK4 1 2 DCLK4
MD32 E13 D12 SDQS4
SDQ32 SDQS4 SDQS4 26
MD33 C12 C8 SDQS5 X_0
MD34 B11 C5 SDQS6
MD35 C10 E3 SDQS7 RN539
MD36 B13 E15 SDQS8 DCLK3 1 2 DCLK3
MD37 C13 DCLK#3 3 4 DCLK#3
SDQ37 DCLK#3 16,26
MD38 C11 E14 DCLK0 DCLK0 5 6 DCLK0
SDQ38 SCK0 DCLK0 16,26
C MD39 D10 F15 DCLK#0 DCLK#0 7 8 DCLK#0 C
SDQ39 SCK#0 DCLK#0 16,26
MD40 E10 J24 DCLK1
MD41 SDQ40 SCK1 DCLK#1 X_0
C9 G25
MD42 D8 SDQ41 SCK#1 G6 DCLK2
MD43 E8 SDQ42 SCK2 G7 DCLK#2 RN540
MD44 E11 SDQ43 SCK#2 G15 DCLK3 DCLK2 1 2 DCLK2
SDQ44 SCK3 DCLK2 16,26
MD45 B9 G14 DCLK#3 DCLK#2 3 4 DCLK#2
SDQ45 SCK#3 DCLK#2 16,26
MD46 B7 E24 DCLK4 DCLK#5 5 6 DCLK#5
SDQ46 SCK4 DCLK#5 16,26
MD47 C7 G24 DCLK#4 DCLK5 7 8 DCLK5
SDQ47 SCK#4 DCLK5 16,26
MD48 C6 H5 DCLK5
MD49 D6 SDQ48 SCK5 F5 DCLK#5 X_0
MD50 D4 SDQ49 SCK#5
MD51 SDQ50 DDRCKE0
B3 G23 DDRCKE0 16,27
MD52 E6 SDQ51 SCKE0 E22 DDRCKE1
SDQ52 SCKE1 DDRCKE1 16,27
MD53 B5 H23 DDRCKE2
MD54 C4 F23 DDRCKE3
MD55 E5
MD56 C3 SDQ55 F11 RASA# MCH DECOUPLING CAPACITOR
SDQ56 SRAS# RASA# 26
MD57 D3 G8 CASA#
SDQ57 SCAS# CASA# 26
MD58 F4 G11 WEA#
SDQ58 SWE# WEA# 26
MD59 F3
MD60 B2 SDQ59 G12 DDRBS0
SDQ60 SBS0 DDRBS0 16,26,27
MD61 C2 G13 DDRBS1
SDQ61 SBS1 DDRBS1 16,26,27
MD62 E2
MD63 G5 SDQ62 J28 MRCOMP VCCP VCC1_8 VCC_AGP V_DIMM
SDQ63 SM_RCOMP
G3 J9 SM_REF CB93 CB117 CB114 CB89
H3 RCVENIN# SD_REF0 J21 1u 1u 0.1u 0.1u
1" Trace RCVENOUT# SD_REF1 CB98 CB116 CB115 CB76
B B
GAD0 R27 Y24 0.1u 0.1u 0.1u 0.1u
17 GAD[0..31]
GAD1
GAD2
R28
T25
G_AD0
G_AD1 AGP G_FRAME#
G_IRDY#
W27
W24
GFRAME#
GIRDY#
17
17 CB94
0.1u
CB126
0.1u
CB101
0.1u
G_AD2 G_TRDY# GTRDY# 17
GAD3 R25 W28 CB97 CB118 CB86
G_AD3 G_DEVSEL# GDEVSEL# 17
GAD4 T26 W23 0.1u 0.1u 0.1u
G_AD4 G_STOP# GSTOP# 17
GAD5 T27 W25 CB100 CB106 CB78
G_AD5 G_PAR GPAR 17
GAD6 U27 0.01u 0.1u 0.1u
GAD7 G_AD6 CB96 CB84
U28 Tri-Stated AG24 GREQ# 17
GAD8 V26 G_AD7 G_REQ# AH25 10u-1206 0.1u
G_AD8 during G_GNT# GGNT# 17
GAD9 V27 CB90 CB81
GAD10 T23 G_AD9 RSTIN# AH28 SBA0 10u-1206 0.1u
G_AD10 SBA0 SBA[0..7] 17
GAD11 U23 assertion AH27 SBA1
GAD12 T24 G_AD11 SBA1 AG28 SBA2
GAD13 G_AD12 SBA2 SBA3
U24 AG27 EMI
GAD14 U25 G_AD13 SBA3 AE28 SBA4 VCC5 V_DIMM VCC5
GAD15 V24 G_AD14 SBA4 AE27 SBA5
GAD16 Y27 G_AD15 SBA5 AE24 SBA6 C211 0.1u C21 C105 0.1u AGPREF
GAD17 G_AD16 SBA6 SBA7 C208 0.1u C104 1u
Y26 AE25
GAD18 AA28 G_AD17 SBA7 C8 0.1u
GAD19 AB25 G_AD18 AF27 0.1u
G_AD19 SB_STB SB_STB 17
GAD20 AB27 AF26
G_AD20 SB_STB# SB_STB# 17
GAD21 AA27 BACK
GAD22 AB26 G_AD21 AG25 ST0
G_AD22 ST0 ST[0..2] 17
GAD23 Y23 AF24 ST1 VCCP V_DIMM
GAD24 AB23 G_AD23 ST1 AG26 ST2
GAD25 AA24 G_AD24 ST2 CB219 CB225
GAD26 AA25 G_AD25 R24 X_0.1u X_0.1u
G_AD26 AD_STB0 GAD_STB0 17
GAD27 AB24 R23 CB221
A G_AD27 AD_STB0# GAD_STB#0 17 A
GAD28 AC25 AC27 VCC_AGP X_0.1u
G_AD28 AD_STB1 GAD_STB1 17
GAD29 AC24 AC28
G_AD29 AD_STB1# GAD_STB#1 17
GAD30 AC22 CB222
GAD31 AD24 G_AD30 AF22 X_0.1u
G_AD31 PIPE# PIPE# 17
AE22 CB220 Title Rev
RBF# RBF# 17
GC_BE#0 V25 AE23 X_0.1u
17 GC_BE#[0..3]
GC_BE#1 V23 G_C/BE0#
G_C/BE1#
WBF# CB224 X_0.1u
WBF# 17
CB227 M i c ro-Star MS-6507 0B
GC_BE#2 Y25 AA21 X_0.1u
G_C/BE2# AGPREF AGPREF 17
GC_BE#3 AA23 AD25 R165 40.2 CB223 Document Number
G_C/BE3# G_RCOMP R168 X_4.7K X_0.1u
H26 Brookdale MCH 2
TESTIN# VCC1_8 CB226
INT-82845 X_0.1u Last Revision Date:
5 4 3 2 1
ICH2 PCI / HUB LINK / CPU / LAN / INTERRUPT SIGNALS
ICH2 SMI# SIGNAL
VCC1_8 VCC3 VCC1_8SB
G18
D10
H18
R18
K19
E14
E15
E16
E17
E18
P18
V14
V15
V16
A22
B21
B22
F18
L19
J18
T5
D2
R5
U5
H5
D3
C1
D1
E5
P5
V9
V5
V6
V7
V8
E1
E2
E3
E4
J5
J2
U17A
AD0 AA4 D11 A20M#
NC5
NC6
NC8
NC9
NC10
NC11
NC17
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCCSUS1_8
VCCSUS1_8
VCCSUS1_8
VCCSUS1_8
VCCSUS1_8
GND68
GND69
GND70
GND71
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
18,25 AD[0..31] AD0 A20M# A20M# 5
AD1 AB4 A12
AD1 CPUSLP# SLP# 5
AD2 Y4 R22 FERR#
AD2 FERR# FERR# 5
AD3 W5 A11 SMI# R218 33
AD3 IGNNE# IGNNE# 5 HSMI# 5
AD4 W4 C12 C143 100p
AD4 INIT# HINIT# 5,15
AD5 Y5 C11
AD5 INTR INTR 5
AD6 AB3 B11
AD6 NMI NMI 5
AD7 AA5 B12 SMI#
AD8 AB5 AD7 SMI# C10
AD8 STPCLK# STPCLK# 5
AD9 Y3 B13 KB_RST#
AD9 RCIN# KB_RST# 11
AD10 W6 C13 A20GATE#
AD10 A20GATE A20GATE# 11
AD11 W3
AD12 Y6 AD11 A4 HL0
AD12 HL0 HL[0..10] 7
AD13 Y2 B5 HL1
AD14 AD13 HL1 HL2
AA6 A5
AD15 Y1 AD14 HL2 B6 HL3
AD16 V2 AD15 HL3 B7 HL4
AD17 AD16 HL4 HL5
AA8 A8
AD18 V1 AD17 HL5 B8 HL6
AD19 AB8 AD18 HL6 A9 HL7
AD20 AD19 HL7 HL8
U4 C8 This resistor less than 0.5"
AD21 W9 AD20 HL8 C6 HL9
AD22 U3 AD21 HL9 C7 HL10
AD23 Y9 AD22 HL10 C5 from ICH use 15 mils trace
AD24 AD23 HL11
U2 A6
AD24 HL_STB HL_STB 7
AD25 AB9 A7
AD26 U1 AD25 HL_STB# A3 R221 40.2 HL_STB#
VCC1_8
7 ICH2 STRAPPING RESISTORS
AD27 AD26 HLCOMP
W10
AD28 T4 AD27 B4 HUB_IREF
AD29 Y10 AD28 HUBREF
AD30 AD29 FERR# R279 62
T3 P1 INTA# 17,18
AD30 PIRQA# VCCP
AD31 AA10 P2
AD31 PIRQB# INTB# 17,18
P3
PIRQC# INTC# 18
C_BE#0 AA3 N4
18,25 C_BE#[0..3] CBE#0 PIRQD# INTD# 18
C_BE#1 AB6 SERIRQ R256 8.2K
CBE#1 VCC3
C_BE#2 Y8 F21
CBE#2 IRQ14 IRQ14 4
C_BE#3 AA9 C16
CBE#3 IRQ15 IRQ15 4
N20 APIC_CLK KB_RST# R219 10K
APICCLK VCC3
AB7 P22 APIC_D0 A20GATE# R220 10K
18,25 DEVSEL# DEVSEL# APICD0
V3 N19 APIC_D1
18,25 FRAME# FRAME# APICD1
W8 N21 SERIRQ REQA# R284 2.7K
18,25 IRDY# IRDY# SERIRQ SERIRQ 11,18 VCC5
V4 GNTA# R272 X_2.7K
18,25 TRDY# TRDY# VCC3
W1 R2 PREQ#0
18,25 STOP# STOP# REQ0# PREQ#[0..5] 18,25
W2 R3 PREQ#1
18,25 PAR PAR REQ1# PREQ#2
5/23 update
AA7 T1
18 PLOCK# PLOCK# REQ2#
W7 AB10 PREQ#3
18,25 SERR# SERR# REQ3#
Y7 P4 PREQ#4 APIC_D0 R578 10K
18,25 PERR# PERR# REQ4#
Y15 L3 PREQ#5 APIC_D1 R579 10K
17,18,25 PME# PME# GPIO1/REQB#/REQ5# APIC_CLK R637 10K
REQA# M3 M2 PGNT#0
GPIO0/REQA# GNT0# PGNT#[0..5] 18,25
GNTA# L2 M1 PGNT#1
GPIO16/GNTA# GNT1# R4 PGNT#2
W11 GNT2# T2 PGNT#3
4 ICH_PCLK PCICLK GNT3# R1 PGNT#4
GNT4# PGNT#5
AA15 L4
4 PCIRST# PCIRST# GPIO17/GNTB#/GNT5#
F4 G3
NC12 LAN_CLK ELAN_CLK 12
G4 H2
NC13 LAN_RSTSYNC ELAN_SYNC 12
H3 G2
NC14 LAN_RXD0 ELAN_RXD0 12
H4 G1
NC15 LAN_RXD1 ELAN_RXD1 12
J1 H1 ELAN_RXD2 12
NC16 LAN_RXD2 F3
12 E_EECS K4 LAN_TXD0 F2 ELAN_TXD0
ELAN_TXD1
12
12
ICH2 REFERENCE VOLTAGE
K3 EE_CS LAN_TXD1 F1
C4 GND10
C9 GND11
D5 GND12
D6 GND13
D7 GND14
D8 GND15
D9 GND16
E6 GND17
E7 GND18
E8 GND19
E9 GND20
J9 GND21
J10 GND22
J11 GND23
J12 GND24
J13 GND25
J14 GND26
K9 GND27
K10 GND28
K11 GND29
K12 GND30
K13 GND31
K14 GND32
K1 GND33
AA1 GND58
AA2 GND59
AA21GND60
AA22GND61
AB1 GND62
AB2 GND63
AB21GND64
GND65
12 CNR_EEDIN EE_DIN LAN_TXD2 ELAN_TXD2 12
A2 GND1
A10 GND2
B1 GND3
B2 GND4
B3 GND5
B9 GND6
B10 GND7
C2 GND8
C3 GND9
J4 A21
12 CNR_EEDOUT EE_DOUT GND67
J3 AB22
12 CNR_SHCLK EE_SHCLK GND66 VCC1_8
82801BA-VB11
A1
R223
150
HUB_IREF
C142 C141 C140 R222

0.01u 0.1u 0.1u 150
ICH2 DECOUPLING CAPACITORS

Place Cap. as Close as possible to ICH2
VCC3 VCC1_8 VCC1_8SB Trace width use 15 mils and 15mils space
CB171 CB184 CB146 CB170 CB167 CB141 CB142 CB134 CB140 CB158 CB157
0.1u 0.1u 0.1u 0.1u 0.1u 0.01u 0.01u 0.1u 0.1u 0.1u 0.1u Title Rev
Document Number
Place one 0.1U/0.01U pair in each corner and Distribute near the 1.8V Distribute near the VCC1_8SB Brookdale ICH2 PCI
2 on opposite sides close to ICH2 if it fit power pin of the ICH2 Power pin of the ICH2 Last Revision Date:
Tuesday, July 24, 2001 Sheet 9 of 36
VCC5_SB
ICH2 ASIC / RTC / AC'97 / GPIO / LPC / USB / IDE SIGNALS RTC BLOCK
R331
1.5K
VCC3 VCC5
D19
1N4148-S-LL34 JBAT1 Clear CMOS
D14 R257 1-2 Normal *
RTC_VCC
1K R340 2-3 Clear CMOS
RTC_VCC VCC3_SB VCCP VCC5_SB 1N5817-S-DO-241AC 4.7K
R567
1K
CB161 CB156 D20
0.1u 0.1u R411 390K
M20
U21
U18
D12
D13
V17
V18
V19
T18
1
G5
F5
JBAT1
K2
U17B 2 D1x3-BK
THRM# 1N5817-S-DO-241AC 3
AA13 E21
VCC3SUS1
VCC3SUS2
VCC3SUS4
VCC3SUS5
VCC3SUS6
VCC3SUS7
VCC5REF_SUS
VCC5REF1
VCC5REF2
VCCRTC
VCPU_IO1
VCPU_IO2
11 THRM# THRM# PDCS1# PD_CS#1 4
W16 C15
11,22 SLP_S3# SLP_S3# SDCS1# SD_CS#1 4 D21
AB18 E19 VBAT R568 C167 C215 R410
22 SLP_S5# SLP_S5 PDCS3# PD_CS#3 4
PWR_GD R20 D15 0.047u 1K
19 PWR_GD PWROK SDCS3# SD_CS#3 4
A13
5 CPU_GD CPUPWRGD
VRM_GD B15 F20 1K 0.047u
23 VRM_GD VRMPWRGD PDA0 PD_A0 4
W21 F19 1N5817-S-DO-241AC RTCRST#
11,15 PWRBTN# PWRBTN# PDA1 PD_A1 4
RING# AA17 E22
24 RING# RI# PDA2 PD_A2 4
RSMRST# R21 A16 VBIAS
11 RSMRST# RSMRST# SDA0 SD_A0 4
Y16 D16 R277
RSM_PWROK SDA1 SD_A1 4
Y17 B16 20M RTCX1
SUSSTAT# SDA2 SD_A2 4
AA18
11 SUSCLK SUSCLK G22 R317 10M R293 10M RTCX2
PDDREQ PD_DREQ 4
4,11,12,16 SMBDATA AA16 B18 SD_DREQ 4
AB16 SMBDATA SDDREQ F22 X2
4,11,12,16 SMBCLK SMBCLK PDDACK# PD_DACK# 4
SMB_ALERT AB17 B17 R274
GPIO11/SMBALERT# SDDACK# SD_DACK# 4
U19 G19 5.6M 32K-12.5pf-CSA-309-D
18 SM_LNK0 SMLINK0 PDIOR# PD_IOR# 4 BAT1
V20 D17 C174 C170
18 SM_LNK1 SMLINK1 SDIOR# SD_IOR# 4
INTRUDER# T19 G21 {MSI-BOM} 15p +-30PPM 15p
INTRUDER# PDIOW# PD_IOW# 4
C17 32pF
SDIOW# SD_IOW# 4
RTCRST# T20 G20
RTCRST# PIORDY PD_IORDY 4
A17
SIORDY SD_IORDY 4
VBIAS T21
VBIAS PDD0
H19 PDD[0..15] 4
RTCX1 U22 PDD0 H22 PDD1
RTCX1 PDD1 J19 PDD2
RTCX2 T22 PDD2 J22 PDD3 PROCHOT BLOCK
RTCX2 PDD3 K21 PDD4
D4 PDD4 L20 PDD5
4 ICH_66 CLK66 PDD5
M19 M21 PDD6
4 ICH_14 CLK14 PDD6
P20 M22 PDD7 THRM#
4 ICH_48 CLK48 PDD7 L22 PDD8
V22 PDD8 L21 PDD9
12 AC_RST# AC_RST# PDD9
R261 33 P19 K22 PDD10
12,13 AC_SYNC AC_SYNC PDD10
R19 K20 PDD11 R211 4.7K Q32
12,13 AC_BCLK AC_BITCLK PDD11 VCCP
P21 J21 PDD12 NPN-3904LT1-S-SOT23
12,13,15 AC_SDOUT AC_SDOUT PDD12
Y22 J20 PDD13
12,13,15 AC_SDIN0 AC_SDIN0 PDD13
W22 H21 PDD14
12,15 AC_SDIN1 AC_SDIN1 PDD14
N22 H20 PDD15
19 SPKR SPKR PDD15 5 PROCHOT#
W14 D18 SDD0
19 EXTSMI# GPIO12 SDD0 SDD[0..15] 4
SIO_PME# AB15 B19 SDD1
11 SIO_PME# GPIO13 SDD1
6CH_CTRL L1 D19 SDD2
21 6CH_CTRL GPIO21 SDD2
B14 A20 SDD3
GP23 A14 GPIO22 SDD3 C20 SDD4 ICH2 STRAPPING RESISTORS
15 GP23 GPIO23 SDD4
AB14 C21 SDD5
GPIO27 SDD5 SDD6
AA14 D22
GPIO28 SDD6 E20 SDD7
Y12 SDD7 D21 SDD8 RN28
11,15 LAD0/FWH0 LAD0/FWH0 SDD8
W12 C22 SDD9 4.7K
AB13 D20 SDD10 PD_IORDY R133 4.7K SM_LNK0 1 2
11,15 LAD2/FWH2 LAD2/FWH2 SDD10 VCC3 VCC3_SB
AB12 B20 SDD11 SD_IORDY R224 4.7K SM_LNK1 3 4
R327 X_10K AA12 C19 SDD12 BATLOW# 5 6
FS0 SDD12 SDD13 PD_DREQ R97 5.6K
11 LDRQ# Y13 A19 7 8
W13 LDRQ0# SDD13 C18 SDD14 SD_DREQ R225 5.6K
AB11 LDRQ1# SDD14 A18 SDD15 RN32
11,15 LFRAME#/FWH4 LFRAME#/FWH4 SDD15 10K
U20 BATLOW# SMB_ALERT 1 2
TP0 VCC3_SB
W17 N3 SLP_S3# 3 4
20 USBP0+ USBP0+ GPIO2/PIRQE# INTE# 18
Y18 N2 INTRUDER# R280 10K 5 6
20 USBP0- USBP0- GPIO3/PIRQF# INTF# 18,25 RTC_VCC
AB19 N1 7 8
20 USBP1+ USBP1+ GPIO4/PIRQG# INTG# 18
AA19 M4 RSMRST# R365 10K
20 USBP1- USBP1- GPIO5/PIRQH# INTH# 18
W18 Y11 GP6
20 USBP2+ USBP2+ GPIO6 GP7
5/21 update
20 USBP2- Y19 AA11
AB20 USBP2- GPIO7 Y14 SPKR R260 X_10K RN31
12,20 USBP3+ USBP3+ GPIO8 LAN_WAKE 24
AA20 A15 4.7K
12,20 USBP3- USBP3- GPIO18
W19 D14 PWR_GD R273 8.2K GP23 1 2
OC0# GPIO19 VCC3
Y20 C14 3 4
L10 GND34
L11 GND35
L12 GND36
L13 GND37
L14 GND38
M9 GND39
M10 GND40
M11 GND41
M12 GND42
M13 GND43
M14 GND44
N9 GND45
N10 GND46
N11 GND47
N12 GND48
N13 GND49
N14 GND50
P9 GND51
P10 GND52
P11 GND53
P12 GND54
P13 GND55
P14 GND56
GND57
20 OC#0 OC1# GPIO20

Y21 V21 GP6 5 6
W20 OC2# GPIO24 W15 GP7 7 8
12,20 OC#1 OC3# GPIO25 THRM# R345 10K
VCC3
82801BA-VB11
L9
VRM_GD R216 10K VCC3

SIO_PME# R377 4.7K VCC3_SB EXTSMI# R574 4.7K VCC3_SB
RING# R367 8.2K
RSMRST# R366 1K
PWRBTN# R329 10K

ICH2 DECOUPLING CAPACITOR
VCC3_SB
VCCP VCC5_SB RTC_VCC VCC5 VCC5_SB Title Rev
CB193 CB143 CB147 CB181 CB169 CB179 CB180 Document Number
0.1u 0.1u 0.1u 0.1u 0.01u 0.1u 0.1u Brookdale ICH2 Other
Last Revision Date:
Distribute near the VCC3_SB power pin of the ICH
H a rdware Monitor
LPC SUPER I/O W83627HF THERMAL RESISTOR BLOCK SPEAKER BLOCK

VCC5
U13
30 1 VTIN_VCC FB13 120
4,7,15,25 PCIRST#1 LRESET# DRVDEN0 DRVDEN0 24 VCC5
21 2 R162
4 SIO_PCLK LCLK DRVDEN1 DRVDEN1 24 ALARM 19
23 3 CB102 0.1u VTIN_GND FB12 120 10K
9,18 SERIRQ SERIRQ INDEX# INDEX# 24
22 4
10 LDRQ# LDRQ# MOA# MOT_A# 24
29 5 BEEP R164 4.7K
10,15 LFRAME#/FWH4 LFRAME# DSB# DRV_B# 24
6
DSA# DRV_A# 24
27 7 TMP_VREF TMP_VREF Q28
10,15 LAD0/FWH0 LAD0 MOB# MOT_B# 24
26 8 NPN-3904LT1-S-SOT23
10,15 LAD1/FWH1 LAD1 DIR# DIR# 24
25 9 R157 R166
10,15 LAD2/FWH2 LAD2 STEP# STEP# 24
24 10 10K 10K
10,15 LAD3/FWH3 LAD3 WRDATA# WT_DT# 24
11 CPU_TMP SYS_TMP
WE# WT_EN# 24
125 13
14 JYS_AX2 GPX2/P15/GP14 TRACK0# TRACK0# 24
123 14 RT1 RT2
14 JYS_AX1 GPY1/GP15 WP# WP# 24
128 15 X_10K 10K
14 JYS_PB0 GPSA1/P12/GP10 RDDATA# RDATA# 24
121 16 VTIN_GND VTIN_GND
14 JYS_PB1 GPSA2/GP17 HEAD# HEAD# 24
126 17
14 JYS_AX0 GPX1/P14/GP12 DSKCHG# DSKCHG# 24
124
14 JYS_AX3 GPY2/P16/GP14
127 42 1 2 LP_D0 NOTE: LOCATE INSIDE NOTE: LOCATE CLOSE
14 JYS_PB3 GPSB1/P13/GP11 PD0
122 41 RN5 3 4 LP_D1
14 JYS_PB2 GPSB2/GP16 PD1 SOCKET478 STATUS PANEL
120 40 33 5 6 LP_D2
14 MID_OUT MSO/IRQIN0 PD2
119 39 7 8 LP_D3
14 MID_IN MSI/GP20 PD3 38 7 8 LP_D4
TMP_VREF 101 PD4 37 RN6 5 6 LP_D5
CPU_TMP 102 VREF PD5 36 33 3 4 LP_D6 TMP_VREF R163 30K CPU_TMPA
SIO
20 CPU_TMP VTIN3 PD6
CPU_TMPA R158 103 35 1 2 LP_D7
5 CPU_TMPA VTIN2 PD7 LP_D[0..7] 24
0 SYS_TMP 104 31 7 8
VTIN1 SLCT LP_SLCT 24
VTIN_GND 93 32 PE ACK# 5 6
5 VTIN_GND -5VIN 94 AGND PE 33 RN11 33 3 4
LP_ACK#
LP_BUSY
24
24
SUPER I/O STRAPPING RESISTOR
-12VIN 95 -5VIN BUSY 34 ACK# PE 1 2
-12VIN ACK# LP_PE 24
+12VIN 96 43 SLIN# INIT# 1 2
VTIN_VCC 97 +12VIN SLIN# 44 INIT# SLIN# 3 4 LP_INIT#
LP_SLIN#
24
24
CHASISS INTRUSION HEADER
R143 10K AVCC INIT# 33 R214 10K PWRBTN#
98 45 5 6
VCC3 +3.3VIN ERR# LP_ERR# 24 VCC3_SB
99 46 RN12 7 8
VCOREB AFD# LP_AFD# 24
10K 100 47 R142 33
VCCP VCOREA STB# LP_STB# 24
R153
VID4 106 88 IRRX R169 4.7K SOUTA
5,23 VID[0..4] VID4 IRRX/GP25 VCC5
VID3 107 69 VBAT
VID3 CIRRX/GP34 DLED3 21
VID2 108 87 IRTX R151 4.7K SOUTB
VID2 IRTX/GP26 VCC5
VID1 109 75
VID1 SUSCLKIN SUSCLK 10
VID0 110 R175 X_4.7K RTSA#
VID0 56 R152 VCC5
DCDA# DCDA# 24
116 50 2M
20 CPU_CTRL FANPWM1 DSRA# DSRA# 24
113 53 J5
20 CPU_FAN FANIO1 SINA SINA 24
115 51 RTSA# CHASISS
20 SYS_CTRL FANPWM2 RTSA# RTSA# 24 1
112 54 SOUTA
20 SYS_FAN FANIO2 SOUTA SOUTA 24 2
111 49
FANIO3 CTSA# CTSA# 24
VCC5 52 D1x2 SOUTA L: Disable KBC H: Enable KBC
DTRA# DTRA# 24
105 57 SOUTB L: 24MHZ H: 48MHZ
10 THRM# OVT# RIA# RIA# 24
BEEP 118 RTSA# L: CFAD=2E H: CFAD=4E
R702 X_0 CHASISS 76 BEEP 84 DTRA# L: PNP Default H: PNP no Default
CASEOPEN# DCDB# DCDB# 24
19 79
10 SIO_PME# PME# DSRB# DSRB# 24
82
SINB SINB 24
R630 X_0 89 80
20 CPUFAN 21 DLED2 WDTO/GP24 RTSB# RTSB# 24
R631 0 91 83 SOUTB
4,10,12,16 SMBDATA SDA/GP22 SOUTB SOUTB 24
R632 0 92 78
4,10,12,16 SMBCLK SCL/GP21 CTSB# CTSB# 24
R633 X_0 81
20 SYSFAN DTRB# DTRB# 24
67 85 +12V R145 1 2 28K +12VIN
10,15 PWRBTN# PSOUT# RIB# RIB# 24
VCC5 68
19 PWRBTIN# PSIN#
64 59 -12V R150 1 2 232K -12VIN
19 SUS_LED SUSLED/GP35 GA20 A20GATE# 9
90 60
19 PWR_LED PLED/GP23 KBRST KB_RST# 9 5/22 update
R703 X_0 72 63 -5V R160 1 2 120K -5VIN
19 PSON# PWRCTL#/GP31 KBDATA KBDATA 24
73 62
10,22 SLP_S3# SUSCIN/GP30 KBCLK KBCLK 24
18 66
4 SIO_48 CLKIN MSDATA MSDATA 24
65
MSCLK MSCLK 24
1
61 58 KBLOCK# 19
VCC5_SB
1
74 VSB KBLOCK#
VBAT VBAT R161 R149
70 R146 X_0 RSMRST# R144 56K 56K
RSMRST#/GP33 RSMRST# 10
28 71 DLED1 21 10K
VCC3 VCC3 PWROK/GP32 R148 0 DLED4 21
2
12 20
VCC5 VCC_1 VSS1
2
48 55 VTIN_GND TMP_VREF
VCC_2 VSS2
77 86
114 VCC_3 VSS3 117
VCC_4 VSS4
{1ST PART FIELD}
WB-W83627HF-AW-VG
DECOUPLING CAPACITOR
RESUME RESET CIRCUIT BLOCK VCC3 VCC5 VCC5_SB
S t u f f a ll for D Version bug IR HEADER CB133 CB121 CB111

0.1u 0.1u 0.1u
CB119 CB103
RSMRST# 0.1u 0.1u
CB11
IR1 0.1u
1 CB120
VCC5 1 0.1u
IRRX 3
5/21 update U20A 19 IRRX 4 3
74LCX14MX-SOIC14 IRTX 4
19 IRTX 5
R408 22K 1 2 R396 4.7K Q44 5
VCC3_SB NPN-3904LT1-S-SOT23 D1x5-1:4-BK Title Rev
VBAT VCCP
C206 (VCC3_SB) M i c ro-Star MS-6507 0B
1u CB104 C100
0.1u 0.1u Document Number
LPC I/O W83627HF
Last Revision Date:
8 7 6 5 4 3 2 1
VCC3
R747
330 DN#
R743
13 PRI_RST#
JP2
D X_0 D
VCC5_SB 1
R746 4.7K
14 2
AC_RST# 5 6 3
U21C 7 Q708 R744 D1x3-BK
7407-SOIC14 NPN-3904LT1-S-SOT23 10K
VCC3
R745 4.7K
R724
C_EEDOUT
10K
+12V
VCC5_SB CNR1
B1 A1 VCC3_SB
-12V B2 RESV1 RESV7 A2 RN702 22
B3 RESV2 RESV8 A3 1 2 C_SHCLK
RESV3 GND9 9 CNR_SHCLK
B4 A4 3 4 RLAN_RXD2
GND1 RESV9 9 ELAN_RXD2
C B5 A5 5 6 RLAN_SYNC C
RESV4 RESV10 9 ELAN_SYNC
B6 A6 7 8 RLAN_RXD1
RESV5 GND10 9 ELAN_RXD1
B7 A7 RLAN_TXD2 VCC3_SB
RLAN_TXD1 B8 GND2 LAN_TXD2 A8 RLAN_TXD0 RN700 22
RLAN_SYNC B9 LAN_TXD1 LAN_TXD0 A9 1 2 RLAN_RXD0
LAN_RSTSYNC GND11 9 ELAN_RXD0
B10 A10 RLAN_CLK 3 4 RLAN_TXD2
GND3 LAN_CLK 9 ELAN_TXD2
RLAN_RXD2 B11 A11 RLAN_RXD1 C703 5 6 RLAN_CLK
LAN_RXD2 LAN_RXD1 9 ELAN_CLK
RLAN_RXD0 B12 A12 0.1u 7 8 RLAN_TXD0
LAN_RXD0 RESV11 9 ELAN_TXD0
B13 A13
GND4 USB+ USBP3+ 10,20
B14 A14 RN701 0
B15 RESV6 GND12 A15 1 2 RLAN_TXD1
+5VDUAL USB- USBP3- 10,20 9 ELAN_TXD1
B16 A16 3 4 C_EEDOUT
10,20 OC#1 USB_OC# +12V 9 CNR_EEDOUT
B17 A17 5 6 C_EEDIN
GND5 GND13 9 CNR_EEDIN
B18 A18 7 8
B19 -12V +3.3VDUAL A19
VCC3 +3.3VD +5VD VCC5
B20 A20
C_EEDIN B21 GND6 GND14 A21 C_EEDOUT
C_SHCLK EE_DOUT EE_DIN
B22 A22 E_EECS 9
B23 EE_SHCLK EE_CS A23
B24 GND7 SMB_A1 A24
VCC3 SMB_A0 SMB_A2 VCC3
4,10,11,16 SMBCLK B25 A25 SMBDATA 4,10,11,16
DN# B26 SMB_SCL SMB_SDA A26 AC_RST#
PRIMARY_DN# AC97_RESET# AC_RST# 10
B27 A27
B28 GND8 RESV12 A28
10,13 AC_SYNC AC97_SYNC AC97_SDATA_IN1 AC_SDIN1 10,15
B29 A29
10,13,15 AC_SDOUT AC97_SDATA_OUT AC97_SDATA_IN0 AC_SDIN0 10,13,15
R721 B30 A30
10,13 AC_BCLK AC97_BITCLK GND15
B 10K B
CNR-D60
C705 R722 R723
10p C706 10K 10K
100p ADDRESS AE C704
100p
A A
Title Rev
Document Number
CNR RISER
Last Revision Date:
Thursday, August 09, 2001 Sheet 12 of 36
8 7 6 5 4 3 2 1
AUDIO CODE CRYSTAL CIRCUIT
AD1885 AC97 CODEC
R391
+5VR R752 1 2 X_4.7K XTALOUT 1 2 XTALIN
R401
SROUT_R 10M
SROUT_R 21
X_10 SROUT_L SROUT_L 21 X3
+5VR 1 2
R750 4.7K +5VR 24M-16pf-HC49S-D
+5VR
1
R441 X_10 MONO_OUT C191 C192
14 SPDIFO
R397 4.7K CB204
22p 22p
1
2
J700 0.1u
14 SPDIFO 2 X_D1x3-BK C205 0.1u U22
48
47
46
45
44
43
42
41
40
39
38
37
3
CP6 X_COPPER
NC
NC
AVDD2
MONO
AVSS2
DACOUTR
DACOUTL
TEST6
TEST5
TEST4
TEST1
TEST2
36 LINE_ROUT 14
X_120 LOUTR 35
LOUTL LINE_LOUT 14
FB22 VDD3 1
VCC3 XTALIN DVDD1
2 34 DECOUPLING CAPACITOR
XTALOUT 3 XTL_IN NC 33
4 XTL_OUT NC
DVSS1 32
VRDA
5 31
10,12,15 AC_SDOUT SDATA_OUT VRAD
R390 33 6
10,12 AC_BCLK BIT_CLK C202
7 30 FB29 120
DVSS2 AFILT2 C198
10,12,15 AC_SDIN0 8 29 1 2
9 SDATA_IN AFILT1 1 2
10 DVDD2 28 VREF_OUT
10,12 AC_SYNC 0.1u
SYNC NC X_0.22u
11
RESET# 27
1
1
12 VREF C193 C194
C197
1
PC_BEEP 26
X_10p + CT701 C195 C201 + CT42 C200 + CT700 C204
AVSS1
1
25
VIDEOR
1
AVDD1
VIDEOL
2
C190 X_10u X_10u X_10u VDD3
CDGND
PHONE
+5VR + CT40
AUXR
2
270p 270p 0.047u
AUXL
MIC1
MIC2
LINR
CDR
LINL
CDL
2
CB194 0.1u 1u
12 PRI_RST#
1
0.1u X_1u-0805 CB202
13
14
15
16
17
18
19
20
21
22
23
24
1
CODEC-AAD1885 10u 1u
X_0.1u
2
MONO_PHONE
AUXLX LINE_R J3-3

14,21 LINE_R 19
AUXRX C184 LIN_IN_R C126 18
LIN_IN_R 21
1u 1000p 17
CDLX C185 LIN_IN_L 16
LIN_IN_L 21
1u 28 AUDIO CODE REGULATORS
CDGNDX LINE_L
14,21 LINE_L GAME+PHONE-D15-BK
CDRX
C127
1000p
J3-2
MIC_PWR 27 -12V -12VR
26
C186 R342 25 FB27 X_600
1 2 1 2 MIC_IN MIC_IN 24
14 MIC_IN
+5VR R751 1 2 X_4.7K 29 CP7
1
220p C181 0 CB195
X_0.01u GAME+PHONE-D15-BK 0.1u
VREF_OUT R271 1 2 4.7K X_COPPER
+5VR
2
MIC_PWR C125
1000p
R253
X_2.2K
C707
1000p
AUXRX C220 1 2 1u-0805 AUXR +12VR +12V U24 +5VR

AUDIO CODE CD / AUX / MODEM IN HEADERS 14 AUXRX 4
AUX_IN1 600 YLT1087S-SOT89-0.8A
3 FB31 3 2
AUXLX C221 1 2 VIN VOUT
2 1u-0805 AUXL AUX-D1x4-YL
1
1
ADJ
R412
CDR 14 CB206 C232 C212
R420 R430 AUX IN 0.1u
10K 10K 1u SOT223 100 1u
2
R355
CDRX C187 1 2 1u-0805 CDR1 1 2 0 CDR MONO_PHONE C219 1 2 1u-0805
4 CD_IN1 1 MDM_IN1
R356 3 CD-D1x4-BK-SBTJ 2 MON-D1x4-GN
CDGNDX C188 1 2 1u-0805 CDGND1 1 2 0 CDGND 2 MONO_OUT C218 1 2 1u-0805 3 R402
1 4
R359 300
CDLX C189 1 2 1u-0805 CDL1 1 2 0 CDL CD IN MODEM IN
1
Title Rev
R358 R357 R354
10K X_10K 10K
2
Document Number
AC97 CODEC AD1885
Last Revision Date:
CDL 14
-12VR
SPEAKER OUT CIRCUIT
C210 1 2
X_1u-0805 1 R428 2 X_0 SPEAKER OUT JACK

13 AUXRX
C M I 8 7 3 8 SPDIF AUTO DETECT
4
U25A
3 X_TI-TL072CDR-SOIC8
+ 1 R439 33 SPEAKER_R
R414
C716 LOUTR 1 2 2
13 LINE_ROUT -
X_1u-0805
1
X_47K C226
8
R413
1000p
1 2 FB15 300_0805 J3-4
2
C230 LINE_NEXT_R 1 2 23
X_47K FSPKR 22
+
+12VR 10u FSPKL
C217 21
1 2 SROUT_R LINE_NEXT_L 1 2 20
SROUT_R 21
SROUT_L 30
SROUT_L 21
X_33p FB14
300_0805 GAME+PHONE-D15-BK
SPDIFO 13
1
-12VR C130 C128 C129
+
C131
C229
1000p 1000p 1000p
1000p
10u
2
R424
4
U25B
X_TI-TL072CDR-SOIC8 X_0
5
R403 + 7 R398 33 SPEAKER_L
C717 LOUTL 1 2 6
13 LINE_LOUT -
X_1u-0805
1
X_47K C227
8
C234 1000p
2
1 2 R435
1 2
X_1u-0805
X_47K
+12VR C231
1 2
X_33p FOR MSI INTERNAL HEADER

SPEAKER_R 1 R706 2 LINE_NEXT_R
SPEAKER_L 1 R707 0 2 LINE_NEXT_L
0
CD PANEL PLAY WITHOUT PC POWER_ON
Q53 Q51
X_2N7002-S-SOT23
X_2N7002-S-SOT23
R400 JAUDIO1
D S S D SPEAKER_R 1 2
13 CDR MIC AUD_GND
X_1K R734 1 2 X_2.2K 3 4
+5VR MIC_BIAS AUD_VCC +5VR
G
5 6
AUD_FPOUT_R AUD_RET_R
INTEL
VCC5 7 CUT 8
HP_ON
R405 X_1K_0805 VCC5_SB 9 10
A5VSB AUD_FPOUT_L AUD_RET_L
D
R431 MIC_IN 11 12
X_4.7K 13 MIC_IN MIC GNDMIC
Q54
SPEAKER_R 13 14 LINE_NEXT_R
X_2N7002-S-SOT23 FLINE OUTR LINE NEXT R
MSI
G
SPEAKER_L 15 16 LINE_NEXT_L
FLINE OUTL LINE NEXT L
G
G
S
17 CUT 18
R418 GNDFLO
D S S D SPEAKER_L LINE_R 19 20 LINE_L
13 CDL 13,21 LINE_R LINE-IN-R LINE-IN-L LINE_L 13,21
X_1K
D2x10-BK
Q52 Q50
X_2N7002-S-SOT23
X_2N7002-S-SOT23
CP4
POLY SWITCH RN13 CN14
1.1A-MF-MSMD110-S JYS_AX0 7 8 JYS_AX3 7 8
FS3 X_COPPER JYS_AX1 5 6 JYS_AX2 5 6
GAME/MIDI CONNECTOR JYS_AX2 3 4 JYS_AX1 3 4
VCC5 L3 JYS_AX3 1 2 JYS_AX0 1 2
X_0_0805
CB105 CB99 CB95 CB113 1M 0.01u
0.1u 0.1u 39p 0.1u
5/21 update RN14
1 9 2.2K VCC5 CN15
JYS_PB0 2 10 JYS_PB3 JYS_PB1 1 2 JYS_PB1 7 8
11 JYS_PB0 JYS_PB3 11
JYS_AX0 R156 2.2K 3 11 R141 2.2K JYS_AX2 JYS_PB2 3 4 JYS_PB2 5 6
11 JYS_AX0 JYS_AX2 11
4 12 R196 2.2K MID_OUT JYS_PB3 5 6 JYS_PB3 3 4
MID_OUT 11
5 13 R139 2.2K JYS_AX3 JYS_PB0 7 8 JYS_PB0 1 2
JYS_AX3 11
JYS_AX1 R154 2.2K 6 14 JYS_PB2
11 JYS_AX1 JYS_PB2 11
JYS_PB1 7 15 R155 2.2K MID_IN MID_IN R159 22K
11 JYS_PB1 MID_IN 11
8 MID_OUT R205 22K 0.01u
L6
J3-1
GAME+PHONE-D15-BK
0_0805 Title Rev
C136 C103 Document Number
100p 100p Audio Amp TL072 & GAME
Last Revision Date:
Monday, August 06, 2001 Sheet 14 of 36
FWH INIT Signal Voltage Translation Block 5/16 update
For PB function. VCC3
VCC3 VCC3
Firware Hub (FWH) R571 X_10K
R572 X_10K
VCCP R362 R361
8.2K 1K J500
FINIT#
5/21 update 1 F_GPI3 R415 10K
VCC3 VCC3 R577 Q40 2 F_GPI2 R416 10K
U23 330 NPN-3904LT1-S-SOT23 3
1 32
VPP VCC R573 4.7K Q41 X_D1x3-BK
2 31
4,7,11,25 PCIRST#1 RST# CLK FWH_PCLK 4 5,9 HINIT#
F_GPI3 3 30 R363 8.2K NPN-3904LT1-S-SOT23
F_GPI2 4 FGPI3 FGPI4 29 R364 8.2K
SD_DET FGPI2 IC(VIL)
4 SD_DET 5 28
PD_DET 6 FGPI1 GNDA 27
4 PD_DET FGPI0 VCCA
R421 4.7K 7 26
VCC3 WP# GND
10 GP23 8 25
9 TBL# VCC 24 FINIT#
10 ID3 INIT# 23
1 ID2 FWH4 LFRAME#/FWH4 10,11
J7 11 22
X_D1x2 2 12 ID1 RFU 21
13 ID0 RFU 20
10,11 LAD0/FWH0
10,11 LAD1/FWH1 14 FWH0 RFU 19 FWH RESISTORS FWH DECOUPLING CAPACITORS
FWH1 RFU
10,11 LAD2/FWH2 15 18
16 FWH2 RFU 17
GND FWH3 LAD3/FWH3 10,11
VCC3
PLCC32-SMT
J7 BIOS Update CB190 CB191 CB201 CB203

0.1u 0.1u 0.1u 0.1u
PD_DET R434 10K
SHORT Locked SD_DET R436 10K
OPEN Unlocked *
VCC5_SB
VCC_VID / VID_GOOD THERM_OFF
VCC5
VCC3 R737 U700B
13
14
VCC3
X_3.3K 12 9
VCC
PR
R738 D Q
R735 VID_GD 11
X_10 X_3.3K CLK
GND
U702 8
CL
1 4 Q706 Q
X_0 IN PG X_NPN-3904LT1-S-SOT23 X_SN74HCT74-SOIC14
3
10
EN
7
R736 2 5 VCC_VID R748
PWRBTN# +12V GND OUT
PWRBTN# 10,11 VCC3 X_TPPM0125-SOT23-5-150mA X_3.3K
C714 C715
R708 X_0.1u X_1u-0805
X_3.3K R50
VCC3_SB 220_0805 +12V
VCC5_SB AC_SDOUT R269 X_8.2K
10,12,13 AC_SDOUT VCC3
VCC3
2
R709
CSK-2-SOT23-150mA
VR1
1 AC_SDIN1 10,12
X_1K R51 AC_SDIN0 10,12,13
8
1.05K_0603
R712 3 Q12
+
3
R711 1 2N7002-S-SOT23 R339 R338

X_1K 2 10K 10K
X_10K C22 -
U700A
14
THERM_OFF X_102P R53

4
2 5 U4A
VCC
PR
D Q 1K YLM358S-SOIC8
3
CLK Q700
GND
R715 6 X_2N7002-S-SOT23 VCC_VID

CL
Q VCC_VID 6,23
VCCP
X_1K X_SN74HCT74-SOIC14 THERM_OFF 1.2V/0.1A JP3 AUDIO DOWN
1
R716 CB13
1.5K 10u-1206
Q701 OPEN Auto mode
R713 R714 Q702 R710 +12V VCC5_SB
X_NPN-3904LT1-S-SOT23
SHORT Disabled onboard audio codec
62 X_62
X_NPN-3904LT1-S-SOT23 X_1K R48
VCC3_SB CB4 1K
0.1u VID_GD VID_GD 23
Q703 D1 X_1N4148-S-LL34
8
R49
2K R33 Q5
5
X_NPN-3904LT1-S-SOT23 + 7 2N7002-S-SOT23
6 Title Rev
- 4.99K
R624 M i c ro-Star MS-6507 0B
4
R37 U4B C11

1K YLM358S-SOIC8 1u X_4.7K Document Number
THERMTRIP#
THERMTRIP# 5 FWH & VCCVID
Last Revision Date:
5 4 3 2 1
5/22 update
V_DIMM V_DIMM
V_DIMM
+
CT500 CT501
104
112
128
136
143
156
164
172
180
108
120
148
168
DIMM1
15
22
30
54
62
77
96
38
46
70
85
1000u 1000u
104
112
128
136
143
156
164
172
180
108
120
148
168
7
DIMM2
15
22
30
54
62
77
96
38
46
70
85
7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
DDRMAA0 48 2 DDRMD0
DDRMAA0 48 2 DDRMD0 DDRMAA1 43 A0 D0 4 DDRMD1
A0 D0 DDRMD[0..63] 26,27 A1 D1
D DDRMAA1 43 4 DDRMD1 DDRMAA2 41 6 DDRMD2 D
DDRMAA2 41 A1 D1 6 DDRMD2 DDRMAA3 130 A2 D2 8 DDRMD3
DDRMAA5 A4 D4 DDRMD5 DDRMAA6 A5 D5 DDRMD6
32 95 125 98
122 12 27 13
118 20 115 105
DDRMAA12 115 A11 D11 105 DDRMD12 103 A12 D12 106 DDRMD13
103 A12 D12 106 DDRMD13 A13 D13 109 DDRMD14
A13 D13 109 DDRMD14 DDRBS0 59 D14 110 DDRMD15
D14 8,26,27 DDRBS0 BA0 D15
DDRBS0 59 110 DDRMD15 DDRBS1 52 23 DDRMD16
BA0 D15 8,26,27 DDRBS1 BA1 D16
DDRBS1 52 23 DDRMD16 113 24 DDRMD17
113 BA1 D16 24 DDRMD17 BA2 D17 28 DDRMD18
BA2 D17 DDRMD18 DDRCS#0 D18 DDRMD19
28 157 31
DDRCS#2 157 D18 31 DDRMD19 DDRCS#1 158 CS0 D19 114 DDRMD20
DDRCS#3 158 CS0 D19 114 DDRMD20 71 CS1 D20 117 DDRMD21
CS1 D20 DDRMD21 NC/CS2 D21 DDRMD22
71 117 163 121
163 NC/CS2 D21 121 DDRMD22 NC/CS3 D22 123 DDRMD23
NC/CS3 D22 123 DDRMD23 97 D23 33 DDRMD24
97 D23 33 DDRMD24 107 DQM0 D24 35 DDRMD25
DQM0 D24 DDRMD25 DQM1 D25 DDRMD26
107 35 119 39
119 DQM1 D25 39 DDRMD26 129 DQM2 D26 40 DDRMD27
149 126 159 127
C C
177 133 140 53
140 DQM7 D31 53 DDRMD32 DQM8 D32 55 DDRMD33
DQM8 D32 55 DDRMD33 DDRWEA# 63 D33 57 DDRMD34
DDRWEA# 63 D33 57 DDRMD34 DDRCASA# 65 WE D34 60 DDRMD35
DDRCASA# WE D34 DDRMD35 DDRRASA# CAS D35 DDRMD36
65 60 154 146
DDRRASA# 154 CAS D35 146 DDRMD36 RAS D36 147 DDRMD37
RAS D36 147 DDRMD37 DDRCKE0 21 D37 150 DDRMD38
DDRCKE2 D37 DDRMD38 DDRCKE1 CKE0 D38 DDRMD39
21 150 111 151
DDRCKE3 111 CKE0 D38 151 DDRMD39 CKE1 D39 61 DDRMD40
CKE1 D39 61 DDRMD40 16 D40 64 DDRMD41
D40 8,26 DCLK1 CK0/DNU D41
16 64 DDRMD41 17 68 DDRMD42
8,26 DCLK4 CK0/DNU D41 8,26 DCLK#1 CK0/DNU D42
17 68 DDRMD42 137 69 DDRMD43
8,26 DCLK#4 CK0/DNU D42 8,26 DCLK0 CK1 D43
137 69 DDRMD43 138 153 DDRMD44
8,26 DCLK3 CK1 D43 8,26 DCLK#0 CK1 D44
138 153 DDRMD44 76 155 DDRMD45
8,26 DCLK#3 CK1 D44 8,26 DCLK2 CK2/DNU D45
76 155 DDRMD45 75 161 DDRMD46
8,26 DCLK5 CK2/DNU D45 8,26 DCLK#2 CK2/DNU D46
75 161 DDRMD46 162 DDRMD47
8,26 DCLK#5 CK2/DNU D46 D47
162 DDRMD47 MDQS#0 5 72 DDRMD48
MDQS#0 D47 DDRMD48 MDQS#1 DQS0 D48 DDRMD49
5 72 14 73
MDQS#1 14 DQS0 D48 73 DDRMD49 MDQS#2 25 DQS1 D49 79 DDRMD50
MDQS#3 DQS2 D50 DDRMD51 MDQS#4 DQS3 D51 DDRMD52
36 80 56 165
MDQS#7 DQS6 D54 DDRMD55 MDQS#8 DQS7 D55 DDRMD56
86 171 47 83
MDQS#8 47 DQS7 D55 83 DDRMD56 DQS8 D56 84 DDRMD57
DQS8 D56 84 DDRMD57 SMBDATA 91 D57 87 DDRMD58
B
SMBDATA D57 DDRMD58 4,10,11,12 SMBDATA SMBCLK SDA D58 DDRMD59 B
91 87 92 88
SDA D58 4,10,11,12 SMBCLK SCL D59
SMBCLK 92 88 DDRMD59 174 DDRMD60
SCL D59 174 DDRMD60 181 D60 175 DDRMD61
D60 DDRMD61 SA0 D61 DDRMD62
181 175 182 178
V_DIMM SA0 D61 SA1 D62
182 178 DDRMD62 183 179 DDRMD63
183 SA1 D62 179 DDRMD63 SA2 D63
SA2 D63 DIMMREF 1 44 MECCRS0
DIMMREF MECCRS0 VREF CB0 MECCRS1
1 44 82 45
82 VREF CB0 45 MECCRS1 184 VDDID CB1 49 MECCRS2
VDDID CB1 VCC3 VDDSPD CB2
184 49 MECCRS2 51 MECCRS3
VCC3 VDDSPD CB2 MECCRS3 CB3 MECCRS4
51 9 134
9 CB3 134 MECCRS4 PWRGD_DDR 10 NC CB4 135 MECCRS5
PWRGD_DDR 10 NC CB4 135 MECCRS5 19 PWRGD_DDR 101 NC CB5 142 MECCRS6
NC CB5 MECCRS6 NC CB6 MECCRS7
101 142 102 144
102 NC CB6 144 MECCRS7 173 NC CB7
173 NC CB7 167 NC 90 WP
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
167 NC 90 WP R503 4.7K V_DIMM NC/FETEN WP
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
NC/FETEN WP
100
116
124
132
139
145
152
160
176
11
18
26
34
42
50
58
66
74
81
89
93
DIMM-D184-BK
100
116
124
132
139
145
152
160
176
3
11
18
26
34
42
50
58
66
74
81
89
93
3
V_DIMM DIMM-D184-BK
Address = A2
Address = A0
R501
DDRRASA#
A DDRRASA# 26,27 A
49.9 DDRCASA# MECCRS0
DDRCASA# 26,27
DDRWEA# MECCRS1
DDRWEA# 26,27
DIMMREF DDRMAA[0..12] MECCRS2
DIMMREF DDRMAA[0..12] 8,26,27
MD[63..0] MECCRS3
MD[63..0] 8,26 MECCRS4 Title Rev
R502 C501 C502 MDQS#[0..8] MECCRS5
MDQS#[0..8] 26,27
MECCRS6 M i c ro-Star MS-6507 0B
49.9 0.1u 0.1u MECCRS7
Document Number
MECCRS[0..7]
MECCRS[0..7] 26,27 DIMM 1 & 2
p l ace near DIMM1 DDRCS#[0..4] DDRCS#[0..4] 8,26,27
DDRCKE[0..3] Last Revision Date:
DDRCKE[0..3] 8,27
5 4 3 2 1
8 7 6 5 4 3 2 1
AGP SIGNAL REFERENCE CIRCUIT
C116 X_470p
AGP UNIVERSAL 2X/4X SLOT(AGP VER:2.0 COMPLY) VCC_AGP
D D
VCC5 = 60mils trace / 15 mils space R183 R201
X_82 1K AGPREF: 10uA
AGPREF C115 X_0.1u VREF_GC

C114 X_1u
R182 R181 C111 CB122

AGP1 X_82 1K 1u 0.1u
B1 A1
-OVRCNT 12V +12V
B2 A2
VCC5 5V -TYPEDET
B3 A3 C110 X_470p
B4 5V RESERVED A4
VCC3 B5 USB+ USB- A5
GND GND NEAR AGP SLOT
B6 A6
9,18 INTB# -INTB -INTA INTA# 9,18
B7 A7
4 AGPCLK CLK -RST PCIRST#2 4,18
GREQ# B8 A8 GGNT#
8 GREQ# -REQ -GNT GGNT# 8
B9 A9 VCC3
B10 3.3V 3.3V A10
8 ST0 ST0 ST1 ST1 8
B11 A11
8 ST2 ST2 RESERVED
RBF# B12 A12 PIPE#
8 RBF# -RBF -PIPE PIPE# 8
B13 A13
B14 GND GND A14 WBF#
RESERVED -WBF WBF# 8
B15 A15
8 SBA0 SBA0 SBA1 SBA1 8
B16 A16
B17 3.3V 3.3V A17
8
8
SBA2
SB_STB SB_STB B18 SBA2 SBA3 A18 SB_STB# SBA3
SB_STB#
8
8 X_6.8K AGP TERMINATION RESISTORS
SB_STB -SB_STB RN15
B19 A19
B20 GND GND A20 GIRDY# 8 7
C 8 SBA4 SBA4 SBA5 SBA5 8 VCC_AGP C
B21 A21 GFRAME# 6 5
8 SBA6 SBA6 SBA7 SBA7 8
B22 A22 GTRDY# 4 3 PIPE# R180 6.8K
RSVD/KEY RSVD/KEY VCC_AGP
B23 A23 GDEVSEL# 2 1 RBF# R179 6.8K
B24 GND/KEY GND/KEY A24 WBF# R185 6.8K
VCC3_SB B25 AUX3V/KEY RSVD/KEY A25 6.8K RN16
3.3V/KEY 3.3V/KEY GSTOP#
B26 A26 8 7
8 GAD31 AD31 AD30 GAD30 8
B27 A27 GPERR# 6 5 GAD_STB0 R213 6.8K VCC_AGP
B28 A28 GPAR 4 3 GAD_STB1 R192 6.8K
3.3V 3.3V GSERR# SB_STB R204 6.8K
8 GAD27 B29 A29 GAD26 8 2 1
B30 AD27 AD26 A30 GREQ# R199 6.8K
B31 A31 GGNT# R198 6.8K GAD_STB#1 R195 6.8K
GAD_STB1 GND GND GAD_STB#1 GAD_STB#0 R212 6.8K
8 GAD_STB1 B32 A32 GAD_STB#1 8
B33 AD_STB1 -AD_STB1 A33 SB_STB# R200 6.8K
8 GAD23 AD23 C/-BE3 GC_BE#3 8
B34 A34 ST1 R184 X_6.8K
VCC_AGP VDDQ VDDQ VCC_AGP
B35 A35 ST2 R194 X_6.8K
B36 A36
B37 A37
B38 GND GND A38 5/23 update LESS 10MILS STUB TRACE LENGTH MUST BE FOLLOWING.
8 GAD17 AD17 AD18 GAD18 8 ST0 R193 2K
HI: SDRAM
8 GC_BE#2 B39 A39 GAD16 8
C/-BE2 AD16
LO:DDR
B40 A40
GIRDY# B41 VDDQ VDDQ A41 GFRAME# Place these resistors between PCI and AGP slot
8 GIRDY# -IRDY -FRAME GFRAME# 8
B42 A42
B43 AUX3V/KEY RSVD/KEY A43
B44 GND/KEY GND/KEY A44
B45 RSVD/KEY RSVD/KEY A45
GDEVSEL# 3.3V/KEY 3.3V/KEY GTRDY#
B46 A46
8 GDEVSEL# -DEVSEL -TRDY GTRDY# 8
B47 A47 GSTOP#
GPERR# B48 VDDQ -STOP A48 GSTOP#
PME#
8
9,18,25
AGP SLOT DECOUPLING CAPACITORS
B -PERR -PME B
B49 A49
GSERR# B50 GND GND A50 GPAR
-SERR PAR GPAR 8
B51 A51
8 GC_BE#1 C/-BE1 AD15 GAD15 8
B52 A52
B53 VDDQ VDDQ A53
B54 A54 VCC_AGP VCC_AGP +12V VCC3_SB VCC5 VCC3
B55 A55
GND GND + CT30 CB130 CB132 CB137 + CT39 + CT31
B56 A56
B57 A57 1000u 100p 0.1u 0.1u 1000u 1000u
8 GAD8 AD8 C/-BE0 GC_BE#0 8
B58 A58 CB139 CB125 CB207 CB128
GAD_STB0 VDDQ VDDQ GAD_STB#0 0.1u 0.1u 0.1u 0.1u
8 GAD_STB0 B59 A59 GAD_STB#0 8
B60 AD_STB0 -AD_STB0 A60 CB131 CB136 CB196 CB123
B61 A61 0.01u 0.1u 100p 0.1u
GND GND CB135 CB127 CB124
8 GAD5 B62 A62 GAD4 8
B63 AD5 AD4 A63 0.1u 0.1u 0.1u
B64 A64 CB138 CB129
B65 VDDQ VDDQ A65 1u 0.1u
AGPREF B66 A66 VREF_GC CB1
8 AGPREF VREF_CG VREF_GC 100p
AGP-D124-BN-B
VREF_GC:form + CT33
VREF_GC:form the graphics 1000u
the chipset controller to
to the AGP Slot Imax the chipset
graphics
controller VCC_AGP 8.0A
VCC3 6.0A
A A
VCC12 1.0A
VCC5 2.0A
Title Rev
INTA# M i c ro-Star MS-6507 0B
INTB# Document Number
AGP Slot
Last Revision Date:
Monday, September 03, 2001 Sheet 17 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PCI SLOT 1 (PCI VER: 2.2 COMPLY) PCI SLOT 2 (PCI VER: 2.2 COMPLY) PCI SLOT 3 (PCI VER: 2.2 COMPLY)
-12V +12V -12V +12V -12V +12V
PCI1 PCI2 PCI3
B1 A1 PTRST# B1 A1 PTRST# B1 A1 PTRST#
PTCK B2 -12V TRST# A2 PTCK B2 -12V TRST# A2 PTCK B2 -12V TRST# A2
B3 TCK +12V A3 PTMS B3 TCK +12V A3 PTMS B3 TCK +12V A3 PTMS
GND TMS PTDI GND TMS PTDI GND TMS PTDI
B4 A4 B4 A4 B4 A4
B5 TDO TDI A5 B5 TDO TDI A5 VCC5 B5 TDO TDI A5
VCC5 +5V +5V VCC5 VCC5 +5V +5V VCC5 +5V +5V VCC5 INTC#
B6 A6 B6 A6 INTB# B6 A6
+5V INTA# INTA# 9,17 +5V INTA# +5V INTA#
D B7 A7 INTC# B7 A7 INTD# INTD# B7 A7 INTA# D
9,17 INTB# INTB# INTC# INTC# 9 INTB# INTC# INTB# INTC#
B8 A8 INTA# B8 A8 R292 INTB# B8 A8
9 INTD# INTD# +5V INTD# +5V INTD# +5V
B9 A9 GNT#3 B9 A9 GNT#3 0 PGNT#3 B9 A9 GNT#3
REQ#3 B10 PRSNT#1 RESERVED A10 PREQ#3 R399 0 REQ#3 B10 PRSNT#1 RESERVED A10 R268 REQ#3 B10 PRSNT#1 RESERVED A10
REQ#5 RESERVED +5V(I/O) GNT#5 PREQ#5 R347 0 REQ#5 RESERVED +5V(I/O) GNT#5 0 PGNT#5 REQ#5 RESERVED +5V(I/O) GNT#5
B11 A11 B11 A11 B11 A11
VCC3 B12 PRSNT#2 RESERVED A12 VCC3 B12 PRSNT#2 RESERVED A12 VCC3 VCC3 B12 PRSNT#2 RESERVED A12 VCC3
B13 GND GND A13 VCC3_SB B13 GND GND A13 B13 GND GND A13
GND GND GND GND VCC3_SB GND GND VCC3_SB
SIRQ B14 A14 R237 0 SIRQ B14 A14 SIRQ B14 A14
RESERVED RESERVED 9,11 SERIRQ RESERVED RESERVED RESERVED RESERVED
B15 A15 B15 A15 PCIRST#2 B15 A15 PCIRST#2
GND RST# PCIRST#2 4,17 GND RST# GND RST#
B16 A16 B16 A16 B16 A16
4 PCICLK0 CLK +5V(I/O) 4 PCICLK1 CLK +5V(I/O) 4 PCICLK2 CLK +5V(I/O)
B17 A17 PGNT#0 9 B17 A17 PGNT#1 9 B17 A17 PGNT#2 9
B18 GND GNT# A18 B18 GND GNT# A18 B18 GND GNT# A18
9 PREQ#0 REQ# GND 9 PREQ#1 REQ# GND 9 PREQ#2 REQ# GND
B19 A19 B19 A19 PME# B19 A19 PME#
+5V(I/O) RESERVED PME# 9,17,25 +5V(I/O) RESERVED +5V(I/O) RESERVED
B20 A20 AD31 B20 A20 AD30 AD31 B20 A20 AD30
9,25 AD31 AD31 AD30 AD30 9,25 AD31 AD30 AD31 AD30
B21 A21 AD29 B21 A21 AD29 B21 A21
9,25 AD29 AD29 +3.3V AD29 +3.3V AD29 +3.3V
B22 A22 VCC3 B22 A22 AD28 B22 A22 AD28
GND AD28 AD28 9,25 GND AD28 GND AD28
B23 A23 AD27 B23 A23 AD26 AD27 B23 A23 AD26
B24 A24 AD25 B24 A24 AD25 B24 A24
9,25 AD25 AD25 GND AD25 GND AD25 GND
B25 A25 B25 A25 AD24 B25 A25 AD24
+3.3V AD24 AD24 9,25 +3.3V AD24 +3.3V AD24
B26 A26 C_BE#3 B26 A26 R346 100 AD17 C_BE#3 B26 A26 R373 100 AD18
9,25 C_BE#3 C/BE#3 IDSEL C/BE#3 IDSEL C/BE#3 IDSEL
B27 A27 R267 100 AD16 AD23 B27 A27 AD23 B27 A27
9,25 AD23 AD23 +3.3 AD23 +3.3 AD23 +3.3
B28 A28 B28 A28 AD22 B28 A28 AD22
B29 A29 AD21 B29 A29 AD20 AD21 B29 A29 AD20
B30 A30 AD19 B30 A30 AD19 B30 A30
B31 A31 B31 A31 AD18 B31 A31 AD18
+3.3V AD18 AD18 9,25 +3.3V AD18 +3.3V AD18
B32 A32 AD17 B32 A32 AD16 AD17 B32 A32 AD16
B33 A33 C_BE#2 B33 A33 C_BE#2 B33 A33
9,25 C_BE#2 C/BE#2 +3.3V C/BE#2 +3.3V C/BE#2 +3.3V
B34 A34 B34 A34 FRAME# B34 A34 FRAME#
GND FRAME# FRAME# 9,25 GND FRAME# GND FRAME#
C B35 A35 IRDY# B35 A35 IRDY# B35 A35 C
9,25 IRDY# IRDY# GND IRDY# GND IRDY# GND
B36 A36 B36 A36 TRDY# B36 A36 TRDY#
+3.3V TRDY# TRDY# 9,25 +3.3V TRDY# +3.3V TRDY#
B37 A37 DEVSEL# B37 A37 DEVSEL# B37 A37
9,25 DEVSEL# DEVSEL# GND DEVSEL# GND DEVSEL# GND
B38 A38 B38 A38 STOP# B38 A38 STOP#
GND STOP# STOP# 9,25 GND STOP# GND STOP#
B39 A39 PLOCK# B39 A39 PLOCK# B39 A39
9 PLOCK# LOCK# +3.3V LOCK# +3.3V LOCK# +3.3V
B40 A40 PERR# B40 A40 SM_LNK0 PERR# B40 A40 SM_LNK0
9,25 PERR# PERR# SDONE SM_LNK0 10 PERR# SDONE PERR# SDONE
B41 A41 B41 A41 SM_LNK1 B41 A41 SM_LNK1
+3.3V SBO# SM_LNK1 10 +3.3V SBO# +3.3V SBO#
B42 A42 SERR# B42 A42 SERR# B42 A42
9,25 SERR# SERR# GND SERR# GND SERR# GND
B43 A43 B43 A43 PAR B43 A43 PAR
+3.3V PAR PAR 9,25 +3.3V PAR +3.3V PAR
B44 A44 C_BE#1 B44 A44 AD15 C_BE#1 B44 A44 AD15
9,25 C_BE#1 C/BE#1 AD15 AD15 9,25 C/BE#1 AD15 C/BE#1 AD15
B45 A45 AD14 B45 A45 AD14 B45 A45
9,25 AD14 AD14 +3.3V AD14 +3.3V AD14 +3.3V
B46 A46 B46 A46 AD13 B46 A46 AD13
B47 A47 AD12 B47 A47 AD11 AD12 B47 A47 AD11
B48 A48 AD10 B48 A48 AD10 B48 A48
B49 A49 B49 A49 AD9 B49 A49 AD9
B52 A52 AD8 B52 A52 C_BE#0 AD8 B52 A52 C_BE#0
9,25 AD8 AD8 C/BE#0 C_BE#0 9,25 AD8 C/BE#0 AD8 C/BE#0
B53 A53 AD7 B53 A53 AD7 B53 A53
9,25 AD7 AD7 +3.3V AD7 +3.3V AD7 +3.3V
B54 A54 B54 A54 AD6 B54 A54 AD6
+3.3V AD6 AD6 9,25 +3.3V AD6 +3.3V AD6
B55 A55 AD5 B55 A55 AD4 AD5 B55 A55 AD4
B56 A56 AD3 B56 A56 AD3 B56 A56
B57 A57 B57 A57 AD2 B57 A57 AD2
B58 A58 AD1 B58 A58 AD0 AD1 B58 A58 AD0
B59 A59 B59 A59 B59 A59
ACK#64 B60 +5V(I/O) +5V(I/O) A60 REQ#64 ACK#64 B60 +5V(I/O) +5V(I/O) A60 REQ#64 ACK#64 B60 +5V(I/O) +5V(I/O) A60 REQ#64
ACK64# REQ64# ACK64# REQ64# ACK64# REQ64#
B61 A61 B61 A61 B61 A61
B62 +5V +5V A62 B62 +5V +5V A62 B62 +5V +5V A62
+5V +5V +5V +5V +5V +5V
B B
PCI-D120-WH-SN PCI-D120-WH-SN PCI-D120-WH-SN
IDSEL = AD16 IDSEL = AD17 IDSEL = AD18

MASTER = PREQ0 MASTER = PREQ1 MASTER = PREQ2
INTA# INTB# INTC#
RN20 PCI PULL-UP / DOWN RESISTORS

2.7K PCI SLOT DECOUPLING CAPACITORS
1 2 FRAME# RN18
VCC5
3 4 IRDY# 8.2K
5 6 TRDY# INTA# 1 2 VCC3
7 8 DEVSEL# INTD# 3 4 VCC5 VCC3 -12V +12V VCC3_SB
INTC# 5 6
RN21 PGNT#3 INTB# 7 8 + CT37 + CT38
9 PGNT#3
2.7K 1000u 1000u
1 2 STOP# PGNT#5 CB188 CB198 CB189 CB172 C182
9 PGNT#5
3 4 PLOCK# 0.1u 0.1u 0.1u
0.1u 0.1u
5 6 PERR# CB162 CB197
7 8 SERR# 0.1u 0.1u
CB187 CB174
A A
RN23 100p 0.1u
RN22 8.2K CB173 CB175
PREQ#0 1 5 REQ#64 R343 4.7K INTF# 1 2 100p 100p
1 5 VCC5 VCC5 10,25 INTF# VCC3
PREQ#2 2 ACK#64 R344 4.7K INTE# 3 4 CB176
2 10 INTE#
PREQ#1 3 INTG# 5 6 100p Title Rev
3 10 INTG#
PREQ#3 4 PTMS R265 4.7K INTH# 7 8
9
9
PREQ#3
PREQ#5 PREQ#5 6 4
6
PTDI R266 4.7K
10 INTH# M i c ro-Star MS-6507 0B
PREQ#4 7
9,25 PREQ#4 7
8 PTCK R264 4.7K Document Number
8 PTRST# R352 4.7K
9 10 PCI Slot 1 & 2 & 3
9 10
2.7K Last Revision Date:
8 7 6 5 4 3 2 1
5 4 3 2 1
5/22 update for EMI use, close ATX connector ATX CONNECTOR
YPC20 47u
11 1 VCC3
VCC3 3.3V 3.3V -5V
12 2
5/11 update
+
-12V -12V 3.3V CT16 CB70 CB67
CB66 CB68 CB64 CB62 X_33p 1u-0805 C556 R504 X_22
5/21 update 13 3 13 12
GND GND PWRGD_DDR 16
0.1u 33p 0.1u X_33p 0.1u
+
14 4
PSON 5V VCC5
CT15 VCC3 U20F
VCC5_SB X_10u 15 5 74LCX14MX-SOIC14
GND GND CB59 CB15 CB23
R350 4.7K R74 4.7K 0.1u 0.1u 33p VCC5_SB
D 16 6 D
VCC3_SB VCC5_SB GND 5V
14 R368
13 12 17 7 4.7K U20B U20C
11 PSON# GND GND
7 (VCC5_STR) 14 74LCX14MX-SOIC14 74LCX14MX-SOIC14
U21F 18 8 11 10 U21E R369 33 3 4 5 6 R383 22
-5V -5V POK PWR_GD 10
7407-SOIC14 7 7407-SOIC14 (VCC3_SB)
19 9
5V 5VSB VCC5_SB
CB10 39p C207
20 10 0.1u
VCC5 5V 12V +12V
POWER
+
4 CLK_RST#
CB53 CT12 CB26 C38 CB30 CB28 CT6 CB16
0.1u 33p X_1000p X_33p 0.1u 39p R348 X_4.7K 9 8 R389 X_4.7K Q45
VCC3 X_NPN-3904LT1-S-SOT23
47u D3 10u
U20D
VCC5 VCC5_SB FP_RST# 74LCX14MX-SOIC14
1N5817-S-DO-241AC
VCC3
Brookdale FRONT PANEL-M For EMI.

INTEL FRONT PANNEL
PIN HEADER. 10 EXTSMI#
EXTSMI# 1
1
C700 C701
D17 1N4148-S-LL34 2 0.1u 0.1u
4 PD_LED 2
D18 1N4148-S-LL34
4 SD_LED
F_P2 JGS1
C C180 470p IDE_LED HDD+ 1 2 SUS_LED D1x2 C
VCC5 HDD+ PLED1
IDE_LED 3 4 PLED2
F_P1 HDD- PLED2
R433 1 10 5 6 PWRSW+
GNDK KEYLOCK KBLOCK# 11 GNDR PWSW+
330 FP_RST# 7 PWRSW- V_DIMM
2 NC NC 11 8
RESET PWSW-
HDD+ 3 12 IDE_LED 9 CUT 10
HDD+ HDD- RSVD V_DIMM
4 13 D2x5-1:1-BK R394
GNDL SPEAKER R341 330
RESISTOR
PLED2 5 14 SPK 0
SLED2 BUZ+ SHORT
R395
SUS_LED 6 15 SPK2 FOR PB IR2 330
PLED1 BUZ- CB192 1
NA CUT 2
PWRSW+ 7 16 0.1u VCC5
PWSW+ VCCSPK VCC5 3 4 PLED2
PWRSW- 8 17 FP_RST# +5V GND 1
PWSW- RESET 2
5 6
18 IRTX IRRX R393 1K Q46 3
9 NC GNDR 11 SUS_LED NPN-3904LT1-S-SOT23 JGL1
R432 D2x9-3:3.17.4-BK D2x3-1:2-BK D1x3-BK
1K
IRTX
IRRX
VCC5 VCC5_STR
B B
R426 R425
X_4.7K X_330
X_0 SUS_LED
R422
R423
11 PWR_LED X_4.7K
Q49
X_NPN-3904LT1-S-SOT23
R332 10K
POWER BUTTON VCC5_SB
SPEAKER
A A
PWRSW+ R353 22
VCC5
R328 220
R335 220 D16 1N4148-S-LL34 U20E
11 ALARM SPK2 74LCX14MX-SOIC14 Title Rev
C178 0.1u 11 10
10 SPKR R319 2.2K Q37 SPK
PWRBTIN# 11 M i c ro-Star MS-6507 0B
NPN-3904LT1-S-SOT23
C183 Document Number
BZ1
1u Front Panel & Connector
BUZZER-SAT1205-85dB-D
Last Revision Date:
5 4 3 2 1
E D C B A
BACK PANEL USB CONNECTOR FOR USB PORT 0,1 +12V

CPU FAN
D2 1N4148-S-LL34
LAN_USB1A R23 4.7K R35 27K

RN27 CPU_FAN 11
SVCC0 5 21 VCC5
8 7 FB9 120-1 SBD0- 6 22 R57 2.2K
10 USBP0+ 6 5 FB10 120-1 SBD0+ 7 23 R30
10 USBP0-
4 3 GNDA 8 UP 24 Q10 10K
2 1 SVCC0 1 25 SI2303DS-S-SOT23
FB7 120-1 SBD1- 2 26 R705 R56 1K
10 USBP1-
4 FB8 120-1 SBD1+ 3 27 4
10 USBP1+
D
4.7K 3
27 GNDA 4 DOWN 28 CFAN R59 0 C_FAN1
1
3
5
7
2 D1x3-WH-SN
2
4
6
8
RJ45+USB+LEDx2-D20-BK-F02 1
RN30 CN702 R54 510 G Q6 + C28
11 CPU_CTRL 47u
15K X_22p 2N7002-S-SOT23
2
4
6
8
S
1
3
5
7
11 CPUFAN
NEAR CHIPSET LESS THAN 1 INCH NEAR USB CONNECTOR
SYSTEM FAN
FRONT PANEL USB CONNECTOR FOR USB PORT 2,3
+12V
D15 1N4148-S-LL34
R312 4.7K R298 27K

RN26 SYS_FAN 11
VCC5
2 1 FB23 120-1 R313 2.2K
10,12 USBP3+
3 4 3 FB24 120-1 R278 3
10,12 USBP3- 6 5 10K
8 7 Q35
FB26 120-1 SBD2- SBD3- R704 R299 1K SI2303DS-S-SOT23
10 USBP2+ FB25 120-1 SBD2+ SBD3+
D
10 USBP2- 4.7K 3
27 SFAN R258 0 S_FAN1
2
2
4
6
8
1
3
5
7
D1x3-WH-SN
RN29 1
15K CN701 R262 510 G Q34 + C155
11 SYS_CTRL
X_22p 2N7002-S-SOT23 47u
1
3
5
7
2
4
6
8
S
NEAR USB 11 SYSFAN
CONNECTOR
NEAR CHIPSET LESS THAN 1 INCH
USB1
SVCC1 1 2
SBD2- 3 4
SBD2+ 5 6 SBD3+
7 8 SBD3-
9 10 SVCC1
D2x5-BK
POWER CIRCUIT FOR USB PORT 0,1 INTEL USB FRONT PANNEL PIN
HEADER
2 2
X_COPPER
CP3
FS2
1.1A-S USB3
FB6 X_120 SVCC0 1 2 SVCC1
VCC5_STR SBD3- 3 4 SBD2-
+
C2 R55 C15 CT2 R36 SBD3+ 5 6 SBD2+

470p 470K 1u 1000u 47K 7 8
9 10 OC#1
10 OC#0
C25 R330 D2x5-1:1-BK
0.1u 560K
NEAR USB CONNECTOR
POWER CIRCUIT FOR USB PORT 2, 3
X_COPPER
CP5
1 1
FS4
1.1A-S
FB21 X_120 SVCC1
VCC5_STR
+
C214 R380 C228 CT43 Title Rev

470p 470K 1u 1000u
10,12 OC#1
C196 R381 R427 Document Number
0.1u 560K 47K USB & FAN Connectors
Last Revision Date:
NEAR USB CONNECTOR Wednesday, August 29, 2001 Sheet 20 of 36
E D C B A
-5VR
C709
U16 X_1u
12 14 LINE_L R755 X_0
13 X0 X U701A
4
X1 15 LINE_R X_TI-TL072CDR-SOIC8
Y LINE_R 13,14
LIN_IN_R 1 R291 2 INR 2 3
13 LIN_IN_R Y0 + R728
1 R294 2 0 SROR 1 4 LINE_L C710 R732 1 SROR
Y1 Z LINE_L 13,14
47K SROUT_R 2
13 SROUT_R - X_33
LIN_IN_L 1 R310 2 INL 5 16
13 LIN_IN_L Z0 VDD +5VR
1 R320 2 0 SROL 3 X_1u X_33K
Z1
8
47K C713
6
11 INH R753 X_0
10 A 8 X_47p
9 B VSS 7 INL R726 0 LINE_L +5VR
C VEE -5VR R730
X_FC-CD4053BCM-SOIC16
X_47K
INR R725 0 LINE_R
6CH_CTRL -5VR
10 6CH_CTRL
R754 X_0
LO=MIC,HI=4CHANNEL R215 U701B
4
1 2 X_TI-TL072CDR-SOIC8
VCC3_SB
5
+ R729
C711 R731 7 SROL
X_4.7K SROUT_L 6
13 SROUT_L - X_33
X_1u X_33K
8
LINE_R R756 X_0
R727
C708 X_47K
C712
X_1u
+5VR X_47p
-12V
R382
X_2.7K
-5VR
DLED
R379
X_2.2K
VCC5 VCC5
8
6
4
2
8
6
4
2
RN9 RN7
330
330
7
5
3
1
7
5
3
1
D8
2 1 LED2
11 DLED1
11 DLED2
11 DLED3
4 3 LED4
11 DLED4
6 5 LED6
8
6
4
2
RN10
10K 8 7 LED8
7
5
3
1
GN_RD-D-5V-CR-A
Q25 Q24 Q23 Q22

NPN-3904LT1-S-SOT23 NPN-3904LT1-S-SOT23 NPN-3904LT1-S-SOT23 NPN-3904LT1-S-SOT23
LEDT1
Title Rev
Micro-Star MS-6507 0B
LEDT2 Document Number
LEDT3
LEDT4
D-LED & 4 CHANNEL CONTROL
Last Revision Date:
Thursday, August 09,2001 Sheet 21 of 36
8 7 6 5 4 3 2 1
+12V
POWER TRANSLATOR
VCC5_SB VCC3 Power S0 S3 S5
VCC3_SB Main Standby Standby 1.8V STANDBY POWER TRANSLATOR
C26 VCC5_STR Main Standby 0V
VCC5_SB 0.1u C7 VCC_DIMM Main Standby 0V
4.7u-0805 (40mils trace / 20 mils space)
U3
14
1
Q1 N CHANNEL
1 DIMMCTR
12V
5VSB
B VCC3_SB VR3 VCC1_8SB
2 4 LT1084S-SOT89-0.8A
C C 3 15 Q8 V_DIMM 3 2
3V3DLSB DRV2 NPN-KSH3055-TO252 VIN VOUT
D 3 D
E 16 C137 R252 C144 C147 CT35
VSEN2 0.1u 432 100p 0.1u 47u
NPN-NZT651-S-SOT223 1
VCC5_SB ADJ
4
VCC3_SB 3V3DL C159 R259
X_0.1u 200
9
S
FAULT/SEL
Q4
R378 4.7K R20
NDS352AP-S-SOT23
11 5VCTR G
1K 5VDLSB
R25 4.7K
P CHANNEL
D
6 10
10,11 SLP_S3# S3 DLA
7 VCC5_STR
10 SLP_S5# S5
R28 0 5
2 EN5VDL 12 POWER CONSUMPTION
GND
R29 X_0 13 EN3VDL 5VDL
VCC5_SB SS
C17 Q14 VCCP VCC_AGP VCC1_8 VCC3_DIMM VCC3 VCC5 VCC5_SB +12V -12V
8
0.1u S-TO252-55V CPU 69.0A 0 0 0 0 0 0 NOTE4 0
PMCH 2.4A NOTE1 0.2A 2.0A 0 0 0 0 0
Q2 INTS-HIP6501A-SOIC16 ICH2 0 0 NOTE3 0 NOTE3 0 NOTE3 0 0
CY28324 0 0 0 0 0 0 0 0 0
S-TO252-55V DLA AD1885 0 0 0 0 0 0 0 0
VCC5 FWH -SST 0 0 0 0 0
W83627HF 0 0 0 0 0 0 0 0
C HIP6301 0 0 0 0 0 0 0 C
VCC3 HIP6602A 0 0 0 0 0 0
HIP6601A 0 0 0 0 0 0 0 0 0
SC1547 0 0 0 0 0 0 0
DIMM 0 0 0 NOTE2 0 NOTE2 0 0
VCC5
VCC3
AGP 4X 1.5V POWER TRANSLATOR AGP
PCI
0
0
8.0A
0
0
0
0
0
6.0A 2.0A
0
?
0
1.0A
0
0
0
USB 0 0 0 0 0
USB HUB 0 0 0 0 0 0 0 0 0
+12V FAN 0 0 0 0 0 0 0 0 0
R107 TTL 0 0 0 0 0 0 0 0 0
AMPLIFIER 0 0 0 0 0 0 0
D
100 U9A OTHER 0 0 0 0 0 0

4
Q29
3
+ 1 G S-TO252-55V NOTE1 --- MCH
R106 2 VCC_AGP = VCC1_5 (1.5A) + VCC_AGP (0.37A)
2
1K -
VR2
1 LM324M NOTE2 --- DIMM

LCSK-1,SOT23-3L-100mA
11
S0 STATE --- 2.0A * 3 = 6.0A ---> VCC3

S1/S3 STATE --- 200mA * 3 = 600mA ---> VCC3_SB
R207 VCC3_SB --> 600mA*3.3V/5V=396mA --> VCC5_SB
3
NOTE3 --- ICH2

Power S0 S1 S3/S4/S5
R208 1K 1.8V 300mA 100mA N/A
C73 1K 1.8V_LAN 36mA 28mA N/A
X_1000p VCC1_8SB 45mA 30mA 7mA
+12V VCC3 410mA 5mA N/A
B B
VCC3+562ET 230mA 210mA N/A
VCC3_SB 25mA 0.6mA N/A
D
U9B
4
Q30 VCC3_SB =
5 VCC1_8SB =
+ SUD40N03-S-TO252
7 G VCC5_SB = VCC3_SB + VCC1_8SB
6
-
S
LM324M
11
R174 REGULATORS OUTPUT DECOUPLING CAPACITORS

VCC_AGP
1.8V/3.3V SEQUENCE CIRCUIT
215 VCC1_8 VCC5_SB V_DIMM VCC5_STR VCC3_SB
R173
1K + CT32 + CT20 + CT4 + CT7 + CT41
+12V C617 1000u 1000u 1000u 1000u 1000u
10u-1206 CB155 CB8 CB77 CB18 CB163
VCC3 VCC3 100p 0.1u 0.1u 0.1u 0.1u
CB87 CB33 CB36 CB2 CB7
C78 10p 1u 1u 0.1u 1u
0.1u C616 CB19 CB6
10u-1206 Q21 0.1u 0.1u
PNP-3906LT1-S-SOT23 CB5
U9C R123 200 Ic=200mA VCC3 VCC_AGP 0.1u
4
Q31 Vebo=5V
A A
10 R132 Vceo=40V CB91 + CT29
+ S-TO252-55V
8 200 0.1u 1000u
9 CB63
- 1u
LM324M R134 Q26 Title Rev
11
470 NPN-3904LT1-S-SOT23
VCC1_8 VCC5 M i c ro-Star MS-6507 0B
R209
CB159 Document Number
VCC1_8 0.1u Voltage Regulator
100
Last Revision Date:
R210 220 Wednesday, August 29, 2001 Sheet 22 of 36
8 7 6 5 4 3 2 1
5 4 3 2 1
CHOK4 1.1u
+12V
C40
CB92 CB88 C84 CT19 CT13 CT24 CT27 C83 C85 1u-0805
0.1u 33p 33p 1500u 1500u X_1500u 1500u 2.2u-0805 2.2u-0805
D
R93 U8A Q20
HIP12V 14 12 R102 0_0805 G IPB15N03L-S-TO263
+12V VCC U_G1 11
D VCC5 10_0805 BOOT1 D
S
CB71 C63
1u-0805 13 0.1u CHOK3 1.1u
PHASE1 VCCP
3
D
R135 GND C62
0 X_1000p CT3 CT18 CT23 CT1
U11 Q19 1500u 1500u 1500u 1500u
VID4 1 20 VCC 1 4 R111 0_0805 G FDB6670AL-S-TO263
5,11 VID[0..4] VID4 VCC PWM1 L_G1
VID3 2
VID2 3 VID3 C92 MOSDVR-HIP6602A-SO14
VID2
S
VID1 4 9 1u-0805
VID0 5 VID1 GND
VID0 15
PWM1 16 R116 3K
R124 X_10K R127 X_0 ISEN1
19
VCC3 PGOOD
C86 X_100p C61
10 VRM_GD 14 1u-0805
DIS PWM2 R114 3K
8 13
D
R137 154K FS/DIS ISEN2
6 11 U8B Q16
COMP PWM3 12 R112 3K HIP12V 5 9 R73 0_0805 G IPB15N03L-S-TO263
C91 R131 ISEN3 PVCC U_G2 10
X_15p 15K BOOT2
S
18 VCC CB72 C66
R126 200K C89 PWM4 17 1u-0805 8 0.1u CHOK2 1.1u
VCC5 ISEN4 PHASE2
5600p 6
D
R117 X_0 PGND C51
5 VCCPS- 7 10
FB VSEN X_1000p
+
C C
INTS-HIP6301-SOIC20 Q17 CT14 CT17 CT8
R125 R115 R121 2 7 R84 0_0805 G FDB6670AL-S-TO263 2200u 2200u 2200u
X_15K 1.37K X_0 PWM2 L_G2
MOSDVR-HIP6602A-SO14
S
C82
X_5600p
R113 X_0 R110 0

5 VCCPS+ VCCP
+12V C39
VID4 VID3 VID2 VID1 VID0 VDC(V) VID4 VID3 VID2 VID1 VID0 VDC(V) 1u-0805
D
1 1 1 1 0 1.100 0 1 1 1 0 1.500 R3
10_0805
1 1 1 0 1 1.125 0 1 1 0 1 1.525 U1 Q15
6 1 R68 0_0805 G IPB15N03L-S-TO263
VCC U_G
1 1 1 0 0 1.150 0 1 1 0 0 1.550 7 2
PVCC BOOT
1 1 0 1 1 1.175 0 1 0 1 1 1.575
S
C16
CB9 8 0.1u CHOK1 1.1u
PHASE
1 1 0 1 0 1.200 0 1 0 1 0 1.600 1u-0805
D
4 C19
GND
1 1 0 0 1 1.225 0 1 0 0 1 1.625 X_1000p
+
Q13 CT5 CT25 CT26
1 1 0 0 0 1.250 0 1 0 0 0 1.650 3 5 R52 0_0805 G FDB6670AL-S-TO263 2200u 2200u 2200u
PWM L_G
1 0 1 1 1 1.275 0 0 1 1 1 1.675 MOSDVR-INTS-HIP6601A-SOIC8
S
B B
1 0 1 1 0 1.300 0 0 1 1 0 1.700
1 0 1 0 1 1.325 0 0 1 0 1 1.725
1 0 1 0 0 1.350 0 0 1 0 0 1.750
1 0 0 1 1 1.375 0 0 0 1 1 1.775
1 0 0 1 0 1.400 0 0 0 1 0 1.800
1 0 0 0 1 1.425 0 0 0 0 1 1.825
1 0 0 0 0 1.450 0 0 0 0 0 1.850
ATX12V POWER CONNECTOR
0 1 1 1 1 1.475 1 1 1 1 1 OFF
H I P 6 3 0 1 V DON'T NEED PULL HIGH PWM GOOD
H I P 6 3 01 NEED PULL HIGH
VID PULL-UP RESISTORS +12V JPW1
3 1
VCC5_SB 12V GND
DIS
4 2
12V GND
R740 VCC3_SB +12V VCC3 D2x2
X_0 C96 C94
Q27 0.01u 33p
A A
Q704 2N7002-S-SOT23
15 VID_GD
PNP-3906LT1-S-SOT23
R741 R742
R739 X_0 Q707 R717 X_0 330-1206 X_0
6,15 VCC_VID
NPN-3904LT1-S-SOT23
Title Rev
VID0 1 2 Document Number
VID1 3 4 D700 VRM 9.2
VID2 5 6 RN8 RLZ3.3B-S-LL34
VID3 7 8 1K Last Revision Date:
VID4 R136 1K Monday, September 03, 2001 Sheet 23 of 36
5 4 3 2 1
8 7 6 5 4 3 2 1
5/22 update
SERIAL PORT 1 MODEM RING BLOCK LAN WAKEUP BLOCK
VCC5
V+ D4 1N4148-S-LL34 +12V DCDA 2 1

U6 DSRA 4 3 CN3 VCC3_SB
20 1 C47 0.1u RXDA 6 5 220p
C45 0.1u DCDA VCC V+ DTRA
2 19 DCDA# 11 8 7 RING# 10
DSRA 3 RIN1 ROUT1 18 R419
RIN2 ROUT2 DSRA# 11
RXDA 4 17 RTSA 2 1 10K
RIN3 ROUT3 SINA 11
D CTSA 7 14 CTSA 4 3 CN4 D
RIN4 ROUT4 CTSA# 11
RIA 9 12 TXDA 6 5 220p
RIN5 ROUT5 RIA# 11 JWOL1 LAN_WAKE 10
RIA 8 7
16 5 DTRA VCC5_SB Q47
11 DTRA# DIN1 DOUT1 1 VCC5_SB
15 6 RTSA PNP-3906LT1-S-SOT23
11 RTSA# DIN2 DOUT2 2
13 8 TXDA 5 R409 330K Ic=200mA R442 4.7K Q55
11 SOUTA DIN3 DOUT3 3
11 10 CN7B 4 Vebo=5V NPN-3904LT1-S-SOT23
GND V- DCDA DSRA R392 10K Vceo=40V D1x3-WH-HSNO
26 31 3
TI-GD75232-SSOP20 V- D5 1N4148-S-LL34 RXDA 27 32 RTSA 2 R429
-12V TXDA 28 33 CTSA 1 10K
DTRA 29 34 RIA C216 LAN WAKEUP
C50 0.1u 30 JMDM1 0.1u HEADER
D1x5-BK
LPT-D25-BR-I
VCC5 SERIAL PORT 2

PS2 KEYBOARD & MOUSE CONNECTOR
C74 0.1u DCDB 2 1
U10 DSRB 4 3 CN11
C75 0.1u 20 1 V+ RXDB 6 5 220p VCC_MS VCC_MS X_COPPER
DCDB VCC V+ DTRB
2 19 8 7 CP1
DCDB# 11
7
5
3
1
DSRB 3 RIN1 ROUT1 18 R21 R22
RIN2 ROUT2 DSRB# 11
RXDB 4 17 RTSB 2 1 RN1 47K 47K
RIN3 ROUT3 SINB 11
CTSB 7 14 CTSB 4 3 CN12 4.7K
RIN4 ROUT4 CTSB# 11
C RIB 9 12 TXDB 6 5 220p C
RIN5 ROUT5 RIB# 11
8
6
4
2
RIB 8 7 KBMS1 FB1
16 5 DTRB FB3 120-1 MS_DT 7 10 PSPWR
11 DTRB# DIN1 DOUT1 11 MSDATA VCC5_STR
15 6 RTSB 8 X_600
11 RTSB# DIN2 DOUT2
13 8 TXDB CN7C FB4 120-1 MS_CK 11 C1 C5 C4 FS1
11 SOUTB DIN3 DOUT3 11 MSCLK
11 10 DCDB 35 40 DSRB 12 9 33p 0.1u 0.1u 1.1A-S
GND V- RXDB RTSB MS GNDA POLY SWITCH
36 41
TI-GD75232-SSOP20 TXDB 37 42 CTSB FB2 120-1 KB_DT 1 4
11 KBDATA
DTRB 38 43 RIB 2
C80 0.1u V- 39 FB5 120-1 KB_CK 5
11 KBCLK
6 3 VCC_MS
LPT-D25-BR-I KB
MINIDINx2-D12-ML
1
3
5
7
C3
CN700 0.1u
X_22p
2
4
6
8
D6 1N4148-S-LL34 LP_INIT# 1 2 PARALLAL PORT
VCC5 LP_SLIN#
11 LP_D[0..7] 3 4
LP_D1 5 6 CN8
LP_D6 1 5 LP_D2 7 8 220p
LP_D5 1 5
2
LP_D4 3 2
LP_D3 4 3 RN3 LP_STB# 1 2
LP_PE 6 4 2.2K LP_AFD# 3 4
11 LP_PE 6
LP_BUSY 7 LP_D0 5 6 CN9 CN7A
11 LP_BUSY 7
LP_ACK# 8 LP_ERR# 7 8 220p LP_STB# 1 14 LP_AFD#
11 LP_ACK# 8
LP_D7 9 10 LP_D0 2 15 LP_ERR#
B 9 10 LP_D1 LP_INIT# B
3 16
LP_D3 1 2 LP_D2 4 17 LP_SLIN#
LP_ERR# 1 5 LP_D4 3 4 LP_D3 5 18
11 LP_ERR# 1 5
LP_D0 2 LP_D5 5 6 CN6 LP_D4 6 19
LP_AFD# 3 2 LP_D6 7 8 220p LP_D5 7 20
11 LP_AFD# 3
LP_STB# 4 RN4 LP_D6 8 21
11 LP_STB# 4
LP_D2 6 2.2K LP_D7 9 22
LP_D1 6 LP_D7 LP_ACK#
7 1 2 10 23
LP_SLIN# 8 7 LP_ACK# 3 4 LP_BUSY 11 24
11 LP_SLIN# 8
LP_INIT# 9 10 LP_BUSY 5 6 CN5 LP_PE 12 25
11 LP_INIT# 9 10 LP_PE 7 8 220p LP_SLCT 13
LP_SLCT R75 2.2K LP_SLCT C55 33p LPT-D25-BR-I

11 LP_SLCT
FLOPPY CONNECTOR FDD1
1 2 DRVDEN0 11
3 4
6 DRVDEN1 11
7 8 INDEX# INDEX# 11
9 10 MOT_A# 11
11 12 DRV_B# 11
13 14
A DRV_A# 11 A
15 16 MOT_B# 11
17 18 DIR# 11
19 20 STEP# 11
21 22 WT_DT# 11
23 24 Title Rev
WT_EN# 11
25 26 TRACK0#
27 28 WP#
TRACK0#
WP#
11
11
29 30 RDATA# RDATA# 11
31 32 Document Number
HEAD# 11
33 34 DSKCHG#
DSKCHG# 11 IO Connector
Last Revision Date:
D2x17-1:31-BK Wednesday, August 29, 2001 Sheet 24 of 36
8 7 6 5 4 3 2 1
A B C D E
REALTEK 8100(L) LAN

Y1
VDD33
C119 C120
27p 25M-18pf-HC49S-D VDD33
27p VDD33
RXIN-
RXIN+ VCTRL Q33
TXD- D10
TXD+ PME# DC4 DC8 DC9 DC11 DC3 DC6
4 PME# 9,17,18 X_1N4148-S-LL34 4
VCTRL X_NPN-3904LT1-S-SOT23
R171 1K 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u
VCC3 (ISOLATEB)
R177 15K VDD25
1 2 VDD25
FB17 1 2 FB16 VDD33
VDD25 X_300_0805 C123 C124 C117 C121 300_0805 EC1 + C135
C122 C132 C118 C134 4.7u-0805 0.1u 0.1u 1u X_10u X_0.1u GND
X_1u X_0.1u X_0.1u X_4.7u-0805
R170
1.78K GND GND
D9 X_1N4148-S-LL34
SPDLED VDD25
VCTRL
VDD25
PME#
GND
GND
GND
GND
D11 1N4148-S-LL34-75V VDD25
ISOB
ACTLED
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
U14 DC7 DC10 DC2 DC5 DC1
X1
X2
PMEB
ISOLATEB
RTSET
AVDD
TXD+
AVDD
RXIN+
AVDD
AVDD25
TXD-
RXIN-
AVDD25
AVDD25
LED0
LED1
LED2
RTT2
RTT3
VCTRL
VDD25
GND
GND
GND
GND
NC
NC
NC
NC
X_0.1u X_0.1u X_0.1u X_0.1u X_0.1u
R206 5.6K VDD33
81 50 AUX U15
10,18 INTF# INTAB AUX VCC3_SB 1
LANRST 82 49 LEECS 8
83 RSTB EECS 48 EESK 2 C S VCC 7
4 PCICLK3 CLK EESK SK NC
84 47 EEDI 3 6 BC1
9 PGNT#4 85 GNTB EEDI 46 4 DI NC 5
EEDO GND GND
9,18 PREQ#4 AD31 86 REQB EEDO 45 AD0 DO GND 0.1u
3 AD30 87 AD31 AD0 44 AD1 ATL-128x8-0.5us-SOIC8 3
GND 88 AD30 AD1 43 GND DE-COUPLE CAPS OF RTL8100 MUST BE
AD29 89 GND GND 42 AD2 GND
VDD33 90 AD29 AD2 41 AD3 PLACED AS CLOSE TO CHIP AS POSSIBLE.
VDD AD3
AD28 91
AD28 VDD25
40 VDD25 The 9346 EEPROM should be
AD27 92 39 VDD33
AD26 93 AD27 VDD 38 AD4 functional when powered by
AD26 AD4
AD25 94
AD25 AD5
37 AD5 3.3V。
AD24 95 36 AD6
VDD25 96 AD24 AD6 35 VDD25
VDD33 97 VDD25 VDD25 34 VDD33
C_BE#3 98 VDD VDD 33 AD7
9,18 C_BE#3 CBE3B AD7
AD22 99 32 C_BE#0
100 IDSEL CBE0B 31 C_BE#0 9,18 D13
AD23 GND 1N5817-S-DO-241AC
DEVSELB
AD23 GND
FRAMEB
R285
PERRB
SERRB
TRDYB
CBE2B
CBE1B
VDD25
STOPB
VCC3
IRDYB
100 VDD33
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
GND
GND
VDD
VDD
AD9
AD8
D12
PAR
1N5817-S-DO-241AC
1 2
VCC3_SB
REK-RTL8100 FB19
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
300_0805
1
2
3
4
5
6
7
8
9
+ C138 C139
EC2
10u 0.1u 0.1u
VDD33
VDD25
VDD33
AD20
AD17
AD14
AD22
AD21
AD19
AD18
AD16
AD15
AD13
AD12
AD11
AD10
GND
GND
AD9
AD8
GND GND
AD[31..0] 9,18
2 2
C_BE#2 C_BE#1
9,18 C_BE#2 C_BE#1 9,18
FRAME# PAR
9,18 FRAME# PAR 9,18
IRDY# SERR#
9,18 IRDY# SERR# 9,18
TRDY# PERR#
9,18 TRDY# DEVSEL# STOP# PERR# 9,18
9,18 DEVSEL# STOP# 9,18 4,7,11,15 PCIRST#1 1
LANRST
2
C18 X_0.1u 3
JLAN1
D1x3-BK
C46
VDD33
LAN_USB1B
0.1u R60 17 AMBER+
VDD33 300 ACTLED 18 AMBER-
U5
2 15 9 NC
TXD+ 1 TDC CMT 16 TX+ 13 NC
TXD- 3 TD+ TX+ 14 TX- RX- 10 RDN
TD- TX- 14 NC
RXIN+ 6 11 RX+ 11 NC JLAN1/2 LAN SELECT
RXIN- 8 RD+ RX+ 9 RX- RX+ 15 RDP
7 RD- RX- 10 TX- 12 TDN
RDC RXC
C113 TX+ 16 TDP 1-2 ENABLED
C112 R71 19 GREEN+
C41 R70 R202 R203 X_10p VDD33 300 SPDLED 20 GREEN-
X_10p C43 10:100 2-3 DISABLED
X_10p 0.1u
49.9 49.9 49.9 TS6121C RJ45+USB+LEDx2-D20-BK-F02
8
6
4
2
7
5
3
1
1 L05-0100020-B09 1
CN2 RN2 C37 X_0.1u
C109 X_10p C29 X_0.1u
75
R69 C44
0.1u
49.9 X_10p GND FB11 30 Title Rev
7
5
3
1
8
6
4
2
1 2 GND
LANGND
C42 Document Number
Realtek RTL8100 LAN
0.1u
Last Revision Date:
A B C D E
5 4 3 2 1
R505
DDRWEA# 0 WEA#
16,27 DDRWEA# WEA# 8
R506
DDRCASA# 0 CASA# R508
16,27 DDRCASA# CASA# 8
R507 DDRMAA0 R509 DDRMAA0
DDRRASA# 0 RASA# DDRMAA1 R510 DDRMAA1
16,27 DDRRASA# RASA# 8
DDRMAA2 R511 X_0 DDRMAA2
DDRMAA3 X_0 DDRMAA3
X_0
X_0
D D
DDRMD0 RN541 1 2 33 MD0 R512
DDRMD4 3 4 MD4 DDRMAA4 R513 DDRMAA4
DDRMD5 5 6 MD5 DDRMAA5 R514 DDRMAA5 MECCRS2 RN516 1 2 33 CB2
DDRMD1 7 8 MD1 DDRMAA6 R515 X_0 DDRMAA6 MECCRS6 3 4 CB6
DDRMD6 RN500 1 2 33 MD6 DDRMAA7 X_0 DDRMAA7 MECCRS3 5 6 CB3
DDRMD2 3 4 MD2 X_0 MECCRS7 7 8 CB7
DDRMD7 5 6 MD7 X_0 MECCRS4 RN517 1 2 33 CB4
DDRMD3 7 8 MD3 MECCRS5 3 4 CB5
DDRMD8 RN501 1 2 33 MD8 R516 MECCRS0 5 6 CB0
DDRMD12 3 4 MD12 DDRMAA8 R517 DDRMAA8 MECCRS1 7 8 CB1
DDRMD9 5 6 MD9 DDRMAA9 R518 DDRMAA9
DDRMD13 7 8 MD13 DDRMAA10 R519 X_0 DDRMAA10 CB[0..7]
CB[0..7] 8
DDRMD14 RN502 1 2 33 MD14 DDRMAA11 X_0 DDRMAA11
DDRMD15 3 4 MD15 X_0
DDRMD10 5 6 MD10 R520 X_0 MECCRS[0..7]
MECCRS[0..7] 16,27
DDRMD11 7 8 MD11 DDRMAA12 DDRMAA12
DDRMD20 RN503 1 2 33 MD20
DDRMD16 3 4 MD16 X_0
DDRMD17 5 6 MD17
DDRMD21 7 8 MD21 DDRMAA[0..12]
DDRMD18 RN504 1 2 33 MD18 R523
DDRMD22 3 4 MD22 DDRMAA[0..12] MDQS#0 R524 SDQS0
DDRMAA[0..12] 8,16,27
DDRMD19 5 6 MD19 MDQS#1 R525 SDQS1
DDRMD23 7 8 MD23 MDQS#2 R526 33 SDQS2
DDRMD24 RN505 1 2 33 MD24 MDQS#3 R527 33 SDQS3
DDRMD29 7 8 MD29 MDQS#6 33 SDQS6
DDRMD26 RN506 1 2 33 MD26 DDRCS#0 RN515 1 2 X_0
DDRCS#0 MDQS#7 33 SDQS7
C DDRMD30 3 4 MD30 DDRCS#2 3 4 DDRCS#2 R530 33 SDQS8 C
DDRMD27 5 6 MD27 DDRCS#3 5 6 DDRCS#3 33 SDQS[0..8]
SDQS[0..8] 8
DDRMD31 7 8 MD31 DDRCS#1 7 8 DDRCS#1
DDRMD32 RN507 1 2 33 MD32
DDRMD36 3 4 MD36 R531
DDRMD37 5 6 MD37 MDQS#8
DDRMD33 7 8 MD33 DDRCS#[0..3]
DDRMD34 RN508 1 2 33 MD34 33
DDRMD38 3 4 MD38 MDQS#[0..8]
MDQS#[0..8] 16,27
DDRMD39 5 6 MD39 DDRCS#[0..3]
DDRCS#[0..3] 8,16,27
DDRMD35 7 8 MD35
DDRMD44 RN509 1 2 33 MD44
DDRMD40 3 4 MD40
DDRMD45 5 6 MD45
DDRMD41 7 8 MD41
DDRMD42 RN510 1 2 33 MD42
DDRMD46 3 4 MD46
DDRMD43 5 6 MD43 R521 CLOSE TO DIMM
DDRMD47 7 8 MD47 DDRBS0 DDRBS0 C504 C510
DDRMD54 RN511 1 2 33 MD54 8,16,27 DDRBS0 R522 DCLK0 DCLK#0
DCLK0 8,16 DCLK#0 8,16
DDRMD50 3 4 MD50 DDRBS1 X_0 DDRBS1
DDRMD55 5 6 MD55 8,16,27 DDRBS1 X_10p X_10p
DDRMD51 7 8 MD51 X_0 C505 C511
DDRMD48 RN512 1 2 33 MD48 DCLK1 DCLK#1
DCLK1 8,16 DCLK#1 8,16
DDRMD49 3 4 MD49
DDRMD52 5 6 MD52 X_10p X_10p
DDRMD53 7 8 MD53 C506 C512
DCLK2 8,16 DCLK#2 8,16
DDRMD58 3 4 MD58
DDRMD63 5 6 MD63 X_10p X_10p
B B
DDRMD59 7 8 MD59 C507 C513
DCLK3 8,16 DCLK#3 8,16
DDRMD61 3 4 MD61
DDRMD56 5 6 MD56 X_10p X_10p
DDRMD57 7 8 MD57 C508 C514
DCLK4 DCLK#4
DCLK4 8,16 DCLK#4 8,16
MD[0..63]
MD[0..63] 8
X_10p X_10p
V_DIMM V_DIMM C509 C515
DCLK5 DCLK#5
DCLK5 8,16 DCLK#5 8,16
DDRMD[0..63]
DDRMD[0..63] 16,27
C516 C522 X_10p X_10p
0.1u 0.1u
C517 C523
0.1u
0.1u
C518 C524
0.1u 0.1u
C519 C525
A 0.1u 0.1u A
C520 C526
0.1u 0.1u Title Rev
C521 C527 Micro-Star MS-6507 0B

Document Number
0.1u 0.1u
DDR_DAMPING
Last Revision Date:
Tuesday, July 24,2001 Sheet 26 of 36
5 4 3 2 1
5 4 3 2 1
DDRMAA12 R532 56 MDQS#8 R547 47

16,26 MDQS#8
DDR_VTT
DDRMAA0 R533 56 MDQS#3 R548 47

16,26 MDQS#3
DDRMD3 RN518 1 2 47 DDRMAA10 R534 56 MDQS#2 R549 47
16,26 MDQS#2
DDRMD7 3 4 DDRMAA1 R535 56 MDQS#1 R550 47
16,26 MDQS#1
DDRMD2 5 6 DDRMAA2 R536 56 MDQS#0 R551 47
D 16,26 MDQS#0 D
DDRMD6 7 8
DDRMD1 RN519 1 2 47
DDRMD5 3 4
DDRMD4 5 6
DDRMD0 7 8 DDRMAA3 R537 56 MDQS#7 R552 47 DDR_VTT
DDRMD13 RN520 47 DDRMAA4 R538 56 16,26 MDQS#7 MDQS#6 R553 47
1 2 16,26 MDQS#6
DDRMD9 3 4 DDRMAA5 R539 56 DDRCS#1 R554 47
8,16,26 DDRCS#1
DDRMD12 5 6 DDRMAA6 R540 56 DDRCS#0 R555 47
8,16,26 DDRCS#0
DDRMD8 7 8
DDRMD11 RN521 1 2 47
DDRMD10 3 4
DDRMD15 5 6
DDRMD14 7 8 DDRMAA8 R541 56 DDR_VTT
DDRMD20 RN522 1 2 47 DDRMAA7 R542 56
DDRMD21 3 4 DDRMAA11 R543 56
DDRMD17 5 6 DDRMAA9 R544 56
DDRMD16 7 8
DDRMD19 RN523 1 2 47
DDRMD22 3 4
DDRMD18 5 6 DDRMAA[0..12] DDRMAA[0..12] 8,16,26
DDRMD23 7 8
DDRMD29 RN524 1 2 47 RN536
DDRMD25 3 4 MECCRS7 1 2
DDRMD28 5 6 MECCRS3 3 4
C DDRMD24 MECCRS6 C
7 8 5 6
DDRMD31 RN525 1 2 47 MECCRS2 7 8
DDRMD27 3 4
DDRMD30 5 6 47
DDRMD26 7 8
DDRMD35 RN526 1 2 47 R545 DDR_VTT RN537
DDRMD39 3 4 DDRBS0 MECCRS1 1 2 DDR_VTT
8,16,26 DDRBS0
DDRMD38 5 6 R546 MECCRS0 3 4
DDRMD34 7 8 DDRBS1 56 MECCRS5 5 6
8,16,26 DDRBS1
DDRMD33 RN527 1 2 47 MECCRS4 7 8
DDRMD37 3 4 56
DDRMD36 5 6 47
DDRMD32 7 8
DDRMD41 RN528 1 2 47 MECCRS[0..7]
MECCRS[0..7] 16,26
DDRMD45 3 4
DDRMD44 5 6
DDRMD40 7 8
DDRMD47 RN529 1 2 47 RN534
DDRMD43 3 4 MDQS#5 1 2 DDR_VTT
16,26 MDQS#5
DDRMD46 5 6 DDRCS#2 3 4
DDRMD42 8,16,26 DDRCS#2 DDRCS#3
7 8 5 6
DDRMD53 RN530 47 8,16,26 DDRCS#3 MDQS#4
1 2 7 8
16,26 MDQS#4
DDRMD52 3 4
DDRMD49 5 6 47
B B
DDRMD48 7 8
DDRMD51 RN531 1 2 47
DDRMD55 3 4
DDRMD50 5 6
DDRMD54 7 8
DDRMD57 RN532 1 2 47
DDRMD56 3 4
DDRMD61 5 6
DDRMD60 7 8
DDRMD59 RN533 1 2 47 RN535
DDRMD63 3 4 DDRCKE3 1 2 DDR_VTT
DDRMD58 5 6 DDRCKE0 3 4
DDRMD62 7 8 DDRCKE2 5 6
DDRCKE1 7 8
47
DDRMD[0..63] DDRCKE[0..3]
DDRMD[0..63] 16,26 DDRCKE[0..3] 8,16
A A
R556 Title Rev

DDRWEA# 56
16,26 DDRWEA# R557 DDR_VTT Micro-Star MS-6507 0B
DDRCASA# 56
16,26 DDRCASA# R558 Document Number
DDRRASA# 56
16,26 DDRRASA# DDR_TERMINATION
Last Revision Date:
T u esday, July 24, 2001 Sheet 27 of 36
5 4 3 2 1
5 4 3 2 1
DDR_VTT
V_DIMM
C532
VCC5_STR 10u-1206
C533
V_DIMM
0.1u
C534
D D
C528 0.1u
0.1u C535
R563 + C531
10u
10K 0.1u
U500A
C536
D
8
LMV358
3 Q500
+
1 G 0.1u
2 CEU603AL-S-TO252 C537
-
S
R564
10K
4
0.1u
C538
DDR_VTT
R565 0.1u
VCC5_STR C539
X_4.7 + C529 + C530

R560 1000u 1000u 0.1u
U500B
C540
D
8
10K
LMV358
5 Q501
+
7 G 0.1u
6 CEU603AL-S-TO252 C541
-
S
C C
4
0.1u
R561 C542
10K
10u-1206
C543
R562
0.1u
200 C544
0.1u
C545
0.1u
C546
0.1u
C547
0.1u
C548
0.1u
B B
C549
0.1u
C550
0.1u
C551
0.1u
C552
10u-1206
C553
0.1u
C554
10u-1206
C555
0.1u
A A
Title Rev
Document Number
DDR_T_POWER
Last Revision Date:
Wednesday, August 29,2001 Sheet 28 of 36
5 4 3 2 1
5 4 3 2 1
Jumper Setting & Connector Setting

D Jumper Description Connector Description D
J1 INTERUDER HEADER U3 INTEL mPGA478-B CPU

J2 CHASISS INTRUSION HEADER IDE1 Primary
IDE2 Secondary
J3 AUDIO REAR PHONE JACK (LINE_IN, LINE_OUT, MIC_IN)
DIM1 SDRAM DIMM1
J4 AUDIO AUX HEADER DIM2 SDRAM DIMM2
J5 AUDIO FRONT PANEL HEADPHONE JACK HEADER
AGP1 AGP Slot
J6 AUDIO INTERNAL SPEAKER HEADER (ATAPI)
PCI1 PCI Slot1
J7 BIOS function PCI2 PCI Slot2
1-2 Normal (Default) PCI3 PCI Slot3
2-3 Configuration Mode COM1 Serial Port
C REMOVED Recovery C
COM2 Serial Port
LPT Parallel Port
FDD1 Floopy
JBAT1 CLEAR CMOS JMDM1 MODEM RING HEADER
1-2 NORMAL (Default) JWOL1 LAN WAKEUP HEADER
2-3 CLEAR CMOS KBMS1 PS/2 Keyboard and PS/2 mouse
IR1 IR HEADER C_FAN1 CPU FAN HEADER
CD_IN1 CDROM HEADER (ATAPI) S_FAN System FAN HEADER
MDM_IN1 TELEPHONY HEADER (ATAPI) USB1 USB REAR CONNECTOR
B JP1 CNR RISER CODEC SELECT HEADER USB2 USB INTERNAL HEADER B
1-2 AUTO MODE (Default) POWER ATX Power

2-3 PRIMARY AUDIO CODEC ONBOARD
JSMB1 SMBUS HEADER
F_P1 Front Panel
Pin1 Power of Hard LED
Pin2 Power LED
Pin3 Hard LED
Pin4 Suspend LED
Pin5,8,12,13 GND
Pin6 Power Button
Pin7 Reset Button
Pin9 VCC
A
P_FAN1 ATX FAN HEADER A
JPW1 ATX12V Power Title Rev
Document Number
JUMPER SETTING
Last Revision Date:
5 4 3 2 1
8 7 6 5 4 3 2 1
Power Delivery Map
A T X 1 2V POWER Supply
D D
3.3V 5V 5VSB 12V

1A
VRM9.2 Processor Core

Processor Vtt
Power
Translator
1.5V VREG MCH Core 1.5V
ACPI IC
MCH Vtt
MCH AGP
OP 1.8V VREG M C H H U B Interface 1.8V
M C H Memory DDR 2.5V
C C
2.5V DDR
FET
D D R memory 2.5V
2.5V VREG
ICH2 Core 1.8V

ICH2 I/O 3.3V
I C H 2 Resume 1.8V
1.8V VREG I C H 2 Resume I/O 1.8V
5V TO 3.3V ICH2 RTC 3.3V
RESISTOR
ICH2 5V
FWH 3.3V
B B
L P C Super I/O 3.3V
C L OCK GEN 3.3V
H A R D WARE AUDIO 3.3V
P C I LAN 3.3V/2.5V
5 V D u a l For USB and K/B
1.25V
DDR_T_POWER DDR memory Termination
A A
Title Rev
Document Number
Power Delivery Map
Last Revision Date:
8 7 6 5 4 3 2 1
5 4 3 2 1
Pentium 4 Processor /Northwood mPGA 478

Source Synchronous Signal Group and the Associated Strobes
Signals Associated Strobe
REQ[4:0],A[16:3]# ADSTB0# ADSTB0#
should be +- 25mils
D
A[31:17]# ADSTB1# ADSTB1# D
D[15:0]#,DBI0# DSTBP0#,DSTBN0#
Signals Length Inaccuracy

Data 2.0" to 10.0" +/- 100 mil
Address 2.0" to 10.0" +/- 200 mil
Strobe 2.0" to 10.0" +/- 25 mil
Clock 2.0" to 10.0" Don't need
* Delta=(CPU_pkglen.net-CPUpkglen.strobe)+(CS_pkglen.net-CS_pkglen.strobe)
Trace : 7 mil width 13mil space
Miscellaneous Signals
C C
USB
HL_STB/HL_STB#
HL[10..0] * USB Trace width : 9 mils
Taces 5mils
* USB Trace Spacing : 25 mils
HL[0:10] Others
20mils 20mils * D i fferential USB Signlas Trace
HL_STB
HL[0:10] Spacing : 18 mils
15mils 15mils * USB Power Trace must be 40mils width
HL_STB# HL[0:10]
20mils 20mils
HL[0:10] Others
* Max Length : 8" * Max Length : 8"
* STB and STB# Length must beequal * Length must be matched within +/- 0."
of the Strobe Signals
B B
AGP
Maximum Dismatch
SIGNALS Length Width Space Length Relative to
1X Timing group 2X/4X Timing group
1X Timing group 7.5" 5 mil 5 mil X X
SET#1
AGPCLK GAD[15..0] 2X/4X Timing group GAD_STB0
PIPE# GC_BE#[1..0] SET#1 7.25" 5 mil 20 mil +/- 0.125" GAD_STB0#
RBF# GAD_STB0
WBF# GAD_STB0# 2X/4X Timing group GAD_STB1
ST[2..0] SET#2 7.25" 5 mil 20 mil +/- 0.125" GAD_STB1#
GFRAME# SET#2
GIRDY# GAD[31..16] 2X/4X Timing group SB_STB
GTRDY# GC_BE#[3..2] SET#3 7.25" 5 mil 20 mil +/- 0.125" SB_STB#
A A
GSTOP# GAD_STB1
GDEVSEL# GAD_STB1# 2X/4X Timing group GAD_STB0
GREQ# SET#1 6" 5 mil 15 mil +/- 0.25" GAD_STB0#
GGNT# SET#3
GPAR SBA[7..0] 2X/4X Timing group GAD_STB1 Title Rev
SB_STB SET#2 6" 5 mil 15 mil +/- 0.25" GAD_STB1#
SB_STB# M i c ro-Star MS-6507 0B
2X/4X Timing group SB_STB
SET#3 SB_STB# Document Number
6" 5 mil 15 mil +/- 0.25"
Layout Guide
Last Revision Date:
5 4 3 2 1
5 4 3 2 1
CPUCLK 0.5" MAX 0"~ 0.2" 2"~ 9" DEVICE L1+L2

RS * Line Width : 7.0 mil
MCHCLK L1 L2 L4 CPU X
CPUCLK# RS MCH X * Differential pair spacing : 7.0mil
MCHCLK# L1 L2 L4 ITP X * Spacing to other traces : 28 mil
0"~ 0.2" * BCLK0/BCLK1 LENGTH MATCH +/- 10 mil
L3 L3
D D
RT
RT
GND
DEVICE L1+L2 * Line Width : 5.0 mil
MCH_66 MCH X * Spacing to other traces : 20 mil
0"~ 0.5 " 4"~ 8.5"
ICH_66 RS ICH X +/- 100 mils
L1 L2
AGP_66 AGP X- 4"
ICH_PCLK DEVICE L1+L2 * Line Width : 5.0 mil

FWH_PCLK ICH X * Spacing to other traces : 20 mil
0"~ 0.5 " 4"~ 8.5"
SIO_PCLK RS FWH X * L1/L2 TRACE SAME AS MCH_66 TRACE LENGTH
C
ISAPCLK L1 L2 SIO X
C
PCICLK[4..0] PCI X-2.5"

0"~ 0.5 " 4"~ 8.5"
ICH_14 RS ICH Y * Spacing to other traces : 10 mil
L1 L2
OSC ISA BRIDGE Y

ICH_48 0"~ 0.5 " 3"~12"
RS ICH * Spacing to other traces : 20 mil
B SIO_48 L1 L2 B
SIO
CK 408
2.5" TO 9"- A
* Line Width : 7.0 mil
RN * Differential signls space : 14mils
CNR
0.5" TO 6.5" * Differential signls length mismatch +/- 7mil
A
LAN_PCLK
RST
A A
RXD[2..0]
ICH2 TXD[2..0]
Title Rev
AS SHORT AS POSSIBLE M i c ro-Star MS-6507 0B

Document Number
CK-408 and LAN Design Guide
Last Revision Date:
5 4 3 2 1
5 4 3 2 1
Trace Width : 5 mils A: 40 mils max SCK[0..2]

(A + B + D) = SDQS[0..8] (A + B) + (1" ~ 2")
Differential pair spacing : 7 mils. B+D: 2" ~ 6.5" SCK#[0..2]
Isolation spacing : 20 mils C+E: 2" ~ 7.0" R
SCK[0..2] B D SCK[3..5]
(A + C + E) = SDQS[0..8] (A + B + C) + (1" ~ 2")
SCK#[0..2] A SCK#[3..5]
D D
R
SCK[3..5] C E
SCK#[3..5] A SDQ[0..7] SDQS0 Matching requirement is +- 25 mils to strobe
Length: SCK[0..2] = SCK#[0..2]
SDQ[8..15] SDQS1
Length: SCK[3..5] = SCK#[3..5]
C C SDQ[16..23] SDQS2
SDQ[24..31] SDQS3
Rs RTT SDQ[32..39] SDQS4
Trace Width : 5 mils DDR_VTT = 1.5V
SDQ[0..63] GND SDQ[40..47] SDQS5
Trace spacing : 12 mils
SCB[0..7] SDQ[48..55] SDQS6
SDQS[0..8] A: 2" ~ 5" A B C D SDQ[56..63] SDQS7
B: 0.5" MAX Rs = 33 ohm +- 5% Rtt = 47 ohm +- 5% SCB[0..7] SDQS8
C: 0.3" ~ 0.5"
D: 0.1" ~ 0.8"
Rs RTT
C C
Trace Width : 5 mils DDR_VTT = 1.5V SCK[0..2] SMA[0..12]

SMA[0..12] (A + B + D) = (A + B + C) + (1" ~ 4")
Trace spacing : 12 mils SCK#[0..2] SBS[0..1]
SBS[0..1]
SRAS# A A: 40 mils max B C D E SCK[3..5] SMA[0..12]
(A + C + E) = (A + B + C + D) + (1" ~ 4")
SCAS# B: 2" ~ 3.5" Rs = 0 ohm +- 5% Rtt = 56 ohm +- 5% SCK#[3..5] SBS[0..1]
SWE# C: 0.5" max
D: 0.3" ~ 0.5"
E: 0.1" ~ 0.8"
Rs RTT
SCS#[0..1]
Trace spacing : 12 mils
SCKE[0..1]
SCK[0..2] SCS#[0..1]
A A: 40 mils max B C D (A + B + D) = (A + B + C) + (1" ~ 4")
SCK#[0..2] SCKE[0..1]
B: 2" ~ 3.5" Rs = 0 ohm +- 5% Rtt = 47 ohm +- 5%
C: 0.5" max SCK[3..5] SCS#[2..3]
B (A + C + E) = (A + B + C) + (1" ~ 4") B
D: 0.4" ~ 1.3" SCK#[3..5] SCKE[2..3]
Rs RTT
SCS#[2..3] Trace spacing : 12 mils
SCKE[2..3]
A A: 40 mils max B C D
B: 2" ~ 3.5" Rs = 0 ohm +- 5% Rtt = 47 ohm +- 5%
C: 1.0" max
D: 0.1" ~ 0.8"
RCVENIN#
A A: 40 mils max DIMM1 DIMM2
A B A
B: exactly 1"
RCVENOUT#
A
Title Rev
MCH Document Number
DDR DIMM DG
Last Revision Date:
5 4 3 2 1
5 4 3 2 1
PCB OTHER COMPONENT
SIMULATION TRACE
D D
8
7
U3_X1 U4_X1 J1 J2
VCC5
9 6 9 6 9 6 9 6
2 5 2 5 2 5 2 5 X_PIN1*2 X_PIN1*2
BS5 BS3 BS6 BS2 SDR AGP

3
4
8
9 6 9 6
BS1_X1 BS2_X1 BS3_X1 BS4_X1
2 5 2 5
BS4 BS1
BS6_X1 BS7_X1 BS8_X1 BS9_X1
3
C C
BS1_X1 BS2_X1 BS3_X1 BS4_X1 BS6_X1 BS7_X1 BS8_X1 BS9_X1
FM1 FM2 FM3 FM4 FM5 FM6 FM7 FM8
X X X X X X X X
X_FM X_FM X_FM X_FM X_FM X_FM X_FM X_FM
B B
A A
Title Rev
Document Number
MANUAL
Last Revision Date:
Tuesday, July 24, 2001 Sheet 34 of 36
5 4 3 2 1
5 4 3 2 1
BIOS
D D
U23[1]
JBAT1 Clear CMOS BAT SOCKET 1 32
VPP VCC
1-2 Normal * J7 BIOS Update 2
RST# CLK
31
2-3 Clear CMOS 3 30
1
4 FGPI3 FGPI4 29
FGPI2 IC(VIL)
SHORT Locked 5
FGPI1 GNDA
28
6 27
JBAT1(1-2) BAT1[A] 7 FGPI0 VCCA 26
WP# GND
OPEN Unlocked * 8
TBL# VCC
25
JC-D2-GN BAT-CR2032-3V-210mAh 9 24
10 ID3 INIT# 23
ID2 FWH4
2
11 22
J7(1) 12 ID1 RFU 21
ID0 RFU
13 20
X_JC-D2-GN 14 FWH0 RFU 19
15 FWH1 RFU 18
FWH2 RFU
16 17
GND FWH3
SST-256K*8-33MHz-PLCC32
F R O N T PANNEL BUZZER JP2 On board codec JLAN1 LAN SELECT
F_P114-15 1-2 ENABLED 1-2 ENABLED

C C
X_JC-D2-GN
2-3 DISABLED 2-3 DISABLED
JP2(1-2) JLAN1(1-2)
JC-D2-GN JC-D2-GN
MS6507 PCB COM

Hooker
Heat sink
B CN7(A) CN7(B) B
U12_X U12_X1 U12_X2 U12_X3 U12_X4
PCB
COM-D9-GN COM-D9-GN
D1x3-1:2-BK
_ D1x3-1:2-BK D1x3-1:2-BK D1x3-1:2-BK
_
A A
Title Rev
Document Number
PACKING BOM
Last Revision Date:
5 4 3 2 1
5 4 3 2 1
HISTORY
From 0A to 0B
1.Remove H/W Audio.
D 2.Add CNR Slot. D
3.Reduce 1cm in width.

4.Add thermtrip circuit.
5.Fix no cpu can not shutdown issue.
6.Change super I/O to 627F compatible.
7.Fix power sequency issue.
8.Fix Glitch on DDR signal.
9.Modified Vcore power plane placement.
10.Add Intel front pannel pin header.
C C
B B
Title Rev
A
A
Document Number
HISTORY
Last Revision Date:
5 4 3 2 1

MSI 6507 Intel

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8 7 6 5 4 3 2 1

Clock CY28324 & ATA100 IDE CONNECTORS 4

Audio Amp TL072 & GAME 14

D-LED & AUDIO 6 CHANNEL CONTROL 21

Votlage Regulator 22 Expansion Slots:

DDR Termination Power 28

( 66MHz X 4 ) HUB Interface

Monitor ICH2: I/O PCI (33MHz)

General Purpose I/O Spec.

GPIO 8 I LAN Wake Up INTD#

GPIO 28 I/O non

*Trace less 0.5"

R719 4.7K R718 220 Q705

C79 R119 C76 C81 R120 C77

CPU SIGNAL BLOCK CPU GTL REFERNCE VOLTAGE BLOCK

CPU STRAPPING RESISTORS ALL COMPONENTS CLOSE TO CPU

CPU VOLTAGE BLOCK VCC_VID 15,23

CPU DECOUPLING CAPACITORS CPU DECOUPLING CAPACITORS

VCCP VCCP VCCP

VCCP CB38 CB49 CB21

PLACE CAPS WITHIN CPU CAVITY M i c ro-Star MS-6507 0B

AE21 VTT RSVD G16 AJ5 GND GND AC18

C142 C141 C140 R222

ICH2 DECOUPLING CAPACITORS

20 OC#0 OC1# GPIO20

VRM_GD R216 10K VCC3

PWRBTN# R329 10K

LPC SUPER I/O W83627HF THERMAL RESISTOR BLOCK SPEAKER BLOCK

RESUME RESET CIRCUIT BLOCK VCC3 VCC5 VCC5_SB

S t u f f a ll for D Version bug IR HEADER CB133 CB121 CB111

C190 X_10u X_10u X_10u VDD3

AUXLX LINE_R J3-3

AUXRX C220 1 2 1u-0805 AUXR +12VR +12V U24 +5VR

X_1u-0805 1 R428 2 X_0 SPEAKER OUT JACK

X_33p FOR MSI INTERNAL HEADER

CD PANEL PLAY WITHOUT PC POWER_ON

J7 BIOS Update CB190 CB191 CB201 CB203

VCC3 R737 U700B

R711 1 2N7002-S-SOT23 R339 R338

THERM_OFF X_102P R53

R715 6 X_2N7002-S-SOT23 VCC_VID

R37 U4B C11

AGP SIGNAL REFERENCE CIRCUIT

AGPREF C115 X_0.1u VREF_GC

R182 R181 C111 CB122

IDSEL = AD16 IDSEL = AD17 IDSEL = AD18

RN20 PCI PULL-UP / DOWN RESISTORS

Brookdale FRONT PANEL-M For EMI.

BACK PANEL USB CONNECTOR FOR USB PORT 0,1 +12V

LAN_USB1A R23 4.7K R35 27K

NEAR CHIPSET LESS THAN 1 INCH NEAR USB CONNECTOR

R312 4.7K R298 27K

C2 R55 C15 CT2 R36 SBD3+ 5 6 SBD2+

NEAR USB CONNECTOR

POWER CIRCUIT FOR USB PORT 2, 3

C214 R380 C228 CT43 Title Rev

LO=MIC,HI=4CHANNEL R215 U701B

Q25 Q24 Q23 Q22

100 U9A OTHER 0 0 0 0 0 0

1 LM324M NOTE2 --- DIMM

S0 STATE --- 2.0A * 3 = 6.0A ---> VCC3

NOTE3 --- ICH2

R174 REGULATORS OUTPUT DECOUPLING CAPACITORS

R113 X_0 R110 0