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Nile
GILIA Main Board Rev.03
A Index - System Block Revision History A
Rev Date Description
PAGE CONTENTS PAGE CONTENTS PAGE CONTENTS PAGE CONTENTS
01 TOP PAGE 21 DDR2 Term 41 Audio etc 61 CN - 1394/S-out/RF-SW
02 BLOCK DIAGRAM 22 ICH7M-1 42 Super I/O 62 CN - Switch/Status
03 RESERVED 23 ICH7M-2 43 LAN-1 63 LAN-3(Marvell)
04 EMI 24 ICH7M-3 Power 44 LAN-2 64 EXT-VGA-1
05 PLL-1 25 ICH7M-4 GND/CAP 45 MiniCard 65 EXT-VGA-2
06 PLL-2 26 ICH7M-5 P.U./P.D. 46 BENN 66 EXT-VGA-3
B 07 CPU-1 27 G-Sensor 47 BENN P.U./P.D. 67 EXT-VGA-4 B
08 CPU-2 Power/GND 28 SMBUS 48 RESET 68 Power Sequence
09 CPU-3 CAP 29 BIOS 49 THERMAL
10 CPU-4 P.U./P.D. 30 IEEE1394-TI 50 DVI Transmitter
11 GMCH-1 31 PCIC-1 51 CN - Bay Board
12 GMCH-2 32 PCIC-2 52 CN - USB Board/Bluetooth
13 GMCH-3 GFX 33 PCIC-3 53 MDC
14 GMCH-4 DDR2 34 PCMCIA Power 54 VGA Switch
C 15 GMCH-5 Power-1 35 PCMCIA Connector 55 VGA Jumper C
16 GMCH-6 Power-2 36 TPM 56 CN - CRT
17 GMCH-7 Power-3 37 Buffer/LV Shift 57 CN - Common-PR-II
18 GMCH-8 CAP,GND 38 Audio CODEC 58 CN - LCD
19 DDR2 DIMM Slot-1 39 Audio AMP 59 CN - Audio
20 DDR2 DIMM Slot-2 40 Audio Int-Mic 60 CN - Keyboard

Index - Power Block System Resorce Assign


D PAGE CONTENTS PCI BUS NUMBER = #0 PCI BUS NUMBER = #2 Please refer to the difinition table attached to the Nile system D

69 Power / TOP PAGE IDSEL Dev.ID Device IDSEL Dev.ID Device for part difinition of each system configrations.
70
71
Power / Delivery
Power / DDC / CPUCore1
AD16
AD17
00h
01h
GMCH(HOST/DRAM BRIDGE)
GMCH(AGP BRIDGE)
AD17
AD18
08h
09h
Reserved for ICH7 (Internal LAN)
On Board LAN ࣮૷͞ΕΔ෦඼͸ϞσϧʹΑͬͯ͸ճ࿏ਤͱҟͳΔͨΊɺ
ඞͣఴ෇ͷ࣮૷ࠩ෼දΛ֬ೝ͢Δ͜ͱɻ
72 Power / DDC / CPUCore2 AD18 02h Unused AD19 0Ah PCIC
73 Power / DDC / 1.05V1.8V --- --- --- AD20 0Ch On Board LAN
74 Power / DDC / 3.3V5V 1Dh ICH7-M (USB2.0/USB1.1) AD21 0Dh MiniPCI CAUTION
75 Power / DDC / Charger 1Eh ICH7-M(Hub I/F to PCI Bridge) AD22 0Eh IEEE1394
-In order to improve the Platform, Fujitsu Limited reserve
76 Power / LDO / SYS 1Fh ICH7-M(LPC,IDE,SMbus,ACZ) AD23 0Fh ---
the right to revise, modify, or alter this document
E E
77 Power / LDO / PMU
without prior notice.
PCI INTERRUPT USB -Fujitsu Limited shall not incur any obligation or liability
78 Power / Node / DCInBatt
PCIINT# Device Port# JP-Retail WW-Retail JP-Corp. WW-Corp. for damages of the third party's license or similar
79 Power / Node / PWR_1
INT#0 PCIC USB0 System #0 <== <== <== rights arising out or, or in connection with the use of
80 Power / Node / Switch1
INT#1 IEEE1394 (TI) USB1 System #1 <== <== <== the data described in this document.
81 Power / Blank
INT#2 -7 Unused USB2 System #2 <== <== <== -These specifications shall not be reproduced without
82 Power / PMU / LUNA1
USB3 (Rsv) (Rsv) P-R <== prior notice.
83 Power / PMU / LUNA2
PCI REQ#/GNT# USB4 ExpressCard <== <== <== Copyright (C) All right reserved. (C) Fujitsu limited 2005
F 84 Power / PMU / Etc0&Sec F
REQ#/GNT# Device USB5 BAY <== <== MiniCard2
85 Power / PMU / Etc1
REQ#0 PCIC USB6 Fingerprint <== <== <==
86 Power / PMU / Etc2
REQ#1 IEEE1394 (TI) USB7 (Rsv) (Rsv) Felica Bluetooth
87 Power / Blank
REQ#2 Unused
88 Power / DDC / VGACORE SMBus PCI Experss
REQ#3 Unused
89 Power / DDC / VGAMEM SMBCNT[2:0] Device Port# Device
REQ#4 Unused
90 Power / LDO / VGA 0,0,0 DIMM SLOT-0/1 PCIE1 On Board LAN
REQ#5 Unused
91 Power / Blank 0,0,1 PMU PCIE2 ExpressCard

G
0,1,0
0,1,1
PLL
Thermal,SPWG,
PCIE3
PCIE4
MiniCard1
MiniCard2/BAY
[TOP PAGE] G
TITLE
MiniCard 0/1 GILIA Main Board Rev.03
DRAW. CUST.
C1CP272450-X3
FUJITSU Proprietary & Confidential
1 2 3 4 5 6
REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
7
APPR.
CHECK Yamada
DESCRIPTION
APPR.
8
Miura
NO.

FUJITSU LTD.
9
SHEET
1 91
1 2 3 4 5 6 7 8 9
Nile
CPR2
DVI CN CRT CN CPU Thermal
Yonah-2M FAN Controller
uFCPGA 478pin MAX6640 P49
A A
Host166MHz/133MHz CK410M PLL
RGB SW
P7 - 10 9LPR311AKLF
CRT CN P56 PI5V330S P50 SRC 100MHz
P5
FSB 1.05V 667MHz
Analog RGB DREF 96MHz

LCD CN P58 LVDS XGA/SXGA+ MCH DDR2 1.8V 667MHz DIMM Slot 1 ICH 48MHz
945PM/GM P19
PCI 33MHz
P61
FCBGA 1257pin
S-OUT
TMDS

B Calistoga PM DDR2 1.8V 667MHz DIMM Slot 2 Ref 14MHz B


PCIE x16
P11 - 18 P20
HDCP Key External VGA
DMI x4
CH9901 P50 GammaChrome
ULP MPM-64 G-LAN
P64 - 67 ICH PCI-E x1 1.5V
DVI Transmtter 88E8055 P63
P50 SDVO
82801GBM/GHM
CH7312 PCI-E x1 1.5V
BGA 652pin P35 P35
ExpressCard PC Card
C ICH7M C
BAY Board PCI-E x1 1.5V
SATA Base SKU
Mini Card Slot1
W-LAN P45 BAY Board
SATA HDD SD/MS/xD Slot
PCI-E x1 1.5V P33
Bridge IDE BAY TV(PCIE)
PATA HDD 88SA8040 ODD
PCI 3.3V 33MHz Cardbus SmartCard Slot
PCIC P33
BAY Board
BAY TV
OZ711MP1
D USB:0 OZ711MS1 D

USB CN 0 P31-P32 IEEE1394 CN P61


USB:1 Audio OUT P59
USB CN 1
Azalia
Audio AMP
LM4817 P39 Speaker P59
USB:2 Audio OUT(PR)
MDC 1.5 P53 Audio Codec
USB CN 2 USB:3 P38
ALC262
USB HUB(CPR2)
E USB Board E
uPD720114
CPR2 LPC 3.3V 33MHz Audio IN(PR)
USB:4
ExpressCard P35 Super I/O ASIC KBC/PMU TPM V1.2(Main/Sub)
USB:5
P42 P46 P82-83 P36
CPR2
LPC47N217 BENN LUNA2 SLB9635TT1.2 P59
Fingerprint Sensor Audio IN
FPS Board AES2501A
BAY Board RS232C Drv. ST-LCD P62
USB:6 P42
Serial Port
F F
BAY TV/FDD USB:7 P60 P62
Keyboard Appl/Sec Button
P52
Parrarell Port
Bluetooth
IR port
Mini Card Slot2
P45
PS/2 CN
UMTS FlatPoint StickPoint
FeliCa USB Board
SPI CPR2
BAY Board
Sim Slot
G
USB Board
BIOS ROM BIOS ROM
[BLOCK DIAGRAM] G
TITLE
GILIA Main Board Rev.03
Fujitsu M25P80 P29 M25P80 P29 DRAW.
C1CP272450-X3 CUST.
NO.
Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION
FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 2 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

RSV1 10K 1/16W 5%

3
A None A
2 1 RSV13
1 2SK3541 RSV27
None 1 2

2
RSV2 10K 1/16W 5% RSV21 1SS400G
None None
2 1 1 2 RB521S-30

3
None
RSV14
RSV3 10K 1/16W 5% 1 2SK3541
None None

2
2 1 RSV22 1SS400G RSV28
None 1 2
1 2

3
RSV4 10K 1/16W 5% RSV15 RB521S-30
None 1 2SK3541 None
B 2 1 None
B

2
RSV23 1SS400G RSV29
None 1 2

3
1 2
RSV16
1 2SK3541 RB521S-30
RSV5 0 1/16W 1608 None None

2
None
2 1
RSV30
1 2
RSV6 0 1/16W 1608

5
None
2 1 1 RB521S-30
RSV17 330uF 6.3V(POS) DM 4 None
C None 2 C
RSV7 0 1/16W 1608 1 2

+
None RSV24

3
2 1 NL17SZ08XV5
None
RSV18 330uF 6.3V(POS) DM
RSV8 0 1/16W 1608 None
None 1 2
+

2 1

5
1
4
RSV19 None 2
SI2305DS-T1-E3
RSV25

3
D 2 3 NL17SZ08XV5 D
RSV9 10uF 6.3V 2012 RM None
None
2 1
1

5
RSV10 10uF 6.3V 2012 RM
None RSV20 None 1
2 1 SI2305DS-T1-E3 4
2
2 3
RSV11 10uF 6.3V 2012 RM RSV26

3
None NL17SZ08XV5
2 1 None
1

E RSV12 10uF 6.3V 2012 RM E


None
2 1

$V01L10
Added parts
F PWR_3VMAIN F
$V01L11
Added part
100uF 6.3V(POSE) B20
None
1

+
C1070
2

GND1

G [Reserved parts] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 3 91
1 2 3 4 5 6 7 8 9
F
E
B
A

D
C

1
1

Fujitsu
$V02L01

Proprietary& Confidential
2 1 2 1 2 1

GND1
GND1
GND1
CC31 None CC16 None CC1 None

PWR_1
PWR_1

1000pF 25V RK 1000pF 25V RK 1000pF 25V RK

PWR_1.05VMAIN

2
2

1 2 1 2 2 1

GND1
GND1
CC32 None CC17 None GND1 CC2 None

PWR_1
1000pF 25V RK 1000pF 25V RK 1000pF 25V RK
PWR_1.05VMAIN

PWR_1.05VMAIN
Added parts(DemitasNX Resuslt)

1 2 2 1 2 1

GND1
GND1
GND1

CC33 None CC18 None CC3 None

PWR_1
1000pF 25V RK 1000pF 25V RK 1000pF 25V RK
PWR_1.8VSUS

PWR_1.5VMAIN

2 1 1 2 1 2

GND1
GND1
GND1

3
3

CC34 None CC19 None CC4 None

PWR_1
1000pF 25V RK 1000pF 25V RK 1000pF 25V RK
PWR_1.8VSUS

PWR_1.5VMAIN

1 2 1 2
GND1
GND1

CC21 None CC6 None

4
4

PWR_3VSTD

1000pF 25V RK 1000pF 25V RK


PWR_3VMAIN

1 2 1 2
GND1
GND1

CC22 None CC7 None


PWR_3VSTD

1000pF 25V RK 1000pF 25V RK


PWR_3VMAIN

1 2 2 1
GND1
GND1

CC23 None CC8 None


PWR_3VSTD

1000pF 25V RK 1000pF 25V RK


PWR_3VMAIN

5
5

2 1 1 2
GND1
GND1

CC24 None CC9 None


PWR_3VSUS

1000pF 25V RK 1000pF 25V RK


PWR_3VMAIN

1 2 1 2
GND1
GND1

CC25 None CC10 None


PWR_3VSUS

1000pF 25V RK 1000pF 25V RK


PWR_5VMAIN

6
6

2 1 2 1

DATE
GND1
GND1

CC26 None CC11 None

REV. DATE
PWR_3VSUS

1000pF 25V RK 1000pF 25V RK


PWR_5VMAIN

WWW.AliSaler.Com
2006.01.26
1 2 2 1

DESIGN
GND1
GND1

CC27 None CC12 None


PWR_3VSUS

DESIGN 1000pF 25V RK 1000pF 25V RK


PWR_5VMAIN

CHECK

7
7

Seki

2 1 2 1
GND1
GND1

APPR.

CC28 None CC13 None


PWR_3VSUS

1000pF 25V RK 1000pF 25V RK


PWR_5VMAIN

CHECK

2 1 2 1
GND1
GND1

CC29 None CC14 None


Yamada
PWR_3VSUS

1000pF 25V RK 1000pF 25V RK


PWR_5VSUS

APPR.

1 2
8
8

DESCRIPTION
GND1

CC15 None
Miura

1000pF 25V RK
PWR_5VSUS

TITLE
DRAW.
NO.

9
9

FUJITSU LTD.
C1CP272450-X3

4
SHEET
GILIA Main Board Rev.03
[EMI]
91
CUST.
F
E
B
A

D
C

G
Nile
1 2 3

C1
4 5 6 7 8 9
Nile
27pF 25V AJ M1

FSB FSA Function 2 1

2
0 0 Reserved 49 44 CLK_166_CPU0+_C 6
X1 X1 CPUCLKT0

0 1 133MHz Host CLK 14.31818MHz(NDK)


A C2 CAP93-14M31818 43 A

1
CPUCLKC0 CLK_166_CPU0-_C 6
1 0 200MHz Host CLK 1 2 2 1 48
X2
27pF 25V AJ R1005-0.09 41
1 1 166MHz Host CLK AWS85 CPUCLKT1 CLK_166_CPU1+_C 6
PWR_3VMAIN
GND1 $V03L03 40
CPUCLKC1 CLK_166_CPU1-_C 6
2 1 CLK_33_ICH 23
Changed part to pad

10K 1/16W 5%
C4 10pF 25V AD

1
PLL_FSAについては、分岐する PWR_3VSUS None

までの配線幅を2倍にすること。

R2

10K 1/16W 5%
#プラットフォーム回路図よりネット名変更 2 1 CLK_33_ASIC 29,46

1
C5 10pF 25V AD
PLL_FSB 8 None

2
7,10 CPU_BSEL1 FSLB/TEST_MODE

R705
PWR_3VMAIN R3
1 2 PLL_FSA 4 2 1 CLK_33_TPM_SB 36
23 CLK_48_ICH FSLA/USB48MHz C6 10pF 25V AD
B B

2
RM1 22 1/16W 5% None
4 5 2 VTTPWRGD# 68
Vtt_PWRGD/PD
3 6 2 1 CLK_33_PMU 83
2 7 56 53 C7 10pF 25V AD
CLKREQA# CPU_STOP# STP_CPU# 23
1 8 None
55 1 STP_PCI# 23
CLKREQB# PCI_STOP#
12 PLL_CLKREQ#_GMCH 2 1 CLK_33_PCIC 31
$V01L13 10Kx4 1/16W 5% 37 46 C8 10pF 25V AD
CLKREQC# SDATA SMB_DATA_PLL 28
None
Changed part RM1 23 PLL_CLKREQ#_SATA
36 45 SMB_CLK_PLL 28
CLKREQD# SCLK
34 PLL_CLKREQA# 2 1 CLK_33_SIO 42
C9 10pF 25V AD
None
45 PLL_CLKREQ#_MINIC0
$V02L01
2 1 CLK_33_TPM_OB 36
#TV-BAY挿入によるCLK_REQ検討 Changed connection C10 10pF 25V AD
C R5 33 1/16W 5% None C
23 CLK_33_ICH 2 1 CLK_33_PCIF0 64 11 CLK_100_SSC+ 6
PCICLK_F0 LCDCLK_SST/SRCCLKT0
2 1 CLK_14_ICH 23
R6 33 1/16W 5% DREFSSC C11 10pF 25V AD
2 1 CLK_33_PCI1 52 12 None
29,46 CLK_33_ASIC PCICLK1 LCDCLK_SSC/SRCCLKC0 CLK_100_SSC- 6
R7 33 1/16W 5% 2 1 CLK_14_SIO 42
2 1 CLK_33_PCI2 54 13 C12 10pF 25V AD
83 CLK_33_PMU PCICLK2 SRCCLKT1 CLK_100_SRC1+ 6
None
EXTVGA
CLK_33_PCI3 57 14 CLK_100_SRC1- 6 2 1 CLK_14_ASIC 46
PCICLK3/SEL_27MHz SRCCLKC1 C13 10pF 25V AD
TPM(OB) R9 33 1/16W 5% None
36 CLK_33_TPM_OB 2 1 CLK_33_PCI4 58 15 CLK_100_SRC2+ 6
PCICLK4/SEL_LCDCLK# SRCCLKT2
1 2 CLK_48_ICH 23
R10 33 1/16W 5% 3GPLL C14 10pF 25V AD
D 31 CLK_33_PCIC 2 1 CLK_33_PCI5 59
PCICLK5 SRCCLKC2
16 CLK_100_SRC2- 6
None D
PR R11 33 1/16W 5%
2 1 CLK_33_PCI6 62 19
42 CLK_33_SIO PCICLK6 SRCCLKT3 CLK_100_SRC3+ 6
GND1
TPM(SB) R12 33 1/16W 5% SATA
36 CLK_33_TPM_SB 2 1 CLK_33_PCI7 63 20 CLK_100_SRC3- 6
PCICLK7 SRCCLKC3

R13 10 1/16W 5% 22
SRCCLKT4 CLK_100_SRC4+ 6
PWR_3VSUS PWR_3VSUS_PLL 2 1
23 CLK_14_ICH ICH Option pin target Low High
FL1 PR R14 10 1/16W 5% CLK_14_REF_C 51 23
REF/TEST_SEL SRCCLKC4 CLK_100_SRC4- 6
1 2 42 CLK_14_SIO 2 1 SEL_LCDCLK#/PCICLK4 58pin LCDCLK SRC0
BLM18PG181SN1
R15 22 1/16W 5% 26 SEL_27MHz/PCICLK3 57pin DOT96 27MHz
SRCCLKT5 CLK_100_SRC5+ 6
10uF 6.3V 2012 RM

0.1uF 10V RK

E 2 1 E
46 CLK_14_ASIC
None

LAN
#DPST時は不要なのでUMAモデル未実装? SRCCLKC5
27 CLK_100_SRC5- 6
3
VDD48(3.3V)
2

0 1/16W 1608

25
VDDSRC(3.3V) PWR_3VMAIN
42 28 CLK_100_SRC6+ 6
VDDCPU(3.3V) SRCCLKT6
C15

47
1

VDDREF(3.3V)
1
C16

61 1st MiniCard
VDDPCI(3.3V)
29 CLK_100_SRC6- 6
SRCCLKC6
1 2
None
R16

9 30 None R17 10K 1/16W 5%


2

VDDLCD(1.8V) SRCCLKT7 CLK_100_SRC7+ 6


GND1 17
VDDSRC(1.8V) ExpressCard
33
VDDSRC(1.8V)
38 31 CLK_100_SRC7- 6 CLK_33_PCI4 1 2
VDDCPU(1.8V) SRCCLKC7
R18 10K 1/16W 5%
F PWR_1.8VSUS PWR_1.8VSUS_PLL 35 F
SRCCLKT8 CLK_100_SRC8+ 6
5 CLK_33_PCI3 1 2
GND 2nd MiniCard/TV-PCIE
FL2 10
GND R19 10K 1/16W 5%
2 1 18 34 CLK_100_SRC8- 6
BLM18PG181SN1 GND SRCCLKC8
0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

21
GND
24
GND
10uF 6.3V 2012 RM

32 6 GND1
GND DOTT_96NHz/27MHzFIX CLK_96+_27 6
CLK_14_REF_C
0.1uF 10V RK

39 1 2
GND
1 PLL_IREF

50
GND
None

60 7 R706 10K 1/16W 5%


GND DOTC_96MHz/27MHzSS CLK_96-_27 6
2

1
1

0 1/16W

GND1
1

2
C26

9LPR311AKLFT CA46740-5415
2

C27

C17

C18

C19

C20

C21

C22

C23

C24

C25

GND1

G [PLL-1] G
R727

32pin
$V03L04
2

LowPower: GNDSRC TITLE


Changed part GILIA Main Board Rev.03
Fujitsu
GND1 $V01L13 Normal: IREF
GND1 DRAW. CUST.
Changed parts GND1 NO. C1CP272450-X3
Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION
FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 5 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
※のパターンのライン・インピーダンスは55Ωで引くこと。(4mil幅) ※このページの部品はPLL近傍に配置すること
また、各対のクロックライン同士の間隔(CPUCLK0,CPUCLK0#
間など3対)は信号線間インピーダンス100Ωで引く こと。(9mil幅) R20 0 1/16W No EXTVGA
A 2 1 A

˞
5 CLK_96+_27 CLK_96_DREF+ 12

5 CLK_166_CPU0+_C 1 2 CLK_166_CPU0+ 7
R21 0 1/16W R23 0 1/16W No EXTVGA
5 CLK_166_CPU0-_C 1
R22
2
0 1/16W
˞ CLK_166_CPU0- 7 5 CLK_96-_27 2 1 CLK_96_DREF- 12

49.9 1/16W 1%

49.9 1/16W 1%
5 CLK_166_CPU1+_C 1 2 CLK_166_CPU1+ 11
R24 0 1/16W
5 CLK_166_CPU1-_C 1
R25
2
0 1/16W
˞ CLK_166_CPU1- 11

2
49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%
B B

1
1

R26

R27
$V01L13
Changed parts

None

None
Dumping Resistor: 33ohm -> 0ohm

2
R28

R29

R30

R31
None

None

None

None
GND1

GND1

C 2 1 C
5 CLK_100_SSC+ CLK_DREFSSC+ 12
R32 0 1/16W
5 CLK_100_SSC- 2 1 CLK_DREFSSC- 12
R33 0 1/16W
5 CLK_100_SRC1+ 2 1 CLK_100_EXTVGA+ 64
EXTVGA R34 0 1/16W
5 CLK_100_SRC1- 2 1 CLK_100_EXTVGA- 64
EXTVGA R35 0 1/16W

5 CLK_100_SRC2+ 2 1 CLK_100_3GPLL+ 12
R36 0 1/16W
5 CLK_100_SRC2- 2 1 CLK_100_3GPLL- 12
R37 0 1/16W
5 CLK_100_SRC3+ 2 1 CLK_100_SATA+ 22
R38 0 1/16W
D 5 CLK_100_SRC3- 2 1 CLK_100_SATA- 22 D
R39 0 1/16W

5 CLK_100_SRC4+ 2 1 CLK_100_ICH+ 23
R40 0 1/16W
5 CLK_100_SRC4- 2 1 CLK_100_ICH- 23
R41 0 1/16W
5 CLK_100_SRC5+ 2 1 CLK_100_PELAN+ 43,63
R42 0 1/16W
5 CLK_100_SRC5- 2 1 CLK_100_PELAN- 43,63
R43 0 1/16W

5 CLK_100_SRC6+ 2 1 CLK_100_MINICARD0+ 45
R44 0 1/16W
E 5 CLK_100_SRC6- 2 1 CLK_100_MINICARD0- 45 $V01L08 E
R45 0 1/16W
2 1 Changed connection
5 CLK_100_SRC7+ CLK_100_EXCARD+ 35
R46 0 1/16W
5 CLK_100_SRC7- 2 1 CLK_100_EXCARD- 35
R47 0 1/16W
$V01L13
Mount -> Reserve 1 2 MINIC_2nd
5 CLK_100_SRC8+ CLK_100_MINICARD1+ 45
R48 0 1/16W None
5 CLK_100_SRC8- 1 2 MINIC_2nd CLK_100_MINICARD1- 45
R49 0 1/16W None

1 2 TV-PCIE
CLK_100_PCIETV+ 51
R740 0 1/16W
1 2 TV-PCIE
CLK_100_PCIETV- 51
R741 0 1/16W
F F
※分岐によるスタブは最短とすること。
49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

49.9 1/16W 1%

$V01L02 $V01L02
Added parts Added parts
2

1
1

2
None R742

None R743
R50

R51

R52

R53

R54

R55

R56

R57

R58

R59

R60

R61

R62

R63

R64

R65

R66

R67

G [PLL-2] G
None

None

None

None

None

None

None

None

None

None

None

None

None

None

None

None

None

None

TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary & Confidential GND1 REV. DATE DESIGN CHECK APPR. DESCRIPTION
FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 6 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
Based on ECRU-050805

A A

11 CPU_A#[3:31]
M2A
11 CPU_D#[0:63] CPU_D#[0:63] 11
CPU_A#3 J4 H1 M2B
A[3]# ADS# CPU_ADS# 11
CPU_A#4 L4 E2 CPU_BNR# 11 CPU_D#0 E22 AA23 CPU_D#32
A[4]# BNR# D[0]# D[32]#
CPU_A#5 M3 G5 CPU_BPRI# 11 CPU_D#1 F24 AB24 CPU_D#33
A[5]# BPRI# D[1]# D[33]#
CPU_A#6 K5 CPU_D#2 E26 V24 CPU_D#34
A[6]# D[2]# D[34]#

ADDR GROUP 0
CPU_A#7 M1 H5 CPU_DEFER# 11 CPU_D#3 H22 V26 CPU_D#35
A[7]# DEFER# D[3]# D[35]#
CPU_A#8 N2 F21 CPU_D#4 F23 W25 CPU_D#36
A[8]# DRDY# CPU_DRDY# 11 D[4]# D[36]#

DATA GRP 2
DATA GRP 0
CPU_A#9 J1 E1 CPU_D#5 G25 U23 CPU_D#37
A[9]# DBSY# CPU_DBSY# 11 D[5]# D[37]#
CPU_A#10 N3 CPU_D#6 E25 U25 CPU_D#38
A[10]# D[6]# D[38]#
CPU_A#11 P5 F1 CPU_BREQ#0 11 CPU_D#7 E23 U22 CPU_D#39
A[11]# BR0# D[7]# D[39]#
CPU_A#12 P2 CPU_D#8 K24 AB25 CPU_D#40
A[12]# D[8]# D[40]#

CONTROL
CPU_A#13 L1 D20 CPU_D#9 G24 W22 CPU_D#41
A[13]# IERR# CPU_IERR# 10 D[9]# D[41]#
CPU_A#14 P4 B3 CPU_D#10 J24 Y23 CPU_D#42
B P1
A[14]# INIT# CPU_INIT# 10,22
J23
D[10]# D[42]#
AA26 CPU_D#43
B
CPU_A#15 CPU_D#11
A[15]# D[11]# D[43]#
CPU_A#16 R1 H4 CPU_D#12 H26 Y26 CPU_D#44
A[16]# LOCK# CPU_LOCK# 11 D[12]# D[44]#
11 CPU_ADSTB#0 L2 CPU_RS#[0:2] 11 CPU_D#13 F26 Y22 CPU_D#45
ADSTB[0]# D[13]# D[45]#
11 CPU_REQ#[0:4] B1 CPU_RST# 10,11 CPU_D#14 K22 AC26CPU_D#46
RESET# D[14]# D[46]#
CPU_REQ#0 K3 F3 CPU_RS#0 CPU_D#15 H25 AA24 CPU_D#47
REQ[0]# RS[0]# D[15]# D[47]#
CPU_REQ#1 H2 F4 CPU_RS#1 11 CPU_DSTBN#0 H23 W24 CPU_DSTBN#2 11
REQ[1]# RS[1]# DSTBN[0]# DSTBN[2]#
CPU_REQ#2 K2 G3 CPU_RS#2 11 CPU_DSTBP#0 G22 Y25 CPU_DSTBP#2 11
REQ[2]# RS[2]# DSTBP[0]# DSTBP[2]#
CPU_REQ#3 J3 G2 CPU_TRDY# 11 11 CPU_DINV#0 J26 V23 CPU_DINV#2 11
REQ[3]# TRDY# DINV[0]# DINV[2]#
11 CPU_A#[3:31] CPU_REQ#4 L5 CPU_D#[0:63] 11
REQ[4]#
G6 CPU_HIT# 11
HIT# 11 CPU_D#[0:63]
CPU_A#17 Y2 E4 CPU_HITM# 11 CPU_D#16 N22 AC22CPU_D#48
A[17]# HITM# D[16]# D[48]#
CPU_A#18 U5 CPU_D#17 K25 AC23CPU_D#49
A[18]# D[17]# D[49]#
CPU_A#19 R3 AD4 CPU_D#18 P26 AB22 CPU_D#50
A[19]# BPM[0]# D[18]# D[50]#
ADDR GROUP 1

CPU_A#20 W6 AD3 CPU_D#19 R23 AA21 CPU_D#51


A[20]# BPM[1]# D[19]# D[51]#
CPU_A#21 U4 AD1 CPU_D#20 L25 AB21 CPU_D#52
A[21]# BPM[2]# D[20]# D[52]#
CPU_A#22 Y5 AC4 CPU_D#21 L22 AC25CPU_D#53
XDP/ITP SIGNALS

DATA GRP 1
C A[22]# BPM[3]# D[21]# D[53]# C

DATA GRP 3
CPU_A#23 U2 AC2 CPU_D#22 L23 AD20CPU_D#54
A[23]# PRDY# D[22]# D[54]#
CPU_A#24 R4 AC1 ITP_BPM# 10 CPU_D#23 M23 AE22 CPU_D#55
A[24]# PREQ# D[23]# D[55]#
CPU_A#25 T5 AC5 ITP_TCK 10 CPU_D#24 P25 AF23 CPU_D#56
A[25]# TCK D[24]# D[56]#
CPU_A#26 T3 AA6 ITP_TDI 10 CPU_D#25 P22 AD24CPU_D#57
A[26]# TDI D[25]# D[57]#
CPU_A#27 W3 AB3 CPU_D#26 P23 AE21 CPU_D#58
A[27]# TDO D[26]# D[58]#
CPU_A#28 W5 AB5 CPU_D#27 T24 AD21CPU_D#59
A[28]# TMS ITP_TMS 10 D[27]# D[59]#
CPU_A#29 Y4 AB6 ITP_TRST# 10 CPU_D#28 R24 AE25 CPU_D#60
A[29]# TRST# D[28]# D[60]#
CPU_A#30 W2 C20 CPU_D#29 L26 AF25 CPU_D#61
A[30]# DBR# D[29]# D[61]#
CPU_A#31 Y1 CPU_D#30 T25 AF22 CPU_D#62
A[31]# D[30]# D[62]#
V4 D21 CPU_D#31 N24 AF26 CPU_D#63
THERM

11 CPU_ADSTB#1 ADSTB[1]# PROCHOT# CPU_PROCHOT# 10 D[31]# D[63]#


A24 CPU_THMDA 49 11 CPU_DSTBN#1 M24 AD23 CPU_DSTBN#3 11
THERMDA DSTBN[1]# DSTBN[3]#
10,22 CPU_A20M# A6 A25 CPU_THMDC 49 11 CPU_DSTBP#1 N25 AE24 CPU_DSTBP#3 11
A20M# THERMDC DSTBP[1]# DSTBP[3]#

3
A5 Q1 M26 AC20
10,22 CPU_FERR# FERR# 11 CPU_DINV#1 DINV[1]# DINV[3]# CPU_DINV#3 11
C4 C7 2SK3541
10,22 CPU_IGNNE# IGNNE# THERMTRIP# THERMTRIP# 12,22
1None VRTT 71 CPU_GTLREF AD26 R26 CPU_COMP0
GTLREF COMP[0]
D5 MISC U26 CPU_COMP1

2
10,22 CPU_STPCLK# STPCLK# COMP[1]
D C6 U1 CPU_COMP2 D
H CLK

10,22 CPU_INTR LINT0 TPVIA16 COMP[2]


B4 A22 CLK_166_CPU0+ 6 C26 V1 CPU_COMP3
10,22 CPU_NMI LINT1 BCLK[0] TEST1 COMP[3]
A3 A21 CLK_166_CPU0- 6$V02L11
10,22 CPU_SMI# SMI# BCLK[1]
1 2 D25 E5 CPU_DPRSTP# 10,22,71
AA1 GND1 Reserve -> Mount TEST2 DPRSTP#
B5
RSVD[01] DPSLP# CPU_DPSLP# 10,22
AA4 T22 $V03L05 R68 51 1/16W 5% D24
RSVD[02] RSVD[12] DPWR# CPU_DPWR# 10,11
AB2 10 CPU_BSEL0 B22 D6 CPU_PWRGD 10,22
RSVD[03] Mount -> Reserve BSEL[0] PWRGOOD
TPVIA1

TPVIA2

AA3 GND1 B23 D7


RSVD[04] 5,10 CPU_BSEL1 BSEL[1] SLP# CPU_SLP# 10,11

R69 54.9 1/16W 1%

R70 27.4 1/16W 1%

R71 54.9 1/16W 1%

R72 27.4 1/16W 1%


M4
RSVD[05] RSVD[13]
D2 ※直下に配置(スタブ0とする) 10 CPU_BSEL2 C21
BSEL[2] PSI#
AE6

1
RESERVED

N5 F6
RSVD[06] RSVD[14] Yonah Ball-out Rev 1.0
T2 D3
RSVD[07] RSVD[15] PWR_1.05VMAIN
V3 C1
RSVD[08] RSVD[16]
B2 AF1
RSVD[09] RSVD[17]
C3 D22

2
RSVD[10] RSVD[18] R712 10K 1/16W 5%
C23
RSVD[19]
B25 C24 1 2 None
RSVD[11] RSVD[20]
E E
Yonah Ball-out Rev 1.0 PWR_1.05VMAIN
PSI#_CPU 1 2 PSI# 71
$V02L11
1K 1/16W 0.5%

R711 0 1/16W
Changed part
2

CPU_ADSTB#0 and CPU_ADSTB#1 should be guarded with GND1 respectively. GND1


R73

CPU_DSTBx#[0:3] pair should be guarded with GND1 respectively.


These 4 resistors should be placed within 0.5 inch of CPU.
1

The pattern width of CPU_COMP0/2 is more than 18 mil.


The pattern width of CPU_COMP1/3 is more than 5 mil.
2K 1/16W 1%

These 2 resistors should be placed


1
0.1uF 10V RK

within 0.5" of CPU AD26 pin.


1

None

R74

F F
C28
2

GND1

G [CPU-1] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 7 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
Based on ECRU-050805

IMVP-6
A A
VID6 VID5 VID4 VID3 VID2 VID1 VID0 V

ϕλ M2D 0 0 0 0 0 0 0 1.5000
A4 P6 0 0 0 0 0 0 1 1.4875
VSS[001] VSS[082] 0 0 0 0 0 1 0 1.4750
A8 P21
PWR_CPUCORE PWR_CPUCORE VSS[002] VSS[083] 0 0 0 0 0 1 1 1.4625
A11 P24
VSS[003] VSS[084] 0 0 0 0 1 0 0 1.4500
A14 R2
VSS[004] VSS[085] 0 0 0 0 1 0 1 1.4375
A16 R5
M2C VSS[005] VSS[086] 0 0 0 0 1 1 0 1.4250
A19 R22
VSS[006] VSS[087] 0 0 0 0 1 1 1 1.4125
A7 AB20 A23 R25
VCC[001] VCC[068] VSS[007] VSS[088] 0 0 0 1 0 0 0 1.4000
A9 AB7 A26 T1
VCC[002] VCC[069] VSS[008] VSS[089] 0 0 0 1 0 0 1 1.3875
A10 AC7 B6 T4
VCC[003] VCC[070] VSS[009] VSS[090] 0 0 0 1 0 1 0 1.3750
A12 AC9 B8 T23
VCC[004] VCC[071] VSS[010] VSS[091] 0 0 0 1 0 1 1 1.3625
A13 AC12 B11 T26
VCC[005] VCC[072] VSS[011] VSS[092] 0 0 0 1 1 0 0 1.3500
A15 AC13 B13 U3
VCC[006] VCC[073] VSS[012] VSS[093] 0 0 0 1 1 0 1 1.3375
A17 AC15 B16 U6
B A18
VCC[007] VCC[074]
AC17 B19
VSS[013] VSS[094]
U21 0 0 0 1 1 1 0 1.3250 B
VCC[008] VCC[075] VSS[014] VSS[095] 0 0 0 1 1 1 1 1.3125
A20 AC18 B21 U24
VCC[009] VCC[076] VSS[015] VSS[096] 0 0 1 0 0 0 0 1.3000
B7 AD7 B24 V2
VCC[010] VCC[077] VSS[016] VSS[097] 0 0 1 0 0 0 1 1.2875
B9 AD9 C5 V5
VCC[011] VCC[078] VSS[017] VSS[098] 0 0 1 0 0 1 0 1.2750
B10 AD10 C8 V22
VCC[012] VCC[079] VSS[018] VSS[099] 0 0 1 0 0 1 1 1.2625
B12 AD12 C11 V25
VCC[013] VCC[080] VSS[019] VSS[100] 0 0 1 0 1 0 0 1.2500
B14 AD14 C14 W1
VCC[014] VCC[081] VSS[020] VSS[101] 0 0 1 0 1 0 1 1.2375
B15 AD15 C16 W4
VCC[015] VCC[082] VSS[021] VSS[102] 0 0 1 0 1 1 0 1.2250
B17 AD17 C19 W23
VCC[016] VCC[083] VSS[022] VSS[103] 0 0 1 0 1 1 1 1.2125
B18 AD18 C2 W26
VCC[017] VCC[084] VSS[023] VSS[104] 0 0 1 1 0 0 0 1.2000
B20 AE9 C22 Y3
VCC[018] VCC[085] VSS[024] VSS[105] 0 0 1 1 0 0 1 1.1875
C9 AE10 C25 Y6
VCC[019] VCC[086] VSS[025] VSS[106] 0 0 1 1 0 1 0 1.1750
C10 AE12 D1 Y21
VCC[020] VCC[087] VSS[026] VSS[107] 0 0 1 1 0 1 1 1.1625
C12 AE13 D4 Y24
VCC[021] VCC[088] VSS[027] VSS[108] 0 0 1 1 1 0 0 1.1500
C13 AE15 D8 AA2
VCC[022] VCC[089] VSS[028] VSS[109] 0 0 1 1 1 0 1 1.1375
C15 AE17 D11 AA5
C VCC[023] VCC[090] VSS[029] VSS[110] 0 0 1 1 1 1 0 1.1250 C
C17 AE18 D13 AA8
VCC[024] VCC[091] VSS[030] VSS[111] 0 0 1 1 1 1 1 1.1125
C18 AE20 D16 AA11
VCC[025] VCC[092] VSS[031] VSS[112] 0 1 0 0 0 0 0 1.1000
D9 AF9 D19 AA14
VCC[026] VCC[093] VSS[032] VSS[113] 0 1 0 0 0 0 1 1.0875
D10 AF10 D23 AA16

ϕλ
VCC[027] VCC[094] VSS[033] VSS[114] 0 1 0 0 0 1 0 1.0750
D12 AF12 D26 AA19
VCC[028] VCC[095] VSS[034] VSS[115] 0 1 0 0 0 1 1 1.0625
D14 AF14 E3 AA22
VCC[029] VCC[096] VSS[035] VSS[116] 0 1 0 0 1 0 0 1.0500
D15 AF15 E6 AA25
VCC[030] VCC[097] VSS[036] VSS[117] 0 1 0 0 1 0 1 1.0375
D17 AF17 E8 AB1
VCC[031] VCC[098] PWR_1.05VMAIN VSS[037] VSS[118] 0 1 0 0 1 1 0 1.0250
D18 AF18 E11 AB4
VCC[032] VCC[099] VSS[038] VSS[119] 0 1 0 0 1 1 1 1.0125
E7 AF20 E14 AB8
VCC[033] VCC[100] VSS[039] VSS[120] 0 1 0 1 0 0 0 1.0000
E9 E16 AB11
VCC[034] VSS[040] VSS[121] 0 1 0 1 0 0 1 0.9875
E10 V6 E19 AB13
VCC[035] VCCP[01] VSS[041] VSS[122] 0 1 0 1 0 1 0 0.9750
E12 G21 E21 AB16
VCC[036] VCCP[02] VSS[042] VSS[123] 0 1 0 1 0 1 1 0.9625
E13 J6 E24 AB19
VCC[037] VCCP[03] VSS[043] VSS[124] 0 1 0 1 1 0 0 0.9500
E15 K6 F5 AB23
VCC[038] VCCP[04] VSS[044] VSS[125]
D
E17
E18
VCC[039] VCCP[05]
M6
J21
0.5mm F8
F11
VSS[045] VSS[126]
AB26
AC3
0
0
1
1
0
0
1
1
1
1
0
1
1
0
0.9375
0.9250 D
VCC[040] VCCP[06] VSS[046] VSS[127] 0 1 0 1 1 1 1 0.9125
E20 K21 F13 AC6
VCC[041] VCCP[07] PWR_1.5VMAIN VSS[047] VSS[128] 0 1 1 0 0 0 0 0.9000
F7 M21 F16 AC8
VCC[042] VCCP[08] VSS[048] VSS[129] 0 1 1 0 0 0 1 0.8875
F9 N21 F19 AC11
VCC[043] VCCP[09] VSS[049] VSS[130]

BLM18PG181SN1
F10 N6 F2 AC14 0 1 1 0 0 1 0 0.8750
VCC[044] VCCP[10] VSS[050] VSS[131]

2
F12 R21 F22 AC16 0 1 1 0 0 1 1 0.8625
VCC[045] VCCP[11] VSS[051] VSS[132] 0 1 1 0 1 0 0 0.8500
F14 R6 F25 AC19
VCC[046] VCCP[12] FL56 VSS[052] VSS[133] 0 1 1 0 1 0 1 0.8375
F15 T21 G4 AC21
VCC[047] VCCP[13] VSS[053] VSS[134] 0 1 1 0 1 1 0 0.8250
F17 T6 G1 AC24
VCC[048] VCCP[14] VSS[054] VSS[135] 0 1 1 0 1 1 1 0.8125
F18 V21 G23 AD2
VCC[049] VCCP[15] VSS[055] VSS[136] 0 1 1 1 0 0 0 0.8000
F20 W21 G26 AD5
1
VCC[050] VCCP[16] VSS[056] VSS[137] 0 1 1 1 0 0 1 0.7875
AA7 H3 AD8
VCC[051] VSS[057] VSS[138] 0 1 1 1 0 1 0 0.7750
AA9 B26 H6 AD11
VCC[052] VCCA VSS[058] VSS[139] 0 1 1 1 0 1 1 0.7625
AA10 H21 AD13
VCC[053] VSS[059] VSS[140]
0.01uF 25V RK

0 1 1 1 1 0 0 0.7500
10uF 6.3V 2012 RM

AA12 H24 AD16


VCC[054] VSS[060] VSS[141]
2

AA13 AD6 J2 AD19 0 1 1 1 1 0 1 0.7375


VCC[055] VID[0] VID0 71 VSS[061] VSS[142] 0 1 1 1 1 1 0 0.7250
E AA15 AF5 VID1 71 J5 AD22 E
VCC[056] VID[1] VSS[062] VSS[143] 0 1 1 1 1 1 1 0.7125
AA17 AE5 VID2 71 J22 AD25
1

VCC[057] VID[2] VSS[063] VSS[144]


C29

C30

AA18 AF4 J25 AE1 1 0 0 0 0 0 0 0.7000


VCC[058] VID[3] VID3 71 VSS[064] VSS[145] 1 0 0 0 0 0 1 0.6875
AA20 AE3 VID4 71 K1 AE4
VCC[059] VID[4] VSS[065] VSS[146] 1 0 0 0 0 1 0 0.6750
AB9 AF2 VID5 71 K4 AE8
VCC[060] VID[5] PWR_CPUCORE VSS[066] VSS[147] 1 0 0 0 0 1 1 0.6625
AC10 AE2 VID6 71 K23 AE11
VCC[061] VID[6] VSS[067] VSS[148] 1 0 0 0 1 0 0 0.6500
AB10 K26 AE14
VCC[062] VSS[068] VSS[149] 1 0 0 0 1 0 1 0.6375
AB12 L3 AE16
VCC[063] GND1 VSS[069] VSS[150] 1 0 0 0 1 1 0 0.6250
AB14 AF7 2 1 L6 AE19
VCC[064] VCCSENSE R75 100 1/16W 1% VSS[070] VSS[151] 1 0 0 0 1 1 1 0.6125
AB15 L21 AE23
VCC[065] VSS[071] VSS[152] 1 0 0 1 0 0 0 0.6000
AB17 L24 AE26
VCC[066] VSS[072] VSS[153] 1 0 0 1 0 0 1 0.5875
AB18 AE7 2 1 M2 AF3
VCC[067] VSSSENSE R76 100 1/16W 1% VSS[073] VSS[154] 1 0 0 1 0 1 0 0.5750
M5 AF6
Yonah Ball-out Rev 1.0 VSS[074] VSS[155] 1 0 0 1 0 1 1 0.5625
M22 AF8
VSS[075] VSS[156] 1 0 0 1 1 0 0 0.5500
M25 AF11
VSS[076] VSS[157] 1 0 0 1 1 0 1 0.5375
N1 AF13
GND1 VSS[077] VSS[158] 1 0 0 1 1 1 0 0.5250
CPU_VCCSENSE 71 N4 AF16
F N23
VSS[078] VSS[159]
AF19 1 0 0 1 1 1 1 0.5125 F
VSS[079] VSS[160] 1 0 1 0 0 0 0 0.5000
N26 AF21
VSS[080] VSS[161]
CPU_VSSSENSE 71 P3 AF24
VSS[081] VSS[162]
Yonah Ball-out Rev 1.0 1 1 1 1 1 1 1 0.0000

VCCSENSE, VSSSENSEは線幅0.2mmでかつ平行に配線すること。
GND1 GND1

G [CPU-2 Power/GND] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 8 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
F
E
B
A

D
C

1
1

Fujitsu
CPU

Proprietary& Confidential
Yonah
1 2
1 2 2 1 1 2 2 1
C73 0.1uF 10V RK
C62 22uF 6.3V 2012 RM C52 22uF 6.3V 2012 RM C42 22uF 6.3V 2012 RM C31 22uF 6.3V 2012 RM
2 1
2 1 1 2 1 2 2 1
C74 0.1uF 10V RK

2
2

C63 22uF 6.3V 2012 RM C53 22uF 6.3V 2012 RM C43 22uF 6.3V 2012 RM C32 22uF 6.3V 2012 RM
2 1
1 2 2 1 1 2 2 1
C75 0.1uF 10V RK
C64 22uF 6.3V 2012 RM C54 22uF 6.3V 2012 RM C44 22uF 6.3V 2012 RM C33 22uF 6.3V 2012 RM
1 2
2 1 1 2 1 2 2 1
C76 0.1uF 10V RK
C65 22uF 6.3V 2012 RM C55 22uF 6.3V 2012 RM C45 22uF 6.3V 2012 RM C34 22uF 6.3V 2012 RM
2 1
1 2 2 1 1 2 2 1
C77 0.1uF 10V RK
C66 22uF 6.3V 2012 RM C56 22uF 6.3V 2012 RM C46 22uF 6.3V 2012 RM C35 22uF 6.3V 2012 RM
1 2
2 1 1 2 1 2 2 1
C78 0.1uF 10V RK
C67 22uF 6.3V 2012 RM C57 22uF 6.3V 2012 RM C47 22uF 6.3V 2012 RM C36 22uF 6.3V 2012 RM

3
3

1 2 2 1 1 2 2 1

C68 22uF 6.3V 2012 RM C58 22uF 6.3V 2012 RM C48 22uF 6.3V 2012 RM C37 22uF 6.3V 2012 RM
2 1 None
$V02L08

C984 10uF 6.3V 2012 RM

2 1 None

C985 10uF 6.3V 2012 RM


Changed connection

1 2 2 1 1 2 2 1

C980 0.1uF 10V RK C976 0.1uF 10V RK C972 0.1uF 10V RK C968 0.1uF 10V RK

1 2 2 1 1 2 2 1

C981 0.1uF 10V RK C977 0.1uF 10V RK C973 0.1uF 10V RK C969 0.1uF 10V RK

4
4

1 2 2 1 1 2 1 2

C982 0.1uF 10V RK C978 0.1uF 10V RK C974 0.1uF 10V RK C970 0.1uF 10V RK

GND1
1 2 1 2 1 2 2 1

C983 0.1uF 10V RK C979 0.1uF 10V RK C975 0.1uF 10V RK C971 0.1uF 10V RK

上記のコンデンサはCPUの各電源ピンの近傍に配置すること。
PWR_1.05VMAIN
GND1

5
5

PWR_CPUCORE

6
6

DATE
REV. DATE
2006.01.26
DESIGN 1 2 2 1
DESIGN
GND1

R707 None C79 None


10 1/16W 5% 0.1uF 10V RK
CHECK
PWR_CPUCORE

7
7

Seki

7x 10uF + 3x 0.1uF
APPR.

2 1 1 2
GND1

R708 None C80 None


CHECK

10 1/16W 5% 0.1uF 10V RK 7x 10uF + 3x 0.1uF


4隅に配置すること

PWR_CPUCORE

Yamada

1 2 2 1
GND1

R709 None C81 None


CPU Socket

APPR.

10 1/16W 5% 0.1uF 10V RK


Secondary Side

PWR_CPUCORE

8
8

DESCRIPTION
場所、数について要相談。

7x 10uF + 3x 0.1uF
Miura

1 2 2 1
※下記の抵抗/コンデンサの組については、

GND1

R710 None C82 None


CPU直下,L1層のPWR_CPUCOREのプレーンの

10 1/16W 5% 0.1uF 10V RK


7x 10uF + 3x 0.1uF
PWR_CPUCORE

TITLE
DRAW.
NO.

9
9

FUJITSU LTD.
C1CP272450-X3

9
CORE電源のコンデンサについて配置が困難な場合は、

SHEET
GILIA Main Board Rev.03

91
[CPU3 CAP]
Based on ECRU-050805

CUST.
F
E
B
A

D
C

G
Nile
1 2 3 4 5 6 7 8 9
Nile
Based on ECRU-050805
PWR_1.05VMAIN

A FSB A
Frequency BSEL 2 BSEL 1 BSEL 0
R77 200 1/16W 5%
7,22 CPU_PWRGD
1 2 533MHz L L H
None
667MHz L H H
R78 56 1/16W 5%
2 1
7 CPU_IERR#
CPU BSEL2 BSEL1 BSEL0
PWR_1.05VMAIN CK410M FSC FSB FSA
R79 56 1/16W 5% 100MHz H L H
7 CPU_PROCHOT# 1 2
133MHz L L H
B 166MHz L H H B
※CPUコネクタの 近くに置くこと

1
2
3
4
$V02L01

SMT8
PWR_1.05VMAIN
Changed part RM2
R80 1K 1/16W 5%
2 1 330x4 1/16W 5%
7 ITP_BPM#
RM3

8
7
6
5
7 ITP_TDI 1 8
7 ITP_TMS 2 7 ※ピンスワップ可
7 ITP_TRST# 3 6
4 5 RM4
7 ITP_TCK
1 8
C 2 7 C
5,7 CPU_BSEL1 MCH_BSEL1 12
10x4 1/16W 5% 3 6
7 CPU_BSEL0 MCH_BSEL0 12
7 CPU_BSEL2 4 5 MCH_BSEL2 12
GND1 SMT8
0x4 1/16W

PWR_1.05VMAIN
$V02L01
Changed parts
R81 56 1/16W 5%
2 1
7,22 CPU_FERR#
D D
※ICH7Mの近くに配置すること

7,22 CPU_A20M#

7,22 CPU_IGNNE#

7,11 CPU_SLP#

7,22 CPU_DPSLP#

7,22,71 CPU_DPRSTP#
C1075 None

C1076 None

C1077 None

C1078 None

C1079 None
100pF 25V AJ

100pF 25V AJ

100pF 25V AJ

100pF 25V AJ

100pF 25V AJ

E E
2

$V02L01 PWR_1.05VMAIN

Added parts
1

2200pF 25V RK
※CPUの端子直近に配置すること PWR_1.05VMAIN

None
C83
100pF 25V AJ
2

None

1
GND1

C84
7 CPU_IERR#

1
7,11 CPU_DPWR# 7,22 CPU_PWRGD

100pF 25V AJ
7,22 CPU_FERR#

2200pF 25V RK
7,22 CPU_STPCLK#

C85

100pF 25V AJ
1

1
7,22 CPU_INIT#

1
F F

None
C86

C87
7,11 CPU_RST#

2
7,22 CPU_SMI#
GND1
7,22 CPU_NMI
GND1 GND1
7,22 CPU_INTR
C88 None

C89 None

C90 None

C91 None

C92 None

C93 None

C94 None
100pF 25V AJ

100pF 25V AJ

100pF 25V AJ

100pF 25V AJ

100pF 25V AJ

100pF 25V AJ

100pF 25V AJ
1

1
2

G [CPU-4 Pull-up/Pull-down] G
TITLE
GILIA Main Board Rev.03
Fujitsu GND1 DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 10 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
Based on ECRU-050805

7 CPU_D#[0:63]
M3A
CPU_A#[3:31] 7
A CPU_D#0 F1 H9 CPU_A#3 A
H_D#_0 H_A#_3
CPU_D#1 J1 C9 CPU_A#4
H_D#_1 H_A#_4
CPU_D#2 H1 E11 CPU_A#5
H_D#_2 H_A#_5
CPU_D#3 J6 G11 CPU_A#6
H_D#_3 H_A#_6
CPU_D#4 H3 F11 CPU_A#7
H_D#_4 H_A#_7
CPU_D#5 K2 G12 CPU_A#8
H_D#_5 H_A#_8
CPU_D#6 G1 F9 CPU_A#9
H_D#_6 H_A#_9
CPU_D#7 G2 H11 CPU_A#10
H_D#_7 H_A#_10
CPU_D#8 K9 J12 CPU_A#11
H_D#_8 H_A#_11
CPU_D#9 K1 G14 CPU_A#12
H_D#_9 H_A#_12
CPU_D#10 K7 D9 CPU_A#13
H_D#_10 H_A#_13
CPU_D#11 J8 J14 CPU_A#14
H_D#_11 H_A#_14
CPU_D#12 H4 H13 CPU_A#15
H_D#_12 H_A#_15
CPU_D#13 J3 J15 CPU_A#16
H_D#_13 H_A#_16
CPU_D#14 K11 F14 CPU_A#17
H_D#_14 H_A#_17
CPU_D#15 G4 D12 CPU_A#18
H_D#_15 H_A#_18
CPU_D#16 T10 A11 CPU_A#19
B W11
H_D#_16 H_A#_19
C11
B
CPU_D#17 CPU_A#20
H_D#_17 H_A#_20
CPU_D#18 T3 A12 CPU_A#21
H_D#_18 H_A#_21
CPU_D#19 U7 A13 CPU_A#22
H_D#_19 H_A#_22
CPU_D#20 U9 E13 CPU_A#23
H_D#_20 H_A#_23
CPU_D#21 U11 G13 CPU_A#24
H_D#_21 H_A#_24
CPU_D#22 T11 F12 CPU_A#25
H_D#_22 H_A#_25
CPU_D#23 W9 B12 CPU_A#26
CPU_D#24 H_D#_23 H_A#_26 PWR_1.05VMAIN
T1 B14 CPU_A#27
CPU_D#25 H_D#_24 H_A#_27
T8 C12 CPU_A#28
CPU_D#26 H_D#_25 H_A#_28
T4 A14 CPU_A#29
H_D#_26 H_A#_29

100 1/16W 1%
CPU_D#27 W7 C14 CPU_A#30
H_D#_27 H_A#_30

1
CPU_D#28 U5 D14 CPU_A#31
CPU_D#29 H_D#_28 H_A#_31
T9
CPU_D#30 H_D#_29
W6 E8
H_D#_30 H_ADS# CPU_ADS# 7

R82
CPU_D#31 T5 B9
H_D#_31 H_ADSTB#_0 CPU_ADSTB#0 7
CPU_D#32 AB7 C13 CPU_ADSTB#1 7

2
C CPU_D#33 H_D#_32 H_ADSTB#_1 C
AA9 J13 CPU_VREF
H_D#_33 H_VREF_0

HOST
CPU_D#34 W4 C6
CPU_D#35 H_D#_34 H_BNR# CPU_BNR# 7

0.1uF 10V RK
W3 F6
H_D#_35 H_BPRI# CPU_BPRI# 7

200 1/16W 1%
CPU_D#36 Y3 C7
H_D#_36 H_BREQ#0 CPU_BREQ#0 7

1
CPU_D#37 Y7 B7
CPU_D#38 H_D#_37 H_CPURST# CPU_RST# 7,10
W5 A7 CPU_DBSY# 7
H_D#_38 H_DBSY#

C95
CPU_D#39 Y10 C3

2
H_D#_39 H_DEFER# CPU_DEFER# 7

R83
CPU_D#40 AB8 J9

2
CPU_D#41 H_D#_40 H_DPWR# CPU_DPWR# 7,10
W2 H8 CPU_DRDY# 7
CPU_D#42 H_D#_41 H_DRDY#
AA4 K13
CPU_D#43 H_D#_42 H_VREF_1
AA7
CPU_D#44 H_D#_43
AA2 J7 CPU_DINV#0 7
CPU_D#45 H_D#_44 H_DINV#_0
AA6 W8 CPU_DINV#1 7
CPU_D#46 H_D#_45 H_DINV#_1
AA10 U3 CPU_DINV#2 7
CPU_D#47 H_D#_46 H_DINV#_2 GND1
Y8 AB10 CPU_DINV#3 7
CPU_D#48 H_D#_47 H_DINV#_3
AA1
H_D#_48
D CPU_D#49 AB4
H_D#_49 H_DSTBN#_0
K4 CPU_DSTBN#0 7 D
CPU_D#50 AC9 T7
H_D#_50 H_DSTBN#_1 CPU_DSTBN#1 7
CPU_D#51 AB11 Y5
H_D#_51 H_DSTBN#_2 CPU_DSTBN#2 7
CPU_D#52 AC11 AC4
H_D#_52 H_DSTBN#_3 CPU_DSTBN#3 7
CPU_D#53 AB3
CPU_D#54 H_D#_53
AC2 K3 CPU_DSTBP#0 7
PWR_1.05VMAIN CPU_D#55 H_D#_54 H_DSTBP#_0
AD1 T6 CPU_DSTBP#1 7
PWR_1.05VMAIN CPU_D#56 H_D#_55 H_DSTBP#_1
AD9 AA5 CPU_DSTBP#2 7
CPU_D#57 H_D#_56 H_DSTBP#_2
AC1 AC5 CPU_DSTBP#3 7
CPU_D#58 H_D#_57 H_DSTBP#_3
AD7
CPU_D#59 H_D#_58
#08/04 AC6
H_D#_59
54.9 1/16W 1%

54.9 1/16W 1%
220 1/16W 1%

220 1/16W 1%

CPU_D#60 AB5 D3
H_D#_60 H_HIT# CPU_HIT# 7
1

実は221が推奨 CPU_D#61 AD10


H_D#_61 H_HITM#
D4
CPU_HITM# 7
CPU_D#62 AD4 B3
H_D#_62 H_LOCK# CPU_LOCK# 7
R84

R85

CPU_D#63 AC8
H_D#_63
R86

R87

E E1 E
2

H_XRCOMP CPU_REQ#[0:4] 7
CPU_XSCOMP E2 D8 CPU_REQ#0
H_XSCOMP H_REQ#_0
CPU_XSWING E4 G8 CPU_REQ#1
H_XSWING H_REQ#_1
B8 CPU_REQ#2
H_REQ#_2
Y1 F8 CPU_REQ#3
CPU_YSCOMP H_YRCOMP H_REQ#_3
U1 A8 CPU_REQ#4
H_YSCOMP H_REQ#_4
CPU_YSWING W1
H_YSWING CPU_RS#[0:2] 7
B4 CPU_RS#0
H_RS#_0
AG2 E6 CPU_RS#1
6 CLK_166_CPU1+ H_CLKIN H_RS#_1
100 1/16W 1%

100 1/16W 1%
0.1uF 10V RK

0.1uF 10V RK

AG1 D6 CPU_RS#2
6 CLK_166_CPU1- H_CLKIN# H_RS#_2
1

1 CPU_XRCOMP

CPU_YRCOMP
1

1
R88

R89

E3
H_SLPCPU# CPU_SLP# 7,10
C96

C97

E7
H_TRDY# CPU_TRDY# 7
※直下に配置(スタブ0とする)
2

TPVIA3

TPVIA4

CALISTOGA_1p0
2

UNDECIDED
F F
24.9 1/16W 1%

24.9 1/16W 1%
1

GND1
CPU_ADSTB#0 and CPU_ADSTB#1 should be guarded with GND1 respectively.
R90

R91

These resistors and capacitors should be placed CPU_DSTBx#[0:3] pair should be guarded with GND1 respectively.
2

within 3 inches of GMCH.


GND1

G [GMCH-1] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 11 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
M3B

TPVIA17 GMCH_CFG3 T32 AY35


RSVD_1 SM_CK_0 M_CLK_DDR0 19
R32 AR1
TPVIA18 RSVD_2 SM_CK_1 M_CLK_DDR1 19
GMCH_CFG4 F3 AW7
RSVD_3 SM_CK_2 M_CLK_DDR2 20
A F7 AW40 A
RSVD_4 SM_CK_3 M_CLK_DDR3 20

RSVD
TPVIA19 GMCH_CFG5 AG11 Layout Note:
RSVD_5
AF11 AW35
TPVIA20 RSVD_6 SM_CK#_0 M_CLK_DDR#0 19 Place these 4 resistors
GMCH_CFG6 H7 AT1
RSVD_7 SM_CK#_1 M_CLK_DDR#1 19
J19 AY7 colse to GMCH
TPVIA21 RSVD_8 SM_CK#_2 M_CLK_DDR#2 20
GMCH_CFG7 K30 AY40
RSVD_9 SM_CK#_3 M_CLK_DDR#3 20
J29
TPVIA22 RSVD_10
GMCH_CFG8 A41 AU20
RSVD_11 SM_CKE_0 M_CKE0 19,21
A35 AT20 1 2
TPVIA23 RSVD_12 SM_CKE_1 M_CKE1 19,21 None R92 40.2 1/16W 1%
GMCH_CFG9 A34 BA29
RSVD_13 SM_CKE_2 M_CKE2 20,21
D28 AY29 2 1
TPVIA24 RSVD_14 SM_CKE_3 M_CKE3 20,21 None R93 40.2 1/16W 1%
GMCH_CFG10 D27
RSVD_15
AW13
TPVIA25 SM_CS#_0 M_CS#0 19,21
GMCH_CFG12 AW12

MUXING
SM_CS#_1 M_CS#1 19,21 GND1
10 MCH_BSEL0 K16 AY21
TPVIA26 CFG_0 SM_CS#_2 M_CS#2 20,21
GMCH_CFG13 10 MCH_BSEL1 K18 AW21
CFG_1 SM_CS#_3 M_CS#3 20,21
J18
B TPVIA27
10 MCH_BSEL2
F18
CFG_2
AL20 PWR_1.8VSUS
B
GMCH_CFG14 GMCH_CFG3 M_OCDCOMP0
CFG_3 SM_OCDCOMP_0
GMCH_CFG4 E15 AF10 M_OCDCOMP1
TPVIA28 CFG_4 SM_OCDCOMP_1
GMCH_CFG15 GMCH_CFG5 F15
CFG_5
#SEAWINDのCFG9にPullDown有り。 GMCH_CFG6 E18
CFG_6 SM_ODT_0
BA13
M_ODT0 19,21
TPVIA29 GMCH_CFG17 GMCH_CFG7 D19 BA12 M_RCOMP# 1 2
0に設定するとPEGの15と0が反転するのでは? GMCH_CFG8 D16
CFG_7 SM_ODT_1
AY20
M_ODT1 19,21 R94 80.6 1/16W 1%
(EDS V1.5) CFG_8 SM_ODT_2 M_ODT2 20,21

CFG
TPVIA30 GMCH_CFG18 GMCH_CFG9 G16 AU21 M_RCOMP 1 2
CFG_9 SM_ODT_3 M_ODT3 20,21

DDR
GMCH_CFG10 E16 R95 80.6 1/16W 1%
TPVIA31 CFG_10
GMCH_CFG19 2 1 CFG11 D15 AV9
R96 CFG_11 SM_RCOMP# GND1
GMCH_CFG12 G15 AT9
TPVIA32 2.2K 1/16W 5% CFG_12 SM_RCOMP
GMCH_CFG20 GMCH_CFG13 K15
GND1 None CFG_13
GMCH_CFG14 C15 AK1 REF_SM 19,20,30,76
CFG_14 SM_VREF_0
GMCH_CFG15 H16 AK41
CFG_15 SM_VREF_1
2 1 CFG16 G18
CFG_16

C994 10uF 6.3V 2012 RM


R97 2.2K 1/16W 5% GMCH_CFG17 H15
CFG_17

None
None

0.1uF 10V RK

0.1uF 10V RK
GMCH_CFG18 J25 AF33 CLK_100_3GPLL- 6
C CFG_18 G_CLKIN# C
GMCH_CFG19 K27 AG33 CLK_100_3GPLL+ 6
CFG_19 G_CLKIN

1
J26 A27

CLK
GMCH_CFG20 CLK_96_DREF- 6
CFG_20 D_REFCLKIN#

2
A26 CLK_96_DREF+ 6
D_REFCLKIN

C98

C99
23 PM_BMBUSY# G28 C40 CLK_DREFSSC- 6

2
PM_BMBUSY# D_REFSSCLKIN#
PM_EXTTS#0 F25 D41 CLK_DREFSSC+ 6

1
PM_EXTTS#_0 D_REFSSCLKIN

PM
PM_EXTTS#1 H26
PM_EXTTS#_1
7,22 THERMTRIP# G6
PM_THRMTRIP#
PWROK_3VMAIN AH33 AE35 DMI_TXN0 DMI_TXN0 23
PWROK DMI_RXN_0
PLT_RST_GMCH AH34 AF39 DMI_TXN1 DMI_TXN1 23
RSTIN# DMI_RXN_1
None

TPVIA5

TPVIA6

TPVIA7
100pF 25V AJ

AG35 DMI_TXN2 GND1


DMI_RXN_2 DMI_TXN2 23
AH39 DMI_TXN3 GND1
DMI_RXN_3 DMI_TXN3 23
2

MISC

TPVIA8

TPVIA9

TPVIA10
50 SDVO_CTRLCLK H28
SDVO_CTRLCLK
C100

50 SDVO_CTRLDATA H27
SDVO_CTRLDATA
K28 AC35 DMI_TXP0 ※上記のコンデンサは端子直近に配置すること。
1

23 MCH_ICH_SYNC# ICH_SYNC# DMI_RXP_0 DMI_TXP0 23


H32 AE39 DMI_TXP1 DMI_TXP1 23
5 PLL_CLKREQ#_GMCH CLK_REQ# DMI_RXP_1
AF35 DMI_TXP2 DMI_TXP2 23
DMI_RXP_2
D D1
NC0 DMI_RXP_3
AG39 DMI_TXP3 DMI_TXP3 23 ※直下に配置(スタブ0とする) D
GND1 C41
NC1
C1
NC2
BA41 AE37 DMI_RXN0 DMI_RXN0 23
NC3 DMI_TXN_0
23,26,28,37,46 PWROK_3VMAIN PWROK_3VMAIN BA40 AF41 DMI_RXN1 DMI_RXN1 23
NC4 DMI_TXN_1

NC
BA39 AG37 DMI_RXN2 DMI_RXN2 23
R100 100 1/16W 5% NC5 DMI_TXN_2
BA3 AH41 DMI_RXN3 DMI_RXN3 23
NC6 DMI_TXN_3

DMI
23,29,30,34,36,42,44,45,50,51,64,83 PLT_RST# 2 1 PLT_RST_GMCH BA2
NC7
BA1
NC8
1000pF 25V RK

1000pF 25V RK

B41 AC37 DMI_RXP0 DMI_RXP0 23


NC9 DMI_TXP_0
C992 None
C991 None

B2 AE41 DMI_RXP1 DMI_RXP1 23


NC10 DMI_TXP_1
2

AY41 AF37 DMI_RXP2 DMI_RXP2 23


NC11 DMI_TXP_2
AY1 AG41 DMI_RXP3 DMI_RXP3 23
NC12 DMI_TXP_3 PWR_3VMAIN
AW41
1

NC13
AW1 $V01L08
NC14
A40
NC15 Mount -> Reserve R102
E A4 E
NC16
A39 $V02LL08
NC17

10K 1/16W 5%

10K 1/16W 5%
※本枠内の部品は端子直近に配置すること。 A3
NC18

1
Mount -> Reserve R101

None

None
GND1 CALISTOGA_1p0
CFG[17:3] --- Int. Pull Up
GMCH Strapping Option CFG[20:18] --- Int. Pull Down
UNDECIDED

R101

R102
2

2
PIN Function PM_EXTTS#1 2 1 DPRSLPVR_ICH 23,26
CFG5 Low = DMI x 2 AWS86
R1005-0.09
(DMI x2 Select) High = DMI x 4 (Default)
CFG6 Low = Reserved PM_EXTTS#0 2
AWS87
1 DIMM_THRMSD 19,20
(Calistoga Select) High = Calistoga (Default) R1005-0.09
F F
CFG7 Low = Reserved
(CPU Strap) High = Mobile CPU (Default) $V03L03 $V01L08
CFG9 Low = Reverse Lanes Changed part to pad Changed connection
(PCI-E Lane Reversal) High = Normal operation (Default)
CFG11 Low = FSB x 4
(FSB x4 Select) High = FSB x 8 (Default)
CFG16 Low = Dynamic ODT Disabled
(FSB Dynamic ODT) High = Dynamic ODT Enabled (Default)
CFG18 Low = 1.05V (Default)
(VCC Select) High = 1.5V
G
CFG19
(DMI Lane Reversal)
Low = Normal (Default)
High = Reverse Lanes [GMCH-2] G

CFG20 Low = Only SDVO or PCI-E x1 Operational (Default) TITLE


GILIA Main Board Rev.03
Fujitsu (SDVO/PCIe concurrent) High = SDVO and PCIE x1 are Operating simultaneously DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 12 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
37 GM_BL_VOL Layout Note: Based on ECRU-050805
46 GM_BLEN Place these resistors
1 2 colse to GMCH
R103 100K 1/16W 5% None PWR_1.5V_PCIE

A 1 2 R105 A
R104 100K 1/16W 0.5% M3C 24.9 1/16W 1% EXP_A_TXN0 C101 1 2 0.1uF 10V RK PEG_TXN0 64
PWR_3VMAIN 本当は1%でもよい D32
L_BKLTCTL EXP_A_COMPI
D40 2 1 EXTVGA
RM5 GND1 J30 D38 EXP_A_TXP0 C102 1 2 0.1uF 10V RK
L_BKLTEN EXP_A_COMPO PEG_TXP0 64
5 4 H30 EXTVGA
L_CLKCTLA
6 3 H29 F34 PEG_RXN0 64
L_CLKCTLB EXP_A_RXN_0 EXP_A_TXN1 C103
7 2 G26 G38 PEG_RXN1 64 1 2 0.1uF 10V RK PEG_TXN1 64
L_DDC_CLK EXP_A_RXN_1 EXTVGA
8 1 G25 H34 PEG_RXN2 64
L_DDC_DATA EXP_A_RXN_2 EXP_A_TXP1 C104
L_IBG B38 J38 PEG_RXN3 64 1 2 0.1uF 10V RK PEG_TXP1 64
10Kx4 1/16W 5% L_IBG EXP_A_RXN_3 EXTVGA
C35 L34 PEG_RXN4 64
L_VBG EXP_A_RXN_4
37 GM_LCDON F32 M38 PEG_RXN5 64
L_VDDEN EXP_A_RXN_5 EXP_A_TXN2 C105 2 0.1uF 10V RK

1.2K 1/16W 0.5%


C33 N34 PEG_RXN6 64 1 PEG_TXN2 64
L_VREFH EXP_A_RXN_6 EXTVGA
C32 P38 PEG_RXN7 64
1 L_VREFL EXP_A_RXN_7

2
R34 EXP_A_TXP2 C106 1 2 0.1uF 10V RK
EXP_A_RXN_8 PEG_RXN8 64 PEG_TXP2 64
R107 A33 T38 EXTVGA
55 LVDS_LC-_GMCH LA_CLK# EXP_A_RXN_9 PEG_RXN9 64
4.7K 1/16W 5% A32 V34
55 LVDS_LC+_GMCH LA_CLK EXP_A_RXN_10 PEG_RXN10 64

R106
GND1 E27 W38 EXP_A_TXN3 C107 1 2 0.1uF 10V RK
B 55 LVDS_UC-_GMCH
E26
LB_CLK# EXP_A_RXN_11
Y34
PEG_RXN11 64
EXTVGA
PEG_TXN3 64 B
2

1 55 LVDS_UC+_GMCH LB_CLK EXP_A_RXN_12 PEG_RXN12 64


$V03L05 AA38 EXP_A_TXP3 C108 1 2 0.1uF 10V RK
EXP_A_RXN_13 PEG_RXN13 64 PEG_TXP3 64

LVDS
C37 AB34 EXTVGA
Changed part 55 LVDS_L0-_GMCH LA_DATA#_0 EXP_A_RXN_14 PEG_RXN14 64
B35 AC38 PEG_RXN15 64
GND1 GND1 55 LVDS_L1-_GMCH LA_DATA#_1 EXP_A_RXN_15 EXP_A_TXN4 C109
A37 1 2 0.1uF 10V RK PEG_TXN4 64
55 LVDS_L2-_GMCH LA_DATA#_2 EXTVGA
D34 PEG_RXP0 64
EXP_A_RXP_0

GRAPHICS
F38 EXP_A_TXP4 C110 1 2 0.1uF 10V RK
EXP_A_RXP_1 PEG_RXP1 64 PEG_TXP4 64
G34 EXTVGA
EXP_A_RXP_2 PEG_RXP2 64
B37 H38 PEG_RXP3 64
55 LVDS_L0+_GMCH LA_DATA_0 EXP_A_RXP_3 EXP_A_TXN5 C111
B34 J34 PEG_RXP4 64 1 2 0.1uF 10V RK PEG_TXN5 64
55 LVDS_L1+_GMCH LA_DATA_1 EXP_A_RXP_4 EXTVGA
A36 L38 PEG_RXP5 64
55 LVDS_L2+_GMCH LA_DATA_2 EXP_A_RXP_5 EXP_A_TXP5 C112
M34 PEG_RXP6 64 1 2 0.1uF 10V RK PEG_TXP5 64
EXP_A_RXP_6 EXTVGA
N38 PEG_RXP7 64
EXP_A_RXP_7
TV_CVBS_GMCH G30 P34 PEG_RXP8 64
55 LVDS_U0-_GMCH LB_DATA#_0 EXP_A_RXP_8 EXP_A_TXN6 C113
D30 R38 PEG_RXP9 64 1 2 0.1uF 10V RK PEG_TXN6 64
55 LVDS_U1-_GMCH LB_DATA#_1 EXP_A_RXP_9 EXTVGA
TV_S_Y_GMCH F29 T34 PEG_RXP10 64
C 55 LVDS_U2-_GMCH LB_DATA#_2 EXP_A_RXP_10 EXP_A_TXP6 C114 C
V38 PEG_RXP11 64 1 2 0.1uF 10V RK PEG_TXP6 64
EXP_A_RXP_11 EXTVGA
TV_S_C_GMCH W34 PEG_RXP12 64
EXP_A_RXP_12
S-OUT(GMCH)#

Y38 PEG_RXP13 64
EXP_A_RXP_13
75 1/16W 1%

F30 AA34 EXP_A_TXN7 C115 1 2 0.1uF 10V RK


55 LVDS_U0+_GMCH LB_DATA_0 EXP_A_RXP_14 PEG_RXP14 64 PEG_TXN7 64
1

PCI-EXPRESS
150 1/16W 1%

150 1/16W 1%

D29 AB38 EXTVGA


55 LVDS_U1+_GMCH LB_DATA_1 EXP_A_RXP_15 PEG_RXP15 64
F28 EXP_A_TXP7 C116 1 2 0.1uF 10V RK
55 LVDS_U2+_GMCH LB_DATA_2 PEG_TXP7 64
R108

F36 EXP_A_TXN0 1 2 C117 0.1uF 10V RK SDVO EXTVGA


EXP_A_TXN_0 SDVOB_RED# 50
G40 EXP_A_TXN1 1 2 C118 0.1uF 10V RK SDVO
EXP_A_TXN_1 SDVOB_GREEN# 50
R109

R110

H36 EXP_A_TXN2 1 2 C119 0.1uF 10V RK SDVO EXP_A_TXN8 C120 1 2 0.1uF 10V RK
2

EXP_A_TXN_2 SDVOB_BLUE# 50 PEG_TXN8 64


J40 EXP_A_TXN3 1 2 C121 0.1uF 10V RK SDVO EXTVGA
EXP_A_TXN_3 SDVOB_CLK- 50
TV_CVBS_GMCH A16 L36 EXP_A_TXN4 EXP_A_TXP8 C122 1 2 0.1uF 10V RK
TV_DACA_OUT EXP_A_TXN_4 PEG_TXP8 64
TV_S_Y_GMCH C18 M40 EXP_A_TXN5 EXTVGA
GND1 GND1 GND1 55 TV_S_Y_GMCH TV_DACB_OUT EXP_A_TXN_5
TV_S_C_GMCH A19 N36 EXP_A_TXN6
55 TV_S_C_GMCH TV_DACC_OUT EXP_A_TXN_6

TV
P40 EXP_A_TXN7 EXP_A_TXN9 C123 1 2 0.1uF 10V RK
EXP_A_TXN_7 PEG_TXN9 64
1 2 J20 R36 EXP_A_TXN8 EXTVGA
R111 TV_IREF EXP_A_TXN_8 EXP_A_TXP9 C124
B16 T40 EXP_A_TXN9 1 2 0.1uF 10V RK PEG_TXP9 64
TV_IRTNA EXP_A_TXN_9
D $V01L07 4.99k 1/16W 0.5% B18
TV_IRTNB EXP_A_TXN_10
V36 EXP_A_TXN10 EXTVGA D
B19 W40 EXP_A_TXN11
Changed part TV_IRTNC EXP_A_TXN_11
Y36 EXP_A_TXN12 EXP_A_TXN10 C125 1 2 0.1uF 10V RK
EXP_A_TXN_12 PEG_TXN10 64
AA40 EXP_A_TXN13 EXTVGA
GND1 EXP_A_TXN_13 EXP_A_TXP10 C126
AB36 EXP_A_TXN14 1 2 0.1uF 10V RK PEG_TXP10 64
EXP_A_TXN_14 EXTVGA
AC40 EXP_A_TXN15
EXP_A_TXN_15
E23 D36 EXP_A_TXP0 1 2 C127 0.1uF 10V RK SDVO EXP_A_TXN11 C128 1 2 0.1uF 10V RK
54 CRT_BLUE_GMCH CRT_BLUE EXP_A_TXP_0 SDVOB_RED 50 PEG_TXN11 64
D23 F40 EXP_A_TXP1 1 2 C129 0.1uF 10V RK SDVO EXTVGA
54 CRT_GREEN_GMCH CRT_BLUE# EXP_A_TXP_1 SDVOB_GREEN 50
C22 G36 EXP_A_TXP2 1 2 C130 0.1uF 10V RK SDVO EXP_A_TXP11 C131 1 2 0.1uF 10V RK
54 CRT_RED_GMCH CRT_GREEN EXP_A_TXP_2 SDVOB_BLUE 50 PEG_TXP11 64
VGA

B22 H40 EXP_A_TXP3 1 2 C132 0.1uF 10V RK SDVO EXTVGA


CRT_GREEN# EXP_A_TXP_3 SDVOB_CLK+ 50
A21 J36 EXP_A_TXP4
CRT_RED EXP_A_TXP_4
2

1
150 1/16W 1%

150 1/16W 1%

150 1/16W 1%

B21 L40 EXP_A_TXP5 EXP_A_TXN12 C133 1 2 0.1uF 10V RK


CRT_RED# EXP_A_TXP_5 PEG_TXN12 64
M36 EXP_A_TXP6 EXTVGA
EXP_A_TXP_6 EXP_A_TXP12 C134
N40 EXP_A_TXP7 1 2 0.1uF 10V RK PEG_TXP12 64
EXP_A_TXP_7 EXTVGA
C26 P36 EXP_A_TXP8
CRT_DDC_CLK EXP_A_TXP_8
E $V01L07 C25 R40 EXP_A_TXP9 E
None 1

None 2

None 2

CRT_DDC_DATA EXP_A_TXP_9
R113

R114

R115

G23 T36 EXP_A_TXP10 EXP_A_TXN13 C135 1 2 0.1uF 10V RK


Mount -> Reserve CRT_HSYNC EXP_A_TXP_10 PEG_TXN13 64
J22 V40 EXP_A_TXP11 EXTVGA
CRT_IREF EXP_A_TXP_11 EXP_A_TXP13 C136
H23 W36 EXP_A_TXP12 1 2 0.1uF 10V RK PEG_TXP13 64
CRT_VSYNC EXP_A_TXP_12 EXTVGA
Y40 EXP_A_TXP13
EXP_A_TXP_13
AA36 EXP_A_TXP14
EXP_A_TXP_14
2

255 1/16W 1%

AB40 EXP_A_TXP15 EXP_A_TXN14 C137 1 2 0.1uF 10V RK


EXP_A_TXP_15 PEG_TXN14 64
GND1 EXTVGA
37 CRT_DDCCLK_GMCH
CALISTOGA_1p0 EXP_A_TXP14 C138 1 2 0.1uF 10V RK PEG_TXP14 64
UNDECIDED EXTVGA
37 CRT_DDCDAT_GMCH
R117
1

EXP_A_TXN15 C139 1 2 0.1uF 10V RK PEG_TXN15 64


EXTVGA
37 CRT_HSYNC_GMCH
EXP_A_TXP15 C140 1 2 0.1uF 10V RK PEG_TXP15 64
GND1 EXTVGA
37 CRT_VSYNC_GMCH

F F

G [GMCH-3 GFX] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 13 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
Based on ECRU-050805

A A

M3D M3E
19 M_A_DQ[0:63] M_A_BS#[0:2] 19,21
20 M_B_DQ[0:63]
M_A_DQ0 AJ35 AU12 M_A_BS#0 M_B_DQ0 AK39
SA_DQ0 SA_BS_0 SB_DQ0
M_A_DQ1 AJ34 AV14 M_A_BS#1 M_B_DQ1 AJ37 AT24
SA_DQ1 SA_BS_1 SB_DQ1 SB_BS_0 M_B_BS#0 20,21
M_A_DQ2 AM31 BA20 M_A_BS#2 M_B_DQ2 AP39 AV23
SA_DQ2 SA_BS_2 SB_DQ2 SB_BS_1 M_B_BS#1 20,21
M_A_DQ3 AM33 M_B_DQ3 AR41 AY28
SA_DQ3 M_A_CAS# 19,21 SB_DQ3 SB_BS_2 M_B_BS#2 20,21
M_A_DQ4 AJ36 AY13 M_B_DQ4 AJ38
SA_DQ4 SA_CAS# M_A_DM[0:7] 19 SB_DQ4 M_B_CAS# 20,21
M_A_DQ5 AK35 AJ33 M_A_DM0 M_B_DQ5 AK38 AR24
SA_DQ5 SA_DM_0 SB_DQ5 SB_CAS# M_B_DM[0:7] 20
M_A_DQ6 AJ32 AM35 M_A_DM1 M_B_DQ6 AN41 AK36 M_B_DM0
B AH31
SA_DQ6 SA_DM_1
AL26 AP41
SB_DQ6 SB_DM_0
AR38
B
M_A_DQ7 M_A_DM2 M_B_DQ7 M_B_DM1
SA_DQ7 SA_DM_2 SB_DQ7 SB_DM_1
M_A_DQ8 AN35 AN22 M_A_DM3 M_B_DQ8 AT40 AT36 M_B_DM2
SA_DQ8 SA_DM_3 SB_DQ8 SB_DM_2
M_A_DQ9 AP33 AM14 M_A_DM4 M_B_DQ9 AV41 BA31 M_B_DM3
SA_DQ9 SA_DM_4 SB_DQ9 SB_DM_3
M_A_DQ10 AR31 AL9 M_A_DM5 M_B_DQ10 AU38 AL17 M_B_DM4
SA_DQ10 SA_DM_5 SB_DQ10 SB_DM_4
M_A_DQ11 AP31 AR3 M_A_DM6 M_B_DQ11 AV38 AH8 M_B_DM5
SA_DQ11 SA_DM_6 SB_DQ11 SB_DM_5
M_A_DQ12 AN38 AH4 M_A_DM7 M_B_DQ12 AP38 BA5 M_B_DM6
SA_DQ12 SA_DM_7 SB_DQ12 SB_DM_6
M_A_DQ13 AM36 M_B_DQ13 AR40 AN4 M_B_DM7
SA_DQ13 M_A_DQS[0:7] 19 SB_DQ13 SB_DM_7

A
M_A_DQ14 AM34 AK33 M_A_DQS0 M_B_DQ14 AW38
SA_DQ14 SA_DQS_0 SB_DQ14 M_B_DQS[0:7] 20

B
M_A_DQ15 AN33 AT33 M_A_DQS1 M_B_DQ15 AY38 AM39 M_B_DQS0
SA_DQ15 SA_DQS_1 SB_DQ15 SB_DQS_0
M_A_DQ16 AK26 AN28 M_A_DQS2 M_B_DQ16 BA38 AT39 M_B_DQS1
SA_DQ16 SA_DQS_2 SB_DQ16 SB_DQS_1
M_A_DQ17 AL27 AM22 M_A_DQS3 M_B_DQ17 AV36 AU35 M_B_DQS2
SA_DQ17 SA_DQS_3 SB_DQ17 SB_DQS_2
M_A_DQ18 AM26 AN12 M_A_DQS4 M_B_DQ18 AR36 AR29 M_B_DQS3
SA_DQ18 SA_DQS_4 SB_DQ18 SB_DQS_3

MEMORY
M_A_DQ19 AN24 AN8 M_A_DQS5 M_B_DQ19 AP36 AR16 M_B_DQS4
SA_DQ19 SA_DQS_5 SB_DQ19 SB_DQS_4

MEMORY
M_A_DQ20 AK28 AP3 M_A_DQS6 M_B_DQ20 BA36 AR10 M_B_DQS5
SA_DQ20 SA_DQS_6 SB_DQ20 SB_DQS_5
M_A_DQ21 AL28 AG5 M_A_DQS7 M_B_DQ21 AU36 AR7 M_B_DQS6
SA_DQ21 SA_DQS_7 M_A_DQS#[0:7] 19 SB_DQ21 SB_DQS_6
M_A_DQ22 AM24 AK32 M_A_DQS#0 M_B_DQ22 AP35 AN5 M_B_DQS7
C SA_DQ22 SA_DQS#_0 SB_DQ22 SB_DQS_7 M_B_DQS#[0:7] 20 C
M_A_DQ23 AP26 AU33 M_A_DQS#1 M_B_DQ23 AP34 AM40 M_B_DQS#0
SA_DQ23 SA_DQS#_1 SB_DQ23 SB_DQS#_0
M_A_DQ24 AP23 AN27 M_A_DQS#2 M_B_DQ24 AY33 AU39 M_B_DQS#1
SA_DQ24 SA_DQS#_2 SB_DQ24 SB_DQS#_1
M_A_DQ25 AL22 AM21 M_A_DQS#3 M_B_DQ25 BA33 AT35 M_B_DQS#2
SA_DQ25 SA_DQS#_3 SB_DQ25 SB_DQS#_2
M_A_DQ26 AP21 AM12 M_A_DQS#4 M_B_DQ26 AT31 AP29 M_B_DQS#3
SA_DQ26 SA_DQS#_4 SB_DQ26 SB_DQS#_3
M_A_DQ27 AN20 AL8 M_A_DQS#5 M_B_DQ27 AU29 AP16 M_B_DQS#4
SA_DQ27 SA_DQS#_5 SB_DQ27 SB_DQS#_4
M_A_DQ28 AL23 AN3 M_A_DQS#6 M_B_DQ28 AU31 AT10 M_B_DQS#5
SA_DQ28 SA_DQS#_6 SB_DQ28 SB_DQS#_5
M_A_DQ29 AP24 AH5 M_A_DQS#7 M_B_DQ29 AW31 AT7 M_B_DQS#6
SA_DQ29 SA_DQS#_7 SB_DQ29 SB_DQS#_6
M_A_DQ30 AP20 M_B_DQ30 AV29 AP5 M_B_DQS#7
SA_DQ30 M_A_A[0:13] 19,21 SB_DQ30 SB_DQS#_7
M_A_DQ31 AT21 AY16 M_A_A0 M_B_DQ31 AW29
SYSTEM

SA_DQ31 SA_MA_0 SB_DQ31 M_B_A[0:13] 20,21


M_A_DQ32 AR12 AU14 M_A_A1 M_B_DQ32 AM19 AY23 M_B_A0

SYSTEM
SA_DQ32 SA_MA_1 SB_DQ32 SB_MA_0
M_A_DQ33 AR14 AW16 M_A_A2 M_B_DQ33 AL19 AW24 M_B_A1
SA_DQ33 SA_MA_2 SB_DQ33 SB_MA_1
M_A_DQ34 AP13 BA16 M_A_A3 M_B_DQ34 AP14 AY24 M_B_A2
SA_DQ34 SA_MA_3 SB_DQ34 SB_MA_2
M_A_DQ35 AP12 BA17 M_A_A4 M_B_DQ35 AN14 AR28 M_B_A3
SA_DQ35 SA_MA_4 SB_DQ35 SB_MA_3
M_A_DQ36 AT13 AU16 M_A_A5 M_B_DQ36 AN17 AT27 M_B_A4
SA_DQ36 SA_MA_5 SB_DQ36 SB_MA_4
M_A_DQ37 AT12 AV17 M_A_A6 M_B_DQ37 AM16 AT28 M_B_A5
SA_DQ37 SA_MA_6 SB_DQ37 SB_MA_5
M_A_DQ38 AL14 AU17 M_A_A7 M_B_DQ38 AP15 AU27 M_B_A6
SA_DQ38 SA_MA_7 SB_DQ38 SB_MA_6
D M_A_DQ39 AL12
SA_DQ39 SA_MA_8
AW17 M_A_A8 M_B_DQ39 AL15
SB_DQ39 SB_MA_7
AV28 M_B_A7 D
M_A_DQ40 AK9 AT16 M_A_A9 M_B_DQ40 AJ11 AV27 M_B_A8
SA_DQ40 SA_MA_9 SB_DQ40 SB_MA_8
M_A_DQ41 AN7 AU13 M_A_A10 M_B_DQ41 AH10 AW27 M_B_A9
SA_DQ41 SA_MA_10 SB_DQ41 SB_MA_9
M_A_DQ42 AK8 AT17 M_A_A11 M_B_DQ42 AJ9 AV24 M_B_A10
SA_DQ42 SA_MA_11 SB_DQ42 SB_MA_10
M_A_DQ43 AK7 AV20 M_A_A12 M_B_DQ43 AN10 BA27 M_B_A11
SA_DQ43 SA_MA_12 SB_DQ43 SB_MA_11
DDR

M_A_DQ44 AP9 AV12 M_A_A13 M_B_DQ44 AK13 AY27 M_B_A12


SA_DQ44 SA_MA_13 SB_DQ44 SB_MA_12

DDR
M_A_DQ45 AN9 M_B_DQ45 AH11 AR23 M_B_A13
SA_DQ45 SB_DQ45 SB_MA_13
M_A_DQ46 AT5 AW14 M_B_DQ46 AK10
SA_DQ46 SA_RAS# M_A_RAS# 19,21 SB_DQ46
M_A_DQ47 AL5 AK23 M_B_DQ47 AJ8 AU23
SA_DQ47 SA_RCVENIN# SB_DQ47 SB_RAS# M_B_RAS# 20,21
M_A_DQ48 AY2 AK24 M_B_DQ48 BA10 AK16
SA_DQ48 SA_RCVENOUT# SB_DQ48 SB_RCVENIN#
M_A_DQ49 AW2 AY14 M_B_DQ49 AW10 AK18
SA_DQ49 SA_WE# M_A_WE# 19,21 SB_DQ49 SB_RCVENOUT#
M_A_DQ50 AP1 M_B_DQ50 BA4 AR27
SA_DQ50 SB_DQ50 SB_WE# M_B_WE# 20,21
M_A_DQ51 AN2 M_B_DQ51 AW4
SA_DQ51 SB_DQ51
M_A_DQ52 AV2 M_B_DQ52 AY10
SA_DQ52 SB_DQ52
M_A_DQ53 AT3 M_B_DQ53 AY9
SA_DQ53 SB_DQ53
M_A_DQ54 AN1 M_B_DQ54 AW5
SA_DQ54 SB_DQ54
E M_A_DQ55 AL2 M_B_DQ55 AY5 E
SA_DQ55 SB_DQ55
M_A_DQ56 AG7 M_B_DQ56 AV4
SA_DQ56 SB_DQ56
M_A_DQ57 AF9 M_B_DQ57 AR5
SA_DQ57 SB_DQ57
M_A_DQ58 AG4 M_B_DQ58 AK4
SA_DQ58 SB_DQ58
M_A_DQ59 AF6 M_B_DQ59 AK3
SA_DQ59 SB_DQ59
M_A_DQ60 AG9 M_B_DQ60 AT4
SA_DQ60 SB_DQ60
M_A_DQ61 AH6 M_B_DQ61 AK5
SA_DQ61 SB_DQ61
M_A_DQ62 AF4 M_B_DQ62 AJ5
SA_DQ62 SB_DQ62
M_A_DQ63 AF8 M_B_DQ63 AJ3
SA_DQ63 SB_DQ63
CALISTOGA_1p0 CALISTOGA_1p0
UNDECIDED UNDECIDED

F F

G [GMCH-4 DDR2] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 14 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
PWR_1.5VMAIN $V01L13 PWR_VCC_SYNC_CRT
PWR_1.5V_PCIE PWR_VCC_TX_LVDS PWR_1.05VMAIN
FL3 Reserve -> Mount

220uF 2.5V(POSE/NEO) B21


<FILTER> M3H PWR_1.05VMAIN

C142 EXTVGA
2 1 H22
VCCSYNC 70mA AC14 1.05V or 1.5V 1.4A
VTT_0

10uF 6.3V 2012 RM

10uF 6.3V 2012 RM


A BLM18PG121SN1 C30 AB14 A
VCC_TXLVDS0 VTT_1

1
B30 W14
VCC_TXLVDS1 60mA VTT_2

1
+ A30 V14
VCC_TXLVDS2 VTT_3

C141

C143
T14
VTT_4
AJ41 R14

2
VCC3G0 VTT_5
AB41 P14
PWR_2.5VMAIN VCC3G1 VTT_6
Y41 N14
VCC3G2 VTT_7
V41 M14
VCC3G3 1.5A VTT_8
R41 L14
VCC3G4 VTT_9

0.1uF 10V RK
N41 AD13 $V01L11
VCC3G5 VTT_10

2
L41 AC13
AC33
VCC3G6 VTT_11
AB13 Added parts
PWR_3GPLL VCCA_3GPLL 2mA VTT_12
G41 AA13

1
VCCA_3GBG VTT_13

C144
GND1 H41 Y13
L1 VSSA_3GBG VTT_14
W13
PWR_VCCA_CRTDAC VTT_15
2 1 F21 V13
VCCA_CRTDAC0 VTT_16
B E21
VCCA_CRTDAC1
70mA VTT_17
U13
B
10uF 6.3V 2012 RM

LB2012T1R0M G21 T13 PWR_1.8VSUS


1uH 300mA 0.1uF 10V RK GND1 VSSA_CRTDAC VTT_18 PWR_1.5VMAIN
R13
VTT_19
2

CA53100-5035 B26 N13


VCCA_DPLLA 40mA VTT_20
C39 40mA M13
VCCA_DPLLB VTT_21

0.1uFx4 16V 2012 BM

0.1uFx4 16V 2012 BM

0.1uFx4 16V 2012 BM


AF1 45mA L13
1

VCCA_HPLL VTT_22
C145

C146

AB12
VTT_23

4
3
2
1

8
7
6
5

8
7
6
5
PWR_VCCA_LVDS A38 AA12
VCCA_LVDS 10mA VTT_24
B39 Y12
VSSA_LVDS VTT_25

CM11

CM12

CM13
W12
VTT_26
AF2 V12

5
6
7
8

1
2
3
4

1
2
3
4
PWR_1.5VMAIN PWR_3V_ATVBG VCCA_MPLL 45mA VTT_27
U12
GND1 PWR_1.5V_DPLLA VTT_28
H20 T12
VCCA_TVBG VTT_29
G20 R12
VSSA_TVBG VTT_30
220uF 2.5V(POSE/NEO) B21

L2 P12
VTT_31
2 1 N12
VTT_32
None

10uF 6.3V 2012 RM

LB2012T100M GND1
0.1uF 10V RK

M12
C 10uH 100mA VTT_33 C
E19 L12
VCCA_TVDACA0 VTT_34
1

F19 R11 GND1 GND1


VCCA_TVDACA1 VTT_35
1

+ C20 P11
VCCA_TVDACB0 VTT_36
C147

C148

C149

D20 N11
VCCA_TVDACB1 VTT_37
E20 M11
POWER
2

VCCA_TVDACC0 VTT_38
F20 R10
VCCA_TVDACC1 VTT_39
P10
PWR_1.5VMAIN VTT_40 PWR_1.8VSUS
AH1 N10
VCCD_HMPLL0 VTT_41
AH2 150mA M10
VCCD_HMPLL1 VTT_42
P9
GND1 PWR_1.5V_DPLLB VTT_43
A28 N9
PWR_VCCD_LVDS VCCD_LVDS0 VTT_44

0.1uFx4 16V 2012 BM

0.1uFx4 16V 2012 BM

0.1uFx4 16V 2012 BM

0.1uFx4 16V 2012 BM

0.1uFx4 16V 2012 BM


B28 M9
VCCD_LVDS1 60mA VTT_45
220uF 2.5V(POSE/NEO) B21

L3 C28 R8
VCCD_LVDS2 VTT_46

4
3
2
1

4
3
2
1

4
3
2
1

4
3
2
1

8
7
6
5
2 1 PWR_VCCD_TVDAC P8
VTT_47
None

10uF 6.3V 2012 RM

LB2012T100M
0.1uF 10V RK

D21 N8
VCCD_TVDAC 24mA VTT_48

CM14

CM15

CM16

CM17

CM18
10uH 100mA M8
VTT_49
1

D A23 P7 D

5
6
7
8

5
6
7
8

5
6
7
8

5
6
7
8

1
2
3
4
VCC_HV0 VTT_50
2

+ B23
VCC_HV1
40mA VTT_51
N7
C150

C151

C152

B25 M7
PWR_VCCD_Q_TVDAC VCC_HV2 VTT_52
R6
2

VTT_53
H19 24mA P6
VCCD_QTVDAC VTT_54
M6
VTT_55
AK31 A6
VCCAUX0 VTT_56
AF31 R5
VCCAUX1 VTT_57 GND1
AE31 P5
GND1 PWR_1.5V_HPLL VCCAUX2 VTT_58
AC31 N5
FL4 VCCAUX3 VTT_59
AL30 M5
PWR_3VMAIN VCCAUX4 VTT_60
<FILTER> AK30 P4
VCCAUX5 VTT_61
1 2 AJ30 N4
VCCAUX6 VTT_62
10uF 6.3V 2012 RM

0.1uF 10V RK

AH30 M4
BLM18PG121SN1 -r VCCAUX7 VTT_63 PWR_1.05VMAIN
AG30 R3
VCCAUX8 VTT_64
10uF 6.3V 2012 RM

AF30 P3
VCCAUX9 VTT_65
2

0.1uF 10V RK

E AE30 N3 E
VCCAUX10 VTT_66
1

2
C153

C154

AD30 M3
VCCAUX11 VTT_67

0.1uFx4 16V 2012 BM

0.1uFx4 16V 2012 BM

0.1uFx4 16V 2012 BM

0.1uFx4 16V 2012 BM


AC30 R2
1

VCCAUX12 VTT_68
AG29 P2
2

VCCAUX13 VTT_69

4
3
2
1

8
7
6
5

8
7
6
5

8
7
6
5
C155

C156

AF29 M2
VCCAUX14 VTT_70
AE29 D2
VCCAUX15 VTT_71

CM19

CM20

CM21

CM22
AD29 AB1
PWR_1.5V_MPLL VCCAUX16 VTT_72
AC29 R1

5
6
7
8

1
2
3
4

1
2
3
4

1
2
3
4
GND1 VCCAUX17 VTT_73
AG28 P1
FL5 VCCAUX18 VTT_74
AF28 N1
GND1 VCCAUX19 VTT_75
<FILTER> AE28 M1
VCCAUX20 VTT_76
2 1 AH22
VCCAUX21
10uF 6.3V 2012 RM

0.1uF 10V RK

AJ21
BLM18PG121SN1 -r VCCAUX22
AH21
VCCAUX23
AJ20
VCCAUX24
2

AH20 GND1
VCCAUX25
C157

C158

AH19
F P19
VCCAUX26 F
1

VCCAUX27
P16
VCCAUX28
AH15
VCCAUX29
P15
VCCAUX30
AH14
VCCAUX31
AG14
GND1 VCCAUX32
AF14
VCCAUX33
AE14
VCCAUX34
#Cap/Beads必要?(RDDP: 470uF, 0.1uF, 100Ω@100MHz) Y14
VCCAUX35
AF13
PWR_1.5VMAIN VCCAUX36
AE13
VCCAUX37
AF12
VCCAUX38
AE12
VCCAUX39
AD12
VCCAUX40
0.1uF 10V RK

[GMCH-5 Power-1]
2

G CALISTOGA_1p0 UNDECIDED G
1
C159

TITLE
GILIA Main Board Rev.03
Fujitsu GND1
DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 15 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
PWR_1.5VMAIN
PWR_VCCD_LVDS

R118 No EXTVGA
A 2 1 $V01L08 A
Changed Reference

C160 No EXTVGA
10uF 6.3V 2012 RM
0 1/16W 1608 PWR_VCCA_TVDAC
PWR_1.5VMAIN
3V 120mA

1
PWR_1.5VMAIN

0.1uF 10V RK
No EXTVGA#
PWR_VCCD_TVDAC

None
RB521S-30
PWR_3VMAIN PWR_3V_ATVBG

C1058
FL65
2 1
#ビーズ必要?

D1

S-OUT(GMCH)

S-OUT(GMCH)
10uF 6.3V 2012 RM

0.1uF 10V RK
GMCH E19,F19pin

1
2 1 BKP1608HS181

2
180ohm 1500mA

No EXTVGA
10uF 6.3V 2012 RM
GND1 R601 0 1/16W S-OUT(GMCH)#

C165 No EXTVGA

C166 No EXTVGA
No S-OUT(GMCH)

0.022uF 16V RK

1
1

C162
PWR_2.5VMAIN

0.1uF 10V RK
1

2
B B

C161
PWR_VCCA_LVDS

1
R120 No EXTVGA

C164
2 1 PWR_VCCD_TVDAC route capacitors
GND1
0 1/16W 1608 within 250mils of GMCH.
C167 No EXTVGA

GND1
0.1uF 10V RK
1

1
C1061 GND1
0.01uF 25V RK PWR_VCCD_Q_TVDAC
No EXTVGA# GMCH C20,D20pin
2

2
FL66
GMCH B39pin 2 1

C168 No EXTVGA

C169 No EXTVGA

10uF 6.3V 2012 RM


0.022uF 16V RK

C171 0.1uF 10V RK


S-OUT(GMCH)
BKP1608HS181

0.1uF 10V RK
1

1
C C

S-OUT(GMCH)
180ohm 1500mA

1
GND1 S-OUT(GMCH)#

2
PWR_VCC_TX_LVDS

C170
R121 No EXTVGA
1 2
GND1
0 1/16W 1608
GND1
4.7uF 10V 2012 FZ
C172 No EXTVGA

GMCH E20pin,F20pin
2

C1059
1

0.1uF 10V RK

C173 No EXTVGA

C174 No EXTVGA
0.022uF 16V RK
No EXTVGA#
D D

0.1uF 10V RK
1

2
2

1
GND1

PWR_2.5VMAIN PWR_1.05VMAIN GND1 Disable Guidelines


BKP1608HS181
180ohm 1500mA
FL7 No EXTVGA#

#On時シーケンスには問題ないが、
2

Off時が厳しい。TVDACも同様。 Interface Power Connection


2

None
RB521S-30

PWR_VCCA_CRTDAC
VCCD_LVDS GND
E
LVDS VCCA_LVDS GND E
D2

(If SDVO Disabled)


1

VCCTX_LVDS GND
PWR_3V_ATVBG VCCA_CRTDAC GMCH VCC Core
10uF 6.3V 2012 RM
C175 No EXTVGA

GMCH H20pin CRT VSSA_CRTDAC GND


0.1uF 10V RK
1

VCC_SYNC GND
No EXTVGA

C178 No EXTVGA
10uF 6.3V 2012 RM

VCCD_TVDAC 1.5V
2

C176

0.1uF 10V RK
GMCH G21pin VCCD_Q_TVDAC 1.5V
1

1 VCCA_TVDAC_A/B/C 1.5V
S-OUT
2

2
C177

F GND1
VCCA_TVBG 1.5V F
GMCH G20pin VSSA_TVBG GND
PWR_2.5VMAIN

PWR_VCC_SYNC_CRT

R124 No EXTVGA
2 1
GND1
0 1/16W 1608
1

#Cap必要?(RDDP: 10uF)
0.1uF 10V RK
No EXTVGA#

[GMCH-6 Power-2]
2

C1060

G G
TITLE
GILIA Main Board Rev.03
Fujitsu
GND1
DRAW. CUST.
NO. C1CP272450-X3
Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION
FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 16 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
F
E
B
A

D
C

1
1

Fujitsu
ϕλ
ϕλ
1.8V 3.1A

Proprietary& Confidential
GND1
PWR_1.05VMAIN

PWR_1.05VMAIN

1.05V or 1.5V 4.6A


PWR_1.8VSUS
AA33

PWR_1.05VMAIN
W33 VCC_0
P33 VCC_1 PWR_1.8VSUS
AD27 N33 VCC_2
AC27 VCC_NCTF0 AE27 L33 VCC_3 AU41
VCC_NCTF1 VSS_NCTF0 VCC_4 VCC_SM_0
AB27 AE26 J33 AT41
VCC_NCTF2 VSS_NCTF1 VCC_5 VCC_SM_1
AA27 AE25 AA32 AM41
VCC_NCTF3 VSS_NCTF2 VCC_6 VCC_SM_2
Y27 AE24 Y32 AU40
VCC_NCTF4 VSS_NCTF3 VCC_7 VCC_SM_3
W27 AE23 W32 BA34

2
2

VCC_NCTF5 VSS_NCTF4 VCC_8 VCC_SM_4 C182


V27 AE22 V32 AY34
VCC_NCTF6 VSS_NCTF5 VCC_9 VCC_SM_5
U27 AE21 P32 AW34 2 1
VCC_NCTF7 VSS_NCTF6 VCC_10 VCC_SM_6
T27 AE20 N32 AV34
VCC_NCTF8 VSS_NCTF7 VCC_11 VCC_SM_7 0.47uF 10V 1608 RK
R27 AE19 M32 AU34
VCC_NCTF9 VSS_NCTF8 VCC_12 VCC_SM_8
AD26 AE18 L32 AT34
VCC_NCTF10 VSS_NCTF9 VCC_13 VCC_SM_9 C183
AC26 AC17 J32 AR34
VCC_NCTF11 VSS_NCTF10 VCC_14 VCC_SM_10

1mm
AB26 Y17 AA31 BA30 2 1
VCC_NCTF12 VSS_NCTF11 VCC_15 VCC_SM_11
AA26 U17 W31 AY30
GND1

VCC_NCTF13 VSS_NCTF12 VCC_16 VCC_SM_12 0.47uF 10V 1608 RK


Y26 V31 AW30
VCC_NCTF14 VCC_17 VCC_SM_13
W26 T31 AV30
VCC_NCTF15 VCC_18 VCC_SM_14
V26 R31 AU30
VCC_NCTF16 VCC_19 VCC_SM_15
U26 P31 AT30
VCC_NCTF17 VCC_20 VCC_SM_16
T26 N31 AR30

1.5V 1.89A
VCC_NCTF18 VCC_21 VCC_SM_17
R26 AG27 M31 AP30
VCC_NCTF19 VCCAUX_NCTF0 VCC_22 VCC_SM_18

PWR_1.5VMAIN
AD25 AF27 AA30 AN30
VCC_NCTF20 VCCAUX_NCTF1 VCC_23 VCC_SM_19
AC25 AG26 Y30 AM30
VCC_NCTF21 VCCAUX_NCTF2 VCC_24 VCC_SM_20

PWR_1.5VMAIN
AB25 AF26 W30 AM29
VCC_NCTF22 VCCAUX_NCTF3 VCC_25 VCC_SM_21
AA25 AG25 V30 AL29

3
3

VCC_NCTF23 VCCAUX_NCTF4 VCC_26 VCC_SM_22


Y25 AF25 U30 AK29
VCC_NCTF24 VCCAUX_NCTF5 VCC_27 VCC_SM_23
W25 AG24 T30 AJ29
VCC_NCTF25 VCCAUX_NCTF6 VCC_28 VCC_SM_24
V25 AF24 R30 AH29
VCC_NCTF26 VCCAUX_NCTF7 VCC_29 VCC_SM_25
U25 AG23 P30 AJ28
VCC_NCTF27 VCCAUX_NCTF8 VCC_30 VCC_SM_26
T25 AF23 N30 AH28
VCC_NCTF28 VCCAUX_NCTF9 VCC_31 VCC_SM_27
R25 AG22 M30 AJ27
VCC_NCTF29 VCCAUX_NCTF10 VCC_32 VCC_SM_28
AD24 AF22 L30 AH27
VCC_NCTF30 VCCAUX_NCTF11 VCC_33 VCC_SM_29
AC24 AG21 AA29 BA26
VCC_NCTF31 VCCAUX_NCTF12 VCC_34 VCC_SM_30
AB24 AF21 Y29 AY26
VCC_NCTF32 VCCAUX_NCTF13 VCC_35 VCC_SM_31
AA24 AG20 W29 AW26
VCC_NCTF33 VCCAUX_NCTF14 VCC_36 VCC_SM_32
Y24 AF20 V29 AV26
VCC_NCTF34 VCCAUX_NCTF15 VCC_37 VCC_SM_33
W24 AG19 U29 AU26
VCC_NCTF35 VCCAUX_NCTF16 VCC_38 VCC_SM_34
V24 AF19 R29 AT26
VCC_NCTF36 VCCAUX_NCTF17 VCC_39 VCC_SM_35
U24 R19 P29 AR26
VCC_NCTF37 VCCAUX_NCTF18 VCC_40 VCC_SM_36
T24 AG18 M29 AJ26
VCC_NCTF38 VCCAUX_NCTF19 VCC_41 VCC_SM_37
R24 AF18 L29 AH26
VCC_NCTF39 VCCAUX_NCTF20 VCC_42 VCC_SM_38
AD23 R18 AB28 AJ25
VCC_NCTF40 VCCAUX_NCTF21 VCC_43 VCC_SM_39
V23 AG17 AA28 AH25

4
4

VCC_NCTF41 VCCAUX_NCTF22 VCC_44 VCC_SM_40


U23 AF17 Y28 AJ24
VCC_NCTF42 VCCAUX_NCTF23 VCC_45 VCC_SM_41
T23 AE17 V28 AH24
VCC_NCTF43 VCCAUX_NCTF24 VCC_46 VCC_SM_42
R23 AD17 U28 BA23
VCC_NCTF44 VCCAUX_NCTF25 VCC_47 VCC_SM_43
AD22 AB17 T28 AJ23
VCC_NCTF45 VCCAUX_NCTF26 VCC_48 VCC_SM_44
V22 AA17 R28 BA22
VCC_NCTF46 VCCAUX_NCTF27 VCC_49 VCC_SM_45
U22 W17 P28 AY22
VCC_NCTF47 VCCAUX_NCTF28 VCC_50 VCC_SM_46 C184
T22 V17 N28 AW22
VCC_NCTF48 VCCAUX_NCTF29 VCC_51 VCC_SM_47
R22 T17 M28 AV22 2 1
VCC_NCTF49 VCCAUX_NCTF30 VCC_52 VCC_SM_48
AD21 R17 L28 AU22
GND1

VCC_NCTF50 VCCAUX_NCTF31 VCC_53 VCC_SM_49 0.47uF 10V 1608 RK


V21 AG16 P27 AT22
VCC_NCTF51 NCTF VCCAUX_NCTF32 VCC_54 VCC_SM_50
U21 AF16 N27 AR22
VCC_NCTF52 VCCAUX_NCTF33 VCC_55 VCC_SM_51
T21 AE16 M27 AP22
VCC_NCTF53 VCCAUX_NCTF34 VCC_56 VCC_SM_52
R21 AD16 L27 AK22
VCC_NCTF54 VCCAUX_NCTF35 VCC_57 VCC_SM_53
AD20 AC16 P26 AJ22
VCC_NCTF55 VCCAUX_NCTF36 VCC_58 VCC_SM_54
V20 AB16 N26 AK21
VCC_NCTF56 VCCAUX_NCTF37 VCC_59 VCC_SM_55
U20 AA16 L26 AK20
VCC_NCTF57 VCCAUX_NCTF38 VCC_60 VCC_SM_56
T20 Y16 N25 BA19
VCC_NCTF58 VCCAUX_NCTF39 VCC_61 VCC_SM_57
R20 W16 M25 AY19

5
5

VCC_NCTF59 VCCAUX_NCTF40 VCC_62 VCC_SM_58


AD19 V16 L25 AW19
VCC_NCTF60 VCCAUX_NCTF41 VCC_63 VCC_SM_59
V19 U16 P24 AV19
VCC_NCTF61 VCCAUX_NCTF42 VCC_64 VCC_SM_60
U19 T16 N24 AU19
VCC_NCTF62 VCCAUX_NCTF43 VCC_65 VCC_SM_61
T19 R16 M24 AT19
VCC_NCTF63 VCCAUX_NCTF44 VCC_66 VCC_SM_62
AD18 AG15 AB23 AR19
VCC_NCTF64 VCCAUX_NCTF45 VCC_67 VCC_SM_63
AC18 AF15 AA23 AP19
VCC_NCTF65 VCCAUX_NCTF46 VCC_68 VCC_SM_64
AB18 AE15 Y23 AK19
VCC_NCTF66 VCCAUX_NCTF47 VCC_69 VCC VCC_SM_65
AA18 AD15 P23 AJ19
VCC_NCTF67 VCCAUX_NCTF48 VCC_70 VCC_SM_66
Y18 AC15 N23 AJ18
VCC_NCTF68 VCCAUX_NCTF49 VCC_71 VCC_SM_67
W18 AB15 M23 AJ17
VCC_NCTF69 VCCAUX_NCTF50 VCC_72 VCC_SM_68
V18 AA15 L23 AH17
VCC_NCTF70 VCCAUX_NCTF51 VCC_73 VCC_SM_69
U18 Y15 AC22 AJ16
VCC_NCTF71 VCCAUX_NCTF52 VCC_74 VCC_SM_70
T18 W15 AB22 AH16
VCC_NCTF72 VCCAUX_NCTF53 VCC_75 VCC_SM_71
V15 Y22 BA15
VCCAUX_NCTF54 VCC_76 VCC_SM_72
U15 W22 AY15
VCCAUX_NCTF55 VCC_77 VCC_SM_73
AJ23pin近傍に配置すること

T15 P22 AW15


VCCAUX_NCTF56 VCC_78 VCC_SM_74
R15 N22 AV15
VCCAUX_NCTF57 VCC_79 VCC_SM_75
M22 AU15

6
6

VCC_80 VCC_SM_76
L22 AT15
VCC_81 VCC_SM_77
AC21 AR15
VCC_82 VCC_SM_78
M3F

AA21 AJ15
VCC_83 VCC_SM_79
W21 AJ14

DATE
VCC_84 VCC_SM_80
N21 AJ13
VCC_85 VCC_SM_81
M21 AH13
UNDECIDED

VCC_SM_82

REV. DATE
L21 VCC_86 AK12
VCC_87 VCC_SM_83
AC20 AJ12
CALISTOGA_1p0

VCC_88 VCC_SM_84
AB20 AH12
VCC_89 VCC_SM_85
Y20 AG12

2006.01.26
VCC_90 VCC_SM_86
W20 AK11
VCC_91 VCC_SM_87
P20 BA8

DESIGN
VCC_92 VCC_SM_88
N20 AY8
VCC_93 VCC_SM_89
M20 AW8
VCC_94 VCC_SM_90
DESIGN L20 AV8
VCC_95 VCC_SM_91
AB19 AT8
VCC_96 VCC_SM_92
CHECK

AA19 AR8
VCC_97 VCC_SM_93
Y19 AP8
7
7

VCC_98 VCC_SM_94
Seki

N19 BA6
VCC_99 VCC_SM_95
M19 AY6
VCC_100 VCC_SM_96
L19 AW6
VCC_101 VCC_SM_97
APPR.

N18 AV6
VCC_102 VCC_SM_98
M18 AT6
VCC_103 VCC_SM_99
L18 AR6
VCC_104 VCC_SM_100
CHECK

P17 AP6
VCC_105 VCC_SM_101
N17 AN6
VCC_106 VCC_SM_102
M17 AL6
VCC_107 VCC_SM_103
N16 AK6
VCC_108 VCC_SM_104
M16 AJ6
VCC_109 VCC_SM_105
Yamada

L16 AV1
VCC_110 VCC_SM_106
AJ1
VCC_SM_107
M3G

APPR.

C185
8
8

DESCRIPTION

1 2
UNDECIDED

Miura

0.47uF 10V 1608 RK


C186
CALISTOGA_1p0

1 2
GND1

0.47uF 10V 1608 RK

C179
1 2
TITLE

10uF 6.3V 2012 RM


DRAW.
NO.

C180
1 2

10uF 6.3V 2012 RM


C181
1 2
9
9

GND1

0.47uF 10V 1608 RK


FUJITSU LTD.
C1CP272450-X3

17
SHEET
GILIA Main Board Rev.03

91
Based on ECRU-050805

[GMCH-7 Power-3]
CUST.
F
E
B
A

D
C

G
Nile
1 2 3 4 5 6 7 8 9
Nile
Based on ECRU-050805
M3J
M3I AT23 J11
VSS_180 VSS_273
AC41 AK34 AN23 D11
VSS_0 VSS_97 VSS_181 VSS_274
AA41 AG34 AM23 B11
VSS_1 VSS_98 VSS_182 VSS_275
A W41 AF34 AH23 AV10 A
VSS_2 VSS_99 VSS_183 VSS_276
T41 AE34 AC23 AP10
VSS_3 VSS_100 VSS_184 VSS_277
P41 AC34 W23 AL10
VSS_4 VSS_101 VSS_185 VSS_278
M41 C34 K23 AJ10
VSS_5 VSS_102 VSS_186 VSS_279
J41 AW33 J23 AG10
VSS_6 VSS_103 VSS_187 VSS_280
F41 AV33 F23 AC10
VSS_7 VSS_104 VSS_188 VSS_281
AV40 AR33 C23 W10
VSS_8 VSS_105 VSS_189 VSS_282
AP40 AE33 AA22 U10
VSS_9 VSS_106 VSS_190 VSS_283
AN40 AB33 K22 BA9
PWR_1.05VMAIN VSS_10 VSS_107 VSS_191 VSS_284
AK40 Y33 G22 AW9
VSS_11 VSS_108 VSS_192 VSS_285
AJ40 V33 F22 AR9

GMCH AH40
AG40
AF40
VSS_12
VSS_13
VSS_14
VSS_15
VSS_109
VSS_110
VSS_111
VSS_112
T33
R33
M33
E22
D22
A22
VSS_193
VSS_194
VSS_195
VSS_196
VSS_286
VSS_287
VSS_288
VSS_289
AH9
AB9
Y9
AE40 H33 BA21 R9
VSS_16 VSS_113 VSS_197 VSS_290

100uF 6.3V(POSE) B20


B40 G33 AV21 G9
VSS_17 VSS_114 VSS_198 VSS_291

10uF 6.3V 2012 RM

10uF 6.3V 2012 RM


0.22uF 10V 1608 RK

0.22uF 10V 1608 RK

0.47uF 10V 1608 RK

0.47uF 10V 1608 RK


AY39 F33 AR21 E9
B VSS_18 VSS_115 VSS_199 VSS_292 B

C189 2.2uF 10V 2012 RK


C188 4.7uF 10V 2012 FZ
AW39 D33 AN21 A9
VSS_19 VSS_116 VSS_200 VSS_293

1
AV39 B33 AL21 AG8
VSS_20 VSS_117 VSS_201 VSS_294
2

2
+ AR39 AH32 AB21 AD8
VSS_21 VSS_118 VSS_202 VSS_295
AN39 AG32 Y21 AA8
VTT AJ39
VSS_22 VSS_119
AF32 P21
VSS_203 VSS_296
U8
1

2
VSS_23 VSS_120 VSS_204 VSS_297
AC39 AE32 K21 K8
VSS_24 VSS_121 VSS_205 VSS_298
AB39 AC32 J21 C8
VSS_25 VSS_122 VSS_206 VSS_299
AA39 AB32 H21 BA7
VSS_26 VSS_123 VSS_207 VSS_300
Y39 G32 C21 AV7
C190 VSS_27 VSS_124 VSS_208 VSS_301

C191

C192

C193

C194
None

C195

C187
None

None
W39 B32 AW20 AP7
VSS_28 VSS_125 VSS_209 VSS_302
V39 AY31 AR20 AL7
T39
R39
VSS_29
VSS_30
VSS_31
VSS_126
VSS_127
VSS_128
AV31
AN31
AM20
AA20
VSS_210
VSS_211
VSS_212
VSS VSS_303
VSS_304
VSS_305
AJ7
AH7
P39 AJ31 K20 AF7
VSS_32 VSS_129 VSS_213 VSS_306
N39 AG31 B20 AC7
C
M39
L39
VSS_33
VSS_34
VSS_35
VSS VSS_130
VSS_131
VSS_132
AB31
Y31
A20
AN19
VSS_214
VSS_215
VSS_216
VSS_307
VSS_308
VSS_309
R7
G7 C
GND1 J39 AB30 AC19 D7
VSS_36 VSS_133 VSS_217 VSS_310
H39 E30 W19 AG6
VSS_37 VSS_134 VSS_218 VSS_311
G39 AT29 K19 AD6
VSS_38 VSS_135 VSS_219 VSS_312
F39 AN29 G19 AB6
VSS_39 VSS_136 VSS_220 VSS_313
D39 AB29 C19 Y6
VSS_40 VSS_137 VSS_221 VSS_314
AT38 T29 AH18 U6
VSS_41 VSS_138 VSS_222 VSS_315
AM38 N29 P18 N6
VSS_42 VSS_139 VSS_223 VSS_316
AH38 K29 H18 K6
PWR_1.8VSUS VSS_43 VSS_140 VSS_224 VSS_317
AG38 G29 D18 H6
VSS_44 VSS_141 VSS_225 VSS_318
AF38 E29 A18 B6
VSS_45 VSS_142 VSS_226 VSS_319
AE38 C29 AY17 AV5
VSS_46 VSS_143 VSS_227 VSS_320
C38 B29 AR17 AF5
VSS_47 VSS_144 VSS_228 VSS_321
AK37 A29 AP17 AD5
VSS_48 VSS_145 VSS_229 VSS_322
100uF 6.3V(POSE) B20

100uF 6.3V(POSE) B20


10uF 6.3V 2012 RM

10uF 6.3V 2012 RM

AH37 BA28 AM17 AY4


VSS_49 VSS_146 VSS_230 VSS_323
C199 10uF 6.3V 2012 RM

C200 10uF 6.3V 2012 RM

AB37 AW28 AK17 AR4


VSS_50 VSS_147 VSS_231 VSS_324
D D
0.1uF 10V RK

0.1uF 10V RK

AA37 AU28 AV16 AP4


VSS_51 VSS_148 VSS_232 VSS_325
Y37 AP28 AN16 AL4
VSS_52 VSS_149 VSS_233 VSS_326
1

W37 AM28 AL16 AJ4


VSS_53 VSS_150 VSS_234 VSS_327
1

+ + V37 AD28 J16 Y4


VSS_54 VSS_151 VSS_235 VSS_328
T37 AC28 F16 U4
SM R37
VSS_55 VSS_152
W28 C16
VSS_236 VSS_329
R4
2

VSS_56 VSS_153 VSS_237 VSS_330


P37 J28 AN15 J4
VSS_57 VSS_154 VSS_238 VSS_331
N37 E28 AM15 F4
VSS_58 VSS_155 VSS_239 VSS_332
C197

C198
None

None

None

None

C201

C202

M37 AP27 AK15 C4


VSS_59 VSS_156 VSS_240 VSS_333
C196

C1181

L37 AM27 N15 AY3


VSS_60 VSS_157 VSS_241 VSS_334
J37 AK27 M15 AW3
VSS_61 VSS_158 VSS_242 VSS_335
H37 J27 L15 AV3
VSS_62 VSS_159 VSS_243 VSS_336
$V03L03 G37 G27 B15 AL3
VSS_63 VSS_160 VSS_244 VSS_337
F37 F27 A15 AH3
Added part D37
VSS_64 VSS_161
C27 BA14
VSS_245 VSS_338
AG3
VSS_65 VSS_162 VSS_246 VSS_339
AY36 B27 AT14 AF3
GND1 VSS_66 VSS_163 VSS_247 VSS_340
E AW36 AN26 AK14 AD3 E
VSS_67 VSS_164 VSS_248 VSS_341
AN36 M26 AD14 AC3
VSS_68 VSS_165 VSS_249 VSS_342
AH36 K26 AA14 AA3
VSS_69 VSS_166 VSS_250 VSS_343
AG36 F26 U14 G3
VSS_70 VSS_167 VSS_251 VSS_344
AF36 D26 K14 AT2
VSS_71 VSS_168 VSS_252 VSS_345
AE36 AK25 H14 AR2
VSS_72 VSS_169 VSS_253 VSS_346
AC36 P25 E14 AP2
PWR_1.05VMAIN VSS_73 VSS_170 VSS_254 VSS_347
C36 K25 AV13 AK2
VSS_74 VSS_171 VSS_255 VSS_348
B36 H25 AR13 AJ2
VSS_75 VSS_172 VSS_256 VSS_349
BA35 E25 AN13 AD2
VSS_76 VSS_173 VSS_257 VSS_350
AV35 D25 AM13 AB2
VSS_77 VSS_174 VSS_258 VSS_351
AR35 A25 AL13 Y2
VSS_78 VSS_175 VSS_259 VSS_352
100uF 6.3V(POSE) B20

AH35 BA24 AG13 U2


VSS_79 VSS_176 VSS_260 VSS_353
10uF 6.3V 2012 RM

10uF 6.3V 2012 RM

0.22uF 10V 1608 RK

0.22uF 10V 1608 RK

AB35 AU24 P13 T2


VSS_80 VSS_177 VSS_261 VSS_354
1uF 10V 1608 RK

AA35 AL24 F13 N2


VSS_81 VSS_178 VSS_262 VSS_355
Y35 AW23 D13 J2
VSS_82 VSS_179 VSS_263 VSS_356
W35 B13 H2
F VSS_83 VSS_264 VSS_357 F
1

V35 AY12 F2
VSS_84 VSS_265 VSS_358
+ T35 AC12 C2
CORE R35
VSS_85
K12
VSS_266 VSS_359
AL1
2

VSS_86 VSS_267 VSS_360


P35 H12
2

VSS_87 GND1 VSS_268


N35 E12
VSS_88 VSS_269
M35 AD11
VSS_89 VSS_270
C203

C204

C205

C206

C207

C208
None

L35 AA11
VSS_90 VSS_271
J35 Y11
VSS_91 VSS_272 GND1
H35
VSS_92 CALISTOGA_1p0 UNDECIDED
G35
VSS_93 GND1
F35
VSS_94
D35
VSS_95
AN34
GND1 VSS_96

G GND1
CALISTOGA_1p0
UNDECIDED [GMCH-8 CAP,GND] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 18 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
ϕλ PWR_1.8VSUS

12,20,30,76 REF_SM
※本項記載のコンデンサについては、DIMM Slotと同一の面に配置すること。
CN1
14 M_A_DQ[0:63] M_A_DQ[0:63] 14
1 2
14 M_A_DQS#[0:7] 3 4 M_A_DQ3 * M_A_DQS#[0:7] 14 12,20,30,76 REF_SM

1uF 10V 1608 RK


0.1uF 10V RK
A 14 M_A_DQS[0:7] M_A_DQ7 * 5 6 M_A_DQ6 * M_A_DQS[0:7] 14 A
M_A_DQ2 * 7 8 M_A_DM[0:7] 14

2
9 10 M_A_DM0

C209
M_A_DQS#0 11 12
#コンデンサ配置見直し予定

C210
M_A_DQS0 13 14 M_A_DQ0 *

1
M_A_DQ5 *
15
17
16
18
M_A_DQ4 *
#スナバ、EMI用CAP追加予定
M_A_DQ1 * 19
21
20
22
M_A_DQ10 *
M_A_DQ9 * #バネ追加?
M_A_DQ11 * 23 24
M_A_DQ13 * 25 26 GND1
M_A_DM1 14
27 28
M_A_DQS#1 29 30 M_CLK_DDR0 12
M_A_DQS1 31 32 M_CLK_DDR#0 12
33 34
M_A_DQ12 * 35 36 M_A_DQ14 PWR_1.8VSUS
B M_A_DQ8 * 37 38 M_A_DQ15 B
39 40
41 42
M_A_DQ16 43 44 M_A_DQ20
M_A_DQ17 45 46 M_A_DQ21 DIMM_THRMSD 12,20

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
47 48 82pin 88pin 96pin 104pin 112pin 118pin
M_A_DQS#2 49 50

2
M_A_DQS2 51 52 M_A_DM2 14

C211

C212

C213

C214

C215

C216
53 54
M_A_DQ18 55 56 M_A_DQ22

1
M_A_DQ19 57 58 M_A_DQ23
59 60
M_A_DQ24 61 62 M_A_DQ28
M_A_DQ25 63 64 M_A_DQ29
65 66 Bottom View
14 M_A_DM3 67 68 M_A_DQS#3
69 70 M_A_DQS3 GND1 GND1 GND1 GND1 GND1 GND1
C 71 72 C
M_A_DQ26 73 74 M_A_DQ30
M_A_DQ27 75 76 M_A_DQ31
77 78
12,21 M_CKE0 79 80 M_CKE1 12,21
81 82
83 84
14,21 M_A_BS#2 85 86
87 88
89 90 PWR_1.8VSUS
14,21 M_A_A12 M_A_A11 14,21
14,21 M_A_A9 91 92 M_A_A7 14,21
14,21 M_A_A8 93 94 M_A_A6 14,21
95 96
14,21 M_A_A5 97 98 M_A_A4 14,21
14,21 M_A_A3 99 100 M_A_A2 14,21

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
14,21 M_A_A1 101 102 M_A_A0 14,21 Slot1(A) Slot2(B) 81pin 87pin 95pin 113pin 103pin 117pin
D 103 104 D

2
14,21 M_A_A10 105 106 M_A_BS#1 14,21

C217

C218

C219

C220

C221

C222
14,21 M_A_BS#0 107 108 M_A_RAS# 14,21
14,21 M_A_WE# 109 110 M_CS#0 12,21

1
111 112
14,21 M_A_CAS# 113 114 M_ODT0 12,21
12,21 M_CS#1 115 116 M_A_A13 14,21
117 118
12,21 M_ODT1 119 120
121 122
M_A_DQ35 * 123 124 M_A_DQ39 * GND1 GND1 GND1 GND1 GND1 GND1
M_A_DQ38 * 125 126 M_A_DQ33 *
127 128
M_A_DQS#4 129 130 M_A_DM4 14
M_A_DQS4 131 132
133 134 M_A_DQ34 *
E M_A_DQ32 * 135 136 M_A_DQ36 * E
M_A_DQ37 * 137 138
139 140 M_A_DQ44 * PWR_1.8VSUS
M_A_DQ40 * 141 142 M_A_DQ45 *
M_A_DQ46 * 143 144
145 146 M_A_DQS#5
14 M_A_DM5 147 148 M_A_DQS5
149 150 M_CLK_DDR1 12

1uF 10V 1608 RK

1uF 10V 1608 RK

1uF 10V 1608 RK

1uF 10V 1608 RK

1uF 10V 1608 RK

1uF 10V 1608 RK

10uF 10V 2012 RK


M_A_DQ47 * 151 152 M_A_DQ41 *

None
M_A_DQ43 * M_A_DQ42 *

4.7uF 10V 2012 FZ


153 154
155 156

2
M_A_DQ53 * 157 158 M_A_DQ50 *

C224

C225

C226

C227

C228

C229

C230

C231
M_A_DQ49 * 159 160 M_A_DQ52 *
161 162

1
163 164
165 166 M_CLK_DDR#1 12
M_A_DQS#6 167 168
F M_A_DQS6 169 170 F
M_A_DM6 14
171 172
M_A_DQ48 * 173 174 M_A_DQ54 *
M_A_DQ51 * 175 176 M_A_DQ55 * $V03L04
177 178 GND1
M_A_DQ56 179 180 M_A_DQ60 Changed part/Reserve -> Mount
M_A_DQ57 181 182 M_A_DQ61 C230
183 184
14 M_A_DM7 185 186 M_A_DQS#7
187 188 M_A_DQS7
M_A_DQ58 189 190
M_A_DQ59 191 192 M_A_DQ62
193 194 M_A_DQ63
20,28,30 SMB_DATA_DIMM 195
197
196
198 SA0 ※FG端子については、それぞれ2個以上のVIAを設けて
 端子直近でGND1へと接続すること。
[DDR2 DIMM Slot-1]
20,28,30 SMB_CLK_DIMM
VDDSPD1 199 200 SA1
G G
2

PWR_3VMAIN C232 DDR2 CN(RSV)


CA49500-1043 GND1 TITLE
GILIA Main Board Rev.03
Fujitsu
0.1uF 10V RK DIMM0 SPD address : A0
1

GND1 GND1 DRAW. CUST.


NO. C1CP272450-X3
Proprietary& Confidential GND1 REV. DATE DESIGN CHECK APPR. DESCRIPTION
FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 19 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
ϕλ PWR_1.8VSUS
※本項記載のコンデンサについては、DIMM Slotと同一の面に配置すること。
12,19,30,76 REF_SM 12,19,30,76 REF_SM

0.1uF 10V RK

1uF 10V 1608 FZ


CN2
14 M_B_DQ[0:63] M_B_DQ[0:63] 14

2
1 2

C233

C234
14 M_B_DQS#[0:7] 3 4 M_B_DQ17 * M_B_DQS#[0:7] 14
A M_B_DQ21 * 5 6 M_B_DQ23 * M_B_DQS[0:7] 14 A

1
14 M_B_DQS[0:7] M_B_DQ22 * 7
9
8
10 * M_B_DM2 14
#コンデンサ配置見直し予定
M_B_DQS#2
M_B_DQS2
*
*
11
13
12
14 M_B_DQ20 * #スナバ、EMI用CAP追加予定
M_B_DQ19 *
15
17
16
18
M_B_DQ16 *
#バネ追加? GND1
M_B_DQ18 * 19 20 M_B_DQ4 *
21 22 M_B_DQ5 *
M_B_DQ1 * 23 24 M_B_DM[0:7] 14
M_B_DQ0 * 25 26 * M_B_DM0
27 28
M_B_DQS#0 * 29 30 M_CLK_DDR3 12
M_B_DQS0 * 31 32 PWR_1.8VSUS
M_CLK_DDR#3 12
33 34
M_B_DQ6 * 35 36 M_B_DQ2 *
B M_B_DQ7 * 37 38 M_B_DQ3 * B
39 40
41 42

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
M_B_DQ31 * 43 44 M_B_DQ30 * 81pin 87pin 95pin 113pin 103pin 117pin
M_B_DQ28 * 45 46 M_B_DQ27 * DIMM_THRMSD 12,19

2
47 48

C235

C236

C237

C238

C239

C240
M_B_DQS#3 * 49 50
M_B_DQS3 * 51 52 * M_B_DM3 14

1
53 54
M_B_DQ25 * 55 56 M_B_DQ26 *
M_B_DQ24 * 57 58 M_B_DQ29 *
59 60
M_B_DQ10 * 61 62 M_B_DQ9 *
M_B_DQ11 * 63 64 M_B_DQ8 * GND1 GND1 GND1 GND1 GND1 GND1
65 66 Bottom View
14 M_B_DM1 * 67 68 M_B_DQS#1 *
69 70 M_B_DQS1 *
C 71 72 C
M_B_DQ14 * 73 74 M_B_DQ13 *
M_B_DQ15 * 75 76 M_B_DQ12 *
77 78
12,21 M_CKE2 79 80 M_CKE3 12,21
81 82
83 84 PWR_1.8VSUS
14,21 M_B_BS#2 85 86
87 88
14,21 M_B_A12 89 90 M_B_A11 14,21
14,21 M_B_A9 91 92 M_B_A7 14,21
14,21 M_B_A8 93 94 M_B_A6 14,21

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
95 96 82pin 88pin 96pin 104pin 112pin 118pin
14,21 M_B_A5 97 98 M_B_A4 14,21

2
14,21 M_B_A3 99 100 M_B_A2 14,21

C241

C242

C243

C244

C245

C246
14,21 M_B_A1 101 102 M_B_A0 14,21 Slot1(A) Slot2(B)
D 103 104 D

1
14,21 M_B_A10 105 106 M_B_BS#1 14,21
14,21 M_B_BS#0 107 108 M_B_RAS# 14,21
14,21 M_B_WE# 109 110 M_CS#2 12,21
111 112
14,21 M_B_CAS# 113 114 M_ODT2 12,21
12,21 M_CS#3 115 116 M_B_A13 14,21
117 118 GND1 GND1 GND1 GND1 GND1 GND1
12,21 M_ODT3 119 120
121 122
M_B_DQ37 * 123 124 M_B_DQ39 *
M_B_DQ33 * 125 126 M_B_DQ35 *
127 128
M_B_DQS#4 129 130 M_B_DM4 14
M_B_DQS4 131 132 PWR_1.8VSUS
133 134 M_B_DQ32 *
E M_B_DQ38 * 135 136 M_B_DQ34 * E
M_B_DQ36 * 137 138 $V01L04
139 140 M_B_DQ44
M_B_DQ40 141 142 M_B_DQ45 Changed connection

1uF 10V 1608 RK

1uF 10V 1608 RK

1uF 10V 1608 RK

1uF 10V 1608 RK

1uF 10V 1608 RK

1uF 10V 1608 RK

10uF 10V 2012 RK


M_B_DQ41 143 144

C254 None
4.7uF 10V 2012 FZ
145 146 M_B_DQS#5
14 M_B_DM5 147 148 M_B_DQS5

2
149 150 M_CLK_DDR2 12

C248

C249

C250

C251

C252

C253

C255
M_B_DQ42 151 152 M_B_DQ46
M_B_DQ43 153 154 M_B_DQ47

1
155 156
M_B_DQ48 157 158 M_B_DQ52
M_B_DQ49 159 160 M_B_DQ53
161 162
163 164
165 166 M_CLK_DDR#2 12
M_B_DQS#6 167 168
F M_B_DQS6 169 170 GND1 F
M_B_DM6 14
171 172 $V03L04
M_B_DQ50 173 174 M_B_DQ54
M_B_DQ51 175 176 M_B_DQ55 Changed part/Reserve -> Mount
177 178 C255
M_B_DQ56 179 180 M_B_DQ60
M_B_DQ57 181 182 M_B_DQ61
183 184
14 M_B_DM7 185 186 M_B_DQS#7
187 188 M_B_DQS7
M_B_DQ58 189 190
M_B_DQ59 191 192 M_B_DQ62
193
195
194
196
M_B_DQ63
PWR_3VMAIN
※FG端子については、それぞれ2個以上のVIAを設けて
19,28,30 SMB_DATA_DIMM
197 198 SA0  端子直近でGND1へと接続すること。
[DDR2 DIMM Slot-2]
19,28,30 SMB_CLK_DIMM
VDDSPD0 199 200 SA1 1 2
G G
2

PWR_3VMAIN C256 DDR2 CN(STD) R714 1K 1/16W 5%


CA49500-1042 DIMM1 SPD address : A4 TITLE
GILIA Main Board Rev.03
Fujitsu
0.1uF 10V RK
1

GND1 GND1 GND1 DRAW. CUST.


NO. C1CP272450-X3
Proprietary& Confidential GND1 REV. DATE DESIGN CHECK APPR. DESCRIPTION
FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 20 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
Based on ECRU-050808
※本項の部品については、ピンスワップ可能である。
 配線を最優先とし、適宜ピンスワップを行うこと。
A  また集合抵抗を個別抵抗へと分解してもよい。 A

PWR_DIMM_VTT PWR_DIMM_VTT

C257
1 2
14,19 M_A_A[0:13] 1 2 None
RM9 4.7uF 6.3V 1608 RK
14,20 M_B_A[0:13]
M_A_A8 8 9 None C258 4.7uF 6.3V 1608 RK
M_A_A4 7 10 GND1
M_A_A5 6 11 1 2 None
M_A_A2 5 12 RM10
14,20 M_B_BS#[0:2]
M_A_A3 4 13 M_B_BS#1 1 16 C282 2200pF 25V RK
B 14,19 M_A_BS#[0:2]
3 14 2 15
B
M_A_A1 M_B_A1
M_A_A10 2 15 M_B_A2 3 14
M_A_BS#0 1 16 CM4 M_B_A3 4 13
1 8 M_B_A5 5 12 GND1
56x8 1/16W 5% 2 7 M_B_A0 6 11
3 6 M_B_A8 7 10
4 5 M_B_A4 8 9 CM8
1 8
0.1uFx4 16V 2012 BM 56x8 1/16W 5% 2 7
3 6
C263 None 4 5
14,20 M_B_BS#[0:2]
12,19,20 M_CKE[0:3] 1 2
RM11 M_B_BS#0 1 2 0.1uFx4 16V 2012 BM
M_CKE1 8 9 2200pF 25V RK
M_CKE0 7 10 R734 56 1/16W 5% C264 None
M_A_BS#2 6 11 1 2
C M_A_A11 5 12 RM12 C
M_A_A12 4 13 M_B_A9 1 16 2200pF 25V RK
M_A_A7 3 14 M_B_A12 2 15
M_A_A9 2 15 M_B_A6 3 14
M_A_A6 1 16 M_B_BS#2 4 13
CM5 M_B_A7 5 12
56x8 1/16W 5% 1 8 M_B_A11 6 11
2 7 M_CKE2 7 10
3 6 M_CKE3 8 9
4 5 CM9
56x8 1/16W 5% 1 8
0.1uFx4 16V 2012 BM 2 7
12,19,20 M_CKE[0:3]
3 6
C269 None 4 5
12,19,20 M_CS#[0:3]
RM13 1 2
M_A_A0 8 9 0.1uFx4 16V 2012 BM
D 12,19,20 M_ODT[0:3] M_CS#1 7 10 2200pF 25V RK D
M_A_BS#1 6 11 C270 None
M_ODT1 5 12 1 2
4 13 RM14
14,19 M_A_RAS# 12,19,20 M_ODT[0:3]
M_CS#0 3 14 M_ODT2 1 16 2200pF 25V RK
12,19,20 M_CS#[0:3]
12,19,20 M_CS#[0:3] M_A_A13 2 15 12,19,20 M_ODT[0:3] M_CS#2 2 15
1 16 14,20 M_B_A[0:13] M_ODT3 3 14
M_ODT0 M_B_A13 4 13
56x8 1/16W 5% CM6 5 12
14,20 M_B_CAS#
1 8 M_CS#3 6 11
2 7 14,20 M_B_WE# 7 10
3 6 14,20 M_B_RAS# 8 9
4 5 CM10
56x8 1/16W 5% 1 8
0.1uFx4 16V 2012 BM 2 7
3 6
E C275 None 4 5 E
1 2 14,20 M_B_A[0:13]
M_B_A10 1 2 0.1uFx4 16V 2012 BM
1 2 2200pF 25V RK
14,19 M_A_WE#
R733 56 1/16W 5% C276 None
R731 56 1/16W 5% 1 2

2200pF 25V RK
1 2 CM7
14,19 M_A_CAS#
1 8
R732 56 1/16W 5% 2 7
3 6
4 5 PWR_1.8VSUS

0.1uFx4 16V 2012 BM GND1

F C281 None F

0.1uFx4 16V 2012 BM

0.1uFx4 16V 2012 BM

0.1uFx4 16V 2012 BM

0.1uFx4 16V 2012 BM

0.1uFx4 16V 2012 BM


1 2
4
3
2
1

4
3
2
1

4
3
2
1

8
7
6
5

4
3
2
1
2200pF 25V RK
CM26

CM27

CM28

CM29

CM30
5
6
7
8

5
6
7
8

5
6
7
8

1
2
3
4

5
6
7
8
GND1
$V01L11
Added parts

GND1

G [DDR2 Termination] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 21 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
Based on ECRU-050808

TP2
A TESTPAD A
PWR_RTCBATT PWR_PMU

1K 1/16W 5%
CN3 PWR_RTC_ICH

2
1
+

1
1K 1/16W 5%

R125
2 D4 C283 7pF 25V AD
- 1SS400G 2 1 RTCX1

1
2 1

1
R126

10M 1/16W 5%
RTC Socket X2
2

1
CA52205-4031 GND1 D5 CMJ206
1SS400G 2

R127
2 1 RM17
4 5
LPC_AD3 29,36,42,46,83
3 6
B B

2
LPC_AD0 29,36,42,46,83
2 1 RTCX2 2 7
LPC_AD1 29,36,42,46,83
1 8
PWR_RTC_ICH C284 7pF 25V AD M4A ARRAY LPC_AD2 29,36,42,46,83
AB1 AA6 LPC_AD0_ICH 33x4 1/16W 5%
RTXC1 LAD0
AB2 AB5 LPC_AD1_ICH
RTCX2 LAD1

LPC
RTC
R128 10K 1/16W 5% GND1 AC4 LPC_AD2_ICH
LAD2
2 1 RTC_RST# AA3 Y6 LPC_AD3_ICH
RTCRST# LAD3
PWR_RTC_ICH
1uF 10V 1608 FZ
Y5 AC3 LPC_DRQ#0 42
INTRUDER# LDRQ0#
1
1uF 10V 1608 FZ

W4 AA5
CL1 INTVRMEN LDRQ1#/GPIO23 R130 33 1/16W 5%
2 1 INTRUDER#
1

R129 1M 1/16W 5% W1 AB3 LFRAME#_ICH 1 2


2

EE_CS LFRAME# LPC_FRAME# 29,36,42,46,83


C285

2 1 INTVRM_EN Y1
EE_SHCLK
C286

0.1uF 25V 1608 RK


CL2 R131 Y2 AE22
2

EE_DOUT A20GATE KBC_A20G 83

1
330K 1/16W 5% 2 1 W3 AH28
EE_DIN A20M# CPU_A20M# 7,10

C287
None
C GND1 R132 0 1/16W V3 AG27 C

2
LAN_CLK CPUSLP#

LAN
CPU
U3 AF24 CPU_DPRSTP# 7,10,71
GND1 GND1 GND1 LAN_RSTSYNC TP1/DPRSTP#
53 ACZ_BITCLK_MDM 2 1 AH25 CPU_DPSLP# 7,10
TP2/DPSLP#
R133 39 1/16W 5% U5
LAN_RXD0 ※ICHのAF26ピン直近に配置すること。
2 1 V4 AG26
38 ACZ_BITCLK_AUD
R134 39 1/16W 5% T5
LAN_RXD1 FERR# CPU_FERR# 7,10  THERMTRIP#の分岐は最小にすること。
LAN_RXD2
AG24  THERMTRIP#およびTHERMTRIP#_ICHは他の信号から0.5mmの
GPIO49/CPUPWRGD CPU_PWRGD 7,10
53 ACZ_SYNC_MDM 2 1 U7
LAN_TXD0
 GAPを確保すること。
R135 39 1/16W 5% V6
LAN_TXD1
38 ACZ_SYNC_AUD 2 1 V7 AG22
R136 39 1/16W 5% LAN_TXD2 IGNNE# CPU_IGNNE# 7,10
TPVIA34 PWR_1.05VMAIN
AG21 FWHINIT#
INIT3_3V#
U1 AF22
ACZ_BIT_CLK INIT# CPU_INIT# 7,10

56 1/16W 5%
AC-97/AZALIA
53 ACZ_RST#_MDM 2 1 R6 AF25
R137 39 1/16W 5% ACZ_SYNC INTR CPU_INTR 7,10

None
38 ACZ_RST#_AUD 2 1 R5 AG23 KBC_INIT# 26,83
ACZ_RST# RCIN#

1
D

100pF 25V AJ
R138 39 1/16W 5% D

1
38 ACZ_SDIN0 T2 AH24
ACZ_SDIN0 NMI CPU_NMI 7,10
53 ACZ_SDIN1 T3 AF23
ACZ_SDIN1 SMI# CPU_SMI# 7,10

C993
53 ACZ_SDOUT_MDM 2 1 T1

2
ACZ_SDIN2

R139
R140 39 1/16W 5% AH22

2
STPCLK# CPU_STPCLK# 7,10
38 ACZ_SDOUT_AUD 2 1 T4
R141 39 1/16W 5% ACZ_SDOUT
AF26 THERMTRIP#_ICH 1 2 THERMTRIP# 7,12
THERMTRIP#
51 SATA_LED# AF18
SATALED# R716
IDE_SDD[0:15] 51

100pF 25V AJ
AF3 AB15 IDE_SDD0 0 1/16W
51 SATA_RX0- SATA0RXN DD0

None
51 SATA_RX0+ AE3 AE14 IDE_SDD1
SATA0RXP DD1

C288
51 SATA_TX0- AG2 AG13 IDE_SDD2
SATA0TXN DD2
51 SATA_TX0+ AH2 AF13 IDE_SDD3

2
SATA0TXP DD3
AD14 IDE_SDD4
Unused SATA port DD4
AF7 AC13 IDE_SDD5
SATA2RXN DD5 IDE_SDD6
TX: Left open. AE7 AD12
SATA2RXP DD6
E RX: Tied to GND. AG6 AC12 IDE_SDD7 E
GND1 SATA2TXN DD7
(RDDP 10.8.10) AH6 AE12 IDE_SDD8
SATA2TXP DD8 GND1
AF12 IDE_SDD9
DD9

SATA
PWR_BAY AF1 AB13 IDE_SDD10
6 CLK_100_SATA- SATA_CLKN DD10
AE1 AC14 IDE_SDD11
6 CLK_100_SATA+ SATA_CLKP DD11
AF14 IDE_SDD12
DD12
TPVIA11

TPVIA12

AH10 AH13 IDE_SDD13


SATARBIASN DD13
AG10 AH14 IDE_SDD14
SATARBIASP DD14
1K 1/16W 5%

※直下に配置(スタブ0とする)
0.1uF 10V RK

AC15 IDE_SDD15
DD15
2

AF15 IDE AH17


51 IDE_SDIOR# DIOR# DA0 IDE_SDA0 51
AH15 AE17
51 IDE_SDIOW# DIOW# DA1 IDE_SDA1 51
R142

C289

AF16 AF17
1

51 IDE_SDDACK# DDACK# DA2 IDE_SDA2 51


AH16
1

26 IDE_IRQ IDEIRQ
AG16 AE16
51 IDE_SDIORDY IORDY DCS1# IDE_SDCS#1 51
51 IDE_SDDREQ AE15 AD16
DDREQ DCS3# IDE_SDCS#3 51
1
2.2K 1/16W 5%

F ICH7M REV 1.02 EDS F


2

R144
R143

24.9 1/16W 1%
1

Place R within 500 mils


GND1
of ICH ball.
GND1

G [ICH7M-1] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 22 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
ICHGPIO17 ICHGPIO48
LPC (Default) 1 1
M4B PCI 1 0
31 PCI_AD[0:31]
PCI_AD0 E18 D7 PCI_REQ#0 26,31
AD0 REQ0#
PCI_AD1 C18
AD1 PCI GNT0#
E7
PCI_GNT#0 31 SPI 0 1
A PCI_AD2 A16 C16 PCI_REQ#1 26 A
AD2 REQ1# R145 1 PCIE_RXN4
PCI_AD3 F18 D16 45 PCIE_RXN4_MINIC1 2
AD3 GNT1# 0 1/16W MINIC_2nd
PCI_AD4 E16 C17
PCI_AD5 A18
AD4 REQ2#
D17
PCI_REQ#2 26 ICH Boot BIOS Select R146 1 2 PCIE_RXP4
AD5 GNT2# 45 PCIE_RXP4_MINIC1
PCI_AD6 E17 E13 0 1/16W MINIC_2nd
AD6 REQ3# PCI_REQ#3 26
PCI_AD7 A17 F13
AD7 GNT3# R147 1K 1/16W 5% None
PCI_AD8 A15 A13 PCI_REQ#4 26
AD8 REQ4#/GPIO22
PCI_AD9 C14 A14 PCI_GNT#4 2 1
AD9 GNT4#/GPIO48 R148 1
PCI_AD10 E14 C8 LCDID0 26,58 51 PCIE_RXN4_BAY 2
AD10 GPIO1/REQ5# ICHGPIO17 /PCI_GNT5# 0 1/16W TV-PCIE
PCI_AD11 D14 D8 1 2
AD11 GPIO17/GNT5# R150 1
PCI_AD12 B12 51 PCIE_RXP4_BAY 2
AD12 PCI_C/BE#[0:3] 31 R149 1K 1/16W 5% 0 1/16W TV-PCIE
PCI_AD13 C13 B15 PCI_C/BE#0
AD13 C/BE0#
PCI_AD14 G15
AD14 C/BE1#
C12 PCI_C/BE#1 ※分岐からR/Cまでの配線長は
PCI_AD15 G13
AD15 C/BE2#
D12 PCI_C/BE#2 極力0に近づけること
PCI_AD16 E12 C15 PCI_C/BE#3
AD16 C/BE3# GND1
PCI_AD17 C11
AD17 C290 1
PCI_AD18 D11 A7 2 0.1uF 10V RK PCIE_TXN4_C
B A11
AD18 IRDY#
E10
PCI_IRDY# 26,31 45 PCIE_TXN4_MINIC1
MINIC_2nd
B
PCI_AD19
AD19 PAR PCI_PAR 31 C291 1
PCI_AD20 A10 B18 45 PCIE_TXP4_MINIC1 2 0.1uF 10V RK PCIE_TXP4_C
AD20 PCIRST# PCI_RST# 46 MINIC_2nd
PCI_AD21 F11 A12
AD21 DEVSEL# PCI_DEVSEL# 26,31
PCI_AD22 F10 C9
AD22 PERR# PCI_PERR# 26,31
PCI_AD23 E9 E11
AD23 PLOCK# PCI_LOCK# 26
PCI_AD24 D9 B10 PCI_SERR# 26,31
AD24 SERR# C292 1
PCI_AD25 B9 F15 51 PCIE_TXN4_BAY 2 0.1uF 10V RK
AD25 STOP# PCI_STOP# 26,31 TV-PCIE
PCI_AD26 A8 F14
AD26 TRDY# PCI_TRDY# 26,31 C293 1
PCI_AD27 A6 F16 51 PCIE_TXP4_BAY 2 0.1uF 10V RK
AD27 FRAME# PCI_FRAME# 26,31 AWS82 TV-PCIE
PCI_AD28 C7
AD28
PCI_AD29 B6 C26 PLT_RST#_ICH 2 1
AD29 PLTRST# PLT_RST# 12,29,30,34,36,42,44,45,50,51,64,83
PCI_AD30 E6 A9 CLK_33_ICH 5
AD30 PCICLK R1005-0.09
PCI_AD31 D6 B19 PCI_PME# 26,46
AD31 PME#

Interrupt I/F PCIE AC coupling caps need to be


A3 G8
C 26,31 PCI_INT#0
B4
PIRQA# GPIO2/PIRQE#
F7
LCDID1 26,58 within 250 mils of the driver. C
26 PCI_INT#1 PIRQB# GPIO3/PIRQF# LCDID2 26,58 $V02L03 M4D
26 PCI_INT#2 C5 F8 LCDID3 26
B5
PIRQC# GPIO4/PIRQG#
G7 Changed part to pad F26 V26
26 PCI_INT#3 PIRQD# GPIO5/PIRQH# LCDID4 26 43,63 PCIE_RXN1 PERn1 DMI0RXN DMI_RXN0 12

Direct Media Interface


43,63 PCIE_RXP1 F25 V25 DMI_RXP0 12
C294 1 PERp1 DMI0RXP
MISC 43,63 PCIE_TXN1 2 0.1uF 10V RK PCIE_TXN1_C E28 U28
C295 1 PETn1 DMI0TXN DMI_TXN0 12
AE5 AE9 43,63 PCIE_TXP1 2 0.1uF 10V RK PCIE_TXP1_C E27 U27
RSVD[1] RSVD[6] PETp1 DMI0TXP DMI_TXP0 12
AD5 AG8
RSVD[2] RSVD[7]
AG4 AH8 35 PCIE_RXN2 H26 Y26 DMI_RXN1 12
RSVD[3] RSVD[8] PERn2 DMI1RXN
AH4 F21 35 PCIE_RXP2 H25 Y25 DMI_RXP1 12
RSVD[4] RSVD[9] C296 1 PERp2 DMI1RXP
AD9 AH20 MCH_ICH_SYNC# 12 35 PCIE_TXN2 2 0.1uF 10V RK PCIE_TXN2_C G28 W28
RSVD[5] MCH_SYNC# C297 1 PETn2 DMI1TXN DMI_TXN1 12
35 PCIE_TXP2 2 0.1uF 10V RK PCIE_TXP2_C G27 W27
PETp2 DMI1TXP DMI_TXP1 12

PCI-Express
ICH7M REV 1.02 EDS
45 PCIE_RXN3 K26 AB26 DMI_RXN2 12
PERn3 DMI2RXN
45 PCIE_RXP3 K25
PERp3 DMI2RXP
AB25 DMI_RXP2 12 ※直下に配置(スタブ0とする)
C298 1 2 0.1uF 10V RK PCIE_TXN3_C J28 AA28
45 PCIE_TXN3 PETn3 DMI2TXN DMI_TXN2 12
C299 1 2 0.1uF 10V RK PCIE_TXP3_C J27 AA27
45 PCIE_TXP3 PETp3 DMI2TXP DMI_TXP2 12

TPVIA13

TPVIA14
D D
PCIE_RXN4 M26 AD25 DMI_RXN3 12
PERn4 DMI3RXN
PCIE_RXP4 M25 AD24 DMI_RXP3 12
PERp4 DMI3RXP
$V02L03 PCIE_TXN4_C L28 AC28
PETn4 DMI3TXN DMI_TXN3 12
PCIE_TXP4_C L27 AC27
PWR_3VMAIN Changed connection PETp4 DMI3TXP DMI_TXP3 12
M4C P26 AE28
PERn5 DMI_CLKN CLK_100_ICH- 6
26,28 SMB_CLK_ICH C22 AF19 SATA0_DET# 26 P25 AE27 CLK_100_ICH+ 6
SMBCLK GPIO21/SATA0GP PERp5 DMI_CLKP
SMB

26,28 SMB_DATA_ICH B22 AH18 N28


SMBDATA GPIO19/SATA1GP SPI_CS#_GPIO 29 PETn5
SATA
GPIO

A26 AH19 N27 C25 PWR_1.5VMAIN


26 SMB_LINKALERT# LINKALERT# GPIO36/SATA2GP PETp5 DMI_ZCOMP
26 SMLINK0 B25 AE19 R133, R139 should be placed D25 1 2
SMLINK0 GPIO37/SATA3GP SMB_CNT0 28 DMI_IRCOMP R152 24.9 1/16W 1%
A25 T25
26 SMLINK1 SMLINK1
AC1 less than 100 mils from T24
PERn6
F1
CLK14 CLK_14_ICH 5 PERp6 USBP0N USB_P0- 52
Clocks

26,47 SERB_RI# A28


RI# CLK48
B2 CLK_48_ICH 5 ICH7. R28
PETn6 USBP0P
F2
USB_P0+ 52 Place this resistor
R27 G4 within 500 mils of
R154 47 1/16W 1% PETp6 USBP1N USB_P1- 52
46 SPKSYS A19 C20 G3
A27
SPKR SUSCLK TPVIA33 1 2 R2
USBP1P
H1
USB_P1+ 52 ICH.
E 36,42 SUSTAT# SUS_STAT# 29 SPI_SCK SPI_CLK USBP2N USB_P2- 52 E
26 SYS_RST# SYS_RST# A22 B24 29 SPI_CS# P6 H2
SYS_RST# SLP_S3# SUSB# 42,44,46,68,80 SPI_CS# USBP2P USB_P2+ 52

SPI
D23 P1 J4
SLP_S4# SUSC# 44,46,73,74,80,83 R155 47 1/16W 1% SPI_ARB USBP3N USB_P3- 57
12 PM_BMBUSY# AB18 F22 J3
GPIO0/BM_BUSY# SLP_S5# TPVIA15 USBP3P USB_P3+ 57
29 SPI_SI 1 2 P5 K1
SPI_MOSI USBP4N USB_P4- 35

USB
26,82 ICHSMBALT# B23 AA4 PWROK_3VMAIN 12,26,28,37,46 29 SPI_SO P2 K2
GPIO11/SMBALERT# PWROK SPI_MISO USBP4P USB_P4+ 35
Power MGT

L4
USBP5N USB_P5- 51
5 STP_PCI# AC20 AC22 DPRSLPVR_ICH 12,26 52 USB_OC#0 D3 L5
GPIO18/STPPCI# GPIO16/DPRSLPVR OC0# USBP5P USB_P5+ 51
GPIO

5 STP_CPU# AF21 52 USB_OC#1 C4 M1


GPIO20/STPCPU# OC1# USBP6N USB_P6- 51
SYS

C21 PLLB# 26 52 USB_OC#2 D5 M2


TP0/BATLOW# OC2# USBP6P USB_P6+ 51
A21 26 USB_OC#3 D4 N4
GPIO26 OC3# USBP7N USB_P7- 33
C23 BSRBTN# 26,46 26 USB_OC#4 E5 N3
PWRBTN# OC4# USBP7P USB_P7+ 33
26 MEM_ID0 B21 26 USB_OC#5 C3
GPIO27 OC5#/GPIO29
26 MEM_ID1 E23 26 USB_OC#6 A2 D2 1 2
GPIO28 OC6#/GPIO30 USBRBIAS# R156 22.6 1/16W 1%
C19 PLT_RST# 12,29,30,34,36,42,44,45,50,51,64,83 26 USB_OC#7 B3 D1
LAN_RST# OC7#/GPIO31 USBRBIAS
26,31,36,42,83 PCI_CLKRUN# AG18
GPIO32/CLKRUN# ICH7M REV 1.02 EDS

C301 0.1uF 10V RK

C302 0.1uF 10V RK

0.1uF 10V RK
Y4 RSMRST# 26,46
F AC19
RSMRST# GND1 F
34 EXC_RST#0 GPIO33/AZ_DOCK_EN# Place this resistor
U2 E20
34 EXC_CLKEN#0 GPIO34/AZ_DOCK_RST# GPIO9
A20
EXTSMI# 26,46 within 500 mils of
GPIO10

2
26,35,43,46 PCIE_WAKE# F20
WAKE# GPIO12
F19 ICH.
26,31,36,42,83 SERIRQ AH21 E19 CPPE# 34,35
SERIRQ GPIO13
26,82 THLTL# AF20 R4

1
THRM# GPIO14

C303
E22
GPIO15 BLUE_RI# 26
26,46 VGATE AD22 R3
VRMPWRGD GPIO24
D20
GPIO25
AC21 AD21 PLL_CLKREQ#_SATA 5
GPIO6 SATACLKREQ#/GPIO35
83 KBC_SCI AC18 GPIO AD20 SMB_CNT1 28 $V01L07
GPIO7 GPIO38 SMB_CNT2
46,47 LCDCL# E21 AE20
GPIO8 GPIO39 Changed parts, GND1
ICH7M REV 1.02 EDS
Reserve -> Mount
G
GND1 GND1
[ICH7M-2] G
TITLE
GILIA Main Board Rev.03
Fujitsu
SYS_RST# TPVIA35 $V03L03 DRAW. CUST.
Added pad NO. C1CP272450-X3
Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION
FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 23 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
PWR_5VREF ϕλ PWR_1.05VMAIN

M4F
PWR_5VREF_SUS G10 L11
V5REF[1] Vcc1_05[1]
L12
Vcc1_05[2]
5mm PWR_1.5VMAIN AD17
V5REF[2] Vcc1_05[3]
L14
A L16 PWR_3VSTD PWR_5VREF PWR_3VMAIN PWR_5VMAIN A
Vcc1_05[4]
F6 L17
V5REF_Sus Vcc1_05[5]
V1の2.54mm以内に配置

100 1/16W 5%
L18
Vcc1_05[6]

2
RB521S-30
AA22 M11
Vcc1_5_B[1] Vcc1_05[7]

R157
0.1uF 10V RK
AA23 M18
Vcc1_5_B[2] Vcc1_05[8]

2
CORE
AB22 P11
None Vcc1_5_B[3] Vcc1_05[9]

C304
1uF 10V 1608 RK

1uF 10V 1608 RK

1uF 10V 1608 RK


10uF 6.3V 2012 RM

10uF 6.3V 2012 RM


AB23 P18
Vcc1_5_B[4] Vcc1_05[10]

D6
0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
AC23 T11

1
Vcc1_5_B[5] Vcc1_05[11]
2

1
AC24 T18
Vcc1_5_B[6] Vcc1_05[12]
AC25 U11
Vcc1_5_B[7] Vcc1_05[13]
C305

C306
AC26 U18
1

2
Vcc1_5_B[8] Vcc1_05[14]

C307

C308

C309

C310

C311

C312
PWR_3VMAIN PWR_3VSTD

0.1uF 10V RK
AD26 V11
Vcc1_5_B[9] Vcc1_05[15]

1
AD27 V12 GND1
Vcc1_5_B[10] Vcc1_05[16]

C313
AD28
Vcc1_5_B[11] Vcc1_05[17]
V14 Strap to RM24.1 (Page.26)
T28 T28 AD28 AD28 D28 D28 D26 V16
See M3CP27245*-X1!

2
Vcc1_5_B[12] Vcc1_05[18]

0.1uF 10V RK
D27 V17
Vcc1_5_B[13] Vcc1_05[19]

0.1uF 10V RK
D28 V18
B Vcc1_5_B[14] VCC PAUX Vcc1_05[20] B

1
E24
Vcc1_5_B[15]

C314
これらの部品はそれぞれ指定したpinの直近に配置のこと。 E25
Vcc1_5_B[16] VccSus3_3/VccLAN3_3[1]
V5

C315
GND1 E26 V1 GND1

2
Vcc1_5_B[17] VccSus3_3/VccLAN3_3[2]
F23 W2
Vcc1_5_B[18] VccSus3_3/VccLAN3_3[3]
PWR_3VMAIN 0.5mm F24
Vcc1_5_B[19] VccSus3_3/VccLAN3_3[4]
W7
PWR_5VREF_SUS PWR_3VSTD PWR_5VSUS
このページのコンデンサは G22
G23
Vcc1_5_B[20]
Vcc1_5_B[21] Vcc3_3/VccHDA
U6 GND1 GND1
ICH7Mの対応するピンから H22
Vcc1_5_B[22]

2
RB521S-30

RB521S-30
PWR_1.05VMAIN

0.1uF 10V RK
H23 R7
Vcc1_5_B[23] VccSus3_3/VccSusHDA
2.54mm以内に配置すること。 J22
Vcc1_5_B[24]

C316
J23 AE23

2
Vcc1_5_B[25] V_CPU_IO[1]
K22 AE26
Vcc1_5_B[26] V_CPU_IO[2]

D7

D60
PWR_3VMAIN

0.1uF 10V RK

0.1uF 10V RK
K23 AH26

VCCA3GP

1
Vcc1_5_B[27] V_CPU_IO[3]

1
L22
PWR_1.5VMAIN PWR_1.5VMAIN_DMI GND1 Vcc1_5_B[28]

0.1uF 10V RK
L23 AA7
Vcc1_5_B[29] Vcc3_3[3]

C317

C318
M22 AB12

2
C Vcc1_5_B[30] Vcc3_3[4] C

C319
L4 M23 AB20
Vcc1_5_B[31] Vcc3_3[5]

0.1uF 10V RK
1 2 N22 AC16

1
Vcc1_5_B[32] Vcc3_3[6]

C320
N23 AD13
Vcc1_5_B[33] Vcc3_3[7]

IDE
10uF 6.3V 2012 RM

LB2012T1R0M P22 AD18

2
Vcc1_5_B[34] Vcc3_3[8]
0.01uF 25V RK

1uH 300mA P23 AG12 GND1


Vcc1_5_B[35] Vcc3_3[9]
2

CA53100-5035 R22 AG15


Vcc1_5_B[36] Vcc3_3[10]
C322

R23
Vcc1_5_B[37] Vcc3_3[11]
AG19 PWR_3VMAIN AG15の2.54mm以内に配置 GND1
C321

R24
1

Vcc1_5_B[38] GND1
R25 A5
Vcc1_5_B[39] Vcc3_3[12]
R26 B13
Vcc1_5_B[40] Vcc3_3[13]
T22 B16
Vcc1_5_B[41] Vcc3_3[14]
T23 B7
Vcc1_5_B[42] Vcc3_3[15]
T26 C10
Power Sequence によっては Diode の削除可能

PCI
Vcc1_5_B[43] Vcc3_3[16] PWR_RTC_ICH PWR_3VSTD
T27 D15
GND1 Vcc1_5_B[44] Vcc3_3[17]
T28 F9
Vcc1_5_B[45] Vcc3_3[18]
U22 G11
Vcc1_5_B[46] Vcc3_3[19]
D U23
Vcc1_5_B[47] Vcc3_3[20]
G12 D

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
V22 G16
Vcc1_5_B[48] Vcc3_3[21]

2
V23
Vcc1_5_B[49]
W22 W5
Vcc1_5_B[50] VccRTC

C323

C324

C325

C326
W23

1
Vcc1_5_B[51]
Y22 P7
Vcc1_5_B[52] VccSus3_3[1]
Y23
Vcc1_5_B[53]
0.5mm 0.5mm 2.0mm VccSus3_3[2]
A24
B27 C24
PWR_3VMAIN PWR_1.5VMAIN PWR_1.5VMAIN Vcc3_3[1] VccSus3_3[3] GND1 GND1
D19
VccSus3_3[4]
AG28 D22
VccDMIPLL VccSus3_3[5] PWR_3VSTD
G19
VccSus3_3[6]
AB7
Vcc1_5_A[1]
1

1
0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

AC6 K3
Vcc1_5_A[2] VccSus3_3[7]
1

AC7 K4
Vcc1_5_A[3] VccSus3_3[8]
C327

C328

0.1uF 10V RK

0.1uF 10V RK
AD6 K5
2

Vcc1_5_A[4] VccSus3_3[9]

1
ARX
C329

E AE6 K6 E
2

Vcc1_5_A[5] VccSus3_3[10]
AF5 L1
Vcc1_5_A[6] VccSus3_3[11]

C330

C331
AF6 L2

2
USB

GND1 Vcc1_5_A[7] VccSus3_3[12]


AG5 L3
GND1 GND1 Vcc1_5_A[8] VccSus3_3[13]
AH5 L6
Vcc1_5_A[9] VccSus3_3[14]
AH5の2.54mm以内に配置 VccSus3_3[15]
L7
AD2 M6
PWR_1.5VMAIN VccSATAPLL VccSus3_3[16] PWR_1.5VMAIN
M7
VccSus3_3[17]
2.0mm AH11
Vcc3_3[2] VccSus3_3[18]
N7 GND1
PWR_1.05VSTD_ICH
AB10 AB17
Vcc1_5_A[10] Vcc1_5_A[19]
0.1uF 10V RK
AB9 AC17
Vcc1_5_A[11] Vcc1_5_A[20]
1
1uF 10V 1608 RK

AC10
Vcc1_5_A[12]
2

C332

AD10 T7
Vcc1_5_A[13] Vcc1_5_A[21]
C333

PWR_3VSTD

0.1uF 10V RK
AE10 F17
2

Vcc1_5_A[14] Vcc1_5_A[22]

1
ATX

0.5mm AF10 G17


1

Vcc1_5_A[15] Vcc1_5_A[23]

C334

None
AF9
F AG9
Vcc1_5_A[16]
AB8 F

2
Vcc1_5_A[17] Vcc1_5_A[24]
0.1uF 10V RK

AH9 AC8
Vcc1_5_A[18] Vcc1_5_A[25]
2

PWR_1.5VMAIN GND1
C335

GND1 0.5mm E3
VccSus3_3[19] VccSus1_05[1]
K7 GND1
1

AH9の2.54mm以内に配置 C1
VccUSBPLL VccSus1_05[2]
C28 PWR_1.05VSTD_ICH
G20
PWR_1.05VSTD_ICH VccSus1_05[3]
0.1uF 10V RK

AA2
VccSus1_05/VccLAN1_05[1]
2

GND1 0.5mm Y7
VccSus1_05/VccLAN1_05[2]
Vcc1_5_A[26]
A1
C336

0.1uF 10V RK
H6
Vcc1_5_A[27]
2
USB CORE

H7 PWR_1.5VMAIN
1

Vcc1_5_A[28]
C337

None
J6
Vcc1_5_A[29]
0.1uF 10V RK

J7
1

Vcc1_5_A[30]
1

0.1uF 10V RK
2
C338

None

GND1 ICH7M REV 1.02 EDS

[ICH7M-3 Power]
C339
2

G GND1 G
1

TITLE
GILIA Main Board Rev.03
Fujitsu
GND1 GND1
DRAW. CUST.
NO. C1CP272450-X3
AA2の2.54mm以内に配置 A1の2.54mm以内に配置
Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION
FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 24 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

A M4E A
A4 P28
VSS[1] VSS[98] PWR_1.5VMAIN
A23 R1
VSS[2] VSS[99]
B1 R11
VSS[3] VSS[100]
B8 R12
VSS[4] VSS[101]
B11 R13
VSS[5] VSS[102]
B14 R14
VSS[6] VSS[103]

100uF 6.3V(POSE) B20


10uF 6.3V 2012 RM

10uF 6.3V 2012 RM

10uF 6.3V 2012 RM


B17 R15
VSS[7] VSS[104]

None
B20 R16
VSS[8] VSS[105]

1
B26 R17
VSS[9] VSS[106]
B28 R18 +
VSS[10] VSS[107]
C2 T6

1
VSS[11] VSS[108]
C6 T12

2
VSS[12] VSS[109]

C340

C341

C342

C343
C27 T13
VSS[13] VSS[110]
D10 T14
VSS[14] VSS[111]
D13 T15
VSS[15] VSS[112]
D18 T16
B D21
VSS[16] VSS[113]
T17
B
VSS[17] VSS[114]
D24 U4
VSS[18] VSS[115]
E1 U12
VSS[19] VSS[116]
E2 U13
VSS[20] VSS[117] GND1
E4 U14
VSS[21] VSS[118]
E8 U15
VSS[22] VSS[119]
E15 U16
VSS[23] VSS[120]
F3 U17
F4
F5
F12
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
U24
U25
U26
ICH7M
F27 V2
VSS[28] VSS[125]
F28 V13
VSS[29] VSS[126]
G1 V15
VSS[30] VSS[127] PWR_1.05VMAIN
G2 V24
VSS[31] VSS[128]
G5 V27
C VSS[32] VSS[129] C
G6 V28
VSS[33] VSS[130]
G9 W6
VSS[34] VSS[131]
G14 W24
VSS[35] VSS[132]

100uF 6.3V(POSE) B20


10uF 6.3V 2012 RM
G18 W25
VSS[36] VSS[133]

None

None
1uF 10V 1608 RK

10uF 6.3V 2012 RM


4.7uF 10V 2012 FZ
G21 W26
VSS[37] VSS[134]

1
0.01uF 25V RK
G24 Y3
VSS[38] VSS[135]

1
G25 Y24 +
VSS[39] VSS[136]
G26 Y27
VSS[40] VSS[137]
H3 Y28

2
VSS[41] VSS[138]
H4 AA1
VSS[42] VSS[139]

C345

C346

C347

C348

C349

C344
H5 AA24
VSS[43] VSS[140]
H24 AA25
VSS[44] VSS[141]
H27 AA26
VSS[45] VSS[142]
H28 AB4
VSS[46] VSS[143]
J1 AB6
VSS[47] VSS[144]
J2 AB11
VSS[48] VSS[145]
D J5
VSS[49] VSS[146]
AB14 D
J24 AB16 GND1
VSS[50] VSS[147]
J25 AB19
VSS[51] VSS[148]
J26 AB21
VSS[52] VSS[149]
K24 AB24
VSS[53] VSS[150]
K27 AB27
VSS[54] VSS[151]
K28 AB28
VSS[55] VSS[152]
L13 AC2
VSS[56] VSS[153]
L15 AC5
VSS[57] VSS[154]
L24 AC9
VSS[58] VSS[155] PWR_3VMAIN PWR_1.05VMAIN
L25 AC11
VSS[59] VSS[156]
L26 AD1
VSS[60] VSS[157]
M3 AD3
VSS[61] VSS[158]
M4 AD4
VSS[62] VSS[159]
M5 AD7
VSS[63] VSS[160]
M12 AD8
VSS[64] VSS[161]

0.1uFx4 16V 2012 BM

0.1uFx4 16V 2012 BM

0.1uFx4 16V 2012 BM


E M13 AD11 E
VSS[65] VSS[162]
M14 AD15
VSS[66] VSS[163]

4
3
2
1

8
7
6
5

5
6
7
8
0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
M15 AD19
VSS[67] VSS[164]

1
M16 AD23
VSS[68] VSS[165]

CM23

CM24

CM25
M17 AE2
VSS[69] VSS[166]
M24 AE4

5
6
7
8

1
2
3
4

4
3
2
1
VSS[70] VSS[167]

C350

C351

C352
M27 AE8
VSS[71] VSS[168]
M28 AE11
VSS[72] VSS[169]
N1 AE13
VSS[73] VSS[170]
N2 AE18
VSS[74] VSS[171]
N5 AE21
VSS[75] VSS[172]
N6 AE24
VSS[76] VSS[173]
N11 AE25
VSS[77] VSS[174] GND1 GND1
N12 AF2
VSS[78] VSS[175]
N13 AF4
VSS[79] VSS[176]
N14 AF8
VSS[80] VSS[177]
N15 AF11
F N16
VSS[81] VSS[178]
AF27 F
VSS[82] VSS[179]
N17 AF28
VSS[83] VSS[180]
N18 AG1
VSS[84] VSS[181]
N24 AG3 $V01L11
VSS[85] VSS[182]
N25 AG7
N26
VSS[86] VSS[183]
AG11 Added parts
VSS[87] VSS[184]
P3 AG14
VSS[88] VSS[185]
P4 AG17
VSS[89] VSS[186]
P12 AG20
VSS[90] VSS[187]
P13 AG25
VSS[91] VSS[188]
P14 AH1
VSS[92] VSS[189]
P15 AH3
VSS[93] VSS[190]
P16 AH7
VSS[94] VSS[191]
P17 AH12
VSS[95] VSS[192]
P24 AH23

G
GND1
P27
VSS[96]
VSS[97]
VSS[193]
VSS[194]
ICH7M REV 1.02 EDS
AH27

GND1
[ICH7M-4 GND/CAP] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 25 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
※本項の部品については、ピンスワップ可能である。
 配線を最優先とし、適宜ピンスワップを行うこと。
A
 集合抵抗を個別抵抗へと分解する必要がある場合は設計者に連絡すること。 A

PWR_3VSTD
$V01L05 PWR_3VSTD PWR_3VMAIN
Changed connection
1 2
RM18 RM19 23,35,43,46 PCIE_WAKE#
9 8 9 8 R159 1K 1/16W 5%
23 USB_OC#7 23 PCI_REQ#4
10 7 10 7
B 23 USB_OC#5
11 6
23 PCI_LOCK#
11 6
B
23 USB_OC#6 23,31 PCI_DEVSEL#
23 USB_OC#3 12 5 23,31 PCI_PERR# 12 5
23 USB_OC#4 13 4 23,31 PCI_SERR# 13 4
14 3 23,58 LCDID1 14 3 $V01L08
15 2 23,58 LCDID0 15 2
16 1 16 1 Changed part
23,31 PCI_REQ#0
12,23 DPRSLPVR_ICH 1 2 DPRSLPVR 71
10Kx8 1/16W 5% 8.2Kx8 1/16W 5%
R160 510 1/16W 5%

$V01L08
2 1
Changed connection PWR_3VMAIN None
RM20 RM21 R161 100K 1/16W 5%
9 8 23,31,36,42,83 SERIRQ 9 8
10 7 10 7 GND1
C 22,83 KBC_INIT# 23,31,36,42,83 PCI_CLKRUN# C
11 6 23 PCI_REQ#2 11 6
45,46,47,61 RF_SW
12 5 23 PCI_REQ#1 12 5
23,28 SMB_DATA_ICH
13 4 23,31 PCI_STOP# 13 4
23 SMB_LINKALERT#
14 3 23,31 PCI_FRAME# 14 3
23 SMLINK0
15 2 23,31 PCI_TRDY# 15 2
23 SMLINK1
23,46 PCI_PME# 16 1 23 PCI_REQ#3 16 1

10Kx8 1/16W 5% 8.2Kx8 1/16W 5%

RM22 RM23
9 8 23,31 PCI_IRDY# 9 8
23,28 SMB_CLK_ICH
23 MEM_ID0 10 7 23 PCI_INT#3 10 7 23,46 VGATE
D 23 SYS_RST#
11 6 23,58 LCDID2 11 6 D
12 5 23 PCI_INT#2 12 5
23 PLLB#
23 MEM_ID1 13 4 23 LCDID3 13 4 12,23,28,37,46 PWROK_3VMAIN
14 3 23,31 PCI_INT#0 14 3
23,82 THLTL#
15 2 23 PCI_INT#1 15 2
23,46 EXTSMI#
23 BLUE_RI# 16 1 23 LCDID4 16 1 23,46 RSMRST#
10Kx8 1/16W 5% 8.2Kx8 1/16W 5%
22,83 KBC_INIT#
#SATA_LED#はOC Output. PWR_3VSTD
Luna側でHDDLED#をP.U.しているので
削除可。 23,46 BSRBTN#
$V02L01
RM24 Changed
connection

C1084 None

C1085 None

C1086 None

C1087 None

C1088 None
100pF 25V AJ

100pF 25V AJ

100pF 25V AJ

100pF 25V AJ

100pF 25V AJ
8 1
23,82 ICHSMBALT#

2
7 2
23,47 SERB_RI#
E 23 SATA0_DET# 6 3 E
5 4

1
23,46 RSMRST# SMT8
10Kx4 1/16W 5%

PWR_3VMAIN
GND1
$V02L01
2

GND1
R715 Added parts
10K 1/16W 5% ※本抵抗はICH7の近くに配置すること
※ICH7の端子直近に配置すること
1

Q109
2SK3541
22 IDE_IRQ 3 2 IRQ15_BAY 51
F F
PLLB# 23
1

46,47,51 BAY1_ON
3

Q133
1 2SK3541
46,82,83 PMU_PLLB
$V01L09
2

Added parts

GND1

G [ICH7M-5 P.U./P.D.] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 26 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

A A

B B

$V01L02
Added parts
C C

$V01L10
Changed part M67
Deleted part
FL61 8 AXL_X 82
XOUT
9 AXL_Y 82
YOUT
10 AXL_Z 82
ZOUT
3
SLP#

R935 10M 1/16W 5%

R936 10M 1/16W 5%

R937 10M 1/16W 5%


G-SENSOR

G-SENSOR

G-SENSOR
D NC1
2 D
4
NC2

1
PWR_PMU 5
NC3
2 1 6 7
VCC CSET

6800pF 25V RK
FL62

C1004

G-SENSOR
BLM21P300S

0.1uF 10V RK
1

2
VSS

2
G-SENSOR
G-SENSOR

HAAM-313B CA46920-0216
$V03L01

1
Added parts

C1003
G-SENSOR
ACCELEROMETER $V03L04
Changed parts
$V03L06
E GND1 GND1 Changed parts E
$V02L10
Decided part number

F F

G [G-Sensor] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 27 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile

A A

B B
PWR_3VMAIN PWR_3VMAIN

PWR_3VSUS PWR_3VSUS BUS Device Address


PWR_PMU
PWR_PMU DIMM0 A0h
DIMM
DIMM1 A4h

5
6
7
8

1
2
3
4
RM25
1Kx4 1/16W 5% RM26
4.7Kx4 1/16W 5% PMU PMU 32h
C None C
PLL D2h
PLL

4
3
2
1

8
7
6
5
M5
SN74CBT3253

7 6 MAIN THERMAL THERMAL 5Ch


23,26 SMB_CLK_ICH 1A 1B1 SMB_CLK_DIMM 19,20,30
_LCD
5 PMU
1B2 SMB_CLK_PMU 82 LCD A0h
4 SUS
1B3 SMB_CLK_PLL 5
3 MAIN
1B4 SMB_CLK_THRM_SPWG 45,49,58
D Device Hex Address D
9 10 MAIN
23,26 SMB_DATA_ICH 2A 2B1 SMB_DATA_DIMM 19,20,30
11 PMU
2B2 SMB_DATA_PMU 82 ADT7473 5Ch 0101 110x b
12 SUS
2B3 SMB_DATA_PLL 5
13 MAIN MEM slot0 A0h 1010 000x b
2B4 SMB_DATA_THRM_SPWG 45,49,58

23 SMB_CNT0
14
S0
PWR_5VSUS 0.5mm MEM slot1 A4h 1010 010x b
2 16
23 SMB_CNT1 S1 VCC
PMU 32h 0011 001x b
2

C353
1
OE1# CBT3253 NPUTS FUNCTION
0.1uF 10V RK
OE S1 S0 FUNCTION LCD(SPWG) A0h 1010 000x b
1

E 15 8 E
SMB_CNT[2:0] = ICH7 GPIO[39:37](Default: Input) OE2# GND L L L A port = B1 port
PWR_5VSUS L L H A port = B2 port
PWR_3VMAIN RM27 [Vih]
4 5 TI: 2V min GND1 L H L A port = B3 port
3 6 FC: 2V min SN74CBT3253PW L H H A port = B4 port
2 7 CA46400-2044
H X X Disconnect
1 8

10Kx4 1/16W 5%

SMBSEL_OK#

Q110
3

DTC144EMT2L

12,23,26,37,46 PWROK_3VMAIN 1
F F
2

GND1

G [SMBus] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 28 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
Based on ECRU-050808
PWR_3VMAIN

$V01L08
A Changed A
0.5mm part

4
3
2
1
PWR_3VMAIN M6
RM28
5 SPI_SI 23
SI 10Kx4 1/16W 5%
8
VDD R162 47 1/16W 1% SPIx2
2 1 2 SPI_SO 23
SO
R163

5
6
7
8
2 1 3 1 SPI_CE#0
WP# CE#
4.7K 1/16W 5%
6 SPI_SCK 23
R164 SCK
B SPI_WP#1 SPI_CS#_GPIO# B
1 2 7 17.86M
HOLD#
4 SPI_HOLD#1
VSS

3
4.7K 1/16W 5%
Q3
23 SPI_CS#_GPIO SPI_CS#_GPIO 1
M25P80-VMP6G GND1 2SK3541

2
CA46206-2331 SPIx2

1
0.5mm SPI_CS#_GPIO Description
R165 GND1
PWR_3VMAIN M7 High 1st SPI is available. 1K 1/16W 5%
SPIx2

2
SI
5 Low 2nd SPI is available.
8
VDD R166 47 1/16W 1%
2 1 2 TP3
C SO C
SPIx2 TP4
SPI_WP#1 3 1 SPI_CE#1
WP# CE#
#評価用(TPショート時2nd ROMアクセス固定)
6
SCK
SPI_HOLD#1 7 GND1
HOLD#
4
VSS

$V03L05 M25P80-VMP6G GND1


Changed part CA46206-2333 SPIx2
SPI_CS#_GPIO

D D
Layout Note: Q4A

2
EM6K1T2R
R135, R136 should be placed less SPIx2
than 100 mils from the serial flash device. 23 SPI_CS# 1 6 SPI_CE#0

1 2

R167 0 1/16W
No SPIx2

$V02L01 SPI_CS#_GPIO#
Added parts Q4B

5
EM6K1T2R
E 0.5mm SPIx2 E
4 3 SPI_CE#1
2 1 PWR_3VMAIN
22,36,42,46,83 LPC_AD0
R824 None
10 1/16W 5% 0.5mm
2 1 PWR_5VMAIN
22,36,42,46,83 LPC_AD1
R825 None
10 1/16W 5%

22,36,42,46,83 LPC_AD2 2 1
R826 None CN4
10 1/16W 5% 1
2
2 1 LPC_AD0_DBG 3 PWR_3VMAIN
22,36,42,46,83 LPC_AD3
R827 None LPC_AD1_DBG 4
10 1/16W 5% LPC_AD2_DBG 5 RM29
F LPC_AD3_DBG 6 8 1 F
23 SPI_SI
2 1 LPC_FRAME#_DBG 7 23 SPI_SO 7 2
22,36,42,46,83 LPC_FRAME# R828 None CLK_33_ASIC_DBG 8 SPI_CE#1 6 3
10 1/16W 5% PLT_RST#_DBG 9 SPI_CE#0 5 4
10 SMT8
10Kx4 1/16W 5%
2 1 PORT80
5,46 CLK_33_ASIC
R829 None None
10 1/16W 5% Layout Note:
1 2 RM28 should be placed close to ICH7M.
12,23,30,34,36,42,44,45,50,51,64,83 PLT_RST#
R830 None GND1
10 1/16W 5%

G
※R824∼R829は、M33(BENN)の端子直近に配置すること。
R830は、M16(TPM)の端子直近に配置すること。 [BIOS] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 29 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile

A A

B B

$V02L03
Added pads
TP228
PLT_RST# 12,23,29,34,36,42,44,45,50,51,64,83

C C

TP229
SUSSW# 47,62,83

※個別に位置指定します。
TP230
SMB_CLK_DIMM 19,20,28

TP231
SMB_DATA_DIMM 19,20,28
D D

TP232
REF_SM 12,19,20,76

PWR_3VMINIC_AUX0
TP233

PWR_1.8VSUS
E TP234 E

TP235

GND1

F F

G G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 30 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
PWR_3VSUS Based on GROSSO
None R175 10K 1/16W 5%
1 2
PWR_3VSUS

M9A R176 10K 1/16W 5%


A 1 2
※JAA16はCardBus時クロック信号になるので、GND1にてガードを行うこと。 A
R177 10K 1/16W 5%
L4 2 1
5 CLK_33_PCIC PCI_CLK
M9B
R16 T16 VCCD0# 34 35 JDA[0:15]
34 VCCD1# VCCD1#/SCLK VCCD0#/SDATA
T15 MS/SD_VCC3# 34
VPPD0/SLATCH/ODR_3V#
46 PCIC_RST# K7 JAA[0:25] 35
RST#
JDA0 F7 D9 JAA0
D0/CAD27 A0/CAD26
34,46 PWROK_3VSUS R13 R12 SPKPCM 46 JDA1 E6 G10 JAA1
NC(GLOBAL_RST#) SPKR_OUT# D1/CAD29 A1/CAD25
JDA2 D5 F10 JAA2
D2/RFU A2/CAD24
23 PCI_AD[0:31] P14 JDA3 P16 D11 JAA3
ODR_LEDON D3/CAD0 A3/CAD23
PCI_AD0 T11 H8 PCIC_LED1 83 JDA4 N15 G11 JAA4
AD0 SKTA_LEDON AWS83 D4/CAD1 A4/CAD22
PCI_AD1 N10 JDA5 M13 D12 JAA5
AD1 D5/CAD3 A5/CAD21
PCI_AD2 P10 N11 PCI_INT#0_PCIC 1 2 PCI_INT#0 23,26 JDA6 M15 F12 JAA6
AD2 MF0 D6/CAD5 A6/CAD20
PCI_AD3 T10 JDA7 L13 E13 JAA7
AD3 R1005-0.09 D7/CAD7 A7/CAD18
PCI_AD4 R10 $V02L03 JDA8 D6 H14 JAA8
B T9
AD4
F6
D8/CAD28 A8/CC/BE1#
H16
B
PCI_AD5 JDA9 JAA9
PCI_AD6 R9
AD5
T13 Changed part to pad JDA10 E5
D9/CAD30 A9/CAD14
K15 JAA10
AD6 MF3 SERIRQ 23,26,36,42,83 D10/CAD31 A10/CAD9
PCI_AD7 N9 JDA11 N13 J14 JAA11
AD7 D11/CAD2 A11/CAD12
PCI_AD8 R8 JDA12 N16 D14 JAA12
AD8 D12/CAD4 A12/CC/BE2#
PCI_AD9 P8 JDA13 M14 G16 JAA13
AD9 D13/CAD6 A13/CPAR
PCI_AD10 N8 P11 PME_PCIC# 46,47 JDA14 M16 F16 JAA14
AD10 RI_OUT#/PME# D14/RFU A14/CPERR#
PCI_AD11 R7 JDA15 L15 D15 JAA15
AD11 D15/CAD8 A15/CIRDY#
PCI_AD12 N7 E15
AD12 A16/CCLK
PCI_AD13 T6 R14 PCI_CLKRUN# 23,26,36,42,83 H15 JAA17
AD13 MF6/CLKRUN# A17/CAD16
PCI_AD14 R6 P4 PCI_DEVSEL# 23,26 H13 JAA18
AD14 DEVSEL# A18/RFU
PCI_AD15 T5 N6 PCI_TRDY# 23,26 35 JBVD1A F8 G14 JAA19
AD15 TRDY# BVD1/RI#/CSTSCHG A19/CBLOCK#
PCI_AD16 M5 R5 PCI_PAR 23 E8 F15 JAA20
AD16 PAR 35 JBVD2A BVD2/SPKR#/CAUDIO A20/CSTOP#
PCI_AD17 M4 P6 PCI_PERR# 23,26 E16 JAA21
AD17 PERR# A21/CDEVSEL#
PCI_AD18 L7 R4 PCI_SERR# 23,26 D16 JAA22
AD18 SERR# A22/CTRDY#
PCI_AD19 L6 P5 PCI_STOP# 23,26 E14 JAA23
AD19 STOP# A23/CFRAME#
PCI_AD20 K6 D4 PCI_REQ#0 23,26 35 JCD1A# P15 G13 JAA24
C AD20 REQ# CD1#/CCD1# A24/CAD17 C

470K 1/16W 5%
PCI_AD21 K5 D7 D13 JAA25
AD21 35 JCD2A# CD2#/CCD2# A25/CAD19

1
PCI_AD22 J4 1 2 JAA16
AD22

10pF 25V AD
PCI_AD23 J5 R179
AD23

2
PCI_AD24 H5 22 1/16W 5%
AD24

C372

None
PCI_AD25 H6 R15 MS/SD_CLK 33 E11 L16 JCE1A# 35
AD25 VPPD1/ODR_CLK 35 JINPACKA# INPACK#/CREQ# CE1#/CC/BE0#

R180
PCI_AD26 H7 T14 MS/SD_CMD 33 G9 K14

2
JCE2A# 35

1
AD26 MF5/ODR_CMD_BS/XD_ALE 35 JBSYA# RDY/IREQ#/CINT# CE2#/CAD10
PCI_AD27 G4 35 JWAITA# D8
AD27 WAIT#/CSERR#

2
PCI_AD28 G5 G8
AD28 PWR_3VSUS 35 JWPA WP/IOIS16#/CCLKRUN#
PCI_AD29 G7
AD29 C373 SD
PCI_AD30 F4

1
AD30 10pF 25V AD GND1 GND1
PCI_AD31 F5 G15
AD31 CORE_VCC
J6 F9 J16 JIORDA# 35
CORE_VCC 35 JVS1A# VS1/CVS1 IORD#/CAD13
23 PCI_C/BE#[0:3] L14 G12 J13 JIOWRA# 35
CORE_VCC 35 JVS2A# VS2/CVS2 IOWR#/CAD15
PCI_C/BE#0 T8 K13 JOEA# 35
C/BE0# GND1 OE#/CAD11
PCI_C/BE#1 T4 P12 E10 JREGA# 35
C/BE1# CORE_VCC REG#/CC/BE3#
PCI_C/BE#2 M6 E12 JRSTA 35
C/BE2# RESET/CRST#
D PCI_C/BE#3 H4
C/BE3# CORE_VCC
E7 PWR_PCIC_PCI PWR_3VMAIN
WE#/CGNT#
F14 JWEA# 35 D
F11
R181 CORE_VCC
23 PCI_AD[0:31] N5
CORE_VCC
PCI_AD19 1 2
PCI_VCC
K4 1 2 ※上記の抵抗/コンデンサは
  PCICの近くに配置すること。

4.7uF 10V 2012 FZ


100 1/16W 5% P9
PCI_VCC AWS7

C374 0.1uF 10V RK

C375 0.1uF 10V RK


J7
IDSEL PWR_3VSUS AW Short (R1005)
23,26 PCI_FRAME# M7
FRAME#
23,26 PCI_IRDY# N4 C11 PWR_SCXDVCC 2 1
IRDY# SC_VCC/XD_VCC R182 0 1/16W
23 PCI_GNT#0 E4
GNT#

1
U7 SD
SC_3V#/XD_WE# XD_WE# 33
U9 PWR_SCR
SC_5V#/XD_WPO XD_WP# 33
U11 XD_RE# 33,34 2 1

2
XD_RE#/ODR_3V#

C376
T7 R808 0 1/16W PWR_CARD0
33 SD_DET# SD_CD#(ODR_CD#)
T12 SCR
33 MS/SD_DATA0 MF1/ODR_DATA0
R11 U13 $V01L10
33 MS/SD_DATA1 ODR_DATA1 NC
N14 U15
33 MS/SD_DATA2 ODR_DATA2 NC Added parts
E K16 D10 E
33 MS/SD_DATA3 ODR_DATA3 SKT_VCC
33 SD_WP N12 Changed connection
MF2/ODR_WP GND1
33 MS_DET# P13
MF4/MS_CD#

2
E9
GND
33 XD_RB# C5
SC_CLK/XD_R/B# GND
F13 ※上記のコンデンサはPCICの電源ピン近くに配置すること。 C377
33 XD_CD# U5 G6 0.1uF 10V RK

1
SC_CD#/XD_CD# GND
33 XD_DATA4 C7 J15
SC_C4/XD_D4 GND
33 XD_DATA5 C15 L5
SC_IO/XD_D5 GND
33 XD_DATA6 C9 P7
SC_RST/XD_D6 GND
33 XD_DATA7 C13
SC_C8/XD_D7

C378 GND1
OZ711MP1 GND1 1 2
46 PCIC_RST#
IEEE1394(O2)#
100pF 25V AJ
None
C379 GND1
F 2 1 F
34,46 PWROK_3VSUS
PWR_3VSUS OZ711MP1
100pF 25V AJ
None
C380 0.1uF 10V RK

C381 0.1uF 10V RK

C382 0.1uF 10V RK

C383 0.1uF 10V RK

C384 0.1uF 10V RK

C385 0.1uF 10V RK

4.7uF 10V 2012 FZ

PWR_CARD0 PWR_CARD0
None R183 47K 1/16W 5%
R184 10K 1/16W 5% 2 1
35 JWPA
1

2 1 None
35 JCE2A#
C386

1 2
2

35 JCE1A#
R185 10K 1/16W 5%

G
GND1
None
[PCIC-1] G
TITLE
GILIA Main Board Rev.03
Fujitsu ※上記のコンデンサはPCICの電源ピン近くに配置すること。 DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 31 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile

A A

※PCICの近傍に配置すること。

1uF 10V 1608 FZ


C387
B B

1
56 1/16W 1%

56 1/16W 1%
IEEE1394(O2)

IEEE1394(O2)

IEEE1394(O2)
R187
1
IEEE1394(O2)

R186
2

2
C388 10pF 25V AD
M9C GND1
2 1
1

X4 IEEE1394(O2)
24.576MHz W13
TPA0P TPA+ 61
CAP44-24M57600 J19 W12
XI TPA0N TPA- 61
50ppm W11
2

TPB0P TPB+ 61
1 2 H19 W10 TPB- 61
GND1 XO TPB0N
C389 10pF 25V AD W9
IEEE1394(O2) TPA1P
W8
C TPA1N C
W7 2 1
TPB1P

2
56 1/16W 1%

56 1/16W 1%
IEEE1394(O2)

IEEE1394(O2)
R190 100K 1/16W 5% IEEE1394(O2) W6 AWS88
TPB1N R1005-0.09
2 1 M19
CPS

R191

R192
W14
TPBIAS0
N1 2 1
TPBIAS1 AWS89

1
R1005-0.09
GND1

1uF 10V 1608 FZ


C390

IEEE1394(O2)
2 1 N19
RI1

270pF 25V BJ
$V03L03

5.11K 1/16W 0.5%


R193 5.9K 1/16W 1%
Changed part to pad

IEEE1394(O2)
IEEE1394(O2)

2
IEEE1394(O2)
PWR_3VSUS

R194

C391
GND1

1
H1 GND1

1
VR_REF_VDD
D D
PWR_3VSUS
2

0.1uF 10V RK

$V02L01
C392

L19 $V02L01
VR_CPR Added parts
1

Changed connection
IEEE1394(O2)

L1 GND1
VR_CPR
22uF 6.3V 2012 RM

F1
CORE_VCC
1

IEEE1394(O2)

K1
A_VCC
C393

A_VCC
M1 FL9 ※PCICの近傍に配置すること。
BLM11A121S PWR_3V1394 1 2
2

GND1 <FILTER>
2 1 R926 0 1/16W
G1 None
TEST_PHY IEEE1394(O2)
Max ?mA

0.1uF 10V RK
F19 PWR_3VSUS
GND1 GND1 GND Q139 IEEE1394(O2) PWR_3V1394
E G19 E
GND

IEEE1394(O2)
K19 2 1 PWR_3VMAIN SI2305DS-T1-E3
GND

2
J1 P1
NC GND R195 0 1/16W
P19 2 3
GND None

IEEE1394(O2)
470K 1/16W 5%

0.1uF 10V RK
1
C394

IEEE1394(O2)

1
1
IEEE1394(O2)

IEEE1394(O2)

GND1
0.1uF 10V RK

0.1uF 10V RK

OZ711MP1

R923

C1167

2
2
2

GND1

47K 1/16W 5%
IEEE1394(O2)
1

2
PWR_3VMAIN
C395

C396

IEEE1394(O2)
1K 1/16W 5%
F F

R924
1
R925

3
1
Q140
1 2SK3541
46 1394_ENABLE
IEEE1394(O2)

2
GND1

GND1

G [PCIC-2] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 32 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
TP5 TP6
TESTPAD TESTPAD PWR_5VSUS $V01L10
SD_WP XD_CD#
$V01L05 Changed connection
TP7 Changed connection CN5 PWR_SCR
TP8 TESTPAD
A TESTPAD MS_DET# TP197 A
SD_DET# TESTPAD PWR_3VSUS
TP9 PWR_SD
TESTPAD R433 0 1/16W
TP10 MS/SD_D_CMD 1 2 BT TP196 PWR_5VMAIN
52 USB_P7+_BT

2
TESTPAD R196 TESTPAD CN5
MS/SD_D_CLK TP11 #SCR時Pull-up不要 10K 1/16W 5% R432 0 1/16W
TESTPAD SD 1 2 BT
52 USB_P7-_BT
MS/SD_D_DATA0 1
TP12 RM70 VCC_FLC

1
SMT8
TESTPAD TP13 5 4 XD_D_RB# 2
31 XD_RB# 23 USB_P7+ USB+
MS/SD_D_DATA1 TESTPAD 6 3 XD_D_RE#
31,34 XD_RE#
MS/SD_D_DATA2 31 XD_WE# 7 2 XD_D_WE# 23 USB_P7- 3
USB-
31 XD_WP# 8 1 XD_D_WP#
TP14 TP15 ※分岐/TPのスタブは最小とすること。 4
GND
TESTPAD TESTPAD 0x4 1/16W $V01L10
MS/SD_D_DATA3 XD_DATA6 SD/SCR SYS_ID1 5
B Added part 46,47 SYS_ID1 SYSID B
TP16 6
TP17 TESTPAD RM33 N.C.
TESTPAD
SMT8 $V01L08
XD_DATA4 XD_D_DATA4 4 5 XD_DATA4 31 7
XD_DATA7 XD_D_DATA5 3 6 Changed connection 3VSUS_SCR
XD_DATA5 31
TP18 XD_D_DATA6 2 7 8
XD_DATA6 31 PWR_SCR(Output)
TESTPAD XD_D_DATA7 1 8 XD_DATA7 31
TP19 XD_WE# 9
TESTPAD 0x4 1/16W SD/SCR 5VSUS_SCR
XD_DATA5 TP20 SCR_PWRON 10
46 SCR_PWRON 3VSUSOK_SCR
TESTPAD
XD_RB# ※RM33,RM34はピンスワップ可能 31 XD_CD#
SC_CD# 11
XD_CD#/SC_CD#
TP21
TESTPAD TP22 RM34 $V01L10 XD_D_RB# SC_CLK 12
TESTPAD XD_RB#/SC_CLK
XD_WP# MS/SD_D_DATA1 1 8 MS/SD_DATA1 31
SDMS_EXIST# MS/SD_D_DATA0 2 7 Changed connection XD_D_RE# 13
C MS/SD_DATA0 31 XD_RE# C
MS/SD_D_DATA2 3 6 MS/SD_DATA2 31
TP23 MS/SD_D_DATA3 4 5 XD_CE# 14
MS/SD_DATA3 31 31 MS_DET# XD_CE#
TESTPAD SMT8
MS/SD_D_CMD 0x4 1/16W SD MS/SD_D_CLK XD_CLE 15
TP24 TESTPAD XD_CLE
SD_DATA0 #SYSID1はSmartCardSlotの有無判別用bitとする。 MS/SD_D_CMD XD_ALE 16
XD_RLE
TP25
TESTPAD
 SDMS_EXIST#がLowの場合、SD,MS,xDをEnableするが、 XD_D_WE# SC_3V# 17
XD_RE# TP26 TESTPAD  SDMS_EXIST#とSYSID1が両方Lowの場合は、 XD_WE#/SC_3V#
SD_DATA1 BIOSはPCICのxDのFunctionをDisableし、SRCのFunctionをEnableする。 XD_D_WP# SC_5V# 18
XD_WPO/SC_5V#
XD_D_DATA4 SC_FCB 19
XD_DATA4/SC_FCB
TP27 TESTPAD R198 0 1/16W
SD_DATA2 MS/SD_D_CMD 2 1 SD XD_D_DATA5 SC_IO 20
MS/SD_CMD 31 XD_DATA5/SC_IO
XD_D_DATA6 SC_RST 21
XD_DATA6/SC_RST
D TP202 TP28 TESTPAD D
TESTPAD SD_DATA3 XD_D_DATA7 SC_C8 22
XD_DATA7/SC_C8
SYS_ID1
R197 75 1/16W 5% 23
GND_SD/SCR
MS/SD_D_CLK 2 1 SD MS/SD_CLK 31
SD_DATA2 24
TP203 SD_DATA2
TESTPAD TP236 TESTPAD SD_DATA3 25
SD_DATA3
2

SCR_PWRON PWR_SCR C1032


10pF 25V AD MS/SD_D_DATA3 26
None MS_XD_DATA3
1

$V02L05 31 MS_DET# 27
MS_DET#

$V01L09 Added pad $V01L05 MS/SD_D_DATA2 28


MS_XD_DATA2
Added pads GND1 Deleted part M11,M12,Q6,R202,R203,C400.C402 PWR_SD MS/SD_D_DATA0 29
M10 MS_XD_DATA0
E E
MS/SD_D_DATA1 30
MS_XD_DATA1

4.7uF 6.3V 1608 RK


MS/SD_D_CMD 31
SD_CMD/MS_BS

SD
MS/SD_D_DATA0 2 3 SD_DATA0
1A 1B

1
over 2.2uF 32
VCC_SDMSXD
MS/SD_D_DATA1 5 6 SD_DATA1 for xD Compliance
2A 2B

C397
33

2
VCC_SDMSXD
MS/SD_D_DATA2 9 8 SD_DATA2
3A 3B
MS/SD_D_CLK 34
SD_CLK
MS/SD_D_DATA3 12 11 SD_DATA3
4A 4B
SD_DATA0 35
PWR_5VSUS GND1 SD_DATA0
SD_DATA1 36
SD_DATA1
0.1uF 10V RK

SD_DET# 1 14
1OE# VCC
4 31 SD_DET# SD_DET# 37
2OE# SD_DET#
2

C401 SD

10
F 13
3OE#
38 F
4OE# 31 SD_WP SD_WP#
1

7 39
GND GND(SDMSXD)

46,47 SDMS_EXIST# 40
SN74CBT3125PW/FST3125MTC SDMS_EXIST#
$V01L06 SD GND1
Changed part
USB/SD/MS Board CN
SD/FeliCa

※上記の<1A-B>∼<4A-B>の組み合わせはスワップ可能 $V01L05 GND1

Deleted part C398

G [SD/MS/xD Slot] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 33 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile

A A

PWR_5VSUS PWR_CARD0
PWR_3VSUS
M13 4mm
2mm
PWR_1.5VMAIN
3 11 PWR_3VSTD
3.3V VCC
4 12
3.3V VCC
13
VCC
0.1uF 10V RK

1uF 10V 1608 FZ


1uF 10V 1608 FZ

5
5V
1

1
6 $V01L02
B 5V B
0.1uF 10V RK 1.5mm
1uF 10V 1608 FZ

Added parts
2

2
C403

C404

9 10
2

2
12V VPP

C1000
M14 PWR_1.5VPEC
C405

C406

1.2mm
1

1uF 10V 1608 FZ


15 13
V15_IN1 V15_1 PWR_3.3VPEC 0.5mm

1uF 10V 1608 FZ


16 14
V15_IN2 V15_2

1
GND1
GND1 4 6 PWR_3.3VPECAUX
V3_IN1 V3_1

C1001
GND1 5 7

2
V3_IN2 V3_2

C1002
31 VCCD0# 1 8
VCC5# OC#

None
31 VCCD1# 2 18 17
VCC3# V3AUX_IN V3AUX
14
VPP_VCC
15
VPP_PGM
16 GND1
31,46 PWROK_3VSUS SHDN# GND1 2
C 23 EXC_RST#0 EC_RST# C
12,23,29,30,36,42,44,45,50,51,64,83 PLT_RST# 1 2 PLT_RST#_PCICPW 1 8 EXC_RST# 35
PLT_RST# PERST#
7
GND R1005-0.09
23,35 CPPE# CPPE# 12
AWS9 CPPE#
OZ2211SN-C1 CPUSB# 11
35 CPUSB# CPUSB#
CA46710-0020
GND1
PWR_3VMAIN
3
SYSR

23 EXC_CLKEN#0 9
EC_CLKEN#

35 EXC_CLKREQA# 20
EC_CLKREQ# #PLL側にてP.U.
D PLL_CLKREQ#
19 PLL_CLKREQA# 5 D

10
GND

BD4155FV
GND1 CA46710-0070
TESTPAD
Q5 SD TP30 PWR_SD
PWR_3VSUS SI2305DS-T1-E3
E E
2 3 1 2
1 2
2

470K 1/16W 5%

0.1uF 10V RK
2

PS1
1

nanoSMDC110F
1

SD SD
1
R199

C399

R201
1

SD 150K 1/16W 5%
SD
2

#集合抵抗へ統合予定
PWR_3.3VPEC
PWR_3VSTD
R200 SD
2 1 GND1 1 2 CPUSB# 1 2
31 MS/SD_VCC3# 35 EXC_CLKREQA#
F 47K 1/16W 5% R205 100K 1/16W 5% R206 100K 1/16W 5% F
R208 None CPPE# 1 2
1 2
R809 None R207 100K 1/16W 5%
2 1 100K 1/16W 5%
31,33 XD_RE#
47K 1/16W 5% GND1

$V01L10
Added part

G [PCMCIA Power] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 34 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7

PWR_CARD0M
8 9
Nile
$V01L11 AWS8 PWR_CARD0
Deleted part FL11 $V02L09

2.2uF 10V 2012 RK


1 2
Changed part C419

2200pF 25V RK

0.1uF 10V RK
$V01L02 Changed part CN6 Changed connection

BLM21P300S
1

1
PWR_CARDP0M AW Short (R1005)

コネクタ変更のためピンアサイン変更

C417

C418

FL10
A A

C419
2200pF 25V RK

0.1uF 10V RK

1
2

2
GND1
JAA[0:25] 31

C407
1

C408
JDA[0:15] 31

0.1uF 10V RK
MAX:0.3A 0.5A

1
PWR_3.3VPECAUX GND1
C413

C412
2

2
10uF 6.3V 1608 RM CN6B CN6C
CBS06-R0J1005M
MAX:0.65A
PWR_1.5VPEC B68 B34
B B68 B34 B
GND1
$V01L10 Changed parts
B67 JCD2A# 31 B33 JWPA 31
B67 B33
B66 JDA10 B32 JDA2
B66 B32
MAX:1.3A
PWR_3.3VPEC

0.1uF 10V RK
B65 JDA9 B31 JDA1
B65 B31

1
CN6A B64 JDA8 B30 JDA0
B64 B30

CBS06-R0J1005M
10uF 6.3V 1608 RM
C411

C410
10uF 6.3V 1608 RM
A26 B63 B29 JAA0

2
GND 10uF 6.3V 1608 RM B63 JBVD1A 31 B29

CBS06-R0J1005M
0.1uF 10V RK
CBS06-R0J1005M

None
A25 PCIE_TXP2 23 B62 JBVD2A 31 B28 JAA1
PETp0 B62 B28

2
A24 PCIE_TXN2 23
PETn0

C415
B61 JREGA# 31 B27 JAA2
B61 B27

C414
A23

1
GND GND1 B60 JINPACKA# 31 B26 JAA3
C B60 B26 C

C416
A22 PCIE_RXP2 23
PERp0
A21 PCIE_RXN2 23 B59 JWAITA# 31 B25 JAA4
PERn0 B59 B25
A20 B58 JRSTA 31 B24 JAA5
GND B58 B24
A19 GND1 GND1 B57 B23 JAA6
REFCLK+ CLK_100_EXCARD+ 6 B57 JVS2A# 31 B23
A18 CLK_100_EXCARD- 6
REFCLK-
B56 JAA25 B22 JAA7
B56 B22
A17 CPPE#_CN CPPE#_CN 1 2 B55 JAA24 B21 JAA12
CPPE# CPPE# 23,34 B55 B21
A16 CLKREQA#_CN 1 2 R210 100 1/16W 5% B54 JAA23 B20 JAA15
CLKREQ# B54 B20

1
R1005-0.09 C420 B53 JAA22 B19 JAA16
AWS10 0.033uF 16V RK B53 B19
A15 EXC_CLKREQA# 34

2
+3.3V
A14 B52 B18
+3.3V B52 B18
D D
A13 GND1 B51 B17
PERST# EXC_RST# 34 B51 B17
A12 B50 JAA21 B16 JBSYA# 31
+3.3VAUX B50 B16
A11 PWAKE# PWR_3.3VPECAUX B49 JAA20 B15
WAKE# B49 B15 JWEA# 31
A10 B48 JAA19 B14 JAA14
+1.5V B48 B14
1

A9
+1.5V
B47 JAA18 B13 JAA13
B47 B13
A8 SMB_DATA_NEWCARD
SMBDATA Q7
A7 SMB_CLK_NEWCARD B46 JAA17 B12 JAA8
SMBCLK DTC144EMT2L B46 B12
A6 B45 JIOWRA# 31 B11 JAA9
RESERVED B45 B11
A5
RESERVED
B44 JIORDA# 31 B10 JAA11
CPUSB#_CN B44 B10
E A4 E
CPUSB#
CNFG1 2 3 PCIE_WAKE# 23,26,43,46 B43 JVS1A# 31 B9 JOEA# 31
CNFG B43 B9
CNFG2 A3 USB_P4+_EXC
CNFG USBD+
CNFG3 A2 USB_P4-_EXC B42 JCE2A# 31 B8 JAA10
CNFG USBD- L6 B42 B8
CNFG4
CNFG
A1 2 3 USB_P4+ 23 B41 JDA15 B7 JCE1A# 31
GND 2 3 B41 B7
1 4 USB_P4- 23
1 4
B40 JDA14 B6 JDA7
ExpressCard-CardBus CN DLW21HN900SQ2L B40 B6
CA52301-5041 B39 JDA13 B5 JDA6
B39 B5
TP32 B38 JDA12 B4 JDA5
B38 B4
GND1 GND1 B37 JDA11 B3 JDA4
TP31 B37 B3
B36 JCD1A# 31 B2 JDA3
B36 B2
F B35 B1 F
B35 B1

ExpressCard-CardBus CN ExpressCard-CardBus CN
CA52301-5041 CA52301-5041

GND1
R209 100 1/16W 5% GND1
CPUSB#_CN 2 1 CPUSB# 34
PWR_3.3VPECAUX ※JCE1x#, JCE2x#, JOEx#, JWEx#は、
R211 4.7K 1/16W 5%  データバスとの平行配線とならないように配線すること。
1

SMB_CLK_NEWCARD 1 2
C409 ※FGはGND1に接続すること。
0.033uF 16V RK R212 4.7K 1/16W 5%
2

SMB_DATA_NEWCARD 1 2

G
GND1
[PCMCIA-Connector] G
TITLE
GILIA Main Board Rev.03
Fujitsu
SLOT#2:ExpressCard
DRAW. CUST.
NO. C1CP272450-X3
SLOT#1:CardBus
Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION
FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 35 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile

TP212
$V01L05
LPC_AD0
A TESTPAD Changed A
net R214 None
5 CLK_33_TPM_OB
TP213 LPC_AD1 name ※分岐は最小とすること 0 1/16W $V01L05

None
10pF 25V AD
TESTPAD 1 2 CLK_33_TPM11 M15
Changed net name

1
5 CLK_33_TPM_OB 21 26
TP214 LCLK LAD0 LPC_AD0 22,29,42,46,83
LPC_AD2 23

2
LAD1 LPC_AD1 22,29,42,46,83

C421
TESTPAD 27 20
23,26,31,42,83 SERIRQ SERIRQ LAD2 LPC_AD2 22,29,42,46,83
12,23,29,30,34,42,44,45,50,51,64,83 PLT_RST# 16 17
LRESET# LAD3 LPC_AD3 22,29,42,46,83
23,42 SUSTAT# 28 22 LPC_FRAME# 22,29,42,46,83
TP215 LPCPD# LFRAME# PWR_3VSUS
LPC_AD3 23,26,31,42,83 PCI_CLKRUN# 15
TESTPAD CLKRUN#
1 6 TPM_IN_GPIO TP33 PWR_3VMAIN GND1
PWR_3VSUS TP34 TPM_IN_GPIO2 NC GPIO TESTPAD
2
TP216 TESTPAD GPIO2
LPC_FRAME#

R704 TPM(OB)
TESTPAD PWR_3VMAIN
B B

1
2.2K 1/16W 5%
9 5
BADD VSB
TP217 PLT_RST# TPM_PP 7
TESTPAD PPRESENCE PWR_3VMAIN
10
3V
19

2
3V

C423 TPM(OB)

C424 TPM(OB)

C425 TPM(OB)

C426 TPM(OB)
0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
12 24
TP218 NC 3V
SERIRQ 47 CLK_32K_TPM 13
XTALI

2
TESTPAD 14 TL1
XTALO TESTPAD
4
GND
11

1
GND
TP220 SUSTAT# 3
NC GND
18 #クリア方法再確認
TESTPAD $V03L06 8 25 TL2
TESTI GND TESTPAD
Changed part
TP219 PCI_CLKRUN# TPM_v1.2(Inf) TPM(OB)
TESTPAD GND1 CA46120-0198 GND1 TPM_PP
C C
SLB 9635 TT1.2

1
TP221 PCI_CLKRUN#
TESTPAD (P-TSSOP-28-1) R739
※M15の近くに配置すること。 4.7K 1/16W 5%
スタブは最小とすること。

2
State TPM VDD TPM VSB TPM CLK 32K CLK TPM LPCPD#

$V01L10 S0,S1,S2 ON ON Active Active High


GND1
Added pads S3 OFF ON Inactive Active H => L before S3
S4,S5 OFF OFF Inactive Inactive Low
D D
PWR_3VMAIN

$V01L05
Added part CN32
CN32
M16
23,26,31,42,83 PCI_CLKRUN# 1 16
CLKRUN# NC
CLK_33_TPM11 8 2
LCLK LAD0 LPC_AD0 22,29,42,46,83
12,23,29,30,34,42,44,45,50,51,64,83 PLT_RST# 2 17 3
LRESET# SMBDAT LAD1 LPC_AD1 22,29,42,46,83
E 23,26,31,42,83 SERIRQ 12 6 E
PWR_3VSUS SERIRQ LAD2 LPC_AD2 22,29,42,46,83
22,29,42,46,83 LPC_AD3 3 18 12,23,29,30,34,42,44,45,50,51,64,83 PLT_RST# 27 7
LAD3 SMBCLK LRESET# LAD3 LPC_AD3 22,29,42,46,83
SUSTAT# 26 13 LPC_FRAME# 22,29,42,46,83
LPCPD# LFRAME#
4
GND GND
19 0.5mm 23,26,31,42,83 PCI_CLKRUN# 23
CLKRUN# PWR_3VMAIN
5 20
3V 3VSB PWR_3VMAIN 19
VDDC
22,29,42,46,83 LPC_AD2 6 21 20
LAD2 GPIO BADDR
5
VDD
5 CLK_33_TPM_SB 7 22 TPM_PP 11
LCLK PP VDD
25
TPM_PP VDD
22,29,42,46,83 LPC_FRAME# 8 23 21
LFRAM# NC PWR_3VSUS PACCESS
22 4
PENABLE GND
22,29,42,46,83 LPC_AD1 9 24 10
LAD1 BADD GND
18
GND
1

2.2K 1/16W 5%

10 25 $V03L06 24
3V 3V GND
16
F Changed part TESTIO F
TPM(SB)

11 26 17 1
GND GND TESTEN NC1
9 14
RSVD NC2
R759

22,29,42,46,83 LPC_AD0 12 27 15
2

LAD0 VBAT NC3 GND1


28
NC4
23,26,31,42,83 SERIRQ 13 28 CLK_32K_TPM_SB 47
SERIRQ XTALIN SLD9630TT_1.1
14 29 CA46120-0092
23,42 SUSTAT# LADPC# NC
$V01L10 None SLB9635TT_1.2の直近に配置すること
15 30 GND1
NC NC Added pads
TPM BOARD CN TPM(SB)
CA52233-0026 CLK_32K_TPM_SB TP222
TESTPAD

G
CLK_33_TPM_SB TP223
TESTPAD [TPM] G
TITLE
GILIA Main Board Rev.03
Fujitsu
※CN32の近くに配置すること。スタブは最小とすること。 DRAW.
GND1 C1CP272450-X3 CUST.
NO.
Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION
FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 36 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
R223 0 1/16W No EXTVGA
13 CRT_HSYNC_GMCH 1 2

A 65 CRT_HSYNC_EXT 2 1 A
R226 0 1/16W EXTVGA

R227 0 1/16W No EXTVGA PWR_3VMAIN


13 CRT_VSYNC_GMCH 2 1
M17

1
65 CRT_VSYNC_EXT 2 1
R232
R228 0 1/16W EXTVGA 100K 1/16W 5%
CRT_HSYNC_BFIN 2 3 CRT_Q_HSYNC 56,57
1A 1Y

2
CRT_VSYNC_BFIN 5 6 CRT_Q_VSYNC 56,57 LCDEN_Q 46,80
2A 2Y

3
9 8 PWR_2.5VMAIN
B 46,47,83 BL_EEN_BENN 3A 3Y BLEN_Q 58
Q9
B
13 GM_BL_VOL 12 11 GM_BLVOL_Q 58 1
4A 4Y 2SK3541

2
HVCMOS Output(GMCH) PWR_5VSUS

$V02L01 $V01L08 1 14
1OE# VCC
4
Delete part R802 Changed connection 2OE#

2
10 C428 R233 0 1/16W $V03L05
3OE#
13 13 GM_LCDON 1 2
4OE# 0.1uF 10V RK Changed parts

1
7 No EXTVGA
PWR_5VSUS GND

65 EXTVGA_LCDEN
TC74VHCT125AFT
CA98010-7902

2
10K 1/16W 5%
GND1

2
C R234 C
10K 1/16W 5%
EXTVGA

R231

1
1
PWROK_3VMAIN5# 39
GND1
Q10

3
DTC144EMT2L

12,23,26,28,46 PWROK_3VMAIN 1
2

D D

GND1

PWR_2.5VMAIN
ARRAY

PU_CRTDDCDAT_B1 1 8
PU_CRTDDCDAT_B2 2 7
PU_CRTDDCCLK_B1 3 6
PU_CRTDDCCLK_B2 4 5
E E
RM36
1Kx4 1/16W 5%
CRT_Q_DDCDAT 56,57 CRT_Q_DDCCLK 56,57
8
7
6
5

PWR_5VMAIN
CM1
1000pFx4 25V RK

2
1
2
3
4

3
PU_CRTDDCDAT_B1 1 Q11 D8
2SC5658 PU_CRTDDCCLK_B1 1 Q12 1SS400GT2R
2SC5658
2

1
R235 0 1/16W No EXTVGA

2
1 2 R236 0 1/16W No EXTVGA RM35 PWR_2.5VMAIN
13 CRT_DDCDAT_GMCH SMT8
GND1 1 2 4 5
F 13 CRT_DDCCLK_GMCH 56,57 CRT_Q_DDCCLK F
CRT_DDCDAT_BF 56,57 CRT_Q_DDCDAT 3 6
CRT_DDCCLK_BF CRT_DDCCLK_BF 2 7
65 CRT_DDCDAT_EXT 2 1 CRT_DDCDAT_BF 1 8
65 CRT_DDCCLK_EXT 2 1
R237 0 1/16W EXTVGA 2.2Kx4 1/16W 5%
R238 0 1/16W EXTVGA
3

3
PU_CRTDDCDAT_B2 1 PU_CRTDDCCLK_B2 1

Q13 Q14
2

2
2SC5658 2SC5658

G
#CRT Portに保護ダイオードを実装しないため、
 FETを使用するとESD破壊の危険がある。
 そのため、従来どおりNPN-Trを使用する。
[Buffer/LV Shift] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 37 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
※Codec近くにて接続すること

 可能な限りGNDAUDでガード(上下層を含む)すること。
*
※回路図中の  印はAnalogLineのため、0.25mm以上の幅で配線し、
M18
AWS11
AW Short (R1005)
22 ACZ_RST#_AUD 11 45 2 1
RESET# N.C.
A PWR_AUD 46 A
N.C.
GND1 GNDAUD

2
R239 6
22 ACZ_BITCLK_AUD BIT_CLK
$V02L11 18K 1/16W 5%
22 ACZ_SYNC_AUD 10
Changed part C429 0.1uF 10V RK SYNC R240

1
ALG_BEEP_IN_0 1 2 22 ACZ_SDOUT_AUD 5 8 ACZ_SDIN0_AUD 2 1 ACZ_SDIN0 22
Q15 SDATA_OUT SDATA_IN

10pF 25V AD

10pF 25V AD
2SK3541 33 1/16W 5%

1K 1/16W 5%

0.047uF 10V RK
C430 None

1
R241
46 DG_GSPKOUT 1 48 1 2
SPDIFO

2
C433
43

2
GPIO0 10pF 25V AD

2
44

None 1
GPIO1
47
B SPDIFI/EAPD DG_AMP_SD 39 B

C431
None

C432
2
GPIO2 GND1
GNDAUD 3 37
GNDAUD GPIO3 MONO_OUT

GND1 33 14
DCVOL LINE2_L Jack E ALG_HP_L_DOCK 57
C436 0.1uF 10V RK
51 CDL
* 1
R242
2
10K 1/16W 5%
Analog CD
* 1

C437
2

0.1uF 10V RK
P.R Out 15
LINE2_R Jack E ALG_HP_R_DOCK 57
for PR Audio Out

51 CDGND
* 1
R243
2
10K 1/16W 5%
Analog CD
* 1

C438
2

0.1uF 10V RK
ALG_BEEP_IN 12
PC_BEEP
35
LINEO_L Jack D
* 1 2
C434
* ALG_HPOUTL 59

+
51 CDR
* 1
R244
2
10K 1/16W 5%
* 1 2
Main Out 36
* 1
100uF 6.3V(POSE) B20
2
*
for Mainboard Audio Out

*
LINEO_R Jack D ALG_HPOUTR 59
R245 Analog CD#

R246 Analog CD#

R247 Analog CD#

#ALコンNG(高さ条件)
4.7K 1/16W 5%

4.7K 1/16W 5%

4.7K 1/16W 5%

Analog CD ALG_CD_CDC_L 18 C435

+
C CD_L 100uF 6.3V(POSE) B20 C

*
39
HP_L Jack A
* ALG_OUT_L 39,41
2

ALG_CD_CDC_G 19
CD_GND
for Internal Speaker
TV Tuner
SP Out
* ALG_CD_CDC_R 20
CD_R
41
HP_R Jack A
* ALG_OUT_R 39,41
1

None

None

None

None
22K 1/16W 5%

22K 1/16W 5%

22K 1/16W 5%

22K 1/16W 5%
1K 1/16W 5%

1K 1/16W 5%
2

2
※C439,C440.C1071はM22の近くに配置すること。 $V02L10
C439 0.1uF 10V RK

GNDAUD
40 ALG_MIC_L
* 2 1
* ALG_MIC2_L 16
Jack F MIC2_L MIC1_VRO_L
28 Added parts
Changed connection

R822

R823

R820

R821

R812

R811
C440 0.1uF 10V RK
Int. Mic
* *

1
#未使用モデルは入力固定不要? 40 ALG_MIC_R 1 2 None 2 1 ALG_MIC2_R 17 32
C1071 Jack F MIC2_R MIC1_VRO_R
ALG_REF_O
ALG_MIC2_L 0.1uF 10V RK
D
ALG_MIC2_R
59 ALG_AUD_IN_L 1
C1072
2
1uF 6.3V RK
* 21
Jack B MIC1_L
Main In
MIC2_VRO
30

1 2 ALG_AUD_IN_L
D

59 ALG_AUD_IN_R 1 2
* 22
Jack B MIC1_R LINE1_VRO
29 R744 2.2K 1/16W 5% C1074 0.1uF 10V RK
100pF 25V AJ

100pF 25V AJ

C1073 1uF 6.3V RK 1 2


2

1 2 ALG_AUD_IN_R
57 ALG_MICIN_DOCK

*
1 2
* 23
Jack C LINE1_L LINE2_VRO
31 R745 2.2K 1/16W 5% R819 47K 1/16W 5%
C1170

C1171

$V02L04 C997 1uF 6.3V RK 1 2


1

P.R In
Added parts
$V02L01 C998 1uF 6.3V RK

Added parts C1071,C1072,C1073


1 2
* 24
Jack C LINE1_R
JDREF
40 1
R738
2
20K 1/16W 0.5%
PWR_AUD

※C1170, C1171はM18の直近に配置すること。

5
GNDAUD R816
GNDAUD 1 2 3 -
4 ALG_REF_O
E 59 JD_B_MAIN_IN 2 1 ※0.5mm幅にて配線 13
SENSE_A VREF
27 ALG_VREF 47K 1/16W 5% 1 + E
M74
R428 20K 1/16W 0.5% ※0.5mm幅にて配線 NJM2741F3

0.1uF 10V RK

1uF 10V 1608 FZ


57 JD_E_PR_OUT 2 1 34

2
SENSE_B CA46500-0210

2
C443 None

C444 None
1uF 6.3V RK

1uF 6.3V RK
1 2 R737 39.2K 1/16W 1%
57 JD_C_PR_IN
1

C441

C442
R429 10K 1/16W 0.5% GNDAUD
$V02L10

1
$V01L3 Added parts
2

59 JD_D_MAIN_OUT 2 1
Changed part 1mm
R736 5.1K 1/16W 1%
GNDAUD
3.3V 200mA
PWR_3VMAIN
5.0V 200mA PWR_AUD GNDAUD
25
AVDD DVDD
1 PWR_3VMAIN_CDC 1 2
38 9
F AVDD DVDD FL12 F

C450 None
1uF 6.3V RK
BLM18PG181SN1

0.1uF 10V RK

0.1uF 10V RK
4.7uF 6.3V 1608 RK

2
0.1uF 10V RK

0.1uF 10V RK
None
2

1
C448

C449
※Codec近くにて接続すること
26 4
1

AVSS DVSS
C451

C445

C447

42 7
AWS12 AVSS DVSS
AW Short (R1005) ALC262
2 1 CA46120-1164 GND1 GND1 GND1
58 ALG_MIC_GND
GNDAUD

G
GNDAUD GNDAUD
[Audio CODEC] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 38 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
$V02L01 C454
Deleted parts M19 and others 330pF 50V RK
2 1

A R251 A
39K 1/16W 5%
2 1

C455
330pF 50V RK
2 1

R253
$V01L15 39K 1/16W 5%
2 1
Changed
parts R254 C459 M20A
10K 1/16W 5% 0.022uF 16V RK

B
38,41 ALG_OUT_L
* 2 1
* 1 2
* 7
IN A - OUT A +
4
* ALG_SPKOUTL+ 59
B
38,41 ALG_OUT_R

*
1

R257
10K 1/16W 5%
2
* 1

C460
2

0.022uF 16V RK
* 22
IN B - OUT A -
6
* ALG_SPKOUTL- 59

PWR_AUD ALG_SPAMP_REF 9
IN A +
OUT B +
25
* ALG_SPKOUTR+ 59

12K 1/16W 0.5%


#部品種削減のため高精度品使用 OUT B -
23
* ALG_SPKOUTR- 59

1
20
IN B +
$V02L08 PWR_5VMAIN
Reserve -> Mount

R259
<FILTER>
5 2 1

2
VDD
2 1 ALG_BYPASS 21 24
BYPASS VDD FL59

C465 1uF 10V 1608 FZ


C C

C468 10uF 6.3V 2012 RM


C462 BLM18PG181SN1

C464 0.01uF 25V RK

C467 1uF 10V 1608 FZ


20K 1/16W 0.5%

0.22uF 10V RK

C466 0.01uF 25V RK


0.1uF 10V RK

2
GNDAUD

1
C463
1 3
SHUTDOWN GND

R261
8

1
PWR_5VMAIN GND
10

2
GND
26
GND
27
GND

2
1K 1/16W 5%
GNDAUD GND
29

R263
$V01L15 GNDAUD

1
DG_LIMIT 28 2 GNDAUD GNDAUD
Changed parts AMP_SHTDWN
N.C./VLIMIT N.C.
D D
LM4817MH

0.1uF 10V RK
1

1
240 1/16W 1%
CA46120-1055

None

C471
0.1uF 10V RK
1
GNDAUD

2
R264
2

2
C472
$V02L03
$V02L11 Changed connection
GNDAUD
GNDAUD Changed parts $V02L04
$V02L08 Changed connection
Changed part
E PWR_AUD E
37 PWROK_3VMAIN5#

#評価用
D10
PWR_5VMAIN 1SS400G PWR_MIC M21

5
1 2 TC7SZ32AFE
2 1 1 AWS84
38 DG_AMP_SD
4 1 2 AMP_SHTDWN
D78 RB521S-30 2
M20B

100K 1/16W 5%
R1005-0.09

None
3
2

0.1uF 10V RK
17 19 46 DG_HPON 2 1 $V02L03
VIN VOUT
R270 1

1
R268
100K 1/16W 5%

220K 1/16W 0.5%

0 1/16W
15
VOUT Addded pad
2

R269

None
D79 RB521S-30
C476 1uF 10V 1608 FZ
None

2
0.1uF 10V RK

C474
13

1
F SHDN# F
1
R271

14 DG_F C475 2 1
2

FAULT# 51 BAY_HPSENSE
4.7uF 10V 2012 FZ
1
2

D80 RB521S-30
2

11 ALG_LDO_HIZ TV-HP GND1


ADJ GND1
1

GNDAUD
C477

100K 1/16W 0.5%

16
N.C.
$V02L03
Changed connection
R272

GNDAUD
$V03L01
$V02L04
1

Deleted parts D9,D11


ALG_L_BIAS 12
BIAS GND
18 Added parts D78,D79,D80 Changed connection
2

C478

G
0.033uF 16V RK LM4817MH
CA46120-1055 [Audio AMP] G
1

GNDAUD TITLE
GILIA Main Board Rev.03
Fujitsu
GNDAUD
DRAW. CUST.
NO. C1CP272450-X3
Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION
FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 39 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
$V02L04 $V02L08
Mount -> Reserve
Added parts, Changed connection
C1173 47pF 25V AJ
A 1 2 A
None INT-MIC
PWR_MIC

1
C479 180pF 25V BJ
R273 1 2 $V02L08
0 1/16W INT-MIC
INT-MIC Changed parts
&V03L05

2
1 2
Changed parts

2
C480 R274 INT-MIC

1
1uF 10V 1608 FZ 82K 1/16W 0.5%
R275 INT-MIC

1
2.2K 1/16W 5% PWR_AUD
INT-MIC
B GNDAUD
B

2
M22A

8
58 ALG_INT_MIC_L 1

C1172
0 1/16W
*
2 1

R276 INT-MIC
2

15K 1/16W 0.5%


* 2 1

C481 INT-MIC
0.1uF 10V RK
* 2

3 +
-
1
* ALG_MIC_L 38

$V02L08 INT-MIC LMV358MM/NOPB

4
VR_MICAMP INT-MIC

1
Changed part

2
PWR_AUD C482
$V03L05 R932 INT-MIC 0.1uF 10V RK

2
Changed part 12K 1/16W 0.5% INT-MIC
1

None
C R277 C

1
10K 1/16W 5%
INT-MIC
$V02L08

*
2

VR_MICAMP GNDAUD GNDAUD


Mount -> Reserve
2

R278
C483
10K 1/16W 5% 0.1uF 10V RK
1

INT-MIC None
1

$V02L08
Mount -> Reserve
D D
GNDAUD 1 2

C1175 None
PWR_MIC 47pF 25V AJ
2

C484 47pF 25V AJ


R279 1 2
0 1/16W None
None
1

1 2
1

C485 R280 0 1/16W


1

E 1uF 10V 1608 FZ INT-MIC E


R281 None $V02L08
2

2.2K 1/16W 5% PWR_AUD


None
Changed part
GNDAUD
2

M22B

8
58 ALG_INT_MIC_R
* 1

C1174
2

0.1uF 10V RK
2

R282
1

12K 1/16W 0.5%


* 1

C486
2

0.22uF 10V RK
* 6

5 +
-
7
* ALG_MIC_R 38

None None None LMV358MM/NOPB


4

INT-MIC
VR_MICAMP
F F
2

R933 GNDAUD
12K 1/16W 0.5%
$V02L08 None
1

Mount -> Reserve

GNDAUD

G [Audio Int-Mic] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 40 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
$V01L06
Added Pad
PWR_AUD
PWR_MIC PWR_AUD
A $V01L11 A
M23A Changed connection 1 2
LMV358MM/NOPB

8
TV-HP AWS76 AW Short (R1608)
C487 2 -
0.1uF 10V RK 1 BAY_HP_L 51
38,39 ALG_OUT_L ALG_OUT_L 1 2 3 +
PWR_3VSTD
M24

1
C488

4
TV-HP 0.1uF 10V RK
PWR_AUD TV-HP 2 8

2
VIN VOUT

1
1K 1/16W 5%

R283

4.7uF 10V 2012 FZ


2

C490 10uF 6.3V 2012 RM


TV-HP 56K 1/16W 5% 6 9 DG_CP1
45,46,73,74,76,80,83,89 DLY_SUSB# LDO_EN CP+

None
TV-HP

2
4.7uF 10V 2012 FZ
7
B B

2
CP_EN
R284

1
None
GNDAUD
1

1
1

C489
10 DG_CP2
CP-

2
2
C491

None
1K 1/16W 5%

1 3
GNDCP CR
1

TV-HP R286 None

1uF 10V 1608 FZ


1

C492 0 1/16W

0.1uF 10V RK
4 5
GND C_BYP

None
0.1uF 10V RK ALG_OUT_L 1 2
R285

C493 None
TV-HP
2

1
CM3702 GNDAUD
2

None

C494
GND1 GNDAUD

2
C GNDAUD GNDAUD GNDAUD C

$V01L06
Mount -> Reserve
PWR_AUD

M23B
8

LMV358MM/NOPB
C495 6 - TV-HP
0.1uF 10V RK 7 BAY_HP_R 51
ALG_OUT_R 2 1 5 +
38,39 ALG_OUT_R
D TV-HP D
4

PWR_AUD
1
1K 1/16W 5%

R287
1

TV-HP 56K 1/16W 5%


TV-HP GNDAUD ALG_HP_R/L_DOCK(0.25mm) CDL/R(0.09mm) CDGND
BAY_HP/R(0.25mm) (0.09mm)
2
R288

2
1K 1/16W 5%

TV-HP
2

R290 None
2

E C502 0 1/16W E
0.1uF 10V RK ALG_OUT_R 2 1
R289

TV-HP
1
1

GNDAUD

$V03L04
Reserve -> Mount

F F
C496 1000pF 25V RK C497 1000pF 25V RK GND_AUD(0.09mm)
1 2 2 1

C498 1000pF 25V RK C499 1000pF 25V RK


$V02L08
1 2 2 1 Changed drawing.
C501 1000pF 25V RK
$V01L10 1 2
Deleted part C500 C503 1000pF 25V RK C504 1000pF 25V RK
1 2 2 1

G GND1 GNDAUD GNDAUD GND1 [Audio etc] G


TITLE
GILIA Main Board Rev.03
Fujitsu ※上記のコンデンサは、GND1とGNDAUDの分割をまたぐように配置すること。 DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 41 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
Based on GROSSO

M25
A 5 CLK_14_SIO 9 A
CLOCKI
PWR_5VMAIN 14.318MHz
5 CLK_33_SIO 20 10
PCI_CLK LAD0 LPC_AD0 22,29,36,46,83

2
12
D13 PR LAD1 LPC_AD1 22,29,36,46,83
13
RB521S-30**TE61 RM37 LAD2 LPC_AD2 22,29,36,46,83
14
LAD3 LPC_AD3 22,29,36,46,83
ARRAY
15 16

1
22,29,36,46,83 LPC_FRAME# LFRAME# LDRQ# LPC_DRQ#0 22
8 1 PSTB# 57 12,23,29,30,34,36,44,45,50,51,64,83 PLT_RST# 17 19
PCI_RESET# CLKRUN# PCI_CLKRUN# 23,26,31,36,83
7 2 PSLIN# 57 23,36 SUSTAT# 18 21
LPCPD# SER_IRQ SERIRQ 23,26,31,36,83
6 3 PAFD# 57 6
IO_PME#

0.1uF 10V RK
5 4
PINIT# 57

None
LPC

C505
4.7Kx4 1/16W 5%
PR RXD 62 63 TXD
B B

2
RXD1 TXD1
DSR# 64 1 RTS#
RM38 DSR1# RTS1#
CTS 2 3 DTR#
PRD[0:7] 57 CTS1# DTR1#
9 8 PRD7 RI1# 4
GND1 RI1#
10 7 PRD6 DCD 5
DCD1#
11 6 PRD5
12 5 PRD4 SERIAL PORT
13 4 PRD3
14 3 PRD2 52 IR_RXA# 37 38
IRRX2 IRTX2 IR_TX 52
15 2 PRD1 39
IRMODE/IRRX3 IR_MODE 52
16 1 PRD0
INFRARED
4.7Kx8 1/16W 5%
PR 55 41
57 PSLCT SLCT INIT# PINIT# 57
57 PPE 56 42
PE SLCTIN# PSLIN# 57
57 PBUSY 57 60
BUSY AUTOFD# PAFD# 57
57 PACK# 58 61
C RM39 ACK# STROBE# PSTB# 57 C
57 PPERR# 59
ERROR# PRD[0:7] 57
5 4 44 PRD0
PPERR# 57 PD0
6 3 46 PRD1
PPE 57 PD1
7 2 47 PRD2
PBUSY 57 PD2
8 1 48 PRD3
PACK# 57 PD3
49 PRD4
PD4
50 PRD5
ARRAY PD5
51 PRD6
4.7Kx4 1/16W 5% PR PD6
53 PRD7
PD7
2 1 PSLCT 57 PARALLEL PORT
R291 PR 23 (LPT_EXIST#)
4.7K 1/16W 5% GPIO40 (COM_EXIST#) GND1
24
PWR_3VMAIN GPIO41 (IR_LEGACY#)
25

PR
GPIO42

PR

PR
SYSOPT 1 2 27 IR_EXSIST PWR_3VMAIN
GPIO43
D 11
VCC1 GPIO44
28 (FDC_EXIST) D
R292 PR 26 29
VCC2 GPIO45

1
4.7K 1/16W 5% GND1

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
45 30
VCC3 GPIO46 GND1 R293
54 31
VCC4 GPIO47
32
GPIO10

1
7 10K 1/16W 5%
VTR PR
M26 33 SYSOPT

2
GPIO11/SYSOPT
34

2
GPIO12/IO_SMI#
[RS-232] 8 35
VSS1 GPIO13/IRQIN1

C506

C507

C508
22 36
VSS2 GPIO14/IRQIN2
43
VSS3

1
52 40
VSS4 GPIO23 R294
23,44,46,68,80 SUSB# 22
FORCEOFF#
23
FORCEON POWER/GND, GPIO
10K 1/16W 5%
GND1

2
E RTS# 14 9 LPC47N217-JV E
DIN1 DOUT1 RTSA 57
DTR# 13 10 PR None
DIN2 DOUT2 DTRA 57
TXD 12 11
DIN3 DOUT3 SOUTA# 57
GND1
57 CTSA 4
RIN1 ROUT1
19 CTS Base I/O Address
57 RIA 5 18 RI1#
RIN2 ROUT2
57 SINA# 6
RIN3 ROUT3
17 RXD GPIO11 Address
57 DCDA 7 16 DCD
RIN4 ROUT4
57 DSRA 8
RIN5 ROUT5
15 DSR# 0 02E
1 04E
28
C1+
24
CM2 C1-
8 1
7 2 21
INVALID# PWR_3VSUS
6 3 20
F 5 4
ROUT2B F
26
0.1uFx4 16V 2012 BM VCC
1
C2+
1000pF 25V RK
PR

PR 2
C2-
0.1uF 10V RK
1

1
C510

27
V+
2

2
C509

GND1
3 25 None
V- GND

GND1
MAX3243CPW

[Super I/O]
47 SERB_RI
PR
G CA46740-5350 G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 42 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6

PWR_2.5VLAN
7 8 9
Nile
PWR_3VMAIN PWR_3VLAN PWR_3VMAIN PWR_3VLAN FL13 PWR_2.5VLAN Based on GROSSO

4.7uF 6.3V 1608 RK


4.7uF 6.3V 1608 RK 2 1
BLM11B601S
C511

0.1uF 10V RK

0.1uF 10V RK
1

2
0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
1 2

1
C512

C513

C514

C515
A 0.1uF 10V RK A

M12

G11
D11

K12

A14
2

1
G1

G2
F04pin近く
に配置すること。

C5
A7
B3

E1
E4

K3

P2

P1

A1
GND1

L4
1

2
C516

C517

C518

C519

C520

C521

C522
PWR_1.2VLAN PWR_2.5VLAN
PWR_3VMAIN

VESD1
VESD2
VESD3

WOL_VAUX

VDDIO
VDDIO
VDDIO

BIASVDD
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
K8
VDDC VDDP
A8 #改造用に10Kを実装(元は4.7K)
GND1 GND1 K7 D5 GND1 GND1
VDDC VDDP

2
GND1 GND1 K6 P13 PWR_2.5VLAN
VDDC VDDP FL14 R295
K5
VDDC
K4 H14 2 1
VDDC XTALVDD C523 10K 1/16W 5%
J10
PWR_1.2VLAN VDDC BLM11B601S None
J5 2 1

1
VDDC
J4
VDDC 0.1uF 10V RK
G4 REFCLK_SEL
VDDC
4.7uF 4V 1608

F10 GND1 FL15


VDDC
2

4.7K 1/16W 5%
0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
F5 A13 1 2
VDDC M27A AVDD
1

1
E10 C530
VDDC BLM11B601S
E9 2 1
B B
1

VDDC
C524

R296
E8
BCM5751M-Rev.C
2

2
VDDC
C525

C526

C527

C528

C529
E7 0.1uF 10V RK

1
VDDC GND1
E6 $V01L15
VDDC
E5 15mm x 15mm F14
GND1 PWR_1.2V_AVDDL VDDC AVDD C531 Changed part
B8
GND1 VDDC GND1
BGA196 1 2 Added wire
F13
C532 AVDDL 0.1uF 10V RK
F12 $V02L01
AVDDL GND1
1 2
E14 Mount -> Reserve
PWR_1.2VLAN PWR_1.2V_AVDDL 0.1uF 10V RK TRD3-
E13
FL16 C533 GND1 TRD3+
2 1 2 1 PWR_1.2V_GPLL D14
BLM11B601S C534 TRD2- PWR_3VMAIN
D13
4.7uF 4V 1608 TRD2+
1 2 G14 $V02L07
GND1 GPHY_PLLVDD
C14
C PWR_1.2V_GPLL 0.1uF 10V RK TRD1-
C13 Changed connection PWR_3VLAN C
FL17 C535 GND1 TRD1+
1 2 2 1 B14 RM40
BLM11B601S TRD0- 4.7Kx4 1/16W 5%
B13
4.7uF 4V 1608 PWR_1.2V_PPLL TRD0+
AUX_PRES 1 8
GND1 C536 TRST# 2 7
PWR_1.2V_PPLL 2 1 M8 D8 PCIE_TST PCIE_TST 3 6
FL18 C537 PCIE_PLLVDD PCIE_TST
ATTN_BTTN# 4 5
2 1 1 2 0.1uF 10V RK SMT8
BLM11B601S GND1 A11
4.7uF 4V 1608 LINKLED#
B11 $V01L03
GND1 SPD100LED# GND1
A12
PWR_1.2V_PSDS PWR_1.2V_PSDS SPD1000LED#
B10 Changed connection
FL19 C538 C539 TRAFFICLED# PWR_3VLAN
2 1 1 2 2 1 M6 RM41
BLM11B601S PCIE_SDS_VDD 1Kx4 1/16W 5%
C10
WL_LINK2.4G
D 4.7uF 4V 1608 0.1uF 10V RK
WL_LINK5G
B9 EE_WP 1 8 D
GND1 GND1 A9 EE_CLK 2 7
WL_ACTIVITY
EE_DATA 3 6
H2 4 5 LAN_EXPORT#
PWR_IND# SMT8
J2
C540 0.1uF 10V RK ATTN_IND#
A2 ATTN_BTTN#
ATTN_BTTN# GND1
1 2
23,63 PCIE_RXP1 C541 0.1uF 10V RK N6
PCIE_TXDP
1 2 P6 E11
23,63 PCIE_RXN1 PCIE_TXDN SCLK
23,63 PCIE_TXP1 P10 E12
PCIE_RXDP SI PWR_3VLAN
23,63 PCIE_TXN1 N10 F11
PCIE_RXDN SO M28
A6 C12
23,26,35,46 PCIE_WAKE# WAKE# CS#
C2
PERST#
6,63 CLK_100_PELAN+ N8 G12 8
REFCLK+ GPIO0_TST_CLKOUT Vcc
6,63 CLK_100_PELAN- P8
R297 REFCLK- EE_WP

0.1uF 10V RK
REFCLK_SEL F4 H13 7
REFCLK_SEL GPIO1 WP

2
C542
E 1 2 G13 E
PWR_3VLAN RM42 GPIO2
1
LAN_LPC_FRAME# 100 1/16W 5%None A0
1 16 L10 EE_DATA

1
LAN_LPC_AD3 LAN_LPC_AD3 EEDATA
2 15 L5 K11 EE_CLK 2
LAN_LPC_AD2 LAN_LPC_AD2 LAD3 EECLK PWR_3VLAN A1
3 14 K9
LAN_LPC_AD1 LAN_LPC_AD1 LAD2
4 13 L11 3
LAN_LPC_AD0 LAN_LPC_AD0 LAD1 A2
5 12 $V01L03 M11 6
LAN_LPC_CLK LAN_LPC_FRAME# H11 LAD0 PWR_2.5VLAN SCL
6 11 L14
LAN_LPC_RST# Deleted part R298 LAN_LPC_RST# LFRAME# REGSUP25
7 10 M9 5 4
LAN_LPC_SERIRQ LAN_LPC_CLK LRESET# PWR_3VLAN SDA Vss
8 9 Changed connection K10 M14
LAN_LPC_SERIRQ L8 LCLK REGOUT25 C543
47Kx8 1/16W 5% SERIRQ M24C64-WDW6TP
2 1
LAN_EXPORT# L9 CA46205-2061
EXPORT#

3
N13 10uF 6.3V 2012 RM GND1
BSAFE_GPIO1 GND1 STMicro 64Kbit
J11 K14
BSAFE_GPIO0 REGSUP12 Q16
J13 1
REGCTL12 2SA1900QT100
J14
F D10
REGSEN12 F
SMB_CLK PWR_1.2VLAN
D9 L6

2
SMB_DATA LOW_PWR C544
J12 AUX_PRES
R299 1K 1/16W 5% VAUXPRSNT
P14 1 2
WOL_INRSH
1 2 N12 M13
None XTALO VAUX_ON# 10uF 6.3V 2012 RM
P12 N14 $V03L01
XTALI VMAIN_ON#
1 2 D12 TRST# GND1 Deleted part C546
TRST#
A10 D7
R792 0 1/16W RDAC TCK
H12
$V01L07 TDI
1

None D6 R300
TDO
Mount -> Reserve All parts on this page R301 C11 1 2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

TMS
1.2K 1/16W 0.5% 4.7K 1/16W 5%
GND1

[LAN-1]
2

B4
B7
B12
E2
F6
F7
F8
F9
G5
G6
G7
G8
G9
G10
H5
H6
H7
H8
H9
H10
J6
J7
J8
J9
K2
N1
N9
P9

G
$V01L08 G
Deleted parts X6,C545,C547
GND1 TITLE
Added part R792 GILIA Main Board Rev.03
Fujitsu $V02L03
Changed connection
GND1
DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 43 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
PWR_3VSTD #Marvell使用時1.8V
※枠内の部品はLAN ICの直近に配置すること PWR_2.5VLAN L7

1K 1/16W 5%
1

R938 None
PWR_3VSTD $V01L10 8 9
63 TRD0- TD- TX- CN_TRD0- 57
Changed connection
A 63 TRD0+ 7 10 CN_TRD0+ 57 A
TD+ TX+

5
6 11
R303 49.9 1/16W 0.5% TDCT TXCT
46 LAN_RST# 1
4 MRVL_RST# 63 1 2

0.1uF 10V RK
12,23,29,30,34,36,42,45,50,51,64,83 PLT_RST# 2
R305 49.9 1/16W 0.5%

2
M75 $V03L01 1 2

C548
NL17SZ08XV5 3 14
None Added parts RDCT RXCT

1
63 TRD1- 2 15 CN_TRD1- 57
GND1 RD- RX-
$V03L04
63 TRD1+ 1 16 CN_TRD1+ 57
Mount -> Reserve R938,M75 GND1 RD+ RX+

R310 49.9 1/16W 0.5%

R311 49.9 1/16W 0.5%

C549 100pF 25V AJ

C550 0.1uF 10V RK


1 2 Reserve -> Mount R302

2
75 1/16W 1%

75 1/16W 1%
R302 0 1/16W NS0068LF $V01L5
B B

R308
Changed parts

R307
1 2 $V01L10
None
Changed connection

1
R304 0 1/16W

2
0.1uF 10V RK

1
2

1
$V03L01 C552 C553

C551
0.01uF 250V 2012 RK
Deleted part R306 0.01uF 250V 2012 RK

2
GND1
Moved R931, R309 to P63 GND1 $V01L13
Q17 GND1 Changed parts
PWR_3VLAN #Marvell使用時1.8V
PWR_3VSTD SSM6J51TU
C 1 ※枠内の部品はLAN ICの直近に配置すること PWR_2.5VLAN L8 C
4 2
Max 600mA

2
0.22uF 10V 1608 RK

S D 5 C554
470K 1/16W 5%

6 63 TRD2- 8 9 CN_TRD2- 57
TD- TX-
1

10uF 6.3V 2012 RM

1
3 63 TRD2+ 7 10 CN_TRD2+ 57
TD+ TX+
1

G
$V01L10
R312

C555

220 1/16W 5% 1608


Changed connection 6 11
TDCT TXCT
1

R314 49.9 1/16W 0.5%


2

GND1

0.1uF 10V RK
1 2
R313

2
None
47K 1/16W 5%

R315 49.9 1/16W 0.5%


2

C556
1 2
2

3 14

1
RDCT RXCT
3
R316

63 TRD3- 2 15 CN_TRD3- 57
RD- RX-
D Q18 D
1

1 2SK3541 GND1 1 16
63 TRD3+ RD+ RX+ CN_TRD3+ 57
None
2
3

R320 49.9 1/16W 0.5%


R319 49.9 1/16W 0.5%

C557 100pF 25V AJ


D70

C558 0.1uF 10V RK

2
75 1/16W 1%

75 1/16W 1%
1SS400G Q19
2 1 1 2SK3541 NS0068LF
46 LAN_PON

R318
$V01L5
2

R317
100K 1/16W 5%

Changed parts
2

D76

1
1SS400G GND1

2
23,46,73,74,80,83 SUSC# 2 1

1
1

1
R800

C559
C560 C561

0.1uF 10V RK
1

D77 None $V01L10 $V01L13 0.01uF 250V 2012 RK


1SS400G 0.01uF 250V 2012 RK
Changed connection

2
2 1 GND1 Changed parts
23,42,46,68,80 SUSB#
E E
GND1 GND1

GND1
$V01L13
Changed parts
$V02L01 PWR_3VMAIN
R321
Deleted part D14 1 2
CN7
Added parts D76,D77 4.7K 1/16W 5%
M27B None
57 CN_TRD0+ 1
TX+
H1 A3 57 CN_TRD0- 2
NC NC TX-
L3 A4
NC NC
L2 A5 57 CN_TRD1+ 3
NC NC RX+
L1 B1
NC NC
K1 B2 57 CN_TRD2+ 4
F J3
NC NC
B5
TIP F
NC NC
J1 B6 57 CN_TRD2- 5
NC NC RING
H4 C1
NC NC
H3 C3 57 CN_TRD1- 6
NC NC RX-
M1 C4
NC NC
M2
NC NC
C6 ※FGへと接続すること。 57 CN_TRD3+ 7
RJ45-7
M3
NC NC
C7  (VIAでの内層GNDへの接続は行わない)
M4 C8 57 CN_TRD3- 8
NC NC C562 RJ45-8
M5 C9
NC NC
M7 D1 1 2 9
NC NC LANFG
N2 D2
NC NC 820pF 250V 2012 AJ
N3 D3 10
NC NC LANFG
N4 D4
NC NC
N5 E3
NC NC GND1 RJ45 CN WSHILD
N7 F1

G
P3
P4
P5
P7
NC
NC
NC
NC
NC
NC
NC
NC
F2
F3
G3
CA52248-5511
[LAN-2] G
TITLE
NC GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential BCM5751M-Rev.C None REV. DATE DESIGN CHECK APPR. DESCRIPTION
FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 44 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
Based on ECRU-050808
$V02L04
2mm
MAX(Peak) 1A Changed connection 1mm
※CN8の各電源PINの近くに配置すること。
A $V02L01 PWR_3VMAIN_MC0 A
PWR_3VMAIN_MC0 PWR_3VMINIC_AUX0_CN
Changed connection CN8 2mm
1 2
PWR_1.5VMAIN_MC0 MAX(Peak) 500mA
1.2mm
3.3V/0.3A
46,47 WAKE_MINIC#0 WAKE# 3.3V

None
1uF 10V 1608 RK
PWR_3VMINIC_AUX0

4.7uF 6.3V 1608 RK

4.7uF 6.3V 1608 RK


3 4
52 BT_CH_DATA Reserved** VSS PWR_3VMINIC_AUX0_CN 0.3A

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
52 BT_CH_CLOCK 5 6
Reserved** 1.5V PWR_3VSTD
5 PLL_CLKREQ#_MINIC0 7 8
CLKREQ# UIM_PWR

2
9
VSS UIM_DATA
10 1mm

C563
6 CLK_100_MINICARD0- 11
REFCLK- UIM_CLK
12 MAX(Peak) 330mA

C568
C1180
6 CLK_100_MINICARD0+ 13 14 2 3

1
REFCLK+ UIM_RESET

C564

C565

C566

C567

C569

C570
0.01uF 50V 1608 RK
15 16
VSS UIM_VPP

470K 1/16W 5%
2
Mechanical Key Q20

1
2
17 18 SI2305DS-T1-E3 $V03L02
Reserved*** VSS
19 20 RFON_MINIC0 $V02L04
21
Reserved*** W_DISABLE#
22 $V03L04 GND1 Added part C1180 GND1
B PLT_RST# 12,23,29,30,34,36,42,44,50,51,64,83 B

1
VSS PERST# Added parts

R323

C571
23 24

1
23 PCIE_RXN3
25
PERn0 3.3Vaux
26 Changed part C563 #C512で3VMAIN補強可能
23 PCIE_RXP3 PERp0 VSS
27 28
VSS 1.5V PWR_1.5VMAIN_MC0 PWR_3VMAIN PWR_3VMAIN_MC0
29 30 SMB_CLK_THRM_SPWG 28,49,58
VSS SMB_CLK
23 PCIE_TXN3 31 32 SMB_DATA_THRM_SPWG 28,49,58
PETn0 SMB_DATA

2
23 PCIE_TXP3 33 34 1 2
PETp0 VSS R324 FL70 BLM18PG181SN1
35 36
VSS USB_D-

None
1uF 10V 1608 RK
37 38
Reserved* USB_D+ 47K 1/16W 5%

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
39 40
Reserved* VSS PWR_1.5VMAIN PWR_1.5VMAIN_MC0
41 42

6 1
Reserved* LED_WWAN#

2
43 44
Reserved* LED_WLAN#
45 46 1 2
Reserved* LED_WPAN#

C572
47 48 Q21A FL71 BLM18PG181SN1

1
Reserved* 1.5V

C573

C574

C575

C576

C577
49 50 3VMINIC_AUX_ON0 2 EM6K1
Reserved* VSS
51 52

1
Reserved* 3.3V PWR_3VMINIC_AUX0 PWR_3VMINIC_AUX0_CN
C $V02L04 C
*: 2nd PCI Express 1 2
**: Wireless Control GND1 GND1
Changed connection FL72 BLM18PG181SN1
***: UIM Interface
PCI Express Mini Card CN
GND1 CA98010-7871 GND1

MAX(Peak) 1A
$V01L08 2mm 1mm
Changed connection
PWR_3VMAIN
MAX(Peak) 500mA
3.3V/0.3A
CN9 2mm PWR_3VMINIC_AUX1
PWR_1.5VMAIN MAX(Peak) 330mA 1.2mm
46,47 WAKE_MINIC#1
1
WAKE# 3.3V
2 1mm 0.3A
3 4 PWR_3VMINIC_AUX1
Reserved** VSS
D 5
Reserved** 1.5V
6 PWR_XIMVCC PWR_3VSTD D
7
9
CLKREQ# UIM_PWR
8
10
※CN9の各電源PINの近くに配置すること。
VSS UIM_DATA XIM_DATA 52
6 CLK_100_MINICARD1- 11 12 XIM_CLK 52
REFCLK- UIM_CLK PWR_3VMAIN PWR_3VMINIC_AUX1
6 CLK_100_MINICARD1+ 13 14 XIM_RST# 52 2 3
REFCLK+ UIM_RESET

R330 MINIC_2nd

C586 MINIC_2nd

0.01uF 50V 1608 RK


15 16
VSS UIM_VPP

470K 1/16W 5%
2
Mechanical Key #16pin, 17pin, 19pinはどうする? Q22

1
2

None

None
1uF 10V 1608 RK

1uF 10V 1608 RK


C579 MINIC_2nd

C580 MINIC_2nd

C581 MINIC_2nd

C582 MINIC_2nd

C584 MINIC_2nd

C585 MINIC_2nd
17 18 SI2305DS-T1-E3
Reserved*** VSS MINIC_2nd

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
19 20 RFON_MINIC1
Reserved*** W_DISABLE#
21 22 PLT_RST# 12,23,29,30,34,36,42,44,50,51,64,83

1
VSS PERST#

2
23 PCIE_RXN4_MINIC1 23 24

1
PERn0 3.3Vaux

C578
23 PCIE_RXP4_MINIC1 25 26
PERp0 VSS

C583
27 28

1
VSS 1.5V
29 30 SMB_CLK_THRM_SPWG 28,49,58
VSS SMB_CLK
23 PCIE_TXN4_MINIC1 31 32 SMB_DATA_THRM_SPWG 28,49,58
PETn0 SMB_DATA

2
E 23 PCIE_TXP4_MINIC1 33 34 E
PETp0 VSS R331
35 36 USB_P6-_MINIC 51
VSS USB_D-
37 38 USB_P6+_MINIC 51 $V02L01
Reserved* USB_D+ 47K 1/16W 5% GND1 GND1
39 40
41
Reserved* VSS
42 Changed connection MINIC_2nd

3 1
Reserved* LED_WWAN#
43 44
Reserved* LED_WLAN#
45 46
Reserved* LED_WPAN# Q21B PWR_1.5VMAIN
47 48
Reserved* 1.5V TP205 EM6K1
49 50 3VMINIC_AUX_ON1 5
Reserved* VSS TESTPAD
51 52

4
Reserved* 3.3V TP204

None
1uF 10V 1608 RK

C588 MINIC_2nd

C589 MINIC_2nd

C590 MINIC_2nd

C591 MINIC_2nd

C592 MINIC_2nd
TESTPAD
*: 2nd PCI Express ※TPのスタブは最小とすること。

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
**: Wireless Control GND1

2
***: UIM Interface
PCI Express Mini Card CN GND1 $V02L08

C587
GND1 MINIC_2nd $V02L08

1
F CA98010-7871 PWR_3VSTD Changed part PWR_3VSTD F
Changed part
M29 M30 MINIC_2nd
41,46,73,74,76,80,83,89 DLY_SUSB# 41,46,73,74,76,80,83,89 DLY_SUSB#
5

TC7SZ32AFE TC7SZ32AFE
1 1 GND1
4 3VMINIC_AUX_ON0 4 3VMINIC_AUX_ON1
2 2
PIN# Signal Pull-resistor 46,47 MINIC_ON0 46,47 MINIC_ON1
PWR_3VSTD PWR_3VSTD
3 BT_DATA PD <100K
3

5 BT_CHCLK PD <100K
5

GND1 GND1
7 CLKREQ# PD <100K 1 1

G 20
44
W_DISABLE#
LED_WLAN#
PU <110K
PU <100K
26,46,47,61 RF_SW
M31
2
4 RFON_MINIC0
26,46,47,61 RF_SW
M32 MINIC_2nd
2
4 RFON_MINIC1
[MiniCard] G
TITLE
3

GILIA Main Board Rev.03


Fujitsu
NL17SZ08XV5 NL17SZ08XV5
DRAW. CUST.
NO. C1CP272450-X3
Proprietary& Confidential GND1 GND1 REV. DATE DESIGN CHECK APPR. DESCRIPTION
FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 45 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile

A A
$V02L01
Deleted pad TP35
R333 None
M33A
71 PWRGD 2 1 VGATE 23,26
55 1K 1/16W 5%
5,29 CLK_33_ASIC PCICLK(D) M33B
5 CLK_14_ASIC 87 96
CLK14M(D) CLK32OD
47 CLK_32K_ASIC 21 127
CLK32IN CLK32XO

1K 1/16W 5%
11
DLYSUSC#
22,29,36,42,83 LPC_AD0 50 119 BAY_ID0 47,51 26,82,83 PMU_PLLB 40 63
LAD0 GID0(D) PLLB(ESMIBE9) STDOK POWERON + 50ms RSMRST# 23,26
22,29,36,42,83 LPC_AD1 51 120 BAY_ID1 47,51 15
LAD1 GID1(D) 82,84,85,86 PMU_ACON ACON(ESMIBE5)

R334
22,29,36,42,83 LPC_AD2 52 121 BAY_ID2 47,51 38
LAD2 GID2(D) PWRON POWERON 74
22,29,36,42,83 LPC_AD3 53 122 BAY_ID3 47

2
LAD3 GID3(D)
48 123 32 68
B 22,29,36,42,83 LPC_FRAME# LFRAME# GID4(D)
124
DOCK_ID 47,57 47 SUSSW#_ASIC SUSSW# BSRBTN# BSRBTN# 23,26 B
GID5(D) SYS_ID0 47
BAYLMP1#/LONGDLY GID6(D)
125 SYS_ID1 33,47 DLYSUSB#
47
DLY_SUSB# 41,45,73,74,76,80,83,89
Hi:Longmode 126 37 BENN_3VMAIN + 20ms
GID7(D) SYS_ID2 47,51 31,34 PWROK_3VSUS BENN_3VSUS + 50ms 36 SUSOK(I/O)(D)
Low:Normal PMUVCCOK
72
48,82 PWROK_PMU BAY1ON BAY1_ON 26,47,51
47 BENN_PMUCLIP 41 114 14 73
PARST# PD0(D) 12,23,26,28,37 PWROK_3VMAIN BENN_3VMAIN + 170ms MAINOK(I/O)(D) BAY2ON DOCK_ON 57
42 115 23,42,44,68,80 SUSB# 67
PE# PD1(D) SUSB#
45 116
PWR_3VMAIN PRM# PD2(D) HVCMOS Output(GMCH) R229 0 1/16W
83 PMU_SMI 46 117 62
PMUSMII PD3(D) EBLENO(OD) BL_EEN_BENN 37,47,83
13 GM_BLEN 2 1 13
PWR_3VSUS LCDEN
2 1 BENN_3VMAIN 18 61 97
R335 10 1/16W 5% BAYLMP0#/3VMAIN No EXTVGA 37,80 LCDEN_Q BLEN PWM BLO BL_VOL 58
19 65 EXTVGA_BLEN 23,47 LCDCL# 39
PWR_3VSTD BAYLMP1#/LONGDLY LCDCL#(ESMIBE6)
2 1 BENN_3VSUS
R336 10 1/16W 5% 20 35
HDLMP#/3VSUS 23,44,73,74,80,83 SUSC# ACTIN#/SUSC#

1
PWR_PMU 1 2 BENN_3VSTD 64
R338 10 1/16W 5% PCMLMP0/3VSTD R230
65
C PCMLMP1/1VOK# 10K 1/16W 5% C
1 2 BENN_NOLMP 16 23 PCI_RST#
R340 10 1/16W 5% NOLMP EXTVGA

2
0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

23 SPKSYS 110 109

2
SPK1 SPKOUT DG_GSPKOUT 38 C593
31 SPKPCM 107 31 33
SPK2 2200pF 25V RK PCIRST# VGARST# PCIC_RST# 31
$V01L08

1
$V01L15 GND1 $V01L08
GND1 Changed connection
Reserve -> Mount Changed connection
2

1 112 GND1
FDATCH# FMODE#(OD) (R229,R230, from P37)
$V02L02
C594

C595

C596

#ICH内蔵P.U.がヘタレな場合を考慮し、P.U.は個別に設ける
1

NOLMP controls Input or 3 23 CRISIS Changed connection


GPIO0(D) G3PIO0(D)
88 4 24
Output of SUSOK/MAINOK RIOUT#(OD) PCI_PME# 23,26 60 KSHIP_ID1
5
GPIO1(D) G3PIO1(D)
25
FR_EXIST# 47
Hi:OUTPUT 60 KSHIP_ID0 GPIO2(D) G3PIO2(D) ST_EXIST# 47,51
None

None

None

6 26 SDMS_EXIST# 33,47
GPIO3(D) G3PIO3(D)
Low:INPUT 74 27 SOUT_EXIST# 47
EXTSCI#(OD) G3PIO4(D) EAPD_EN#
71 28 SCR_PWRON 33
EXTSMI#(OD) EXTSMI# 23,26 G3PIO5(D)
D G3PIO6(D)
29 FWH_WP#
1394_ENABLE 32 D
GND1 30 FWH_TBL#
G3PIO7(D)

47 GATACH# 7 99 IDE_RST_GPIO# 47
GPIO4(D) G3PIO8(D)
92 PCIE_WAKE# 23,26,35,43 47 BT12_EXIST# 8 100
WAKEOUT#(OD) H_USB_EXIST# 9 GPIO5(D) G3PIO9(D) WLAN_RFON
51 BAY_PCIESWON# GPIO6(D)
45,47 WAKE_MINIC#0 93 47,58 MIC_EXIST# 10 101 BAY1_CD1# 47,51
WAKEA# GPIO7(D)G3PIO10/BAY1ATCH1#
47,63 WAKE_LAN# 94
WAKEB# 0.8mm G3PIO11/BAY1ATCH2#
102 BAY1_CD2# 47,51
45,47 WAKE_MINIC#1 95
WAKEC# *Changed net name. G3PIO12/BAY2ATCH1#
103 DOCK_CD1# 47,54,57
PWR_PMU 104
G3PIO13/BAY2ATCH2# DOCK_EXIST# 47
105 SW_MODE0 47,62
PWR_3VSUS G3PIO14(D) SW_MODE1
17 $V01L08 106
3V1 G3PIO15(D) SUBBATON
31,47 PME_PCIC# 89 49 56
90
RI1# 3V2
81 Changed connection G3PIO16(D)
57 BL_ID0
RI2# 3V3 G3PIO17(D)
1000pF 25V RK

1000pF 25V RK

91 VCC 113 58 BL_ID1


RI3# 3V4 C599 0.1uF 10V RK G3PIO18(D)

0.1uF 10V RK
43 59
3V5 G3PIO19(D)
E 75 60 DG_HPON 39 E
3V6 G3PIO20(D)
2
VSS
2

12
VSS1
26,45,47,61 RF_SW 69 22 44 LAN_RST# 77
ESMIBE2 VSS2 G3STDIO0(D)
34 78
1

VSS3 63 LAN_DISABLE# G3STDIO1(D)


C597

C598

C600

83 HTKYSMI 70 44 45,47 MINIC_ON0 79


ESMIBE4 VSS4 G3STDIO2(D)
VSS5
54 *Changed net name. 47,61 BLUE_ON 80
G3STDIO3(D)
66 44 LAN_PON 82
GND VSS6 G3STDIO4(D)
76 83
VSS7 G3STDIO5(D)
86 45,47 MINIC_ON1 84
VSS8 G3STDIO6(D)
98 $V02L03 BENN 2/2
VSS9
108 82,83 ASIC_PON 85
VSS10
118 Changed connection 111
PON PWR_3VMAIN
VSS11 PWR_PMU EPSONTEST
BENN 1/2 128
TEST#
BENN
F R341 F
BENN
GND1 GND1 1K 1/16W 5%
TP36 1 2
TESTPAD
23,42,44,68,80 SUSB#
TP37 CRISIS
TESTPAD
23,44,73,74,80,83 SUSC#

48,82 PWROK_PMU

82,83 ASIC_PON 位置指定


C1080 None

C1081 None

C1082 None

C1083 None
100pF 25V AJ

100pF 25V AJ

100pF 25V AJ

100pF 25V AJ
2

[BENN]
1

G G
$V02L01
TITLE
Added parts GILIA Main Board Rev.03
Fujitsu GND1 ※BENNの端子直近に配置すること
DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 46 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
※本項の部品は指示のない限りBENNの近くに配置すること。
 集合抵抗を個別の抵抗に分割することで配線が有利になる場合、
A  分割可とする。(回路設計者に連絡すること) PWR_PMU A
PWR_3VMINIC_AUX1

10K 1/16W 5%
1
R342
PWR_3VLAN

R343 10 1/16W 5%

2
PWR_3VMINIC_AUX0 1 2
30,62,83 SUSSW# SUSSW#_ASIC 46
PWR_3VMAIN

2
RM43 C601
1 16 2200pF 25V RK
46,57 DOCK_ID
46 BAY_ID3 2 15

1
3 14 RM44 PWR_3VSUS
46,51 BAY_ID2
46,51 BAY_ID1 4 13 45,46 WAKE_MINIC#0 16 1
5 12 15 2 GND1
B 46,51 BAY_ID0
6 11
46,63 WAKE_LAN#
14 3
B
46,62 SW_MODE0 45,46 WAKE_MINIC#1
46 GATACH#
7
8
10
9
13
12
4
5
#ノイズ対策用 要実機確認
37,46,83 BL_EEN_BENN 31,46 PME_PCIC#
11 6 PWR_3VSTD
46,54,57 DOCK_CD1#
10Kx8 1/16W 5% 10 7
46,51 BAY1_CD2#

10K 1/16W 5%
46,51 BAY1_CD1# 9 8

2
10Kx8 1/16W 5%

R344
D75
RB521S-30 R345 10 1/16W 5%

1
1uF 10V 1608 FZ

1uF 10V 1608 FZ

1uF 10V 1608 FZ


52,62,82 LCDCL#_SW 1 2 2 1 LCDCL# 23,46
*Changed net name.

1
RM48 C602
1 16 2200pF 25V RK
C 33,46 SDMS_EXIST# C

C603

C604

C605
46,51 ST_EXIST# 2 15

2
46 FR_EXIST# 3 14
46,58 MIC_EXIST# 4 13
5 12 GND1
46 BT12_EXIST# 6 11
46 DOCK_EXIST# 7 10
26,46,51 BAY1_ON 8 9

10Kx8 1/16W 5% ※本IC/CAPの外周、及びその直下層はGND1とする。


GND1 2個以上の貫通VIAでGND層へと接続すること。
GND1 PWR_3VSUS

R351 No PR PWR_PMU
46 DOCK_EXIST# 1 2

0.01uF 25V RK
1K 1/16W 5% PWR_PMU
$V03L04
Reserve -> Mount X10,C1178

1
D X10 D

C1178
1 4

2
VIO VDD
SYSID0: as ALGCD_EXIST# $V02L01
SYSID1: Reserved (as SCR_EXIST#) Changed connection GND1
SYSID2: as SATA_EXIST# SERB_RI# SERB_RI# 23,26
2 3 CLK_32K_OSC
GND CLKOUT

3
PWR_3VMAIN
R348 No Analog CD Q118 PR SG-3030JC
1 2 1 2SK3541 GND1 CAN46-32K768/0
46 SYS_ID0 42 SERB_RI

2
1K 1/16W 5%

1 2
E PWR_PMU GND1 $V03L03 E
RM49 PWR_PMU RS4 0 SS
46,51 SYS_ID2 8 1 M34 Changed
CP210202-01
33,46 SYS_ID1 7 2 part to
6 3 4 3
VCC SPEED pad
5 4 BENN_PMUCLIP 46

C606 None
PWR_3VMAIN ※分岐は最短とすること。

0.1uF 10V RK
2
GND

2
10Kx4 1/16W 5% R735 No S-OUT
46 SOUT_EXIST# 2 1 5 1 1 2 CLK_32K_ASIC 46
E.C. CLK

1
1K 1/16W 5% R349 10 1/16W 5%
MAX7377AXRD
CA98010-7822 GND1 2 1 CLK_32K_PMU 82
GND1 None
R350 10 1/16W 5%

F 45,46 MINIC_ON0 2 1 RF_ON_LED# 83 #TPM側で3VSUS P.U. F


※本IC/CAPの外周、及びその直下層はGND1とする。 1 2 CLK_32K_TPM 36
D71 RB521S-30 2個以上の貫通VIAでGND層へと接続すること。 D61 RB521S-30**TE61
2 1 TPM(OB)
45,46 MINIC_ON1
PWR_3VMAIN
IDE_RST_BAY# 51
3

D72 RB521S-30 $V03L04 1 2 CLK_32K_TPM_SB 36


Q114 R805 10K 1/16W 5% Q134
Mount -> Reserve M34,C606
3

DTC143TMT2L 2 1 1 2 1 2SK3541 D65 RB521S-30**TE61


46,61 BLUE_ON
#Bay Board上でPull-Upする。 TPM(SB)
2

1 (漏れ注意) D73 RB521S-30


BT
26,45,46,61 RF_SW 1 2
GND1
2

D74 RB521S-30 $V01L09


2

G
46 IDE_RST_GPIO#
R806
100K 1/16W 5%
Added
parts [BENN P.U./P.D.] G
1

TITLE
GILIA Main Board Rev.03
Fujitsu GND1
DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 47 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile

A A

PWR_PMU

0.1uF 10V RK
1
B B

C607
PWR_1

2
M35

3
VIN
GND1
R355
2 1 UVLOTH 4 1 1 2
VSEN OUT PWROK_PMU 46,82
16K 1/16W 0.5%

68K 1/16W 0.5% R356


2

1K 1/16W 5%
Pwr1 threshold 6.5V UVLODLY 5 2
Cd GND
R357

0.1uF 25V 1608 RK

0.1uF 25V 1608 RK


1

C R_delay XC6108C12BMR C
Min: 1.0M ohm CA46510-0170
2

Typ: 2.0M
Max: 3.5M GND1
C608

C609
1

R358
2 1 ERR_3.3VREG 77
0 1/16W
GND1 None

D D
※CPU-DDCの直近に配置すること

PWR_PMU

M36
2

C610 4 5
V+ OS#
1

0.1uF 10V RK
1 3
HYST VTEMP
2
GND

E E
LM26CIM5X-ZHA-NOPB
GND1

F 1 2 F
49 OVERTEMP#
R359 0 1/16W
None

G [Reset] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 48 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
Based on GROSSO
PWR_5VMAIN

A PWR_3VMAIN A

RM52
SMT8
1 8
2 7
FAN_TACH2 3 6 PWR_FAN TP38
4 5 TESTPAD

10Kx4 1/16W 5%
CN10
GND1
M37 R360 10 1/16W 5% 1
+

1
THERM_ADD 2 1
None 4.7uF 10V 2012 FZ C611
FAN_TACH 2 1 PWMOUT None 2
B B

2
FAN_TACH2 TACH1 PWM1 PWR_MASK GND
4 3
TACH2 PWM2
16 GND1 FAN_TACH 3
28,45,58 SMB_CLK_THRM_SPWG SCLK TACH
15 14 PWR_3VMAIN
28,45,58 SMB_DATA_THRM_SPWG SDA ALERT#
6 1 2 FAN CN-3pin
THERM#
R815
$V02L01 GND1
5
FANFAIL# 10K 1/16W 5% Added part TP39 $V01L13
9 TESTPAD
7 CPU_THMDA
O DXP1 Mount -> Reserve

2
7 OVERTEMP# 48
C612 OT#
1000pF 25V RK 11 PWR_3VMAIN

1
None DXN
7 CPU_THMDC
O

0.1uF 10V RK
8
VCC
12
DXP2

1
C C
C613

C614
2200pF 25V RK

2
10 2 1
GND
THERM_ADD 13
ADD R361
MAX6640 10 1/16W 5%

GND1

D THERM_OVRRIDE# D

PWR_FAN
PWR_5VSUS Q24

10uF 10V 2012 RK


UPA1816
8
1 7
2 S D 6 PWR_MASK
1

3 5
2

C615
10K 1/16W 5%

E 4 E
2
1

G
R362

680 1/16W 5%

PWR_5VMAIN
1

GND1
R363

None
10 1/16W 5%
2

1
{Mount} R365

2
47K 1/16W 5%
1 1 2 PWMOUT

R364
Q25

3
Q26 R366 R367 2SB1197KT146
3

1K 1/16W 5% 1.2K 1/16W 0.5%


1 2 1 2 1
2

2SC4617TL
F F
R368
2 1
1

10uF 10V 2012 RK


2.2K 1/16W 5%

2.2K 1/16W 5%
R369

None
2

4.7K 1/16W 5%
2

C616

R370
1

GND1

G GND1 GND1 [Thermal] G


TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 49 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
SDVO_CTRLDATA PWR_2.5VMAIN
PWR_2.5VMAIN -SDVO present $V01L02
1: Present
0: No SDVO PWR_5VMAIN Deleted parts
RM53
R371,R373,R374,R375

2
A SDVO_CTRLCLK 8 1 A
Q27 SDVO_CTRLDATA 7 2 C617,C618,C619,C620
SD_PROM 6 SDVO 3
DTA144EM SC_PROM R401 10 1/16W 5% SDVO
1 5 4
SDVO SMT8 TRNS_TMDS_TXC+ 1 2 TMDS_TXC+ 57
Q28 SDVO 5.6Kx4 1/16W 5%

3
DTC144EMT2L R402 10 1/16W 5% SDVO

3
TRNS_TMDS_TXC- 1 2 TMDS_TXC- 57
57 DVI_DETECT 1 HPDET

2
R405 10 1/16W 5% SDVO
R372 TRNS_TMDS_TX0+ 1 2 TMDS_TX0+ 57

2
10K 1/16W 5% R406 10 1/16W 5% SDVO
SDVO
TRNS_TMDS_TX0- 1 2

1
TMDS_TX0- 57
M38 SDVO
GND1
B GND1 46 R409 10 1/16W 5% SDVO
B
13 SDVOB_CLK+ SDVO_CLK+
13 SDVOB_CLK- 47 TRNS_TMDS_TX1+ 1 2 TMDS_TX1+ 57
SDVO_CLK-
13 SDVOB_BLUE 43
PWR_5VMAIN D15 SDVO SDVO_B+ R410 10 1/16W 5% SDVO
13 SDVOB_BLUE# 44 14
RB521S-30 SDVO_B- TLC+
13 SDVOB_GREEN 40 13 TRNS_TMDS_TX1- 1 2 TMDS_TX1- 57
SDVO_G+ TLC-
13 SDVOB_GREEN# 41
SDVO_G-
2 1 13 SDVOB_RED 37 17
SDVO_R+ TDC0+ R414 10 1/16W 5% SDVO
13 SDVOB_RED# 38 16
SDVO_R- TDC0-
TRNS_TMDS_TX2+ 1 2 TMDS_TX2+ 57
20
TDC1+ R415 10 1/16W 5% SDVO
19
TDC1-
2

12 SDVO_CTRLCLK SDVO_CTRLCLK 4 TRNS_TMDS_TX2- 1 2 TMDS_TX2- 57


R376 R377 SPC
12 SDVO_CTRLDATA SDVO_CTRLDATA 5 23
2.2K 1/16W 5% 2.2K 1/16W 5% SPD TDC2+
22
SDVO SDVO TDC2-
SD_PROM 8
SD_PROM
SC_PROM 9
1

C SC_PROM C
57 DVI_DDAT_DOCK 10 32 SDVOB_INT SDVOB_INT 64
SD_DDC SDVO_INT+
57 DVI_DCLK_DOCK 11 33
SC_DDC SDVO_INT-
SDVOB_INT# SDVOB_INT# 64
PWR_2.5VMAIN R379 SDVO
10K 1/16W 5% R378 1 2 1.2K 1/16W 5% 25 PWR_3VMAIN
SDVO VSWING FL20 SDVO
2 1 ADDSEL
HPDET 29 PWR_DVITVDD 2 1
Total
HPDET
PWR_2.5VMAIN:250mA

SDVO

10uF 6.3V 2012 RM


2 15 BLM18PG181SN1
12,23,29,30,34,36,42,44,45,51,64,83 PLT_RST# RESET# TVDD
PWR_3VMAIN:190mA

C623 SDVO

SDVO
0.1uF 10V RK

0.1uF 10V RK
21
TVDD

2
2 1 None ADDSEL 3

߹Θͤͯ0.8mm
AS

1
C621 2200pF 25V RK

C624
PWR_2.5VMAIN R380 1 2 10K 1/16W 5% 34

1
BSCAN

C622
GND1 SDVO

2
D FL21 SDVO
TGND
18 D
2 1 PWR_DVIDVDD GND1 24
TGND
12
DVDD
SDVO
10uF 6.3V 2012 RM

BLM18PG181SN1 GND1
0.1uF 10V RK

0.1uF 10V RK 28

߹Θͤͯ1mm
DVDD
1

GND1 GND1 PWR_3VMAIN


2

1
SDVO

SDVO
FL22 SDVO
C626

C627

1 PWR_DVIPLL 2 1 PWR_2.5VMAIN
2

AVDD_PLL
C625

0.1uF 10V RK
1

SDVO

10uF 6.3V 2012 RM


7 BLM18PG181SN1 RM54
DGND

SDVO
C628
30 8 1
DGND

1
※PWR_DVIPLLは高速BUSから 7 2

2
PWR_2.5VMAIN GND1 6 極力離すこと 6 CH_HDCP 3
FL23 SDVO GND1 GND1 AGND_PLL
5 4

2
C629
2 1 PWR_DVIAVDD SMT8
36 10Kx4 1/16W 5%
BLM18PG181SN1 AVDD GND1 None
42
AVDD
SDVO
10uF 6.3V 2012 RM

GND1
0.1uF 10V RK

0.1uF 10V RK

E 48 E
AVDD
2

0.1uF 10V RK

27
PROM2/SC_Key M39
2

2
SDVO

SDVO

SDVO
C631

C632

26
1

PROM1/SD_Key
C630

C633

6 1
1

CLK A0
2

R382 10K 1/16W 5%

R383 10K 1/16W 5%


31 35 5 7 1 2
AGND Reserved DATA E
39
GND1 AGND PWR_2.5VMAIN R381 0 1/16W
45
AGND

CH_HDCP

CH_HDCP
8 2 CH_HDCP
VCC B1

SDVO None
CH7312 CA46120-1158

None 5pF 25V AD

None 5pF 25V AD

0.1uF 10V RK
4 3
GND B2

1
GND1 GND1 GND1

1
SDVO

CH_HDCP
CH9901

2
CH_HDCP

2
C634

C635
CA46120-1163

C636
F GND1 F
GND1 GND1

GND1 GND1

CH7307 CH7312
Pin 26 BSCAN (PD) SD_Key
G Pin 27 Reserved (NC)
Reserved (NC)
SC_Key
BSCAN (PD)
[DVI Tranmitter] G

Pin 34 TITLE
GILIA Main Board Rev.03
Fujitsu Pin 35 Reserved (NC) Reserved (PD) DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 50 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
$V01L02
Changed connection CN11 PWR_BATT2 PWR_BATT2

A
$V01L05 CN11A
A
Changed connection CN11
1 61

2 62

3 63
A2
PWR_BT2ROM 4 64

5 65

6 66 PMU_BT2IN0# 86
PWR_3VMAIN 7 67
86 PMU_BT2TEMP0 PMU_SCONT2 86
B CN11B 8 68
B
86 PMU_VSENSE2
31 91 82 PMU_BT2DAT 9 69 PMU_BT2CLK 82
32 92 10 70 GNDA
IDE_SDA2 22 26,46,47 BAY1_ON BAY_ID1 46,47
PWR_5VSUS 33 93 11 71
IRQ15_BAY 26 46,47 BAY_ID0 BAY_ID2 46,47
BAY 34 94 12 72
IDE_SDDREQ 22 IDE_SDD[0:15] 22 83 BAY1_LMP# BAY_PCIESWON# 46

12,23,29,30,34,36,42,44,45,50,64,83 PLT_RST# 35 95 IDE_SDD0 83 PS2_PCLOCK 13 73 BAY1_CD2# 46,47


22 IDE_SDD[0:15]
IDE_SDD8 36 96 IDE_SDD1 83 PS2_PDATA 14 74 BAY1_CD1# 46,47
IDE_SDD9 37 97 IDE_SDD2 $V02L01 23 USB_P5+ 15 75 ※スタブ最小とすること
C IDE_SDD10 38 98 IDE_SDD3 Changed connection 16 76 C
23 USB_P5- USB_P6- 23
IDE_SDD11 39 99 IDE_SDD4 46,47 ST_EXIST# 17 77 USB_P6+ 23
IDE_SDD12 40 100 IDE_SDD5 22 IDE_SDIOR# 18 78

IDE_SDD13 41 101 IDE_SDD6 19 79 GND_BATT


22 IDE_SDIORDY

3
4
IDE_SDD14 42 102 IDE_SDD7 20 80 GND_BATT L9

3
4
22 IDE_SDIOW#
GND_BATT DLW21HN900SQ2L
IDE_SDD15 43 103 22 IDE_SDA0 21 81
MINIC_2nd
44 104 22 82 GND_BATT
22 IDE_SDA1

2
1
45 105 23 83 GND_BATT
23 PCIE_TXP4_BAY BAY_HP_L 41 22 IDE_SDCS#3

2
1
GNDAUD
D 23 PCIE_TXN4_BAY 46 106 22 IDE_SDCS#1 24 84 GND_BATT D
GND_BATT USB_P6+_MINIC 45
47 107 PWR_BAY 25 85
BAY_HP_R 41 22 IDE_SDDACK#
Pull Up etc(Output) GND_BATT USB_P6-_MINIC 45
23 PCIE_RXP4_BAY 48 108 26 86

49 109 27 87 GND_BATT
23 PCIE_RXN4_BAY CDL 38 47 IDE_RST_BAY#
PWR_3VMAIN
50 110 28 88 GND_BATT
CDGND 38
51 111 PWR_5VSUS 29 89
6 CLK_100_PCIETV+ CDR 38 BAY_HPSENSE 39
52 112 BAY 30 90 HDD(SATA)/S-P-Bridge(PATA)
6 CLK_100_PCIETV-
53 113 $V02L01
Bay Relay CN 120 Changed connection
E 22 SATA_RX0+ 54 114 HDDLED# 83 CA52233-0088 E
22 SATA_RX0- 55 115
GND1
56 116

57 117 PWR_5VMAIN GND1


22 SATA_TX0-
58 118 HDD
22 SATA_TX0+
59 119 HDDLED#(SATA) PWR_1.8VMAIN
SATA_LED# 22
GND1(SATA) 60 120 S-P-Bridge
46,47 SYS_ID2

F Bay Relay CN 120 F


GND1 GND1
AC/DC 0.3A/pin

C637
1000pF 25V RK
2 1

None

G GNDAUD GND1 [CN - BAY Board] G


TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 51 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
TP ͷελϒ͸Ͱ͖Δ‫ݶ‬Γ୹͘͢Δ͜ͱɻ

TESTPAD

TESTPAD
TP209

TP210
TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD
TP46

TP47

TP48

TP49

TP50

TP51

TP40

TP41

TP42
A PWR_XIMVCC A

AW Short (R1005)
$V01L05

TESTPAD

TESTPAD

TESTPAD

1
Changed connection

TP43

TP44

TP45
PWR_XIMVCC_CN TP207
TESTPAD
Changed part

AWS67
$V01L09 Added AWS
Added pad $V01L09

PWR_XIMVCC_CN 2
CN12 Added pads

TESTPAD
1 2
N.C. N.C.

TP206
TP208
3 4 XIM_INSERTED TESTPAD
N.C. Reserved
USB_OC#0
23 USB_OC#0
5 6 XIM_CLK 45
N.C. XIM_CLK
USB_OC#1 7 8 TP52
B 23 USB_OC#1 XIMVCC XIM_DATA XIM_DATA 45
TESTPAD
B
9 10 PWR_3VMAIN
45 XIM_RST# XIM_RST# IR_TX IR_TX 42
USB_OC#2 FL24
23 USB_OC#2 BLM11P300S
11 12
GND 3VMAIN
<FILTER>
23 USB_P0+ 13 14 PWR_3VMAIN_IR 1 2
USB_P0+ 3VMAIN
PR

0.1uF 10V RK
23 USB_P0- 15 16 IR_RXA# 42
USB_P0- IR_RXA

1
PR
17 18 IR_MODE 42
GND IR_MODE

2
C638
23 USB_P1+ 19 20 USB_OC#0
USB_P1+ USB_OC#0

23 USB_P1- 21 22 USB_OC#1
USB_P1- USB_OC#1 GND1
23 24 USB_OC#2
C GND USB_OC#2 C
23 USB_P2+ 25 26
USB_P2+ 5VSUS FL25
$V01L07 BLM21P300S PWR_5VSUS
23 USB_P2- 27 28
Deleted parts R639,R640,R641 USB_P2- 5VSUS
<FILTER>
47,62,82 LCDCL#_SW 29 30 PWR_5VSUS_USB 1 2
LCDCL# 5VSUS(Rsv)

0.1uF 10V RK
CN to USB Board

1
CA52244-2141

C642

2
TP53
TESTPAD
TESTPAD
PWR_BT TP54
GND1
2

D #電流値 200mA MAX。 GND1 D


<FILTER>

FL60
BLM11P300S リップルを 30mV Pk-Pk以下にすること。
BT フィルタは実機確認後最終決定予定。
CN13 TP195
1

Q113 TESTPAD
TP194 1 PWR_3VSTD SI2305DS-T1-E3 PWR_BT
TESTPAD GND BT
2 2 3
NC

0.01uF 50V 1608 RK


3
GND

None
470K 1/16W 5%

4.7uF 10V 2012 FZ


1
1
4
NC

2
5
NC

C1065
E $V01L08 E

1
R718

C995
BT

BT
6
2

NC Added parts

220 1/16W 1%
2

BT
7 Deleted parts M65,C999,R720
PIO5 BT_ACTIVE
BT_RST# 8 $V01L08 GND1
RESET#

R929
Changed part
2

47K 1/16W 5%

$V02L03 9 PWR_BT

1
PIO3 M73
Changed connection 10 $V01L08 PWR_3VSTD
NC
R719

Changed part 4
VDD

100K 1/16W 5%
11 2
1

GND SUB
BT

3 1 BT_RST#
CT OUT

3
BT

0.022uF 16V RK
12 Q112
PIO7

C1063 BT
DTC143TMT2L Q141B 5
GND
3

1
13 BT 5 EM6K1 C1062 C1064
PIO2
R930

BT

4
F 14 1 0.1uF 10V RK BU4327FVE 2200pF 25V RK F
45 BT_CH_CLOCK 61 BTON
1

2
PIO4 BT_PRIORITY BT BT BT
/CH_CLOCK
15
PIO1 Reset# Low : 10ms min
6

16 target: 14ms GND1


33 USB_P7+_BT
2

USB_D+ Q141A GND1


17 2 EM6K1 GND1
33 USB_P7-_BT USB_D- 61 BTON
BT
1

45 BT_CH_DATA 18
PIO6 WL_ACTIVE GND1
/CH_DATA
0.1uF 10V RK

19 $V02L03
PIO0
BT

GND1
Added parts
2

20
VDD_3.3
C1056

[CN - USB Board/BT Board]


1

G
CN to BT #システムは起動時にUSB Port 7にデバイスの有無を見に行く。 G
BT
GND1 CA52237-8043
VendorIDがBluetoothのものである場合、Bluetoothありの動作を行う。
GND1 (FeliCaのVIDの場合またはデバイスなしの場合、Bluetoothなしと判断する。) TITLE
Bluetoothありの場合は、BT12_EXIST#でBTモジュールのバージョンを判別する。 GILIA Main Board Rev.03
Fujitsu $V01L06
Added part
DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 52 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

A A

B TP187
B
TESTPAD TP192
TP188 TESTPAD PWR_3VSUS
TESTPAD
TP189
TESTPAD
TP190 <FILTER>
TESTPAD PWR_3VSUS_MDM 1 2
TP191
TESTPAD FL58

4.7uF 10V 2012 FZ


None

None
BLM18PG181SN1

0.1uF 10V RK
2

1
CN31

2
C988
1 2
GND RES

C989
C 3 4 C
22 ACZ_SDOUT_MDM SDO RES
5 6 TP193
GND VCC TESTPAD GND1
GNDMDM
22 ACZ_SYNC_MDM 7 8
SYNC GND

22 ACZ_SDIN1 9 10
SDI GND

22 ACZ_RST#_MDM 11 12 ACZ_BITCLK_MDM 22
RST# BCLK
13
FG

2200pF 25V RK

100K 1/16W 5%
14
FG
FG
15 ※ACZ_BITCLKはGND1でガードすること。

10pF 25V AD
16
FG

C990
17
None FG
C987

R713
18

1
FG

None
D D

1
MDC1.5 CN
CA52248-8604 GNDMDM
GNDMDM GNDMDM GNDMDM
GNDMDM

$V02L01
Added pads.
$V02L10 0 SS
※RSxxは、はんだショート用パッドのため、パッド間のパターン接続はしないこと。
E Changed parts RS1
 (1pin - 2pin間をアートワークで接続しないこと。) E
2 1

CP210202-01

※RS1,RS2の配置は下の図参照。 RS2 0 SS
2 1

CP210202-01
RS1

RS2

GNDMDM AWS65 AW Short (R1608)

2 1 MDC STAD
ST1

CN31
F GND1 GNDMDM F

ST1
AWS65 ※ST1,ST2は内層でGND1へと接続しないこと。
AWS66 AW Short (R1608)

2 1 MDC STAD
ST2

GND1 GNDMDM2
G [MDC] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 53 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile

#各RGB配線について、スタブが最小となるように配線すること。
A 65 CRT_RED_EXTVGA 1 2 A
R384 0 1/16W EXTVGA
R386 0 1/16W CRT(JC)/CRT(JR)
13 CRT_RED_GMCH 1 2 1 2

R385 0 1/16W No EXTVGA R388 0 1/16W CRT(JC)


1 2

65 CRT_GREEN_EXTVGA 1 2

R390 0 1/16W EXTVGA


R392 0 1/16W CRT(JC)/CRT(JR)
13 CRT_GREEN_GMCH 1 2 1 2

R391 0 1/16W No EXTVGA R394 0 1/16W CRT(JC)


B 1 2
B

65 CRT_BLUE_EXTVGA 1 2

R395 0 1/16W EXTVGA


R397 0 1/16W CRT(JC)/CRT(JR)
13 CRT_BLUE_GMCH 1 2 2 1

R396 0 1/16W No EXTVGA R399 0 1/16W CRT(JC)


2 1

M66

C C
2 CRT_RED_PR 57
S1A
CRT_RED_SW 4
DA
3 CRT_RED_MAIN 56
S2A

5 CRT_GREEN_PR 57
S1B
CRT_GREEN_SW 7
DB
6 CRT_GREEN_MAIN 56
S2B

11 CRT_BLUE_PR 57
S1C
D CRT_BLUE_SW 9
DC
D
10 CRT_BLUE_MAIN 56
S2C

14
S1D
12
DD
13
S2D
$V01L08 $V01L11
Changed connection Changed connection

PWR_3VSTD

E 46,47,57 DOCK_CD1# 1
IN
0: S1x Enable VCC
16 E
1: S2x Enable
CRT(WW)

0.1uF 10V RK

4.7uF 6.3V 1608 RK


C996 None
470K 1/16W 5%

CRT(WW)
1

CRT(WW)
C643
15

2
EN#
R814
2

8
GND “dŒ¹‚ð•Aƒpƒ^•[ƒ“‚Ì“s•‡‚ÅSTD‚É•Ï•X•B
DOCK_CD1#‚Í3VSUS P.U.

GND1 GND1 PI5V330S CRT(WW)


CA98010-7674
GND1
F F

G [VGA Switch] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 54 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

A A

※下記の抵抗は外部VGAの端子直近に配置すること。
分岐から抵抗までの配線長は極力0に近づけること

RM55 No EXTVGA
13 LVDS_LC-_GMCH 1 8 LVDS_LC- 58,65
13 LVDS_LC+_GMCH 2 7 LVDS_LC+ 58,65
13 LVDS_L0+_GMCH 3 6 LVDS_L0+ 58,65
13 LVDS_L0-_GMCH 4 5 LVDS_L0- 58,65
SMT8
0x4 1/16W
B B

RM56 No EXTVGA
13 LVDS_L2+_GMCH 1 8 LVDS_L2+ 58,65
13 LVDS_L2-_GMCH 2 7 LVDS_L2- 58,65
13 LVDS_L1-_GMCH 3 6 LVDS_L1- 58,65
13 LVDS_L1+_GMCH 4 5 LVDS_L1+ 58,65
SMT8
0x4 1/16W

RM57 No EXTVGA
13 LVDS_U0+_GMCH 1 8 LVDS_U0+ 58,65
13 LVDS_U0-_GMCH 2 7 LVDS_U0- 58,65
C 3 6 C
13 LVDS_UC-_GMCH LVDS_UC- 58,65
13 LVDS_UC+_GMCH 4 5 LVDS_UC+ 58,65
SMT8
0x4 1/16W

RM58 No EXTVGA
13 LVDS_U1+_GMCH 1 8 LVDS_U1+ 58,65
13 LVDS_U1-_GMCH 2 7 LVDS_U1- 58,65
13 LVDS_U2+_GMCH 3 6 LVDS_U2+ 58,65
13 LVDS_U2-_GMCH 4 5 LVDS_U2- 58,65
SMT8
0x4 1/16W

D D

※下記の抵抗は外部VGAの端子直近に配置すること。
分岐から抵抗までの配線長は極力0に近づけること
E E

13 TV_S_Y_GMCH 2 1

R412 0 1/16W
S-OUT(GMCH)
TV_S_Y 61,65

13 TV_S_C_GMCH 2 1

R416 0 1/16W
S-OUT(GMCH)
F TV_S_C 61,65 F

EXTVGA

#配線イメージ

G TV_S_x R TV_S_x_GMCH [VGA Jumper] G


TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 55 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
TP55 PWR_5VMAIN
※本項に記載の素子はすべてCRT-CNの近くに配置すること
PS2
FL26
A <FILTER> A
1 2 2 1
2 1 TP56
BLM11P300S
$V03L03
Changed part to PAD
nanoSMDC110F
CN14
1 1 2 CRT_RED_MAIN 54
RED
2 AWS93
GREEN AW Short (R1608)
3
BLUE
4
N.C TP57
5
GND
B 6
B
GND
7 1 2 CRT_GREEN_MAIN 54
GND
8 AWS94
GND AW Short (R1608)
9
+5V
10
GND TP58
11
N.C
12
SDA
13 1 2 CRT_BLUE_MAIN 54
HSYNC
C 14 AWS95 C
VSYNC AW Short (R1608)
15
SCL
16
FG1
17 TP59 $V02L08
FG2
CRT_DSUB15 Changed parts
CA52301-7007 FL30 22 1/16W 5% 1608
1 2 CRT_Q_HSYNC 37,57
2

C646
0.1uF 25V 1608 FZ
1

GND1 GND1

D D
TP60
GND1

FL31 22 1/16W 5% 1608


1 2 CRT_Q_VSYNC 37,57

※CN14の16pin.17pin(FG端子)は、
それぞれ、L10層及びL1層にて指定のFGへと接続すること。

TP61

E FL32 E
<FILTER>
1 2 CRT_Q_DDCDAT 37,57

BLM11A121S

TP62

FL33
<FILTER>
1 2 CRT_Q_DDCCLK 37,57

F F

10pF 25V AD

10pF 25V AD

10pF 25V AD
BLM11A121S
10pF 25V AD

10pF 25V AD

10pF 25V AD

10pF 25V AD

10pF 25V AD

10pF 25V AD

10pF 25V AD

1
R418 75 1/16W 1% CRT(WW)#
1

2
2 1 CRT_RED_MAIN 54

C647

C648

C649
2

2
C650

C651

C652

C653

C654

C655

C656
2

1
R419 75 1/16W 1% CRT(WW)#
2 1 None None None
CRT_GREEN_MAIN 54
None None None

R420 75 1/16W 1% CRT(WW)#


2 1

[CN - CRT]
CRT_BLUE_MAIN 54
GND1 GND1 GND1
G G
GND1 TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 56 91
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WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
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※PC1,PC3端子は、直近で内層GNDベタと接続すること。
その際VIAを10個以上設けること。
A またそのVIAには内層GNDベタ以外のGND1を接続しないこと。 A
CN15A CN15B

Serial(2) DVI(2)
PC1 PC3 42 DTRA 26 76 TMDS_TX2- 50
DCIN_RTN DCIN_RTN DTR TMDS2-

42 CTSA 27 77
GND1 CTS GND

42 SOUTA# 28 78 TMDS_TX1+ 50
SOUT# TMDS1+
1 51
GND GND Pulled up by EXT-DC-IN in PR.
42 RTSA 29 79 TMDS_TX1- 50
RTS TMDS1-
2 52 PR_SYSDET
ATACH1# SYSDET1
42 SINA# 30 80
SIN# GND
3 53 DOCK_ID 46,47
AUDIOGND DOCK_ID
42 DSRA 31 81 TMDS_TX0+ 50
DSR TMDS0+
B 38 JD_E_PR_OUT ※0.5mm幅にて配線 4
HPIN
AUDIO AUDIOGND
54
B
42 DCDA 32 82 TMDS_TX0- 50
DCD TMDS0-
※0.5mm幅にて配線 5 55
38 JD_C_PR_IN
6
MICIN

AUDIOGND
HP_R

AUDIOGND
56 * ALG_HP_R_DOCK 38

42 PAFD#
33

34
GND

AFD#
GND

STB#
83

84 PSTB# 42
7 57
38 ALG_MICIN_DOCK
* 8
MIC

AUDIOGND
HP_L

AUDIOGND
58 * ALG_HP_L_DOCK 38
42 PINIT# 35

36
INIT# PERR#
85

86
PPERR# 42

44 CN_TRD1+
GNDAUD
9

10
NC

LANTRD2+
LAN
LANTRD1+
NC
59

60
GNDAUD
CN_TRD0+ 44
*
※左記の の配線はAnalog信号のため、
P41に注記した方法で配線すること。
42 PRD0

42 PRD2 37
D0

D2
Parallel SLIN#

D1
87
PSLIN# 42

PRD1 42

42 PRD4 38 88 PRD3 42
D4 D3
44 CN_TRD1- 11 61 CN_TRD0- 44
LANTRD2- LANTRD1-
42 PRD6 39 89 PRD5 42
D6 D5
12 62
C NC NC C
42 PACK# 40 90 PRD7 42
ACK# D7
44 CN_TRD3+ 13 63 CN_TRD2+ 44
LANTRD4+ LANTRD3+
42 PPE 41 91 PBUSY 42
PE BUSY
44 CN_TRD3- 14 64 CN_TRD2- 44
LANTRD4- LANTRD3-
42 92 PSLCT 42
GND SLCT
15 65
NC NC
83 PS2_KCLOCK 43 93 PS2_MCLOCK 83
KCLK MCLK
16
GND AGND
66 PS/2
CRT 83 PS2_KDATA 44
KDATA MDATA
94 PS2_MDATA 83
37,56 CRT_Q_DDCDAT 17 67 CRT_RED_PR 54
DDCDAT VGA_R
DOCK_USBPWRON 45 95
SUSON USBGND
CRT_Q_HSYNC_CN 18
HSYNC VGA_G
68 CRT_GREEN_PR 54 CTL
62 DOCK_SUSSW# 46
SUS_SW#
USB USB_P+
96 USB_P3+ 23
CRT_Q_VSYNC_CN 19 69 CRT_BLUE_PR 54
VSYNC VGA_B DOCK_ON_D
46 DOCK_ON 1 2 47 97 USB_P3- 23
MAINON USB_P-
37,56 CRT_Q_DDCCLK 20 70
DDCCLK AGND
D R421 1K 1/16W 5% 48
PR_SDC USBGND
98 D
21 71 PR
50 DVI_DCLK_DOCK DVI_DDCCLK GND
PR_SYSDET 49 99 DOCK_CD1# DOCK_CD1# 46,47,54
SYSDET2 ATACH2#
50 DVI_DDAT_DOCK 22 72 TMDS_TXC+ 50
DVI_DDCDAT TMDSCLK+ Input for Q-SW of EXT-DC-IN in PR. 50 100 COM_PR_DET# 75
PR_SDA GND
50 DVI_DETECT 23 73 TMDS_TXC- 50
DVI_DETECT TMDSCLK-
24 74 PWR_EXDCIN
GND GND

42 RIA 25 75 TMDS_TX2+ 50 PC2 PC4 $V01L11


RI TMDS2+ DCIN DCIN
Changed connection
Serial(1) DVI(1) FG1
FG1 FG4
FG4
FG2 FG5
CPR2(ver.G) FG2 FG5
FG3 FG6
FG3 FG6

E E
CPR2(ver.G)
GND1 GND1 PR
GND1 GND1
$V02L02
Added parts
R422 75 1/16W 1%
37,56 CRT_Q_HSYNC 1 2 CRT_Q_HSYNC_CN 54 CRT_RED_PR 2 1 CRT(WW)#
R927 22 1/16W 5% PWR_3VSUS
PR
R423 75 1/16W 1%
37,56 CRT_Q_VSYNC 1 2 CRT_Q_VSYNC_CN 54 CRT_GREEN_PR 2 1 CRT(WW)#

2
R928 22 1/16W 5%
PR Q30
R424 75 1/16W 1%
F 2 1 CRT(WW)# DOCK_CD1# 1
DTA144EMT2L F
54 CRT_BLUE_PR PR
C658

1 2

3
10pF 25V AD

10pF 25V AD

10pF 25V AD

1000pF 25V RK
None GND1 DOCK_USBPWRON
2

GNDAUD GND1
C659

C660

C661
1

None None None

G
˞ຊ߲‫ࡌه‬ͷ෦඼͸͢΂ͯCN15ͷۙ͘ʹ഑ஔ͢Δ͜ͱɻ [CN - Common-PR-II] G
TITLE
GILIA Main Board Rev.03
Fujitsu
GND1
DRAW. CUST.
NO. C1CP272450-X3
Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION
FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 57 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
*
※回路図中の  印はAnalogLineのため、0.25mm以上の幅で配線し、
 可能な限りGNDAUDでガード(上下層を含む)すること。
ガード配線が難しい場合は、他のデジタル信号に対し0.25mm以上のGAPを設けること。 $V02L01
 AnalogLineとAnalogGNDの隣接はかまわない。 Added parts
A A

PWR_3VMAIN

※FL67, FL68, FL69はCN16の直近に配置すること。


* *
<FILTER>
F3 ERBSE3R00U

36mOhm-MAX(I=20%)
2 1 ALG_MIC_GND_CN
38 ALG_MIC_GND
1

CA53200-5116

FL68 INT-MIC

* *
<FILTER>
3A 32V 1608

BLM15AG121SN1B ALG_INT_MIC_R_CN 1 2 ALG_INT_MIC_R 40


FL69 None

* *
<FILTER>
2 1 ALG_INT_MIC_L_CN BLM15AG121SN1B
2

40 ALG_INT_MIC_L
FL36 CN16
BLM11P300S FL67 INT-MIC 1 2
BLM15AG121SN1B 1 2
<FILTER> 3 4
PWR_3VMAIN_PNL 3 4 MIC Roop
PWR_3VMAIN_PNLF 2 1 5 6
B 7
5 6
8
B
28,45,49 SMB_CLK_THRM_SPWG 7 8 SMB_DATA_THRM_SPWG 28,45,49 $V02L01
$V01L07 9 10 MIC_EXIST# 46,47
11
9 10
12 Changed connection
Changed part F3 LCDID Roop 13
11 12
14
13 14 LCDID2 23,26
#PRのUSB、ここまでもってくる? LCDID Roop 15
15 16
16 LCDID1 23,26 #LCDID3,4はGILIAではHigh固定とする。
1

C672 LCDID Roop 17 18 PWR_LCD


17 18 LCDID0 23,26
1000pF 25V RK 19 20
55,65 LVDS_L0- 19 20 LVDS_U0- 55,65
21 22
2

55,65 LVDS_L0+ 21 22 LVDS_U0+ 55,65

2A 32V(P149)
LCD 23 24 LCD
23 24
55,65 LVDS_L1- 25 26 LVDS_U1- 55,65
25 26

1
55,65 LVDS_L1+ 27 28 LVDS_U1+ 55,65
GND1 XGA/SXGA+ LCD 27 28 LCD SXGA+
29 30
29 30

F5
55,65 LVDS_L2- 31 32 LVDS_U2- 55,65
31 32
55,65 LVDS_L2+ 33 34 LVDS_U2+ 55,65
LCD 33 34 LCD
35 36

2
35 36
C 55,65 LVDS_LC- 37
37 38
38 LVDS_UC- 55,65 #電圧効果注意!パターン/VIA必ず確認! C
39 40 FL35
55,65 LVDS_LC+ LCD 39 40 LCD LVDS_UC+ 55,65
41 42 <FILTER>
INV 41 42
43 44 PWR_LCD_PNL 2 1 PWR_LCD_FU
INV 43 44
45 46
45 46

1000pF 25V RK
PNL_BL_VOL 47 48 PWR_1_INV BLM21P300S
47 48

10uF 6.3V 2012 RM


PNL_BL_EEN 49 50
49 50

None
PWR_1

2
36mOhm-MAX(I=20%)
0.01uF 25V RK
GND_INV
PANEL CN

0.1uF 25V 1608 FZ

F2 ERBSE3R00U
CA52244-2100

1
1

1
3A 32V 1608

CA53200-5116

C665
C669

C670

C662
2

2
GND1 GND1 GND1

2
D FL38 1.5A D
※43pin, 45pinは表層で他のGND1パターンへと接続しないこと。 <FILTER>
1 2 PWR_1_INVF
GND1
GND1 BLM11P300S

$V01L07
Changed part F2
R426 1K 1/16W 5%
$V01L08
1 2 PNL_BL_EEN Changed connection(Changed each place of F2 and F5)
37 BLEN_Q
1

C668
E 100pF 25V AJ E
2

$V01L08
Changed connection
GND1

37 GM_BLVOL_Q 1 2

R717 No EXTVGA
1K 1/16W 5%
F F
1 2 PNL_BL_VOL
46 BL_VOL
R427 EXTVGA
1K 1/16W 5%
1

C666
100pF 25V AJ
2

GND1

G [CN - LCD] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 58 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
#MIC CNは削除。LCD-CNにアサイン

TP64
TESTPAD TP65
A A
TESTPAD
TP66 TP67 TP68
TESTPADTESTPADTESTPAD TP69 TP70
TESTPAD TESTPAD
TP211
TESTPAD

FL40 BLM11B102S 39 ALG_SPKOUTL-

CN17 <FILTER> ※
5 ※0.5mm幅にて配線 JD_B_MAIN_IN 38 ※2 1 ※ ALG_AUD_IN_R 38
4
3 ALG_AUD_IN_R_CN FL42 BLM11B102S
CN18
B 6 <FILTER> 39 ALG_SPKOUTL+ ※ B
2 ALG_AUD_IN_L_CN ※ 1 2 ※ ALG_AUD_IN_L 38
1 GND_MIC SPKOUTL-_CN 1
FL43 BLM11B102S SPL1
<FILTER> SPKOUTL+_CN 2
SPL2
470pF 25V RK

470pF 25V RK

470pF 25V RK
AUDIO-IN JACK 1 2
CA52245-1017
39 ALG_SPKOUTR+ ※ SPKOUTR+_CN 3
SPR1
5
FG_0
1

2
SPKOUTR-_CN 4 6
SPR2 FG_1
C674

C675

C676

GNDAUD ※
2

1
$V03L04 SPK CN GND1

Reserve -> Mount/Changed parts 39 ALG_SPKOUTR- CA52244-2144

C C
GND1

TP71 TP72 TP73


TESTPAD TESTPAD TESTPAD
TP74
TESTPAD

FL46 BLM11B102S
JD_D_MAIN_OUT 38
D CN20 <FILTER> D
5 ※0.5mm幅にて配線 ※ 2 1 ※ ALG_HPOUTR 38
4
3 CN_HP-R FL47 BLM11B102S
6 <FILTER>
2 CN_HP-L ※ 1 2 ※ ALG_HPOUTL 38
1 GND_HP

<FILTER>
AUDIO-OUT JACK 2 1
CA52245-1017
470pF 25V RK

470pF 25V RK

470pF 25V RK

FL48 BLM15AG700SN1B
None
1

None
1K 1/16W 5%

#推奨0Ω GNDAUD
1

1K 1/16W 5%
C677

C678

C679

$V03L04
R786

E E
2

Changed part
R787

$V03L04
2

$V01L06
2

Reserve -> Mount/Changed parts


Added parts

GND1
GNDAUD #ボツ音対策

本ページ中に記載されているフィルタ(FLxx)はそれぞれ接続
されているコネクタの近くに配置し、フィルターコネクタ間の配
線は非常に短く配線すること。
F The filters in this page (refered with FLxx) have to F
be placed near each connector connecting to respective
filters. The traces between connector and filter have
to be short as much as possible.

本項中※印のついたパターンは、GND_AUDでガードし、その上
下はGND_AUDのベタパターンで覆うこと。また、Mxの下の基板
面およびその下の層には、ディジタル系の信号線を配線しないこ
と。
The traces marked with ※ have to be guarded both side and
both adjacent layer with AUDIOGND. Underneath Mx on
surface layer and in one more internal layer don't allow
digital traces to be run.
G [CN - Audio] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 59 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD
TP75

TP76

TP77

TP78

TP79

TP80

TP81

TP82
A ROW#[0:7] 62,83 A

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD
KeyBoard Connector

TP83

TP84

TP85

TP86

TP87

TP88

TP89

TP90

TP91

TP92

TP93

TP94

TP95

TP96

TP97

TP98
CN21

1 ROW#0
ROW#0 ROW#1
2
ROW#1 ROW#2
3
ROW#2 ROW#3
4
ROW#3 ROW#4
18
ROW#4 ROW#5
19
ROW#5 ROW#6
20
ROW#6 ROW#7
24
ROW#7
B CLM#[0:15] 83 B
5 CLM#0
CLM#0
6 CLM#1
CLM#1
7 CLM#2
CLM#2
8 CLM#3
CLM#3
9 CLM#4
CLM#4
10 CLM#5
CLM#5
11 CLM#6
CLM#6
12 CLM#7
CLM#7
16 CLM#8
CLM#8
15 CLM#9
CLM#9
13 CLM#10
CLM#10
14 CLM#11
CLM#11
17 CLM#12
CLM#12
21 CLM#13
CLM#13
22 CLM#14
C CLM#14 C
23 CLM#15
CLM#15
R430 PWR_3VMAIN
25 1K 1/16W 5%
N.C.
26 2 1
ID-C
27 KSHIP_ID0 46
ID0
28 KSHIP_ID1 46
ID1

INT_KBD
CA52248-8512
Keyboard Strap (N86C-7664-0203-E)
TP99 TP100 TP101 ID1:ID0 (KBC Side)
TESTPAD TESTPAD TESTPAD JP 1 1
US 1 0
D UK 0 1 D

E E

$V01L05
Deleted parts CN22,CN23

F F

G [CN - Keyboard] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 60 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
※悪い例
௕͍
A A

TP107
TESTPAD

TP108 ※TPのスタブは極力短くすること。
TESTPAD
TP137
TP109 TESTPAD
TESTPAD

TP111
TESTPAD TP138
CN23 TESTPAD
L10 1:OFF
1 5 4
B TPB- 5 4 TPB- 32 3:ON B
2 6 3 R730 10 1/16W 5% SW1
TPB+ 6 3 TPB+ 32
26,45,46,47 RF_SW 2 1 1
7 2 TPA- 32 2
7 2
3

1
3 8 1 C693 4
TPA- 8 1 TPA+ 32
0.1uF 10V RK 5
4 B4W

2
TPA+ IEEE1394(O2)
5
FG1 GND1 BLUETOOTH SWITCH
6
FG2
7
FG3
8 46,47 BLUE_ON 2 3
FG4 Q33 BTON 52 GND1
1394CN(4pin w FG) RVE002P03

2
IEEE1394(O2) BT

1
C R442 C
100K 1/16W 5%
GND1 BT

1
PWR_5VMAIN

Q34
DTC143TMT2L

3
BT

D D

2
GND1

FL50
55,65 TV_S_Y 2 1
※TPのスタブは極力短くすること。
82pF 25V AJ

82pF 25V AJ

LQM21NN1R5K10D
1

R434 S-OUT
E 150 1/16W 1% E
S-OUT TP112 TP113
C688 2

C689 2

S-OUT TESTPAD TESTPAD


S-OUT
2

CN25
5
GND1 4
TV_S_Y_CN 3
FL51 6
2 1 TV_S_C_CN 2
55,65 TV_S_C
1
82pF 25V AJ

LQM21NN1R5K10D
1

1
82pF 25V AJ

S-OUT
F F
C690

R435 S-OUT JACK


150 1/16W 1% CA52245-1017
2

S-OUT S-OUT
C691
2

S-OUT S-OUT

GND1 ※本項記載の部品については、
GND1
それぞれ、各コネクタの近くに配置すること。

G [CN - 1394/S-out/RF-SW] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 61 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD

TESTPAD
TP114

TP115

TP116

TP117

TP118

TP119

TP120

TP121

TP122

TP123

TP124

TP125
PWR_3VMAIN
PWR_5VMAIN
CN26

* * *

1
A 1 2 LED_PWR_A A
R436 R437 LED_EMAIL_K 1
100K 1/16W 5% R440 330 1/16W 5% LED_EML_K
APPLIMODE 330 1/16W 5% APPLIMODE(w/LED) LED_EMAIL_A 2
APPLIMODE(w/LED) LED_EML_A

2
LED_AP_K 3
LED_APP_K
LED_COM_A * LED_COM_A 4
LED_COM_A
LED_AUD_K * 83 SCANX#
SW_COM 5
SW_COM
PWR_3VMAIN SWA 6
60,83 ROW#1 SWA#(A)
SWB 7
60,83 ROW#2 SWB#(B)

1
LED_AP_K SWC 8
R438 60,83 ROW#3 SWC#(Inet)
B 100K 1/16W 5% SWD 9
B
60,83 ROW#4 SWD#(Eml)
6

APPLIMODE(w/LED)

3
ENTER 10

2
60,83 ROW#5 SWE#(Enter)
2 Q31A Q31B
82 PMU_APPMODE EM6K1 EM6K1 MODE
5 11
1

60,83 ROW#0 SW_MODE


APPLIMODE(w/LED) APPLIMODE(w/LED)

4
LED_AUD_K 12
LED_CD_K

GND1
* LED_PWR_A 13
LED_POW_A
MAIN_SUSSW# 14
GND1 POW_SW
PWR_PMU $V01L09 15
46,47 SW_MODE0 SEC#
Added part

10K 1/16W 5%
PWR_3VSTD 0: Security Button 16
GND1

1
1: Application Button
C C

TESTPAD

TESTPAD

TESTPAD
TP126

TP127

TP128
SWiTCH4
1

R807
GND1 CA52237-8039
R439

2
330 1/16W 5%
APPLIMODE
None
2

47,52,82 LCDCL#_SW

2
LED_EMAIL_A Q111A
EM6K1

Q32
LED_EMAIL_K * MAIN_SUSSW# 1 6

DTC143TMT2L R441
3

APPLIMODE 2 1
57 DOCK_SUSSW# SUSSW# 30,47,83
1 1K 1/16W 5%

1
D 83 PMU_MAILLED C692 D
0.1uF 10V RK

2
None
2

Q111B on P82
GND1
GND1 TP129 TP130 TP131 TP132
TESTPAD TESTPAD TESTPAD TESTPAD

TP133 TP134 TP135


TESTPAD TESTPAD TESTPAD TP136
TESTPAD
TP200 TP139 TP140 TP141
#要実機調整 TESTPAD TESTPAD TESTPAD TP142
TESTPAD
CN27
E E
* 1 2 * 2
GREEN
1 * PWR_1540_VCC
82 PMU_SLCDS[0:8]
PMU_SLCDS8 1
S8
R728 LE1 DCIN-LED
150 1/16W 5% SML-412MWT86S PMU_SLCDS7 2
DCIN-LED S7
6

TP201 1608 GREEN Y2.65 PMU_SLCDS6 3


Q116A S6
2 EM6K1 PMU_SLCDS5 4
82 PMU_CHRGLED_G S5
DCIN-LED
* * *
1

1 2 2 1 PMU_SLCDS4 5
Orange S4
DCIN-LED

* Q116B
100K 1/16W 5%

R729 LE2 DCIN-LED PMU_SLCDS3 6


S3
1

EM6K1 510 1/16W 5% SML-512DWT86 $V01L02


DCIN-LED 1608 ORANGE Y3.7 PMU_SLCDS2 7
DCIN-LED S2
5 Added
parts PMU_SLCDS1 8
*
4

F S1 F
$V02L02
2
R817

82 PMU_SLCDC[0:2] PMU_SLCDS0 9
Deleted parts D62,D63 S0
3

PMU_SLCDC2 10
GND1 Q117B EM6K1 C2
GND1 5 DCIN-LED PMU_SLCDC1 11
C1
4

PMU_SLCDC0 12
* C0
6

ST-LCD
Q117A EM6K1 CA98010-7855
2 DCIN-LED
82 PMU_CHRGLED_R

*
1
100K 1/16W 5%

[CN - Switch/Status]
2

G G
DCIN-LED

GND1
R818

TITLE
GILIA Main Board Rev.03
Fujitsu
$V02L01
*
1

DRAW.
Added parts R817,R818 ※本ページ内で  印のある配線は0.15mm幅で配線すること。 NO. C1CP272450-X3 CUST.

Proprietary& Confidential GND1 REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 62 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile
$V02L03
Changed connections
C1022 AWS77
Changed part to pad 1 2 LAN_XTALIN 1 2
$V02L11 4pF 25V AD R1005-0.09
A A
Changed parts GND1

1
X9 M68
PWR_3VLAN 25M
CBL23-25M00000

Media Dependent
Xtal
15 17

Interface(PHY)
2
XTALI MDIP[0] TRD0+ 44
C1023 R746 0 1/16W 18
MDIN[0] TRD0- 44
0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
2 1 LAN_XTALOUT 2 1 14
XTALO
2

1
20 TRD1+ 44
4pF 25V AD MDIP[1]
21 TRD1- 44
MDIN[1]
C1005

C1006

C1007

C1008
C1024
1

2
2 1 0.1uF 10V RK 26 TRD2+ 44
23,43 PCIE_RXP1 MDIP[2]
49 27 TRD2- 44
TX_P MDIN[2]
2 1 50
23,43 PCIE_RXN1 C1025 TX_N
30 TRD3+ 44
MDIP[3]

PCI Express
GND1 0.1uF 10V RK 54 31
23,43 PCIE_TXP1 RX_P MDIN[3] TRD3- 44
53
B PWR_1.8VLAN
23,43 PCIE_TXN1 RX_N B

6,43 CLK_100_PELAN+ 55 38 LAN_EE_CLK


REFCLKP VPD_CLK
6,43 CLK_100_PELAN- 56 41 LAN_EE_DATA
REFCLKN VPD_DATA

EEPROM
0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

$V02L01
2

6 34
Changed connection 46,47 WAKE_LAN# WAKEn SPI_DO
35
SPI_DI
C1009

C1010

C1011

5 37
1

44 MRVL_RST# PERSTn/TSTPT SPI_CLK


36
SPI_CS

C1020 0.1uF 10V RK


GND1 2 1 None

PWR_3VLAN R747 11
C 4.99K 1/16W 0.5% SWITCH_VCC C
2 1 Analog(PHY)
PWR_1.2VLAN GND1 2 1 16 9 PWR_3VLAN
None R813 0 1/16W RSET SWITCH_VAUX

1K 1/16W 5%
LAN_DISABLE# 10 4 CTRL_1.8VLAN $V02L04
LOM_DISABLEn CTRL18

1
PWR_3VMAIN AWS78 3 CTRL_1.2VLAN
CTRL12 Added part
0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

1 2 47
VMAIN_AVLBL
1

12
VAUX_AVLBL $V02L11

R931
R1005-0.09
AWS79 Reserve -> Mount

TEST
C1012

C1013

C1014

C1015

C1016

PWR_3VLAN
2

2
$V02L05 2 1 46
TESTMODE LED_ACTn
59

LED
60 LAN_DISABLE#
Deleted part R797 R1005-0.09 LED_LINK10/100n
62
46 LAN_DISABLE#
LED_LINK1000n

1
Changed connection

R309 None

10K 1/16W 5%
PWR_3VSTD 63
GND1 GND1 LED_LINKn
1 2 8
AVDDH(3.3V)
D PWR_3VMAIN R810 0 1/16W PWR_1.8VLAN 19 D

2
PWR_1.2VLAN None AVDD_1
22
AVDD_2
2 1 23 24
None AVDD_3 NC_1
28 25
PWR_3VLAN R749 0 1/16W AVDD_4 NC_2
29
NC_3 GND1
0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

32
NC_4
2

POWER
2 1 PWR_3VLAN 1 42
VDDO_TTL_1 NC_5
40 43
AWS80 VDDO_TTL_2 NC_6
45 51
1

VDDO_TTL_3 NC_7

NC
C1017

C1018

C1019

AW Short (R1005) 61 52 Moved R931 and R309 from P44


VDDO_TTL_4 NC_8
$V02L03 NC_9
57
64
Changed parts to pads 2
NC_10
$V02L05 VDD_1
7
GND1 VDD_2
Changed connection 13
PWR_1.2VLAN VDD_3
33
VDD_4
E 39 E
VDD_5 PWR_3VLAN
44
VDD_6
48
VDD_7
$V02L08 58
PWR_3VLAN VDD_8
Changed part

1
4.7K 1/16W 5%

4.7K 1/16W 5%
65 PWR_3VLAN
VSS M72
C1026

R798

R799
2 1 1 2 88E8055 8
FL63 GND1 Vcc
$V02L10 CA46740-0067

2
BLM18PG181SN1 10uF 6.3V 2012 RM

0.1uF 10V RK
7
Decided part number WP

1
C1066
1 2 ※部品下メタルパッド(65pin)は4隅にそれぞれVIAを設けてGND1に接続すること。 A0
1
$V02L08

2
4.7K 1/16W 5%

C1067 0.1uF 10V RK LAN_EE_CLK 2


Changed part A1
2

PWR_3VLAN
GND1 3
F C1027 LAN_EE_DATA 6
A2 F
SCL
3

1 2 1 2
R750

FL64 5 4
1

Q120 BLM18PG181SN1 10uF 6.3V 2012 RM SDA Vss


CTRL_1.8VLAN 1
2SA1900QT100 $V03L01
1 2 M24C16-WDW6P
PWR_1.8VLAN Changed part GND1 CA46205-2043
2

C1028
4.7K 1/16W 5%

C1068 0.1uF 10V RK


2

1 2

10uF 6.3V 2012 RM GND1


$V02L11 GND1
Changed part
3
R751

GND1
1

CTRL_1.2VLAN 1 Q121
2SA1900QT100

G PWR_1.8VLAN PWR_2.5VLAN PWR_1.2VLAN [LAN-3(Marvel)] G


2

C1029
1 2 TITLE
GILIA Main Board Rev.03
Fujitsu
$V02L03 1 2
10uF 6.3V 2012 RM DRAW. CUST.
Changed part to pad AWS81 AW Short (R1608)
$V03L01 NO. C1CP272450-X3
Proprietary& Confidential Changed part GND1 REV. DATE DESIGN CHECK APPR. DESCRIPTION SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura FUJITSU LTD. 63 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile

A A
GND1

2
2 1 R443
12,23,29,30,34,36,42,44,45,50,51,83 PLT_RST#
10K 1/16W 5%
R1005-0.09 EXTVGA
AWS22
$V02L09

1
Changed parts

2
C694
100pF 25V AJ

1
None CLK_EXTVGA_IN 2 1

R444 EXTVGA

14.31818MHz(NDK)
C695
M44A

X7 EXTVGA
SDVO 15pF 25V AJ

1M 1/16W 5%
50 SDVOB_INT 2 1

1
C696 0.1uF 10V RK GND1 EXTVGA
2 1 SDVO
50 SDVOB_INT#
C697 0.1uF 10V RK AB3 V5
B RESET# SSC_CLKI
V4
B

2
SSC_CLKO

2
AG2 C699 EXTVGA
6 CLK_100_EXTVGA- REFCLKN
PEG_RXP1_C 1 2 EXTVGA AG3 T2 15pF 25V AJ
PEG_RXP1 13 6 CLK_100_EXTVGA+ REFCLKP XIN
C698 0.1uF 10V RK R2 CLK_EXTVGA_OUT 1 2
PEG_RXN1_C EXTVGA XOUT
1 2 PEG_RXN1 13
C700 0.1uF 10V RK

PEG_TXP0 AJ2 AF2 PEG_RXP0_C


13 PEG_TXP0 RP0 TP0
PEG_TXP1 AH3 AE3 PEG_RXP1_C GND1
13 PEG_TXP1 RP1 TP1
13 PEG_TXP2 PEG_TXP2 AJ5 AF5 PEG_RXP2_C
RP2 TP2
13 PEG_RXP0 2 1 EXTVGA PEG_RXP0_C 13 PEG_TXP3 PEG_TXP3 AH6 AE6 PEG_RXP3_C
C701 0.1uF 10V RK RP3 TP3 PEG_RXP4_C
13 PEG_TXP4 PEG_TXP4 AJ8 AF8
RP4 TP4
13 PEG_TXP5 PEG_TXP5 AH9 AE9 PEG_RXP5_C
RP5 TP5 PEG_RXP6_C
13 PEG_TXP6 PEG_TXP6 AJ11 AF11
C RP6 TP6 C
13 PEG_RXP2 2 1 EXTVGA PEG_RXP2_C 13 PEG_TXP7 PEG_TXP7 AH12 AE12 PEG_RXP7_C
C702 0.1uF 10V RK RP7 TP7
13 PEG_TXP8 PEG_TXP8 AJ14 AF14 PEG_RXP8_C
RP8 TP8
13 PEG_RXP3 2 1 EXTVGA PEG_RXP3_C 13 PEG_TXP9 PEG_TXP9 AH15 AE15 PEG_RXP9_C
C703 0.1uF 10V RK RP9 TP9 PEG_RXP10_C
13 PEG_TXP10 PEG_TXP10 AJ17 AF17
RP10 TP10
13 PEG_RXP4 2 1 EXTVGA PEG_RXP4_C 13 PEG_TXP11 PEG_TXP11 AH18 AE18 PEG_RXP11_C
C704 0.1uF 10V RK RP11 TP11
13 PEG_TXP12 PEG_TXP12 AJ20 AF20 PEG_RXP12_C
RP12 TP12
13 PEG_RXP5 2 1 EXTVGA PEG_RXP5_C 13 PEG_TXP13 PEG_TXP13 AH21 AE21 PEG_RXP13_C
C705 0.1uF 10V RK RP13 TP13 PEG_RXP14_C
13 PEG_TXP14 PEG_TXP14 AJ23 AF23
RP14 TP14
13 PEG_RXP6 2 1 EXTVGA PEG_RXP6_C 13 PEG_TXP15 PEG_TXP15 AH24 AE24 PEG_RXP15_C
C706 0.1uF 10V RK RP15 TP15

13 PEG_RXP7 2 1 EXTVGA PEG_RXP7_C


C707 0.1uF 10V RK PEG_TXN0 AJ3 AF3 PEG_RXN0_C
13 PEG_TXN0 RN0 TN0
13 PEG_RXP8 2 1 EXTVGA PEG_RXP8_C 13 PEG_TXN1 PEG_TXN1 AH4 AE4 PEG_RXN1_C
C708 0.1uF 10V RK PEG_TXN2 RN1 TN1
13 PEG_TXN2 AJ6 AF6 PEG_RXN2_C
RN2 TN2
13 PEG_RXP9 2 1 EXTVGA PEG_RXP9_C 13 PEG_TXN3
PEG_TXN3 AH7 AE7 PEG_RXN3_C
C709 0.1uF 10V RK PEG_TXN4 RN3 TN3
13 PEG_TXN4 AJ9 AF9 PEG_RXN4_C
RN4 TN4
D 13 PEG_RXP10 2 1 EXTVGA PEG_RXP10_C 13 PEG_TXN5
PEG_TXN5 AH10
RN5 TN5
AE10 PEG_RXN5_C D
C710 0.1uF 10V RK PEG_TXN6 AJ12 AF12 PEG_RXN6_C
13 PEG_TXN6 RN6 TN6
13 PEG_RXP11 2 1 EXTVGA PEG_RXP11_C 13 PEG_TXN7
PEG_TXN7 AH13 AE13 PEG_RXN7_C
C711 0.1uF 10V RK PWR_2.5VMAIN PEG_TXN8 RN7 TN7
13 PEG_TXN8 AJ15 AF15 PEG_RXN8_C
PEG_TXN9 RN8 TN8
13 PEG_RXP12 2 1 EXTVGA PEG_RXP12_C 13 PEG_TXN9 AH16 AE16 PEG_RXN9_C
C712 0.1uF 10V RK PEG_TXN10 RN9 TN9
13 PEG_TXN10 AJ18 AF18 PEG_RXN10_C
EXTVGA PEG_TXN11 RN10 TN10
13 PEG_RXP13 2 1 PEG_RXP13_C 13 PEG_TXN11 AH19 AE19 PEG_RXN11_C
RN11 TN11

EXTVGA

10K 1/16W 5%

EXTVGA

10K 1/16W 5%
C713 0.1uF 10V RK PEG_TXN12 AJ21 AF21 PEG_RXN12_C
13 PEG_TXN12 RN12 TN12
2 1 EXTVGA PEG_RXP14_C PEG_TXN13 AH22 AE22 PEG_RXN13_C
13 PEG_RXP14 13 PEG_TXN13 RN13 TN13

1
C714 0.1uF 10V RK PEG_TXN14 AJ24 AF24 PEG_RXN14_C
13 PEG_TXN14 RN14 TN14
13 PEG_RXP15 2 1 EXTVGA PEG_RXP15_C 13 PEG_TXN15
PEG_TXN15 AH25 AE25 PEG_RXN15_C
C715 0.1uF 10V RK RN15 TN15

R445

R446
2

2
P2 AB2
GPIO0 BIU_I2C_CLK
E 13 PEG_RXN0 2 1 EXTVGA PEG_RXN0_C P3 AA3 E
C716 0.1uF 10V RK GPIO1 BIU_I2C_DATA
PWR_2.5VMAIN Y5
FL52 PCIE_BIST_DONE
V2
PCIE_BIST_FAIL
13 PEG_RXN2 2 1 EXTVGA PEG_RXN2_C 2 1 K4 Y4
C717 0.1uF 10V RK N.C. PCIE_CONTOUT
K5 U3
N.C. PCIE_PARLPBK
13 PEG_RXN3 2 1 EXTVGA PEG_RXN3_C BLM18PG600SN1B U2
C718 0.1uF 10V RK EXTVGA C720 PCIE_PARRESET
W5
PCIE_TEST

1
13 PEG_RXN4 2 1 EXTVGA PEG_RXN4_C 0.1uF 10V RK
C719 0.1uF 10V RK EXTVGA V3
PCIE_OFFSET0
13 PEG_RXN5 2 1 EXTVGA PEG_RXN5_C T3 AA4

2
C721 0.1uF 10V RK BISTON PCIE_OFFSET1
R3 W2
DFT_ON PCIE_OFFSET2
13 PEG_RXN6 2 1 EXTVGA PEG_RXN6_C W3
C722 0.1uF 10V RK PCIE_OFFSET3
AA5
PCIE_OFFSET4
13 PEG_RXN7 2 1 EXTVGA PEG_RXN7_C GND1 GND1 Y2
C723 0.1uF 10V RK PCIE_OFFSET5
C8 Y3
EPCS PCIE_OFFSET6
13 PEG_RXN8 2 1 EXTVGA PEG_RXN8_C AA2
F C724 0.1uF 10V RK PCIE_OFFSET7 F
13 PEG_RXN9 2 1 EXTVGA PEG_RXN9_C
C725 0.1uF 10V RK
13 PEG_RXN10 2 1 EXTVGA PEG_RXN10_C
C726 0.1uF 10V RK GammaChromeXM18_GROSSO2
13 PEG_RXN11 2 1 EXTVGA PEG_RXN11_C EXTVGA
C727 0.1uF 10V RK
13 PEG_RXN12 2 1 EXTVGA PEG_RXN12_C
C728 0.1uF 10V RK
13 PEG_RXN13 2 1 EXTVGA PEG_RXN13_C
C729 0.1uF 10V RK
13 PEG_RXN14 2 1 EXTVGA PEG_RXN14_C
C730 0.1uF 10V RK
13 PEG_RXN15 2 1 EXTVGA PEG_RXN15_C
C731 0.1uF 10V RK

G [EXT-VGA-1] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 64 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

A A
PWR_2.5VMAIN

2 1 EXTVGA DSP1D0 $V02L09 PWR_3VMAIN


R447 10K 1/16W 5% RM60 EXTVGA
1 2 EXTVGA DSP1D1 Reserve -> Mount R448,R450,R451 2.2Kx4 1/16W 5%
R448 10K 1/16W 5% CRT_DDCCLK_EXT 1 8
2 1 EXTVGA DSP1D2
Mount -> Reserve R454 CRT_DDCDAT_EXT 2 7
R449 10K 1/16W 5% SPCLK2 3 6
1 2 EXTVGA DSP1D3 SPDAT2 4 5
R450 10K 1/16W 5% SMT8
2 1 EXTVGA DSP1D4
R451 10K 1/16W 5%
2 1 EXTVGA DSP1D5
R452 10K 1/16W 5%
2 1 EXTVGA DSP1D6 RM61 EXTVGA
B R453 10K 1/16W 5% 2.2Kx4 1/16W 5%
B
None 2 1 EXTVGA DSP1D7 SPCLK4 1 8
R454 10K 1/16W 5% SPDAT4 2 7
None 2 1 EXTVGA DSP1D8 SPCLK3 3 6
R455 10K 1/16W 5% SPDAT3 4 5
None M44B
2 1 EXTVGA DSP1D9 SMT8
R456 10K 1/16W 5%
None 1 2 EXTVGA DSP1D10
R457 10K 1/16W 5% B12
None DV1_CLKM
2 1 EXTVGA DSP1D11 B13 L2 CRT_RED_EXTVGA 54
GND1
R458 10K 1/16W 5% DV1_CLKP R1
J2 TV_S_Y 55,61
R2
2 1 EXTVGA DSP1DE DSP1D0 E13
R459 10K 1/16W 5% DV1_D0
DSP1D1 F13 L3 CRT_GREEN_EXTVGA 54
None DV1_D1 G1
2 1 EXTVGA DSP1HSYNC DSP1D2 B14 J3 TV_S_C 55,61
R460 10K 1/16W 5% DV1_D2 G2
DSP1D3 E14
None DV1_D3
2 1 EXTVGA DSP1VSYNC DSP1D4 B15 L4 CRT_BLUE_EXTVGA 54
PWR_VGAMEM
C R461 10K 1/16W 5% DV1_D4 B1 C
DSP1D5 C15 J4
None DV1_D5 B2
1 2 EXTVGA DSP2D0 DSP1D6 D15 R464 EXTVGA
R462 10K 1/16W 5% DV1_D6 1.5K 1/16W 0.5%
DSP1D7 E15 R4 CRT_HSYNC_EXT 37
None DV1_D7 HSYNC1
2 1 EXTVGA DSP2D1 DSP1D8 C14 T4 2 1 EXTVGA_MREF0
DV1_D8 HSYNC2

4.7uF 4V 1608

4.7uF 4V 1608
R463 10K 1/16W 5% DSP1D9 D13
DV1_D9

C732 EXTVGA

EXTVGA

EXTVGA
0.01uF 25V RK
4.7uF 4V 1608
None 2 EXTVGA

0.1uF 10V RK
1 DSP2D2 DSP1D10 F12 R5 CRT_VSYNC_EXT 37
DV1_D10 VSYNC1

EXTVGA

EXTVGA
R465 10K 1/16W 5% DSP1D11 E12 T5
DV1_D11 VSYNC2

2
None 2 1 EXTVGA DSP2D3
R466 10K 1/16W 5% DSP1DE C13
DV1_DE C5026はM44の直近に
None 1 2 EXTVGA DSP2D4 DSP1HSYNC D12 M2 EXTVGA R467 配置すること。
CRT_DDCCLK_EXT 37

1
R468 10K 1/16W 5% DV1_HSYNC SPCLK1 1.5K 1/16W 0.5%
DSP1VSYNC C12 M3 CRT_DDCDAT_EXT 37
DV1_VSYNC SPDAT1

C733

C734

C735

C736
None 1 2 EXTVGA DSP2D5 M4 SPCLK2

2
R469 10K 1/16W 5% SPCLK2
M5 SPDAT2
None SPDAT2
1 2 EXTVGA DSP2D6
R470 10K 1/16W 5% N2 SPCLK3
SPCLK3
2 1 EXTVGA DSP2D7 B10 N3 SPDAT3 GND1
DV2_CLKM SPDAT3
D R471 10K 1/16W 5% B11
DV2_CLKP SPCLK4
N4 SPCLK4 D
1 2 EXTVGA DSP2D8 N5 SPDAT4
R472 10K 1/16W 5% SPDAT4
DSP2D0 E9
None 2 DV2_D0
1 EXTVGA DSP2D9 DSP2D1 C11 PWR_VGAMEM PWR_VGAMEM
R473 10K 1/16W 5% DV2_D1 R475 143 1/16W 1%
DSP2D2 F9
DV2_D2
1 2 EXTVGA DSP2D10 DSP2D3 E10 L5 1 2 EXTVGA R478 EXTVGA R479 EXTVGA
R474 10K 1/16W 5% DV2_D3 RSET1 1.5K 1/16W 0.5% 1.5K 1/16W 0.5%
DSP2D4 F10 J5 1 2
None 1 DV2_D4 RSET2
2 EXTVGA DSP2D11 DSP2D5 D10 EXTVGA 1 2 EXTVGA_MREF1 1 2 EXTVGA_VREFDDR1
DV2_D5

4.7uF 4V 1608
R477 10K 1/16W 5% DSP2D6 C9 R476 143 1/16W 1%
DV2_D6

C737 EXTVGA

EXTVGA

EXTVGA
0.01uF 25V RK
4.7uF 4V 1608
None 2 1 EXTVGA DSP2DE GND1

0.1uF 10V RK

0.1uF 10V RK
DSP2D7 B9 F4 LVDS_LC- 55,58
DV2_D7 YTXCN

C738 EXTVGA

EXTVGA
R480 10K 1/16W 5% DSP2D8 D9 E4
DV2_D8 YTXCP LVDS_LC+ 55,58

1
DSP2D9 C10 D3 LVDS_L0- 55,58
DV2_D9 YTXN0
DSP2D10 E8 D2 LVDS_L0+ 55,58
DV2_D10 YTXP0 EXTVGA R481 EXTVGA R482
DSP2D11 F8 C3 LVDS_L1- 55,58

2
DV2_D11 YTXN1 1.5K 1/16W 0.5% 1.5K 1/16W 0.5%
C2 LVDS_L1+ 55,58
YTXP1

C739

C740

C741
DSP2DE B8 C4 LVDS_L2- 55,58

1
DV2_DE YTXN2
E F11 D4 LVDS_L2+ 55,58 E
DV2_HSYNC YTXP2
E11 B3
DV2_VSYNC YTXN3
YTXP3
B2 C5028はM44の直近に
GND1 配置すること。 GND1
R483 10K 1/16W 5%
2 1 EXTVGA W4 E3 LVDS_UC- 55,58
SUSPEND ZTXCN
E2 LVDS_UC+ 55,58
ZTXCP
F2 LVDS_U0- 55,58
ZTXN0
F3 LVDS_U0+ 55,58
GND1 ZTXP0
EXTVGA_VREFDDR1 M23 H4 LVDS_U1- 55,58
VREFDDR1 ZTXN1
G4 LVDS_U1+ 55,58
R484 EXTVGA ZTXP1
G2 LVDS_U2- 55,58
ZTXN2
1 2 F22 G3 LVDS_U2+ 55,58
RCOMP ZTXP2
H2
360 1/16W 5% ZTXN3
H3
GND1 ZTXP3
EXTVGA_MREF0 W23 R485 EXTVGA(XM25)
F EXTVGA_MREF1 F15
MVREF0
B4 5.11K 1/16W 0.5% PWR_AVCCLVDS F
MVREF1 YSW_REXT
H5 1 2
ZSW_REXT
U4 2 1
PWM0 R934 EXTVGA(XM18)
U5
PWM1 5.11K 1/16W 0.5%
P4 GND1
ENVDD EXTVGA_LCDEN 37
P5 EXTVGA_BLEN 46
ENVEE
$V02L03
Changed connection
GammaChromeXM18_GROSSO2
EXTVGA
$V02L05
Added part

G [EXT-VGA-2] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 65 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
$V01L10
Changed parts PWR_VGA1.0V PWR_3VMAIN Q35 PWR_3VVGA
PWR_VGACORE M44C SSM6J51TU
1
A16 Y11 4 2
220uF 2.5V(POSE/NEO) B21 VDDCORE PVDD

3300pF 50V 1608 RK


10uF 6.3V 2012 RM

10uF 6.3V 2012 RM


A A17 Y13 S D 5 A
VDDCORE PVDD
EXTVGA

C742 EXTVGA

C743 EXTVGA

R486 EXTVGA

C744 EXTVGA
470K 1/16W 5%
C750 10uF 6.3V 2012 RM

4.7uF 4V 1608
0.1uF 10V RK
A18 Y15 6
VDDCORE PVDD

2
EXTVGA
0.1uF 10V RK

0.1uF 10V RK
A19 Y17
VDDCORE PVDD

2
EXTVGA
A20 AB4 3
VDDCORE PVDD
1

1
G
A21 AB5
VDDCORE PVDD
2

EXTVGA

220 1/16W 5% 1608


+ B16 AC2 EXTVGA

1
VDDCORE PVDD

2
C745

EXTVGA

EXTVGA

R487 EXTVGA
B17 AC3

1
VDDCORE PVDD
B18 AC4
2

VDDCORE PVDD

C747

C748

C749
B19 AC5
C746 VDDCORE PVDD
B20 AD2
VDDCORE PVDD

47K 1/16W 5%
R488 EXTVGA
B21 AD3

1
VDDCORE PVDD
C16 AD4
VDDCORE PVDD
C17 AD7
VDDCORE PVDD

Digital[1.0V]
C18 AD11 GND1 PWR_VGA1.0V PWR_2.5VMAIN
VDDCORE PVDD
C19 AD16

1
VDDCORE PVDD

6
Core logic[1.35V]
C20 AD20 FL53 EXTVGA
VDDCORE PVDD

EXTVGA

10K 1/16W 5% 1608


GND1 C21 AE1 BLM18PG600SN1B Q36A
B VDDCORE PVDD B

2
D16 AE2 2 1 2 EM6K1
VDDCORE PVDD EXTVGA
D17 AF1

1
VDDCORE PVDD

0.01uF 25V RK
D18 AG5
VDDCORE PVDD

C751 EXTVGA

C752 EXTVGA
R490 EXTVGA

0.1uF 10V RK
PCI Express
D19 AG7
VDDCORE PVDD

R489
D20 AG11 0 1/16W 1608

1
VDDCORE PVDD

3
D21 AG16 PWR_VGA_RVDDA 1 2
VDDCORE PVDD Q36B
E16 AG20
VDDCORE PVDD

EXTVGA

C754 EXTVGA
0.01uF 25V RK
EM6K1

0.1uF 10V RK
E17 5

2
VDDCORE

=======1.1V
E18 EXTVGA

4
VDDCORE

EXTVGA

C755 EXTVGA
[1.0V]

10K 1/16W 5% 1608


GND1

0.1uF 10V RK
E19 AG8
VDDCORE PVDDA

2
Analog
E20 AG12
VDDCORE PVDDA

2
E21 AG15

2
VDDCORE PVDDA
F16 AG19
VDDCORE PVDDA

C753
F17 GND1 $V01L10 PWR_2.5VMAIN

1
VDDCORE

R491
F18 AH1

1
F19
VDDCORE RVDDA
AJ1 Changed part
C VDDCORE RVDDA C

==== 1.4V
F20
VDDCORE

10uF 6.3V 2012 RM


F21 GND1
VDDCORE

C756 EXTVGA
M11 PWR_VGA1.4V
M13
VDDCORE PWR_VGACORE: DDC
VDDCORE
PWR_VGAMEM: DDC

[1.5V]
M15 AD8
VDDCORE PVTT

1
M17 AD12
PWR_VGA1.0V: LDO

Term.
VDDCORE PVTT

0.01uF 25V RK

4.7uF 4V 1608
N10 AD15 GND1
VDDCORE PVTT

C757 EXTVGA

C758 EXTVGA
0.1uF 10V RK
N12 AD19 PWR_VGA1.4V: LDO

2
VDDCORE PVTT

EXTVGA
N14
VDDCORE

1
N16
VDDCORE Analog power[2.5V]
P11
VDDCORE
P13

2
VDDCORE
P15 Y1
VDDCORE AVDD25

C759
P17 AA1 GND1
VDDCORE AVDD25
R10
VDDCORE
R12 $V01L10
VDDCORE
D R14 D
R16
VDDCORE
AC1 Changed part
VDDCORE AVSS25 GND1 PWR_2.5VMAIN PWR_2.5VMAIN
T9 AD1
VDDCORE AVSS25
T11
VDDCORE GND1 R492
T13
PWR_2.5VMAIN VDDCORE
T15 A22 PWR_AVDD25M PWR_AVDD25M 1 2
VDDCORE AVDD25_M
T17 B22
VDDCORE AVDD25_M

0.01uF 25V RK

10uF 6.3V 2012 RM


4.7uF 4V 1608
U10 Analog power[2.5V]
VDDCORE

C760 EXTVGA

C761 EXTVGA

C763 EXTVGA
0.01uF 25V RK

4.7uF 4V 1608
0 1/16W

0.1uF 10V RK
U12
VDDCORE

C764 EXTVGA

C765 EXTVGA

EXTVGA
EXTVGA

0.1uF 10V RK
U14 C22
VDDCORE AVSS25_M

1
C767 EXTVGA

C768 EXTVGA

EXTVGA
0.1uF 10V RK

0.1uF 10V RK

U16 D22
VDDCORE AVSS25_M

1
V9
VDDCORE
1

V11 GND1

2
VDDCORE Analog power[2.5V]
V13

2
VDDCORE

C762
V15 K2
2

VDDCORE A2VDDDAC1

C766
V17 K3 1 2
VDDCORE A2VDDDAC2

C769 EXTVGA
0.1uF 10V RK
E W10 E
VDDCORE FL54 EXTVGA
W12
VDDCORE

2
W14 BLM18PG600SN1B GND1
GND1 VDDCORE GND1
W16 M1
VDDCORE A1GNDDAC1 GND1
N1 1
A1GNDDAC2
J1
A2GNDDAC1
K1
Power for DVI[2.5V] A7 A2GNDDAC2 PWR_AVCCLVDS PWR_2.5VMAIN
PWR_2.5VMAIN VDDDV
B7
VDDDV GND1 R493 0 1/16W
C7
VDDDV PWR_3VVGA
D7 F5 PWR_AVCCLVDS PWR_AVCCLVDS 1 2
Power for PLL[2.5V] VDDDV ZYAVDD EXTVGA
No description about M9/P9 pin E7
VDDDV
1

on reference schematics. F7 G5
VDDDV ZYAGND PWR_2.5VMAIN C770
M9
VDDDV
2

0 1/16W
EXTVGA C771 P9 E5 0.1uF 10V RK
2

0.1uF 10V RK VDDDV ZYDVDD EXTVGA

None EXTVGA
PWR_2.5VMAIN D5
1

F ZYDGND F
2

1
E22 C772 EXTVGA
DVDD25 0.1uF 10V RK GND1
R1
DVDD25
4.7uF 4V 1608

U1
1

DVDD25

R494
C774 EXTVGA

GND1
0.1uF 10V RK

V1 D1
DVDD25 ZYTVDD1
EXTVGA

Y9 B1

2
DVDD25 ZYTVDD2
2

A1
LVDS PLL power[2.5V] ZYTVDD3 GND1
PWR_AVCCLVDS C5 F1
1

PLLVDD1 ZYTGND1
4.7uF 6.3V 1608 RK

G1
ZYTGND2
C773

C775 EXTVGA

C777 EXTVGA
0.1uF 10V RK

B5 A3
PLLGND1 ZYTGND3
C776 EXTVGA

LVDS Digital power[3.3V]


0.1uF 10V RK

A4
ZYTGND4
1

GND1
2

GammaChromeXM18_GROSSO2

[EXT-VGA-3]
2

EXTVGA
G G
GND1
TITLE
GILIA Main Board Rev.03
Fujitsu GND1 DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 66 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

PWR_VGAMEM PWR_VGAMEM
A M44D M44E A
M44F

L10 B26 A5 K26 AB29 AF34


VDDMEM VDDQ VSS VSS VSS VSS

220uF 2.5V(POSE/NEO) B21


L12 B28 A6 K28 AB30 AG1
VDDMEM VDDQ VSS VSS VSS VSS

EXTVGA

C779 10uF 6.3V 2012 RM


L14 B30 A9 K30 AB31 AG4
VDDMEM VDDQ VSS VSS VSS VSS
L16 B32 A11 K33 AB32 AG6
VDDMEM VDDQ VSS VSS VSS VSS
L18 B34 A13 L9 AB34 AG9
VDDMEM VDDQ VSS VSS VSS VSS
1

4
3
2
1
N18 C23 A15 L11 AC23 AG10
VDDMEM VDDQ VSS VSS VSS VSS

EXTVGA
+ CM3 N23 C25 A23 L13 AC24 AG13
VDDMEM VDDQ VSS VSS VSS VSS
C778

0.1uFx4 16V 2012 BM N24 C26 A25 L15 AC25 AG14


EXTVGA VDDMEM VDDQ VSS VSS VSS VSS
N25 C28 A27 L17 AC26 AG17
2

5
6
7
8
VDDMEM VDDQ VSS VSS VSS VSS
N26 C30 A29 L24 AC27 AG18
VDDMEM VDDQ VSS VSS VSS VSS
N27 C32 A31 L26 AC28 AG21
VDDMEM VDDQ VSS VSS VSS VSS
N28 C33 A33 L28 AC29 AG22
VDDMEM VDDQ VSS VSS VSS VSS
N29 D23 B6 L30 AC30 AG23
VDDMEM VDDQ VSS VSS VSS VSS
N30 D25 B23 L32 AC31 AG24
B VDDMEM VDDQ VSS VSS VSS VSS B

=======1.8V
N31 D33 B25 L34 AC33 AG25
VDDMEM VDDQ VSS VSS VSS VSS
N32 E24 B27 M10 AD5 AG26
GND1 VDDMEM VDDQ VSS VSS VSS VSS
N33 E32 B29 M12 AD6 AG27
VDDMEM VDDQ VSS VSS VSS VSS
N34 E34 B31 M14 AD9 AG28
VDDMEM VDDQ VSS VSS VSS VSS

VRAM[2.5V]
P23 F24 B33 M16 AD10 AG29
VDDMEM VDDQ VSS VSS VSS VSS
P24 F32 C6 M18 AD13 AG30
VDDMEM VDDQ VSS VSS VSS VSS
P25 F34 C24 M24 AD14 AG31
VDDMEM VDDQ VSS VSS VSS VSS
P26 G23 C27 M26 AD17 AG33
VDDMEM VDDQ VSS VSS VSS VSS
P27 G25 C29 M28 AD18 AH2
VDDMEM VDDQ VSS VSS VSS VSS
P28 G33 C31 M30 AD21 AH5
VDDMEM VDDQ VSS VSS VSS VSS
P29 H23 C34 M32 AD22 AH8
VDDMEM VDDQ VSS VSS VSS VSS
P30 H25 D6 M34 AD23 AH11
VDDMEM VDDQ VSS VSS VSS VSS
P31 H33 D8 N9 AD24 AH14
VDDMEM VDDQ VSS VSS VSS VSS
P32 J24 D11 N11 AD25 AH17
VDDMEM VDDQ VSS VSS VSS VSS
P33 J32 D14 N13 AD26 AH20
VDDMEM VDDQ VSS VSS VSS VSS
P34 J34 D24 N15 AD27 AH23
C VDDMEM VDDQ VSS VSS VSS VSS C
R18 K24 D26 N17 AD28 AH26
VDDMEM VDDQ VSS VSS VSS VSS
R23 K25 D27 P10 AD29 AH27
VDDMEM VDDQ VSS VSS VSS VSS
R24 K27 D28 P12 AD30 AH28
VDDMEM VDDQ VSS VSS VSS VSS
R25 K29 D29 P14 AD31 AH30
VDDMEM VDDQ VSS VSS VSS VSS
R26 K31 D30 P16 AD33 AH33
VDDMEM VDDQ VSS VSS VSS VSS
R27 K32 D31 P18 AE5 AJ4
VDDMEM VDDQ VSS VSS VSS VSS
R28 K34 D32 R9 AE8 AJ7
VDDMEM VDDQ VSS VSS VSS VSS
R29 L23 D34 R11 AE11 AJ10
VDDMEM VDDQ VSS VSS VSS VSS
R30 L25 E6 R13 AE14 AJ13
VDDMEM VDDQ VSS VSS VSS VSS
R31 L27 E23 R15 AE17 AJ16
VDDMEM VDDQ VSS VSS VSS VSS
R32 L29 E25 R17 AE20 AJ19
VDDMEM VDDQ VSS VSS VSS VSS
R33 L31 E26 T10 AE23 AJ22
VDDMEM VDDQ VSS VSS VSS VSS
R34 L33 E27 T12 AE26 AJ25
VDDMEM VDDQ VSS VSS VSS VSS
T23 M25 E28 T14 AE27 AJ26
VDDMEM VDDQ VSS VSS VSS VSS
T24 M27 E29 T16 AE28 AJ28
VDDMEM VDDQ VSS VSS VSS VSS
T25 M29 E30 T18 AE29 AJ30
VDDMEM VDDQ VSS VSS VSS VSS
D T26
VDDMEM VDDQ
M31 E31
VSS VSS
U9 AE30
VSS VSS
AJ32 D
T27 M33 E33 U11 AE31 AJ34
VDDMEM VDDQ VSS VSS VSS VSS
T28 W24 F6 U13 AE32 AK1
VDDMEM VDDQ VSS VSS VSS VSS
T29 W26 F14 U15 AE34 AK3
VDDMEM VDDQ VSS VSS VSS VSS
T30 W28 F23 U17 AF4 AK5
VDDMEM VDDQ VSS VSS VSS VSS
T31 W30 F25 V10 AF7 AK7
VDDMEM VDDQ VSS VSS VSS VSS
T32 W32 F26 V12 AF10 AK9
VDDMEM VDDQ VSS VSS VSS VSS
T33 W34 F27 V14 AF13 AK11
VDDMEM VDDQ VSS VSS VSS VSS
T34 Y24 F28 V16 AF16 AK13
VDDMEM VDDQ VSS VSS VSS VSS
U18 Y26 F29 V18 AF19 AK15
VDDMEM VDDQ VSS VSS VSS VSS
U23 Y28 F30 W9 AF22 AK17
VDDMEM VDDQ VSS VSS VSS VSS
U24 Y30 F31 W11 AF25 AK19
VDDMEM VDDQ VSS VSS VSS VSS
U25 Y32 F33 W13 AF26 AK21
VDDMEM VDDQ VSS VSS VSS VSS
U26 Y34 G24 W15 AF27 AK23
VDDMEM VDDQ VSS VSS VSS VSS
U27 AA23 G26 W17 AF28 AK25
VDDMEM VDDQ VSS VSS VSS VSS
U28 AA25 G27 W25 AF29 AK28
VDDMEM VDDQ VSS VSS VSS VSS
E U29 AA26 G28 W27 AF30 AK30 E
VDDMEM VDDQ VSS VSS VSS VSS
U30 AA28 G29 W29 AF31 AK32
VDDMEM VDDQ VSS VSS VSS VSS
U31 AA30 G30 W31 AF32 AK34
VDDMEM VDDQ VSS VSS VSS VSS
U32 AA32 G31 W33
VDDMEM VDDQ VSS VSS
U33 AA33 G32 Y10
VDDMEM VDDQ VSS VSS GammaChromeXM18_GROSSO2
U34 AB23 G34 Y12
VDDMEM VDDQ VSS VSS EXTVGA
V23 AB25 H24 Y14
VDDMEM VDDQ VSS VSS
V24 AB33 H26 Y16
VDDMEM VDDQ VSS VSS GND1 GND1
V25 AC32 H27 Y18
VDDMEM VDDQ VSS VSS
V26 AC34 H28 Y23
VDDMEM VDDQ VSS VSS
V27 AD32 H29 Y25
VDDMEM VDDQ VSS VSS
V28 AD34 H30 Y27
VDDMEM VDDQ VSS VSS
V29 AE33 H31 Y29
VDDMEM VDDQ VSS VSS
V30 AF33 H32 Y31
VDDMEM VDDQ VSS VSS
V31 AG32 H34 Y33
VDDMEM VDDQ VSS VSS
V32 AG34 J23 AA24
VDDMEM VDDQ VSS VSS
V33 AH29 J25 AA27
F V34
VDDMEM VDDQ
AH31 J26
VSS VSS
AA29 F
VDDMEM VDDQ VSS VSS
W18 AH32 J27 AA31
VDDMEM VDDQ VSS VSS
AH34 J28 AA34
VDDQ VSS VSS
AJ27 J29 AB24
VDDQ VSS VSS
A24 AJ29 J30 AB26
VDDQ VDDQ VSS VSS
A26 AJ31 J31 AB27
VDDQ VDDQ VSS VSS
A28 AJ33 J33 AB28
VDDQ VDDQ VSS VSS
A30 AK27 K23
VDDQ VDDQ VSS
A32 AK29
VDDQ VDDQ
A34 AK31
VDDQ VDDQ GammaChromeXM18_GROSSO2
B24 AK33
VDDQ VDDQ EXTVGA
GND1 GND1
GammaChromeXM18_GROSSO2
EXTVGA

G [EXT-VGA-4] G
TITLE
GILIA Main Board Rev.03
Fujitsu DRAW.
NO. C1CP272450-X3 CUST.

Proprietary& Confidential REV. DATE DESIGN CHECK APPR. DESCRIPTION


FUJITSU LTD. SHEET
DATE 2006.01.26 DESIGN Seki CHECK Yamada APPR. Miura 67 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
#見直し予定

A A

PWR_3VSUS

100K 1/16W 5%
1
PWR_PMU

R495
100K 1/16W 5%
1

2
R496
23,42,44,46,80 SUSB# COREON 71

6
B B

2
Q37A
PWR_1.05VMAIN 2 EM6K1

1
3
10K 1/16W 5%
Q37B

1
5 EM6K1

4
R497
$V02L09
COREON#

2
Changed part

3
100K 1/16W 5%
1 Q38

1uF 10V 1608 RK


2SC4617TL
2

2
2
C C
R498

C780
1
1

PWR_PMU

2
10 1/16W 5%
120K 1/16W 5%
1

GND1
R684

R499

1
2

D Q39 D
1 2SK3541
2
3

Q119
23,42,44,46,80 SUSB# VTTPWRGD# 5
1 2SK3541 GND1
23,42,44,46,80 SUSB#
2

3
PWR_1.05VMAIN Q41
SUSB 88
1 2SK3541

2
10K 1/16W 5%
1
GND1

R503
$V02L09
E Changed part E

3
2.2uF 10V 2012 RK
100K 1/16W 5%
1

2
Q43

2
1
2SC4617TL

C782
R506

2
1

2
10 1/16W 5%
F F
GND1

R508

1 3
Q45
COREON# 1 2SK3541

2
GND1
G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
POWER_SEQUENCE/DISCHARGE REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK Yamada
DESCRIPTION
APPR. Miura
NO. C1CP272450-X3
FUJITSU LTD. SHEET
68 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

A A

Gilia Power Supply


B

Caution Power Contents


Temporary B

Contents Page# Contents Page#


See "design guide for power circuit" Keep design rule.
TopPage 69 Node DCIn,Battery 78

C Features Delivery
DDC CPUCore1
70
71
PWR_1
Switch1
79
80 C

1/ Voltage Regulator for Mobile Yonah Processor (IMVP6) CPUCore2 72 PMU LUNA1 (PMU part) 82
2/ Calistoga Chipset (CoreVoltage=1.05V only) 1.05V/1.8V 73 LUNA2 (KBC part) 83
3/ DDR2 533MHzSODIMM(Vddq=1.8V only) 3.3V/5V 74 Etc0 (Common) 84
4/ Internal VGA or ExVGA:S3 Gamma Chrome Charger 75 Etc1 (Battery1) 85
5/ Quick Charging Power Supply (Target: 2.5hours) Etc2 (Battery2) 86
LDO System 76
6/ 19V AC Adaptor
PMU 77 VGA VGACore 88
7/ A circuit reducing a rush current from AC adaptor
D VGAMem 89 D
8/ Internal Battery with 3 Seirial cells and Digital Interface
VGA 90
9/ Bay Battery with 3 Seirial cells and Analog Interface
10/ Common PortReplicator 2 support

Voltage Regulator Spec.


DDC CPUCore TBD 33Atyp / 44Apeak
E 1.05VMain 1.050V +/-5% (0.998V-1.102V) 5Atyp / 6Apeak E

1.8VSus 1.800V +/-5% (1.710V-1.890V) 6Atyp / 8Apeak


3.3VStd 3.300V +/-5% (3.135V-3.465V) 6Atyp / 8Apeak
5VSus 5.000V +/-5% (4.750V-5.250V) 6Atyp / 8Apeak
Charger CV 3-serial 12.60V +/-1.2% (12.45V-12.75V) CC 3.0A

LDO DimmVtt 0.900V +/-100mV (0.800-1.000V) +-0.25Atyp / +-1Apeak


F 1.5VMain 1.500V +/-5% (1.425V-1.575V) 2.3A F

2.5VMain 2.500V +/-5% (2.375V-2.625V) 0.5A


3VATVBG 3.300V +/-5% (3.135V-3.465V) 0.10A
PMU 3.300V +/-2% (3.234V-3.366V) 30mA

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
Power/ TopPage REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK Yamada
DESCRIPTION
APPR. Miura
NO. C1CP272450-X3
FUJITSU LTD. SHEET
69 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
DDC ; DC to DC Convertor

A
Power Delivery 2005/12/13 CONREON
DDC 0V-1.70V ADP3207+ADP3419(2phase)
CPUCore
CPU A

Temporary
6.0A 30A

Dly_SusB# 1.05VMain
1.0A DDC 1.05V 6.0A CPU, GMCH, ICH

MAX1540
SusC#
1.8VSus
2.0A DDC 1.8V 6.0A 5.0A GMCH, DIMM CN*2, PLL
SusB# DIMM_VTT
B
PR CN 5A 1.0A LDO 0.9V BD3534FVM 1.0A DIMM CN*2 B

SusB# 1.5VMain
INTDCIn 3.0A DDC 1.5V BD3504FVM 3.0A CPU, GMCH, ICH, PCIESW, MiniCard
DCIn
DCIn CN 5A 5A Switch 5A DDC 5A Diode 5A SusB# 1.8VMAIN
MAX8724 1.5A Switch SSM6J51TU 1.0A SATA-PATA
PowerOn 3VStd
MainChg
Pwr_1 2.5A DDC 3.3V 6.0A 1.0A ICH, LAN, PCICSW, MiniCard
8A SusC# 3VSus
C PLL, PCIC, SD/MS, MiniCard, MDC, C
1.0A Switch TPCF8101 1.0A TMP
3.0A

Switch
3.0A

LCDEn 3VLCD
0.85A Switch SSM6J51TU 0.85A LCD CN
Batt1 Dly_SusB# 3VMain
Battery1 CN 8A 8A Diode GMCH, ICH, FWH, PCIC, Codec, S-I/O,
8A
1.3A Switch TCPF8101 1.0A LAN, MiniCard, TMDS, HDD
MAX1533
Batt2 Charge2 Always 2.5VMAIN
Battery2 CN AmMeter Diode
8A 8A 8A 8A
0.5A LDO 2.5V MAX1589 0.5A GMCH, TMDS
D BD3180 D

SusB# VGACore
1.0A DDC 0.9V MAX1953 3.0A VGA_CORE
VGA_On VGAMem
1.0A DDC 1.8V MAX1842 3.0A VGA_MEMORY

3VSus VGA_On VGA1.0V


E 1.0A LDO 1.0V BD3506F 1.0A VGA_1.0V E

VGA_On VGA1.4V
0.5A LDO 1.4V MAX1806 0.5A VGA_1.4V

SusC# 5VSus
4.0A DDC 5.0V 6.0A 2.5A PCIC SW, USB SW
DLY_SusB# 5VMain
1.5A Switch BD6522F 1.5A Fan, Audio, HDD, Pointing, CRT
Bay1On Bay1
F F
2.0A Switch TPCF8101 2.0A BAY CN

Always PMU
0.05A LDO 3.3VLP2951CSD 0.05A PMU, BENN

0.8A LCD CN

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
Power/ Delivery REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK Yamada
DESCRIPTION
APPR. Miura
NO. C1CP272450-X3
FUJITSU LTD. SHEET
70 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

$V03L03
A A
Changed part to pad

PWR_3207_VCC

7.5K 1/16W 0.5%

7.5K 1/16W 0.5%


2

2
1M 1/16W 5%
Temparature Limit :
PWR_5VSUS Target -> 95C

R509

R510

R511

None
R512
7 PSI#

1
1 2 1 2 AWS90
7,10,22 CPU_DPRSTP#

10uF 6.3V 2012 RM


R513

1uF 10V 1608 FZ


B 8 VID6 1 2 B
PWR_3207_TSTH1 72

None
PWR_3207_VCC
0 1/16W 10 1/16W 5%
8 VID5

0.01uF 25V RK
R1005-0.09
8 VID4

1
8 VID3

2
R514None 1 2
8 VID2 PWR_3207_TSTH2 72

C783

C784
2 1 8 VID1

C785
R832 0 1/16W
8 VID0

1
1K 1/16W 5% None
68 COREON 2 1
R1005 AWS62 2005.12.13
GND1 GND_S3207 GND_S3207
72 CPUCOREON
2005.12.13 Change Parts:R511 Mount -> None

40

39

38

37

36

35

34

33

32

31
M45
Add NET:CPUCOREON
46 PWRGD Del Parts:D16,D17

PSI#

VCC
VID0

VID1

VID2

VID3

VID4

VID5

VID6

DPRSTP#
Add Parts:R831,R832

C 1 30 PWR_3207_TTSENSE C
EN TTSENSE
2 29
PWRGD VRTT VRTT 7
GND_S3207 1 2 GND_S3207 1 2 3 28
C786 C787 PGDELAY DCM# PWR_3207_DCM# 72
1000pF 25V RK 4700pF 25V RK 4 27
CLKEN# OD# PWR_3207_OD# 72

8 CPU_VSSSENSE 1 2 5 26
R515 FBRTN PWM1 PWR_3207_PWM1 72

8 CPU_VCCSENSE 1 2 0 1/16W 6
FB
ADP3207 PWM2
25
PWR_3207_PWM2 72

27pF 25V AJ
R516
2.2K 1/16W 0.5% 2 7
COMP PWM3
24 PWR_3207_VCC
C788
8 23
1

SS SW1 PWR_3207_SW1 72

1000pF 25V RK

680pF 25V RK
D 1 2 2 1 2 1 9 22 PWR_3207_SW2 72 D
C789 C790 R517 STSET SW2
2

2
2005.12.13 330pF 50V RK 220pF 50V RK 27K 1/16W 0.5% 10 21
DPRSLP SW3

RAMPADJ

CSCOMP
C791

C792
Change Parts:R516:4.3K 1/16W 0.5% -> 2.2K 1/16W 0.5%

CSSUM
CSREF
1

LLSET
RPRM
VPRM
ILIMIT
41

GND
GND_S3207 HeatSink

RT
1 2 PWR_3207_SW1 72
ADP3207 R518

11

12

13

14

15

16

17

18

19

20
CA46710-0069 120K 1/16W 0.5%
26 DPRSLPVR 1 2 1 2 PWR_3207_SW2 72
R519 R520

86.6K 1/16W 0.5%


#P26にR160あり。切り離しはそこで。

240K 1/16W 0.5%

240K 1/16W 0.5%


150K 1/16W 0.5% GND_S3207 120K 1/16W 0.5%

62K 1/16W 0.5%


1 2 2 1
PWR_3207_CSTHA 72

2200pF 25V RK
AWS30

330pF 50V RK
C793 R521

2
1000pF 25V RK 130K 1/16W 0.5%

R1005
PWR_3207_CSTHB 72

2
GND_S3207 1 2
E E
C794
2

C795

C796

None

R522
100pF 25V AJ

1
None

1
R523

R524

R525
1

1
TP143 VID0
2005.12.13 2005.12.13 Add TP224-227
TP145 VID1
i j 1 2
Change Parts:
C795:1500pF 25V RK -> 2200pF 25V RK
TP147 VID2
C797
GND_S3207 GND1 GND_P3207 1000pF 25V RK PWR_1 C796:330pF 50V RK -> None TP224 PSI# TP144 VID3
GND_S3207 1 2
C798 R518:150K 1/16W 0.5% -> 120K 1/16W 0.5% TP225 CPU_DPRSTP# TP146 VID4
1000pF 25V RK PWR_CPUCORE R520:150K 1/16W 0.5% -> 120K 1/16W 0.5%
F TP226 DPRSLPVR TP148 VID5 F

TP227 CPUCOREON TP181 VID6

$V01L13
Changed parts

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
Power/ DDC/ CPUCore 1 REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK Yamada
DESCRIPTION
APPR. Miura
NO. C1CP272450-X3
FUJITSU LTD. SHEET
71 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile

A A

71 PWR_3207_CSTHA PWR_3207_CSTHB 71
D18
RB521S-30 PWR_1

10uF 25V 3225 RK

10uF 25V 3225 RK


PWR_5VSUS 2 1 PWR_3207_BST1

uPA2702TP

uPA2702TP
0.47uF 10V 1608 RK
1

5
10 1/16W 5%
B B

Sink
Heat

Sink
Heat
2005.12.13

D
Q46

Q47
2
R526

C799

C800

G
Change NET:CPUCOREON

S
1

1
M46 ADP3419

C801
71 PWR_3207_PWM1 1 10 2 1 TH1

3
2
1

3
2
1
IN BST NTC 220K 1005
2 9 PWR_3207_GH1 GND_P3207 L11
71 CPUCOREON SD# DRVH ETQP4LR36WFC
71 PWR_3207_DCM# 3 8 1 2
DRVLSD# SW

uPA2708TP

uPA2708TP
71 PWR_3207_SW1

NTC 100K 1005


4 7
CROWBAR GND

1
RB151L-40
Sink
Heat

Sink
Heat
2.2uF 10V 2012 RK

D
Q48

Q49
PWR_5VSUS 5 6 PWR_3207_GL1
VCC DRVL

G
S

S
1

D19
ADP3419
C802

TH2
2

3
2
1

3
2
1

2
C C
2

GND_P3207
GND_P3207
71 PWR_3207_TSTH1

D20
RB521S-30 PWR_1 0.7625-1.288/25A typ

10uF 25V 3225 RK

10uF 25V 3225 RK


2 1 PWR_3207_BST2
PWR_5VSUS 35Apeak

uPA2702TP

uPA2702TP
0.47uF 10V 1608 RK
1

5
10 1/16W 5%

Sink
Heat

Sink
Heat
D

D
Q50

Q51
2
R527

C803

C804

G
S

S
1

1
D M47 ADP3419 D
2

C805

71 PWR_3207_PWM2 1 10
1

3
2
1

3
2
1
IN BST TP149
2 9 PWR_3207_GH2 GND_P3207 L12 PWR_CPUCORE
71 PWR_3207_OD# SD# DRVH ETQP4LR36WFC
PWR_5VSUS 3 8 2 1
DRVLSD# SW

uPA2708TP

uPA2708TP
71 PWR_3207_SW2

330uF 2.5V(TPE)

330uF 2.5V(TPE)

330uF 2.5V(TPE)

330uF 2.5V(TPE)

330uF 2.5V(TPE)
NTC 100K 1005
4 7
CROWBAR GND

1
RB151L-40
Sink
Heat

Sink
Heat
2.2uF 10V 2012 RK

1
Q52

Q53
PWR_5VSUS 5 6 PWR_3207_GL2
VCC DRVL

None
G

G
+ + + + +

S
1

D21
ADP3419
C811

TH3
2

3
2
1

3
2
1

2
C806

C807

C808

C809

C810
2

GND_P3207
$V03L04
E
GND_P3207 Mount -> Reserve E
GND1
71 PWR_3207_TSTH2

B D

F F

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
Power/ DDC/ CPUCore2 REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK Yamada
DESCRIPTION
APPR. Miura
NO. C1CP272450-X3
FUJITSU LTD. SHEET
72 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

A
PWR_1540_VCC PWR_1533_LDO5
1.05V / 6A A

2
TP150

None
0 1/16W
PWR_1 PWR_1.05VMAIN
PWR_1
A1

R528
PWR_1540_VCC L13
Q54 MPLC1040L3R3
8 1 1 2

1
0.1uF 25V 1608 FZ
7 D S 2

10uF 25V 3225 RK


R529 6 3

330uF 2.5V(TPE)
RB521S-30

10uF 10V 3216 FZ


PWR_1540_VCC 1 2 5

C812
1uF 10V 1608 RK

10uF 6.3V 2012 RM


4

1
G

C813
D22
20 1/16W 5%

1
2

1
uPA2702GR +

C814
B
MAX1540ETJ+ M48 B

2
C816

10K 1/16W 0.5%


R530 C818

2
C815

C817
19 20 1 2 2 1
V+ LDOOUT

2
0.1uF 10V RK
GND_S1540 AWS31 GND_P1540 2.7K 1/16W 0.5% 0.1uF 10V RK

5
6
7
8

R531
Q55 uPA2702GR
5 23 2 1 GND_S1540
VCC BST1

1
C819

RB151L-40TE25 D23
GND_S1540 R1005

D
2

1
G
25

S
74,76,80,83,89 DLY_SUSB# 1 2
AWS32
32
ON1
DH1
GND1 B1
R1005
d1

3
2
1

2.7K 1/16W 0.5%


23,44,46,74,80,83 SUSC# 1 2 31 24 PWR_1540_SW1
ON2 LX1

1
R1005 AWS33 PWR_1
2 1

20K 1/16W 0.5%


R1005 AWS34 21 C820
DL1

1
R532
2 1
2 1 22
d2

2
LDOON

R534
C 30 4700pF 25V RK C
R533 0 1/16W CSP1 None GND_P1540
None
f1 f1

2
PWR_1540_REF2 2 1 4 29
GND_S1540 TON CSN1
R535の未実装枠追加 R535 0 1/16W
None 27
OUT1 GND_S1540
1 2 2
SKIP#
R1005 AWS35
28

PWR_1540_REF2 1
FB1
1.8V / 6A TP151
GND_S1540 OVP/UVP

RB521S-30
PWR_1 L14 PWR_1.8VSUS
Q56 MPLC1040L3R3
A2

D24
PWR_1540_REF2 8
REF
MAX1540 8 1 1 2

10uF 25V 3225 RK


D 7 D S 2 D

1
150K 1/16W 0.5%

150K 1/16W 0.5%

6 3

1
2

C821
4

2
G
R536

R537

330uF 2.5V(TPE)

10uF 6.3V 2012 RM


0.1uF 10V RK

5
6
7
8

1
Q57 uPA2702GR

18K 1/16W 0.5%


AWS36 uPA2702GR

1
RB151L-40TE25 D25
16 1 2 +

D
1

BST2

C823
R1005 GND_P1540

R538
G
6 C825

S
R539

2
ILIM1

C822

C824
14 2 1 1 2
DH2
7
d3

3
2
1

1
ILIM2
470pF 25V RK

470pF 25V RK
130K 1/16W 0.5%

130K 1/16W 0.5%

PWR_1540_VCC 2.7K 1/16W 0.5% 0.1uF 10V RK

2.7K 1/16W 0.5%


2
15 PWR_1540_SW2
LX2
0.22uF 10V 1608 RK

R541 100K 1/16W 5%


1 2 None 26
PGOOD1
d4
1

R540
18 C826
DL2
B2
1

2 131 1 2

1
E PGOOD2 E
1

11K 1/16W 0.5%


None GND1

1
R544 100K 1/16W 5% 4700pF 25V RK
C827

C828

9
2

CSP2
C829

0 1/16W

3 None GND_P1540
2

LSAT
2
R542

R543

R545
CSN2
10
f2 f2

2
None

12 $V03L04
1

OUT22
R546

17 Changed parts
GND GND_S1540
11
FB2

C GND_S1540 FG
33

F CA46710-0061 i j F
GND1
GND_S1540 GND1 GND_P1540

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
NO. C1CP272450-X3
Power/ DDC/ 1.05VMain, 1.8VSus
1 2 3 4 5 6
REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK
7
Yamada
DESCRIPTION
APPR. Miura
8
FUJITSU LTD. SHEET
73
9
91
1 2 3 4 5 6 7 8 9
Nile
$V01L15
Reserve -> Mount

0.22uF 25V 1608 FZ


Frequency Select: FSEL(3pin) 2 1 PWR_1
46 POWERON

10uF 25V 3225 RK


R1005 AWS68
A REF=300kHz 1 2 2 1 A
23,44,46,73,80,83 SUSC#

C1034 None
GND=200kHz R1005 AWS69 R1005 PWR_1

10uF 25V 3225 RK


M71 AWS70
I Limit: ILIM(4,5pin) 1 2 None
4A

C1033
1 27
VCC=75mV 5V / 6A

2
ON5 IN

5
6
7
8

1
R760 100K 1/16W 5%

uPA2702GR
or 2 1 2

D
ON3

C1035
V(ILIM)/10 V

2
TP198

Q124
G
R761 100K 1/16W 5%

S
(50mV-200mV) PWR_3VSTD None
GND_S1533 1 2 PWR_1533_PG 10 GND_P1533 GND_P1533 L20 PWR_5VSUS
d1

3
2
1
R762 PGOOD CDEP105NP-3R2MC-50EP
Under/Over Voltage Protection: DH5
30 PWR_1533_GH1
100K 1/16W 5% 1 2
OVP#(15pin)/UVP#(11pin)

10uF 6.3V 2012 RM


330uF 6.3V(POS) DM

330uF 6.3V(POS) DM
29 1 2 1 2 PWR_1533_LDO5
PWR_1 BST5
H=disable R763 D66

3
5
6
7
8

1
1 2 PWR_1533_SD# 32 10 1/16W 5% RB521S-30
L=enable SHDN#

2
RB151L-40
uPA2702GR
R764 + +
B B

D
100K 1/16W 5% C1037

G
0.1uF 10V RK GND1

S
d2 R765

1
Q125

C1168

C1036

C1038
D67
PWR_1533_LDO5 28 PWR_1533_SW1 2 1 1 2
41,45,46,73,76,80,83,89 DLY_SUSB# LX5
2 1 PWR_1533_SKIP# 31

3
2
1

2
SKIP#

2
R1005-0.09
PWR_1533_VCC R766 22 PWR_1533_GL1 2.7K 1/16W 0.5% C1039
DL5
d3 f1

10K 1/16W 5%
PWR_1533_REF 10K 1/16W 5% 0.1uF 10V RK

AWS91
2 None1 Q126B 1 2
R785 5 EM6K1 C1040 None GND_P1533
A1

R803
10K 1/16W 5% None 26 PWR_1533_LR1 1000pF 25V RK GND1
e1

1
CSH5
None

None
AWS72

None Q126A 25
B1

2
EM6K1 CSL5
2 24 PWR_1533_FB1 1 2
None FB5 R768

8.2K 1/16W 0.5%


1

1
150K 1/16W 0.5%

150K 1/16W 0.5%

0 1/16W

0 1/16W

33K 1/16W 0.5% 2005.12.13


1

GND_S1533 GND_S1533
MAX1533 1 2 Add Parts:C1168 330uF 6.3V(POS)
None

R804

10uF 25V 3225 RK


C1042 C1041 PWR_1
R1005

DM CAT35-P0J3300M
R769

R770

1 2 PWR_1533_PGDLY 9 10pF 25V AD $V01L13


C PGDLY C
21
2A

2
PGND Changed part
R771

R772

0.1uF 10V RK 2005.11.07


2

5
6
7
8

2
GND_S1533 None
3.3V/ 6A

uPA2702GR

C1043
GND_S1533

D
PWR_1533_FSEL 3
f

1
FSEL TP199

Q127
G
GND_P1533

S
PWR_1533_ILIM3 4
ILIM3 GND_P1533 L21 PWR_3VSTD
d4

3
2
1
PWR_1533_ILIM5 5 12 PWR_1533_GH2 CDEP105NP-3R2MC-50EP
ILIM5 DH3
2 1

10uF 6.3V 2012 RM


330uF 6.3V(POS) DM
PWR_1533_OVP# 15 13 2 1 1 2 PWR_1533_LDO5
OVP# BST3 R773 D68

3
5
6
7
8

1
PWR_1533_UVP# 11 10 1/16W 5% RB521S-30
UVP#

1
RB151L-40
uPA2702GR
+

D
None

AWS73

AWS74
150K 1/16W 0.5%

150K 1/16W 0.5%

C1045

Q128
G
C1048 470pF 25V RK

C1049 470pF 25V RK

PWR_1533_LDO5 0.1uF 10V RK GND1

S
d5 R774

2
C1044

C1046
D69
D 23 14 PWR_1533_SW2 1 2 2 1 D
LDO5 LX3
0 1/16W

$V03L03

3
2
1

2
2

1
R1005-0.09
PWR_1533_LDO3 20 PWR_1533_GL2 2.7K 1/16W 0.5% C1047
DL3
d6
1

19 0.1uF 10V RK Changed


R1005

R1005

LDO3
f2 A2

AWS92
2 1 part to
PWR_1533_REF C1050 None GND_P1533
2

pad
R775

6 16 PWR_1533_LR2 1000pF 25V RK GND1


e2
1

2
REF CSH3
R776

R777

NoneNone 17
PWR_1533_VCC CSL3
FB3
18 PWR_1533_FB2 2 1
B2

27K 1/16W 0.5%


8 R779
VCC

2
62K 1/16W 0.5% $V01L15
PWR_1533_LDO5
Reserve -> Mount
0.22uF 10V 1608 RK

GND_S1533 2 1 $V03L03

R833
C1051 None
4.7uF 10V 2012 FZ

4.7uF 10V 2012 FZ

1 2 7 33
GND FG Changed part to pad
1uF 10V 1608 RK

$V02L09 R780 180pF 25V BJ 2005.12.13

1
10 1/16W 5% Change Parts:
Changed parts R769,R770,R776,R777 MAX1533
E R779 None -> 62K 1/16W 0.5% E
1

CA46710-0051 GND_S1533
AWS75 -> R833 27K 1/16W 0.5%
C1052

C1053

C1054

C1055

GND_S1533
C
2

GND_P1533 GND_S1533 2005.12.13


Add Parts:R834 220 1/16W 5% 1608 CAD05-Q1J2200J

PWR_PMU PWR_3VSTD PWR_PMU PWR_5VSUS

220 1/16W 5% 1608

220 1/16W 5% 1608


100K 1/16W 5%

100K 1/16W 5%
1

220 1/16W 5% 1608


2

2
F F

None

None
R781

None

R782

None
R783

R784

None
2

2
1

1
R834
6

3
Q129A Q129B Q130A Q130B
2 EM6K1 5 EM6K1 2 EM6K1 5 EM6K1
46 POWERON 23,44,46,73,80,83 SUSC#
None None None None

4
GND1 GND1 GND1 GND1

G
上記枠内の回路はL19の近くに配置すること 上記枠内の回路はL20の近くに配置すること G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
NO. C1CP272450-X3
Power/ DDC/ 3VSTD,5VSUS
1 2 3 4 5 6
REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK
7
Yamada
DESCRIPTION
APPR.
8
Miura FUJITSU LTD. SHEET
74
9
91

WWW.AliSaler.Com
1 2

PWR_INTDCIN
3

PWR_DCIN $V03L04
4 5 6 7 8 9
Nile
R564 10m 1W 1% KOA-SL1
2 1 CHARGE# Changed part
PWR_DCIN
$V01L15 $V02L04

10uF 25V 3225 RK


Reserve -> Mount Added part C1176

Q65uPA2702GR-A
AWS43

AWS44
R1005

R1005

5
6
7
8
A PWR_DCIN D31 A

2
RB521S-30

D
M50
2 1

8.4V-12.6V/3.0A

C851

S
e1 e2

1
1uF 25V 1608 RK
MAX8724
26

3
2
1
CSSN PWR_BATT1 TP154
d1

1
75K 1/16W 0.5%
25 GND_P8724
DHI

C852
27 L17 R565
CSSP
1

CDRH8D43HP-100NC 27m 1W 1% KOA-TSL1

2
17 PWR8724_CELLS 1 2 1 2 2 1
CELLS
R568

1
DCIN

10uF 25V 3216 RK

10uF 25V 3216 RK

10uF 25V 3216 RK

10uF 25V 3216 RK

10uF 25V 3216 RK


2005.12.13 D30
GND_S8724 Del Parts:R566 RB053L-30FA
2

2
10 2 2 1
ACIN LDO

C853

C854

C855

C856

None
33 1/16W 5%

C1176
1

1
C857
12K 1/16W 0.5%

1uF 25V 1608 RK


B
PWR_PMU R567 D32 B

1
2

Q66uPA2702GR-A
PWR8724_REFIN 12 RB053L-30FA
REFIN
e3 e4

5
6
7
8
56K 1/16W 0.5%

2
2
R571

AWS45 D33

D
R569
82 PMU_VB1 1 2 13 24 1 2 PMU_CHGFB1 1 2

2
ICTL BST

G
AWS46 GND1

S
R1005
e1 R1005
1

RB520S-30
None R698 VCTL=1.354V 22
1

3
2
1
DLOV
1 2 15
VCTL
8.4V-12.6V/3.0A

2
GND_S8724 GND_S8724 GND1
56K 1/16W 0.5% 39K 1/16W 0.5% R570 20K 1/16W 0.5% C858
3

PWR_CHARGE2 TP155
2SK3541

None 1 2 9 0.1uF 25V 1608 RK

1
ICHG
23
LX
Q108

R572

1 R573 13K 1/16W 0.5%


82 PMU_CHGV
2 1 28
d2
2

IINP
21 2 1
1

DLO

2
C 8724_MASK C859 D34 C
GND_S8724 GND_S8724 RB053L-30FA
GND_S8724 1uF 25V 1608 RK
f2 2 1

1
1 2 8 GND_P8724
82 PMU_MAINCHG SHDN
R1005 20 D35
PGND RB053L-30FA
7
AWS47 CCV
6 19 1 2
CCI CSIP AWS48
PWR8724_REF4 R1005 PMU_CHGFB2 1 2
5 R1005 AWS49
CCS
1K 1/16W 0.5%

18 2 1
CSIN
2

PWR8724_REF4 4
REF R1005 AWS50
R575

R574 R576
1
33K 1/16W 0.5%

CHARGE#

16 2 1
20K 1/16W 0.5% BATT
R577
470K 1/16W 5%

10K 1/16W 5%
1

2
2

D PMU_CHGFB0 D
PWR8724_REFIN 3
2

CLS
R580

REFIN=2.731V Q67
Q68 RVE002P03
R581
1

1uF 25V 1608 RK


0.1uF 25V 1608 RK

PWR8724_REFIN 2 3 PWR8724_CELLS PMU_CHGFB0 1 2 3 2 PMU_CHGFB1


1

0.01uF 25V RK

0.01uF 25V RK

R579
1

33K 1/16W 0.5%


100K 1/16W 0.5%

2005.12.13 100 1/16W 1%


39K 1/16W 0.5%
1

1
C860

CHARGE#

PWR_PMU R583 RVE002P03 NET Change:Q68 PWR_DCIN R582

1
2 1 None 2 1
2

2
C861

C862

C863

R722

R578

1
100K 1/16W 5% 100K 1/16W 0.5%
CHARGE

None R586 R584


2

11
ACOK 10K 1/16W 5% 10K 1/16W 5%
None
2005.12.13

3 1

3 2
Del Parts:R585 14
GND FG
29

2SK3541

2SK3541
E E

None
PWR_PMU
f1

Q70

Q69
82 PMU_SERIAL4/3# 1 78,85 PMU_SCONT1 1
GND_S8724 GND_S8724

2
100K 1/16W 5%

GND1
2
CHARGE

CHARGE
100K 1/16W 5%
1

$V03L04 GND_S8724
GND_S8724
Changed parts
R724

PWR_PMU
3
R723

Q71
1

Q115B R589 RVE002P03


2

100K 1/16W 5%
5 EM6K1 R587 1 2 3 2 PMU_CHGFB2

1
CHARGE 1M 1/16W 0.5% NJU7141F(TE1)r
4
6

R588
1 2 100 1/16W 1%
R725 Q115A

1
M51

5
2 1 2 EM6K1
57 COM_PR_DET#
CHARGE PWR_PMU R590

VDD
1

2
F 10K 1/16W 5% F
1 2 1
IN- 2005.12.13
CHARGE Del Parts:R591
13K 1/16W 0.5% 4
OUT PMU_CHGMASK 82
GND_S8724
8724_MASK 3

VSS
IN+
2

1
C865

1000pF 25V RK
2

R592 C864
i j
1

60W 50W 0.1uF 10V RK

2
C866
1

VCLS=3.264V VCLS=2.832V 20K 1/16W 0.5% 0.01uF 25V RK


1

IinputMax=2.99A IinputMax=2.59A GND_S8724 GND1 GND_P8724


C
GND1 GND1

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
Power/ DDC/ Charger REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK Yamada
DESCRIPTION
APPR. Miura
NO. C1CP272450-X3
FUJITSU LTD. SHEET
75 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile

A A

3mm
RTW060N03 must 1.8V/2.3A
Must Keep Cool ! 3mm 3mm be kept Cool ! PWR_1.8VSUS

1.8V/1.0A
0.9V +/-1A

15K 1/16W 0.5%

10uF 6.3V 2012 RM


2 1 PWR_3534_EN
41,45,46,73,74,80,83,89 DLY_SUSB# BD3534FVM

2
AWS51 M52 PWR_1.8VSUS
R1005 UVP 1.14Vtyp
0.25Acontinuous 0.93Vmin, 1.36Vmax

1
PWR_1.8VSUS 1 2 PWR_3534_VDDQ 5 7
VDDQ VTT IN
1.5V/2.3A

Sink
Heat

RTW060N03
R1005 AWS52
M53 BD3504FVM

D
R593
2 1 PWR_3534__VCC 6 3 PWR_DIMM_VTT TP156 R595
PWR_5VSUS

2
VCC VTTS

C867
Q72
R594 TESTPAD 10K 1/16W 0.5%

S
GND1
22 1/16W 5% 2 8 1 8 1 2 TP157
EN VTT NRCS VD

220uF 2.5V(NEO/TPE) B21


TESTPAD

3
2
1
CAT22-D0E2200M
10uF 6.3V 2012 RM
B 12,19,20,30 REF_SM 2 1 PWR_3534_REF 4 1 2 7 PWR_3504_G B
VREF GND GND G

10uF 6.3V 2012 RM


GND1 PWR_1.5VMAIN

1
RS3 0 SS

0.1uF 10V RK

0.1uF 10V RK
41,45,46,73,74,80,83,89 DLY_SUSB# 3 6
EN VS

2
CP210202-01 BD3534FVM

100uF 6.3V (NEO/TPE) B21


+

CAT22-D0J1000M
CA46530-1750 4 5 1 2
PWR_5VSUS VCC VFB R596 R597

3.9K 1/16W 0.5%


$V02L02

1
C870

C871

C872

C869

C868

0.033uF 16V RK
5.1K 1/16W 0.5%

0.1uF 10V RK
2

1
Changed pad.

1
BD3504FVM 220 1/16W 1% +
3mm

1 1
$V02L10

2
C874

C875

R598

C873
Changed part GND1 C876

2
0.022uF 16V RK

GND1
C C

2.5V 0.5A TP158


έʔεԹ౓͸ϕλʹ઀ଓ͢Δ͜ͱ
80ˆҎԼɺ100mA Max
2pin GND
PWR_3VMAIN M55 PWR_2.5VMAIN M54 S-OUT(GMCH)
D MAX1589EZT250+T 0.8mm D
1 5
1
VIN VO
6 0.5mm
5V/0.1A
STBY N.C.
3.3V/0.1A
2

R599 2
100K 1/16W 5% PWR_5VMAIN GND PWR_3V_ATVBG TP159
3 5
SHDN# N.C.

4.7uF 4V 1608
TESTPAD

10uF 6.3V 2012 RM


1uF 10V 1608 FZ

R600 3 4
VIN VOUT
2

2
C877

2 4 1 2
1

GND RESET#

0.1uF 10V RK
1

1
C878

100K 1/16W 5% BH33FB1WHFV


1

CA46530-1603 CA46530-1272
1

C879

C880
S-OUT(GMCH)

S-OUT(GMCH)
2

2
C881
0.1uF 10V RK
2

E E
GND1
GND1

#TVDAC電源ショート=> P16

F F

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
Power/ LDO/ SYS REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK Yamada
DESCRIPTION
APPR. Miura
NO. C1CP272450-X3
FUJITSU LTD. SHEET
76 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

A A

B B

3.3V 50mA
PWR_1 PWR_PMU TP160
M56

8 1
IN OUT
5 2
ERR# SENSE

10uF 6.3V 2012 RM


1
0.1uF 25V 1608 FZ

3 7
SHUTDOWN FB
2

C 4 6 C

2
GND TAP
C883

C882
9
1

FG TP161 TP162
LP2951CSD-3.3 TESTPAD TESTPAD

1 2
R1005 AWS54

GND1 GNDA

D 48 ERR_3.3VREG D

E E

F F

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
Power/ LDO/ PMU REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK Yamada
DESCRIPTION
APPR. Miura
NO. C1CP272450-X3
FUJITSU LTD. SHEET
77 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile

A PWR_EXDCIN TP165 A

TP163 TESTPAD 2 1 2005.12.13 6mm


D36 Change Parts:D36,D37,D38,D39 RB031L-30FA -> RB053L-30FA
$V03L01
RB053L-30FA
PR
2 1
18-21V/4.5A
Added part D37
RB053L-30FA
PR TP166
2 1 PWR_INTDCIN
CN28 F6 FL73 A D38
RB053L-30FA Q73
8A 125V uPA2712GR

0.1uF 25V 1608 FZ

0.1uF 25V 1608 FZ

0.1uF 25V 1608 FZ


<FILTER>

0.1uF 25V 1608 RK


B + 1 2 1 1 2 PWR_DCIN0 2 1 PWR_INTDCIN0 1 8 B
1 2

C889 None
C888 None

C890 None

C891 None
1000pF 25V RK

1000pF 25V RK
0.01uF 25V RK

0.01uF 25V RK

200K 1/16W 5%

200K 1/16W 5%
D39

0.1uF 25V 1608 FZ


2 S D 7

1
BLM41P600S 1 4 RB053L-30FA 3 6

1
5

1
C884

C885

C886

C887

R602

R603
4
G

C892
- 2 2 3 + C893
1

2
47uF 25V(AL) WM

2
3

2
1

2
200K 1/16W 5%

200K 1/16W 5%
220pF 50V RK

220pF 50V RK

FL55
DC-IN CN ACM0908-801-2P
2

R604

R605
GND1
1

6 1
C894

C895

GND1

GND1 Q74A
C 2 EM6K1 C

1
GND1 GND1

3
GND1
Q74B
5 EM6K1
83 AC_CUT

100K 1/16W 5%
4
2
TP167 TESTPAD

R606
1
D GND1 D

8.4-12.6V/8A PWR_BATT1
4.7uF 25V 2012 RK

8mm
B
2

CN29
C1177

F7 $V02L04
1

15A 60V(P129)
1 PWR_BATT1_CN 1 2 Added part
Batt GND1
E
2 PMU_VSENSE1_CN 2 1 PMU_VSENSE1 85 E
VS R607 1K 1/16W 5%
3 PMU_BT1TEMP/IN#_CN 1 2 PMU_BT1IN#0 85
SW/T+
R1005 AWS55
4 PWR_BT1ROM_CN 2 1 PWR_BT1ROM 0.3mm
Power R608 10 1/16W 5%
5 PMU_BT1CLK_CN 2 1
Clock R609 100 1/16W 5% PMU_BT1CLK 82
6 PMU_BT1DAT_CN 2 1
Data R610 100 1/16W 5% PMU_BT1DAT 82
7 PMU_SCONT1#_CN 2 1 1 2 1 2 PWR_PMU
SC#/T-
0.22uF 25V 1608 FZ

R1005 AWS56 R611


0.1uF 25V 1608 FZ

0.1uF 25V 1608 FZ

3
None

None

None

PWR_BTROM0 100K 1/16W 5% D40


PMU_SCONT1 75,85
1

1
RB521S-30

RB521S-30

RB521S-30
220pF 50V RK

8 1SS400G
GND
1

1
2
2

2
C896

C897

C898

C899
D41

D42

D43

Q75
2

F F
D44

D45

2SK3541
2

BAT CN
CA52300-3001 3 3 GNDA
1SS226

1SS226

GND1
1

GND1

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
Power/ Node/ DCIn, Battery CN REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK Yamada
DESCRIPTION
APPR. Miura
NO. C1CP272450-X3
FUJITSU LTD. SHEET
78 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

A A

TP169

PWR_1
PWR_DCIN

2 1

D46
RB053L-30FA
2 1

B
D47 B
PWR_CHARGE2 RB053L-30FA

2 1

D48
RB031L-30FA
2 1

D49
RB031L-30FA

2 1

D50
RB031L-30FA
C PWR_BATT1 C

2 1

D51
RB031L-30FA
2 1

D52
RB031L-30FA

Q76
8 1
7 D S 2
6 3
D 5 D
4

1
G
uPA2712GR R612
47K 1/16W 5%
PWR_DCIN

2
D53
1SS400GT2R
1 2

2
PWR_PMU
R613
4.7K 1/16W 5%
100K 1/16W 5%
2

1
E E
R614

6
1

Q77A
2 EM6K1
1
3

Q77B
5 EM6K1
86 PMU_SC2IN
4

GND1

GND1

F F

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
Power/ Node/ PWR_1 REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK Yamada
DESCRIPTION
APPR. Miura
NO. C1CP272450-X3
FUJITSU LTD. SHEET
79 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile

A 3.3V 2.0A 3.3V 2.0A A

Q78
PWR_3VSUS TP170
Q79
PWR_3VMAIN TP171 3.3V 1.0A
PWR_3VSTD PWR_3VSTD PWR_LCD TP172
TPCF8101 TPCF8101 Q80
1 1 PWR_3VSTD
5 2 5 2 SSM6J51TU
0.1uF 25V 1608 RK

0.22uF 10V 1608 RK


S D 3 S D 3 1
470K 1/16W 5%

470K 1/16W 5%
6 6 4 2
1

3300pF 50V 1608 RK


7 7 S D 5

470K 1/16W 5%
4 8 4 8 6
1

2
G G

100uF 6.3V(POSB)

100uF 6.3V(POSB)

2
R615

R616

C901
220 1/16W 5% 1608

220 1/16W 5% 1608


3

1
G
C900

C902
PWR_PMU
2

R617

220 1/16W 5% 1608


B
+ + B

2
R618

R619

None
1SS400GT2R
1

2
C903

C904
47K 1/16W 5%

47K 1/16W 5%
None 2

None 2
2

R620
2

2
47K 1/16W 5%

D54
1
3

3
R621

R622

1
Q81B Q82B
1

1
5 EM6K1 5 EM6K1

R623

100K 1/16W 5%
4

1
6

R624 None
Q81A AWS57 Q82A Q83A
2 EM6K1 1 2 2 EM6K1 2 EM6K1
23,44,46,73,74,83 SUSC# 23,42,44,46,68 SUSB#
GND1 R1005
1

1
GND1

2
3
R625 0 1/16W GND1
1 2 GND1 Q83B
C 41,45,46,73,74,76,83,89 DLY_SUSB# C
GND1 5 EM6K1
37,46 LCDEN_Q
None

4
GND1

GND1

GND1

D D

5.0V 2.0A 2005.10.14


ChangeParts:Q85 SI2305DS -> SSM6J51TU
1.8V 0.5A
PWR_5VMAIN TP173 TP175
PWR_5VSUS
#PWR_BAY SW => Bay Boardに実装 PWR_1.8VMAIN

M57 Q85
PWR_1.8VSUS SSM6J51TU
1 8 1
VDDA OUTA
4 2

470K 1/16W 5% r

0.1uF 10V RK
2 7 S D 5
VDDB OUTB

2
6

2
3 6
SSCTL OUTC

2
C905
AWS58 3
G

R626
1 2 4 5 R628
23,42,44,46,68 SUSB#

1
CTRL VSS
R1005

1
E E
220 1/16W 5% 1608 r

47K 1/16W 5% r
R629 None BD6522F None
1uF 10V 1608 FZ

1
1

2
41,45,46,73,74,76,83,89 DLY_SUSB# 1 2
C908

R630
0 1/16W
2

100pF 25V AJ
C907

3
Q86
1 2SK3541
None

2
3
GND1
Q87
1 2 1 2SK3541
23,42,44,46,68 SUSB# AWS59
R1005

2
F R632 0 1/16W r F

41,45,46,73,74,76,83,89 DLY_SUSB# 1 2

None

GND1

※M57の5pinは、GNDベタには接続しないこと。
C907,C908との1点アースとする。
(左図参照)

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
Power/ Node/ Switch1 REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK Yamada
DESCRIPTION
APPR. Miura
NO.

FUJITSU LTD. SHEET


80
C1CP272450-X3

91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

A A

B B

C C

D D

E E

F F

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
NO. C1CP272450-X3
Power/ Blank
1 2 3 4 5 6
REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
7
APPR.
CHECK Yamada
DESCRIPTION
APPR.
8
Miura FUJITSU LTD. SHEET
81
9
91
1 2 3 4 5 6 7 8 9
Nile
本クロックはノイズに弱いため
上下層に高速な信号が走らないように
配線すること

A A
CSTCR X1 1 M58A

3
X2
X 2
x
128
X0
71 SMB_CLK_PMU 28
X8 P80/SCL0
72 SMB_DATA_PMU 28
CSTCR4M00G55-R0 P81/SDA0 PWR_PMU
73 ICHSMBALT# 23,26
GND1 P82/ALERT
129 ASHIPID 2 1
X1 R633 None
65 100K 1/16W 5%
P90/SCL2 PMU_BT1CLK 78
20 66 PMU_BT1DAT 78 2 1
47 CLK_32K_PMU X0A P91/SDA2 R634
67 PMU_BT2CLK 51
P92/SCL3 100K 1/16W 5%
21 68 PMU_BT2DAT 51
X1A P93/SDA3 GND1
B 69 PMU_ROMCLK 83 B
P94/SCL4

100pF 25V AJ

100pF 25V AJ
70 PMU_ROMDAT 83
P95/SDA4

2
A

C909

C910
1

1
17
46,48 PWROK_PMU RSTX
22 PMU_BT1IN# 85
PA0/ALR1
23 PMU_BT2IN# 85,86
PA1/ALR2 GND1
24 PMU_PLLB 26,46,83
PA2/ALR3
25 PMU_ACON 46,84,85,86
PA3/ACO
26 PMU_BT1SWON# 85
PWR_PMU PA4/OFB1
27 PMU_BT2SWON# 86
PA5/OFB2
29 28
CVcc PA6/OFB3 ASIC_PON 46,83

C 33 C
CVss
34 PMU_SERIAL 85
PB0/DCIN PWR_PMU
35 PMU_MAINCHG 75
GND1 PB1/DCIN2
36 2 1
PB2/VOL1 R699
37 PMU_VS1ALMIN 85
PB3/VS1 100K 1/16W 5%
38
PB4/VOL2
62 PMU_CHRGLED_R 31 39 PMU_VS2ALMIN 85,86 1 2
CVRH2 PB5/VS2 R700 None
40 PMU_CHGMASK 75
R635 PB6/VOL3 100K 1/16W 5%
41 PMU_APPMODE 62
100K 1/16W 5% PB7/VS3 GND1
1 2 30 THLTL# 23,26
CVRH1 GND1

3
27 AXL_X AXL_X 45
GND1 PC0/AN0/SW1 Q89
46
PC1/AN1/SW2
62 PMU_CHRGLED_G 32 47 1
CVRL PC2/AN2/SW3 AXL_X 2SK3541
27 AXL_Y AXL_Y 48 2005.09.16

2
PC3/AN3
D 49 AXL_Y D
PC4/AN4
PC5/AN5
50 AXL_Z ChangeParts:R639 ->10K 1/16W 0.5%
AXL_Z 51 GND1
27 AXL_Z PC6/AN6
52
PMU_BT2VOL 86 R640 ->100K 1/16W 0.5%
PC7/AN7 PMU_BT2DCHG 86
G-SENSOR

G-SENSOR

G-SENSOR

PWR_PMU
0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK
2

43 GND1
AVR
C911

C912

C913

4.7uF 10V 2012 FZ

53
Charge Current 3.05A R639
1

PD0/AN8 PMU_BT2TEMP 86
PWR_PMU
4.7uF 10V 2012 FZ

59 1 2 PWR_PMU
PD1/AN9
2

42 60 ASHIPID
AVcc PD2/AN10

100K 1/16W 0.5%


61 27K 1/16W 0.5%
PD3/AN11 PMU_SERIAL4/3# 75
2

1
R703

0.1uF 10V RK
62
1

PD4/DA1 PMU_VB1 75

1
C914

C915

44 63 1 2 PMU_CHGV 75
AVss PD5/DA2

R640
64
1

PD6/PPG2 KBC_HL1 83

C916
GND1 92 0 1/16W
PMU_ROTATE# 83

2
PD7/PPG3
$V03L04

2
E
$V01L02 #G-SENSOR未実装時はGND1に接続。 PMU_SLCDS[0:8] Changed part R639 E
PMU_SLCDS[0:8] 62
Deleted parts R636,R637,R638 GNDA 74 PMU_SLCDS0 GNDA
PWR_PMU PE0/SEG0
Changed connection 75 PMU_SLCDS1
R641 PE1/SEG1
76 PMU_SLCDS2
18K 1/16W 5% PE2/SEG2
77 PMU_SLCDS3
PE3/SEG3
2 1 N17642207 89 78 PMU_SLCDS4
PF7/V3 PE4/SEG4
79 PMU_SLCDS5
PE5/SEG5
N17642206 80 PMU_SLCDS6
RM62 PE6/SEG6
81 PMU_SLCDS7
PE7/SEG7
5 4 KBC_HL1 83
6 3 88 PMU_SLCDC[0:2]
PF6/V2 PMU_SLCDC[0:2] 62
7 2 82 PMU_SLCDS8
PF0/SEG8
8 1 83 PMU_SLCDC0
PF1/COM0 HL1
84 PMU_SLCDC1
47Kx4 1/16W 5% GND1 PF2/COM1

0.1uF 10V RK
85 PMU_SLCDC2
PF3/COM2

2
F N17642205 87 86 PMU_BTNLOCK F
PF5/V1 PF4/COM3 HL2

C917
1
PMU_BTNLOCK

PWR_PMU
3

Q111B
5 EM6K1 MB90F378PFF-G-9012E1
47,52,62 LCDCL#_SW
CA46100-0086 GND1
4

GND1
G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
NO. C1CP272450-X3
Power/ PMU/ LUNA1
1 2 3 4 5 6
REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK
7
Yamada
DESCRIPTION
APPR. Miura
8
FUJITSU LTD. SHEET
82
9
91

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

A A

M58B
PWR_3VMAIN

ROW#[0:7] 60,62
22 KBC_A20G 9 109 ROW#0
AWS60 P50/GA20 P00
10 110 ROW#1
22,29,36,42,46 LPC_FRAME# P51/LFRAME# P01
12,23,29,30,34,36,42,44,45,50,51,64 PLT_RST# 2 1 PLT_RST#_PMU 11 111 ROW#2
P52/LRESET# P02 PWR_PMU
5 CLK_33_PMU 12 112 ROW#3
AW Short (R1005) P53/LCK WakeUp P03
22,29,36,42,46 LPC_AD0 13 113 ROW#4
P54/LAD0 P04 RM63
22,29,36,42,46 LPC_AD1 14 114 ROW#5
P55/LAD1 P05
22,29,36,42,46 LPC_AD2 15 115 ROW#6 3 6
P56/LAD2 P06
22,29,36,42,46 LPC_AD3 16 116 ROW#7 1 8
P57/LAD3 P07
2 7
B 4 5 B
SMT8
CLM#[0:15] 60
8 117 CLM#0 100Kx4 1/16W 5%
23,26,31,36,42 SERIRQ P47/SERIRQ P10
7 118 CLM#1
23,26,31,36,42 PCI_CLKRUN# P46/CLKRUN# P11 RM64
57 PS2_KCLOCK 1 119 CLM#2
P40/PSCK1 P12
57 PS2_KDATA 2 120 CLM#3 3 6
P41/PSDA1 P13
57 PS2_MCLOCK 3 121 CLM#4 2 7
P42/PSCK2 P14
57 PS2_MDATA 4 122 CLM#5 4 5
P43/PSDA2 P15
51 PS2_PCLOCK 5 123 CLM#6 PCIC_LED1 1 8
P44/PSCK3 P16 SMT8
51 PS2_PDATA 6 124 CLM#7
RM66 P45/PSDA3 P17 100Kx4 1/16W 5%
125 CLM#8
P20
PWR_PMU 8 1 PMU_ROTATE# 82 130 CLM#9
P21 GND1
PWR_3VMAIN 7 2 KBC_A20G 131 CLM#10
P22 PWR_5VMAIN
PWR_5VMAIN 6 3 PS2_PDATA 132 CLM#11
P23
5 4 PS2_PCLOCK 133 CLM#12
P24
134 CLM#13
P25

10K 1/16W 5%
10Kx4 1/16W 5% 135 CLM#14 $V03L03
P26

None
C 136 CLM#15 C
P27 R940 10 1/16W 5% Added parts

R941
1 2

PWR_PMU

2
2 1 HDDLED# 51

100K 1/16W 5%
RM67 RM65
1

5 4 PS2_KCLOCK R642 None 93 137 PMU_D0 8 1 D81 RB521S-30


41,45,46,73,74,76,80,89 DLY_SUSB# P60/INT0 P30
6 3 PS2_KDATA 23,44,46,73,74,80 SUSC# 94 138 PMU_D1 7 2 2 1 BAY1_LMP# 51
P61/INT1 P31 D55 1SS400G
7 2 PS2_MCLOCK 95 139 PMU_D2 6 3
P62/INT2 P32
8 1 PS2_MDATA 96 140 PMU_D3 5 4
30,47,62 SUSSW# P63/INT3 P33

3
97 141
2

P64/INT4 P34 PMU_SMI 46


1

10Kx4 1/16W 5% GND1 98 Latch 142 PMU_D5 10Kx4 1/16W 5%


62 SCANX# P65/INT5 P35
C919 99 143 PMU_D6 1
P66/UCK1 P36 PCIC_LED1 31
0.1uF 10V RK 100 144 PMU_D7
2

62 PMU_MAILLED

2
P67/UO1 P37 Q90
D 2SK3541 D
GND1 GND1
37,46,47 BL_EEN_BENN

100pF 25V AJ
RF_ON_LED# 47

1
C918
2 R643 R644 PWR_PMU
GND1 1K 1/16W 5% 100K 1/16W 5%
18 101 PMU_SL 2 1 2 1
PWR_PMU RM68 PWR_PMU Vcc1 P70/UI1
54 102 PMU_BT1ID 85
Vcc2 P71/UCK2
8 1 PMU_PLLB 26,46,82 90 103 PMU_BT2ID 86
Vcc3 P72/UO2

0.1uF 10V RK

0.1uF 10V RK
7 2 PMU_ROMDAT 82 126 104 AC_CUT 78
Vcc4 P73/UI2

2
6 3 105 SL1
PMU_ROMCLK 82 P74/UCK3 HTKYSMI 46

100K 1/16W 5%
E
5 4 KBC_HL1 82 106 KBC_SCI 23 E
P75/UO3

C920

C921
SMT8 107 KBC_INIT# 22,26

1
100Kx4 1/16W 5% P76/UI3 SL2
108
P77/PPG1

R645
RM69
0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

0.1uF 10V RK

2
2

8 1 PMU_MD0 GND1
C922

C923

C924

C925

7 2 PMU_MD1 PMU_MD0 58
MD0 GND1
6 3 ASIC_PON 46,82 PMU_MD1 57
1

MD1
5 4 PMU_MD2 PMU_MD2 56
SMT8 MD2
100Kx4 1/16W 5% GND1
GND1 19
Vss1
55
Vss2
91
Vss3
127
Vss4
F F
GND1
41,45,46,73,74,76,80,89 DLY_SUSB#

23,44,46,73,74,80 SUSC#
C1089 None

C1090 None
100pF 25V AJ

100pF 25V AJ
2

$V02L01 MB90F378PFF-G-9012E1
1

Added parts CA46100-0086

G ※PMUの端子直近に配置すること G
GND1
TITLE
GILIA Main Board Rev.03
DRAW. CUST.
NO. C1CP272450-X3
Power/PMU/LUNA2
1 2 3 4 5 6
REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK
7
Yamada
DESCRIPTION
APPR. Miura
8
FUJITSU LTD. SHEET
83
9
91
1 2 3 4 5 6 7 8 9
Nile

A A

$V03L04
Mount -> Reserve R647,R648,R649,R651,C926,C927,C928
LUNA近傍に配置
PWR_PMU

PWR_PMU A1

10K 1/16W 5%
M59

2
NJU7141F(TE1) PWR_INTDCIN PWR_PMU

5
None
PWR_PMU PWR_VREF1.2

VDD
B B

R646
13K 1/16W 0.1% 1608
2 1 1
R647 IN-

1
22K 1/16W 0.1% 1608 4
OUT

100K 1/16W 5%
None

0.1uF 10V RK

None 0.1uF 10V RK


1

2
R648 None

CA47201-1714
UDZSTE-1713B
3

VSS
IN+

D64
2
C926

None

R753
2

2
C927

1
PMU_ACON 46,82,85,86
GNDA GNDA

0.01uF 25V RK
1K 1/16W 5%

3
C R649 None Q123A Q123B C

R754

C1169
12K 1/16W 0.5% 2 EM6K1 5 EM6K1
0.2mm

1
PWR_INTDCIN 2 1 1 2 PMU_ACON 46,82,85,86

4
1None
910 1/16W 0.5%

R650
1
R651 None

0.01uF 25V RK

330K 1/16W 5% $V03L05


None
Changed part
C928

GND1 GND1 GND1


2
2

2005.12.13
Add Parts:C1169 0.01uF 25V RK CAS02-R1E1002K
GNDA

D D

0.3mm

0.3mm
5.0V/0.01A
PWR_BTROM0 TP176
0.01A TESTPAD
E PWR_1533_LDO5 2 1 E
R1005 AWS61

B
F BatteryCNまたはBayCN近傍に配置 F

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
NO. C1CP272450-X3
Power/ PMU/ Etc0 (Common)
1 2 3 4 5 6
REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.

7
CHECK Yamada
DESCRIPTION
APPR.
8
Miura FUJITSU LTD. SHEET
84
9
91

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

A A

D57
DAN202KT146
PWR_1 1
R652
3 1 2
PMU_SCONT1 75,78

6
2 10K 1/16W 5%
78 PMU_VSENSE1
Q91A
B 2 EM6K1 PWR_PMU B
82 PMU_SERIAL
None

3
3
Q92
Q91B PWR_PMU 1 2SK3541
78 PMU_VSENSE1

470K 1/16W 5%
5 EM6K1
82,86 PMU_VS2ALMIN

2
1
100K 1/16W 5%
None

3 4
PMU_VS1ALMIN 82

0.01uF 25V RK
100K 1/16W 5%
1
None
Q94B

1
R653
5 EM6K1 Q93B
46,82,84,86 PMU_ACON

R654
EM6K1 5

R655

C929
None

2
2
GNDA

6
Q94A Q93A
C 2 EM6K1 2 EM6K1 GNDA C
82 PMU_BT1SWON# 82,86 PMU_BT2IN#
None

1
2

470K 1/16W 5%

GND1
R656

$V01L10
1

Changed connection
$V01L10
GND1 Mount -> Reserve Q91,Q93,R854 PWR_PMU

100K 1/16W 5%
1
D D
Q95

R657
RVE002P03

2
PWR_BTROM0 2 3 PWR_BT1ROM
47K 1/16W 5% 470K 1/16W 5%

1K 1/16W 5%
2

78 PMU_BT1IN#0 1 2 PMU_BT1IN# 82
R658
1

PWR_PMU 100 1/16W 5%

0.1uF 10V RK
1
R660
R659
1

3 1

C930
470K 1/16W 5%

2
1

Q96
2

1 2SK3541
83 PMU_BT1ID
R661

GNDA
2
2

E E
R755

GND1
1

2005.10.14
6

Q97A Q97B AddParts:R?


2 EM6K1 5 EM6K1
83 PMU_BT1ID
1

GND1
B A
F F
BatteryCNまたはBayCN近傍に配置 LUNA近傍に配置

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
NO. C1CP272450-X3
Power/ PMU/ Etc1 (Battery1)
1 2 3 4 5 6
REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK
7
Yamada
DESCRIPTION
APPR.
8
Miura FUJITSU LTD. SHEET
85
9
91
1 2 3 4 5 6 7 8 9
Nile

A PWR_PMU A

0.2mm

6
PWR_1 1
R662 R663 Q98A
3 1 2 1 2 2 EM6K1
PMU_SCONT2 51 51 PMU_VSENSE2

1
1
PMU_SC2IN 2 10K 1/16W 5% 1K 1/16W 5%
PMU_VS2ALMIN 82,85

0.01uF 25V RK
100K 1/16W 5%
D58

1
DAN202KT146 R664

1
330K 1/16W 0.1% 1608
Q98B

R665

C931
5 EM6K1 PMU_SC2IN
46,82,84,85 PMU_ACON PMU_SC2IN 79

2
4

2
6
PWR_1
Q99A

3
B 1 2 2 EM6K1 B
Q99B R666 GNDA

1
5 EM6K1 100K 1/16W 5%
82 PMU_BT2SWON# PMU_BT2VOL 82

4
2

1
470K 1/16W 5%

2
C932
0.01uF 25V RK

2
R668

R667
CAD15-K1J6202B

1
Bay: 62K+82K 0.1% GNDA

1
NoBay: 10K+10K 5%

1
GND1
Q100 R669
RVE002P03 CAD15-K1J8202B
PWR_BTROM0 2 3 PWR_BT2ROM

2
C C
47K 1/16W 5% 470K 1/16W 5%

1K 1/16W 5%
2

1
PWR_PMU
1

GNDA
470K 1/16W 5%
2

R670

R671
PWR_PMU
1

3 2

10K 1/16W 0.5%


2
R672

Q101
1

1 2SK3541
1

83 PMU_BT2ID
2

R673
1
R756

2005.10.14 GND1
3 2

51 PMU_BT2TEMP0 1 2 PMU_BT2TEMP 82
6

Q102A AddParts:R756 R674


EM6K1 Q102B 100 1/16W 5%

0.1uF 10V RK
D D

1
2 5 EM6K1
83 PMU_BT2ID
PWR_PMU
1

C933
2
10K 1/16W 5%
2
GND1
8mm GNDA

R675
8mm
8A 8.4-21V/8A

1
51 PMU_BT2IN0# 2 1 PMU_BT2IN# 82,85
R676

0.033uF 16V RK
PWR_BATT2 R677 PWR_CHARGE2 100 1/16W 5%

1
5m 1W 1%
1 2

C934
b b

2
E E
8mm
1K 1/16W 5%

1K 1/16W 5%

PWR_PMU
0.1A
1

24K 1/16W 0.5%

GNDA
PWR_BTROM0
2
R678

R679

1 8 PWR_BTROM0
ISEL GSEL
2

R680

2 7
IN- VCC
0.1uF 25V 1608 FZ

0.1uF 25V 1608 FZ

1
0.1uF 25V 1608 FZ

3 6 1 2
IN+ OUT R681 PMU_BT2DCHG 82
2

16K 1/16W 0.5%

0.47uF 10V 1608 RK


100K 1/16W 5%
0.1uF 10V RK

4 5
GND COM

1
750K 1/16W 0.5%
2

1
C935

C936
1

C937
M60

2
C938

C939

BD3180FV
1

R682

F F
R683

A
1

GNDA
3

GNDA
Q103
46,82,84,85 PMU_ACON 1 2SK3541
LUNA近傍に配置
2

GNDA
B
BatteryCNまたはBayCN近傍に配置
G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
Power/ PMU/ Etc2 (Battery2) REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK Yamada
DESCRIPTION
APPR. Miura
NO. C1CP272450-X3
FUJITSU LTD. SHEET
86 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

A A

B B

C C

D D

E E

F F

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
Power/ Blank REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK Yamada
DESCRIPTION
APPR. Miura
NO. C1CP272450-X3
FUJITSU LTD. SHEET
87 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile

A A

A 1.35V 3.0A B
PWR_3VSTD TP177
B B
PWR_VGACORE

Q104 L18
5 1D 1S 3 PWR_1953_SW2 2 1
6 1D 2D 7

330uF 2.5V(TPE)
EXTVGA

EXTVGA
10uF 10V 2012 RK

10uF 10V 2012 RK


8 CDRH6D28-1R0NC-FJ
2D

None
C940 EXTVGA
EXTVGA

4.7uF 10V 2012 FZ


1
4 1G 2S 1

1
2 2G
+
1

C941
2

EXTVGA
RB521S-30**TE61
SP8K3TB

2
C942

C943

EXTVGA
EXTVGA
d1
2

D59
d2

1
C C

GND1
GND1

M61

5 10
IN BST

EXTVGA

4.7uF 10V 2012 FZ


2
8
DH

1
C944
1 C945

1
ILIM 0.1uF 10V RK
D 9 EXTVGA D

2
LX
2
COMP

1
EXTVGA

11K 1/16W 0.5%


270K 1/16W 0.5%

680pF 25V RK

2
C946

EXTVGA
6
DL
1

R685
差分表参照

2
None

EXTVGA
470pF 25V RK

7
f1

1
PGND
1
R686
2
3

EXTVGA

4
GND
EXTVGA

Q105
2
1

C947

None

16K 1/16W 0.5%


270pF 25V BJ

470pF 25V RK
1 2SK3541 GND1
68 SUSB

1
EXTVGA 3
2

FB

EXTVGA
差分表参照
2

R687
C948

C949

EXTVGA
MAX1953EUB+

2
E E
EXTVGA

2
CA46710-0040
f2
C
GND1

F F

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
Power/ DDC/ VGACORE REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK Yamada
DESCRIPTION
APPR. Miura
NO. C1CP272450-X3
FUJITSU LTD. SHEET
88 91
1 2 3 4 5 6 7 8 9

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

A A

B B
PWR_5VSUS

1.8V 3A

EXTVGA

10uF 10V 2012 RK


TP178
PWR_VGAMEM

2
M62

C950
L19

1
R688 2 3 2 1
10 1/16W 5% IN LX CDRH5D28-3R0NC

None
220uF 2.5V(NEO) DM
EXTVGA 4 14 EXTVGA
A

1
IN LX

C951 EXTVGA

4.7uF 10V 2012 FZ


1

2
C 16 C
EXTVGA GND1 LX
12 +
R701 VCC

1
C952
0 1/16W

EXTVGA
2
41,45,46,73,74,76,80,83 DLY_SUSB# 2 1 1
SHDN
13
PGND

1
R702 C953 11 15
470pF 25V RK FBSEL PGND
PWR_3VVGA 2 1

2
EXTVGA 5
0 1/16W SS
EXTVGA

EXTVGA 6 8 GND1
None 1uF 10V 1608 FZ
7
COMP

TOFF
FB
B
2

1
C955 EXTVGA

EXTVGA
0.01uF 25V RK
VGA_ON 90

51K 1/16W 0.5%


10 9
REF GND

1
C954

D D
1

EXTVGA

1uF 10V 1608 FZ


MAX1842EEE+
R689
EXTVGA

2
CA46710-0052
2

C956
1
GND1
C
E E

F F

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
Power/ DDC/ VGAMEM REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK Yamada
DESCRIPTION
APPR. Miura
NO. C1CP272450-X3
FUJITSU LTD. SHEET
89 91
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
Nile
$V01L11
Changed connection
$V01L07
Added parts, Changed connection 2005.10.14
A A

PWR_PMU PWR_3VSTD 3.3V 0.30A


AddParts:M?,R?,R?,C?,C?
1.2V 0.30A
TP180
PWR_3VSTD M70 PWR_VGA1.4V

1
R789 1 8
PWR_VGA1.0V 100K 1/16W 5% R790 IN OUT
2 7
IN OUT

1
EXTVGA 100K 1/16W 5%

1
EXTVGA C1030

10uF 6.3V 2012 RM


0.1uF 10V RK 3 R757

2
POK
2

EXTVGA
EXTVGA 10K 1/16W 0.5%

C1031
R788 EXTVGA

2
3.3K 1/16W 5% 4 6
EXTVGA SHDN# SET

1
3

1
B B
1

3
Q131 Q132 9 5 R758
2SC5658 2SK3541 HeatSink GND 20K 1/16W 0.5%
1 1
EXTVGA EXTVGA EXTVGA

2
2

C1057 MAX1806EUA08+

2
1uF 10V 1608 RK EXTVGA
EXTVGA
1

GND1

GND1

PWR_PMU 1.0V 0.8A


C PWR_VGAMEM PWR_5VSUS TP179 C

EXTVGA

R691 EXTVGA
100K 1/16W 5%
M63 PWR_VGA1.0V

100K 1/16W 5%
BD3506F EXTVGA

2
2 7
VIN VO1

1000pF 25V RK
8
VO2

1
R690
4
VCC

1
EXTVGA
1

C957

330uF 2.5V(TPE)
1 3 R692
89 VGA_ON EN VFB

C958 EXTVGA
10uF 10V 3216 FZ
C959 10uF 6.3V 2012 RM
1.2K 1/16W 0.5%

2
6

1
1EXTVGA
EXTVGA

2
Q106A 6 VFB=0.650 +
PWR_VGAMEM EM6K1 NRCS Vset=1.04V
2 5
GND
f1

2
0.01uF 25V RK
EXTVGA
1

2
3

1
10K 1/16W 5%

EXTVGA
Q106B R693
1

C961
EXTVGA
D 5 EM6K1 2.0K 1/16W 0.5% D

2
EXTVGA

EXTVGA EXTVGA
4

1
R694

C960
f1
2

3
100K 1/16W 5%

1 Q107
2SC4617TL
1

EXTVGA GND1
2
1
EXTVGA

C962
R695

1uF 10V 1608 FZ


2

EXTVGA
2

E E

GND1

2005.10.14
DeleteParts:M64,R696,R697,C963,C964,C965,C966,C967

F F

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
NO. C1CP272450-X3
Power/ LDO/ VGA
1 2 3 4 5 6
REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
APPR.
CHECK
7
Yamada
DESCRIPTION
APPR.
8
Miura FUJITSU LTD. SHEET
90
9
91

WWW.AliSaler.Com
1 2 3 4 5 6 7 8 9
Nile

A A

B B

C C

D D

E E

F F

G G

TITLE
GILIA Main Board Rev.03
DRAW. CUST.
NO. C1CP272450-X3
Power/ Blank
1 2 3 4 5 6
REV. DATE
DATE
DESIGN
2006.01.26
CHECK
DESIGN Seki
7
APPR.
CHECK Yamada
DESCRIPTION
APPR.
8
Miura FUJITSU LTD. SHEET
91
9
91

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