MSI - 6c25b - MS-7142

5 4 3 2 1
MS-7142 VER:0A Title

Cover Sheet
Page
1
Block Diagram 2
D
*AMD PGA 754 K8-Processor (DDR 400) D
GPIO SPEC 3
*VIA K8M800
AMD K8 -> 754 PGA Socket 4,5,6
*VIA VT8237R(AGP 8X / VLink 8X) Clock Synthesizer 7
*Winbond 83627THF LPC I/O System Memory DDR DIMM 1 & 2 8

DDR Terminations R & C 9
*VIA VT6103L 10/100 Base-T LAN DDR Damping R & Bypass Cap. 10
*USB 2.0 support (integrated into VT8237R) NB VIA K8M800/K8T800 PRO (HT) 11,12,13
K8 Vcore Power 14
*VIA VT1617 AC'97 Codec
AGP SLOT 8X 15
*DDR DIMM * 2
C C
VT8237R 16,17,18
*AGP SLOT * 1 ( 8X ) PCI Connectors * 3 19,20
*PCI SLOT * 3 VIA VT1617 AC'97 CODEC 21

IDE ATA 66/100 Connectors * 2 22
Front and Rear USB Port 23
LPC I/O W83627THF& ROM & Floppy&Fan 24
KeyBoard/Mouse/LPT/COM Connectors 25
VIA VT6103L 10/100 LAN & VGA Connector 26
ACPI Power Controller (MS-6) 27
B B
System Regulator&Front Panel 28

Decoupling Cap. 29
Power Sequence 30
History 31
Option Parts 32
EMI Parts 33
A A
Micro Star Restricted Secret

Title Re v
Cover Sheet
0A
Document Number MS-7142
Stelly Chang MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Last Revision Date:
Sheet
Wednesday, November 17, 2004
1 of 33
5 4 3 2 1
5 4 3 2 1
Block Diagram
DDR400
CPUCLK+ & CPUCLK-(100/133/166/200) AMD K8 Socket 754
D D
HCLK+ & HCLK-(100/133/166/200) / GCLK(66)
SYSTEM CLOCK
HT DDR * 2
Synthesizer / A
G
ICS950410AF AGPCLK(66)
P AGP 8X /Fast Write
S
L
O
T
VIA
K8M800/K8T800 pro
C C
VCLK(66) / OSC(14) / PCISB(33) / USBCLK(48) / APICCLK(14)

IDE Slot
VLINK ==>ATA66,100,133 *2
Dual ATA 100/133

PCI-33
PCICLK[1~3]
4 PCI Slots
VT8237
B B
LPC BUS
AC97
AC97 => S/W Audio
VIA VT1617
SUPER I/O 2M ROM

W83627THF
USB
MII
LPC
BUS
AC_14(14)
A A
Dual USB 1.1 OHCI

SERIAL ATA *2 10/100 LAN
/2.0 EHCI 8 Ports
VIA VT6103L
==> Front-Port *4 , Micro Star Restricted Secret
Back-Port *4 Title R ev
Block Diagram
0A
SIOPCLK(33)/SIO48M(48) MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, W ednesday, November 17, 2004
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 2 of 33
5 4 3 2 1
5 4 3 2 1
GPIO FUNCTION
LAN_USB1
Default Default
D PIN NAME Function Function define PIN NAME Function Function define USB Port DATA +/- OC# D
GPI0
GPO0 (VDDS) GPO0 NA (VBAT) GPI0 4.7K ohm Pull up to VBAT USB1- USB_OC#1
USB1 USB1+
GPI1 USB0-
GPO1(VDDS) GPO1 NA (VSUS3) GPI1 ATADET0=>Detect IDE1 ATA100/66 USB0+ ( OC#0~1 )
Rear
GPO2/SUSA# GPI2/EXTSMI#
(VDDS) SUSA# 4.7K ohm Pull up to 3VDUAL (VSUS3) EXTSMI# 4.7K ohm Pull up to 3VDUAL USB2- USB_OC#2
USB2+
GPI3/RING# USB3-
GPO3/SUSST#(VDDS) SUSST# SUSST# 4.7K ohm Pull up to 3VDUAL (VSUS3) RING# 4.7K ohm Pull up to 3VDUAL USB3+ ( OC#2~3 )
GPI4/LID#
GPO4/SUSCLK(VDDS) SUSCLK 4.7K ohm Pull up to 3VDUAL (VSUS3) LID# ATADET1=>Detect IDE2 ATA100/66 USB4-
JUSB1 USB4+
USB5-
GPO5/CPUSTP# CPUSTP# 4.7K ohm Pull up to VCC3 GPI5/BATLOW# (VDDS) BATLOW# 4.7K ohm Pull up to 3VDUAL USB5+
Front USB_OC#5
GPO6/PCISTP# PCISTP# 4.7K ohm Pull up to VCC3 GPI6/AGPBZ AGPBZ 4.7K ohm Pull up to VCC3 USB6- ( OC#4~7 )
JUSB2 USB6+
USB7-
GPO7/GNT5 GPO7 2.7K ohm Pull up to VCC3 GPI7/REQ5 GPI7 2.7K ohm Pull up to VCC3 USB7+
* GPO8/GPI8/VGATE GPI8 4.7K ohm Pull up to VCC3 * GPI8/VGATE GPI8 4.7K ohm Pull up to VCC3
C * GPO9/GPI9/UDPWREN UDPWREN NA * GPI9/UDPWREN UDPWREN NA PCI RESET DEVICE C
* GPO10/GPI10/PICD0 GPI10 330 ohm Pull up to VCC3 * GPI10/PICD0 GPI10 330 ohm Pull up to VCC3 Signals Target
PCISLOTRST# PCI slot 1-3
* GPO11/GPI11/PICD1 GPI11 330 ohm Pull up to VCC3 * GPI11/PICD1 GPI11 330 ohm Pull up to VCC3 PCIDEVRST# NB , Super I/O
* GPO12/GPI12/INTE# GPI12 NA * GPI12/INTE# GPI12 NA HD_RST# Primary, Scondary IDE
PCIRST# AGP SLOT
* GPO13/GPI13/INTF# GPI13 NA * GPI13/INTF# GPI13 NA
DDR DIMM Config.

* GPO14/GPI14/INTG# GPI14 NA * GPI14/INTG# GPI14 NA
* GPO15/GPI15/INTH# GPI15 INTH# 2.7K ohm Pull up to VCC3 * GPI15/INTH# GPI15 INTH# 2.7K ohm Pull up to VCC3 DEVICE ADDRESS CLOCK
GPO20/GPI20
/ACSDIN2/PCS0#
GPI20/ACSDIN2
4.7K ohm Pull down
GPI16/INTRUDER#
INTRUDER# 1M ohm Pull up to VBAT MEMCLK_H5/MEMCLK_L5
(VBAT)
GPO21/GPI21/ACSDIN3 GPI21/ACSDIN3 DIMM 1 1010000XB MEMCLK_H0/MEMCLK_L0
/PCS1#/SLPBTN# 4.7K ohm Pull down GPI17/CPUMISS CPUMISS 4.7K ohm Pull up to 3VDUAL MEMCLK_H7/MEMCLK_L7
GPO22/GPI22/GHI# GPI22 4.7K ohm Pull up to VCC3 GPI18/AOLGP1/THRM# AOLGP1 THRMS# 4.7K ohm Pull up to 3VDUAL MEMCLK_H4/MEMCLK_L4
B
DIMM 2 1010001XB MEMCLK_H1/MEMCLK_L1 B
GPO23/GPI23/DPSLP GPI23 4.7K ohm Pull up to VCC3 GPI19/APICCLK APICCLK APICCLK MEMCLK_H6/MEMCLK_L6
GPO24/GPI24 /GPIOA GPI24 4.7K ohm Pull down
GPO25/GPI25 /GPIOB GPI25 4.7K ohm Pull down

GPO26/GPI26/SMBDT2
(VDDS) SMBDT2 4.7K ohm Pull up to 3VDUAL
PCI Config.
GPO27/GPI27/SMBCK2
(VDDS) SMBCK2 4.7K ohm Pull up to 3VDUAL
GPO28/GPI28/VIDSEL
GPO28
/VIDSEL SATA_LED DEVICE MCP1 INT Pin REQ#/GNT# IDSEL CLOCK CLK GEN PIN OUT
GPO29 INTA#
GPO29/GPI29/VRDSLP /VRDSLP 4.7K ohm Pull down INTB# PREQ#0
PCI Slot 1 AD19 PCICLK1 22 (PCICLK5)
GPO30/GPI30 /GPIOC GPI30 4.7K ohm Pull down INTC# PGNT#0
INTD#
GPO31/GPI31 /GPIOD GPI31 4.7K ohm Pull down INTB#
INTC# PREQ#1
PCI Slot 2 AD20 PCICLK2 23 (PCICLK6)
A INTD# PGNT#1 A
INTA#
INTC# Micro Star Restricted Secret
INTD# PREQ#2
PCI Slot 3 AD21 PCICLK3 21 (PCICLK4) Title R ev
INTA# PGNT#2 GPIO Spec. 0A
INTB# Document Number MS-7142
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Wednesday, November 17, 2004
5 4 3 2 1
5 4 3 2 1
C47 VDD_12_A
VREF routed as 40~50 mils trace wide ,
Space>25 mils C0.22U16Y X_C0.22U16Y
X_C1000P50N C159 C196 C171 C158 C182 C350 C172

U6B VTT_DDR_SUS
C58 C0.22U16Y C0.22U16Y C0.22U16Y
AE13 D17 X_C0.22U16Y C0.22U16Y
C1000P50X VTT_SENSE VTT_A4
VTT_A1 A18
8 DDR_VREF VTT_A2 B17
D
AG12 MEMVREF1 VTT_A3 C17 D
VTT_B1 AF16
R70 44.2R1% MEMZN D14 AG16
VDD_25_SUS MEMZN VTT_B2
R71 44.2R1% MEMZP C14 AH16
MEMZP VTT_B3
VTT_B4 AJ17
U6A
Place near CPU in 1" , AG10 VDD_12_A N12-7540031-L06
Routed => 5:10/Trace:Space , MEMRESET_L VLDT0
Same Length VLDT0 5
AE8 MCKE0
MEMCKEA MCKE0 8,9
AE7 MCKE1 D29 AH29
MEMCKEB MCKE1 8,9 VLDT0_A6 VLDT0_B6
MD63 A16 D27 AH27
MD62 MEMDATA63 MEMCLK_H7 VLDT0_A5 VLDT0_B5 C64
B15 MEMDATA62 MEMCLK_H7 D10 MEMCLK_H7 8,9 D25 VLDT0_A4 VLDT0_B4 AG28
MD61 A12 C10 MEMCLK_L7 C28 AG26
MEMDATA61 MEMCLK_L7 MEMCLK_L7 8,9 VLDT0_A3 VLDT0_B3
MD60 B11 E12 MEMCLK_H6 C26 AF29 C4.7U10Y0805
MEMDATA60 MEMCLK_H6 MEMCLK_H6 8,9 VLDT0_A2 VLDT0_B2
MD59 A17 E11 MEMCLK_L6 B29 AE28
MEMDATA59 MEMCLK_L6 MEMCLK_L6 8,9 VLDT0_A1 VLDT0_B1
MD58 A15 AF8 MEMCLK_H5 B27 AF25
MEMDATA58 MEMCLK_H5 MEMCLK_H5 8,9 VLDT0_A0 VLDT0_B0
MD57 C13 AG8 MEMCLK_L5
MEMDATA57 MEMCLK_L5 MEMCLK_L5 8,9
MD56 A11 AF10 MEMCLK_H4 CADIP15 T25 N26 CADOP15
MEMDATA56 MEMCLK_H4 MEMCLK_H4 8,9 11 CADIP[0..15] L0_CADIN_H15 L0_CADOUT_H15 CADOP[0..15] 11
MD55 A10 AE10 MEMCLK_L4 CADIN15 R25 N27 CADON15
MEMDATA55 MEMCLK_L4 MEMCLK_L4 8,9 11 CADIN[0..15] L0_CADIN_L15 L0_CADOUT_L15 CADON[0..15] 11
MD54 B9 V3 CADIP14 U27 L25 CADOP14
MD53 MEMDATA54 MEMCLK_H3 CADIN14 L0_CADIN_H14 L0_CADOUT_H14 CADON14
C7 MEMDATA53 MEMCLK_L3 V4 U26 L0_CADIN_L14 L0_CADOUT_L14 M25
MD52 A6 K5 CADIP13 V25 L26 CADOP13
MD51 MEMDATA52 MEMCLK_H2 CADIN13 L0_CADIN_H13 L0_CADOUT_H13 CADON13
C11 MEMDATA51 MEMCLK_L2 K4 U25 L0_CADIN_L13 L0_CADOUT_L13 L27
MD50 A9 R5 MEMCLK_H1 CADIP12 W27 J25 CADOP12
MEMDATA50 MEMCLK_H1 MEMCLK_H1 8,9 L0_CADIN_H12 L0_CADOUT_H12
MD49 A5 P5 MEMCLK_L1 CADIN12 W26 K25 CADON12
MEMDATA49 MEMCLK_L1 MEMCLK_L1 8,9 L0_CADIN_L12 L0_CADOUT_L12
MD48 B5 P3 MEMCLK_H0 CADIP11 AA27 G25 CADOP11
MEMDATA48 MEMCLK_H0 MEMCLK_H0 8,9 L0_CADIN_H11 L0_CADOUT_H11
MD47 C5 P4 MEMCLK_L0 CADIN11 AA26 H25 CADON11
MEMDATA47 MEMCLK_L0 MEMCLK_L0 8,9 L0_CADIN_L11 L0_CADOUT_L11
MD46 A4 CADIP10 AB25 G26 CADOP10
MD45 MEMDATA46 CADIN10 L0_CADIN_H10 L0_CADOUT_H10 CADON10
E2 MEMDATA45 MEMCS_L7 D8 AA25 L0_CADIN_L10 L0_CADOUT_L10 G27
MD44 E1 C8 CADIP9 AC27 E25 CADOP9
MD43 MEMDATA44 MEMCS_L6 CA DIN9 L0_CADIN_H9 L0_CADOUT_H9 CADON9
C A3 MEMDATA43 MEMCS_L5 E8 AC26 L0_CADIN_L9 L0_CADOUT_L9 F25 C
MD42 B3 E7 CADIP8 AD25 E26 CADOP8
MD41 MEMDATA42 MEMCS_L4 -MCS3 CA DIN8 L0_CADIN_H8 L0_CADOUT_H8 CADON8
E3 MEMDATA41 MEMCS_L3 D6 -MCS3 8,9 AC25 L0_CADIN_L8 L0_CADOUT_L8 E27
MD40 F1 E6 -MCS2 CADIP7 T27 N29 CADOP7
MEMDATA40 MEMCS_L2 -MCS2 8,9 L0_CADIN_H7 L0_CADOUT_H7
MD39 G2 C4 -MCS1 CA DIN7 T28 P29 CADON7
MEMDATA39 MEMCS_L1 -MCS1 8,9 L0_CADIN_L7 L0_CADOUT_L7
MD38 G1 E5 -MCS0 CADIP6 V29 M28 CADOP6
MEMDATA38 MEMCS_L0 -MCS0 8,9 L0_CADIN_H6 L0_CADOUT_H6
MD37 L3 CA DIN6 U29 M27 CADON6
MD36 MEMDATA37 -MSRASA CADIP5 L0_CADIN_L6 L0_CADOUT_L6 CADOP5
L1 MEMDATA36 MEMRASA_L H5 -MSRASA 8,9 V27 L0_CADIN_H5 L0_CADOUT_H5 L29
MD35 G3 D4 -MSCASA CA DIN5 V28 M29 CADON5
MEMDATA35 MEMCASA_L -MSCASA 8,9 L0_CADIN_L5 L0_CADOUT_L5
MD34 J2 G5 CADIP4 Y29 K28 CADOP4
MEMDATA34 MEMWEA_L -MSWEA 8,9 L0_CADIN_H4 L0_CADOUT_H4
MD33 L2 CA DIN4 W29 K27 CADON4
MD32 MEMDATA33 CADIP3 L0_CADIN_L4 L0_CADOUT_L4 CADOP3
M1 MEMDATA32 MEMBANKA1 K3 MEMBANKA1 8,9 AB29 L0_CADIN_H3 L0_CADOUT_H3 H28
MD31 W1 H3 CA DIN3 AA29 H27 CADON3
MEMDATA31 MEMBANKA0 MEMBANKA0 8,9 L0_CADIN_L3 L0_CADOUT_L3
MD30 W3 CADIP2 AB27 G29 CADOP2
MD29 MEMDATA30 CA DIN2 L0_CADIN_H2 L0_CADOUT_H2 CADON2
AC1 MEMDATA29 RSVD_MEMADDA15 E13 MAA[13..0] 8,9 AB28 L0_CADIN_L2 L0_CADOUT_L2 H29
MD28 AC3 C12 CADIP1 AD29 F28 CADOP1
MD27 MEMDATA28 RSVD_MEMADDA14 MAA13 CA DIN1 L0_CADIN_H1 L0_CADOUT_H1 CADON1
W2 MEMDATA27 MEMADDA13 E10 AC29 L0_CADIN_L1 L0_CADOUT_L1 F27
MD26 Y1 AE6 MAA12 CADIP0 AD27 E29 CADOP0
MD25 MEMDATA26 MEMADDA12 MAA11 CA DIN0 L0_CADIN_H0 L0_CADOUT_H0 CADON0
AC2 MEMDATA25 MEMADDA11 AF3 AD28 L0_CADIN_L0 L0_CADOUT_L0 F29
MD24 AD1 M5 MAA10
MD23 MEMDATA24 MEMADDA10 MAA9 CLKOP1
AE1 MEMDATA23 MEMADDA9 AE5 11 CLKIP1 Y25 L0_CLKIN_H1 L0_CLKOUT_H1 J26 CLKOP1 11
MD22 AE3 AB5 MAA8 W25 J27 CLKON1
MEMDATA22 MEMADDA8 11 CLKIN1 L0_CLKIN_L1 L0_CLKOUT_L1 CLKON1 11
MD21 AG3 AD3 MAA7 Y27 J29 CLKOP0
MEMDATA21 MEMADDA7 11 CLKIP0 L0_CLKIN_H0 L0_CLKOUT_H0 CLKOP0 11
MD20 AJ4 Y5 MAA6 Y28 K29 CLKON0
MEMDATA20 MEMADDA6 11 CLKIN0 L0_CLKIN_L0 L0_CLKOUT_L0 CLKON0 11
MD19 AE2 AB4 MAA5
MD18 MEMDATA19 MEMADDA5 MAA4 VLDT0 R37 49.9R1% CTLIP1
AF1 MEMDATA18 MEMADDA4 Y3 R27 L0_CTLIN_H1 L0_CTLOUT_H1 N25
MD17 AH3 V5 MAA3 R41 49.9R1% CTLIN1 R26 P25
MD16 MEMDATA17 MEMADDA3 MAA2 L0_CTLIN_L1 L0_CTLOUT_L1 CTLOP0
AJ3 MEMDATA16 MEMADDA2 T5 11 CTLIP0 T29 L0_CTLIN_H0 L0_CTLOUT_H0 P28 CTLOP0 11
MD15 AJ5 T3 MAA1 R29 P27 CTLON0
MEMDATA15 MEMADDA1 11 CTLIN0 L0_CTLIN_L0 L0_CTLOUT_L0 CTLON0 11
MD14 AJ6 N5 MAA0
B
MD13 MEMDATA14 MEMADDA0 B
AJ7 MEMDATA13 HYPER TRANSPORT - LINK0
MD12 AH9 H4
MEMDATA12 MEMRASB_L -MSRASB 8,9
MD11 AG5 F5
MEMDATA11 MEMCASB_L -MSCASB 8,9
MD10 AH5 F4
MEMDATA10 MEMWEB_L -MSWEB 8,9
MD9 AJ9
MD8 MEMDATA9
AJ10 MEMDATA8 MEMBANKB1 L5 MEMBAKB1 8,9
MD7 AH11 J5
MEMDATA7 MEMBANKB0 MEMBAKB0 8,9
MD6 AJ11
MD5 MEMDATA6
AH15 MEMDATA5 RSVD_MEMADDB15 E14 MAB[13..0] 8,9
MD4 AJ15 D12
MD3 MEMDATA4 RSVD_MEMADDB14 MAB13
AG11 MEMDATA3 MEMADDB13 E9
MD2 AJ12 AF6 MAB12
MD1 MEMDATA2 MEMADDB12 MAB11
AJ14 MEMDATA1 MEMADDB11 AF4
MD0 AJ16 M4 MAB10
MEMDATA0 MEMADDB10 MAB9
MEMADDB9 AD5
R1 AC5 MAB8
10 MD[63..0] MEMDQS17 MEMADDB8
DM7 A13 AD4 MAB7
DM6 MEMDQS16 MEMADDB7 MAB6
A7 MEMDQS15 MEMADDB6 AA5
DM5 C2 AB3 MAB5
H1 MEMDQS13 MEMADDB4 Y4
DM3 AA1 W5 MAB3
AG1 MEMDQS11 MEMADDB2 U5
DM1 AH7 T4 MAB1
AH13 MEMDQS9 MEMADDB0 M3
T1 MEMDQS8
-MDQS7 A14 N3
10 DM[7..0] MEMDQS7 MEMCHECK7
-MDQS6 A8 N1
-MDQS5 MEMDQS6 MEMCHECK6
D1 MEMDQS5 MEMCHECK5 U3
-MDQS4 J1 V1
A AB1 MEMDQS3 MEMCHECK3 N2 A
-MDQS2 AJ2 P1
AJ8 MEMDQS1 MEMCHECK1 U1
-MDQS0 AJ13 U2
MEMDQS0 MEMCHECK0
10 -MDQS[7..0] MEMORY INTERFACE
Title R ev
K8 DDR & HT
0A
5 4 3 2 1
5 4 3 2 1
VDDIO_SENSE
C46
X_C1000P50N
D D
LAYOUT: Route VDDA trace approx. 50 mils wide (use 2x25 mil
VDDA_25 traces to exit ball field) and 500 mils long.
FB7 300L700m_250_0805 CPU_VDDA_25
FB8 THERMDC_CPU
C65 C51 C63
X_120S/0603
C4.7U10Y0805 C0.22U16Y C1000P50X
U6C
AH25 A20 THRM#

VDDA1 THERMTRIP_L THRM# 27
C41 AJ25
X_C1000P50N VDDA2 THERMDA_CPU
THERMDA A26 THERMDA_CPU 24
VDDA_25 AF20 A27 THERMDC_CPU
28 -CPURST RESET_L THERMDC THERMDC_CPU 24
CPU_GD AE18
27 CPU_GD PWROK
AJ27 AG13 VID4
11,18 -LDTSTOP LDTSTOP_L VID4 VID4 14
AF14 VID3
VID3 VID3 14
C R20 VLDT0 R36 44.2R1% L0_REF1 AF27 AG14 VID2 C
4 VLDT0 L0_REF1 VID2 VID2 14
R35 44.2R1% L0_REF0 AE26 AF15 VID1
1KR L0_REF0 VID1 VID1 14
AE15 VID0
VID0 VID0 14
-LDTSTOP C68 A23
14 COREFB_H COREFB_H
C67 A24 AG18 NC_AG18
Place near CPU in 1" , 14 COREFB_L COREFB_L NC_AG18
C1000P50X C1000P50X B23 AH18 NC_AH18
Routed => 5:10/Trace:Space , Differential , "10:10:5:10:10" . CORE_SENSE NC_AH18 NC_AG17
NC_AG17 AG17
Same Length AE12 AJ18 NC_AJ18
VDDIO_SENSE VDDIOFB_H NC_AJ18
AF12 VDDIOFB_L
AE11 VDDIO_SENSE
C55 C392p CLKIN_H
7 CPUCLK0_H
169R1% AJ21
Near CPU in 0.5" . R38 CLKIN_H
VDD_25_SUS C54 C392p CLKIN_L
AH21 CLKIN_L FBCLKOUT_H
LAYOUT: Route
7 CPUCLK0_L FBCLKOUT_H/L differentially
R29 820R NC_AJ23 AJ23 AH19 R43 with 20/8/5/8/20 spacing and
R42 820R NC_AH23 NC_AJ23 G_FBCLKOUT_H 80.6R1%
AH23 AJ19
NC_AH23 G_FBCLKOUT_L trace width. ( In CPU
FBCLKOUT_L breakout => routed 5:5:5 )
AE24 NC_AE24
VTT_DDR_SUS AF24 Zdiff = 80 ohm
NC_AF24
C16 VTT_A5
AG15 VTT_B5
HDT Test Port Signal . AE19 DBREQ_L
DB RDY DBREQ_L
AH17 DBRDY
D20 NC_D20
NC_D20 NC_C21
C15 NC_C15 NC_C21 C21
D18 NC_D18
TMS NC_D18 NC_C19
B
E20 TMS NC_C19 C19 B
TCK E17 B19 NC_B19
TRST_L TCK NC_B19
B21 TRST_L
TDI A21 A22 TDO
TDI TDO
NC_C18 C18 NC_C18
NC_A19 A19 AF18
DBREQ_L R30 X_1KR NC_A19 NC_AF18
DB RDY R31 X_1KR A28
TCK KEY1
1 2 AJ28 KEY0
TMS 3 4 D22
TDI NC_AE23 RSVD_SCL
5 6 AE23 NC_AE23 RSVD_SDA C22
TRST_L 7 8 NC_AF23 AF23
VDDA_25 NC_AF23
NC_AF22 AF22
NC_AF21 NC_AF22
AF21 NC_AF21
RN38 X_8P4R-1KR
C198
C4.7U10Y0805
C1 FREE29
J3 FREE31 FREE26 B13
8
6
4
2 R3 FREE33 FREE28 B7
RN6 AA2 C3
FREE35 FREE30
X_8P4R-1KR D3 FREE1 FREE32 K1
AG2 FREE37 FREE34 R2
B18 FREE4 FREE36 AA3
AH1 F3
7
5
3
1
FREE38 FREE10
AE21 FREE41 FREE18 C23
NC_AH18 1 2 C20 AG7
NC_AJ18 RN10 VDDA_25 VDD_25_SUS FREE7 FREE19
3 4 AG4 FREE11 FREE42 AE22
NC_AG18 5 6 8P4R-1KR C6 C24
NC_AG17 FREE12 FREE24
A 7 8 AG6 FREE13 FREE25 A25 A
NC_D18 1 2 NC_C18 1 2 AE9 C9
NC_B19 NC_A19 FREE14 FREE27
3 4 3 4 AG9 FREE40
NC_C19 5 6 8P4R-1KR NC_C21 5 6 8P4R-1KR
NC_D20 7 8 TDO 7 8 Micro Star Restricted Secret
RN37 RN40
Title R ev
K8 HDT & MISC
0A
5 4 3 2 1
5 4 3 2 1
U6E
B2 VSS1 VSS93 L28

AH20 VSS3 VSS94 R28
AB21 VSS4 VSS95 W28
W22 VSS5 VSS96 AC28
M23 VSS6 VSS97 AF28
L24 VSS7 VSS98 AH28
AG25 VSS8 VSS99 C29
AG27 VSS9 VSS100 F2
D D2 VSS10 VSS101 H2 D
AF2 K2 VCORE VDD_25_SUS
VSS11 VSS102 U6D
W6 VSS12 VSS103 M2
Y7 VSS13 VSS104 P2
AA8 VSS14 VSS105 T2 L7 VDD1 VDDIO1 E4
AB9 VSS15 VSS106 V2 AC15 VDD2 VDDIO2 G4
AA10 VSS16 VSS107 Y2 H18 VDD3 VDDIO3 J4
J12 VSS17 VSS108 AB2 B20 VDD4 VDDIO4 L4
B14 VSS18 VSS109 AD2 E21 VDD5 VDDIO5 N4
Y15 VSS19 VSS110 AH2 H22 VDD6 VDDIO7 U4
AE16 VSS20 VSS111 B4 J23 VDD7 VDDIO8 W4
J18 VSS21 VSS112 AH4 H24 VDD8 VDDIO9 AA4
G20 VSS22 VSS113 B6 F26 VDD9 VDDIO10 AC4
R20 VSS23 VSS114 G6 N7 VDD10 VDDIO11 AE4
U20 VSS24 VSS115 J6 L9 VDD11 VDDIO12 D5
W20 VSS25 VSS116 L6 V10 VDD12 VDDIO13 AF5
AA20
AC20
VSS26 VSS117 N6
R6
G13
K14
VDD13 VDDIO14 F6
H6
LAYOUT: Place 6 EMI caps along bottom right side of Clawhammer,
VSS27 VSS118 VDD14 VDDIO15
AE20 VSS28 VSS119 U6 Y14 VDD15 VDDIO16 K6 2 in middle of HT link, and 12 along bottom left side of
AG20 AA6 AB14 M6
AJ20
VSS29
VSS30
VSS120
VSS121 AC6 G15
VDD16
VDD17
VDDIO17
VDDIO18 P6 Claw-hammer.
D21 AH6 J15 T6 VCORE
F21 VSS32 VSS123 F7 AA15 VDD19 VDDIO20 V6
H21 H7 H16 Y6 C476 C472 C471 C61 C475 C62
<nopop>
<nopop>
K21 K7 K16 AB6
X_C1U16Y
X_C1U16Y
X_C6.8P50N
X_C6.8P50N
X_C6.8P50N
X_C6.8P50N
M21 VSS35 VSS126 M7 Y16 VDD22 VDDIO23 AD6
P21 VSS36 VSS127 P7 AB16 VDD23 VDDIO24 D7
T21 VSS37 VSS128 T7 G17 VDD24 VDDIO25 G7
V21 VSS38 VSS129 V7 J17 VDD25 VDDIO26 J7
Y21 VSS39 VSS130 AB7 AA17 VDD26 VDDIO27 AA7
AD21 VSS40 VSS131 AD7 AC17 VDD27 VDDIO28 AC7
C AG21 B8 AE17 AF7 GND C
B22 VSS42 VSS133 G8 F18 VDD29 VDDIO30 F8
E22 VSS43 VSS134 J8 K18 VDD30 VDDIO31 H8
G22 VSS44 VSS135 L8 Y18 VDD31 VDDIO32 AB8
J22 VSS45 VSS136 N8 AB18 VDD32 VDDIO33 AD8
L22 VSS46 VSS137 R8 AD18 VDD33 VDDIO34 D9
N22 VSS47 VSS138 U8 AG19 VDD34 VDDIO35 G9
R22 W8 E19 AC9 Place between DIMN1 & 2
U22 VSS49 VSS140 AC8 G19 VDD36 VDDIO37 AF9
AG29 VSS50 VSS141 AH8 AC19 VDD39 VDDIO38 F10
AA22 F9 AA19 AD10 VDD_25_SUS
AC22 VSS52 VSS143 H9 J19 VDD37 VDDIO40 D11
AG22 VSS53 VSS144 K9 F20 VDD40 VDDIO41 AF11
AH22 VSS54 VSS145 M9 H20 VDD41 VDDIO42 F12
AJ22 P9 K20 AD12 C154 C128 C149 C180 C132 VDD_25_SUS C129 VTT_DDR_SUS
C0.1U25Y
C0.1U25Y
C0.1U25Y
D23 T9 M20 D13
C0.1U25Y
C0.1U25Y
F23 VSS57 VSS148 V9 P20 VDD44 VDDIO45 AF13
H23 Y9 T20 F14 X_C0.22U16Y
VSS58 VSS149 VDD45 VDDIO46 <nopop>
K23 VSS59 VSS150 AD9 V20 VDD46 VDDIO47 AD14
P23 VSS60 VSS151 B10 Y20 VDD47 VDDIO48 F16
T23 VSS61 VSS152 G10 AB20 VDD48 VDDIO49 AD16
V23 J10 AD20 D15 GND
VSS62 VSS153 VDD49 VDDIO50 VCORE
Y23 VSS63 VSS155 L10 G21 VDD50 VDDIO6 R4
AB23 VSS64 VSS156 N10 J21 VDD51
AD23 VSS65 VSS157 R10 L21 VDD52 VDD96 N28
AG23 VSS66 VSS158 U10 N21 VDD53 VDD97 U28
E24 W10 R21 AA28 VDD_25_SUS
VSS67 VSS159 VDD54 VDD98
G24 VSS68 VSS160 AC10 U21 VDD55 VDD99 AE27
J24 VSS69 VSS161 AH10 W21 VDD56 VDD100 R7
N24 VSS70 VSS162 F11 AA21 VDD57 VDD101 U7
VDD_25_SUS
B
R24
U24
VSS71 VSS163 H11
K11
AC21
F22
VDD58 VDD102 W7
K8
LAYOUT: Place beside processor. B
W24 VSS73 VSS165 Y11 K22 VDD60 VDD104 M8
AA24 AB11 M22 P8 C474 C478 C469
AC24 VSS75 VSS167 AD11 P22 VDD62 VDD106 T8
C0.22U16Y
C4.7U10Y0805
C4.7U10Y0805
C4.7U10Y0805
C1U16Y0805
X_C1U16Y0805
X_C1U16Y0805
<nopop>
<nopop>
AG24 B12 T22 V8 C1U16Y C1U16Y C1U16Y
C1U16Y
C1U16Y
C1000P50X
X_C0.22U16Y
C0.22U16Y
C0.22U16Y
C1U16Y
C73
C211
C85
C95
C107
C245
C168
C199
C248
C142
C135
C92
C165
C230
AJ24 VSS77 VSS169 G12 V22 VDD64 VDD108 Y8
B25 VSS78 VSS170 AA12 Y22 VDD65 VDD109 J9
C25 VSS79 VSS171 AC12 AB22 VDD66 VDD110 N9
B26 VSS80 VSS172 AH12 AD22 VDD67 VDD111 R9
D26 VSS81 VSS173 F13 E23 VDD68 VDD112 U9
H26 H13 G23 W9 BACK
M26 VSS83 VSS175 K13 L23 VDD70 VDD114 AA9
T26 Y13 N23 H10 GND VTT_DDR_SUS GND
Y26 VSS85 VSS177 AB13 R23 VDD72 VDD116 K10
AD26 VSS86 VSS178 AD13 U23 VDD73 VDD117 M10
AF26 VSS87 VSS179 AF17 W23 VDD74 VDD118 P10
AH26 G14 AA23 T10 C467 C188
C27 VSS89 VSS181 J14 AC23 VDD76 VDD120 Y10
B28 AA14 B24 AB10 X_C0.1U25Y X_C0.1U25Y
D28
G28
VSS91 VSS183 AC14
AE14
D24
F24
VDD78 VDD122 G11
J11
In CPU.
VSS92 VSS184 VDD79 VDD123 VCORE
F15 VSS187 VSS185 D16 K24 VDD80 VDD124 AA11
H15 VSS188 VSS186 E15 M24 VDD81 VDD125 AC11
AB17 K15 P24 H12 X_C0.22U16Y
VSS206 VSS189 VDD82 VDD126 GND
AD17 VSS207 VSS190 AB15 T24 VDD83 VDD127 K12
B16 AD15 V24 Y12 C102 C108 C112 C116 C122 C125 C105
G18 VSS209 VSS192 AH14 Y24 VDD85 VDD129 AB12
AA18 E16 AB24 J13 C0.22U16Y C180P50N C8.2P50N X_C0.22U16Y C0.22U16Y C0.22U16Y
AC18 VSS211 VSS195 G16 AD24 VDD87 VDD131 AA13
D19 VSS212 VSS196 J16 AH24 VDD88 VDD132 AC13
A F19 VSS213 VSS197 AA16 AE25 VDD89 VDD133 H14 A
H19 VSS214 VSS198 AC16 K26 VDD90 VDD93 AB26
K19 AE29 P26 E28 C103 C114 C106 C113 C117 C121 C126
Y19 VSS216 VSS223 AJ26 V26 VDD92 VDD95 J28
AB19 E18 C180P50N C180P50N C0.22U16Y C8.2P50N C0.22U16Y X_C0.22U16Y
C8.2P50N
VSS217 VSS201
AD19 VSS218 VSS202 F17 POWER Micro Star Restricted Secret
AF19 VSS219 VSS203 H17
J20 K17 Title R ev
L20
VSS220
VSS221
VSS204
VSS205 Y17 K8 POWER & GND
0A
N20 VSS222
GROUND
GND GND MICRO-STAR INT'L CO.,LTD. Last Revision Date:
5 4 3 2 1
5 4 3 2 1
Clock Synthesizer
VCC3 CLKVCC3
FB21 X_120S/0805 APICCLK C302 X_10P
C322 CP8 C323

C303 C305 C306 C307 C342 C346 C347 C304 CN8
X_104P 104P 104P 104P 104P 104P 104P 104P 104P 7 8
X_COPPER VCLK 5 6
X_4.7u/0805 GCLK_SLOT 3 4
D D
GCLK_NB 1 2
X_8P4C-10P
CLKVCC3
FOR K8T800 Pro USBCLK_SB C295 X_10P

U10
2 41 R138 T_15RST HCLK+ SIO48M C297 X_10P
VDDHTT CPUCLKT0 HCLK+ 11
9 40 R139 T_15RST HCLK-
VDDPCI CPUCLKC0 HCLK- 11
16 37 R140 15RST CPUCLK0_H AC_14 C345 X_10P
VDDPCI CPUCLKT1 CPUCLK0_H 5
19 36 R141 15RST CPUCLK0_L
VDDPCI CPUCLKC1 CPUCLK0_L 5
29 RN70 GUICLK C290 X_10P
AVDD48 LPC_PCLK
35 VDDCPU PCICLK0 13 7 8 LPC_PCLK 24
38 VDDCPU PCICLK1 14 5 6 8P4R-22R SIOPCLK
SIOPCLK 24
43 17 3 4 PCICLK1 SBPCLK C357 X_10P
VDDA PCICLK2 PCICLK1 19
46 18 1 2 PCICLK2
VDDREF PCICLK3 PCICLK2 19
21 R181 22R PCICLK3 PCICLK3 C356 X_10P
PCICLK4 PCICLK3 20
10KR R142 32 22 R182 22R SBPCLK
PD#* PCICLK5 SBPCLK 18
PCICLK6 23
PCICLK7 24
PCICLK10 12
5 CN9
GND RN69 PCICLK2
10 GND 7 8 1 2
15 6 MODEA 5 6 8P4R-22R VCLK PCICLK1 3 4
GND HTTCLK0/ModeA* VCLK 18
20 7 MODEB 3 4 GCLK_SLOT SIOPCLK 5 6
GND PCICLK8/HTTCLK1/ModeB* GCLK_SLOT 15
27 8 HT_66_2 1 2 GCLK_NB LPC_PCLK 7 8
GND PCICLK9/HTTCLK2 GCLK_NB 12
30 GND PCICLK11/HTTCLK3 11
33 GND
C 34 X_8P4C-10P C
GND
39 GND
42 28 SEL_24 R144 33R SIO48M
GND 24_48M/24_48SEL# SIO48M 24
47 31 FS3 R116 22R USBCLK_SB
GND 48MHz/FS3** USBCLK_SB 16
CPUCLK0_H C293 X_5P
25 SMBDATA1 CPUCLK0_L C294 X_5P

SCLK SMBDATA1 8,17,27
26 SMBCLK1
SDATA SMBCLK1 8,17,27
AC_14 22R R180 FS0 1
21 AC_14 *FS0/REF0
APICCLK 22R R136 FS1 48
17,18 APICCLK *FS1/REF1
GUICLK 22R R121 FS2 45 44 R129 10KR
12 GUICLK *FS2/REF2 RESET# HCLK+ C291 T_C10P50N
X1
X2
ICS950405 HCLK- C292 T_C10P50N

3
For K8T800 Pro

CLKX1
CLKX2
Y2
CLK_RESET# 27,28
"FS0~FS3" are all internal
pull-up via 100K ohm .. 14.318MHZ
CLKVCC3 C330 C327
10P50N 10P50N
FS0 R171 10KR
FS2 R132 10KR
FS1 R137 10KR
FS3 R130 10KR
B B
FS(3:0) CPU HTT PCI

MODEA R191 10KR SEL_24 R135 10KR
0000 100.90 67.27 33.63 MODEB R195 10KR
0001 133.90 66.95 33.48

0010 168.00 67.20 33.60
0011 202.00 67.33 33.67
SEL_24 PIN28
0100 100.20 66.80 33.40 MODE A MODE B PIN7 PIN8 PIN11
0 48M
0101 133.50 66.75 33.38 0 0 HTTCLK1 HTTCLK2 PCICLK11
1 24M
0110 166.70 66.68 33.34 0 1 HTTCLK1 HTTCLK2 HTTCLK3
0111 200.40 66.80 33.40 1 0 PCICLK8 PCICLK9 PCICLK11
1000 150.00 60.00 30.00 1 1 HTTCLK1 PCICLK9 PCICLK11
1001 180.00 60.00 30.00
1010 210.00 70.00 35.00
1011 240.00 60.00 30.00
A A
1100 270.00 67.50 33.75
1101 233.33 66.67 33.33
1110 266.67 66.67 33.33
Title R ev
1111 300.00 75.00 37.50 Clock Synthesizer
10A
5 4 3 2 1
5 4 3 2 1
SYSTEM MEMORY
VDD_25_SUS VDD_25_SUS
108
120
148
168
104
112
128
136
143
156
164
172
180
184
108
120
148
168
104
112
128
136
143
156
164
172
180
184
38
46
70
85
22
30
54
62
77
96
15
82
38
46
70
85
22
30
54
62
77
96
15
82
7
7
VDDID
VDDSPD
VDDID
VDDSPD
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
9,10 DR_MD[63..0] DR_MD0 2 157 -MCS0 DR_MD0 2 157 -MCS2
DQ0 CS0# -MCS0 4,9 DQ0 CS0# -MCS2 4,9
DR_MD1 4 158 -MCS1 DR_MD1 4 158 -MCS3
DQ1 CS1# -MCS1 4,9 DQ1 CS1# -MCS3 4,9
DR_MD2 6 71 DR_MD2 6 71
D
DR_MD3 DQ2 CS2# DR_MD3 DQ2 CS2# D
8 DQ3 CS3# 163 8 DQ3 CS3# 163
DR_MD4 94 DR_MD4 94
DR_MD5 DQ4 -DR_MDQS0 DR_MD5 DQ4 -DR_MDQS0
95 DQ5 DQS0 5 -DR_MDQS0 9,10 95 DQ5 DQS0 5
DR_MD6 98 14 -DR_MDQS1 DR_MD6 98 14 -DR_MDQS1
DQ6 DQS1 -DR_MDQS1 9,10 DQ6 DQS1
DR_MD13 106 47 DR_MD13 106 47
DR_MD14 DQ13 DQS8 DR_MD14 DQ13 DQS8
109 DQ14 109 DQ14
DR_MD15 110 103 DR_MD15 110 103
DR_MD16 DQ15 FETEN DR_MD16 DQ15 FETEN
23 DQ16 23 DQ16
DR_MD17 24 48 MAA0 MAA[13..0] DR_MD17 24 48 MAB0
DQ17 A0 MAA[13..0] 4,9 DQ17 A0 MAB[13..0] 4,9
DR_MD18 28 43 MAA1 DR_MD18 28 43 MAB1
DR_MD19 DQ18 A1 MAA2 DR_MD19 DQ18 A1 MAB2
31 DQ19 A2 41 31 DQ19 A2 41
DR_MD20 114 130 MAA3 DR_MD20 114 130 MAB3
117 DQ21 A4 37 117 DQ21 A4 37
DR_MD22 121 32 MAA5 DR_MD22 121 32 MAB5
123 DQ23 A6 125 123 DQ23 A6 125
DR_MD24 33 29 MAA7 DR_MD24 33 29 MAB7
35 DQ25 A8 122 35 DQ25 A8 122
DR_MD26 39 27 MAA9 DR_MD26 39 27 MAB9
40 DQ27 A10_AP 141 40 DQ27 A10_AP 141
DR_MD28 126 118 MAA11 DR_MD28 126 118 MAB11
DQ28 A11 DQ28 A11
DDR DIMM
DDR DIMM
DR_MD29 127 115 MAA12 DR_MD29 127 115 MAB12
131 DQ30 A13 167 131 DQ30 A13 167
DR_MD31 133 DR_MD31 133
DR_MD32 DQ31 DR_MD32 DQ31 MEMBAKB0
C 53 59 MEMBANKA0 4,9 53 59 MEMBAKB0 4,9 C
184
DQ32 BA0 DQ32 BA0
PIN
SOCKET
SOCKET
DR_MD33 55 52 DR_MD33 55 52 MEMBAKB1
MEMBANKA1 4,9 MEMBAKB1 4,9
184
DQ33 BA1 DQ33 BA1
PIN
DR_MD34 57 113 DR_MD34 57 113
DR_MD35 DQ34 BA2 SMBCLK1 DR_MD35 DQ34 BA2 SMBCLK1
60 DQ35 SCL 92 SMBCLK1 7,17,27 60 DQ35 SCL 92
DR_MD36 146 91 SMBDATA1 DR_MD36 146 91 SMBDATA1
DQ36 SDA SMBDATA1 7,17,27 DQ36 SDA
DR_MD37 147 181 DR_MD37 147 181
DR_MD38 DQ37 SA0 DR_MD38 DQ37 SA0 VDD_25_SUS
150 DQ38 SA1 182 150 DQ38 SA1 182
DR_MD39 151 183 DR_MD39 151 183
DR_MD40 DQ39 SA2 DR_MD40 DQ39 SA2
61 DQ40 61 DQ40
DR_MD41 64 44 DR_MD41 64 44
DR_MD42 DQ41 CB0 DR_MD42 DQ41 CB0
68 DQ42 CB1 45 68 DQ42 CB1 45
DR_MD43 69 49 DR_MD43 69 49
153 DQ44 CB3 51 153 DQ44 CB3 51
DR_MD45 155 134 DR_MD45 155 134
161 DQ46 CB5 135 161 DQ46 CB5 135
DR_MD47 162 142 DR_MD47 162 142
72 DQ48 CB7 144 72 DQ48 CB7 144
DR_MD49 73 DR_MD49 73
DR_MD50 DQ49 MEMCLK_H5 DR_MD50 DQ49
79 DQ50 CK0(DU) 16 MEMCLK_H5 4,9 79 DQ50 CK0(DU) 16 MEMCLK_H4 4,9
DR_MD51 80 17 MEMCLK_L5 DR_MD51 80 17
DQ51 CK0#(DU) MEMCLK_L5 4,9 DQ51 CK0#(DU) MEMCLK_L4 4,9
DR_MD52 165 137 MEMCLK_H0 DR_MD52 165 137
DQ52 CK1(CK0) MEMCLK_H0 4,9 DQ52 CK1(CK0) MEMCLK_H1 4,9
DQ53 CK1#(CK0#) MEMCLK_L0 4,9 DQ53 CK1#(CK0#) MEMCLK_L1 4,9
DR_MD54 170 76 MEMCLK_H7 DR_MD54 170 76
DQ54 CK2(DU) MEMCLK_H7 4,9 DQ54 CK2(DU) MEMCLK_H6 4,9
DQ55 CK2#(DU) MEMCLK_L7 4,9 DQ55 CK2#(DU) MEMCLK_L6 4,9
DR_MD56 83 DR_MD56 83
DR_MD57 DQ56 DR_MD57 DQ56
84 DQ57 NC5 173 84 DQ57 NC5 173
DR_MD58 87 10 DR_MD58 87 10
DR_MD59 DQ58 NC(RESET#) DR_MD59 DQ58 NC(RESET#)
88 DQ59 88 DQ59
DR_MD60 174 21 MCKE0 DR_MD60 174 21 MCKE0
DQ60 CKE0 MCKE0 4,9 DQ60 CKE0
DR_MD61 175 111 MCKE1 DR_MD61 175 111 MCKE1
B DQ61 CKE1 MCKE1 4,9 DQ61 CKE1 B
DR_MD62 178 65 -MSCASA DR_MD62 178 65 -MSCASB
DQ62 CAS# -MSCASA 4,9 DQ62 CAS# -MSCASB 4,9
VDD_25_SUS DR_MD63 179 154 -MSRASA VDD_25_SUS DR_MD63 179 154 -MSRASB
DQ63 RAS# -MSRASA 4,9 DQ63 RAS# -MSRASB 4,9
R106 4.7KR WP1 90 97 DR_DM0 R109 4.7KRWP2 90 97 DR_DM0
-MSWEA WP(NC) DM0 DR_DM1 -MSWEB WP(NC) DM0 DR_DM1
4,9 -MSWEA 63 WE# DM1 107 4,9 -MSWEB 63 WE# DM1 107
119 DR_DM2 119 DR_DM2
DDR_VREF DM2 DR_DM3 DDR_VREF DM2 DR_DM3
1 VREF DM3 129 1 VREF DM3 129
149 DR_DM4 149 DR_DM4
VREF routed as 40~50 C39 DM4 DR_DM5 DM4 DR_DM5
9 NC2 DM5 159 9 NC2 DM5 159
mils trace wide , 101 169 DR_DM6 101 169 DR_DM6
Space>25 mils C0.1U25Y NC3 DM6 DR_DM7 NC3 DM6 DR_DM7
102 NC4 DM7 177 102 NC4 DM7 177
140 140
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
DM8 DM8
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
DDR1 DDR2
3
11
18
26
34
42
50
58
66
74
81
89
93
100
116
124
132
139
145
152
160
176
3
11
18
26
34
42
50
58
66
74
81
89
93
100
116
124
132
139
145
152
160
176
DIMM-184_green DIMM-184_green
Place 104p and 1000p Cap. near the DIMM N13-1840061-K06 N13-1840061-K06
Place near the DIMM

VREF routed as 40~50 mils trace wide , DR_DM[7..0]
VDD_25_SUS DR_DM[7..0] 9,10
DIMM2 SLAVE ADDRESS
Space>25 mils
= (1010001X)B = A2
DIMM1 SLAVE ADDRESS
R19
1KR1% C466 = (1010000X)B = A0
A X_C0.1U25Y A
DDR_VREF
DDR_VREF 4
R18 C38
1KR1% Title R ev
C1U10Y System Memory : DDR DIMM 1 0A
5 4 3 2 1
5 4 3 2 1
DDR Terminations
VTT_DDR_SUS
VTT_DDR_SUS VTT_DDR_SUS
RN46 8P4R-47R0402
DR_MD44 7 8 RN25 8P4R-47R0402
DR_MD35 5 6 DR_MD23 7 8
DR_MD40 3 4 MAB8 5 6
DR_MD39 1 2 MAB7 3 4
D D
DR_MD22 1 2 VTT_DDR_SUS
RN43 8P4R-47R0402
RN63 8P4R-47R0402 DR_MD38 7 8 RN22 8P4R-47R0402
DR_MD59 7 8 DR_MD34 5 6 MAA11 7 8
DR_MD63 5 6 DR_DM4 3 4 MAB11 5 6
DR_MD62 3 4 -DR_MDQS4 1 2 MAB9 3 4
DR_MD58 1 2 DR_MD21 1 2
RN51 8P4R-47R0402
-MCS3 7 8
4,8 -MCS3
RN39 8P4R-47R0402 -MCS2 5 6
4,8 -MCS2
RN61 8P4R-47R0402 DR_MD36 7 8 RN23 8P4R-47R0402 -MSCASB 3 4
4,8 -MSCASB
-DR_MDQS7 7 8 DR_MD32 5 6 DR_MD18 7 8 -MSWEA 1 2
4,8 -MSWEA
DR_DM7 5 6 3 4 MAA7 5 6
4,8 MEMBAKB1
DR_MD57 3 4 1 2 MAA9 3 4
4,8 MEMBANKA1
DR_MD61 1 2 DR_DM2 1 2
RN36 8P4R-47R0402
MAB0 7 8
RN59 8P4R-47R0402 MAB10 5 6 RN20 8P4R-47R0402
DR_MD60 7 8 MAA10 3 4 -DR_MDQS2 7 8
DR_MD56 5 6 MAA0 1 2 DR_MD17 5 6
DR_MD51 3 4 MAA12 3 4
DR_MD55 1 2 MAB12 1 2
RN34 8P4R-47R0402
MAA2 7 8
RN57 8P4R-47R0402 MAB2 5 6 RN18 8P4R-47R0402
C DR_MD50 7 8 DR_MD30 3 4 DR_MD16 7 8 C
DR_MD54 5 6 MAA3 1 2 DR_MD11 5 6
-DR_MDQS6 3 4 3 4
4,8 MCKE0
DR_DM6 1 2 1 2
4,8 MCKE1
RN29 8P4R-47R0402
MAA4 7 8
MAA6 5 6
RN55 8P4R-47R0402 MAB6 3 4 RN16 8P4R-47R0402
MAA13 7 8 MAB5 1 2 DR_MD20 7 8
MAB13 5 6 DR_MD10 5 6
DR_MD53 3 4 DR_MD15 3 4
DR_MD52 1 2 RN32 8P4R-47R0402 DR_MD14 1 2
DR_MD26 7 8
DR_DM3 5 6
-DR_MDQS3 3 4
RN54 8P4R-47R0402 DR_MD25 1 2 RN15 8P4R-47R0402
DR_MD48 7 8 DR_DM1 7 8
DR_MD49 5 6 DR_MD13 5 6
DR_MD47 3 4 -DR_MDQS1 3 4
DR_MD46 1 2 RN31 8P4R-47R0402 DR_MD12 1 2
DR_MD29 7 8
DR_MD28 5 6
MAB3 3 4
RN52 8P4R-47R0402 MAB4 1 2 RN11 8P4R-47R0402
DR_MD43 7 8 DR_MD9 7 8
DR_MD42 5 6 DR_MD8 5 6
DR_DM5 3 4 DR_MD3 3 4
DR_MD41 1 2 RN28 8P4R-47R0402 DR_MD6 1 2
MAA5 7 8
MAA8 5 6
B B
DR_MD24 3 4
RN49 8P4R-47R0402 DR_MD19 1 2
-MCS1 7 8 RN8 8P4R-47R0402
4,8 -MCS1
-MCS0 5 6 DR_MD7 7 8
4,8 -MCS0
-DR_MDQS5 3 4 DR_MD2 5 6
-MSCASA 1 2 DR_DM0 3 4
4,8 -MSCASA
-DR_MDQS0 1 2
RN47 8P4R-47R0402
-MSWEB 7 8 RN4 8P4R-47R0402
4,8 -MSWEB
DR_MD45 5 6 DR_MD1 7 8
-MSRASB 3 4 DR_MD5 5 6
4,8 -MSRASB
-MSRASA 1 2 DR_MD4 3 4
4,8 -MSRASA
DR_MD0 1 2
RN41 8P4R-47R0402 RN35 8P4R-47R0402

DR_MD37 7 8 DR_MD27 7 8
5 6 DR_MD31 5 6
4,8 MEMBAKB0
3 4 MAB1 3 4
4,8 MEMBANKA0
DR_MD33 1 2 MAA1 1 2
DR_DM[7..0]
8,10 DR_DM[7..0]
A A
For DIMM2 Clock -DR_MDQS[7..0]
8,10 -DR_MDQS[7..0]
For DIMM1 Clock
MEMCLK_H4 C70 MEMCLK_L4

X_C10P50N MEMCLK_H5 C71 MEMCLK_L5
X_C10P50N DR_MD[63..0]
4,8 MEMCLK_H4 MEMCLK_L4 4,8 4,8 MEMCLK_H5 MEMCLK_L5 4,8 8,10 DR_MD[63..0]
Title R ev
4,8 MEMCLK_H1
MEMCLK_H1 C115 X_C10P50N
MEMCLK_L1
MEMCLK_L1 4,8 4,8 MEMCLK_H7
MEMCLK_L7
MEMCLK_L7 4,8 4,8 MAB[13..0]
MAB[13..0] DDR Terminations Bank 0 0A
4,8 MEMCLK_H6
MEMCLK_L6
MEMCLK_L6 4,8 4,8 MEMCLK_H0
MEMCLK_L0
MEMCLK_L0 4,8 4,8 MAA[13..0]
MAA[13..0] Document Number MS-7142
5 4 3 2 1
5 4 3 2 1
VDD_25_SUS VCC3
LAYOUT: Place on backside, LAYOUT: Locate close
C266
MD38 R81 10R0402 DR_MD38 evenly spaced around VTT fill. to Clawhammer
socket. X_C0.1U25Y
C208
RN42 8P4R-10R0402
1 2 VDD_25_SUS VTT_DDR_SUS VTT_DDR_SUS
X_C0.1U25Y
DDR Terminations
MD32 3 4 DR_MD32 C221 C90
MD36 5 6 DR_MD36 VCC
MD33 7 8 DR_MD33
C1000P50X X_C0.1U25Y
<nopop>
RN44 8P4R-10R0402 C50 C21
-MDQS0 R32 10R0402 -DR_MDQS0 MD37 1 2 DR_MD37 +
D D
-MDQS4 3 4 -DR_MDQS4
DM4 DR_DM4 X_C0.22U16Y EC23 X_C0.1U25Y
5 6 <nopop>
MD34 7 8 DR_MD34 C239 .CD1000U6.3EL15 C195
RN5 8P4R-10R0402
MD0 1 2 DR_MD0
MD4 DR_MD4 MD42 R82 10R0402 DR_MD42 X_C0.22U16Y X_C0.1U25Y
3 4 <nopop>
MD5 5 6 DR_MD5 GND C37
MD1 7 8 DR_MD1 RN45 8P4R-10R0402
MD39 1 2 DR_MD39
RN9 8P4R-10R0402 MD40 DR_MD40 X_C0.22U16Y
C156 X_C0.1U25Y
3 4 <nopop>
DM0 1 2 DR_DM0 MD35 5 6 DR_MD35 GND
MD2 3 4 DR_MD2 MD44 7 8 DR_MD44
MD7 5 6 DR_MD7 VDD_25_SUS
MD6 7 8 DR_MD6 RN50 8P4R-10R0402 VDD_25_SUS VTT_DDR_SUS VDD_25_SUS VTT_DDR_SUS VDD_25_SUS VTT_DDR_SUS VDD_25_SUS VTT_DDR_SUS
MD45 1 2 DR_MD45 C91 C232 C257 C104 C204
RN12 8P4R-10R0402 -MDQS5 3 4 -DR_MDQS5
MD3 1 2 DR_MD3 MD41 5 6 DR_MD41
MD8 DR_MD8 DM5 DR_DM5 X_C0.1U25Y X_C0.1U25Y C0.1U25Y X_C0.1U25Y C0.1U25Y
3 4 7 8
MD9 5 6 DR_MD9 C148 C237 C187 C272 C110
MD12 7 8 DR_MD12
RN53 8P4R-10R0402 C0.1U25Y C0.1U25Y X_C0.1U25Y C0.1U25Y C0.1U25Y

MD15 R54 10R0402 DR_MD15 MD43 1 2 DR_MD43 C33 C176 C215 C76 C163
MD46 3 4 DR_MD46
RN13 8P4R-10R0402 MD47 5 6 DR_MD47
-MDQS1 1 -DR_MDQS1 MD49 DR_MD49 X_C0.1U25Y X_C0.1U25Y X_C0.1U25Y X_C0.1U25Y C0.1U25Y
2 7 8
MD13 3 4 DR_MD13 C243 C35 C164 C123 C252
DM1 5 6 DR_DM1 RN56 8P4R-10R0402
MD14 7 8 DR_MD14 MD48 1 2 DR_MD48
MD52 DR_MD52 X_C0.1U25Y X_C0.1U25Y C0.1U25Y X_C0.1U25Y C0.1U25Y
C 3 4 C
RN21 8P4R-10R0402 MD53 5 6 DR_MD53 C236
C205 C59 C139 C200
MD17 1 2 DR_MD17 DM6 7 8 DR_DM6
-MDQS2 -DR_MDQS2 C0.1U25Y
3 4
MD21 DR_MD21 X_C0.1U25Y X_C0.1U25Y X_C0.1U25Y C0.1U25Y
5 6 C162
DM2 7 8 DR_DM2 MD51 R97 10R0402 DR_MD51 C262 C250 C143 C220
C0.1U25Y
MD18 R55 10R0402 DR_MD18 C0.1U25Y X_C0.1U25Y C0.1U25Y C0.1U25Y
C222
C228 C97
RN17 8P4R-10R0402 RN58 8P4R-10R0402
MD10 DR_MD10 -MDQS6 1 -DR_MDQS6 X_C0.1U25Y
1 2 2
MD20 DR_MD20 MD54 DR_MD54 X_C0.1U25Y C0.1U25Y
3 4 3 4 C265
MD11 5 6 DR_MD11 MD50 5 6 DR_MD50
MD16 7 8 DR_MD16 MD55 7 8 DR_MD55
C0.1U25Y
RN26 8P4R-10R0402 RN60 8P4R-10R0402
MD22 1 2 DR_MD22 MD56 1 2 DR_MD56
LAYOUT: Place alternating caps to GND and VDD_2.5_SUS in a single line along VTT island. GND
MD23 3 4 DR_MD23 MD60 3 4 DR_MD60
MD19 5 6 DR_MD19 MD61 5 6 DR_MD61
MD24 7 8 DR_MD24 MD57 7 8 DR_MD57
VTT_DDR_SUS
RN30 8P4R-10R0402 RN62 8P4R-10R0402
MD28 1 2 DR_MD28 DM7 1 2 DR_DM7
MD29 3 4 DR_MD29 -MDQS7 3 4 -DR_MDQS7
MD25 5 6 DR_MD25 MD58 5 6 DR_MD58
C1U10Y
C1U10Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
C1U10Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
C1U10Y
C1U10Y
X_C0.1U25Y
X_C0.1U25Y
C94
C229
C234
C226
C40
C255
C179
C152
C27
C131
C83
C89
C241
C169
C253
C192
C197
C1U10Y
-MDQS3 7 8 -DR_MDQS3 MD62 7 8 DR_MD62
RN33 8P4R-10R0402
MD26 1 2 DR_MD26
B B
MD30 3 4 DR_MD30
MD31 5 6 DR_MD31
MD27 7 8 DR_MD27 MD59 R105 10R0402 DR_MD59 GND
VTT_DDR_SUS
MD63 R103 10R0402 DR_MD63 C1U10Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
C1U10Y
C1U10Y
X_C0.1U25Y
C0.1U25Y
X_C0.1U25Y
C1U10Y
C1U10Y
X_C0.1U25Y
X_C0.1U25Y
C1U10Y
C0.1U25Y
C0.1U25Y
C69
C127
C224
C246
C134
C140
C57
C101
C111
C118
C80
C203
C209
C210
C218
C271
C219
DM3 R58 10R0402 DR_DM3
GND
VTT_DDR_SUS
LAYOUT: Locate close to
Clawhammer socket. VDD_25_SUS
LAYOUT: Locate close to
Dimm2 socket.
C1U16Y0805
C0.22U16Y
-MDQS[7..0]
4 -MDQS[7..0]
C1U16Y0805
X_C4.7U10Y0805
X_C0.22U16Y
C1000P50X
X_C100P50N
-DR_MDQS[7..0]
8,9 -DR_MDQS[7..0]
C0.1U25Y
C0.1U25Y
C0.1U25Y
C0.1U25Y
C82
C335
C60
C173
C12
C48
C56
C145
DR_MD[63..0]
C3
C7
8,9 DR_MD[63..0]
C9
MD[63..0]
4 MD[63..0]
A VTT_DDR_SUS GND A
GND
X_C4.7U10Y0805
X_C4.7U10Y0805
X_C1000P50N
X_C1000P50X
C1U16Y0805
C1U16Y0805
X_C1000P50X
C1000P50X
C0.22U16Y
DR_DM[7..0]
8,9 DR_DM[7..0]
Title R ev
C32
C216
C261
C186
DDR Terminations Bank 1

C45
C191
C259
C6
DM[7..0]
4 DM[7..0] 0A
C160

GND No. 69, Li-De St, Jung-He City, Wednesday, November 17, 2004
5 4 3 2 1
A B C D E
VDD_12_A
FOR K8M800 FOR K8T800pro C202 C0.1U25Y

VDD_12_A
VCC3 VCC3HCK Around NB

FB14 T_0R
R292 R293 R92 R294
4
C242 C238 CB14 4
M_0R M_0R M_0R M_0R

T_C1000P50X X_C1000P50X
VCC3HCK VDD_12_A HCKGNDR295 T_0R 5020
7 HCLK-
HCKGND X_C1U10Y
7 HCLK+
AVDD2
To Claw Hammer
G21
G22
C22
C10
C11
C23
C24
C25
D10
D11
D22
D23
D24
H21
A10
A24
A25
A26
B10
B23
B24
B25
B26
E10
E11
E21
E22
E23
E24
K18
K21
F10
F11
F15
F16
F19
F20
F21
F22
F23
L18
J10
J11
J12
J13
J14
J15
J16
J17
C9
D9
A9
B9
E9
U7A
From Claw Hammer
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
AVDD2
CADOP0 T26 B12 CADIP0
4 CADOP[0..15] RCADP0 TCADP0 CADIP[0..15] 4
CADOP1 P24 A13 CADIP1
CADOP2 RCADP1 TCADP1 CADIP2 VDD_12_A
P26 RCADP2 TCADP2 B14
CADOP3 M24 A15 CADIP3
CADOP4 RCADP3 TCADP3 CADIP4
K24 RCADP4 TCADP4 A17
CADOP5 K26 B18 CADIP5 PNCOMP R78 49.9R1%
H24 RCADP6 TCADP6 A19
CADOP7 H26 B20 CADIP7 RTCOMP R80 100R1%
R24 RCADP8 TCADP8 E12
CADOP9 R22 D13 CADIP9 RPCOMP R79 49.9R1%
N24 RCADP10 TCADP10 E14
CADOP11 N22 D15 CADIP11
3 L22 RCADP12 TCADP12 D17 3
CADOP13 J24 E18 CADIP13

J22 RCADP14 TCADP14 D19
CADOP15 G24 E20 CADIP15
RCADP15 TCADP15
CLKOP0 M26 B16 CLKIP0
4 CLKOP0 RCLKP0 TCLKP0 CLKIP0 4
CLKOP1 L24 E16 CLKIP1
4 CLKOP1 RCLKP1 TCLKP1 CLKIP1 4
CTLOP0 F24 A21 CTLIP0
4 CTLOP0 RCTLP TCTLP CTLIP0 4
CADON0 R26 C12 CADIN0
4 CADON[0..15] RCADN0 TCADN0 CADIN[0..15] 4
CADON1 P25 A14 CADIN1
CADON2 RCADN1 TCADN1 CADIN2
N26 RCADN2 TCADN2 C14
CADON3 M25 A16 CADIN3
K25 RCADN4 TCADN4 A18
CADON5 J26 C18 CADIN5
H25 RCADN6 TCADN6 A20
CADON7 G26 C20 CADIN7
R23 RCADN8 TCADN8 E13
CADON9 P22 C13 CADIN9
N23 RCADN10 TCADN10 E15
CADON11 M22 C15 CADIN11
K22 RCADN12 TCADN12 C17
CADON13 J23 E19 CADIN13
H22 RCADN14 TCADN14 C19
CADON15 G23 D21 CADIN15
RCADN15 TCADN15
CLKON0 L26 C16 CLKIN0
4 CLKON0 RCLKN0 TCLKN0 CLKIN0 4
CLKON1 L23 E17 CLKIN1
2
4 CLKON1 RCLKN1 TCLKN1 CLKIN1 4 2
CTLON0 F25 A22 CTLIN0

4 CTLON0 RCTLN TCTLN CTLIN0 4
-LDTRST B11 VDD_12_A
28 -LDTRST LDTRST
-LDTSTOP A12
5,18 -LDTSTOP LDTSTP
VLDT L21
RPCOMP D25 M18
PNCOMP RPCOMP VLDT
D26 RNCOMP VLDT N18
RTCOMP C26 N21
RTCOMP VLDT
VLDT P18
VDD_12_A P21
VLDT
VLDT R18
U24 VLDT VLDT T18
U25 VLDT VLDT T21
U26 VLDT VLDT T22
V21 VLDT VLDT T23
V22 VLDT VLDT T24
V23 VLDT VLDT T25
V24 VLDT VLDT U18
V25 VLDT VLDT U21
V26 VLDT VLDT U22
VLDT U23
AGND2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C21
A23
A8
B8
B13
B15
B17
B19
B21
B22
C8
D6
D8
D12
D14
D16
D18
D20
E5
E6
E8
F7
F8
F12
F13
F14
F17
F18
F26
G1
G25
H1
H2
H23
J18
J2
J3
J21
J25
K4
K10
K11
K12
K13
K14
K15
K16
K17
K23
L10
L11
L12
L13
L14
L15
1
(VIA-K8M800-VT8380) 1

Title R ev
NORTH BRIDGE (HT) 0A
A B C D E
A B C D E
K8M800/K8T800pro AGP 8X ,V-Link, Misc. Control FOR K8T800pro

VCC3 VCCA3
K8M800:0Ohm;K8T800 pro:bead
FB18
T_0R VCC2_5
VDDQ VDD3 VCCA3 C273 C269 CB15
X_C1000P50X X_C1000P50X
C1U10Y C249
R99
M9
M5
G5
G4
G3
G2
U1
R9
N9
N5
H5
H4
H3
D1
3KR1% C0.1U25Y
P9
K9
K8
K5
E4
E3
E2
E1
F6
F5
F4
F3
F2
F1
L9
L8
L5
4 4
J9
J5
J4
U7B
LVREF_NB
VCCQQ
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
GAD0 AF18
15 GAD[31..0] GD0/FPD10 VLAD[0..7] 18
GAD1 AD18 AD20 VLAD0
GAD2 GD1/FPD11 VD0 VLAD1 C254
AE18 GD2/FPDVICLK VD1 AD21
GAD3 AF17 AF24 VLAD2 R101
GAD4 GD3/FPD09 VD2 VLAD3 1KR1% C0.1U25Y
AD17 GD4/FPD08 VD3 AE24
GAD5 AD16 AE19 VLAD4
GAD6 GD5/FPD07 VD4 VLAD5
AE16 GD6/FPD06 VD5 AF20
GAD7 AF16 AD24 VLAD6
GAD8 GD7/FPD05 VD6 VLAD7
AF14 GD8/FPDVIDET VD7 AF25
GAD9 AD14 K8M800 and K8T800pro will be 0.625V(R153=1KST,R11-0102T13-Y01)
GAD10 GD9/FPDVIHS
AD13 GD10/FPD01 VBE AE21 VBE0# 18
GAD11 AE13 AF19
GD11/FPD23 VPAR VPAR 18
GAD12 AF13
GAD13 GD12/FPD00
AD12 GD13/FPD22 UPSTB AE23 UPSTB 18
GAD14 AF12 AF23 LAYOUT: Place caps on the bottom of NB
GD14/FPD21 UPSTB UPSTB# 18
GAD15 AE12
GAD16 GD15/FPD20
AD10 GD16/FPD18 DNSTB AF22 DNSTB 18
GAD17 AE10 AD22 VDDQ
GD17/FPD17 DNSTB DNSTB# 18
GAD18 AF10
GAD19 GD18/FPD16
AD9 GD19/FPDE UPCMD AF26 UPCMD 18
GAD20 AF9 AD23 C489 X_C0.1U25Y
GD20/FPD14 DNCMD DNCMD 18
GAD21 AF8
GAD22 GD21/FPCLK LVREF_NB C258
AE9 GD22/FPD13 LVREF AF21
GAD23 AD8
GAD24 GD23/FPD15 LCOMPP X_C1000P50N
AF6 GD24/DVP1D09 LCOMPP AD19
GAD25 AD7
3
GAD26 GD25 3
AE6 GD26/DVP1D10 PWRGD AE26 PWROK_NB# 17

GAD27 AD5
GAD28 GD27 C491 X_C1U16Y
AF5 GD28/DVP1D07 PCIRST AD25 PCIDEVRST# 24,27
GAD29 AF4
GAD30 GD29/DVP1D06 TESTIN C492 X_C0.1U25Y
AE4 GD30/DVP1D08 TESTIN AC26
GAD31 AD4 GD31/DVP1D04 C487 X_C1U10Y
SUSTAT AD26 SUSST# 17
GC/BE#0 AD15
15 GC/BE#[3..0] GCBE0/FPD03
GC/BE#1 AF11 AC17 DEBUG R94 10KR
GC/BE#2 GCBE1/SB_DA DEBUG
AD11 GCBE2/FPD19
GC/BE#3 AC7 GCBE3/DVP1D11
AD_STBS0 AF15 B3
15 AD_STBS0 ADSTB0S/FPD02 AR/NC AR 26
AD_STBF0 AE15 A3
15 AD_STBF0 ADSTB0F/FPD04 AG/NC AG 26
AB/NC A2 AB 26
AD_STBS1 AF7
15 AD_STBS1 ADSTB1S/FPDET
AD_STBF1 AE7 C4 RSET R110 M_90.9R1%
15 AD_STBF1 ADSTB1F/FPD12 RSET/NC
HSYNC/NC A1 HSYNC 26
15 GFRAME AC9 GFRAME/FPHS VSYNC/NC B1 VSYNC 26
15 GIRDY AC10 GIRDY/SB_CK
For K8M800.
15 GTRDY AC14 GTRDY XIN/NC C6 GUICLK 7
15 GDEVSEL AC11 GDEVSEL/FPVS
15 GSTOP AC12 GSTOP/FPDVICLK_N INTA/NC E7 PIRQ#A 15,16,19,20
15 GPAR AC16 GPAR/FPDVIVS BISTIN/NC D3
AD6 R107 M_1KR
15 RBF RBF
15 WBF AC1 WBF/FPCLK_N SPCLK1/NC P2 LAYOUT: Place caps as close NB as possible
15 GREQ Y1 GREQ/DVI_DDCCK SPCLK2/NC C2 DDCCLK 26
15 GGNT AA3 GGNT/DVI_DDCDA SPD1/NC P1
2
15 GSERR AC15 GSERR/FPDVIDE SPD2/NC C1 DDCDATA 26 FOR K8M800 -- AN307B 2
R102 M_100KR
7 GCLK_NB A11 GCLK TVD00/DVP0D00/NC J1
TVD01/DVP0D01/NC K2
SBA0 AC2 K3 AGPVREF_GC C488 C10U/10Y
15 SBA[7..0] SBA0/DVP1VS TVD02/DVP0D02/NC
SBA1 AC3 L4
SBA2 SBA1/DVP1DE TVD03/DVP0D03/NC C256 C0.1U25Y
AD1 SBA2/DVP1D00 TVD04/DVP0D04/NC K1
SBA3 AD2 L2
SBA4 SBA3/DVP1HS TVD05/DVP0D05/NC
AF2 SBA4/DVP1D05 TVD06/DVP0D06/NC L3
SBA5 AD3 M4
SBA6 SBA5/DVP1D03 TVD07/DVP0D07/NC
AE3 SBA6/DVP1CLK TVD08/DVP0D08/NC L1
SBA7 AF3 M2
SBA7/DVP1CLK_N TVD09/DVP0D09/NC VCC2_5
TVD10/DVP0D10/NC M3
SB_STBS AE1 M1
15 SB_STBS SB_STBS/DVP1D02 TVD11/DVP0D11/NC
SB_STBF AF1 TESTIN R100 4.7KR
15 SB_STBF SB_STBF/DVP1D01
TVCLKIN/DVP0DET/NC P4
ST0 AA2 N1 VPAR R224 X_8.2KR
15 ST0 ST0 TVDE/DVP0DE/NC
ST1 AA1 N4
15 ST1 ST1/DVP1DET TVHS/DVP0HS/NC
ST2 AB1 N3
15 ST2 ST2 TVVS/DVP0VS/NC VDDQ
AGPPCOMP V1 P3
AGPNCOMP AGPPCOMP TVCLK/DVP0DCLK/NC AGPNCOMP R133 60.4R1%
W1 AGPNCOMP
AGPVREF_GC AC13 N2 AGPPCOMP R131 60.4R1%
15 AGPVREF_GC AGPVREF0 GPO0/NC
AC6 AGPVREF1 GPOUT/NC D2
Y2 LCOMPP R96 360R1%

15 AGP8XDET# AGP8XDET
1 1
DBIL
VSSQQ
15 DBIL AC4 DBIL

DB IH AC5
15 DBIH
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DBIH
T1
R15
R14
R13
R12
R11
R10
R5
R4
R3
R2
R1
P23
P17
P16
P15
P14
P13
P12
P11
P10
P5
N25
N17
N16
N15
N14
N13
N12
N11
N10
M23
M21
M17
M16
M15
M14
M13
M12
M11
M10
L25
L17
L16
Title R ev
NORTH BRIDGE (AGP & VLINK) 0A
(VIA-K8M800-VT8380) No. 69, Li-De St, Jung-He City, Wednesday, November 17, 2004
A B C D E
A B C D E
C247
VSUSNB
AC25
U7C
AA4
VDDQ
Power and Ground Connections For K8M800 Only
C1U10Y VSUS15/VSUS25 VCC1 VDDQ RGBPLL
VCC1 AA5
AVDD1 AB11
VCC1 FB17
VCC1 AB12 LAYOUT : Popualte caps on the bottom side
E25 AB13 M_0R
E26
AVDD1 VCC1
AB14
of NB. C264 C263 CB3
AGND1 VCC1 VDDQ
VCC1 AB7
4 AB8 M_C1000P50XM_C1U10Y
M_C1U16Y0805 4
VCC1 VDD_12_A FB15 X_0
VCC1 M8
RGBPLL N8 C482 X_C1U10Y
VCC1 C479 X_C1U10Y CP6 GND_RGBPLL
VCC1 T2
D5 VCCPLL1/NC VCC1 T3
A5 VCCPLL2/NC VCC1 T4
C5 T5 C486 X_C1000P50N X_COPPER
GNDPLL1/NC VCC1 C480 X_C0.22U16Y
B5 GNDPLL2/NC VCC1 T8
T9 C484 X_C1U10Y VDD3 DAC_PLL
GND_RGBPLL VCC1
VCC1 U2
U3 FB16 M_0R
RGBPLL VCC1
VCC1 U4
U5 C485 X_C1000P50N C267 C274 CB4
VCC1
A6 VCCPLL3/NC VCC1 U8
B6 U9 C483 X_C1U10Y M_C1000P50XM_C1U10Y
M_C1000P50X
GNDPLL3/NC VCC1 FB19 X_0 5020
VCC1 V10
GND_RGBPLL V11 VDDQ X_C1000P50N
VCC1 CB11 C481 X_C1U10Y CP7 GND_DAC
VCC1 V12 VDD_12_A
DAC_PLL V13 X_C1000P50N
VCC1 CB12 X_COPPER
VCC1 V2
B2 DACVDD/NC VCC1 V3
C3 GNDDAC1/NC VCC1 V4
D4 V8 CB13 C10U10Y0805
GNDDAC2/NC VCC1 VDD_12_A
VCC1 V9
GND_DAC W2 R114
VCC1 M_0R0805
VCC1 W3
DAC_PLL W4 1 2
VCC1 VCC3 VDD3
VCC1 W9 3 4
3 A4 Y3 5 6 RN65 3
VCCRGB/NC VCC1 M_8P4R-0R
B4 GNDRGB/NC VCC1 Y4 7 8
VCC1 Y5
GND_DAC
VDDQ
A7 NC
D7 NC VDD AA21
AA22 VDDQ
VDDQ VDD
VDD AA23
AA24
Note: When use K8T800,
VDD
AB17 VCC2 VDD AA25
C313
these power circuit for
AB18 VCC2 VDD AA26 C325 C337 C324
AB19 AB21 C0.1U25Y
GFX analog power should be
AB20
VCC2 VDD
AB22 X_C0.1U25Y C0.1U25Y X_C1U10Y
AC18
VCC2 VDD
AB23
NOPOPed.
VCC2 VDD
AC19 VCC2 VDD AB24
AC20 VCC2 VDD AB25
AC21 AB26 VDDQ
VCC2 VDD
V14 VCC2 VDD F9
V15
V16
VCC2 VDD H10
H11
For K8M800/K8T800 Pro Only
VCC2 VDD
V17 VCC2 VDD H12
W15 H15 C339 C338 C288
VCC2 VDD C1U10Y C1U10Y C1U10Y
W16 VCC2 VDD H16
W17 H8 VCC3 AVDD1
VCC2 VDD
W18 VCC2 VDD H9
J8 FB13
VDD X_0
VDD K19
B7 L19 CP5 C206 C207 CB10
2 VSS/NC VDD 2
C7 VSS/NC VDD M19
R16 P8 X_COPPER C1000P50X C1U10Y X_C1000P50X
VSS VDD 5020
R17 VSS VDD R19
R21 R8 VDDQ
VSS VDD
R25 VSS VDD T19
T10 VSS VDD U19
T11 V18 AVDD2
VSS VDD C299 X_C1U10Y FB12 X_0
T12 VSS VDD V19
T13 VSS VDD W10 VCC3 1 2
T14 W11 CP4
VSS VDD C212 C213
T15 VSS VDD W12
T16 W13 X_COPPER
VSS VDD C1000P50X C1U10Y
T17 VSS VDD W14
U10 W19 AGND2
VSS VDD
U11 VSS VDD Y20
U12 VSS VDD Y21
U13 VSS VDD Y22
U14 Y23 VDDQ
VSS VDD
U15 VSS VDD Y24
U16 VSS VDD Y25
U17 VSS VDD Y26
V5 VSS C321 C319
W5 VSS X_C0.1U25Y C0.1U25Y
W21 VSS VSS AB16
W22 VSS VSS AC8
W23 VSS VSS AC22
W24 AC23 VDDQ
VSS VSS
W25 VSS VSS AC24
1 1
W26 VSS VSS AE2
AB2 VSS VSS AE5
AB3 VSS VSS AE8
AB4 AE11 C340 C320 Micro Star Restricted Secret
VSS VSS C1U10Y X_C1U10Y
AB5 VSS VSS AE14
AB6 VSS VSS AE17 Title R ev
AB9 VSS VSS AE20 NORTH BRIDGE (POWER/GOUND) 0A
AB10 VSS VSS AE22
AB15 VSS VSS AE25 Document Number MS-7094
(VIA-K8M800-VT8380) MICRO-STAR INT'L CO.,LTD. Last Revision Date:
A B C D E
ISL6568CR FOR AMD K8 754 POWER CKT
CHOK2
+12VA VIN
1
VCC VCC VCC VCC CH-1.2U18A EC15 EC5 EC8 EC11 EC13 C72 C155 C98 C138 C87
+
.CD1000U16EL20
.CD1000U16EL20
.CD1000U16EL20
.CD1000U16EL20
C4.7U16Y1206
C4.7U16Y1206
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
C20 C29 C79
X_C0.1U25Y
C1U16Y0805
.CD1000U16EL20
X_C4.7U16Y1206
2
X_S-1N5817_DO214AC
D2 R10
R13 R3 4.7R0805 +12VA

R4
1KR 1KR 4.7KR
U2 C10
ISL6568CR C4.7U16Y1206 R26 VIN
32PIN 5x5QFN 4.7R0805
4
22 15 R7
VCC
5 VID4 VID4 PVCC
21 24 C144
5 VID3 VID3 BOOT1
30 C18 C42 C1U16Y0805
5 VID2 VID2
31 2.2R0805 C1U16Y0805
D
5 VID1 VID1
32 R60 Q6
5 VID0 VID0
1 25 C0.1U25Y G
VID12.5 UGATE1
27 PG_VCORE 28 PGOOD
20 1R0805 09N03 CHOK4
27 VCORE_EN
S
ENLL
PHASE1 23 VCORE
VRM_EN > 0.6V ENABLE C8 C28
EC9
EC14
EC12
1800U/6.3V
X_1800U/6.3V
X_1800U/6.3V
CH-1.0U40A 0.8V~1.55V/80A
C0.1U25Y C0.1U25Y 26 R9 3KR1% R76
D
ISEN1 R67 Q8 Q7 2.2R0805
C23
LGATE1 27 G G
R14 10KR C5600P50X 5 0R0805 C194
COMP 06N03 06N03 C1000P50X
S
C31 X_C10P50N
6 FB VIN VCORE
R15 1KR 7 R17

VCORE VDIFF C130
BOOT2 18
C34 C1U16Y0805 C100 C81
2.2R0805 X_C100U2SP X_C100U2SP
D
R23 C0.1U25Y R57 Q5
51R UGATE2 17 G
1R0805
9 09N03 CHOK3
5 COREFB_H
S
C52 VSEN
PHASE2 19
Near CPU Socket
1800U/6.3V
1800U/6.3V
1800U/6.3V
1800U/6.3V
X_C1000P50X 8 CH-1.0U40A
5 COREFB_L RGND
16 R25 R47
D
ISEN2
EC10
EC17
EC16
EC6
3KR1% R46 Q3 Q4 2.2R0805
R22 C53 14 G G
LGATE2 0R0805
51R X_C1000P50X 06N03 06N03 C84
S
R8 C1000P50X
VCC 3 OFST
X_150KR R11 +20mV
10 R24 1KR1%
24KR1% OFFSET OCSET
29
ICOMP 11 ATX12V POWER CONNECTOR
FS
12 R28 17.4KR1% JPW 1
ISUM
3 12V GND 1
2 REF
13 C43
GND
R2 C13 IREF
+12VA 4 12V GND 2
C44 C0.047U16X
C0.01U25Y PWR-2X2M
33
150KR C0.01U25Y C24 C78

C33P50N C0.01U25Y
R34 39KR
R33 39KR
BOTTOM PAD CONNECT TO
GND THROUGH 10vias
PH2 PH3
2 2 1 1 2 2 1 1
HS-0500410-K08 HS-0500410-K08

Title R ev
Vcore ISL6568 2 Phase 0A
No. 69, Li-De St, Jung-He City, W ednesday, November 17, 2004
5 4 3 2 1
AGP PRO Connector

VCC3 GAD[31..0]
VCC3 3VDUAL 3VDUAL 12 GAD[31..0]
VDDQ GAD31
GAD30
GAD29
VDDQ +12V R196 R194 GAD28
X_4K7R2 X_4K7R2 GAD27
VCC VCC AGP1 GAD26
SLOT-AGP1.5LATCH_red GAD25
SUSB# 17,24,27
N11-1240131-A10 GAD24
C
B1 A1 GAD23
C358 -OVRCNT 12V TYPEDET# Q25 GAD22
D
B2 5V -TYPEDET A2 B D
C0.1U25Y B3 A3 AGP8XDET_GC# X_2N3904S GAD21
5V RESERVED GAD20
B4 A4
E
USB+ USB- AGPGND GAD19
B5 GND GND A5
B6 A6 GAD18
16,19,20 PIRQ#B -INTB -INTA PIRQ#A 12,16,19,20
B7 A7 GAD17
7 GCLK_SLOT CLK -RST PCIRST# 16,27
GREQ B8 A8 GGNT GAD16
12 GREQ -REQ -GNT GGNT 12
B9 A9 GAD15
ST0 3.3V 3.3V ST1 GAD14
12 ST0 B10 ST0 ST1 A10 ST1 12
ST2 B11 A11 GAD13
12 ST2 ST2 RESERVED
RBF B12 A12 GAD12
12 RBF -RBF -PIPE DBIH 12
B13 A13 GAD11
DBIL GND GND W BF GAD10
12 DBIL B14 RESERVED -WBF A14 W BF 12
SBA0 B15 A15 SBA1 GAD9
SBA0 SBA1 GAD8
B16 3.3V 3.3V A16
SB_STBF SBA2 SBA3 SB_STBS GAD6
12 SB_STBF B18 SB_STB -SB_STB A18 SB_STBS 12
B19 A19 GAD5
SBA4 GND GND SBA5 GAD4
B20 SBA4 SBA5 A20
SBA6 SBA7 GAD2
B22 RSVD/KEY RSVD/KEY A22
B23 A23 GAD1
GND/KEY GND/KEY GAD0
3VDUAL B24 AUX3V/KEY RSVD/KEY A24
B25 A25 SBA[7..0]
3.3V/KEY 3.3V/KEY 12 SBA[7..0]
GAD31 B26 A26 GAD30
GAD29 AD31 AD30 GAD28 SBA0
B27 AD29 AD28 A27
B28 A28 SBA1
GAD27 3.3V 3.3V GAD26 SBA2
B29 AD27 AD26 A29
GAD25 B30 A30 GAD24 SBA3
AD25 AD24 SBA4
B31 GND GND A31
C AD_STBF1 B32 A32 AD_STBS1 SBA5 C
12 AD_STBF1 AD_STB1 -AD_STB1 AD_STBS1 12
GAD23 B33 A33 GC/BE#3 SBA6
AD23 C/-BE3 SBA7
B34 VDDQ VDDQ A34
GAD21 B35 A35 GAD22
GAD19 AD21 AD22 GAD20
B36 AD19 AD20 A36
B37 GND GND A37
GAD17 B38 A38 GAD18
GC/BE#2 AD17 AD18 GAD16
B39 C/-BE2 AD16 A39
B40 A40 GC/BE#[3..0]
VDDQ VDDQ 12 GC/BE#[3..0]
GIR DY B41 A41 GFRAME
12 GIRDY -IRDY -FRAME GFRAME 12
B42 A42 GC/BE#0
AUX3V/KEY RSVD/KEY GC/BE#1
B43 GND/KEY GND/KEY A43
B44 A44 GC/BE#2
RSVD/KEY RSVD/KEY GC/BE#3
B45 3.3V/KEY 3.3V/KEY A45
GDEVSEL B46 A46 GT RDY
12 GDEVSEL -DEVSEL -TRDY GTRDY 12
B47 A47 GSTOP
VDDQ -STOP GSTOP 12
GPERR B48 A48 AGP_PME# R174 0R
-PERR -PME PCI_PME# 17,19,20
B49 GND GND A49
GSERR B50 A50 GPAR
12 GSERR -SERR PAR GPAR 12
GC/BE#1 B51 A51 GAD15
C/-BE1 AD15
B52 VDDQ VDDQ A52
GAD14 B53 A53 GAD13
GAD12 AD14 AD13 GAD11
B54 AD12 AD11 A54
B55 GND GND A55
GAD10 B56 A56 GAD9
GAD8 AD10 AD9 GC/BE#0
B57 AD8 C/-BE0 A57
B58 VDDQ VDDQ A58
AD_STBF0 B59 A59 AD_STBS0
12 AD_STBF0 AD_STB0 -AD_STB0 AD_STBS0 12
GAD7 B60 A60 GAD6
AD7 AD6
B
B61 GND GND A61 B
GAD5 B62 A62 GAD4
GAD3 AD5 AD4 GAD2
B63 AD3 AD2 A63
B64 VDDQ VDDQ A64
GAD1 B65 A65 GAD0
VREF_CG AD1 AD0 AGPVREF_GC
B66 VREF_CG VREF_GC A66 AGPVREF_GC 12
AGP "Vref" => 4X : 0.5*1.5V=0.75 Volt , Add-in Card Power

8X : 0.23*1.5 =0.345 Volt Imax V_Min V_ Max Units
VCC3 VDDQ 2.0A 1.425 1.575 V

VDDQ
+12V VCC3 6.0A 3.15 3.45 V
VDDQ R187
4.7KR +12V R184 3VDUAL 0.75A 3.15 3.45 V
R186 8.2KR
4X : 0.75V VCC5 2.0A 4.75 5.25 V
D
1KR
8X : 0.35V R188 Q22 GPERR
3.32KR1% AGP8XDET_GC# G N-2N7002_SOT23 R179
A G VC C12 1.0A 11.4 12.6 V A
D
Q19 1KR
S
R173 N-2N7002_SOT23 AGP8XDET# Q21

VREF_CG
1 : 4X AGP8XDET# 12
G N-2N7002_SOT23
0 : 8X 1 : 4X S Micro Star Restricted Secret
1.47KR1% R183
C344 R176
0 : 8X AGP8XDET_GC# Q20 Title R ev
C1U10Y
C343 R177
C0.1U25Y 1.02KR1%
10KR
10KR
N-MMBT3904_SOT23
R185
AGP PRO Slot 0A
1 : 4X 200R1% Document Number MS-7142
"AGP8XDET_GC#" 0 : 8X MICRO-STAR INT'L CO.,LTD. Last Revision Date:
=>4X=High,8X=Low No. 69, Li-De St, Jung-He City,
Wednesday, November 17, 2004
5 4 3 2 1
A B C D E
VCC3 RN48
USBN0 1 2 VCC2_5
USBP0 3 4
USBN1 5 6
AD[31..0] USBP1 7 8 CB20 X_C1U10Y
W10
W11
W17
W18
W19
W21
H10
H11
H12
R19
U19
V19
V21
Y21
T19
19,20 AD[31..0]
W9
W8
M8
H9
N8
R8
U8
K8
P8
V8
T8
L8
J8
U16A 3VDUAL 8P4R-15KR CB19 X_C1U10Y
AD0 G2 RN96 8P4R-15KR
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
AD1 AD0 USBP7 CB17 X_C1U10Y
J4 AD1 USBVDD A22 7 8
AD2 J3 B22 USBN7 5 6
AD3 AD2 USBVDD C381 CB18 USBP6 VCC3
H3 AD3 USBVDD C22 3 4
4 AD4 CB8 X_C0.1U25Y USBN6 CB21 X_C1U10Y 4
F1 AD4 USBVDD D22 1 2
AD5 G1 E22 C0.1U25Y C10U10Y1206 3VDUAL
AD6 AD5 USBVDD CB22 X_C0.01U50X
H4 AD6 USBVDD F22
AD7 F2 J13 USBP3 7 8
AD8 AD7 USBVDD USBN3
E1 AD8 USBVDD J14 5 6
AD9 G3 J15 USBP2 3 4
AD10 AD9 USBVDD USBN2
E3 AD10 USBVDD J16 1 2
AD11 D1 J17
AD12 AD11 USBVDD
G4 AD12 USBVDD J18
AD13 D2 RN64 8P4R-15KR RN90 VCC3
AD13 VSUS2_5 RN100
AD14 D3 8P4R-2.7KR
AD15 AD14 C379 USBN4 DEVSEL#
F3 AD15 1 2 1 2
AD16 K3 C0.1U25Y USBP4 3 4 TRDY# 3 4
AD17 AD16 near SB USBN5 I RDY#
L3 AD17 USBSUS25 C24 5 6 5 6
AD18 K2 USBP5 7 8 FRAME# 7 8
AD19 AD18 VCC2_5
K1 AD19
AD20 M4 A23 USBVCCA RN91
AD21 AD20 PLLVDDA CB7 8P4R-15KR SERR#
L2 AD21 PLLVDDA B23 1 2
AD22 N4 X_C1U10Y Near Connector PERR# 3 4
AD23 AD22 INTH#
L1 AD23 PLLGNDA D23 5 6
AD24 M2 C23 USBGNDA STOP# 7 8
AD25 AD24 PLLGNDA
M1 AD25
AD26 P4 E20 USBP0 8P4R-2.7KR
AD26 USBP0+ USBP0 23
AD27 N3 D20 USBN0
3 AD27 USBP0- USBN0 23 VCC3 3
AD28 N2 A20 USBP1 RN92
AD28 USBP1+ USBP1 23
AD29 N1 B20 USBN1 8P4R-2.7KR
AD29 USBP1- USBN1 23
AD30 P1 E18 USBP2 PREQ#1 1 2
C_BE#[3..0] AD30 USBP2+ USBP2 23
AD31 P2 D18 USBN2 PREQ#2 3 4
19,20 C_BE#[3..0] AD31 USBP2- USBN2 23
A18 USBP3 PREQ#3 5 6
USBP3+ USBP3 23
C_BE#0 E2 B18 USBN3 PREQ#4 7 8
CBE0 USBP3- USBN3 23
C_BE#1 C1 D16 USBP4
CBE1 USBP4+ USBP4 23
C_BE#2 L4 E16 USBN4
CBE2 USBP4- USBN4 23 VCC3
C_BE#3 M3 A16 USBP5 RN88
CBE3 USBP5+ USBP5 23
B16 USBN5 8P4R-4.7KR
USBP5- USBN5 23
FRAME# J1 D14 USBP6 PGNT#1 1 2
19,20 FRAME# FRAME USBP6+ USBP6 23
DEVSEL# H2 E14 USBN6 PGNT#2 3 4
19,20 DEVSEL# DEVSEL USBP6- USBN6 23
I RDY# J2 A14 USBP7 PGNT#3 5 6
19,20 IRDY# IRDY USBP7+ USBP7 23
TRDY# H1 B14 USBN7 PGNT#4 7 8
19,20 TRDY# TRDY USBP7- USBN7 23
STOP# K4
19,20 STOP# SERR# STOP RN97
19,20 SERR# C2 SERR
PAR F4 C26 USB_OC#1 8P4R-2.7KR
19,20 PAR PAR USBOC0 USB_OC#1 23
PERR# C3 D24 PGNT#5 1 2
19,20 PERR# PERR USBOC1
PCIRST# R1 B26 USB_OC#2 PREQ#5 3 4
15,27 PCIRST# PCIRST USBOC2 USB_OC#2 23
C25 PREQ#0 5 6
PIRQ#A USBOC3 USB_OC#5 PGNT#0
12,15,19,20 PIRQ#A A4 INTA USBOC4 B24 USB_OC#5 23 7 8
PIRQ#B B4 A24
15,19,20 PIRQ#B INTB USBOC5
PIRQ#C B5 A26
19,20 PIRQ#C INTC USBOC6
2 19,20 PIRQ#D PIRQ#D C4 A25 2
INTD USBOC7
D4 INTE
E4 E23 USBCLK_SB
INTF USBCLK USBCLK_SB 7 VCC
A3 INTG
INTH# B3 B25 USBREXT R232 6.04KR1% RN89
INTH USB REXT PIRQ#B 1 2
PREQ#0 A5 D26 R225 10KR PIRQ#A 3 4
19 PREQ#0 PREQ#1 REQ0 UDPWR PIRQ#C
19 PREQ#1 B6 REQ1 UDPWREN D25 5 6
PREQ#2 C5 PIRQ#D 7 8
20 PREQ#2 PREQ#3 REQ2
D5 REQ3
PREQ#4 P3 W3 8P4R-2.7KR
REQ4 KBCK/KA20G KBCLK# 25
PREQ#5 R3 V1
REQ5 KBDT/KBRC KBDAT# 25
MSCK/IRQ1 W1 MSCLK# 25
PGNT#0 A6 W2
19 PGNT#0 GNT0 MSDT/IRQ12 MSDAT# 25
PGNT#1 D6
19 PGNT#1 PGNT#2 GNT1
20 PGNT#2 C6 GNT2
PGNT#3 E5
PGNT#4 GNT3
R4
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
PGNT#5 GNT4
R2 GNT5
GND
GND
GND
GND
GND
GND
GND
GND
GND
VIA-VT8237R
A1
A2
B1
B2
E8
F25
H23
J21
J25
A13
A15
A17
A19
A21
B13
B15
B17
B19
B21
C13
C14
C15
C16
C17
C18
C19
C20
C21
D13
D15
D17
D19
D21
E13
E15
E17
E19
E21
H13
H14
H15
H16
H17
H18
1 1
Title Rev
VT8237 Part 1 0A
A B C D E
A B C D E
3VDUAL VSUS2_5 VT8237

VSUS2_5 VCC2_5
VCC2_5 *"ACSYNC" => LPC FWH Command *"GPIO[A,C]" => LDT Frequency
0 - Enable FWH 00 - 200MHz (Default) 10 - 600MHz
C370 C365 C493 1 - Disable FWH(Default) 01 - 400MHz 11 - 800MHz
C494
M18
AA4
AB4
AB5
AB6
N18
R18
U18
P18
V10
V11
V12
V13
V14
V15
V16
V17
V18
T18
L18
J10
J11
J12
M9
N9
R9
U9
U4
C1U10Y X_C0.1U25Y ACSYNCR266 4.7KR *" GPIOB" => LDT Width
K9
P9
V9
T9
T4
L9
J9
VCC3
U16B C0.1U25Y 0 - 8-Bit (Default)
PDD[15..0] PDD0 AA22 X_C1U10Y 1 - 16-Bit
VSUS33
VSUS33
VSUS33
VSUS33
VSUS25
VSUS25
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
22 PDD[15..0] PDD0
PDD1 Y24
PDD2 PDD1 GPI0 R270 4.7KR
AA26 VBAT *"GPIOD" => Fast command
PDD3 PDD2 INTRUDER R265 1MR
AA25 0 - Disable (Default)
PDD4 PDD3 AC_BITCLK
AB26 T1 AC_BITCLK 21 1 - Enable
PDD5 PDD4 ACBITCLK ACSDIN0 RN93
AC26 PDD5 ACSDIN0 U3
PDD6 AC_SDIN1 RN101 8P4R-4.7KR
4 AC23 PDD6 ACSDIN1 V2 4
PDD7 AD25 U1 AC_SDIN2 ACSDIN0 7 8 AC_SDIN0 GPIOA 1 2
PDD7 ACSDIN2 AC_SDAIN0 21
PDD8 AD26 V3 AC_SDIN3 ACSYNC 5 6 A C_SYNC GPIOD 3 4
PDD8 ACSDIN3/SLP_BTN AC_SYNC 21
PDD9 AC24 T2 ACSYNC ACSDO 3 4 AC_SDOUT GPIOB 5 6
PDD9 ACSYNC AC_SDOUT 21
PDD10 AC25 U2 ACSDO ACRST 1 2 AC_RST# GPIOC 7 8
PDD10 ACSDO AC_RST# 21
PDD11 AB24 T3 ACRST
PDD12 PDD11 ACRST 8P4R-22R
AB23 PDD12
PDD13 AA24
PDD14 PDD13 PCI_PME# AC_SDIN2 R268 4.7KR
Y26 PDD14 PME W4 PCI_PME# 15,19,20
PDD15 AA23 V4 BATLOW#
PDD15 BATLOW CPUMISS AC_SDIN3 R269 4.7KR
CPUMISS Y1
PDREQ Y23 Y2 RI#
22 PDREQ PDDREQ RING
PDDACK# V24 Y3 SUSST# RN104
22 PDDACK# PDDACK SUSST1 SUSST# 12
PDIOR# W26 Y4 THRMS# 8P4R-4.7KR
22 PDIOR# PDIOR AOLGP/THRM THRMS# 24
PDIOW# Y25 AA1 EXTSMI# SUSCLK 1 2
22 PDIOW# PDIOW EXTSMI EXTSMI# 28 3VDUAL
PIORDY Y22 AB1 SMBALRT# RI# 3 4
22 PIORDY PDRDY SMBALRT
PDCS#1 V22 AC1 ATADET1 CPUMISS 5 6
22 PDCS#1 PDCS1 LID ATADET1 22
PDCS#3 V23 AD2 PWRBTN# EXTSMI# 7 8
22 PDCS#3 PDCS3 PWRBTN PWBTIN# 28
PDA0 PWROK_NB# SUSST#
22 PDA0
PDA1
W23
V25
PDA0 PWROK AF1
AB7 CLKRUN#
PWROK_NB# 12
THRMS#
1
3
2
4 RN102
Strapping
22 PDA1 PDA1 CLKRUN
PDA2 W24 AC7 CPUSTP# BATLOW# 5 6 8P4R-4.7KR
22 PDA2 PDA2 CPUSTP
IRQ14 AD24 AD6 PCISTP# PCI_PME# 7 8
22 IRQ14 IRQ14 PCISTP GPO1 1 2
SDD[15..0] SDD0 AC20 AE1 INTRUDER SMBALRT# 3 4 RN99
22 SDD[15..0] SDD0/TBC1 INTRUDER
SDD1 AB20 PWROK_NB# 5 6 8P4R-4.7KR
SDD2 SDD1/VALID SUSCLK PWBTIN#
AC21 SDD2 SUSCLK AB3 7 8
SDD3 AE18 *"PDA0/SDA0" => LDT Transmit Control
SDD4 SDD3/RXD2 SMBCLK1 GPO0 R289 X_4.7KR
AF18 AC4 SMBCLK1 7,8,27 0 - Disable (Default)
SDD5 SDD4/RXD3 SMBCK1 SMBDATA1 SUSB# R281 X_4.7KR
AD18 AB2 SMBDATA1 7,8,27 1 - Enable
3
SDD6 SDD5/RXD4 SMBDT1 SUSC# R274 X_4.7KR 3
AD19 SDD6/RBC0
SDD7 AF19 AC3 SMBCLK2 RN98 *"PDA1/SDA 1" => External loop test mode
SDD8 SDD7/RBC1 SMBCK2 SMBDATA2 ATADET0
AE20 AD1 1 2 0 - Disable (Default)
SDD9 SDD8/RXD5 SMBDT2 ATADET1
AF20 3 4 1 - Enable
SDD10 SDD9/RXD6 SUSA# SUSA#
AD20 SDD10/RXD7 SUSA AA2 5 6
SDD11 AE21 AD3 SUSB# AC_SDIN1 7 8 *"PDA2/SD A2" => ROMSIP Select
SDD11/RXD8 SUSB SUSB# 15,24,27
SDD12 AF21 AF2 SUSC# 0 - D isable
SDD12/RXD9 SUSC SUSC# 27
SDD13 AD21 8P4R-4.7KR 1 - Enable(Default)
SDD14 SDD13/TXD0 GPI0 RN94 8P4R-4.7KR
AD22 SDD14/TXD1 GPI0 AE2
SDD15 AF22 AC2 ATADET0 CLKRUN# 7 8 *"- PDCS3" => Test Mode Select
SDD15/TXD2 GPI1 ATADET0 22 VCC3
AA3 GPO0 PCISTP# 5 6 0 - Disable (Default)
SDREQ GPO0 GPO1 CPUSTP#
22 SDREQ AD17 AE3 3 4 1 - Enable
SDDACK# SDDRQ/RXD1 GPO1 GPIOA SERIRQ
22 SDDACK# AD23 SDDACK/TBC0 GPIOA/Strap1 AE5 1 2
SDIOR# AF23 AD5 GPIOB * "EEDI/-SDCS1" => EEPROM Select
22 SDIOR# SDIOR/TXD4 GPIOB/Strap2
SDIOW# AE23 AF5 GPIOC TPO 1 2 0 - BIOS Porting - ACR
22 SDIOW# SDIOW/TXD3 GPIOC/Strap0
SIORDY AF17 AC6 GPIOD TEST 3 4 1 - External EEPROM (On-board)(Default)
22 SIORDY SDRDY/RXD0 GPIOD/Strap3
SDCS#1 AF25 5 6
22 SDCS#1 SDCS1/TXD8
SDCS#3 AF26 AD9 SERIRQ SPKR 7 8
22 SDCS#3 SDCS3/TXD9 SERIRQ SERIRQ 24
SDA0 AF24 AF8 SPKR R213 1KR PDA1 VT8237
22 SDA0 SDA0/TXD6 SPKR SPKR 28
SDA1 AC22 AB8 APICCLK RN95 8P4R-4.7KR
22 SDA1 SDA1/TXD5 OSC APICCLK 7,18
SDA2 AE24
22 SDA2 SDA2/TXD7
IRQ15 AE26 AF9 TPO *"S PKR" => CPU Freq. Adjust Setting
22 IRQ15 IRQ15 TPO
AE9 TEST R211 4.7KR PDA2 VT8237
TEST VCC2_5 VCC3
C383 X_C0.1U25Y
SIDEVREF AC19 1 - Disable (Default)
SVREF VDDA0 R202 X_2.7KR
AC10 0 - Enable
Using external PHY SIDECOMPAB21 VDDA0
R204 X_360R1% SCOMPP C364
GNDA0 AB10
STXP_1 C397 C1000P50X STXP1 AB13
STXN_1 C396 C1000P50X STXN1 AC13 STXP1 SREXT C0.1U25Y
2
STXN1 SREXT AD11 2
R244 R199 2.7KR PDCS#3 VT8237
SRXN_1 C395 C1200P25X SRXP1 AF13 AE10 SXO 4.7KR1%
SRXP_1 C393 C1200P25X SRXN1 AE13 SRXN1 SXO/Strap4 VCC3
SRXP1 SXI RN103
SXI/Strap5 AF10
STXP_2 C392 C1000P50X STXP2 AB15 SMBCLK1 2 1
STXN_2 C390 C1000P50X STXN2 STXP2 VDDA33 FB23 X_601S SMBDATA1 3VDUAL
AC15 STXN2 VDDA33 AE11 VCC3 4 3
1 2 SMBDATA2 6 5
SRXN_2 C388 C1200P25X SRXN2 AF15 AF11 C394 CP13 SMBCLK2 8 7 R227 X_4.7KR
SRXN2 GNDA33 VCC3 PDA0
SRXP_2 C382 C1200P25X SRXP2 AE15 C0.1U25Y R212 4.7KR VT8237
SRXP2
GND W5
near chipset W12 V5 SXO 8P4R-1KR For K8T800Pro
VDDATS GND SXI SATA2 0:External HCLK enable
W13 VDDATS GND M16
W14 N11 1:Internal HCLK enable
VDDATS GND Y3 25MHZ18P_D-1
W15 VDDATS GND N12
W16 VDDATS GND N13 1 2 8
GND N14
AC17 VDDAS GND N15 1
CP11 AC11 N16 C399 C398
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
near chipset VDDAS GND C15P50N C15P50N STXP_2

GNDAS
GNDAS
GNDAS
GNDAS
2 1 AB17 VDDAS 2
+2.5VSATA AB11 STXN_2 3 ACSDO R267 4.7KR VT8237
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCC2_5 VDDAS
FB22
X_601S SATA1 4 0/1:Enable/disable auto reboot
AB14
AC14
AD12
AD13
AD14
AD15
AD16
AE12
AE14
AE16
AF12
AF14
AF16
AC16
AC12
AB16
AB12
F6
F7
J5
K5
P5
R5
L11
L12
L13
L14
L15
L16
M11
M12
M13
M14
M15
K18
C391 C389 SRXN_2 5

C0.1U25Y 8 SRXP_2 6
C1U10Y
GNDSATA VIA-VT8237R 1 7
1 1
STXP_1 2 9
STXN_1 3
VT8237 PDDACK# R214 10KR
VCC3 CONN-SATA_white
1 - Disable external SATA PHY
4 Micro Star Restricted Secret
SRXN_1 5 Title R ev
R201 10KR
SRXP_1 6 VT8237 Part 2 0A
VT8237 PDCS#1 VCC3
R200 X_10KR 7 Document Number MS-7124
SATA master/slave mode 9 MICRO-STAR INT'L CO.,LTD. Last Revision Date:
1 - Disable 0 - Enable No. 69, Li-De St, Jung-He City, Wednesday, November 17, 2004
CONN-SATA_white Taipei Hsien, Taiwan Sheet
A B C D E
A B C D E
RN87 8P4R-33R
VCC2_5 VSUS2_5 3VDUAL MTXD0 7 8 C0.1U25Y CB6
MIITXD0 26
MTXD1 5 6 MIITXD1 26 VCC3
MTXD3 3 4 MIITXD3 26
MTXD2 1 2 MIITXD2 26
M21
M22
M23
M24
M25
M19
N21
N22
N23
N24
N25
N26
N19
D12
K21
P22
P23
P24
P25
P26
P19
E12
E10
E11
L23
L21
L19
D9
E9
12 VLAD[0..7]
U16C MIITXEN R248 33R
MIITXEN 26
VLAD0 H25
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
MIISUS25
MIISUS25
MIIVCC
MIIVCC
MIIVCC
MIIVCC
VLAD1 VD0 MIIMDCKR252 33R
G26 VD1 MCRS A11 MIICRS 26 MIIMDCK 26
VLAD2 K26 B11
4 VD2 MCOL MIICOL 26 4
VLAD3 J23 MIIMDIO R253 33R
VD3 MIIMDIO 26
VLAD4 F26 C11 MIITXEN
VLAD5 VD4 MTXENA MTXD0
G25 VD5 MTXD0 A10
VLAD6 K22 B10 MTXD1 R163 1.5KR
VD6 MTXD1 3VDUAL
VLAD7 K24 B9 MTXD2
VD7 MTXD2 MTXD3
E24 VD8 MTXD3 A9
G23 VD9 MTXCLK C10 MIITXCK 26
L26 VCC3
VD10
L25 VD11 MRXER D10 MIIRXER 26
E26 VD12 MRXCLK C9 MIIRXCK 26
E25 VD13 MRXDV D8 MIIRXDV 26
L24 C8 FERR# R230 1KR
VD14 MRXD0 MIIRXD0 26
M26 VD15 MRXD1 B8 MIIRXD1 26
A8 APICD0# R228 330R
MRXD2 MIIRXD2 26
VBE0# G24 C7 SEEDI R243 4.7KR APICD1# R220 330R
12 VBE0# VBE MRXD3 MIIRXD3 26 VCC3
APICCLK R229 X_4.7KR
UPCMD K23 A7 MIIMDCK ROMLOCK R222 4.7KR
12 UPCMD UPCMD MDCK MIIMDCK 26
DNCMD K25 B7 MIIMDIO R241 GHI# R207 4.7KR
12 DNCMD DNCMD MDIO MIIMDIO 26
X_4.7KR SEEDI LAN MAC
UPSTB J26 D7 MIIRST AGPBZ# 1 2
12 UPSTB UPSTB PHYRST MIIRST 26
UPSTB# J24 0 EEPROM VGATE 3 4
12 UPSTB# UPSTB
D11 SEECS VRDSLP 5 6
EECS SEECS 26
DNSTB H26 B12 SEEDO 1 BIOS 7 8
12 DNSTB DNSTB EEDO SEEDO 26
DNSTB# H24 A12 SEEDI
3 12 DNSTB# DNSTB EEDI SEEDI 26 3
C12 SEECK RN86
EECK SEECK 26 VCC2_5 8P4R-4.7KR
VPAR F24 E7 +2.5VRAM R255 2.2R
12 VPAR VPAR RAMVCC CB9
VLREF_SB H22 C1U10Y
VLREF
RAMGND E6
R231 360R1% VCOMPP_SB J22 VCOMPP FERR#
FERR U24
VCLK L22 U26
7 VCLK VCLK A20M
IGNNE T24
INIT R26
F23 T25 R249 1KR
VIOUT INTR 5VSB VBAT
NMI T26
1
G22 U25 R250 2.7KR
VIIN SMI VIA AN258
R24 JBAT1
STPCLK D12
SLP V26 -LDTSTOP 5,11 3 1
LPC_AD0 AD8 R22 GHI# S-BAT54C_SOT23
24 LPC_AD0 LAD0 GHI 2
LPC_AD1 AF7 P21 ROMLOCK
24 LPC_AD1 LAD1 DPSLP 3
LPC_AD2 AE7 C407
24 LPC_AD2
2
LPC_AD3 LAD2 VGATE VBAT1
24 LPC_AD3 AD7 AC9 H1X3_black
LAD3 VGATE BAT-2P_SO41 X_C10U10Y1206
VIDSEL AC8 SATALED 28
AB9 VRDSLP R263
VRDSLP AGPBZ#
AGPBZ/GPI6 AD10 2 1 R156 1KR
1KR
2 LPC_FRAME# AF6 2
24 LPC_FRAME# LFRM
LPC_REQ# AE6
24 LPC_REQ# LREQ0
AE8 LREQ1
R23 SBPCLK
PCICLK SBPCLK 7
ALL_PWRGD AC5 U23 APICCLK VBAT
27,28 ALL_PWRGD PWRGD APICCLK APICCLK 7,17
RSMRST# AD4 R25 APICD0# C412
27 RSMRST# RSMRST APICD0/APICCS
T23 APICD1#
APICD1/APICACK CP10 C0.01U50X
VBAT AF4 T22 +2.5VSBPLL 2 1
VBAT PLLVCC VCC2_5
CB5
X1 AE4 U22 C0.1U25Y
RTCX1 PLLGND
X2 AF3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
RTCX2 VCC2_5
P11
P12
P13
P14
P15
P16
R11
R12
R13
R14
R15
R16
R21
T11
T12
T13
T14
T15
T16
W22
W25
AA21
AB19
AB22
AB25
AC18
AE17
AE19
AE22
AE25
AA9
AB18
T21
AA10
K19
VIA-VT8237R
Y4
32.768KHZ12.5P_D R206
C369 3KR1%
1 C0.1U25Y 1
VLREF_SB Micro Star Restricted Secret
C415 C422 Title Rev
C10P50N C10P50N
Under SB Bottom
CB16 C368
R205 VT8237 Part 3 0A
412R1%
X_C0.1U25Y Document Number MS-7124
C0.1U25Y
A B C D E
5 4 3 2 1
PCI Connectors
AD[31..0]
16,20 AD[31..0]
C_BE#[3..0]
VCC3 VCC3 16,20 C_BE#[3..0] VCC3 VCC3
VCC VCC +12V VCC VCC +12V
-12V -12V
PCI1 PCI2
D D
B1 -12V TRST# A1 B1 -12V TRST# A1
B2 TCK +12V A2 B2 TCK +12V A2
B3 GND TMS A3 B3 GND TMS A3
B4 TDO TDI A4 B4 TDO TDI A4
B5 +5V +5V A5 B5 +5V +5V A5
B6 A6 PIRQ#A B6 A6 PIRQ#B
+5V INTA# PIRQ#A 12,15,16,20 +5V INTA#
PIRQ#B B7 A7 PIRQ#C PIRQ#C B7 A7 PIRQ#D
15,16,20 PIRQ#B INTB# INTC# PIRQ#C 16,20 INTB# INTC#
PIRQ#D B8 A8 PIRQ#A B8 A8
16,20 PIRQ#D INTD# +5V INTD# +5V
B9 PRSNT1# RSVD1 A9 B9 PRSNT1# RSVD1 A9
B10 A10 3VDUAL B10 A10 3VDUAL
RSVD2 +5V RSVD2 +5V
B11 PRSNT2# RSVD3 A11 B11 PRSNT2# RSVD3 A11
B12 GND GND A12 B12 GND GND A12
B13 GND GND A13 B13 GND GND A13
B14 RSVD5 RSVD4 A14 B14 RSVD5 RSVD4 A14
B15 A15 PCISLOTRST# B15 A15 PCISLOTRST#
GND RST# PCISLOTRST# 20,27 GND RST# PCISLOTRST# 20,27
PCICLK1 B16 A16 PCICLK2 B16 A16
7 PCICLK1 CLK +5V 7 PCICLK2 CLK +5V
B17 A17 PGNT#0 B17 A17 PGNT#1
GND GNT# PGNT#0 16 GND GNT# PGNT#1 16
PREQ#0 B18 A18 PREQ#1 B18 A18
16 PREQ#0 REQ# GND 16 PREQ#1 REQ# GND
B19 A19 PCI_PME# B19 A19 PCI_PME#
+5V RSVD6 PCI_PME# 15,17,20 +5V RSVD6
AD31 B20 A20 AD30 AD31 B20 A20 AD30
AD29 AD31 AD30 AD29 AD31 AD30
B21 AD29 +3.3V A21 B21 AD29 +3.3V A21
B22 A22 AD28 B22 A22 AD28
AD27 GND AD28 AD26 AD27 GND AD28 AD26
B23 AD27 AD26 A23 B23 AD27 AD26 A23
AD25 B24 A24 AD25 B24 A24
AD25 GND AD24 AD25 GND AD24
B25 +3.3V AD24 A25 B25 +3.3V AD24 A25
C_BE#3 B26 A26 R235 100R AD19 C_BE#3 B26 A26 R236 100R AD20
AD23 C/BE3# IDSEL# AD23 C/BE3# IDSEL#
B27 AD23 +3.3V A27 B27 AD23 +3.3V A27
B28 A28 AD22 B28 A28 AD22
B29 AD21 AD20 A29 B29 AD21 AD20 A29
C AD19 B30 A30 AD19 B30 A30 C
B31 +3.3V AD18 A31 B31 +3.3V AD18 A31
AD17 B32 A32 AD16 AD17 B32 A32 AD16
C_BE#2 AD17 AD16 C_BE#2 AD17 AD16
B33 C/BE2# +3.3V A33 B33 C/BE2# +3.3V A33
B34 A34 FRAME# B34 A34 FRAME#
GND FRAME# FRAME# 16,20 GND FRAME#
IRD Y# B35 A35 IRD Y# B35 A35
16,20 IRDY# IRDY# GND IRDY# GND
B36 A36 TR DY# B36 A36 TR DY#
+3.3V TRDY# TRDY# 16,20 +3.3V TRDY#
DEVSEL# B37 A37 DEVSEL# B37 A37
16,20 DEVSEL# DEVSEL# GND DEVSEL# GND
B38 A38 STOP# B38 A38 STOP#
GND STOP# STOP# 16,20 GND STOP#
PLOCK# B39 A39 PLOCK# B39 A39
20 PLOCK# LOCK# +3.3V LOCK# +3.3V
PERR# B40 A40 SDONE PERR# B40 A40 SDONE
16,20 PERR# PERR# SDONE SDONE 20 PERR# SDONE
B41 A41 SBO# B41 A41 SBO#
+3.3V SBO# SBO# 20 +3.3V SBO#
SERR# B42 A42 SERR# B42 A42
16,20 SERR# SERR# GND SERR# GND
B43 A43 PAR B43 A43 PAR
+3.3V PAR PAR 16,20 +3.3V PAR
C_BE#1 B44 A44 AD15 C_BE#1 B44 A44 AD15
AD14 C/BE1# AD15 AD14 C/BE1# AD15
B45 AD14 +3.3V A45 B45 AD14 +3.3V A45
B46 A46 AD13 B46 A46 AD13
B47 AD12 AD11 A47 B47 AD12 AD11 A47
AD10 B48 A48 AD10 B48 A48
B49 GND AD9 A49 B49 GND AD9 A49
AD8 B52 A52 C_BE#0 AD8 B52 A52 C_BE#0

AD7 AD8 C/BE0# AD7 AD8 C/BE0#
B53 AD7 +3.3V A53 B53 AD7 +3.3V A53
B54 A54 AD6 B54 A54 AD6
AD5 +3.3V AD6 AD4 AD5 +3.3V AD6 AD4
B55 AD5 AD4 A55 B55 AD5 AD4 A55
AD3 B56 A56 AD3 B56 A56
B57 GND AD2 A57 B57 GND AD2 A57
AD1 B58 A58 AD0 AD1 B58 A58 AD0
AD1 AD0 AD1 AD0
B
B59 +5V +5V A59 B59 +5V +5V A59 B
ACK64# B60 A60 REQ64# ACK64# B60 A60 REQ64#
20 ACK64# ACK64# REQ64# REQ64# 20 ACK64# REQ64#
B61 +5V +5V A61 B61 +5V +5V A61
B62 +5V +5V A62 B62 +5V +5V A62
SLOT-PCI SLOT-PCI
N11-1200031-A10 N11-1200031-A10
IDSEL#=AD19 IDSEL#=AD20
INT#=A,B,C,D INT#=B,C,D,A
VCC
3VDUAL
PLOCK# R251 2.7KR
C443
ACK64# R258 2.7KR X_C0.1U25Y
A REQ64# R254 2.7KR A
SDONE R237 2.7KR
SBO# R238 2.7KR

Title R ev
PCI Connector 1 & 2 0A
5 4 3 2 1
5 4 3 2 1
PCI Connectors 16,19 AD[31..0]

AD[31..0]
VCC3 VCC3
C_BE#[3..0]
16,19 C_BE#[3..0]
VCC VCC +12V
-12V
D D
PCI3
B1 -12V TRST# A1
B2 TCK +12V A2
B3 GND TMS A3
B4 TDO TDI A4
B5 +5V +5V A5
B6 A6 PIRQ#C
+5V INTA# PIRQ#C 16,19
PIRQ#D B7 A7 PIRQ#A
16,19 PIRQ#D INTB# INTC# PIRQ#A 12,15,16,19
PIRQ#B B8 A8
15,16,19 PIRQ#B INTD# +5V
B9 PRSNT1# RSVD1 A9
B10 A10 3VDUAL
RSVD2 +5V
B11 PRSNT2# RSVD3 A11
B12 GND GND A12
B13 GND GND A13
B14 RSVD5 RSVD4 A14
B15 A15 PCISLOTRST#
GND RST# PCISLOTRST# 19,27
PCICLK3 B16 A16
7 PCICLK3 CLK +5V
B17 A17 PGNT#2
GND GNT# PGNT#2 16
PREQ#2 B18 A18
16 PREQ#2 REQ# GND
B19 A19 PCI_PME#
+5V RSVD6 PCI_PME# 15,17,19
AD31 B20 A20 AD30
AD29 AD31 AD30
B21 AD29 +3.3V A21
B22 A22 AD28
AD27 GND AD28 AD26
B23 AD27 AD26 A23
AD25 B24 A24
AD25 GND AD24
B25 +3.3V AD24 A25
C_BE#3 B26 A26 R259 100R AD21
AD23 C/BE3# IDSEL#
B27 AD23 +3.3V A27
B28 A28 AD22
AD21 GND AD22 AD20
C B29 AD21 AD20 A29 C
AD19 B30 A30
AD19 GND AD18
B31 +3.3V AD18 A31
AD17 B32 A32 AD16
C_BE#2 AD17 AD16
B33 C/BE2# +3.3V A33
B34 A34 FRAME#
GND FRAME# FRAME# 16,19
IRD Y# B35 A35
16,19 IRDY# IRDY# GND
B36 A36 TR DY#
+3.3V TRDY# TRDY# 16,19
DEVSEL# B37 A37
16,19 DEVSEL# DEVSEL# GND
B38 A38 STOP#
GND STOP# STOP# 16,19
PLOCK# B39 A39
19 PLOCK# LOCK# +3.3V
PERR# B40 A40 SDONE
16,19 PERR# PERR# SDONE SDONE 19
B41 A41 SBO#
+3.3V SBO# SBO# 19
SERR# B42 A42
16,19 SERR# SERR# GND
B43 A43 PAR
+3.3V PAR PAR 16,19
C_BE#1 B44 A44 AD15
AD14 C/BE1# AD15
B45 AD14 +3.3V A45
B46 A46 AD13
AD12 GND AD13 AD11
B47 AD12 AD11 A47
AD10 B48 A48
AD10 GND AD9
B49 GND AD9 A49
AD8 B52 A52 C_BE#0

AD7 AD8 C/BE0#
B53 AD7 +3.3V A53
B54 A54 AD6
AD5 +3.3V AD6 AD4
B55 AD5 AD4 A55
AD3 B56 A56
AD3 GND AD2
B57 GND AD2 A57
AD1 B58 A58 AD0
B AD1 AD0 B
B59 +5V +5V A59
ACK64# B60 A60 REQ64#
19 ACK64# ACK64# REQ64# REQ64# 19
B61 +5V +5V A61
B62 +5V +5V A62
SLOT-PCI
N11-1200031-A10
IDSEL#=AD21
INT#=C,D,A,B
3VDUAL
VCC3
C400
C359 C404 C378 X_C0.1U25Y
A A
X_C0.1U25Y X_C0.1U25Y X_C0.1U25Y

Title R ev
PCI Connector 3 0A
5 4 3 2 1
5 4 3 2 1
AUDIO CODEC
R124
1K
LINE_NEXT_R 1 2 6
R125 7
1K 8 LINE_OUT
LINE_NEXT_L 1 2 9
+5VR 17
JSP1
C283 C282
AUDIO1A
1 R256 0R SPDIF_OUT C1000P50X C1000P50X _
2
3
D1x3-BK R257
X_4.7KR
D R288 D
4.7KR
VCC3 +5VR
C461
CODEC VCC3_3 NEED CAP C460 R126
1K
AS CLOSE AS POSSIBLE. LINE_IN_R 1 2 10
C0.1U25Y C0.1U25Y R127 11
1K LINE_IN
48
47
46
45
44
43
42
41
40
39
38
37
12
U18 LINE_IN_L 1 2 13
18
AVSS2
AVDD2
MONO_OUT
NC
NC
NC
NC
NC
NC
NC
2LINE_OUT_L
2LINE_OUT_R
C285 C284
AUDIO1B
C1000P50X C1000P50X _
C458 C10U10Y0805 LINE_OUT_R
1 DVDD1 L_OUT_R 36
R291 0R XTL_IN 2 35 C459 C10U10Y0805 LINE_OUT_L
7 AC_14 XTL_IN L_OUT_L
XTL_OUT 3 34 C447 FR_MICIN
XTL_OUT FrontMIC(NC)
4 DVSS1 NC 33
5 32 C1U10Y
17 AC_SDOUT SDATA_OUT VRDA
R277 22R 6 31 VREFOUT R264 X_4.7KR
17 AC_BITCLK BIT_CLK VRAD
7 DVSS2 AFILT2 30
8 29 R122
17 AC_SDAIN0 SDATA_IN AFILT1
9 28 VREFOUT MICIN2 1 1K 2 1
DVDD2 VREFOUT
17 AC_SYNC 10 SYNC VREF 27 2 14
11 26 R123 4 MIC_IN 15
17 AC_RST# RESET# AVSS1
12 25 MICIN1 1 1K 2 5 16
CD-GND_REF
PC_BEEP AVDD1
+ EC34 C428 C433 C432 C435 C441
C442 C446 3
PHONE_IN
C1U10Y X_C1U10Y C281 C280
C434 C427 C10U16EL C1U10Y C1U10Y C1000P50X VREFOUT R260 4.7KR AUDIO1C
AUX-R
AUX-L
L-IN-R
L-IN-L
X_C10P50N C1000P50X C1000P50X C1000P50X _
CD-R
MIC1
MIC2
CD-L
C0.1U25Y
NC
NC
C C
VIA-VT1617A X_C4.7U10Y0805
13
14
15
16
17
18
19
20
21
22
23
24
C424 LINE_IN_R
C1U16Y0805
C414 C420 LINE_IN_L

X_C0.1U25Y C1U16Y0805
X_22P C457 XTL_IN
X3 R282
YCRY24.576H X_1M C413 MICIN2
C1U16Y0805
X_22P C440 XTL_OUT
C416 MICIN1
C1U16Y0805
C417
4 J1
C1U16Y0805
3 AUDIO-CDIN1X4
2
C418
1
C1U16Y0805
B B
C419 JCD
C1U16Y0805
+5VR
C450
C448 X_C1000P50N
C1000P50N JAUDIO
R286 JAUD1
R284 X_0R FR_MICIN 1 2
4.7KR MIC AUD_GND
3 MIC_BIAS AUD_VCC 4 +5VR
R285 LINE_OUT_R 5 6 LINE_NEXT_R
+12V +5VR 5VSB AUD_FPOUT_R AUD_RET_R
U17 C449 4.7KR 7 CUT 8
C1000P50N HP_ON
X_LT1087S_SOT89
3 2 R262 0R0805 LINE_OUT_L 9 10 LINE_NEXT_L
VIN VOUT VCC CP12 X_COPPER AUD_FPOUT_L AUD_RET_L
R272 X_0R0805 C454 C451
ADJ
C410 H2X5(8)_black
C425 C411
X_C0.1U25Y X_C0.1U25Y R279 X_0R C452 C453
R271 C10U10Y0805 X_C1000P50N
1
A A
X_100R1% X_C1000P50N X_C1000P50N
R246 X_0R X_C1000P50N

R261 Title R ev
X_309R1% VIA VT1617 AC'97 CODEC 0A
5 4 3 2 1
5 4 3 2 1
ATA 33/66/100 Connector 17 PDD[15..0]

PDD[15..0]
SDD[15..0]
NEAR S.B SIDE
17 SDD[15..0]
PRIMARY IDE CONN.

R128
HDDRST#
27 HDDRST# RN77 8P4R-22R0402 RN72 8P4R-22R0402
IDE1
33R SDA0 SDA0_R IRQ14 IRQ14_R
1 2 17 SDA0 2 1 17 IRQ14 8 7
PDD_7 PDD_8 SDA2 4 3 SDA2_R PDDACK# 6 5 PDDACK#_R
D 3 4 17 SDA2 17 PDDACK# D
PDD_6 PDD_9 SDCS#1 6 5 SDCS#1_R PIO RDY 4 3 PIORDY_R
5 6 17 SDCS#1 17 PIORDY
PDD_5 PDD_10 SDCS#3 8 7 SDCS#3_R PDIOR# 2 1 PDIOR#_R
PDD_4 7 8 PDD_11 17 SDCS#3 17 PDIOR#
PDD_3 9 10 PDD_12
PDD_2 11 12 PDD_13 RN80 8P4R-22R0402
PDD_1 13 14 PDD_14 SIO RDY SIORDY_R RN79 8P4R-22R0402
15 16 17 SIORDY 2 1
PDD_0 PDD_15 SDDACK# 4 3 SDDACK#_R PDIOW# 8 7 PDIOW#_R
17 18 17 SDDACK# 17 PDIOW#
IRQ15 6 5 IRQ15_R PDREQ 6 5 PDREQ_R
19 20 17 IRQ15 17 PDREQ
PDREQ_R SDA1 8 7 SDA1_R PDD0 4 3 PDD_0
21 22 17 SDA1
PDIOW#_R PDD15 2 1 PDD_15
PDIOR#_R 23 24
25 26 R87
PIORDY_R RN82 8P4R-22R0402
PDDACK#_R 27 28 SDD15 SDD_15
29 30 8 7
IRQ14_R 470R SDD0 SDD_0
31 32 6 5
PDA1_R ATADET0 SDD14 4 3 SDD_14
PDA0_R 33 34 PDA2_R SDD13 SDD_13
35 36 2 1
PDCS#1_R PDCS#3_R
IDEACTP# 37 38
28 IDEACTP# 39 40 RN85 8P4R-22R0402 PDCS#1 R198 22R0402 PDCS#1_R
SDD9 SDD_9 17 PDCS#1 PDCS#3 R197 22R0402 PDCS#3_R
_ 8 7
SDD6 SDD_6 17 PDCS#3
N32-2201091-H06 6 5
SDD8 4 3 SDD_8
SDD7 2 1 SDD_7
SECONDARY IDE CONN. PDD14

RN73 8P4R-22R0402
PDD_14
8 7
PDD1 6 5 PDD_1
R149
HDDRST# PDD13 4 3 PDD_13
27 HDDRST#
C IDE2 PDD7 R223 22R0402 PDD_7 PDD2 2 1 PDD_2 C
33R PDD8 R219 22R0402 PDD_8
SDD_7 1 2 SDD_8
SDD_6 3 4 SDD_9
SDD_5 5 6 SDD_10
SDD_4 7 8 SDD_11
SDD_3 9 10 SDD_12 RN81 8P4R-22R0402
SDD_2 11 12 SDD_13 PDD10 PDD_10
13 14 8 7
SDD_1 SDD_14 PDD5 6 5 PDD_5
SDD_0 15 16 SDD_15 PDD9 PDD_9
17 18 4 3
PDD6 2 1 PDD_6
SDREQ_R 19 20 RN84 8P4R-22R0402
SDIOW#_R 21 22 SDD11 SDD_11
23 24 8 7
SDIOR#_R R88 SDD4 6 5 SDD_4
SIORDY_R 25 26 SDD10 SDD_10
27 28 4 3
SDDACK#_R SDD5 2 1 SDD_5 RN74 8P4R-22R0402
IRQ15_R 29 30 470R PDD12 PDD_12
31 32 8 7
SDA1_R ATADET1 PDD3 6 5 PDD_3
SDA0_R 33 34 SDA2_R RN78 8P4R-22R0402 PDD11 PDD_11
35 36 4 3
SDCS#1_R SDCS#3_R 8 7 PDD4 2 1 PDD_4
IDEACTS# 37 38 SDIOR# SDIOR#_R
28 IDEACTS# 39 40 17 SDIOR# 6 5
SDIOW# 4 3 SDIOW#_R
17 SDIOW#
_ SDREQ 2 1 SDREQ_R
17 SDREQ
N32-2201091-H06
RN83 8P4R-22R0402
SDD1 8 7 SDD_1 RN71
VCC SDD2 6 5 SDD_2 8 7
SDD12 4 3 SDD_12 PDA2 6 5 PDA2_R
17 PDA2
SDD3 2 1 SDD_3 PDA0 4 3 PDA0_R
B 17 PDA0 B
IDEACTP# R157 10KR PDA1 2 1 PDA1_R
17 PDA1
IDEACTS# R167 10KR 8P4R-22R0402
ATADET1
17 ATADET1
Near SB < 1" ( or Damping Rs) ATADET0
17 ATADET0
PIORDY_R R193 4.7KR PDREQ_R R215 5.6KR
SIORDY_R R209 4.7KR SDREQ_R R210 5.6KR
IRQ14_R R192 10KR PDD7 R226 10KR
IRQ15_R R208 10KR SDD7 R240 10KR
A A

Title R ev
ATA 33/66/100 Connector 0A
5 4 3 2 1
5 4 3 2 1
5VDUAL USBVCC1
F5
FRONT USB PORT + C423

1.1A
USBVCC2
EC36
R290 .CD1000U6.3EL15 X_C0.1U25Y F6
47KR
1.1A
USB_OC#5
16 USB_OC#5 USBVCC1
C371 R287
D
Near S.B 56KR D
3
C0.1U25Y
L9 JUSB2
X_CMC_90ohm_0603
USBN4 <Priority> 1 2
16 USBN4 3 4
USBP4
16 USBP4
2 1
3 4
USBN5 5 6
16 USBN5 7 8
USBP5 KEY USB_OC#5
16 USBP5 9 10
L10 2X5(9)USB_yellow
X_CMC_90ohm_0603 N31-2051131-P05
<Priority>
1
USBVCC2
2
L7 JUSB1
X_CMC_90ohm_0603
USBN6 <Priority> 1 2
C 16 USBN6 3 4 C
USBP6
16 USBP6
2 1
3 4
USBN7 5 6
16 USBN7 7 8
USBP7 KEY USB_OC#5
16 USBP7 9 10
L8 2X5(9)USB_yellow
X_CMC_90ohm_0603 N31-2051131-H06
<Priority>
1
REAR USB PORT USBVCC3 STACKED USB CONNECTOR 5VDUAL KBVCC

F4 F3 1.5A
5VDUAL
C201
1.1A C217 + EC18
R90 + EC19 R77 X_C0.1U25Y
47KR X_C0.1U25Y 47KR .CD1000U6.3EL15
USB_OC#2 .CD1000U6.3EL15 USB_OC#1
16 USB_OC#2 16 USB_OC#1
CP19 X_COPPER
R91 R72
C366 56KR CP9 X_COPPER C367 56KR
Near S.B Near S.B
C0.1U25Y C0.1U25Y
B B
2
USB2
L6 5 21
X_CMC_90ohm_0603 6 22 USB1
<Priority> 7 23
16 USBN2
3
16 USBP2 8 UP 24
2 1
3 4
16 USBN3 1 25 9 9 10 10
2 26 L4
16 USBP3
3 27 X_CMC_90ohm_0603 1 5
1 5
L5 4 D OWN 28 16 USBN1
<Priority> 2 2 6 6
X_CMC_90ohm_0603 3 7
16 USBP1
2 1
3 4
<Priority> LAN_USB1A 3 7
16 USBN0 4 4 8 8
CP17 X_COPPER
16 USBP0
1
12 12 11 11
CP18 X_COPPER L3
X_CMC_90ohm_0603
<Priority>
USBx2-D8-BK
4
A A

Title Rev
USB Port 0A
5 4 3 2 1
5 4 3 2 1
Super I/O SYSTEM ROM VCC3

C380 Hardware Monitor
x_C0.1U25Y
VCC3 U15
1 32
Near SIO
VPP VCC
PCIDEVRST# 2 RST# CLK 31 LPC_PCLK
LPC_PCLK 7 SYSTEM Thermal RT2
PRES3 3 30 PRES4 R50
VCC3 FGPI3 FGPI4
FLOPPY DISK HEADER
PRES2 4 29 VREF THERMDC_CPU
PRES1 FGPI2 IC(VIL)
5 FGPI1 GNDA 28
C384 PRES0 6 27 10KR1% 10KRT1%
FGPI0 VCCA
U5
FDD1 BIOS_WP# 7 WP# GND 26 SMD
R53 X_C0.1U25YTBL# 8 25
D
4.7KR DRVDEN0 2 1 TBL# VCC LPC_INIT# VTIN1 D
12,27 PCIDEVRST# 30 LRESET# DRVDEN0 1 4 3 9 ID3 INIT# 24
21 2 10 23 LPC_FRAME#
7 SIOPCLK LCLK SMI#/IRQIN1 6 5 ID2 FWH4
23 3 INDEX# 11 22 R49
17 SERIRQ SERIRQ INDEX# 8 7 ID1 RFU
22 4 MOA# 12 21 THERMDA_CPU
18 LPC_REQ# LDRQ# MOA# 10 9 ID0 RFU
29 5 LPC_AD0 13 20
18 LPC_FRAME# LFRAME# FANIN3 12 11 FWH0 RFU
6 DSA# LPC_AD1 14 19 30KR1%
DSA# 14 13 LPC_AD2 FWH1 RFU
18 LPC_AD0 27 LAD0 FANOUT3 7 16 15 15 FWH2 RFU 18
26 8 DIR# 16 17 LPC_AD3
18 LPC_AD1 LAD1 DIR# 18 17 GND FWH3
25 9 STEP# VREF
18 LPC_AD2 LAD2 STEP# 20 19
24 10 W RDATA#
18 LPC_AD3 LAD3 WRDATA# 22 21
11 WE# PLCC-32 R48
WE# 24 23 VCC3
125 13 TRACK0# <Priority> 10KR1%
GPX2/GP13 TRACK0# WP# 26 25 default is high RN76 8P4R-1KR
123 GPY1/GP15 WP# 14 28 27
128 15 RDDATA# PRES4 2 1 PRES0 2 1 C74 CPU_TMP
GPSA1/GP10 RDDATA# 30 29 VCC3 VCC3
121 16 HEAD# PRES3 4 3 BIOS_WP# 4 3 C0.1U25Y
GPSA2/GP17 HEAD# DSKCHG# 32 31 PRES2 TBL#
126 GPX1/GP12 DSKCHG# 17 34 33 6 5 6 5
124 PRES1 8 7 LPC_INIT# 8 7 RT3
GPY2/GP14 PD0 CONN-FDD(4)(5)(6)V
127 GPSB1/GP11 PD0 42 10KRT1%
122 41 PD1 N32-2173021-H06 RN75 8P4R-1KR
GPSB2/GP16 PD1 PD2 THERMDC_CPU
120 MSO/IRQIN0/GP20 PD2 40
R52 X_10KR 119 39 PD3
VCC MSI/GP21 PD3 PD4
VREF 101
PD4 38
37 PD5
Near CPU
VREF PD5
SIO
CPU_TMP 102 36 PD6
THERMDA_CPU VTIN PD6 PD7
5 THERMDA_CPU 103 CPUTIN PD7 35
VTIN1 104 31
SYSTIN SLCT RSLCT 25
93 32 +12V
RPE 25 PD[7..0] 25
C
94
95
96
GP26
GP25
GP24
PE
BUSY
ACK#
33
34
43
RBUSY
RACK#
25
25
FAN CONTROL CPU FAN D7 X_1N4148_SOD123
C
GP23 SLIN# RSLIN# 25
-12VIN 97 44 R86 4.7KR R85 27KR CPU-FAN
VIN3 INIT# RINIT# 25
2
4
98 45 Q9
VCC3 VIN2 ERR# RERR# 25
+12VIN 99 46 1 N-APM2054N_SOT89
VIN1 AFD# RAFD# 25
100 47 VCC R89
VCORE CPU_VCORE STB# RSTB# 25
10KR
3
106 88 RN7 X_8P4R-4.7KR C233
GP54 IRRX/GP34 CTSB# X_C0.1U25Y C227
107 GP53 GP45 69 7 8
108 87 DSRB# 5 6 C0.1U25Y
GP52 IRTX GP40 D CDB# CPUFAN1
109 GP51 GP40 75 3 4
110 RIB# 1 2 R104
GP50 10KR R84
DCDA# 56 DCDA# 25 3
SYS-FANPWM 116 50 X_0R0805
FANPWM1 DSRA# DSRA# 25 U8 2
SYS-FAN 113 53
FANIN1 SINA SINA 25 1
CPU-FANPWM 115 51 RTSA# CPU-FANPWM 1 14
FANPWM2 RTSA# RTSA# 25 FAN1_IN FAN1_DRV
CPU-FAN 112 54 SOUTA SYS-FANPWM 2 13
FANIN2 SOUTA SOUTA 25 FAN2_IN FAN1_SEN
R51 X_0R 111 49 3 12 YJ103-BO
17 THRMS# OVT# CTSA# CTSA# 25 +12V VCC12 FAN2_DRV
52 DTRA# C276 4 11 R108
DTRA# DTRA# 25 C1 FAN2_SEN
105 57 C0.1U25Y 5 10 6.49KR1%
GP55 RIA# RIA# 25 C2 FAN3_DRV
118 GP22 6 CHRPMP FAN3_SEN 9
CHASISS 76 84 D CDB# C275 7 8
CASEOPEN# DCDB# DCDB# 25 GND FAN3_IN
19 79 DSRB# C0.1U25Y
PME# DSRB# DSRB# 25
82 W83391TS
89
SINB
80
SINB 25
C277 SYS FAN
WDTO/GP33 RTSB# RTSB# 25
91 83 SOUTB C0.1U25Y
GP31 SOUTB SOUTB 25
92 78 CTSB#
GP30 CTSB# CTSB# 25
81 +12V
DTRB# DTRB# 25
67 85 RIB#
PSOUT#/GP47 RIB# RIB# 25
68 D11 X_1N4148_SOD123
PSIN/GP46
B
64 SUSLED/GP37 GA20M 59 B
90 60 R233 R221 27KR SYS-FAN
PLED/GP32 KBRST
2
4
5VSB 72 63 Q26 4.7KR
PWRCTL#/GP42 KBDATA N-APM2054N_SOT89
15,17,27 SUSB# 73 SLP_SX#/GP41 KBCLK 62 1
18 66 R216
7 SIO48M CLKIN MSDATA
65 10KR
3
MSCLK BEEP C374
61 VSB BEEP 58
C16 74 X_C0.1U25Y C375
VBAT VBAT
70 BIOS_WP# C0.1U25Y
C0.1U25Y RSMRST#/GP44 SFAN1
VCC3 28 VCC3 PWROK/GP43 71
C36 R245
X_C0.1U25Y
C17 10KR R242 3
12 VCC_1 VSS1 20 2
48 55 X_0R1206
VCC_2 VSS2 1
77 GP36 GP35 86
C0.1U25Y 114 117 YJ103-BO
VCC_4 VSS4(AGND)
THERMDC_CPU R247
THERMDC_CPU 5
W 83627THF 6.49KR1%
VCC
CP3
X_COPPER
Voltage Detect Chasiss Intrusion Header

Distribute near the VCC
power pin of the LPC +12V
R45 1 2 28KR1% +12VIN
SOUTA L: Disable KBC H: Enable KBC
A VCC SOUTB L: 24MHZ H: 48MHZ R39 1 2 232K -12VIN VBAT VCC A
-12V
RTSA# L: CFAD=2E H: CFAD=4E
DTRA# L: PNP Default H: PNP no Default
Power-on strap, enable 48MHz R21
RN2 8P4R-4.7KR 2MR R6 Micro Star Restricted Secret
VCC RTSA# 7 8 10KR
1
C14 C385 C86 R27 DTRA# 5 6 ALARM 28 Title R ev
X_C0.1U25Y
SOUTB SOUTA 3 4 R44 R40 CHASISS LPC I/O & ROM & Floppy&Fan
VCC 1 2 GP40 10KR1% 56KR1% JCASE1 0A
X_C0.1U25Y X_C0.1U25Y 4.7KR
1
BEEP Q2 Document Number MS-7142
2 N-MMBT3904_SOT23
2
2
THERMDC_CPU VREF H1X2_black No. 69, Li-De St, Jung-He City, W ednesday, November 17, 2004
5 4 3 2 1
5 4 3 2 1
LPT / COM PORTS VCC

For EMI
CN4
Keyboard/Mouse Ports
RACK# 1 2
RB USY 3 4
RPE 5 6
D5 RSLCT 7 8
KBVCC
1N4148_SOD123 8P4C-180P50N
CN7
RSLIN#_ R59 4.7KR RAFD# 1 2
RINIT# 3 4
RN14 RERR# 5 6
D D
24 RACK#
RACK#
RB USY
7 8 RSLIN#_ 7 8
EC4
STACKED PS2 CONNECTOR
24 RBUSY 5 6 +
RPE 3 4 8P4C-180P50N C4 C5 JKBMS1
24 RPE
RSLCT 1 2 X_C10U16EL X_C0.1U25Y C0.1U25Y
24 RSLCT
CN6 14 16
8P4R-4.7KR PD0 1 2
PD1 3 4
RN27 PD2 5 6 PGND PGND PGND 4 10
RAFD# 7 8 PD3 7 8
24 RAFD#
RINIT# 5 6 6 12
24 RINIT#
RERR# 3 4 8P4C-180P50N
24 RERR#
RSTB# 1 2 FB4 2 8
24 RSTB#
CN5 X_120-600mA 13
8P4R-4.7KR PD4 1 2 XKBDAT1 1 7
16 KBDAT#
PD5 3 4
RN24 PD6 5 6 5 11
8P4R-4.7KR PD7 7 8
PD0 7 8 3 9
PD1 5 6 8P4C-180P50N FB6
PD2 3 4 X_120-600mA 15 17
PD3 1 2 RSTB# XKBCLK1
16 KBCLK#
PD4 7 8
PD5 5 6 C137 C180P50N PGND PGND
PD6 3 4 CONN-KB_MS
PD7 1 2 N56-12F0031-F02
PGND FB5
RN19 X_120-600mA
P D[7..0] 8P4R-4.7KR XMSCLK1
24 PD[7..0] 16 MSCLK#
C CP14 X_COPPER C
FB2
CP15 X_COPPER X_120-600mA
C373 XMSDAT1
16 MSDAT#
C0.1U25Y
D3 U4
+12V +12VCOM 1 20 VCC CP16 X_COPPER
VDD(12V) VCC(5V)
1N4148_SOD123
RTSA# 16 5 NRTSA
24 RTSA# DA1 DY1
DTRA# 15 6 NDTRA PGND C22 C180P50N
24 DTRA# DA2 DY2 KBVCC
24 SOUTA SOUTA 13 8 NSOUTA XKBCLK1
DA3 DY3 RN3 C19 C180P50N
RIA# 19 2 NRIA# LPT1 MSDAT# 1 2 XMSCLK1
24 RIA# RA1 RY1
24 CTSA# CTSA# 18 3 NCTSA# KBDAT# 3 4
DSRA# RA2 RY2 NDSRA# MSCLK#
24 DSRA# 17 RA3 RY3 4 5 6
24 SINA SINA 14 7 N SINA KBCLK# 7 8 XKBDAT1 C15 C180P50N
DCDA# RA4 RY4 N DCDA# R5
24 DCDA# 12 RA5 RY5 9
8P4R-4.7KR X_330R XMSDAT1 C11 C180P50N
D4 51
-12V -12VCOM 10 11 PGND
VSS(-12V) GND
1N4148_SOD123 GD75232S
C77 I95-7523212-T07 13 RSLCT
X_C0.1U25Y 25
12 RPE For EMI SERIAL PORT 2
24
B RB USY B
Multiple RS232 Drivers and Receivers 11 C354 X_C0.1U25Y
23 U12 C355 X_0.1u
10 RACK# +12VCOM 1 20
VDD(12V) VCC(5V) VCC
22
9 PD7
CN2 21 RTSB# 16 5 NRTSB
PD6 24 RTSB# DA1 DY1
COM1 NRIA# 8 DTRB# NDTRB
10
1 2 24 DTRB# 15 DA2 DY2 6

NCTSA# 3 4 20 24 SOUTB SOUTB 13 8 NSOUTB
N DCDA# NDSRA# NDSRA# 48 7 PD5 DA3 DY3
1 6 5 6
N SINA 2 7 NRTSA NRTSA 7 8 19 RIB# 19 2 NRIB#
PD4 24 RIB# RA1 RY1
NSOUTA 3 8 NCTSA# 6 24 CTSB# CTSB# 18 3 NCTSB#
NDTRA NRIA# 18 DSRB# RA2 RY2 NDSRB#
4 9 8P4C-180P50N 24 DSRB# 17 4
5 PD3 SINB RA3 RY3 N SINB
5 24 SINB 14 RA4 RY4 7
PGND 17 RSLIN#_ DCDB# 12 9 N DCDB#
24 DCDB# RA5 RY5
CONN-COM 4 PD2
11
N51-09M0021-F02 16 RINIT#
CN3 3 PD1 -12VCOM 10 11
NDTRA 15 RERR# C353 X_0.1u VSS(-12V) GND
1 2
N SINA 3 4 2 PD0
PGND NSOUTA 5 6 14 RAFD# GD75232S
N DCDA# 7 8 1 RSTB#
8P4C-180P50N JCOM1
RESVD N DCDB# 1 2 N SINB
NSOUTB 3 4 NDTRB
L2 X_80S/1206 52 5 6 NDSRB#
NRTSB 7 8 NCTSB#
1 2 NRIB# 9
A COM-D9-GN A
PGND
CONN-LPT NRTSB 1 2
N51-25F0041-F02 NDSRB# CN10
NCTSB#
3 4 Micro Star Restricted Secret
5 6 X_8P4C-180P
CP2 X_COPPER For EMI NRIB# 7 8 Title R ev
FB3 N DCDB#
KeyBoard/Mouse/LPT/COM 0A
1 2
PGND RSLIN#_ 0R RSLIN# NSOUTB 3 4 CN11 Document Number MS-7142
RSLIN# 24
N SINB 5 6 X_8P4C-180P
NDTRB 7 8 MICRO-STAR INT'L CO.,LTD. Last Revision Date:
5 4 3 2 1
A B C D E
3VDUAL 3VDUAL
TXD+ 3VDUAL 17
7mil TXD- Yellow
8mil
7mil RXIN+ R93 R83
RXIN- EC29 X_CE470U10VD25A400RO 330R 330R
9 18
C296 0.1U/16V C223 X_C1000PX7R NC
C244 X_C1000PX7R 1 5 13
R117 R118 C287 0.1U/16V RCT
R119 R120 49.9R1% 49.9R1%
LAN_USB1B 10
49.9R1% 49.9R1% 3VDUAL C286 0.1U/16V TX/RX_LEDPWR 17 AMBER+ RX-
TX/RX_LED 18 AMBER- 2 6 14
C314 0.1U/16V 9 NC TCT
FB20 X_L120RD6A3D25 RCT 13 NC 11
4 C329 0.1U/16V RXIN- 10 RDN TCT 4
TCT 14 NC 3 7 15
C279 C278 C332 0.1U/16V 11 NC RX+
C0.01U16V3X7RL C0.1U25V3Y5VL RXIN+ 15 RDP 12
C326 0.1U/16V TXD- 12 TDN TX-
Near PHY TXD+ 16 TDP 4 8 16 19
100/10_LEDPWR 19 GREEN+ TX+
3VDUAL 3VDUAL 100/10_LED 20 GREEN-
Green
USB2
C240 C235 20
RN66 R159 33R MIICRS C0.01U16VX7R C251 C231
MIICRS 18
1 2 TX/RX_LED R165 33R MIICOL 0.1U/16V C1000PX7R C1000PX7R
MIICOL 18
3 4 100/10_LED
5 6 LAN_LED2
7 8 LAN_LED3 Yellow Green
8P4R-10K
MIITXD3
MIITXD3 18
MIITXD2
MIITXD2 18
MIITXD1 VCC3
MIITXD1 18
MIITXD0
MIITXD0 18
3VDUAL U14
24
23
22
21
20
19
18
17
16
15
14
13
U9 MIITXEN
MIITXEN 18 18 SEECS
SEECS 1 CS VCC 8 1 2 3 4 5 6 7 8
SEECK 2 7
LED3
LED2
LED1
LED0
VDD2
GND2
CRS
COL
TXD3
TXD2
PD
INT
18 SEECK SK NC
R170 10KR SEEDI 3 6 C372
18 SEEDI DI NC
SEEDO X_C0.1U16VY5V
TX+
TX-
RX+
RX-
NC
NC
NC
NC
18 SEEDO 4 DO GND 5
25 VDDRX TXD1 12
RXIN- 26 11 X_AT93C46
RXIN+ RX- TXD0
27 10
VT6103L
RX+ TXEN XLIN

28 FXSD TXC 9
29 GNDRX TXER 8
30 7 RN68 X2
LAN_REXT GNDPLL VDDC XLOUT
31 REXT GNDC 6 1 2 MIITXCK 18
32 VDDPLL RXER 5 3 4 MIIRXER 18
3
33 4 5 6 25MHZ-18PF 3
GNDTXC RXC MIIRXCK 18

TXD- 34 3 7 8
TX- RXDV MIIRXDV 18
TXD+ 35 2 C309 C310
TX+ GND1 8P4R-33R C18P50V2NPO C18P50V2NPO
36 1
GNDOSC
VDDOSC
VDDTX VDD1
GNDTX
RXD3
RXD2
RXD1
RXD0
MDIO
MDC
RST
XO
XI
R113
6.49KR1% VT6103L
37
38
39
40
41
42
43
44
45
46
47
48
RN67
1 2 MIIRXD0 18
3 4 MIIRXD1 18
5 6 MIIRXD2 18
7 8 MIIRXD3 18 Strap Options 0 1 Description
8P4R-33R LED0 / LINK Enable Disable Test Mode Enable
XLOUT
XLIN LED1 / SPD100 Speed10 Speed100 Speed Select
MIIMDCK
MIIMDCK 18
LED2 / DUPLEX Half Full Duplex Mode Select
MIIRST R146 X_0R2 MIIMDIO LED3 / NWAYEN Disable Enable N-Way Enable
18 MIIRST MIIMDIO 18
C317 C311
X_C1U10VY5V X_C1U10VY5V
Use K8T800Pro remove all VCC
VGA CONNECTOR components
2
F2 2
VCC
D6 M_F-MICROSMD110
POLY SWITCH
3 3 7 7 VCC
AB 1 8
AG 1 8 VVS YNC
2 2 6 6
AR 4 5 VH SYNC CB2 JVGA1
4 5
16
M_Z-PACDND006M_MSOP8 X_C0.1U25Y
6 R68 R61
FB11 M_30L500m_200 1 11 M_10KR M_10KR
12 AR
7
FB10 M_30L500m_200 2 12
12 AG DDCDATA 12
8
FB9 M_30L500m_200 3 13
12 AB
9
4 14
R73 R74 R75 C183 C184 C185 C181 C177 C170 10
M_75R M_75R M_75R X_C22P50N 5 15 DDCCLK 12
X_C22P50N M_C22P50N M_C22P50N
X_C22P50N M_C22P50N 17
M_CONN-VGA
VCC
R63
M_4.7KR
R64 M_22R VVS YNC R62 M_0.082U300m

12 VSYNC
1 1
R66
M_4.7KR
VCC
R69 M_22R VH SYNC R65 M_0.082U300m
12 HSYNC
C157 C150 Micro Star Restricted Secret
Trace Note:
1.The 5V traces should be 20 mils to VGA/DFP M_C22P50N
M_C22P50N Title Re v
VIA VT6103L MII PHY & VGA 0A
A B C D E
8 7 6 5 4 3 2 1
5VSB
R175
5VSB
LINEAR MODE
330R
R150
28 PLED1
R155 X_1KR
Q23 3VDLDEC#
N-MMBT3904_SOT23
4.7KR VCC2_5 3VDUAL 3VDUAL
D D
R154
10KR THESE OUTPUT AND INPUT PIN MUST
BE PULL HIGH
R218 R166
R169
330R 330R
5VSB 10KR
CPU_GD 5 CPU PWR_GD OUTPUT

ALL_PWRGD 18,28 CHIP PWR_GD OUTPUT
5VSB I2C BUS
SMBCLK1 7,8,17
R134 I2C BUS
SMBDATA1 7,8,17
330R RSMRST# 18 CONNECT TO SOUTH BRIDGE RSMRST# SIGNAL
SUSC# 17 SOUTH BRIDGE POWER CONTROL(SLP_S4# OR SUSB#) SIGNAL
R145 SOUTH BRIDGE POWER CONTROL(SLP_S3# OR SUSC#) SIGNAL
28 SUSLED SUSB# 15,17,24
ATX POWER OK INPUT 5VSB
X_1KR PW_OK 28
.CD1000U6.3EL15
R143
Q15 EXTRAM
N-MMBT3904_SOT23 VCC
VDIMM LINEAR OR PWM SELECT
EC35
4.7KR 5VSB +
VDIMM MODE EXTRAM R147 VCC Q29
10KR 1 8
LINEAR REGULATOR PULL LOW 5V_DRV 2 7 5VDUAL
+ 3 6
PWM REGULATOR PULL HIGH C336 5VSB_DRV 4 5
.CD1000U6.3EL15
EC25
C0.1U25Y X_.CD1000U6.3EL15 + NN-P07D03LV_SO8
EC33
PCISLOTRST# PCIDEVRST#
D
C C
C312 C300 VCC VCC3 U11 Q11
48
47
46
45
44
43
42
41
40
39
38
37
+
20N03 EC22
C22P50N C33P50N G 470U/10V
PLED1/EXTRAM
CPU_PWGD
GND
CHIP_PWGD
I2C_CLK
I2C_DATA
5VSB
PLED0/3VDLDEC#
RSMRST#
S5#
S3#
PWR_OK
R153
R151 CHARGE PUMP
S
330R 220R0805 VOLTAGE Low RDS ON MOSFET
C351 9VSB OUTPUT
FRONT PANEL RESET BUTTON 1 36 C437 X_C22P50N
7,28 FP_RST# FP_RST# C1
PCIRST# INPUT 2 35 C349 VCC3
15,16 PCIRST# PCIRST# C2
3 34 C0.1U16X C436 X_C22P50N
D
22 HDDRST# HDD_RST# CHRPMP
PCIRST# BUFFER OUTPUT 12,24 PCIDEVRST# 4 DEV_RST# AGND1 33
5 32 C1U16Y0805
14 PG_VCORE VDD_GD 5VUSB_DRV
6 31 Q24
14 VCORE_EN VDD_EN 5V_DRV
7 1.25VREF VAGP_DRV 30 G
8 29 N-P3055LD_TO252
VCC VCC5 VAGP_SEN
PCI SOLT PCIRST# BUFFER OUTPUT R152 33R 9 28
19,20 PCISLOTRST#
S
SLOT_RST# WD_DET VDDQ
VCC3 10 VCC3 1.2VLDT_DRV 27
11 26 VDDQ
VDDA_25 2.5VDDA 1.2VLDT_SEN
VDIMM_HDRV
12 25
VDIMM_HSEN
VDIMM_LDRV
VDIMM_LSEN
AGND0 TMP_FAULT# THRM# 5
+1
.CD1000U6.3EL15
EC26 C301 C315C316
3VSB_DRV
3VSB_SEN
DDRTYPE
MS6 CONNECT TO CPU +
2
4
PSOUT#
5VSB 5VSB X_.CD100U16EL11
C4.7U10Y0805 Q10
MEMBT
2
PSIN#
EC28
5VSB
C0.1U25Y
C0.1U25Y R178 R190 R189 1 N-APM2054N_SOT89
CLOSE TO CHIP 10KR X_10KR 10KR
SS
VDD_12_A
3
R164 R168
13
14
15
16
17
18
19
20
21
22
23
24
4.7KR 10KR
VCC2_5 5VSB +
B 28 PS_OUT# B
EC20
WATCHING DOG TIMER SELECT .CD1000U6.3EL15
C333 C0.22U10X WD_DET TIMER
C331 PULL LOW OFF
C0.1U25Y
5VSB THE TWO MODE ONLY ONE MODE PRESENT
C0.1U25Y
C328 PULL HIGH ON SINGLE MODE DUAL MODE

D
C334
CONNECT TO SOUTH BRIDGE SUSB# SIGNAL

R158 Q18 X_C10U10Y1206 THIS MODE SELECT BY PIN THIS MODE SELECT BY
G 2N7002S 47 PULL HIGH 5VSB PIN 47 PULL LOW
15,17,24 SUSB#
S
4.7KR 3VSB REGULATE BY 5VSB AND VCC3

R172 4.7KR THE VDIMM_HSEN IN LINEAR MODE
THE TWO BLOCK CHOICE ONE C318
SUPPORT SYSTEM POWER CONTROL C0.1U16X
VCC3
DDRTYPE VDIMM_HSEN VCC3
EC27 .CD1000U6.3EL15
VREF
DDR AND DDR II VOLT SELECT
N-P3055LD_TO252 DDR 2.0V
+
S
DDRTYPE VDIMM Q13 3VDUAL Q28 5VSB

G DDR II 1.7V 1 8
PULL LOW 2.5V 5V_DRV
DDR TERMINATION 2
3
7
6
PULL HIGH 1.8V 3VSB_DRV 4 5
R112 R111
D
R12 1KR1%
.CD1000U6.3EL15
VDD_25_SUS NN-P07D03LV_SO8
D
3VDUAL 75R1% 75R1% +

U3 R16 1KR1%
EC31
8 1 VTT_DDR_SUS Q12
VREF2 VIN VDD_25_SUS
A 7 ENABLE GND 2 G A
6 3 N-P3055LD_TO252
GND
VCNTL VREF1
5 4
S
BOOT_SEL VOUT
C1U16Y0805
EC7
1
1
EC2
.CD1000U6.3EL15
EC3
.CD1000U6.3EL15
.CD1000U6.3EL15
.CD1000U6.3EL15
.CD1000U6.3EL15
W83310DS_SOIC8 Micro Star Restricted Secret

9
C225
EC21
EC24
+ + + + +
C25 C26 Title R ev
C0.1U25Y C0.1U25Y ACPI POWER CONTOLLER (MS-6)
2
THIS POINT VOLT CAN'T SETTING 0A

BELOW 2.9V Document Number MS-7142
8 7 6 5 4 3 2 1
5 4 3 2 1
FRONT PANEL System Voltage Regulator

VCC
330R H DD+
R273 VCC VCC2_5

D D
U13
For MSI / Intel Front Panel LT1087S_SOT89
3 VIN VOUT 2
JGS1
JFP1 EXTSMI#
17 EXTSMI# 1
ADJ
2 C361
C426 N31-2051231-H06 X_C0.1U25Y +
VCC3
X_C0.1U25Y
X_H1X2_black R217 EC30
1
1 2 PLED1 .CD1000U6.3EL11.5
HDD+ PLED 360R1%
H DDLED 3 4 SUSLED
R280 HDD- SLED
4.7KR 5 6 PWRSW R275 100R
RESET- PWSW+ PWBTIN# 17
R278 100R 7 8 C455 C456 C431 R203
7,27 FP_RST# RESET+ PWSW-
C0.1U25Y 390R1%
X_C0.1U25Y
X_C0.1U25Y
9 NC
C444
X_C0.1U25Y
7,27 CLK_RESET# 1 GND SPEAKER 2

D8
SUSLED 3 4 VCC3
27 SUSLED SLED BUZ+ IDEACTP# 22
PLED1 1N4148_SOD123 EC32
27 PLED1 5 PLED BUZ- 6
+
C
VCCSPK 8 VCC C
.CD1000U6.3EL15
D9
JFP2 H DDLED
IDEACTS# 22
H2X4(7)_color-N31-2041101
N31-2041101-H06 1N4148_SOD123 3VDUAL 3VDUAL
D10
R283 VSUS2_5
SATALED 18
R239
24 ALARM
1N4148_SOD123 49.9R1% R95
220R0805 R162 4.7KR 360R1% VSUSNB
VCC
R276
Q27
17 SPKR
N-MMBT3904_SOT23
1KR C445 R98
X_C0.1U25Y R234 C376 390R1%
200R1% C10U10Y0805
B
ATX Power Connector POWER OK Circuits B
VCC3
3VDUAL VSUS2_5
VCC
VCC3 R161
JWR2 R148
4.7KR
11 3.3V 3.3V 1 4.7KR
-12V 12 -12V 3.3V 2 -CPURST 5
13 3 R56
PS_OUT# GND GND 4.7KR Q17
27 PS_OUT# 14 PS_ON 5V 4 VCC
15 5 N-MMBT3904_SOT23
GND GND R160
16 GND 5V 6
17 7 Q16
GND GND 18,27 ALL_PWRGD
18 8 PW_OK
-5V -5V PW_OK PW_OK 27 1KR
C141 19 9 5VSB N-MMBT3904_SOT23
X_C1000P50N 5V 5V_SB
VCC 20 5V 12V 10 +12V
PWR-ATX20 R115
C99 Q14
11 -LDTRST
C119
C0.1U25Y C0.1U25Y 1KR N-MMBT3904_SOT23
A A

Title R ev
System Regulator&Front Panel 0A
5 4 3 2 1
5 4 3 2 1
BULK / Decopuling SYSTEM ATX VIA-Hole * 9

5VSB
Place on CPU Solder side VCC
VCORE MH3
C88 C438 1 CENTER MH6
C463 C348
X_C0.1U25Y X_C0.1U25Y 2 6 1
C468 C66 C0.1U25Y X_C0.1U25Y GND GND CENTER
D D
3 GND GND 7 2 GND GND 6
X_C0.22U16Y C0.01U50X
VCC3 5 9 4 8
GND GND GND GND
X_150 Drill / 300 Pad-0 5 GND GND 9

C402
C190 C421 C462 C174 C430 X_150 Drill / 300 Pad-0
X_C0.1U25Y C0.1U25Y X_C0.1U25Y X_C0.1U25Y
X_C0.1U25Y C0.1U25Y MH5
Buck-decoupling Mid-Freq. decoupling Cap.
( 7 * 4.7uF / 0805 , 4*10uF/1206) 1 CENTER
MH4
2 GND GND 6
VCORE 1
+12V CENTER
3 GND GND 7
3VDUAL 2 6
+12V -12V -5V GND GND
4 GND GND 8
C136 C96 C175 C120 C151 C477 C473 C470 3 7
GND GND
C10U10Y1206
C10U10Y1206
C10U10Y1206
X_C1U25Y1206
X_C10U10Y1206
X_C10U10Y1206
X_C10U10Y1206
X_C10U10Y1206
C93 5 9
C439 C386 GND GND
C401 C193 C109 4 GND GND 8
C0.1U25Y C0.1U25Y X_C0.1U25Y X_150 Drill / 300 Pad-0
X_C0.1U25Y X_C0.1U25Y 5 9
C0.1U25Y GND GND
MH7 X_150 Drill / 300 Pad-0

1 CENTER
C 2 GND GND 6 C
Impedance Test
VCC3 3 7
FM4 FM2 FM9 FM5 FM3 FM6 FM8 FM7 GND GND MH2
T2 T3
1 1 4 GND GND 8 1 CENTER
X X X X X X X X 2 2
X_YJ102 X_YJ102
X_FM X_FM X_FM X_FM X_FM X_FM X_FM X_FM X_150 Drill / 300 Pad-0 3 GND GND 7
F_PAD_M120
4 GND GND 8
5 GND GND 9
X_150 Drill / 300 Pad-0
PGND
B B
A A

Title R ev
BULK / Decopuling 0A
5 4 3 2 1
5 4 3 2 1
K8 CPU Power NB & SB & AGP Power Other Power

CPU Side DDR Side
NB & SB Core-Power
K8 Vcore ->
DDR Power -> -> "VCC2_5" (?A)
"VCORE" (60A) 5VDUL DDR_3VDUAL
"VDD_25_SUS"
D
(9.5A) NB & SB Core-Suspend D
VDDA_2.5 Power ->
Power -> "VSUS2_5" (?A)
"VDDA_25" (0.11A)
DDR-VTTPower -> 3VDUL 9VSB
"VTT_DDR_SUS" NB AGP8X Power ->
HT Power ->
(5.21A) "VDDQ" (1.5A)
"VDD_12_A"&"VLDT0"
(2A)
ATX Power
Supply
C +5VSB VSUS2_5 C
5VDUAL 3VDUAL
-> SB
( Q36.5) ( Q35.3 ) ( Q22/S )
VCC
Charge Pump
-> 9VSB
MS-6.34
VCORE ->
+12V K8 CPU
B ( CHOK2/2 ) DDR_25_SUS B
+5VR -> -> DDR

( Q13/S )
Audio
( U21/2 )
VCC1_8 ->
SATA VTT_DDR_SUS
( VR1/2 )
-> DDR
VDDA_25 -> ( Q8/4 )
VCC3 K8 CPU(I/O)
FB2
VDDQ ->
A A
AGP
( Q28/S )
VCC1_5 -> Title R ev
VDD_12_A Power Generation
-12V NB & SB 0A
-> HT Document Number MS-7142
( VLINK ) ( Q19/1 ) MICRO-STAR INT'L CO.,LTD. Last Revision Date:
( Q21/S ) No. 69, Li-De St, Jung-He City, Wednesday, November 17, 2004
5 4 3 2 1
5 4 3 2 1
Ver. 00A 2004/06/27

New SPEC(Copy from 7032-10A)
D D
C C
B B
A A

Title R ev
History 0A
5 4 3 2 1
5 4 3 2 1
NB FAN/HEAT-SINK
U7-F U7-H
PCB1
MSI MSI
VBAT1_M
D D
7094-00A BAT-BCR2032P
D06-0100101-P01
DDR DDR
P50-071420A-E48 X_NB-HEATSINK-W/Fan NB-HEATSINK-W/O Fan
_ E31-0400310-A02
U15_M
BIOS FLASH ROM

C C
SST49LF020-33-4C-NH
U6_1 U6_2
1
2
CPU_RM CPU_RM
B B

A Title Rev A
OPTION PART 0A
5 4 3 2 1
5 4 3 2 1
For EMI
VCC3 VCC
D D
C406 C360 C298 C161 C363 C147 C146 C178 C377 C270
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
VDD_25_SUS VCC3
VCC VCC VCC
VCC
C30
C308 C214 C289 C260
C464 C49
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
C75 C133
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
VCORE
C C
VDDQ
PGND VCC
VDD3
VCC3 C490
X_C0.1U25Y
C387
C268 C405 C352 C362 C189 C429 C403 C153 C409 VDDQ
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
VCC
B B
+12V -12V 3VDUAL
C465 C2 C408
C341
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
A A
Title Rev
For EMI 0A
5 4 3 2 1

MSI - 6c25b - MS-7142

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

MSI - 6c25b - MS-7142

Uploaded by

Copyright:

Available Formats

5 4 3 2 1

MS-7142 VER:0A Title

*Winbond 83627THF LPC I/O System Memory DDR DIMM 1 & 2 8

*PCI SLOT * 3 VIA VT1617 AC'97 CODEC 21

System Regulator&Front Panel 28

Micro Star Restricted Secret

Stelly Chang MICRO-STAR INT'L CO.,LTD.

HCLK+ & HCLK-(100/133/166/200) / GCLK(66)

VCLK(66) / OSC(14) / PCISB(33) / USBCLK(48) / APICCLK(14)

Dual ATA 100/133

SUPER I/O 2M ROM

Dual USB 1.1 OHCI

C * GPO9/GPI9/UDPWREN UDPWREN NA * GPI9/UDPWREN UDPWREN NA PCI RESET DEVICE C

DDR DIMM Config.

GPO25/GPI25 /GPIOB GPI25 4.7K ohm Pull down

X_C1000P50N C159 C196 C171 C158 C182 C350 C172

AH25 A20 THRM#

B2 VSS1 VSS93 L28

FB21 X_120S/0805 APICCLK C302 X_10P

C322 CP8 C323

FOR K8T800 Pro USBCLK_SB C295 X_10P

25 SMBDATA1 CPUCLK0_L C294 X_5P

ICS950405 HCLK- C292 T_C10P50N

For K8T800 Pro

FS3 R130 10KR

FS(3:0) CPU HTT PCI

0001 133.90 66.95 33.48

Place near the DIMM

RN41 8P4R-47R0402 RN35 8P4R-47R0402

MEMCLK_H4 C70 MEMCLK_L4

RN53 8P4R-10R0402 C0.1U25Y C0.1U25Y X_C0.1U25Y C0.1U25Y C0.1U25Y

MD63 R103 10R0402 DR_MD63 C1U10Y

DDR Terminations Bank 1

MICRO-STAR INT'L CO.,LTD. Last Revision Date:

FOR K8M800 FOR K8T800pro C202 C0.1U25Y

VCC3 VCC3HCK Around NB

M_0R M_0R M_0R M_0R

CADOP13 J24 E18 CADIP13

CTLON0 F25 A22 CTLIN0

Micro Star Restricted Secret

K8M800/K8T800pro AGP 8X ,V-Link, Misc. Control FOR K8T800pro

AE6 GD26/DVP1D10 PWRGD AE26 PWROK_NB# 17

15 GSERR AC15 GSERR/FPDVIDE SPD2/NC C1 DDCDATA 26 FOR K8M800 -- AN307B 2

Y2 LCOMPP R96 360R1%

15 DBIL AC4 DBIL

R13 R3 4.7R0805 +12VA

R15 1KR 7 R17

150KR C0.01U25Y C24 C78

Micro Star Restricted Secret

AGP PRO Connector

AGP "Vref" => 4X : 0.5*1.5V=0.75 Volt , Add-in Card Power

VCC3 VDDQ 2.0A 1.425 1.575 V

R173 N-2N7002_SOT23 AGP8XDET# Q21

3VDUAL VSUS2_5 VT8237

near chipset VDDAS GND C15P50N C15P50N STXP_2

C391 C389 SRXN_2 5

VCC VCC +12V VCC VCC +12V

AD8 B52 A52 C_BE#0 AD8 B52 A52 C_BE#0

Micro Star Restricted Secret

PCI Connectors 16,19 AD[31..0]

AD8 B52 A52 C_BE#0

Micro Star Restricted Secret

PCI SLOT 3 VIA VT1617 AC'97 CODEC 21