You are on page 1of 46

1 2 3 4 5 6 7 8

PCB STACK UP
LAYER
LAYER
1
2
: TOP
:GND
LX89 SYSTEM DIAGRAM 01
DDR3-SODIMM1 DDR3 channel A
LAYER 3 : IN1
AMD Champlain CPU THERMAL
LAYER 4 : IN2 PAGE 6,7
35mm X 35mm
SENSOR 14.318MHz
LAYER 5 : VCC
A A
LAYER 6 : BOT S1G4 Processor PAGE 5
DDR3-SODIMM2 DDR3 channel B
638P (PGA)45W/35W
PAGE 6,7 PAGE 3,4,5 CPU_CLK CLOCK GEN
NBGFX_CLK ICS9LPRS476AKLFT-->HP
NBGPP_CLK SLG8SP628VTR-->HP
SBLINK_CLK RTM880N-796 -->HP
HT3 PAGE 2

PCI-Express 16X ATI


PCI-E HDMI HDMI
Side port
PARK-PRO 64 bit PAGE 27
Madison 128 bit
X1 X1 NORTH BRIDGE 29mm X 29mm
CRT
CRT
Mini PCI-E DDR3 RAM PAGE 17,18,19 MUXs PAGE 25
LAN RS880
Realtek Card UMA Only 20,21 (S.G)
PAGE 8 LVDS PAGE 26
PCIE-LAN
RTL8111D
A12 LVDS
(Wireless LAN) DDR3 800MHz
B
(10/100/1000)
21mm X 21mm, 528pin BGA PAGE 24 B

VRAM
PAGE 32 PAGE 35 CRT
64MX16X4,64 bit
PAGE 8,9,10,11 LVDS
64MX16X8,128 bit
PAGE 22,23
RJ45
ALINK X4
PAGE 32
SYSTEM CHARGER(ISL6251)
PAGE 40 SATA0 150MB
SATA - HDD1 BT softbreeze FP
SOUTH BRIDGE PAGE 34 Touch
SYSTEM POWER ISL6237
PAGE 34 VFM301
PAGE 34 Screen
PAGE 34 SATA1 150MB 15 PAGE 24
SATA - CD-ROM SB820
14
PAGE 34 21mm X 21mm, 528pin BGA USB1.1
DDR II SMDDR_VTERM
1.8V/1.8VSUS(RT8207) 4.5W(Ext)
PAGE 37 SATA - HDD2
SATA2 150MB 4.3W(Int)
C USB2.0 C

PAGE 34 1,8,9 5 2 3
PAGE 12,13.14.15.16
VCCP +1.1V AND +1.2V(RT8204)
SATA3 150MB USB2.0 Ports Webcam Flash Media
E-SATA RTS5159
PAGE 35 X3 PAGE 29 E-SATA&USB X1 PAGE 23 PCI-E WLAN Card x1
PAGE 33 Combo PAGE 33
Azalia PAGE 26
VGACORE(1.1V~1.2V)Oz8118 I2C LPC
PAGE 38 Accelerometer
STM HP302DL
ENE KBC IDT AUDIO
PAGE 30 92HD80 Amplifier Sub
CPU CORE ISL6265HRTZ-T Woofer
KB3926 Dx PAGE 31 PAGE 31
PAGE 36 PAGE 27
PAGE 37

SMBUS TABLE
Clock gen/Robson/TV tuner Keyboard PAGE 36
SB--SCL0/SD0 /DDR2/DDR2 thermal/Accelerometer +3V
D Touch Pad PAGE 36 D

epress card Digital MIC AUDIO CONN


FAN SPI Speaker
Wlan Card +3VS5 (Phone/ MIC)
PAGE 28 PAGE 37 PAGE 29 PAGE 30 PAGE 29
PROJECT : LX89
EC --SCL/SD Battery charge/discharge +3VPCU Quanta Computer Inc.
EC--SCL2/SD2 VGA thermal/system thermal +3V Size Document Number Rev
Custom 1A
Block Diagram
NB5/RD2
Date: Monday, September 28, 2009 Sheet 1 of 46
1 2 3 4 5 6 7 8
5 4 3 2 1

+1.1V L36
600 ohm, 0.5A

BLM18PG181SN1D(180,1.5A)_6

C417
22U/6.3V_8
C421
0.1U/10V_4
C434
0.1U/10V_4
C422
+1.1V_CLKVDDIO

C420
0.1U/10V_4 0.1U/10V_4
C445
0.1U/10V_4
C426
0.1U/10V_4
02
D 600 ohm, 0.5A +3V_CLKVDD D

L49 +3V_CLKVDD
+3V
BLM18PG181SN1D(180,1.5A)_6
C467
C474 C469 C429 C419 C440 C442 C451 C468 C446
22U/6.3V_8 2.2U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

R242 *261_4 Place within 0.5"


U12
of CLKGEN
+3V_CLKVDD 4 50 CPUCLKP_EXT R253 EXT *0_4 CPUCLKP
VDDDOT CPUK8_0T CPUCLKP 3,12
16 49 CPUCLKN_EXT R252 EXT *0_4 CPUCLKN
VDDSRC CPUK8_0C CPUCLKN 3,12
26 VDDATIG
Place very 35 VDDSB
40 30 NBGFX_CLKP_EXT to NB for external Graphics
close to 48
VDD_SATA ATIG0T
29 NBGFX_CLKN_EXT
NBGFX_CLKP_EXT 10
C/G 55
VDDCPU ATIG0C
28 EXT_GFX_CLKP_EXT R207 EXT *0_4 EXT_GFX_CLKP
NBGFX_CLKN_EXT 10 reference clock
+3V_CLKVDD VDDHTT ATIG1T EXT_GFX_CLKP 12,17
56 27 EXT_GFX_CLKN_EXT R206 EXT *0_4 EXT_GFX_CLKN to PARK -RS880 only
VDDREF ATIG1C EXT_GFX_CLKN 12,17
L46 +3V_CLK_VDDA 63 Clock for Dis only
BLM18PG181SN1D(180,1.5A)_6 VDD48
C470 37 SBLINK_CLKP_EXT R219 EXT *0_4 SBLINK_CLKP
SB_SRC0T SBLINK_CLKP 10,12
C465 11 36 SBLINK_CLKN_EXT R217 EXT *0_4 SBLINK_CLKN to NB for AC-LINK reference clock
VDDSRC_IO SB_SRC0C SBLINK_CLKN 10,12
2.2U/6.3V_6 0.1U/10V_4 17 32 SBSRC_CLKP
C VDDSRC_IO SB_SRC1T SBSRC_CLKP 12 C
25 31 SBSRC_CLKN to SB
VDDATIG_IO SB_SRC1C SBSRC_CLKN 12
34 VDDSB_IO
+1.1V_CLKVDDIO 47 VDDCPU_IO PCIE_MINI1_CLKP_EXT PCIE_MINI1_CLKP
SRC0T 22 R201 EXT *0_4
PCIE_MINI1_CLKP 12,34
21 PCIE_MINI1_CLKN_EXT R202 EXT *0_4 PCIE_MINI1_CLKN to WLAN
SRC0C PCIE_MINI1_CLKN 12,34
1 GND48 SRC1T 20
C482 33P/50V_4 CG_XIN 7 19
GNDDOT SRC1C
10 GNDSRC SRC2T 15
2

18 GNDSRC SRC2C 14
Y2 PCIE_LAN_CLKP_EXT R205 EXT *0_4 PCIE_LAN_CLKP
14.318MHZ
24
33
GNDATIG QFN64 SRC3T 13
12 PCIE_LAN_CLKN_EXT R204 EXT *0_4 PCIE_LAN_CLKN
PCIE_LAN_CLKP 12,32
to LAN
GNDSB SRC3C PCIE_LAN_CLKN 12,32
43 9
1

C483 33P/50V_4 CG_XOUT GNDSATA SRC4T


46 GNDCPU SRC4C 8
52 6 CLK_VGA_27M_SS R226 EXT *33_4
GNDHTT SRC7T/27M_SS T38
60 5 CLK_VGA_27M_NSS R235 EXT *75/F_4
GNDREF SRC7C/27M T41
SRC6T/SATAT 42 R230 EXT *100/F_4
SRC6C/SATAC 41 27Mhz for Dis only
CG_XIN 61
CG_XOUT X1
62 X2
54 NBHTREFCLK0P_EXT R247 EXT *0_4 NBHT_REFCLKP
HTT0T/66M NBHT_REFCLKP 10,12
53 NBHTREFCLK0N_EXT R246 EXT *0_4 NBHT_REFCLKN
HTT0C/66M NBHT_REFCLKN 10,12
PCLK_SMB 2
6,7,13,30,34 PCLK_SMB PDAT_SMB SMBCLK
6,7,13,30,34 PDAT_SMB 3 SMBDAT
64 CLK48MUSB R239 EXT *22_4 CLK_48M_USB
48MHz_0 CLK_48M_USB 13
CLK_PD# 51 PD# SEL_HT66 R250 158/F_4
REF0/SEL_HTT66 59
58 SEL_SATA R268 *33_4
REF1/SEL_SATA EXT_SB_OSC 13
CLKREQ0# 23 57 SEL_27 EXT R258 90.9/F_4
*CLKREQ0# REF2/SEL_27 T46 EXT_NB_OSC 10
CLKREQ4# 38
B CLKREQ3# *CLKREQ4# B
39 *CLKREQ3#
CLKREQ2# 44
CLKREQ1# *CLKREQ2#
For EMI 45 *CLKREQ1#
+3V
TGND

R237 *8.2K_4 CLKREQ1#


C489 *10P/50V_4 EXT_NB_OSC RTM880N-796_QFN64
65

R243 8.2K_4 CLK_PD#


C455 *10P/50V_4 CLK_48M_USB

+3V

R194 *8.2K_4 CLKREQ0#


R233 *8.2K_4 CLKREQ2# +3V_CLKVDD
R224 *8.2K_4 CLKREQ3#
R222 *8.2K_4 CLKREQ4#

if use clock SLG SLG8SP628VTR--AL8SP628000


request pin , need
to pull Hi for
RTL RTM880N-796-- AL000880001
default setting * default R269 R248 Clock chip has internal serial
*8.2K_4 8.2K_4
66 MHz 3.3V single ended HTT clock terminations
1 SEL_27 for differencial pairs, external resistors
SEL_HTT66 SEL_SATA
0* 100 MHz differential HTT clock SEL_HT66
are
reserved for debug purpose.
A 100 MHz non-spreading differential SRC clock not need to A
SEL_SATA 1 R249
R264
stuff ,
8.2K_4
0* 100 MHz spreading differential SRC clock *8.2K_4 R185 have
pull LOW
SEL_27 1* 27MHz non-spreading singled clock

0 100 MHz spreading differential SRC clock RS780M/RX780M


PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Clock Generator
NB5/RD2
Date: Monday, September 28, 2009 Sheet 2 of 46
5 4 3 2 1
5 4 3 2 1

03
BLM21PG221SN1D(220,100M,2A)_8 W/S= 15 mil/20mil CPU_THERMDC
40 +2.5V +CPUVDDA CPU_THERMDA CPU_THERMDC 5
2,8,9,10,11,15,38 +1.1V +2.5V CPU_THERMDA 5
L33 CPU CLK
4,5,6,7,14,39,40,41,42 +1.5VSUS
CPU_PWRGD 300_4 R449
8,11,34,42 +1.5V
C360 LS0805-100M-N C341 C326 C330 CPUCLKP CPU_LDT_RST# 300_4 R136
25,26,27,28,29,30,31,32,33,34,35,36,42 +3V 2,12 CPUCLKP
4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V_4 3300P/50V_4 CPUCLKN CPU_LDT_STOP# 300_4 R121
2,12 CPUCLKN
CPU_LDT_REQ#_CPU *300/F_4 R131 +1.5V
Change +1.1V_VLDT to +1.1V_VLDT_R Keep trace from resisor to CPU within 0.6"
for layout concern +CPUVDDA 250mA
VLDT use 1.5A Max current keep trace from caps to CPU within 1.2" U26D
U26A SI
+1.1V +1.1V_VLDT W/S= 15 mil/20mil
+CPUVDDA F8 M11
R139 *0_6/S C334 10U/6.3V_8 +1.1V_VLDT +1.1V_VLDT_R 10U/6.3V_8 C61 CPUCLKIN R437 169/F_4 CPUCLKIN# +CPUVDDA VDDA1 VSS
D1 VLDT_A0 HT LINK VLDT_B0 AE2 F9 VDDA2 RSVD11 W 18
C319 10U/6.3V_8 +1.1V_VLDT D2 AE3 +1.1V_VLDT_R 0.22U/6.3V_4 C51
D C313 0.22U/6.3V_4 +1.1V_VLDT VLDT_A1 VLDT_B1 +1.1V_VLDT_R 180P/50V_4 C49 CPUCLKP C715 3900P/25V_4 CPUCLKIN CPU_SVC_R D
D3 VLDT_A2 VLDT_B2 AE4 A9 CLKIN_H SVC A6
+1.1V SI C310 180P/50V_4 +1.1V_VLDT D4 AE5 +1.1V_VLDT_R CPUCLKN C716 3900P/25V_4 CPUCLKIN# A8 A4 CPU_SVD_R
+1.1V_VLDT_R VLDT_A3 VLDT_B3 CLKIN_L SVD
R41 *0_6/S HT_NB_CPU_CAD_H0 E3 AD1 HT_CPU_NB_CAD_H0 CPU_LDT_RST# B7
L0_CADIN_H0 L0_CADOUT_H0 12 CPU_LDT_RST# RESET_L
HT_NB_CPU_CAD_L0 E2 AC1 HT_CPU_NB_CAD_L0 CPU_PWRGD A7
HT_NB_CPU_CAD_H1 L0_CADIN_L0 L0_CADOUT_L0 HT_CPU_NB_CAD_H1 12 CPU_PWRGD CPU_LDT_STOP# PW ROK CPU_THERMTRIP_L#
Change +1.1V_VLDT to +1.1V_VLDT_R E1 AC2 10,12 CPU_LDT_STOP# F10 AF6
HT_NB_CPU_CAD_L1 L0_CADIN_H1 L0_CADOUT_H1 HT_CPU_NB_CAD_L1 CPU_LDT_REQ#_CPU LDTSTOP_L THERMTRIP_L CPU_PROCHOT_L#
for layout concern F1 L0_CADIN_L1 L0_CADOUT_L1 AC3 C6 LDTREQ_L PROCHOT_L AC7
HT_NB_CPU_CAD_H2 G3 AB1 HT_CPU_NB_CAD_H2 AA8
L0_CADIN_H2 L0_CADOUT_H2 MEMHOT_L T1
HT_NB_CPU_CAD_L2 G2 AA1 HT_CPU_NB_CAD_L2 CPU_SIC AF4
L0_CADIN_L2 L0_CADOUT_L2 5 CPU_SIC SIC
HT_NB_CPU_CAD_H3 G1 AA2 HT_CPU_NB_CAD_H3 SideBand Temp sense I2C 5 CPU_SID AF5
HT_NB_CPU_CAD_H[15..0] L0_CADIN_H3 L0_CADOUT_H3 CPU_SID SID
HT_NB_CPU_CAD_L3 H1 AA3 HT_CPU_NB_CAD_L3 CPU_ALERT AE6 W7 CPU_THERMDC
8 HT_NB_CPU_CAD_H[15..0] L0_CADIN_L3 L0_CADOUT_L3 5 CPU_ALERT ALERT_L THERMDC
HT_NB_CPU_CAD_H4 J1 W2 HT_CPU_NB_CAD_H4 W8 CPU_THERMDA
HT_NB_CPU_CAD_L[15..0] HT_NB_CPU_CAD_L4 L0_CADIN_H4 L0_CADOUT_H4 HT_CPU_NB_CAD_L4 R72 44.2/F_4 CPU_HTREF0 THERMDA
K1 L0_CADIN_L4 L0_CADOUT_L4 W3 R6 HT_REF0
8 HT_NB_CPU_CAD_L[15..0] HT_NB_CPU_CAD_H5 HT_CPU_NB_CAD_H5 +1.5VSUS R76 44.2/F_4 CPU_HTREF1
L3 L0_CADIN_H5 L0_CADOUT_H5 V1 +1.1V_VLDT P6 HT_REF1
HT_NB_CPU_CLK_H[1..0] HT_NB_CPU_CAD_L5 L2 U1 HT_CPU_NB_CAD_L5 place them to CPU within 1.5"
8 HT_NB_CPU_CLK_H[1..0] HT_NB_CPU_CAD_H6 L0_CADIN_L5 L0_CADOUT_L5 HT_CPU_NB_CAD_H6 VDDIO_FB_H
L1 L0_CADIN_H6 L0_CADOUT_H6 U2 39 CPU_VDD0_RUN_FB_H F6 VDD0_FB_H VDDIO_FB_H W9 VDDIO_FB_H 40
HT_NB_CPU_CLK_L[1..0] HT_NB_CPU_CAD_L6 M1 U3 HT_CPU_NB_CAD_L6 E6 Y9 VDDIO_FB_L
8 HT_NB_CPU_CLK_L[1..0] L0_CADIN_L6 L0_CADOUT_L6 39 CPU_VDD0_RUN_FB_L VDD0_FB_L VDDIO_FB_L VDDIO_FB_L 40
HT_NB_CPU_CAD_H7 N3 T1 HT_CPU_NB_CAD_H7 R118
HT_NB_CPU_CTL_H[1..0] HT_NB_CPU_CAD_L7 L0_CADIN_H7 L0_CADOUT_H7 HT_CPU_NB_CAD_L7
8 HT_NB_CPU_CTL_H[1..0]
N2 L0_CADIN_L7 L0_CADOUT_L7 R1 39 CPU_VDD1_RUN_FB_H Y6 VDD1_FB_H VDDNB_FB_H H6 CPU_VDDNB_RUN_FB_H 39
HT_NB_CPU_CAD_H8 E5 AD4 HT_CPU_NB_CAD_H8 510/F_4 AB6 G6
HT_NB_CPU_CTL_L[1..0] HT_NB_CPU_CAD_L8 L0_CADIN_H8 L0_CADOUT_H8 HT_CPU_NB_CAD_L8 39 CPU_VDD1_RUN_FB_L VDD1_FB_L VDDNB_FB_L CPU_VDDNB_RUN_FB_L 39
F5 L0_CADIN_L8 L0_CADOUT_L8 AD3
8 HT_NB_CPU_CTL_L[1..0] HT_NB_CPU_CAD_H9 HT_CPU_NB_CAD_H9 CPU_DBRDY
F3 L0_CADIN_H9 L0_CADOUT_H9 AD5 G10 DBRDY
HT_CPU_NB_CAD_H[15..0] HT_NB_CPU_CAD_L9 F4 AC5 HT_CPU_NB_CAD_L9 CPUTEST25H CPU_TMS AA9 E10 CPU_DBREQ#
8 HT_CPU_NB_CAD_H[15..0] HT_NB_CPU_CAD_H10 L0_CADIN_L9 L0_CADOUT_L9 HT_CPU_NB_CAD_H10 CPU_TCK TMS DBREQ_L
G5 L0_CADIN_H10 L0_CADOUT_H10 AB4 AC9 TCK
HT_CPU_NB_CAD_L[15..0] HT_NB_CPU_CAD_L10 H5 AB3 HT_CPU_NB_CAD_L10 CPUTEST25L CPU_TRST# AD9 AE9 CPU_TDO
8 HT_CPU_NB_CAD_L[15..0] HT_NB_CPU_CAD_H11 L0_CADIN_L10 L0_CADOUT_L10 HT_CPU_NB_CAD_H11 CPU_TDI TRST_L TDO
H3 L0_CADIN_H11 L0_CADOUT_H11 AB5 AF9 TDI
HT_CPU_NB_CLK_H[1..0] HT_NB_CPU_CAD_L11 H4 AA5 HT_CPU_NB_CAD_L11 R117
8 HT_CPU_NB_CLK_H[1..0] HT_NB_CPU_CAD_H12 L0_CADIN_L11 L0_CADOUT_L11 HT_CPU_NB_CAD_H12 CPUTEST23 CPUTEST28H
K3 L0_CADIN_H12 L0_CADOUT_H12 Y5 T59 AD7 TEST23 TEST28_H J7 T15
HT_CPU_NB_CLK_L[1..0] HT_NB_CPU_CAD_L12 K4 W5 HT_CPU_NB_CAD_L12 510/F_4 H8 CPUTEST28L
8 HT_CPU_NB_CLK_L[1..0] L0_CADIN_L12 L0_CADOUT_L12 TEST28_L T17
HT_NB_CPU_CAD_H13 L5 V4 HT_CPU_NB_CAD_H13 CPUTEST18 H10
C HT_CPU_NB_CTL_H[1..0] L0_CADIN_H13 L0_CADOUT_H13 T18 TEST18 C
HT_NB_CPU_CAD_L13 M5 V3 HT_CPU_NB_CAD_L13 CPUTEST19 G9 D7 CPUTEST17
8 HT_CPU_NB_CTL_H[1..0] L0_CADIN_L13 L0_CADOUT_L13 T24 TEST19 TEST17 T25
HT_NB_CPU_CAD_H14 M3 V5 HT_CPU_NB_CAD_H14 E7 CPUTEST16
HT_CPU_NB_CTL_L[1..0] L0_CADIN_H14 L0_CADOUT_H14 TEST16 T26
HT_NB_CPU_CAD_L14 M4 U5 HT_CPU_NB_CAD_L14 CPUTEST25H E9 F7 CPUTEST15
8 HT_CPU_NB_CTL_L[1..0] L0_CADIN_L14 L0_CADOUT_L14 TEST25_H TEST15 T23
HT_NB_CPU_CAD_H15 N5 T4 HT_CPU_NB_CAD_H15 CPUTEST25L E8 C7 CPUTEST14
L0_CADIN_H15 L0_CADOUT_H15 TEST25_L TEST14 T28
HT_NB_CPU_CAD_L15 P5 T3 HT_CPU_NB_CAD_L15 place them to CPU within 1.5"
L0_CADIN_L15 L0_CADOUT_L15 CPUTEST21 CPUTEST7
AB8 TEST21 TEST7 C3 T84
HT_NB_CPU_CLK_H0 J3 Y1 HT_CPU_NB_CLK_H0 CPUTEST20 AF7 K8 R130 *300/F_4 +1.1V_VLDT
L0_CLKIN_H0 L0_CLKOUT_H0 T64 TEST20 TEST10
HT_NB_CPU_CLK_L0 J2 W1 HT_CPU_NB_CLK_L0 CPUTEST24 AE7
HT_NB_CPU_CLK_H1 L0_CLKIN_L0 L0_CLKOUT_L0 HT_CPU_NB_CLK_H1 CPUTEST22 TEST24 CPUTEST8
J5 L0_CLKIN_H1 L0_CLKOUT_H1 Y4 +1.5VSUS T61 AE8 TEST22 TEST8 C4 T81
HT_NB_CPU_CLK_L1 K5 Y3 HT_CPU_NB_CLK_L1 R119 300/F_4 CPU_DBREQ# CPUTEST12 AC8 CPUTEST29H
L0_CLKIN_L1 L0_CLKOUT_L1 T60 TEST12 T33
CPUTEST27 AF8
HT_NB_CPU_CTL_H0 HT_CPU_NB_CTL_H0 R325 1K/F_4 CPUTEST27 TEST27 R120
N1 L0_CTLIN_H0 L0_CTLOUT_H0 R2 TEST29_H C9
HT_NB_CPU_CTL_L0 P1 R3 HT_CPU_NB_CTL_L0 R138 *0_4/S C2 C8
HT_NB_CPU_CTL_H1 L0_CTLIN_L0 L0_CTLOUT_L0 HT_CPU_NB_CTL_H1 R331 *300/F_4 CPUTEST6 TEST9 TEST29_L 80.6/F_4
P3 L0_CTLIN_H1 L0_CTLOUT_H1 T5 T2 AA6 TEST6
HT_NB_CPU_CTL_L1 P4 R5 HT_CPU_NB_CTL_L1 CPUTEST29L
L0_CTLIN_L1 L0_CTLOUT_L1 T32
A3 RSVD1 RSVD10 H18
FOX PZ63826-284R-41F A5 RSVD2 RSVD9 H19
DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2) SOCKET_638_PIN B3 RSVD3 RSVD8 AA7 Route as 80ohm, diff
B5 RSVD4 RSVD7 D5
MLX 47296-4131 C1 C5
DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2) RSVD5 RSVD6
TYC 4-1903401-2
SOCKET_638_PIN
DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2)

+3V

CNTR_VREF
Serial VID VFIX MODE VID Override table (VDD)
+1.5VSUS R448 10K/F_4
B R447 B
SVC SVD Output Voltage
1K/F_4
+1.5VSUS +1.5V
0 0 1.1V
2

Q31
MMBT3904
CPU_LDT_RST# 1 3 CPU_LDT_RST_HTPA# R166 1K/F_4 +1.5VSUS
0 1 1.0V
R141 R142 R167 1K/F_4
*1K/F_4 *1K/F_4
+1.5V 1 0 0.9V
Can remove on MP CPU_SVC_R R156 0_4 CPU_SVC 1 1 0.8V
CPU_SVC 39
CPU_SVD_R R155 0_4 CPU_SVD
CPU_SVD 39
CPU_PWRGD R154 0_4 CPU_PWRGD_SVID_REG
CPU_PWRGD_SVID_REG 39
CPUTEST20 R332 1K/F_4
CPUTEST21 R27 1K/F_4
R160 *220_4 CPUTEST22 R326 1K/F_4
R159 *220_4 CPUTEST24 R327 1K/F_4
R158 *220_4

HDT Connector
R153 10K/F_4 +1.5VSUS
+1.5VSUS
R23 10K/F_4 CPUTEST12 R333 1K/F_4
+1.5VSUS
1 2 CPUTEST19 R98 1K/F_4
+1.5VSUS R144 300_4 3 4 CPUTEST18 R87 1K/F_4
A R26 300_4 5 6 A
+1.5VSUS
2

Q4 CPU_DBREQ# 7 8
MMBT3904 CPU_DBRDY 9 10
CPU_THERMTRIP_L# 1 3 CPU_TCK 11 12
5 CPU_THERMTRIP_L# CPU_THERMTRIP# 13
CPU_PROCHOT_L# R146 *0_4 CPU_TMS 13 14
2

Q14 CPU_TDI 15 16

R145 0_4 1 3 CPU_PROCHOT_R#


CPU_TRST#
CPU_TDO
17
19
18
20
PROJECT : LX89
36 EC_PROCHOT# CPU_PROCHOT_R# 12
MMBT3904
C19 *0.1U/10V_4
21
23
22
24 CPU_LDT_RST_HTPA#
Quanta Computer Inc.
KEY 25
EC new option Size Document Number Rev
Custom 1A
S1G2 HT,CTL I/F 1/3
CN3 *HDT CONN NB5/RD2
Date: Monday, September 28, 2009 Sheet 3 of 46
5 4 3 2 1
A B C D E

04
+1.5VSUS 35W->+0.9V
+0.9V U26B +0.9V 45W->+1.05V
PLACE THEM CLOSE TO
CPU WITHIN 1" D10 VTT1 W 10
R324 C10 MEM:CMD/CTRL/CLK VTT5 AC10
VTT2 VTT6 DDR_VTTREF 6,7,40
B10 AB10
0_4 AD10
VTT3
VTT4
VTT7
VTT8
VTT9
AA10
A10 R335
7 MEM_MB_DATA[0..63] Processor Memory Interface
R329 39.2/F_4 M_ZP AF10 *0_4
R330 39.2/F_4 M_ZN MEMZP CPU_VTT_SENSE Reserved U26C
AE10 MEMZN VTT_SENSE Y10 CPU_VTT_SENSE 40
MEM:DATA
MEM_MA_DATA[0..63] 6
MEM_MA_RESET# H16 W 17 MEMVREF_CPU MEM_MB_DATA0 C11 G12 MEM_MA_DATA0
6 MEM_MA_RESET# RSVD_M1 MEMVREF MB_DATA0 MA_DATA0
C537 MEM_MB_DATA1 A11 F12 MEM_MA_DATA1
4 10U/6.3V_8 MEM_MB_RESET# MEM_MB_DATA2 MB_DATA1 MA_DATA1 MEM_MA_DATA2 4
6 MEM_MA0_ODT0 T19 MA0_ODT0 RSVD_M2 B18 MEM_MB_RESET# 7 A14 MB_DATA2 MA_DATA2 H14
V22 MEM_MB_DATA3 B14 G14 MEM_MA_DATA3
6 MEM_MA0_ODT1 MA0_ODT1 MEM_MB_DATA4 MB_DATA3 MA_DATA3 MEM_MA_DATA4
U21 W 26 C84 G11 H11
T12 MA1_ODT0 MB0_ODT0 MEM_MB0_ODT0 7 MB_DATA4 MA_DATA4
V19 W 23 0.01U/16V/X7R_4 C546 MEM_MB_DATA5 E11 H12 MEM_MA_DATA5
T10 MA1_ODT1 MB0_ODT1 MEM_MB0_ODT1 7 MB_DATA5 MA_DATA5
Y26 1000P/50V_4 MEM_MB_DATA6 D12 C13 MEM_MA_DATA6
MB1_ODT0 T68 MEM_MB_DATA7 MB_DATA6 MA_DATA6 MEM_MA_DATA7
6 MEM_MA0_CS#0 T20 MA0_CS_L0 A13 MB_DATA7 MA_DATA7 E13
U19 V26 MEM_MB_DATA8 A15 H15 MEM_MA_DATA8
6 MEM_MA0_CS#1 MA0_CS_L1 MB0_CS_L0 MEM_MB0_CS#0 7 MB_DATA8 MA_DATA8
U20 W 25 MEM_MB_DATA9 A16 E15 MEM_MA_DATA9
T11 MA1_CS_L0 MB0_CS_L1 MEM_MB0_CS#1 7 MB_DATA9 MA_DATA9
V20 U22 MEM_MB_DATA10 A19 E17 MEM_MA_DATA10
T8 MA1_CS_L1 MB1_CS_L0 T13 MB_DATA10 MA_DATA10
MEM_MB_DATA11 A20 H17 MEM_MA_DATA11
MEM_MB_DATA12 MB_DATA11 MA_DATA11 MEM_MA_DATA12
6 MEM_MA_CKE0 J22 MA_CKE0 MB_CKE0 J25 MEM_MB_CKE0 7 C14 MB_DATA12 MA_DATA12 E14
J20 H26 MEM_MB_DATA13 D14 F14 MEM_MA_DATA13
6 MEM_MA_CKE1 MA_CKE1 MB_CKE1 MEM_MB_CKE1 7 MB_DATA13 MA_DATA13
MEM_MB_DATA14 C18 C17 MEM_MA_DATA14
MEM_MB_DATA15 MB_DATA14 MA_DATA14 MEM_MA_DATA15
6 MEM_MA_CLK5_P N19 MA_CLK_H5 MB_CLK_H5 P22 MEM_MB_CLK5_P 7 D18 MB_DATA15 MA_DATA15 G17
N20 R22 MEM_MB_DATA16 D20 G18 MEM_MA_DATA16
6 MEM_MA_CLK5_N MA_CLK_L5 MB_CLK_L5 MEM_MB_CLK5_N 7 MEM_MB_DATA17 MB_DATA16 MA_DATA16 MEM_MA_DATA17
T22 E16 MA_CLK_H1 MB_CLK_H1 A17 T86 A21 MB_DATA17 MA_DATA17 C19
F16 A18 MEM_MB_DATA18 D24 D22 MEM_MA_DATA18
T21 MA_CLK_L1 MB_CLK_L1 T85 MB_DATA18 MA_DATA18
Y16 AF18 MEM_MB_DATA19 C25 E20 MEM_MA_DATA19
T6 MA_CLK_H7 MB_CLK_H7 T62 MB_DATA19 MA_DATA19
AA16 AF17 MEM_MB_DATA20 B20 E18 MEM_MA_DATA20
T7 MA_CLK_L7 MB_CLK_L7 T63 MB_DATA20 MA_DATA20
P19 R26 MEM_MB_DATA21 C20 F18 MEM_MA_DATA21
6 MEM_MA_CLK4_P MA_CLK_H4 MB_CLK_H4 MEM_MB_CLK4_P 7 MEM_MB_DATA22 MB_DATA21 MA_DATA21 MEM_MA_DATA22
6 MEM_MA_CLK4_N P20 MA_CLK_L4 MB_CLK_L4 R25 MEM_MB_CLK4_N 7 B24 MB_DATA22 MA_DATA22 B22
MEM_MB_DATA23 C24 C23 MEM_MA_DATA23
6 MEM_MA_ADD[0..15] MEM_MB_ADD[0..15] 7 MB_DATA23 MA_DATA23
MEM_MA_ADD0 N21 P24 MEM_MB_ADD0 MEM_MB_DATA24 E23 F20 MEM_MA_DATA24
MEM_MA_ADD1 MA_ADD0 MB_ADD0 MEM_MB_ADD1 MEM_MB_DATA25 MB_DATA24 MA_DATA24 MEM_MA_DATA25
M20 MA_ADD1 MB_ADD1 N24 E24 MB_DATA25 MA_DATA25 F22
MEM_MA_ADD2 N22 P26 MEM_MB_ADD2 MEM_MB_DATA26 G25 H24 MEM_MA_DATA26
MEM_MA_ADD3 MA_ADD2 MB_ADD2 MEM_MB_ADD3 MEM_MB_DATA27 MB_DATA26 MA_DATA26 MEM_MA_DATA27
M19 MA_ADD3 MB_ADD3 N23 G26 MB_DATA27 MA_DATA27 J19
MEM_MA_ADD4 M22 N26 MEM_MB_ADD4 MEM_MB_DATA28 C26 E21 MEM_MA_DATA28
MEM_MA_ADD5 MA_ADD4 MB_ADD4 MEM_MB_ADD5 MEM_MB_DATA29 MB_DATA28 MA_DATA28 MEM_MA_DATA29
L20 MA_ADD5 MB_ADD5 L23 D26 MB_DATA29 MA_DATA29 E22
MEM_MA_ADD6 M24 N25 MEM_MB_ADD6 MEM_MB_DATA30 G23 H20 MEM_MA_DATA30
MEM_MA_ADD7 MA_ADD6 MB_ADD6 MEM_MB_ADD7 MEM_MB_DATA31 MB_DATA30 MA_DATA30 MEM_MA_DATA31
L21 MA_ADD7 MB_ADD7 L24 G24 MB_DATA31 MA_DATA31 H22
3 MEM_MA_ADD8 L19 M26 MEM_MB_ADD8 MEM_MB_DATA32 AA24 Y24 MEM_MA_DATA32 3
MEM_MA_ADD9 MA_ADD8 MB_ADD8 MEM_MB_ADD9 MEM_MB_DATA33 MB_DATA32 MA_DATA32 MEM_MA_DATA33
K22 MA_ADD9 MB_ADD9 K26 AA23 MB_DATA33 MA_DATA33 AB24
MEM_MA_ADD10 R21 T26 MEM_MB_ADD10 MEM_MB_DATA34 AD24 AB22 MEM_MA_DATA34
MEM_MA_ADD11 MA_ADD10 MB_ADD10 MEM_MB_ADD11 MEM_MB_DATA35 MB_DATA34 MA_DATA34 MEM_MA_DATA35
L22 MA_ADD11 MB_ADD11 L26 AE24 MB_DATA35 MA_DATA35 AA21
MEM_MA_ADD12 K20 L25 MEM_MB_ADD12 MEM_MB_DATA36 AA26 W 22 MEM_MA_DATA36
MEM_MA_ADD13 MA_ADD12 MB_ADD12 MEM_MB_ADD13 MEM_MB_DATA37 MB_DATA36 MA_DATA36 MEM_MA_DATA37
V24 MA_ADD13 MB_ADD13 W 24 AA25 MB_DATA37 MA_DATA37 W 21
MEM_MA_ADD14 K24 J23 MEM_MB_ADD14 MEM_MB_DATA38 AD26 Y22 MEM_MA_DATA38
MEM_MA_ADD15 MA_ADD14 MB_ADD14 MEM_MB_ADD15 MEM_MB_DATA39 MB_DATA38 MA_DATA38 MEM_MA_DATA39
K19 MA_ADD15 MB_ADD15 J24 AE25 MB_DATA39 MA_DATA39 AA22
MEM_MB_DATA40 AC22 Y20 MEM_MA_DATA40
MEM_MB_DATA41 MB_DATA40 MA_DATA40 MEM_MA_DATA41
6 MEM_MA_BANK0 R20 MA_BANK0 MB_BANK0 R24 MEM_MB_BANK0 7 AD22 MB_DATA41 MA_DATA41 AA20
R23 U26 MEM_MB_DATA42 AE20 AA18 MEM_MA_DATA42
6 MEM_MA_BANK1 MA_BANK1 MB_BANK1 MEM_MB_BANK1 7 MB_DATA42 MA_DATA42
J21 J26 MEM_MB_DATA43 AF20 AB18 MEM_MA_DATA43
6 MEM_MA_BANK2 MA_BANK2 MB_BANK2 MEM_MB_BANK2 7 MB_DATA43 MA_DATA43
MEM_MB_DATA44 AF24 AB21 MEM_MA_DATA44
MEM_MB_DATA45 MB_DATA44 MA_DATA44 MEM_MA_DATA45
6 MEM_MA_RAS# R19 MA_RAS_L MB_RAS_L U25 MEM_MB_RAS# 7 AF23 MB_DATA45 MA_DATA45 AD21
T22 U24 MEM_MB_DATA46 AC20 AD19 MEM_MA_DATA46
6 MEM_MA_CAS# MA_CAS_L MB_CAS_L MEM_MB_CAS# 7 MB_DATA46 MA_DATA46
T24 U23 MEM_MB_DATA47 AD20 Y18 MEM_MA_DATA47
6 MEM_MA_WE# MA_W E_L MB_W E_L MEM_MB_WE# 7 MB_DATA47 MA_DATA47
MEM_MB_DATA48 AD18 AD17 MEM_MA_DATA48
MEM_MB_DATA49 MB_DATA48 MA_DATA48 MEM_MA_DATA49
AE18 MB_DATA49 MA_DATA49 W 16
SOCKET_638_PIN MEM_MB_DATA50 AC14 W 14 MEM_MA_DATA50
MEM_MB_DATA51 MB_DATA50 MA_DATA50 MEM_MA_DATA51
AD14 MB_DATA51 MA_DATA51 Y14
MEM_MB_DATA52 AF19 Y17 MEM_MA_DATA52
MEM_MB_DATA53 MB_DATA52 MA_DATA52 MEM_MA_DATA53
AC18 MB_DATA53 MA_DATA53 AB17
MEM_MB_DATA54 AF16 AB15 MEM_MA_DATA54
+0.9V Place close to socket MEM_MB_DATA55 AF15
MB_DATA54 MA_DATA54
AD15 MEM_MA_DATA55
MEM_MB_DATA56 MB_DATA55 MA_DATA55 MEM_MA_DATA56
AF13 MB_DATA56 MA_DATA56 AB13
MEM_MB_DATA57 AC12 AD13 MEM_MA_DATA57
MEM_MB_DATA58 MB_DATA57 MA_DATA57 MEM_MA_DATA58
AB11 MB_DATA58 MA_DATA58 Y12
C216 C215 C364 C214 C362 C349 C363 MEM_MB_DATA59 Y11 W 11 MEM_MA_DATA59
4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V_4 0.22U/6.3V_4 0.22U/6.3V_4 MEM_MB_DATA60 MB_DATA59 MA_DATA59 MEM_MA_DATA60
AE14 MB_DATA60 MA_DATA60 AB14
MEM_MB_DATA61 AF14 AA14 MEM_MA_DATA61
2 MEM_MB_DATA62 MB_DATA61 MA_DATA61 MEM_MA_DATA62 2
AF11 MB_DATA62 MA_DATA62 AB12
MEM_MB_DATA63 AD11 AA12 MEM_MA_DATA63
MB_DATA63 MA_DATA63
7 MEM_MB_DM[0..7] MEM_MA_DM[0..7] 6
MEM_MB_DM0 A12 E12 MEM_MA_DM0
+0.9V MEM_MB_DM1 MB_DM0 MA_DM0 MEM_MA_DM1
B16 MB_DM1 MA_DM1 C15
MEM_MB_DM2 A22 E19 MEM_MA_DM2
MEM_MB_DM3 MB_DM2 MA_DM2 MEM_MA_DM3
E25 MB_DM3 MA_DM3 F24
MEM_MB_DM4 AB26 AC24 MEM_MA_DM4
C92 C104 C103 C81 C93 C82 C102 MEM_MB_DM5 MB_DM4 MA_DM4 MEM_MA_DM5
AE22 MB_DM5 MA_DM5 Y19
1000P/50V_4 1000P/50V_4 1000P/50V_4 1000P/50V_4 180P/50V_4 180P/50V_4 180P/50V_4 MEM_MB_DM6 AC16 AB16 MEM_MA_DM6
MEM_MB_DM7 MB_DM6 MA_DM6 MEM_MA_DM7
AD12 MB_DM7 MA_DM7 Y13

7 MEM_MB_DQS0_P C12 MB_DQS_H0 MA_DQS_H0 G13 MEM_MA_DQS0_P 6


7 MEM_MB_DQS0_N B12 MB_DQS_L0 MA_DQS_L0 H13 MEM_MA_DQS0_N 6
+1.5VSUS D16 G16
Reserved for AMD suggest 7 MEM_MB_DQS1_P
C16
MB_DQS_H1 MA_DQS_H1
G15
MEM_MA_DQS1_P 6
7 MEM_MB_DQS1_N MB_DQS_L1 MA_DQS_L1 MEM_MA_DQS1_N 6
7 MEM_MB_DQS2_P A24 MB_DQS_H2 MA_DQS_H2 C22 MEM_MA_DQS2_P 6
7 MEM_MB_DQS2_N A23 MB_DQS_L2 MA_DQS_L2 C21 MEM_MA_DQS2_N 6
R430 0_4 F26 G22
7 MEM_MB_DQS3_P MB_DQS_H3 MA_DQS_H3 MEM_MA_DQS3_P 6
7 MEM_MB_DQS3_N E26 MB_DQS_L3 MA_DQS_L3 G21 MEM_MA_DQS3_N 6
+3VPCU AC25 AD23
7 MEM_MB_DQS4_P MB_DQS_H4 MA_DQS_H4 MEM_MA_DQS4_P 6
C717 7 MEM_MB_DQS4_N AC26 MB_DQS_L4 MA_DQS_L4 AC23 MEM_MA_DQS4_N 6
R427 AF21 AB19
7 MEM_MB_DQS5_P MB_DQS_H5 MA_DQS_H5 MEM_MA_DQS5_P 6
7 MEM_MB_DQS5_N AF22 MB_DQS_L5 MA_DQS_L5 AB20 MEM_MA_DQS5_N 6
1K/F_4 AE16 Y15
7 MEM_MB_DQS6_P MB_DQS_H6 MA_DQS_H6 MEM_MA_DQS6_P 6
7 MEM_MB_DQS6_N AD16 MB_DQS_L6 MA_DQS_L6 W 15 MEM_MA_DQS6_N 6
*.1U/10V_4
5

U32 AF12 W 12
7 MEM_MB_DQS7_P MB_DQS_H7 MA_DQS_H7 MEM_MA_DQS7_P 6
3 + R438 *10_4 AE12 W 13
7 MEM_MB_DQS7_N MB_DQS_L7 MA_DQS_L7 MEM_MA_DQS7_N 6
1 1 2 MEMVREF_CPU
4 -
2

1 R429 *OPA343NA/3K SOCKET_638_PIN 1


C702
2

1K/F_4 *0.47U/10V_4 R436


1

41 +0.9V
*10K/F_4
3,5,6,7,14,39,40,41,42 +1.5VSUS
R440 *0_4

R441 *0_4
PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
S1G2 DDRII MEMORY I/F 2/3
NB5/RD2
Date: Monday, September 28, 2009 Sheet 4 of 46
A B C D E
5 4 3 2 1

+VCORE 39

05
+CPUVDDNB 39
+1.5VSUS 3,4,6,7,14,39,40,41,42 U26F
+3VS5 12,13,14,15,16,42
+5V 24,25,26,27,28,29,33,34,35,42 AA4 VSS1 VSS66 J6
+1.8V 8,10,11,16,26,42 U26E AA11 VSS2 VSS67 J8
+VCORE +VCORE AA13 J10 +VCORE

G4 P8
AA15
AA17
VSS3
VSS4
VSS68
VSS69 J12
J14
BOTTOM SIDE DECOUPLING
VDD0_1 VDD1_1 VSS5 VSS70
H2 VDD0_2 VDD1_2 P10 AA19 VSS6 VSS71 J16
J9 VDD0_3 VDD1_3 R4 AB2 VSS7 VSS72 J18
J11 R7 AB7 K2 C107 C135 C154 C166 C173 C172 C171
VDD0_4 VDD1_4 VSS8 VSS73 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 0.22U/6.3V_4 0.01U/16V_4 180P/50V_4
J13 VDD0_5 VDD1_5 R9 AB9 VSS9 VSS74 K7
J15 VDD0_6 VDD1_6 R11 AB23 VSS10 VSS75 K9
D K6 T2 AB25 K11 D
VDD0_7 VDD1_7 VSS11 VSS76
K10 VDD0_8 VDD1_8 T6 AC11 VSS12 VSS77 K13
K12 VDD0_9 VDD1_9 T8 AC13 VSS13 VSS78 K15
K14 T10 AC15 K17 +VCORE
VDD0_10 VDD1_10 VSS14 VSS79
L4 VDD0_11 VDD1_11 T12 AC17 VSS15 VSS80 L6
L7 VDD0_12 VDD1_12 T14 AC19 VSS16 VSS81 L8
L9 VDD0_13 VDD1_13 U7 AC21 VSS17 VSS82 L10
L11 VDD0_14 VDD1_14 U9 AD6 VSS18 VSS83 L12
L13 U11 AD8 L14 C167 C168 C150 C138 C106 C108 C117
VDD0_15 VDD1_15 VSS19 VSS84 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 0.22U/6.3V_4 0.01U/16V_4 180P/50V_4
L15 VDD0_16 VDD1_16 U13 AD25 VSS20 VSS85 L16
M2 VDD0_17 VDD1_17 U15 AE11 VSS21 VSS86 L18
M6 VDD0_18 VDD1_18 V6 AE13 VSS22 VSS87 M7
M8 VDD0_19 VDD1_19 V8 AE15 VSS23 VSS88 M9
M10 VDD0_20 VDD1_20 V10 AE17 VSS24 VSS89 AC6
N7 V12 AE19 M17 +CPUVDDNB +1.5VSUS
+CPUVDDNB VDD0_21 VDD1_21 VSS25 VSS90
N9 VDD0_22 VDD1_22 V14 AE21 VSS26 VSS91 N4
N11 VDD0_23 VDD1_23 W4 AE23 VSS27 VSS92 N8
4A VDD1_24 Y2 B4 VSS28 VSS93 N10
K16 VDDNB_1 VDD1_25 AC4 B6 VSS29 VSS94 N16
M16 AD2 +1.5VSUS B8 N18 C146 C133 C158 C136 C152 C162 C174 C175
VDDNB_2 VDD1_26 VSS30 VSS95 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 0.22U/6.3V_4 0.22U/6.3V_4 180P/50V_4
P16 VDDNB_3 B9 VSS31 VSS96 P2
+1.5VSUS T16 Y25 B11 P7
VDDNB_4 VDDIO27 VSS32 VSS97
V16 VDDNB_5 VDDIO26 V25 B13 VSS33 VSS98 P9
2A VDDIO25 V23 B15 VSS34 VSS99 P11
H25 VDDIO1 VDDIO24 V21 B17 VSS35 VSS100 P17
J17 VDDIO2 VDDIO23 V18 B19 VSS36 VSS101 R8
K18 VDDIO3 VDDIO22 U17 B21 VSS37 VSS102 R10
K21 VDDIO4 VDDIO21 T25 B23 VSS38 VSS103 R16
K23 VDDIO5 VDDIO20 T23 B25 VSS39 VSS104 R18
K25 VDDIO6 VDDIO19 T21 D6 VSS40 VSS105 T7
C L17 T18 D8 T9 C
M18
M21
VDDIO7
VDDIO8
VDDIO18
VDDIO17 R17
P25
D9
D11
VSS41
VSS42
VSS106
VSS107 T11
T13
DECOUPLING BETWEEN PROCESSOR AND DIMMs
VDDIO9 VDDIO16 VSS43 VSS108
M23 P23 D13 T15
M25
N17
VDDIO10
VDDIO11
VDDIO15
VDDIO14 P21
P18
D15
D17
VSS44
VSS45
VSS109
VSS110 T17
U4
PLACE CLOSE TO PROCESSOR AS POSSIBLE
VDDIO12 VDDIO13 VSS46 VSS111
D19 VSS47 VSS112 U6
+1.5VSUS D21 U8 +1.5VSUS
SOCKET_638_PIN VSS48 VSS113
D23 VSS49 VSS114 U10
D25 VSS50 VSS115 U12
+1.5VSUS E4 U14
VSS51 VSS116
F2 VSS52 VSS117 U16
R21 R157 R25 F11 U18 C632 C620 C623 C629 C116 C85
VSS53 VSS118 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V_4 0.22U/6.3V_4
2K/F_4 2K/F_4 2K/F_4 F13 VSS54 VSS119 V2
F15 VSS55 VSS120 V7
R24 R165 R29 F17 V9
390_4 390_4 1K/F_4 VSS56 VSS121 +1.5VSUS
F19 VSS57 VSS122 V11
F21 VSS58 VSS123 V13
F23 VSS59 VSS124 V15
2

Q3 F25 V17
*MMBT3904 VSS60 VSS125
H7 VSS61 VSS126 W6
MBCLK2 3 1 CPU_SIC H9 Y21 C114 C183 C156 C624 C630 C91 C144
19,36,43 MBCLK2 CPU_SIC 3 VSS62 VSS127
H21 Y23 0.22U/6.3V_4 0.22U/6.3V_4 0.01U/16V_4 0.1U/10V_4 180P/50V_4 180P/50V_4 0.1U/10V_4
VSS63 VSS128
1 2 H23 VSS64 VSS129 N6
2

*RB501V-40 D8 Q15 J4
*MMBT3904 VSS65
MBDATA2 3 1 CPU_SID SOCKET_638_PIN
19,36,43 MBDATA2 CPU_SID 3
1 2
2

*RB501V-40 D12
B Q6 *MMBT3904 B
SMBALERT# 3 1 CPU_ALERT

+3V
CPU_ALERT 3
PROCESSOR POWER AND GROUND
+3V

R134

200/F_6
R6 *0_4 SYS_SHDN#
SYS_SHDN# 37
R147 R140 R135
reserve for
1

10K/F_4 10K/F_4 10K/F_4


power shutdown D1
Need Check
C323 ( if can )
*CH500H
0.1U/10V_4
2

U8

19,36,43 MBCLK2 8 SCLK VCC 1 CPU_THERMDA 3


R11 *0_4/S 3920_RST#
3920_RST# 36
19,36,43 MBDATA2 7 2 C315 Q2
SDA DXP 1000P/50V_4
3

MMBT3904 D2
6 ALERT# DXN 3
2 2 1 ECPWROK
CPU_THERMDC 3 ECPWROK 16,36
13 PM_THERM# 4 OVERT# GND 5
1

MSOP CH501H-40PT

A
For fix HyperTransport nets A
G786P8 SMBALERT# R17 10K/F_4
+3V across plane splits
3

R16 *10K/F_4 +3VS5 +3VS5 +3V +1.8V


+1.5VSUS
R35 *10K/F_4

PQ18 2 TEMP_FAIL 19 PROJECT : LX89


2

Q1 EC3 EC4 EC1 EC2

CPU_THERMTRIP_L# 1
*MMBT3904
3 SMBALERT#
*2N7002E-G ADD VGA TEMP_ FAIL function Quanta Computer Inc.
3 CPU_THERMTRIP_L# M92 is active Hi
1

*0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 Size Document Number Rev


Custom 1A
S1G2 PWR & GND 3/3
NB5/RD2
Date: Monday, September 28, 2009 Sheet 5 of 46
5 4 3 2 1
5 4 3 2 1

06
+1.5VSUS 3,4,5,7,14,39,40,41,42
+3V 2,3,5,7,10,11,12,13,14,15,16,24,25,26,27,28,29,30,31,32,33,34,35,36,42
+0.75V_DDR_VTT 7,40
+1.5VSUS

CN22A MEM_MA_DATA[0..63] 4 CN22B


4 MEM_MA_ADD[0..15]
MEM_MA_ADD0 98 5 MEM_MA_DATA0 75 44
MEM_MA_ADD1 A0 DQ0 MEM_MA_DATA1 VDD1 VSS16
97 A1 DQ1 7 76 VDD2 VSS17 48
MEM_MA_ADD2 96 15 MEM_MA_DATA2 81 49
MEM_MA_ADD3 A2 DQ2 MEM_MA_DATA3 VDD3 VSS18
95 A3 DQ3 17 82 VDD4 VSS19 54
D MEM_MA_ADD4 92 4 MEM_MA_DATA4 87 55 D
MEM_MA_ADD5 A4 DQ4 MEM_MA_DATA5 VDD5 VSS20
91 A5 DQ5 6 88 VDD6 VSS21 60
MEM_MA_ADD6 90 16 MEM_MA_DATA6 93 61
MEM_MA_ADD7 A6 DQ6 MEM_MA_DATA7 VDD7 VSS22
86 A7 DQ7 18 94 VDD8 VSS23 65
MEM_MA_ADD8 89 21 MEM_MA_DATA8 99 66
MEM_MA_ADD9 A8 DQ8 MEM_MA_DATA9 VDD9 VSS24
85 A9 DQ9 23 100 VDD10 VSS25 71
MEM_MA_ADD10 107 33 MEM_MA_DATA10 105 72
MEM_MA_ADD11 A10/AP DQ10 MEM_MA_DATA11 VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


84 A11 DQ11 35 106 VDD12 VSS27 127
MEM_MA_ADD12 83 22 MEM_MA_DATA12 111 128
MEM_MA_ADD13 A12/BC# DQ12 MEM_MA_DATA13 VDD13 VSS28
119 A13 DQ13 24 112 VDD14 VSS29 133
MEM_MA_ADD14 80 34 MEM_MA_DATA14 117 134
MEM_MA_ADD15 A14 DQ14 MEM_MA_DATA15 VDD15 VSS30
78 A15 DQ15 36 118 VDD16 VSS31 138
MEM_MA_DATA16

PC2100 DDR3 SDRAM SO-DIMM


4 MEM_MA_BANK[0..2] DQ16 39 123 VDD17 VSS32 139
MEM_MA_BANK0 109 41 MEM_MA_DATA17 124 144
MEM_MA_BANK1 108 BA0 DQ17 MEM_MA_DATA18 VDD18 VSS33
BA1 DQ18 51 VSS34 145
MEM_MA_BANK2 79 53 MEM_MA_DATA19 199 150
BA2 DQ19 +3V VDDSPD VSS35
114 40 MEM_MA_DATA20 151
4 MEM_MA0_CS#0 S0# DQ20 VSS36
121 42 MEM_MA_DATA21 77 155
4 MEM_MA0_CS#1 S1# DQ21 NC1 VSS37
101 50 MEM_MA_DATA22 122 156
4 MEM_MA_CLK5_P CK0 DQ22 NC2 VSS38
103 52 MEM_MA_DATA23 MEM_MA_TEST 125 161
4 MEM_MA_CLK5_N CK0# DQ23 MEM_MA_DATA24 T5 NCTEST VSS39
4 MEM_MA_CLK4_P 102 CK1 DQ24 57 VSS40 162
104 59 MEM_MA_DATA25 MEM_MA_EVENT# 198 167
4 MEM_MA_CLK4_N CK1# DQ25 14 MEM_MA_EVENT# EVENT# VSS41
73 67 MEM_MA_DATA26 MEM_MA_RESET# 30 168
4 MEM_MA_CKE0 CKE0 DQ26 4 MEM_MA_RESET# RESET# VSS42
74 69 MEM_MA_DATA27 172
4 MEM_MA_CKE1 CKE1 DQ27 VSS43
115 56 MEM_MA_DATA28 173
4 MEM_MA_CAS# CAS# DQ28 VSS44
110 58 MEM_MA_DATA29 +VREF_DQ 1 178
4 MEM_MA_RAS# RAS# DQ29 7 +VREF_DQ VREF_DQ VSS45
113 68 MEM_MA_DATA30 126 179
4 MEM_MA_WE# W E# DQ30 +VREF_CA_A VREF_CA VSS46
197 70 MEM_MA_DATA31 184
SA0 DQ31 MEM_MA_DATA32 VSS47
201 SA1 DQ32 129 VSS48 185
PCLK_SMB 202 131 MEM_MA_DATA33 2 189
C 2,7,13,30,34 PCLK_SMB SCL DQ33 VSS1 VSS49 C
PDAT_SMB 200 141 MEM_MA_DATA34 C699 C547 3 190
2,7,13,30,34 PDAT_SMB SDA DQ34 VSS2 VSS50
143 MEM_MA_DATA35 1000P/50V_4 1000P/50V_4 8 195

(204P)
DQ35 MEM_MA_DATA36 VSS3 VSS51
4 MEM_MA0_ODT0 116 ODT0 DQ36 130 9 VSS4 VSS52 196
120 132 MEM_MA_DATA37 13
4 MEM_MA0_ODT1 ODT1 DQ37 VSS5
140 MEM_MA_DATA38 14
MEM_MA_DM0 DQ38 MEM_MA_DATA39 VSS6
4 MEM_MA_DM[0..7] 11 DM0 DQ39 142 19 VSS7
MEM_MA_DM1 28 147 MEM_MA_DATA40 20
MEM_MA_DM2 DM1 DQ40 MEM_MA_DATA41 VSS8
46 149 25
(204P)

MEM_MA_DM3 DM2 DQ41 MEM_MA_DATA42 VSS9


63 DM3 DQ42 157 26 VSS10 VTT1 203 +0.75V_DDR_VTT
MEM_MA_DM4 136 159 MEM_MA_DATA43 31 204
MEM_MA_DM5 DM4 DQ43 MEM_MA_DATA44 VSS11 VTT2
153 DM5 DQ44 146 32 VSS12
MEM_MA_DM6 170 148 MEM_MA_DATA45 37
MEM_MA_DM7 DM6 DQ45 MEM_MA_DATA46 VSS13
187 DM7 DQ46 158 38 VSS14
160 MEM_MA_DATA47 43
DQ47 MEM_MA_DATA48 VSS15
4 MEM_MA_DQS0_P 12 DQS0 DQ48 163
29 165 MEM_MA_DATA49
4 MEM_MA_DQS1_P DQS1 DQ49
47 175 MEM_MA_DATA50 DDR3-DIMM1
4 MEM_MA_DQS2_P DQS2 DQ50
64 177 MEM_MA_DATA51 H=5.2 footprint: "ddr-c-2013289-204p"
4 MEM_MA_DQS3_P DQS3 DQ51
137 164 MEM_MA_DATA52 DGMK4000059
4 MEM_MA_DQS4_P DQS4 DQ52
154 166 MEM_MA_DATA53
4
4
MEM_MA_DQS5_P
MEM_MA_DQS6_P 171
DQS5
DQS6
DQ53
DQ54 174 MEM_MA_DATA54 +1.5VSUS Place close to DIMMs
188 176 MEM_MA_DATA55
4 MEM_MA_DQS7_P DQS7 DQ55 MEM_MA_DATA56
4 MEM_MA_DQS0_N 10 DQS#0 DQ56 181
27 183 MEM_MA_DATA57
4 MEM_MA_DQS1_N DQS#1 DQ57
45 191 MEM_MA_DATA58 R443 *0_4
4 MEM_MA_DQS2_N DQS#2 DQ58 MEM_MA_DATA59
4 MEM_MA_DQS3_N 62 DQS#3 DQ59 193
135 180 MEM_MA_DATA60 +3VPCU
4 MEM_MA_DQS4_N DQS#4 DQ60
152 182 MEM_MA_DATA61
4 MEM_MA_DQS5_N DQS#5 DQ61 C720
169 192 MEM_MA_DATA62 R439 C714
4 MEM_MA_DQS6_N DQS#6 DQ62
186 194 MEM_MA_DATA63
B 4 MEM_MA_DQS7_N DQS#7 DQ63 B
1K/F_4 .1U/10V_4
.1U/10V_4

5
DDR3-DIMM1 U31
H=5.2 footprint: "ddr-c-2013289-204p" 3 + R446 10_4
1 1 2 +VREF_DQ
DGMK4000059 4 -
SO-DIMM BYPASS PLACEMENT : R432 C710 OPA343NA/3K
1000P/50V_4

2
Place these Caps near So-Dimm1. 1K/F_4 R442 C719

No Vias Between the Trace of PIN to CAP. 10K/F_4 0.01U/16V/X7R_4


R445 0_4

R444 *0_4

+1.5VSUS DE-COUPLING FOR DIMM1(ONE CAP PER POWER PIN)

C614 C599 C553 C55 C137 C83 C559 C603 C575 C143 C101 C68
.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 *.1U/10V_4 *.1U/10V_4 *.1U/10V_4 *.1U/10V_4 *.1U/10V_4 *.1U/10V_4
+1.5VSUS

SI +VREF_CA_A R338
DE-COUPLING FOR DIMM1 *2K/F_4
A A

+3V +0.75V_DDR_VTT +0.75V_DDR_VTT +1.5VSUS R336 0_4 VREF_CA_A


4,7,40 DDR_VTTREF
1

R343

C24 C26 C21


C13 *.1U/10V_4
+1.5VSUS C44 C43 C94
+ C901 *2K/F_4 PROJECT : LX89
1U/6.3V_4 *.1U/10V_4 4.7U/6.3V_6 10U/6.3V_8 10U/6.3V_8 *10U/6.3V_8 *150u_6.3V_3528 Quanta Computer Inc.
2

C23 .1U/10V_4

Size Document Number Rev


Custom 1A
DDR3 SODIMMS: A/B CHANNEL
NB5/RD2
Date: Monday, September 28, 2009 Sheet 6 of 46
5 4 3 2 1
5 4 3 2 1

07
+1.5VSUS 3,4,5,6,14,39,40,41,42
+3V 2,3,5,6,10,11,12,13,14,15,16,24,25,26,27,28,29,30,31,32,33,34,35,36,42
+0.75V_DDR_VTT 6,40

+1.5VSUS
CN23A MEM_MB_DATA[0..63] 4
4 MEM_MB_ADD[0..15] MEM_MB_ADD0 MEM_MB_DATA0
98 A0 DQ0 5
MEM_MB_ADD1 97 7 MEM_MB_DATA1
MEM_MB_ADD2 A1 DQ1 MEM_MB_DATA2 CN23B
96 A2 DQ2 15
MEM_MB_ADD3 95 17 MEM_MB_DATA3 75 44
MEM_MB_ADD4 A3 DQ3 MEM_MB_DATA4 VDD1 VSS16
92 A4 DQ4 4 76 VDD2 VSS17 48
D MEM_MB_ADD5 91 6 MEM_MB_DATA5 81 49 D
MEM_MB_ADD6 A5 DQ5 MEM_MB_DATA6 VDD3 VSS18
90 A6 DQ6 16 82 VDD4 VSS19 54
MEM_MB_ADD7 86 18 MEM_MB_DATA7 87 55
MEM_MB_ADD8 A7 DQ7 MEM_MB_DATA8 VDD5 VSS20
89 A8 DQ8 21 88 VDD6 VSS21 60
MEM_MB_ADD9 85 23 MEM_MB_DATA9 93 61
MEM_MB_ADD10 A9 DQ9 MEM_MB_DATA10 VDD7 VSS22
107 A10/AP DQ10 33 94 VDD8 VSS23 65
MEM_MB_ADD11 84 35 MEM_MB_DATA11 99 66
MEM_MB_ADD12 A11 DQ11 MEM_MB_DATA12 VDD9 VSS24
83 A12/BC# DQ12 22 100 VDD10 VSS25 71
MEM_MB_ADD13 119 24 MEM_MB_DATA13 105 72
MEM_MB_ADD14 A13 DQ13 MEM_MB_DATA14 VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


80 A14 DQ14 34 106 VDD12 VSS27 127
MEM_MB_ADD15 78 36 MEM_MB_DATA15 111 128
A15 DQ15 MEM_MB_DATA16 VDD13 VSS28

PC2100 DDR3 SDRAM SO-DIMM


4 MEM_MB_BANK[0..2] DQ16 39 112 VDD14 VSS29 133
MEM_MB_BANK0 109 41 MEM_MB_DATA17 117 134
MEM_MB_BANK1 BA0 DQ17 MEM_MB_DATA18 VDD15 VSS30
108 BA1 DQ18 51 118 VDD16 VSS31 138
MEM_MB_BANK2 79 53 MEM_MB_DATA19 123 139
BA2 DQ19 MEM_MB_DATA20 VDD17 VSS32
4 MEM_MB0_CS#0 114 S0# DQ20 40 124 VDD18 VSS33 144
+3V 121 42 MEM_MB_DATA21 145
4 MEM_MB0_CS#1 S1# DQ21 VSS34
101 50 MEM_MB_DATA22 199 150
4 MEM_MB_CLK5_P CK0 DQ22 +3V VDDSPD VSS35
103 52 MEM_MB_DATA23 151
4 MEM_MB_CLK5_N CK0# DQ23 VSS36
102 57 MEM_MB_DATA24 77 155
4 MEM_MB_CLK4_P CK1 DQ24 MEM_MB_DATA25 NC1 VSS37
R316 104 59 122 156
4 MEM_MB_CLK4_N CK1# DQ25 NC2 VSS38
4.7K_4 73 67 MEM_MB_DATA26 MEM_MB_TEST 125 161
4 MEM_MB_CKE0 CKE0 DQ26 T67 NCTEST VSS39
4 MEM_MB_CKE1 74 69 MEM_MB_DATA27 162
CKE1 DQ27 MEM_MB_DATA28 MEM_MB_EVENT# 198 VSS40
4 MEM_MB_CAS# 115 CAS# DQ28 56 14 MEM_MB_EVENT# EVENT# VSS41 167
110 58 MEM_MB_DATA29 MEM_MB_RESET# 30 168
4 MEM_MB_RAS# RAS# DQ29 4 MEM_MB_RESET# RESET# VSS42
113 68 MEM_MB_DATA30 172
4 MEM_MB_WE# W E# DQ30 VSS43
DIM2_SA0 DIM2_SA0 197 70 MEM_MB_DATA31 173
DIM2_SA1 SA0 DQ31 MEM_MB_DATA32 +VREF_DQ VSS44
201 SA1 DQ32 129 6 +VREF_DQ 1 VREF_DQ VSS45 178
DIM2_SA1 PCLK_SMB 202 131 MEM_MB_DATA33 +VREF_CA_B 126 179
2,6,13,30,34 PCLK_SMB SCL DQ33 VREF_CA VSS46
PDAT_SMB 200 141 MEM_MB_DATA34 184
C 2,6,13,30,34 PDAT_SMB SDA DQ34 VSS47 C
143 MEM_MB_DATA35 185
DQ35 MEM_MB_DATA36 VSS48
4 MEM_MB0_ODT0 116 ODT0 DQ36 130 2 VSS1 VSS49 189
120 132 MEM_MB_DATA37 C696 C48 3 190
4 MEM_MB0_ODT1 ODT1 DQ37 VSS2 VSS50
140 MEM_MB_DATA38 1000P/50V_4 1000P/50V_4 8 195

(204P)
4 MEM_MB_DM[0..7] DQ38 VSS3 VSS51
MEM_MB_DM0 11 142 MEM_MB_DATA39 9 196
MEM_MB_DM1 DM0 DQ39 MEM_MB_DATA40 VSS4 VSS52
28 DM1 DQ40 147 13 VSS5
MEM_MB_DM2 46 149 MEM_MB_DATA41 14
(204P)

MEM_MB_DM3 DM2 DQ41 MEM_MB_DATA42 VSS6


63 DM3 DQ42 157 19 VSS7
MEM_MB_DM4 136 159 MEM_MB_DATA43 20
MEM_MB_DM5 DM4 DQ43 MEM_MB_DATA44 VSS8
153 DM5 DQ44 146 25 VSS9
MEM_MB_DM6 170 148 MEM_MB_DATA45 26 203
DM6 DQ45 VSS10 VTT1 +0.75V_DDR_VTT
MEM_MB_DM7 187 158 MEM_MB_DATA46 31 204
DM7 DQ46 MEM_MB_DATA47 VSS11 VTT2
DQ47 160 32 VSS12
12 163 MEM_MB_DATA48 37
4 MEM_MB_DQS0_P DQS0 DQ48 VSS13
29 165 MEM_MB_DATA49 38
4 MEM_MB_DQS1_P DQS1 DQ49 VSS14
47 175 MEM_MB_DATA50 43
4 MEM_MB_DQS2_P DQS2 DQ50 VSS15
64 177 MEM_MB_DATA51
4 MEM_MB_DQS3_P DQS3 DQ51
137 164 MEM_MB_DATA52
4 MEM_MB_DQS4_P DQS4 DQ52
154 166 MEM_MB_DATA53 DDR3-DIMM2
4 MEM_MB_DQS5_P DQS5 DQ53
171 174 MEM_MB_DATA54
4 MEM_MB_DQS6_P DQS6 DQ54
188 176 MEM_MB_DATA55 H=9.2 footprint: "ddr-c-2013310-204p-1"
4 MEM_MB_DQS7_P DQS7 DQ55
10 181 MEM_MB_DATA56
4 MEM_MB_DQS0_N DQS#0 DQ56 MEM_MB_DATA57
4 MEM_MB_DQS1_N 27 DQS#1 DQ57 183 DGMK4000058
45 191 MEM_MB_DATA58
4 MEM_MB_DQS2_N DQS#2 DQ58
62 193 MEM_MB_DATA59
4 MEM_MB_DQS3_N DQS#3 DQ59 MEM_MB_DATA60
4 MEM_MB_DQS4_N 135 DQS#4 DQ60 180
152 182 MEM_MB_DATA61
4 MEM_MB_DQS5_N DQS#5 DQ61
169 192 MEM_MB_DATA62
4 MEM_MB_DQS6_N DQS#6 DQ62
186 194 MEM_MB_DATA63
4 MEM_MB_DQS7_N DQS#7 DQ63
B B
DDR3-DIMM2
H=9.2 footprint: "ddr-c-2013310-204p-1"
SO-DIMM BYPASS PLACEMENT : DGMK4000058
Place these Caps near So-Dimm1.
No Vias Between the Trace of PIN to CAP.

+1.5VSUS DE-COUPLING FOR DIMM2(ONE CAP PER POWER PIN)

C600 C561 C605 C134 C86 C59 C602 C585 C554 C147 C113 C69
.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 *.1U/10V_4 *.1U/10V_4 *.1U/10V_4 *.1U/10V_4 *.1U/10V_4 *.1U/10V_4

+1.5VSUS

SI +VREF_CA_B R54
DE-COUPLING FOR DIMM2 *2K/F_4

A +3V +0.75V_DDR_VTT +0.75V_DDR_VTT +1.5VSUS A


R39 0_4 +VREF_CA_B
4,6,40 DDR_VTTREF
1

C9 *.1U/10V_4 + C902 R43


C527 C530 C15 +1.5VSUS C164 C42 C95 *2K/F_4
1U/6.3V_4 *.1U/10V_4 4.7U/6.3V_6 10U/6.3V_8 10U/6.3V_8 *10U/6.3V_8 *150u_6.3V_3528
PROJECT : LX89
2

C14 .1U/10V_4
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
DDR3 SODIMMS TERMINATIONS
NB5/RD2
Date: Monday, September 28, 2009 Sheet 7 of 46
5 4 3 2 1
5 4 3 2 1

08
U27A
HT_CPU_NB_CAD_H0 Y25 D24 HT_NB_CPU_CAD_H0
+1.5V 3,11,34,42 HT_RXCAD0P HT_TXCAD0P
HT_CPU_NB_CAD_L0 Y24 PART 1 OF 6 D25 HT_NB_CPU_CAD_L0
+1.8V 5,10,11,16,26,42 HT_RXCAD0N HT_TXCAD0N
HT_CPU_NB_CAD_H1 V22 E24 HT_NB_CPU_CAD_H1
+1.1V 2,3,9,10,11,15,38 HT_RXCAD1P HT_TXCAD1P
HT_CPU_NB_CAD_L1 V23 E25 HT_NB_CPU_CAD_L1
HT_CPU_NB_CAD_H[15..0] HT_CPU_NB_CAD_H2 HT_RXCAD1N HT_TXCAD1N HT_NB_CPU_CAD_H2
HT_CPU_NB_CAD_H[15..0] 3 V25 HT_RXCAD2P HT_TXCAD2P F24
HT_CPU_NB_CAD_L2 V24 F25 HT_NB_CPU_CAD_L2
HT_CPU_NB_CAD_L[15..0] HT_CPU_NB_CAD_H3 HT_RXCAD2N HT_TXCAD2N HT_NB_CPU_CAD_H3
HT_CPU_NB_CAD_L[15..0] 3 U24 HT_RXCAD3P HT_TXCAD3P F23
HT_CPU_NB_CAD_L3 U25 F22 HT_NB_CPU_CAD_L3
HT_CPU_NB_CLK_H[1..0] HT_CPU_NB_CAD_H4 HT_RXCAD3N HT_TXCAD3N HT_NB_CPU_CAD_H4
T25 HT_RXCAD4P HT_TXCAD4P H23
HT_CPU_NB_CLK_H[1..0] 3 HT_CPU_NB_CAD_L4 HT_NB_CPU_CAD_L4
T24 HT_RXCAD4N HT_TXCAD4N H22
HT_CPU_NB_CLK_L[1..0] HT_CPU_NB_CAD_H5 P22 J25 HT_NB_CPU_CAD_H5
HT_CPU_NB_CLK_L[1..0] 3 HT_CPU_NB_CAD_L5 HT_RXCAD5P HT_TXCAD5P HT_NB_CPU_CAD_L5
P23 HT_RXCAD5N HT_TXCAD5N J24

HYPER TRANSPORT CPU I/F


HT_CPU_NB_CTL_H[1..0] HT_CPU_NB_CAD_H6 P25 K24 HT_NB_CPU_CAD_H6
D HT_CPU_NB_CTL_H[1..0] 3 HT_CPU_NB_CAD_L6 HT_RXCAD6P HT_TXCAD6P HT_NB_CPU_CAD_L6 D
P24 HT_RXCAD6N HT_TXCAD6N K25
HT_CPU_NB_CTL_L[1..0] HT_CPU_NB_CAD_H7 N24 K23 HT_NB_CPU_CAD_H7
HT_CPU_NB_CTL_L[1..0] 3 HT_CPU_NB_CAD_L7 HT_RXCAD7P HT_TXCAD7P HT_NB_CPU_CAD_L7
N25 HT_RXCAD7N HT_TXCAD7N K22
HT_NB_CPU_CAD_H[15..0]
HT_NB_CPU_CAD_H[15..0] 3 HT_CPU_NB_CAD_H8 HT_NB_CPU_CAD_H8
AC24 HT_RXCAD8P HT_TXCAD8P F21
HT_NB_CPU_CAD_L[15..0] HT_CPU_NB_CAD_L8 AC25 G21 HT_NB_CPU_CAD_L8
HT_NB_CPU_CAD_L[15..0] 3 HT_CPU_NB_CAD_H9 HT_RXCAD8N HT_TXCAD8N HT_NB_CPU_CAD_H9
AB25 HT_RXCAD9P HT_TXCAD9P G20 signals RS880 RX880
HT_NB_CPU_CLK_H[1..0] HT_CPU_NB_CAD_L9 AB24 H21 HT_NB_CPU_CAD_L9
HT_NB_CPU_CLK_H[1..0] 3 HT_CPU_NB_CAD_H10 HT_RXCAD9N HT_TXCAD9N HT_NB_CPU_CAD_H10
AA24 HT_RXCAD10P HT_TXCAD10P J20
HT_NB_CPU_CLK_L[1..0] HT_CPU_NB_CAD_L10 AA25 J21 HT_NB_CPU_CAD_L10 HT_TXCALP
HT_NB_CPU_CLK_L[1..0] 3 HT_CPU_NB_CAD_H11 HT_RXCAD10N HT_TXCAD10N HT_NB_CPU_CAD_H11
Y22 HT_RXCAD11P HT_TXCAD11P J18 Ra Ra
HT_NB_CPU_CTL_H[1..0] HT_CPU_NB_CAD_L11 Y23 K17 HT_NB_CPU_CAD_L11
HT_NB_CPU_CTL_H[1..0] 3 HT_RXCAD11N HT_TXCAD11N 301 ohm 1% 1.21k ohm 1%
HT_CPU_NB_CAD_H12 W 21 L19 HT_NB_CPU_CAD_H12 HT_TXCALN
HT_NB_CPU_CTL_L[1..0] HT_CPU_NB_CAD_L12 HT_RXCAD12P HT_TXCAD12P HT_NB_CPU_CAD_L12
HT_NB_CPU_CTL_L[1..0] 3
W 20 HT_RXCAD12N HT_TXCAD12N J19
HT_CPU_NB_CAD_H13 V21 M19 HT_NB_CPU_CAD_H13
HT_CPU_NB_CAD_L13 HT_RXCAD13P HT_TXCAD13P HT_NB_CPU_CAD_L13
V20 HT_RXCAD13N HT_TXCAD13N L18 HT_RXCALP
HT_CPU_NB_CAD_H14 U20 M21 HT_NB_CPU_CAD_H14 Rb Rb
HT_CPU_NB_CAD_L14 HT_RXCAD14P HT_TXCAD14P HT_NB_CPU_CAD_L14
U21 HT_RXCAD14N HT_TXCAD14N P21 301 ohm 1% 1.21k ohm 1%
HT_CPU_NB_CAD_H15 U19 P18 HT_NB_CPU_CAD_H15 HT_RXCALN
HT_CPU_NB_CAD_L15 HT_RXCAD15P HT_TXCAD15P HT_NB_CPU_CAD_L15
U18 HT_RXCAD15N HT_TXCAD15N M18
HT_CPU_NB_CLK_H0 T22 H24 HT_NB_CPU_CLK_H0
HT_CPU_NB_CLK_L0 HT_RXCLK0P HT_TXCLK0P HT_NB_CPU_CLK_L0
T23 HT_RXCLK0N HT_TXCLK0N H25
HT_CPU_NB_CLK_H1 AB23 L21 HT_NB_CPU_CLK_H1
HT_CPU_NB_CLK_L1 HT_RXCLK1P HT_TXCLK1P HT_NB_CPU_CLK_L1
AA22 HT_RXCLK1N HT_TXCLK1N L20

U24 HT_CPU_NB_CTL_H0 M22 M24 HT_NB_CPU_CTL_H0


HT_CPU_NB_CTL_L0 HT_RXCTL0P HT_TXCTL0P HT_NB_CPU_CTL_L0
M23 HT_RXCTL0N HT_TXCTL0N M25
SPM_VREF1 M9 E4 SPM_DQ2 HT_CPU_NB_CTL_H1 R21 P19 HT_NB_CPU_CTL_H1
SPM_VREF2 VREFCA DQL0 SPM_DQ1 HT_CPU_NB_CTL_L1 HT_RXCTL1P HT_TXCTL1P HT_NB_CPU_CTL_L1
H2 VREFDQ DQL1 F8 R20 HT_RXCTL1N HT_TXCTL1N R18
C F3 SPM_DQ5 C
SPM_A0 DQL2 SPM_DQ3 R419 301/F_4 HT_RXCALP HT_TXCALP R418 301/F_4
N4 A0 DQL3 F9 C23 HT_RXCALP HT_TXCALP B24
SPM_A1 P8 H4 SPM_DQ7 HT_RXCALN A24 B25 HT_TXCALN
SPM_A2 A1 DQL4 SPM_DQ0 HT_RXCALN HT_TXCALN
P4 A2 DQL5 H9
SPM_A3 N3 G3 SPM_DQ4 Rb RS880M Ra
SPM_A4 A3 DQL6 SPM_DQ6
P9 A4 DQL7 H8
SPM_A5 P3
SPM_A6 A5
R9 A6
SPM_A7 R3 D8 SPM_DQ13
SPM_A8 A7 DQU0 SPM_DQ8
T9 A8 DQU1 C4
SPM_A9 R4 C9 SPM_DQ10
SPM_A10 A9 DQU2 SPM_DQ12
L8 A10/AP DQU3 C3
SPM_A11 R8 A8 SPM_DQ15
SPM_A12 A11 DQU4 SPM_DQ11
SPM_A13
N8
T4
A12/BC DQU5 A3
B9 SPM_DQ14 This block is for UMA only , DIS can remove all component DIS only
A13 DQU6 SPM_DQ9
T8 A14 DQU7 A4
M8 A15 +1.5V_MEM_VDDQ
+1.5V
SPM_BA0 M3 B3
SPM_BA1 BA0 VDD#B3 U27D +1.5V_MEM_VDDQ
SPM_BA2
N9 BA1 VDD#D10 D10 40mils wdith or more
M4 BA2 VDD#G8 G8 PAR 4 OF 6
K3 SPM_A0 AB12 AA18 SPM_DQ0 R328 0_6
VDD#K3 SPM_A1 MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC) SPM_DQ1
VDD#K9 K9 AE16 MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC) AA20
N2 SPM_A2 V11 AA19 SPM_DQ2
SPM_CLKN VDD#N2 SPM_A3 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) SPM_DQ3 C41 C541 C45
J8 CK VDD#N10 N10 AE15 MEM_A3(NC) MEM_DQ3/DVO_D0(NC) Y19
R50 *100_4 SPM_CLKP K8 R2 SPM_A4 AA12 V17 SPM_DQ4 1U/10V_4 10U/6.3V_8 10U/6.3V_8
SPM_CKE CK VDD#R2 SPM_A5 MEM_A4(NC) MEM_DQ4(NC) SPM_DQ5
K10 CKE VDD#R10 R10 AB16 MEM_A5(NC) MEM_DQ5/DVO_D1(NC) AA17
+1.5V_MEM_VDDQ SPM_A6 AB14 AA15 SPM_DQ6
SPM_A7 MEM_A6(NC) MEM_DQ6/DVO_D2(NC) SPM_DQ7
AD14 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) Y15
B SPM_ODT K2 A2 SPM_A8 AD13 AC20 SPM_DQ8 B
SPM_CS# ODT VDDQ#A2 SPM_A9 MEM_A8(NC) MEM_DQ8/DVO_D3(NC) SPM_DQ9
L3 A9 AD15 AD19

SBD_MEM/DVO_I/F
SPM_RAS# CS VDDQ#A9 SPM_A10 MEM_A9(NC) MEM_DQ9/DVO_D5(NC) SPM_DQ10
J4 RAS VDDQ#C2 C2 AC16 MEM_A10(NC) MEM_DQ10/DVO_D6(NC) AE22
SPM_CAS# K4 C10 SPM_A11 AE13 AC18 SPM_DQ11
SPM_WE# CAS VDDQ#C10 SPM_A12 MEM_A11(NC) MEM_DQ11/DVO_D7(NC) SPM_DQ12 C54 C40 C39
L4 WE VDDQ#D3 D3 AC14 MEM_A12(NC) MEM_DQ12(NC) AB20
E10 SPM_A13 Y14 AD22 SPM_DQ13 0.1U/10V_4 0.1U/10V_4 1U/10V_4
VDDQ#E10 T14 MEM_A13(NC) MEM_DQ13/DVO_D9(NC)
F2 AC22 SPM_DQ14
SPM_DQS0P VDDQ#F2 SPM_BA0 MEM_DQ14/DVO_D10(NC) SPM_DQ15
F4 DQSL VDDQ#H3 H3 AD16 MEM_BA0(NC) MEM_DQ15/DVO_D11(NC) AD21
SPM_DQS1P C8 H10 SPM_BA1 AE17
DQSU VDDQ#H10 SPM_BA2 MEM_BA1(NC) SPM_DQS0P
AD17 MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC) Y17
W 18 SPM_DQS0N
SPM_DM0 SPM_RAS# MEM_DQS0N/DVO_IDCKN(NC) SPM_DQS1P
E8 DML VSS#A10 A10 W 12 MEM_RASb(NC) MEM_DQS1P(NC) AD20
SPM_DM1 D4 B4 SPM_CAS# Y12 AE21 SPM_DQS1N
DMU VSS#B4 SPM_WE# MEM_CASb(NC) MEM_DQS1N(NC)
VSS#E2 E2 AD18 MEM_W Eb(NC)
G9 SPM_CS# AB13 W 17 SPM_DM0
+1.5V_MEM_VDDQ SPM_DQS0N VSS#G9 SPM_CKE MEM_CSb(NC) MEM_DM0(NC) SPM_DM1
G4 DQSL VSS#J3 J3 AB18 MEM_CKE(NC) MEM_DM1/DVO_D8(NC) AE19
SPM_DQS1N B8 J9 SPM_ODT V14
DQSU VSS#J9 MEM_ODT(NC)
VSS#M2 M2 IOPLLVDD18(NC) AE23 +1.8V_IOPLLVDD18 BLM18PG181SN1D(180,1.5A)_6 L61 +1.8V
R51 10K/F_4 M10 SPM_CLKP V15 AE24 +1.1V_IOPLLVDD BLM18PG181SN1D(180,1.5A)_6 L56
VSS#M10 MEM_CKP(NC) IOPLLVDD(NC) +1.1V
P2 SPM_CLKN W 14
VSS#P2 MEM_CKN(NC) C573 C558
13 SP_DDR3_RST# T3 RESET VSS#P10 P10 IOPLLVSS(NC) AD23
T2 R371 40.2/F_4 SPM_COMPP AE12
VMA_ZQ2 VSS#T2 40.2/F_4 SPM_COMPN MEM_COMPP(NC)
L9 ZQ VSS#T10 T10 R368 AD12 MEM_COMPN(NC) MEM_VREF(NC) AE18 SPM_VREF 2.2U/6.3V_6 2.2U/6.3V_6
+1.5V_MEM_VDDQ
RS880M
VSSQ#B2 B2
B10 R366 1K/F_4 R367 1K/F_4
R37 VSSQ#B10
VSSQ#D2 D2
240/F_4 VSSQ#D9 D9
VSSQ#E3 E3
A J2 E9 SPM_VREF1 SPM_VREF2 C586 0.1U/10V_4 C587 0.1U/10V_4 A
NC#J2 VSSQ#E9 +1.5V_MEM_VDDQ
L2 NC#L2 VSSQ#F10 F10
J10 NC#J10 VSSQ#G2 G2
L10 NC#L10 VSSQ#G10 G10
R33 1K/F_4 R28 1K/F_4 R59 1K/F_4 R68 1K/F_4
100-BALL
SDRAM DDR3
H5TQ1G63AFR-14C
PROJECT : LX89
C38 0.1U/10V_4 C37 0.1U/10V_4 +1.5V_MEM_VDDQ C53 0.1U/10V_4 C65 0.1U/10V_4 +1.5V_MEM_VDDQ Quanta Computer Inc.
Size Document Number Rev
Custom 1A
RS880-HT LINK I/F 1/5
NB5/RD2
Date: Monday, September 28, 2009 Sheet 8 of 46
5 4 3 2 1
5 4 3 2 1

UMA Remove All Cap


9
Swap pin for Layout
SI
U27B PEG_RX#[15:0] PEG_TX#[15:0]
17 PEG_RX#[15:0] PEG_TX#[15:0] 17
PEG_RX15 D4 A5 C_PEG_TX#15 C713 0.1U/10V_4 PEG_TX15
D PEG_RX#15 GFX_RX0P GFX_TX0P C_PEG_TX15 C718 0.1U/10V_4 PEG_TX#15 PEG_RX[15:0] PEG_TX[15:0] D
PEG_RX14
C4 GFX_RX0N PART 2 OF 6 GFX_TX0N B5
C_PEG_TX#14 PEG_TX14
17 PEG_RX[15:0] PEG_TX[15:0] 17
A3 A4 C703 0.1U/10V_4
PEG_RX#14 GFX_RX1P GFX_TX1P C_PEG_TX14 C711 0.1U/10V_4 PEG_TX#14
B3 GFX_RX1N GFX_TX1N B4
PEG_RX13 C2 C3 C_PEG_TX13 C698 0.1U/10V_4 PEG_TX13 Close to North Bridge
PEG_RX#13 GFX_RX2P GFX_TX2P C_PEG_TX#13 C700 0.1U/10V_4 PEG_TX#13
C1 GFX_RX2N GFX_TX2N B2
PEG_RX12 E5 D1 C_PEG_TX12 C689 0.1U/10V_4 PEG_TX12
PEG_RX#12 GFX_RX3P GFX_TX3P C_PEG_TX#12 C695 0.1U/10V_4 PEG_TX#12
F5 GFX_RX3N GFX_TX3N D2
PEG_RX11 G5 E2 C_PEG_TX#11 C690 0.1U/10V_4 PEG_TX#11
PEG_RX#11 GFX_RX4P GFX_TX4P C_PEG_TX11 C684 0.1U/10V_4 PEG_TX11
G6 GFX_RX4N GFX_TX4N E1
PEG_RX10 H5 F4 C_PEG_TX10 C678 0.1U/10V_4 PEG_TX10
PEG_RX#10 GFX_RX5P GFX_TX5P C_PEG_TX#10 C683 0.1U/10V_4 PEG_TX#10
H6 GFX_RX5N GFX_TX5N F3
PEG_RX9 J6 F1 C_PEG_TX#9 C677 0.1U/10V_4 PEG_TX#9 C_PEG_TX15
GFX_RX6P GFX_TX6P C_PEG_TX15 27
PEG_RX#9 J5 F2 C_PEG_TX9 C676 0.1U/10V_4 PEG_TX9 C_PEG_TX#15
GFX_RX6N GFX_TX6N C_PEG_TX#15 27
PEG_RX8 J7 H4 C_PEG_TX8 C673 0.1U/10V_4 PEG_TX8
PEG_RX#8 GFX_RX7P GFX_TX7P C_PEG_TX#8 C675 0.1U/10V_4 PEG_TX#8 C_PEG_TX14
J8 H3

PCIE I/F GFX


PEG_RX7 GFX_RX7N GFX_TX7N C_PEG_TX#7 PEG_TX#7 C_PEG_TX#14 C_PEG_TX14 27
L5 H1 C671 0.1U/10V_4
GFX_RX8P GFX_TX8P C_PEG_TX#14 27
PEG_RX#7 L6 H2 C_PEG_TX7 C667 0.1U/10V_4 PEG_TX7
PEG_RX6 GFX_RX8N GFX_TX8N C_PEG_TX#6 C665 0.1U/10V_4 PEG_TX#6 C_PEG_TX13
M8 GFX_RX9P GFX_TX9P J2 C_PEG_TX13 27
PEG_RX#6 L8 J1 C_PEG_TX6 C663 0.1U/10V_4 PEG_TX6 C_PEG_TX#13
GFX_RX9N GFX_TX9N C_PEG_TX#13 27
PEG_RX5 P7 K4 C_PEG_TX#5 C662 0.1U/10V_4 PEG_TX#5
PEG_RX#5 GFX_RX10P GFX_TX10P C_PEG_TX5 C659 0.1U/10V_4 PEG_TX5 C_PEG_TX12
M7 GFX_RX10N GFX_TX10N K3 C_PEG_TX12 27
PEG_RX4 P5 K1 C_PEG_TX#4 C658 0.1U/10V_4 PEG_TX#4 C_PEG_TX#12
GFX_RX11P GFX_TX11P C_PEG_TX#12 27
PEG_RX#4 M5 K2 C_PEG_TX4 C654 0.1U/10V_4 PEG_TX4
PEG_RX3 GFX_RX11N GFX_TX11N C_PEG_TX3 C651 0.1U/10V_4 PEG_TX3
R8 M4
PEG_RX#3 P8
GFX_RX12P
GFX_RX12N
GFX_TX12P
GFX_TX12N M3 C_PEG_TX#3 C653 0.1U/10V_4 PEG_TX#3 To HDMI CONN
PEG_RX2 R6 M1 C_PEG_TX#2 C649 0.1U/10V_4 PEG_TX#2
PEG_RX#2 GFX_RX13P GFX_TX13P C_PEG_TX2 C644 0.1U/10V_4 PEG_TX2
R5 GFX_RX13N GFX_TX13N M2
PEG_RX1 P4 N2 C_PEG_TX1 C640 0.1U/10V_4 PEG_TX1
PEG_RX#1 GFX_RX14P GFX_TX14P C_PEG_TX#1 C643 0.1U/10V_4 PEG_TX#1
P3 GFX_RX14N GFX_TX14N N1
PEG_RX0 T4 P1 C_PEG_TX0 C637 0.1U/10V_4 PEG_TX0
C PEG_RX#0 GFX_RX15P GFX_TX15P C_PEG_TX#0 C639 0.1U/10V_4 PEG_TX#0 C
T3 GFX_RX15N GFX_TX15N P2

AE3 GPP_RX0P GPP_TX0P AC1


AD4 GPP_RX0N GPP_TX0N AC2
PCIE_RXP1_WLAN AE2 AB4 PCIE_TXP1_WLAN_C C87 0.1U/10V_4
34 PCIE_RXP1_WLAN GPP_RX1P GPP_TX1P PCIE_TXP1_WLAN 34
PCIE_RXN1_WLAN AD3 AB3 PCIE_TXN1_WLAN_C C88 0.1U/10V_4 TO WLAN
34 PCIE_RXN1_WLAN GPP_RX1N GPP_TX1N PCIE_TXN1_WLAN 34
PCIE_RXP2_LAN AD1 AA2 PCIE_TXP2_LAN_C C607 0.1U/10V_4
32 PCIE_RXP2_LAN GPP_RX2P GPP_TX2P PCIE_TXP2_LAN 32
PCIE_RXN2_LAN AD2 PCIE I/F GPP AA1 PCIE_TXN2_LAN_C C609 0.1U/10V_4 TO LAN
32 PCIE_RXN2_LAN GPP_RX2N GPP_TX2N PCIE_TXN2_LAN 32
V5 GPP_RX3P GPP_TX3P Y1
W6 GPP_RX3N GPP_TX3N Y2
U5 GPP_RX4P GPP_TX4P Y4
U6 GPP_RX4N GPP_TX4N Y3
U8 GPP_RX5P GPP_TX5P V1
U7 GPP_RX5N GPP_TX5N V2

AA8 AD7 A_TX0P_C C580 0.1U/10V_4 PCIE_NB_SB_TX0P 12


12 PCIE_SB_NB_RX0P SB_RX0P SB_TX0P
Y8 AE7 A_TX0N_C C579 0.1U/10V_4
12 PCIE_SB_NB_RX0N SB_RX0N SB_TX0N PCIE_NB_SB_TX0N 12
AA7 AE6 A_TX1P_C C581 0.1U/10V_4 PCIE_NB_SB_TX1P 12
12 PCIE_SB_NB_RX1P SB_RX1P SB_TX1P
Y7 AD6 A_TX1N_C C582 0.1U/10V_4
12 PCIE_SB_NB_RX1N SB_RX1N SB_TX1N PCIE_NB_SB_TX1N 12
AA5 PCIE I/F SB AB6 A_TX2P_C C89 0.1U/10V_4
12 PCIE_SB_NB_RX2P SB_RX2P SB_TX2P PCIE_NB_SB_TX2P 12
AA6 AC6 A_TX2N_C C90 0.1U/10V_4 PCIE_NB_SB_TX2N 12
12 PCIE_SB_NB_RX2N SB_RX2N SB_TX2N
W5 AD5 A_TX3P_C C584 0.1U/10V_4
12 PCIE_SB_NB_RX3P SB_RX3P SB_TX3P PCIE_NB_SB_TX3P 12
Y5 AE5 A_TX3N_C C583 0.1U/10V_4
12 PCIE_SB_NB_RX3N SB_RX3N SB_TX3N PCIE_NB_SB_TX3N 12
AC8 NB_PCIECALRP R369 1.27K/F_4
PCE_CALRP(PCE_BCALRP) NB_PCIECALRN R370 2K/F_4
PCE_CALRN(PCE_BCALRN) AB8 +1.1V

RS880M
B B

+1.1V 2,3,8,10,11,15,38
RS880 Display Port Support (muxed on GFX)

GFX_TX0,TX1,TX2 and TX3


DP0
AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7


DP1
AUX1 and HPD1

A A

PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
RS880-PCIE I/F 2/5
NB5/RD2
Date: Monday, September 28, 2009 Sheet 9 of 46
5 4 3 2 1
5 4 3 2 1

10
U27C
+3V_AVDD_NB F12 A22 LA_DATAP0
+3V 2,3,5,6,7,11,12,13,14,15,16,24,25,26,27,28,29,30,31,32,33,34,35,36,42 AVDD1(NC) TXOUT_L0P(NC) LA_DATAP0 26
E12 PART 3 OF 6 B22 LA_DATAN0
+1.8V 5,8,11,16,26,42 AVDD2(NC) TXOUT_L0N(NC) LA_DATAN0 26
+1.8V_AVDDDI_NB F14 A21 LA_DATAP1
+1.1V 2,3,8,9,11,15,38 AVDDDI(NC) TXOUT_L1P(NC) LA_DATAP1 26
LA_DATAN1
+1.5V 3,8,11,34,42 R111 for UMA use 140 ohm +1.8V_AVDDQ_NB
G15
H15
AVSSDI(NC) TXOUT_L1N(NC) B21
B20 LA_DATAP2
LA_DATAN1 26
AVDDQ(NC) TXOUT_L2P(NC) LA_DATAP2 26
for DIS+PowerExpress use 133 ohm (AMD) H14 AVSSQ(NC) TXOUT_L2N(DBG_GPIO0) A20 LA_DATAN2
LA_DATAP3
LA_DATAN2 26
TXOUT_L3P(NC) A19 T80
133ohm CS11332FB19 E17 B19 LA_DATAN3
T29 C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2) T82

CRT/TVOUT
140ohm CS11402FB19 T30 F17 Y(DFT_GPIO2)
F15 B18 LB_DATAP0
T31 COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC) LB_DATAP0 26
A18 LB_DATAN0
TXOUT_U0N(NC) LB_DATAN0 26
26 INT_CRT_R R112 *0_4/S CRT_R_1 G18 A17 LB_DATAP1
RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3) LB_DATAP1 26
R111 133/F_4 G17 B17 LB_DATAN1
REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2) LB_DATAN1 26
26 INT_CRT_G R110 *0_4/S CRT_G_1 E18 D20 LB_DATAP2
GREEN(DFT_GPIO1) TXOUT_U2P(NC) LB_DATAP2 26
R109 150/F_4 F18 D21 LB_DATAN2
GREENb(NC) TXOUT_U2N(NC) LB_DATAN2 26
D 26 INT_CRT_B R107 *0_4/S CRT_B_1 E19 D18 LB_DATAP3 D
BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5) T78
R106 150/F_4 F19 D19 LB_DATAN3
BLUEb(NC) TXOUT_U3N(NC) T75

26 INT_HSYNC_COM INT_HSYNC_COM A11 B16 LA_CLK


DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1) LA_CLK 26
26 INT_VSYNC_COM INT_VSYNC_COM B11 A16 LA_CLK#
DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3) LA_CLK# 26
INT_DDCDATA E8 D16 LB_CLK
26 INT_DDCDATA DAC_SDA(PCE_TCALRN) TXCLK_UP(PCIE_RESET_GPIO4) LB_CLK 26
INT_DDCCLK F8 D17 LB_CLK#
26 INT_DDCCLK DAC_SCL(PCE_RCALRN) TXCLK_UN(PCIE_RESET_GPIO1) LB_CLK# 26
NBGFX_CLKP
R127 715/F_6 DAC_RSET_NB G14
NBGFX_CLKN DAC_RSET(PWM_GPIO1) +1.8V_VDDLTP18_NB
VDDLTP18(NC) A13
+1.1V_PLLVDD A12 B13
+1.8V_PLLVDD18 PLLVDD(NC) VSSLTP18(NC)
D14 PLLVDD18(NC)

LVTM
R80 R79 B12 A15 +1.8V_VDDLT_18_NB
PLLVSS(NC) VDDLT18_1(NC)

PLL PWR
INT INT VDDLT18_2(NC) B15
4.7K_4 4.7K_4 +1.8V_VDDA18HTPLL H17 A14
VDDA18HTPLL VDDLT33_1(NC)
VDDLT33_2(NC) B14
+1.8V_VDDA18PCIEPLL D7 VDDA18PCIEPLL1
E7 VDDA18PCIEPLL2 VSSLT1(VSS) C14
VSSLT2(VSS) D15
NB_REFCLK_P NB_RST#_IN D8 C16
12 NB_REFCLK_P 12 NB_PLTRST# SYSRESETb VSSLT3(VSS)
NB_REFCLK_N NB_PWRGD_IN A10 C18
12 NB_REFCLK_N 16 NB_PWRGD_IN POWERGOOD VSSLT4(VSS)
NB_LDT_STOP# C10 C20
LDTSTOPb VSSLT5(VSS)

PM
NB_ALLOW_LDTSTOP C12 E20
ALLOW_LDTSTOP VSSLT6(VSS)
VSSLT7(VSS) C22
EXT EXT NBHT_REFCLKP C25
2,12 NBHT_REFCLKP HT_REFCLKP
+1.1V R143 NBHT_REFCLKN C24 I Change from AMD request
2,12 NBHT_REFCLKN HT_REFCLKN
4.7K_4 RS880 RS880 R137
4.7K_4 R133 EXT *0_4 NB_REFCLK_P E11
2 EXT_NB_OSC REFCLK_P/OSCIN(OSCIN)

CLOCKs
R132 EXT *0_4 NB_REFCLK_N F11 I E9 INT_DISP_ON
REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP) INT_DISP_ON 26
F7 INT_DPST_PWM
LVDS_BLON(PCE_RCALRP) INT_DPST_PWM 26
R199 EXT *0_4 NBGFX_CLKP T2 G12 INT_LVDS_BLON
2 NBGFX_CLKN_EXT GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2) INT_LVDS_BLON 26
R200 EXT *0_4 NBGFX_CLKN T1 I/O
+3V 2 NBGFX_CLKP_EXT GFX_REFCLKN

T74 U1 GPP_REFCLKP
T73 U2 GPP_REFCLKN I/O
C C
R163 SBLINK_CLKP V4
2,12 SBLINK_CLKP GPPSB_REFCLKP(SB_REFCLKP)
2K/F_4 SBLINK_CLKN V3
2,12 SBLINK_CLKN GPPSB_REFCLKN(SB_REFCLKN)
INT_EDIDDATA A9
26 INT_EDIDDATA I2C_DATA
INT_EDIDCLK B9 D9
PE_GPIO2 2 1
26 INT_EDIDCLK
HDMI_DDC_DATA_L B8
I2C_CLK MIS. TMDS_HPD(NC)
D10 TMDS_HPD1
INT_TMDS_HPD 27
26 PE_GPIO2 DDC_DATA/AUX0N(NC) HPD(NC) T76
D10 RB501V-40 A8
HDMI_DDC_CLK DDC_CLK/AUX0P(NC) SUS_STAT#_NB R421 0_4
27 HDMI_DDC_CLK B7 DDC_CLK1/AUX1P(NC) SUS_STAT#(PWM_GPIO5) D12 SUS_STAT# 13
2 1 HDMI_DDC_DATA A7
VGA_SWON 36 27 HDMI_DDC_DATA DDC_DATA1A/AUX1N(NC)
D11 AE8
*RB501V-40 DYN_PWR_EN THERMALDIODE_P
38 DYN_PWR_EN B10 STRP_DATA THERMALDIODE_N AD8

SI G11 RSVD TESTMODE D13 TEST_EN

Change HDMI CLK/DATA PIN C8 R425


T83 AUX_CAL(NC) 1.8K_4
for AMD recommand
RS880M

RS880M --- ADD BLM18PG181SN1D(180,1.5A)_6


+1.1V +1.1V_PLLVDD
+3V L27 +3V_AVDD_NB L69
BLM18PG181SN1D(180,1.5A)_6 PLLVDD - Graphics PLL +1.8V
not applicable to
AVDD-DAC Analog C701 BLM18PG181SN1D(180,1.5A)_6
C287 RS880 +1.8V_VDDLTP18_NB
not applicable to RS880 2.2U/6.3V_6
2.2U/6.3V_6 L70
C680 VDDLTP18 - LVDS or DVI/HDMI PLL
2.2U/6.3V_6 not applicable to RS880
+1.8V

B
STRAP_DEBUG_BUS_GPIO_ENABLEb +1.8V
B
BLM21PG221SN1D(220,100M,2A)_8
L26 +1.8V_PLLVDD18 R103 0_6 +1.8V_AVDDDI_NB AVDDI-DAC Digital +1.8V_VDDLT_18_NB
Enables the Test Debug Bus using GPIO. BLM18PG181SN1D(180,1.5A)_6 L68
not applicable to RS880
C258 VDDLT18 - LVDS or
RS880M DVI/HDMI digital
INT_VSYNC_COM R423 3K_4 +3V C347 C283 0.1U/10V_4 C687 C681
1 Disable 10U/6.3V_8 2.2U/6.3V_6
not applicable to
0 Enable 4.7U/6.3V_6 0.1U/10V_4 RS880
BLM18PG181SN1D(180,1.5A)_6 AVDDQ-DAC Bandgap Reference
PLLVDD18 - Graphics PLL +1.8V_AVDDQ_NB not applicable to RS880
not applicable to RS880 L32

C328
2.2U/6.3V_6
RS880M: Enables Side port memory
RS880M:INT_HSYNC_COM

Selects if Memory SIDE PORT is available or not +1.8V


1 = Memory Side port Not available VDDA18PCIEPLL -PCIE PLL
0 = Memory Side port available 20mils width +1.8V
Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1] L29 +1.8V_VDDA18PCIEPLL
+1.8V
BLM18PG181SN1D(180,1.5A)_6
R428
C317
2.2U/6.3V_6 1K/F_4
INT_HSYNC_COM R424 *3K_4 +3V
U15 C503 R420
R431 3K_4 1 5 0.1U/10V_4 2K/F_4
NC VCC 12 ALLOW_LDTSTOP
VDDA18HTPLL -HT LINK PLL
A 3,12 CPU_LDT_STOP# 2 IN A
20mils width R426 *0_4/S NB_ALLOW_LDTSTOP
L28 +1.8V_VDDA18HTPLL 3 4 NB_LDT_STOP#
GND OUT
For extrnal EEPROM Debug only BLM18PG181SN1D(180,1.5A)_6 74LVC1G07GW
RS880
C321
DYN_PWR_EN R433 2K/F_4 2.2U/6.3V_6

PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
RS880-SYSTEM I/F 3/5
NB5/RD2
Date: Monday, September 28, 2009 Sheet 10 of 46
5 4 3 2 1
5 4 3 2 1

RS880M POWER TABLE


11

AE14
AC3
AC4

M11
AA4
AB5
AB1
AB7

AE1
AE4
AB2

D11

E14
E15

K14

L15
J15
J12
W1
W2
W4
W7
W8
M6
G1
G2
G4

G8
D3
D5

H7

R7

N4

R1
R2
R4

U4
A2
B1

E4

P6

V7

V8
V6

Y6
L1
L2
L4
L7
J4
U27F PIN NAME PIN NAME
RS880M RS880M
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VDDHT +1.1V IOPLLVDD +1.1V
+1.1V_DYN 38
+3V 2,3,5,6,7,10,12,13,14,15,16,24,25,26,27,28,29,30,31,32,33,34,35,36,42
VDDHTRX +1.1V AVDD +3.3V
+1.1V 2,3,8,9,10,15,38
+1.5V 3,8,34,42
VDDHTTX +1.2V AVDDDI +1.8V
+1.8V 5,8,10,16,26,42
PART 6/6

D VDDA18PCIE +1.8V AVDDQ +1.8V D


GROUND
VDDG18 +1.8V PLLVDD +1.1V

VDD18_MEM +1.8V PLLVDD18 +1.8V


VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VDDPCIE +1.1V VDDA18PCIEPLL +1.8V
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VDDC +1.1V VDDA18HTPLL +1.8V

VDD_MEM +1.8V/1.5V VDDLTP18 +1.8V


A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25

L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
VDDG33 +3.3V VDDLT18 +1.8V

IOPLLVDD18 +1.8V VDDLT33 NC

VDDHT - HT +1.1V

C
LINK digital +1.1V 2A for RS880M VDDPCIE - PCIE-E Main power C
I/O for U27E
RS880
0.6A +1.1V_VDDHT +1.1V_VDD_PCIE
0.7A
L55 J17 A6 R124 *0_8/S +1.1V
*0_8/S VDDHT_1 VDDPCIE_1
K16 VDDHT_2 PART 5/6 VDDPCIE_2 B6
L16 VDDHT_3 VDDPCIE_3 C6
C551 C184 C230 C194 M16 D6 C186 C281 C238 C286 C309
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDHT_4 VDDPCIE_4 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 4.7U/6.3V_6
P16 VDDHT_5 VDDPCIE_5 E6
VDDHTRX - HT R16 VDDHT_6 VDDPCIE_6 F6
LINK RX I/O for T16 VDDHT_7 VDDPCIE_7 G7
RS880 0.45A +1.1V_VDDHTRX VDDPCIE_8 H8
L25 H18 J9
*0_8/S VDDHTRX_1 VDDPCIE_9
G19 VDDHTRX_2 VDDPCIE_10 K9
F20 VDDHTRX_3 VDDPCIE_11 M9
VDDHTTX - HT C693 C257 C686 C679 E21 L9
10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDHTRX_4 VDDPCIE_12
LINK TX I/O for D22 VDDHTRX_5 VDDPCIE_13 P9
B23 VDDHTRX_6 VDDPCIE_14 R9
RS880 RS880M A23 T9
L67 VDDHTRX_7 VDDPCIE_15
0.5A +1.1V 2A for RS880M +1.1V_VDDHTTX VDDPCIE_16 V9
+1.1V AE25 VDDHTTX_1 VDDPCIE_17 U9
*0_8/S AD24 7A VDDC - Core Logic power
VDDHTTX_2
AC23 VDDHTTX_3 VDDC_1 K12 +1.1V_DYN
C694 C685 C692 C170 C142 AB22 J14
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDHTTX_4 VDDC_2
AA21 VDDHTTX_5 VDDC_3 U16
Y20 J11 C177 C204 C212 C219 C62
VDDHTTX_6 VDDC_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 10U/6.3V_8
W 19 K15

POWER
VDDHTTX_7 VDDC_5
V18 VDDHTTX_8 VDDC_6 M12
U17 VDDHTTX_9 VDDC_7 L14
T17 VDDHTTX_10 VDDC_8 L11
R17 VDDHTTX_11 VDDC_9 M13
P17 M15
B +1.8V 1A for RS880M+SB820 M17
VDDHTTX_12
VDDHTTX_13
VDDC_10
VDDC_11 N12 B

600mA +1.8V_VDDA18PCIE VDDC_12 N14


+1.8V L16 J10 P11 C195 C189 C176 C63 VDD_MEM For UMA RS880 only
VDDA18PCIE_1 VDDC_13 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 10U/6.3V_8
P10 P13
BLM21PG221SN1D(220,100M,2A)_8 K10
VDDA18PCIE_2 VDDC_14
P14
Not applicable to RX780
VDDA18PCIE_3 VDDC_15
VDDA18PCIE - C115 C129 C178 C153 C218 C165 M10 VDDA18PCIE_4 VDDC_16 R12 memory I/O transform
PCIE TX stage 4.7U/6.3V_6 4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 L10 R15
VDDA18PCIE_5 VDDC_17
W9 VDDA18PCIE_6 VDDC_18 T11
I/O for RS880 H9 T15
VDDA18PCIE_7 VDDC_19
T10 VDDA18PCIE_8 VDDC_20 U12
R10 VDDA18PCIE_9 VDDC_21 T14
Y9 VDDA18PCIE_10 VDDC_22 J16
AA9 VDDA18PCIE_11
AB9 AE10 +1.5V_VDD_MEM L15 0_8
VDDA18PCIE_12 VDD_MEM1(NC) +1.5V
25mA AD9 VDDA18PCIE_13 VDD_MEM2(NC) AA11
VDD18 - RS880 I/O +1.8V R128 *0_6/S AE9 Y11 C130 C140 C131 C155 C139
VDDA18PCIE_14 VDD_MEM3(NC) 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 4.7U/6.3V_6
transform U10 VDDA18PCIE_15 VDD_MEM4(NC) AD10
C236
1U/10V_4 +1.8V_VDDG18_NB F9
VDD_MEM5(NC) AB10
AC10
Ra
VDDG18_1(VDD18_1) VDD_MEM6(NC) RS880
G9 VDDG18_2(VDD18_2) +3V_VDDG33
3.3V(0.03A)
25mA AE11 H11 R129 *0_6/S +3V DIS remove L15 ,
R70 *0_6/S +1.8V_VDD18_MEM VDD18_MEM1(NC) VDDG33_1(NC)
+1.8V AD11 H12
VDD18_MEM2(NC) VDDG33_2(NC) C256 C314 VDD33 - 3.3V I/O add Ra as ohm to GND
VDD18_MEM For UMA RS880 only C578 RS880M 0.1U/10V_4 0.1U/10V_4
1U/10V_4 Not applicable to RX780
Not applicable to RX780
memory I/O transform

A A

PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
RS880-POWER5/5
NB5/RD2
Date: Monday, September 28, 2009 Sheet 11 of 46
5 4 3 2 1
5 4 3 2 1

+1.1V_PCIE_VDDR 15

12
+3V_VGA 21,41
+3VS5 5,13,14,15,16,42
+3VPCU 4,6,24,33,35,36,37,38,39,40,41,42,43

U42A

P1
SB800 Part 1 of 5
W2 PCI_CLK0
A_RST# PCIE_RST# PCICLK0 PCI_CLK_TPM T128
R539 33_4 L1 W1

PCI CLKS
10 NB_PLTRST# A_RST# PCICLK1/GPO36 PCI_CLK_TPM 16
PLACE THESE W3 PCI_CLK2
PCICLK2/GPO37 PCI_CLK2 16
9 PCIE_SB_NB_RX0P C423 0.1U/10V_4 A_RX0P_C AD26 W4 PCI_CLK3 PCI_CLK3 16
PCIE AC 9 PCIE_SB_NB_RX0N C424 0.1U/10V_4 A_RX0N_C AD27
A_TX0P PCICLK3/GPO38
Y1 PCI_CLK4
PCI_CLK4 16
C787 0.1U/10V_4 A_RX1P_C A_TX0N PCICLK4/14M_OSC/GPO39
D
COUPLING CAPS 9 PCIE_SB_NB_RX1P
A_RX1N_C
AC28 A_TX1P PCIRST#_L PCIRST# D
9 PCIE_SB_NB_RX1N C788 0.1U/10V_4 AC29 V2 R546 33_4 PCIRST# 36
CLOSE TO U7007 C796 0.1U/10V_4 A_RX2P_C A_TX1N PCIRST#
9 PCIE_SB_NB_RX2P AB29 A_TX2P
C795 0.1U/10V_4 A_RX2N_C AB28
9 PCIE_SB_NB_RX2N A_TX2N
To RS880
C427 0.1U/10V_4 A_RX3P_C AB26 AA1
9 PCIE_SB_NB_RX3P A_TX3P AD0/GPIO0
9 PCIE_SB_NB_RX3N C428 0.1U/10V_4 A_RX3N_C AB27 AA4 C874
A_TX3N AD1/GPIO1
AD2/GPIO2 AA3 150P/50V_4
PCIE_NB_SB_TX0P AE24 AB1
9 PCIE_NB_SB_TX0P A_RX0P AD3/GPIO3
PCIE_NB_SB_TX0N AE23 AA5
9 PCIE_NB_SB_TX0N A_RX0N AD4/GPIO4

PCI EXPRESS INTERFACES


PCIE_NB_SB_TX1P AD25 AB2
9 PCIE_NB_SB_TX1P A_RX1P AD5/GPIO5
PCIE_NB_SB_TX1N AD24 AB6 INT_VGA_EN#
9 PCIE_NB_SB_TX1N A_RX1N AD6/GPIO6 T55
PCIE_NB_SB_TX2P AC24 AB5
9 PCIE_NB_SB_TX2P A_RX2P AD7/GPIO7
PCIE_NB_SB_TX2N AC25 AA6 D16
9 PCIE_NB_SB_TX2N A_RX2N AD8/GPIO8
PCIE_NB_SB_TX3P AB25 AC2 RB500V-40
9 PCIE_NB_SB_TX3P A_RX3P AD9/GPIO9 +AVBAT
PCIE_NB_SB_TX3N AB24 AC3 1 2
9 PCIE_NB_SB_TX3N A_RX3N AD10/GPIO10 +3VPCU
AD11/GPIO11 AC4
R481 590/F_4 PCIE_CALRP_SB AD29 AC1
+1.1V_PCIE_VDDR R480 2.0K/F_4 PCIE_CALRN_SB AD28 PCIE_CALRP AD12/GPIO12
AD1 20MIL R283 499/F_4 +3VRTC_1 R284 10_4 +3VRTC 1 2
PCIE_CALRN AD13/GPIO13
AD14/GPIO14 AD2
+3V D15
AA28 AC6
20MIL 20MIL

+VCCRTC_2
GPP_TX0P AD15/GPIO15 RB500V-40
AA29 GPP_TX0N AD16/GPIO16 AE2
Y29 AE1 C498
GPP_TX1P AD17/GPIO17
Y28 GPP_TX1N AD18/GPIO18 AF8
R544 33_4 A_RST#_R Y26 AE3 1U/10V_4
32 LAN_PLTRST#
34 MINI_PLTRST# R543 33_4 C534 Y27
GPP_TX2P AD19/GPIO19
AF1 20MIL
GPP_TX2N AD20/GPIO20
0.1U/10V_4 W 28 GPP_TX3P AD21/GPIO21 AG1
W 29 AF2 R282
U19 GPP_TX3N AD22/GPIO22 AD23
AD23/GPIO23 AE9 AD23 16
5

TC7SH08FU AA22 AD9 AD24 1K/F_4


GPP_RX0P AD24/GPIO24 AD24 16
2 A_RST# Y21 AC11 AD25 R281 0_4
GPP_RX0N AD25/GPIO25 AD25 16 VDDR_1.05_EN 41
SI A_RST#_R 4 AA25 AF6 AD26

+BAT
C GPP_RX1P AD26/GPIO26 AD26 16 C
1 AA24 AF4 AD27
W 23
GPP_RX1N AD27/GPIO27
AF3
AD27 16 20MIL
Add AND gate for the reset input of GPP_RX2P AD28/GPIO28 SB_MEMHOT#
V24 AH2 T124
3

GPP_RX2N AD29/GPIO29
PCIE devices for AMD recommand W 24 GPP_RX3P AD30/GPIO30 AG2
W 25 GPP_RX3N AD31/GPIO31 AH3 H=4.2 footprint: "BAT-23_2-4_2"

1
PCI INTERFACE
CBE0# AA8 All the PCI bus has
CBE1# AD5
build-in Pull-UP/Down footprint check ok BT1
SBLINK_CLKP R488 INT 0_4 AD8
2,10 SBLINK_CLKP CBE2#
2,10 SBLINK_CLKN
SBLINK_CLKN R485 INT 0_4 AA10 resistors BAT_CONN

2
CBE3#
FRAME# AE8
DEVSEL# AB9
SBSRC_CLKP R203 EXT *0_4 NBCLKP M23 AJ3
2 SBSRC_CLKP PCIE_RCLKP/NB_LNK_CLKP IRDY#
SBSRC_CLKN R197 EXT *0_4 NBCLKN P23 AE7
2 SBSRC_CLKN PCIE_RCLKN/NB_LNK_CLKN TRDY#
PAR AC5
NB_REFCLK_P R209 INT 0_4 NB_REFCLK_P_INT U29 AF5
10 NB_REFCLK_P NB_DISP_CLKP STOP#
NB_REFCLK_N R210 INT 0_4 NB_REFCLK_N_INT U28 AE6 RTC_X1
10 NB_REFCLK_N NB_DISP_CLKN PERR#
AE4 SERR#
SERR# SERR# 36 Y8
NBHT_REFCLKP R257 INT 0_4 NBHT_REFCLKP_INT T26 AE11
2,10 NBHT_REFCLKP NB_HT_CLKP REQ0#
NBHT_REFCLKN R256 INT 0_4 NBHT_REFCLKN_INT T27 AH5 PX_EN# 3 2
2,10 NBHT_REFCLKN NB_HT_CLKN REQ1#/GPIO40 T122
REQ2#/CLK_REQ8#/GPIO41 AH4
CPUCLKP R260 INT 0_4 CPUCLKP_INT V21 AC12
2,3 CPUCLKP CPU_HT_CLKP REQ3#/CLK_REQ5#/GPIO42 T49
CPUCLKN R259 INT 0_4 CPUCLKN_INT T21 AD12
2,3 CPUCLKN CPU_HT_CLKN GNT0# RTC_X2
GNT1#/GPO44 AJ5 4 1
EXT_GFX_CLKP R215 INT 0_4 EXT_GFX_CLKP_INT V23 AH6 VGA_ON_SB R555
2,17 EXT_GFX_CLKP SLT_GFX_CLKP GNT2#/GPO45 VGA_ON_SB 36
EXT_GFX_CLKN R214 INT 0_4 EXT_GFX_CLKN_INT T23 AB12
2,17 EXT_GFX_CLKN SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46 CLKRUN# T48 32.768KHZ
CLKRUN# AB11 CLKRUN# 36
PCIE_MINI1_CLKP R192 INT 0_4PCIE_MINI1_CLKP_INT L29 AD7 *20M_6 R536 20M_6
2,34 PCIE_MINI1_CLKP GPP_CLK0P LOCK# T50
PCIE_MINI1_CLKN R193 INT 0_4PCIE_MINI1_CLKN_INT L28
2,34 PCIE_MINI1_CLKN GPP_CLK0N
INTE#/GPIO32 AJ6
N29 AG6 C866 C865
B GPP_CLK1P INTF#/GPIO33 INTG# B
N28 GPP_CLK1N INTG#/GPIO34 AG4 INTG# 30 22P/50V_4 22P/50V_4
AJ4 VGA_RSTB
INTH#/GPIO35
M29 GPP_CLK2P
M28 GPP_CLK2N
CLOCK GENERATOR

LPC_CLK0 16
PCIE_LAN_CLKP R213 INT 0_4PCIE_LAN_CLKP_INT T25
2,32 PCIE_LAN_CLKP GPP_CLK3P LPC_CLK1 16
PCIE_LAN_CLKN R212 INT 0_4PCIE_LAN_CLKN_INT V25 H24 LPC_CLK0 R225 22_4
2,32 PCIE_LAN_CLKN GPP_CLK3N LPCCLK0 PCLK_LPC_DEBUG 34
H25 LPC_CLK1 R477 22_4
LPCCLK1 PCLK_LPC_KB3920 36
L24 J27 LAD0
GPP_CLK4P LAD0 LAD0 34,36
L23 J26 LAD1 C794
GPP_CLK4N LAD1 LAD1 34,36
H29 LAD2 C437
LPC

LAD2 LAD2 34,36


P25 H28 LAD3 5.6P/50V_6 22P/50V_4
GPP_CLK5P LAD3 LFRAME# LAD3 34,36
M25 GPP_CLK5N LFRAME# G28 LFRAME# 34,36
+3V_VGA J25 LDRQ0#_SB
LDRQ0# T37
P29 GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49 AA18
P28 AB19 SERIRQ
GPP_CLK6N SERIRQ/GPIO48 SERIRQ 36
R292 N26 R231 10K/F_4 +3VS5
GPP_CLK7P
SI Change from VGA_RSTA to A_RST#_R N27 GPP_CLK7N
10K/F_4 G21 ALLOW_LDTSTOP
ALLOW _LDTSTP/DMA_ACTIVE# CPU_PROCHOT_R# ALLOW_LDTSTOP 10
T29 GPP_CLK8P PROCHOT# H21 CPU_PROCHOT_R# 3
SI T28 K19 CPU_PWRGD +AVBAT
CPU

GPP_CLK8N LDT_PG CPU_PWRGD 3 +AVBAT


17 PCIE_RST# 2 1 R561 33_4 A_RST#_R G22 CPU_LDT_STOP# CPU_LDT_STOP# 3,10
D18 LDT_STP# CPU_LDT_RST#
LDT_RST# J24 CPU_LDT_RST# 3 20MIL

1
RB501V-40 L25 G2
T95 14M_25M_48M_OSC
2 1 R290 33_4 VGA_RSTB *SHORT_ PAD1 C871
D19 C1 RTC_X1 0.1U/10V_4
RB501V-40 32K_X1
RTC_CLK 16

2
C790 22P/50V_4 R484 0_4 25M_X1 L26 C2 RTC_X2
25M_X1 32K_X2
RTC
1

A D2 RTC_CLK A
Y5 R479 RTCCLK INTRUDER_ALERT# R568 *1M/F_4
INTRUDER_ALERT# B2 +AVBAT
25M_X2 L27 B1 +AVBAT
25MHZ 1M/F_4 25M_X2 VDDBT_RTC_G
2

C792 22P/50V_4 SB800 A11


PROJECT : LX89
INTRUDER_ALERT# Left not connected (Southbridge
Quanta Computer Inc.
has 50-kohm internal pull-up to VBAT).
Size Document Number Rev
Custom 1A
SB820-PCIE/PCI/CPU/LPC 1/4
NB5/RD2
Date: Monday, September 28, 2009 Sheet 12 of 46
5 4 3 2 1
5 4 3 2 1

+3VS5
NC,no install by default
R557

R558
*2.2K_4

*2.2K_4
SB_TEST0

SB_TEST1
14 MEM_GEVEN#
T130
MEM_GEVEN#
RI#
SPI_CS3#
J2
K1
U42D
PCI_PME#/GEVENT4#
RI#/GEVENT22#
USBCLK/14M_25M_48M_OSC A10 CLK_48M_USB

USB_RCOMP_SB R238
CLK_48M_USB 2
11.8K/F_6
CLK_48M_USB

C844
13
T125 D3 SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP G19
SUSB# F1 *2.2P/50V_4
SB_TEST2 36 SUSB# SUSC# SLP_S3#
R280 *2.2K_4 H1

ACPI / WAKE UP EVENTS


36 SUSC# SLP_S5#
DNBSWON# F2

USB 1.1 USB MISC


36 DNBSWON# PW R_BTN#
SB_PWRGD_IN H5 for EMI
16 SB_PWRGD_IN
SUS_STAT# G6
PW R_GOOD SB800 J10
10 SUS_STAT# SUS_STAT# USB_FSD1P/GPIO186 USBP15+ 33
SB_TEST0 B3 Part 4 of 5 H11 BLUETOOTH
D +3V SCL0/SDATA0 SB_TEST1 TEST0 USB_FSD1N USBP15- 33 D
is 3V tolerance Clock gen/Robson/TV C4 TEST1/TMS
AMD datasheet define it tuner SB_TEST2 F6 H9
GATEA20 TEST2 USB_FSD0P/GPIO185 USBP14+ 33
/DDR2/DDR2 36 GATEA20 AD21 GA20IN/GEVENT0# USB_FSD0N J8 USBP14- 33 Finger Print
R223 2.2K_4 PCLK_SMB RCIN# AE21
thermal/Accelerometer 36 RCIN# KBRST#/GEVENT1#
T126 K2 LPC_PME#/GEVENT3# USB_HSD13P B12 T121
R227 2.2K_4 PDAT_SMB KBSMI# J29 A12
36 KBSMI# LPC_SMI#/GEVENT23# USB_HSD13N T120
SCI# H2
36 SCI# GEVENT5#
SYS_RST# J1 F11
T127 SYS_RESET#/GEVENT19# USB_HSD12P USBP12+ 33
32,34 PCIE_WAKE# H6 W AKE#/GEVENT8# USB_HSD12N E11 USBP12- 33 USB Connector 15.6"
F3 IR_RX1/GEVENT20#
CPU_THERMTRIP# J6 E14
3 CPU_THERMTRIP# THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD11P USBP11+ 28
WD_PWRGD AC19 E12 Card reader
16 WD_PWRGD NB_PW RGD USB_HSD11N USBP11- 28
C497 RSMRST# G1 J12
36 RSMRST# RSMRST# USB_HSD10P USBP10+ 34
+3VS5
100P/50V_4
USB_HSD10N J14 USBP10- 34 WLAN Min-Card
SCL1/SDATA1 is 3V/S5 tolerance T42 AD19 CLK_REQ4#/SATA_IS0#/GPIO64
AMD datasheet define it T47 AA16 CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD9P A13 T118
R234 *0_4 LAN_DISABLE#_SB AB21 B13
32,36 LAN_DISABLE# SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD9N T119
R279 2.2K_4 SB_SMBCLK1 AC18
T44 CLK_REQ0#/SATA_IS3#/GPIO60
R278 2.2K_4 SB_SMBDATA1 AF20 D13
33 ACCLED_EN SATA_IS4#/FANOUT3/GPIO55 USB_HSD8P
T43 AE19 SATA_IS5#/FANIN3/GPIO59 USB_HSD8N C13
ACZ_SPKR AF19
29 ACZ_SPKR SPKR/GPIO66
remove pull hi PCLK_SMB AD22 G12

USB 2.0
2,6,7,30,34 PCLK_SMB SCL0/GPIO43 USB_HSD7P USBP7+ 34
( chip internal PDAT_SMB AE22 G14 USB Connector
2,6,7,30,34 PDAT_SMB SDA0/GPIO47 USB_HSD7N USBP7- 34
SB_SMBCLK1 F5
have pull hi ) SB_SMBDATA1 SCL1/GPIO227
F4 SDA1/GPIO228 USB_HSD6P G16 USBP6+ 33
T113 AH21 CLK_REQ2#/FANIN4/GPIO62 USB_HSD6N G18 USBP6- 33 USB Connector 17.3" and 15"6 co-layout
T45 AB18 CLK_REQ1#/FANOUT4/GPIO61
+3VS5 SCL2/SDATA2 is 3V/S5 tolerance

GPIO
T129 E1 IR_LED#/LLB#/GPIO184 USB_HSD5P D16 USBP5+ 33
AMD datasheet define it T114 AJ21 SMARTVOLT2/SHUTDOW N#/GPIO51 USB_HSD5N C16 USBP5- 33 USB Connector 17.3"
C H4 C
8 SP_DDR3_RST# DDR3_RST#/GEVENT7#
R483 2.2K_4 SB_SCLK2 D5 B14
T54 GBE_LED0/GPIO183 USB_HSD4P T117
R482 2.2K_4 SB_SDATA2 D7 A14
T51 GBE_LED1/GEVENT9# USB_HSD4N T116
T53 G5 GBE_LED2/GEVENT10#
+3VS5 K3 E18
T52 GBE_STAT0/GEVENT11# USB_HSD3P
EXT_SB_OSC AA20 E16
2 EXT_SB_OSC CLK_REQG#/GPIO65/OSCIN USB_HSD3N
R535 2.2K_4 DNBSWON#
USB_HSD2P J16 USBP2+ 24
+3V H3 J18 Camera USB
BLINK/USB_OC7#/GEVENT18# USB_HSD2N USBP2- 24
D1 USB_OC6#/IR_TX1/GEVENT6#
R277 4.7K_4 SUS_STAT# R554 *0_4 SMBALERT#_1 E4 B17

USB OC
5 PM_THERM# USB_OC5#/IR_TX0/GEVENT17# USB_HSD1P USBP1+ 24
+3VS5 R556 10K/F_4 D4 USB_OC4#/IR_RX0/GEVENT16# USB_HSD1N A17 USBP1- 24 Digitizer Connector
SB_JTAG_TDO E8
SB_JTAG_TCK USB_OC3#/AC_PRES/TDO/GEVENT15#
F7 USB_OC2#/TCK/GEVENT14# USB_HSD0P A16 USBP0+ 34
SB_JTAG_TDI E7 B16 USB & ESATA Combo Connector
USB_OC1#/TDI/GEVENT13# USB_HSD0N USBP0- 34
SB_JTAG_RST# F8 USB_OC0#/TRST#/GEVENT12#

R276 *10K/F_4 ACZ_BCLK M3 D25 SB_SCLK2


ACZ_SDOUT AZ_BITCLK SCL2/GPIO193 SB_SDATA2
16 ACZ_SDOUT N1 AZ_SDOUT SDA2/GPIO194 F23
R538 *10K/F_4 ACZ_SDIN0 L2 B26 SB_SCLK3

HD AUDIO
ACZ_SDIN1 AZ_SDIN0/GPIO167 SCL3_LV/GPIO195 5159_RST_R# T36
HD audio R541 *10K/F_4 M2 E26
To Azalia interface is R562
R540
*10K/F_4
*10K/F_4
ACZ_SDIN2_R
ACZ_SDIN3_R
M1
M4
AZ_SDIN1/GPIO168
AZ_SDIN2/GPIO169
SDA3_LV/GPIO196
EC_PW M0/EC_TIMER0/GPIO197 F25
E22
5159_RST_R# 28

ACZ_SDOUT R563 33_4 3.3S5 voltage ACZ_SYNC AZ_SDIN3/GPIO170 EC_PW M1/EC_TIMER1/GPIO198 SB_GPIO199
ACZ_SDOUT_AUDIO 29 N2 AZ_SYNC EC_PW M2/EC_TIMER2/GPIO199 F22 SB_GPIO199 16
ACZ_RST# P2 E21 SB_GPIO200 SPI/LPC define
AZ_RST# EC_PW M3/EC_TIMER3/GPIO200 SB_GPIO200 16
C873 *10P/50V_4
KSI_0/GPIO201 G24
T1 GBE_COL KSI_1/GPIO202 G25
B ACZ_SYNC R542 33_4 T4 E28 B
ACZ_SYNC_AUDIO 29 GBE_CRS KSI_2/GPIO203
L6 GBE_MDCK KSI_3/GPIO204 E29
C504 *10P/50V_4 L5 D29
GBE_MDIO KSI_4/GPIO205
T9 GBE_RXCLK KSI_5/GPIO206 D28
U1 GBE_RXD3 KSI_6/GPIO207 C29
ACZ_BCLK R275 33_4 U3 C28
BIT_CLK_AUDIO 29 GBE_RXD2 KSI_7/GPIO208
T2

GBE LAN
C496 10P/50V_4 GBE_RXD1
U2 GBE_RXD0 KSO_0/GPIO209 B28

EMBEDDED CTRL
T5 GBE_RXCTL/RXDV KSO_1/GPIO210 A27
V5 GBE_RXERR KSO_2/GPIO211 B27
ACZ_RST# R566 33_4 P5 D26
ACZ_RST#_AUDIO 29 GBE_TXCLK KSO_3/GPIO212
M5 GBE_TXD3 KSO_4/GPIO213 A26
P9 GBE_TXD2 KSO_5/GPIO214 C26
ACZ_SDIN0 T7 A24
ACZ_SDIN0 29 GBE_TXD1 KSO_6/GPIO215
P7 GBE_TXD0 KSO_7/GPIO216 B25
M7 GBE_TXCTL/TXEN KSO_8/GPIO217 A25
P4 GBE_PHY_PD KSO_9/GPIO218 D24
M9 GBE_PHY_RST# KSO_10/GPIO219 B24
V7 GBE_PHY_INTR KSO_11/GPIO220 C24
KSO_12/GPIO221 B23
T39 E23 PS2_DAT/SDA4/GPIO187 KSO_13/GPIO222 A23

EMBEDDED CTRL
T96 E24 PS2_CLK/SCL4/GPIO188 KSO_14/GPIO223 D22
+3VSUS 28,33,34,35,41,42 F21 SPI_CS2#/GBE_STAT2/GPIO166 KSO_15/GPIO224 C22
+3V 2,3,5,6,7,10,11,12,14,15,16,24,25,26,27,28,29,30,31,32,33,34,35,36,42 T97 G29 FC_RST#/GPO160 KSO_16/GPIO225 A22
+3VS5 5,12,14,15,16,42 KSO_17/GPIO226 B22
D27 PS2KB_DAT/GPIO189
F28 PS2KB_CLK/GPIO190
F29 PS2M_DAT/GPIO191
+3VSUS E27
C877 PS2M_CLK/GPIO192
A CN32 A
10P/50V_4
SB800 A11
1 SB_JTAG_TCK
2 SB_JTAG_TDO
3 SB_JTAG_TDI
SB JTAG 4
5
SB_TEST1
6 SB_JTAG_RST# PROJECT : LX89
7
8 Quanta Computer Inc.
*S/W JTAG DEBUG Size Document Number Rev
Custom 1A
SB820-ACPI/GPIO/USB 2/4
NB5/RD2
Date: Monday, September 28, 2009 Sheet 13 of 46
5 4 3 2 1
5 4 3 2 1

SATA PORT 0,1,2,3


can support AHCI
mode
PLACE SATA AC COUPLING
CAPS CLOSE TO SB820 U42B
IF THERE IS NO IDE, TEST
POINTS FOR DEBUG BUS
+1.1V_AVDD_SATA 15
14
IS MANDATORY +3V 2,3,5,6,7,10,11,12,13,15,16,24,25,26,27,28,29,30,31,32,33,34,35,36,42
C843 0.01U/16V_4 SATA_TXP0_C AH9
SB800 AH28
+3VS5 5,12,13,15,16,42
33 SATA_TXP0 SATA_TX0P FC_CLK T93
C840 0.01U/16V_4 SATA_TXN0_C AJ9 Part 2 of 5 AG28
33 SATA_TXN0 SATA_TX0N FC_FBCLKOUT T92
AF26
SATA1 HDD C845 0.01U/16V_4 SATA_RXN0_C AJ8
FC_FBCLKIN T94
D 33 SATA_RXN0 SATA_RXP0_C SATA_RX0N D
C846 0.01U/16V_4 AH8 AF28
33 SATA_RXP0 SATA_RX0P FC_OE#/GPIOD145 T90
C832 0.01U/16V_4 SATA_TXP1_C AH10
FC_AVD#/GPIOD146 AG29
AG26
T89 IF USE,power need ready
33 SATA_TXP1 SATA_TX1P FC_W E#/GPIOD148 T100
C836 0.01U/16V_4 SATA_TXN1_C AJ10 AF27
33 SATA_TXN1 SATA_TX1N FC_CE1#/GPIOD149 T88
AE29
SATA ODD C486 0.01U/16V_4 SATA_RXN1_C AG10
FC_CE2#/GPIOD150
AF29
T91
33 SATA_RXN1 SATA_RX1N FC_INT1/GPIOD144 T87
C490 0.01U/16V_4 SATA_RXP1_C AF10 AH27
33 SATA_RXP1 SATA_RX1P FC_INT2/GPIOD147 T99
C479 0.01U/16V_4 SATA_TXP2_C AG12 AJ27 SIDE_PORT_ID2 SIDE_PORT_ID1 SIDE_PORT_ID0
33 SATA_TXP2 SATA_TX2P FC_ADQ0/GPIOD128 T98
C484 0.01U/16V_4 SATA_TXN2_C AF12 AJ26
33 SATA_TXN2 SATA_TX2N FC_ADQ1/GPIOD129 T101
AH25
SATA2 HDD C829 0.01U/16V_4 SATA_RXN2_C AJ12
FC_ADQ2/GPIOD130
AH24
T103
0 0 0 Samsung
33 SATA_RXN2 SATA_RX2N FC_ADQ3/GPIOD131 T107
C826 0.01U/16V_4 SATA_RXP2_C AH12 AG23
33 SATA_RXP2 SATA_RX2P FC_ADQ4/GPIOD132 T110
FC_ADQ5/GPIOD133 AH23 T109
34 SATA_TXP3 AH14 SATA_TX3P FC_ADQ6/GPIOD134 AJ22 T111
34 SATA_TXN3 AJ14 SATA_TX3N FC_ADQ7/GPIOD135 AG21 T115 0 0 1 Hynix
AF21
E-SATA C466 0.01U/16V_4 SATA_RXN3_C AG14
FC_ADQ8/GPIOD136
AH22
T40
34 SATA_RXN3 SATA_RX3N FC_ADQ9/GPIOD137 T112

FLASH
C463 0.01U/16V_4 SATA_RXP3_C AF14 AJ23
34 SATA_RXP3 SATA_RX3P FC_ADQ10/GPIOD138 T108
FC_ADQ11/GPIOD139 AF23 T35 0 1 0 NC
AG17 SATA_TX4P FC_ADQ12/GPIOD140 AJ24 T106
AF17 SATA_TX4N FC_ADQ13/GPIOD141 AJ25 T104
FC_ADQ14/GPIOD142 AG25 T105
XTLVDD_SATA-- SATA AJ17 SATA_RX4N FC_ADQ15/GPIOD143 AH26 T102 0 1 1 no supprot side port

SERIAL ATA
crystal power AH17 SATA_RX4P
AJ18 SATA_TX5P
PLVDD_SATA-- AH18 W5 RF_OFF#
SATA_TX5N FANOUT0/GPIO52 RF_OFF# 34
SATA PLL W6 BT_OFF#
FANOUT1/GPIO53 BT_OFF# 33
PLACE SATA_CAL AH19 Y9 R545 0_4
C POWER SATA_RX5N FANOUT2/GPIO54 BT_COMBO_EN# 34 C
AJ19
RES VERY CLOSE SATA_RX5P
W7 DGT_STOP# 24
FANIN0/GPIO56
TO BALL OF SB820 FANIN1/GPIO57 V9
DGT_RESET 24
R251 1K/F_4 SATA_CALRP AB14 W8
SATA_CALRP FANIN2/GPIO58 LCD_BK 24
R241 931/F_4 SATA_CALRN AA14
NOTE: +1.1V_AVDD_SATA SATA_CALRN
B6 TEMPIN0
TEMPIN0/GPIO171 T123
R361 IS 1K 1% FOR 25MHz A6 R550 *10K/F_4 SIDE_PORT_ID0 R551 *10K/F_4
TEMPIN1/GPIO172 +3VS5
SB_SATA_LED# AD11 A5
XTAL, 4.99K 1% FOR 100MHz SATA_ACT#/GPIO67 TEMPIN2/GPIO173
B5 R523 10K/F_4
TEMPIN3/TALERT#/GPIO174 +3VS5
INTERNAL CLOCK +3V R271 10K/F_4 C7 +3VS5 R533 *10K/F_4 SIDE_PORT_ID1 R534 *10K/F_4
TEMP_COMM
A3 SIDE_PORT_ID0

HW MONITOR
C820 22P/50V_4 SATA_X1 VIN0/GPIO175 SIDE_PORT_ID1 R529 *10K/F_4 SIDE_PORT_ID2 R530 *10K/F_4
AD16 SATA_X1 VIN1/GPIO176 B4 +3VS5
A4 SIDE_PORT_ID2
VIN2/GPIO177
2

Y6 C5 BOARD_ID0
R491 VIN3/GPIO178 BOARD_ID1
VIN4/GPIO179 A7
*25MHZ B7 BOARD_ID2
1M/F_4 VIN5/GPIO180 BOARD_ID3 R525 *10K/F_4 BOARD_ID0 R526 *10K/F_4
B8 +3VS5
1

C812 22P/50V_4 SATA_X2 VIN6/GBE_STAT3/GPIO181 BOARD_ID4


AC16 SATA_X2 VIN7/GBE_LED3/GPIO182 A8

SI R518 *10K/F_4 BOARD_ID1 R519 *10K/F_4


Remove Y6 for AMD recommand
J5 G27 R514 *10K/F_4 BOARD_ID2 R515 *10K/F_4
SPI_DI/GPIO164 NC1
E2 Y2

SPI ROM
SPI_DO/GPIO163 NC2
K4 SPI_CLK/GPIO162
K9 R505 *10K/F_4 BOARD_ID3 R506 *10K/F_4
ROM_RST# SPI_CS1#/GPIO165
T131 G2 ROM_RST#/GPIO161
R508 *10K/F_4 BOARD_ID4 R509 *10K/F_4
B SB800 A11 B

ID4 ID3 ID2 ID1 ID0


+3V

0 0 0 0 0 LX8 UMA

C495 0 0 0 0 1 LX9 UMA


0.1U/10V_4

U13 0 0 0 1 0 LX8 Madison


5

TC7SH08FU
2 SB_SATA_LED#
33 SATA_LED# 4 0 0 0 1 1 LX8 Park
1

0 0 1 0 0 LX9 Park
3

0 0 1 0 1
+1.5VSUS
+1.5VSUS R263 2.2K_4
0 0 1 1 0
R255
2

Q19 2.2K_4
MMBT3904 0 0 1 1 1
A 3 1 A
MEM_MA_EVENT# 6
R273 2.2K_4
R267
2.2K_4
2

Q20

3 1
MMBT3904
PROJECT : LX89
13 MEM_GEVEN# MEM_MB_EVENT# 7
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
SB820-ACPI/GPIO/USB 2/4
NB5/RD2
Date: Monday, September 28, 2009 Sheet 14 of 46
5 4 3 2 1
5 4 3 2 1

+3.3V_SB_R
PLACE ALL THE DECOUPLING CAPS ON
THIS SHEET CLOSE TO SB AS POSSIBLE.
U42C
VDD-- S/B CORE power

+1.1V_VCC_SB_R
15
VDDQ--3.3V I/O power 131mA SB800 Part 3 of 5 510mA
+3V R560 0_8 AH1 N13 R288 0_8 +1.1V U42E
VDDIO_33_PCIGP_1 VDDCR_11_1
V6 VDDIO_33_PCIGP_2 VDDCR_11_2 R15
Y19 N17 SB800

CORE S0
C863 C492 C485 C460 VDDIO_33_PCIGP_3 VDDCR_11_3 C452 C473 C480 C476 C499
AE5 VDDIO_33_PCIGP_4 VDDCR_11_4 U13 Y14 VSSIO_SATA_1 VSS_1 AJ2
D 22U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 AC21 U17 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_8 Y16 A28 D
VDDIO_33_PCIGP_5 VDDCR_11_5 VSSIO_SATA_2 VSS_2
AA2 V12 AB16 A2

PCI/GPIO I/O
VDDIO_33_PCIGP_6 VDDCR_11_6 VSSIO_SATA_3 VSS_3
AB4 VDDIO_33_PCIGP_7 VDDCR_11_7 V18 AC14 VSSIO_SATA_4 VSS_4 E5
AC8 VDDIO_33_PCIGP_8 VDDCR_11_8 W 12 CKVDD_1.1V-- AE12 VSSIO_SATA_5 VSS_5 D23
AA7 VDDIO_33_PCIGP_9 VDDCR_11_9 W 18 Internal clock AE14 VSSIO_SATA_6 VSS_6 E25
AA9 +1.1V_CKVDD AF9 E6
VDDIO_33_PCIGP_10 Generator I/O VSSIO_SATA_7 VSS_7
AF7 VDDIO_33_PCIGP_11 TBDmA power
AF11 VSSIO_SATA_8 VSS_8 F24
1.8V : FLASH MEMORY MODE(DEFAULT) AA19 K28 BLM18PG181SN1D(180,1.5A)_6 AF13 N15
VDDIO_33_PCIGP_12 VDDAN_11_CLK_1 L39 VSSIO_SATA_9 VSS_9
VDD33_18--3.3V IDE I/O power K29 +1.1V AF16 R13
3.3V: IDE MODE 71mA
VDDAN_11_CLK_2
J28 AG8
VSSIO_SATA_10 VSS_10
R17
1.8V flash memory I/O power VDDAN_11_CLK_3 VSSIO_SATA_11 VSS_11
R218 0_8 VDDIO_18_FC K26 AH7 T10

CLKGEN I/O
VDDAN_11_CLK_4 C444 C441 C433 C439 C432 VSSIO_SATA_12 VSS_12
VDDAN_11_CLK_5 J21 AH11 VSSIO_SATA_13 VSS_13 P10
AF22 J20 1U/10V_4 1U/10V_4 0.1U/10V_4 0.1U/10V_4 22U/6.3V_8 AH13 V11

FLASH I/O
VDDIO_18_FC_1 VDDAN_11_CLK_6 VSSIO_SATA_14 VSS_14
AE25 VDDIO_18_FC_2 VDDAN_11_CLK_7 K21 AH16 VSSIO_SATA_15 VSS_15 U15
AMD recommand remove +1.8v AF24 VDDIO_18_FC_3 VDDAN_11_CLK_8 J22 AJ7 VSSIO_SATA_16 VSS_16 M18
AC22 VDDIO_18_FC_4 AJ11 VSSIO_SATA_17 VSS_17 V19
AJ13 VSSIO_SATA_18 VSS_18 M11
VDDRF_GBE_S V1 AJ16 VSSIO_SATA_19 VSS_19 L12
L74 L18
+3V
POWER VDDIO_33_GBE_S M10 A9 VSSIO_USB_1
VSS_20
VSS_21 J7
BLM18PG181SN1D(180,1.5A)_6 43mA B10 P3
C789 C797 VDDPL_3.3V_PCIE VSSIO_USB_2 VSS_22
AE28 K11 V4

GBE LAN
2.2U/6.3V_4 *0.1U/10V_4 VDDPL_33_PCIE VSSIO_USB_3 VSS_23
B9 VSSIO_USB_4 VSS_24 AD6
D10 AD4

PCI EXPRESS
+1.1V_PCIE_VDDR VSSIO_USB_5 VSS_25
U26 VDDAN_11_PCIE_1 VDDCR_11_GBE_S_1 L7 D12 VSSIO_USB_6 VSS_26 AB7
V22 VDDAN_11_PCIE_2 VDDCR_11_GBE_S_2 L9 D14 VSSIO_USB_7 VSS_27 AC9
PCIE_VDDR--PCIE I/O power 600mA V26 VDDAN_11_PCIE_3 D17 VSSIO_USB_8 VSS_28 V8
+1.1V L73 V27 E9 W9
VDDAN_11_PCIE_4 VSSIO_USB_9 VSS_29
V28 VDDAN_11_PCIE_5 VDDIO_GBE_S_1 M6 F9 VSSIO_USB_10 VSS_30 W 10
BLM18PG181SN1D(180,1.5A)_6 V29 P8 F12 AJ28
C C786 C782 C791 C798 C799 VDDAN_11_PCIE_6 VDDIO_GBE_S_2 VSSIO_USB_11 VSS_31 C
W 22 VDDAN_11_PCIE_7 F14 VSSIO_USB_12 VSS_32 B29
10U/6.3V_8 10U/6.3V_8 1U/10V_4 0.1U/10V_4 0.1U/10V_4 W 26 F16 U4
VDDAN_11_PCIE_8 VSSIO_USB_13 VSS_33
C9 VSSIO_USB_14 VSS_34 Y18
G11 VSSIO_USB_15 VSS_35 Y10
+3VALW_R S5_3.3--3.3v standby power
93mA

GROUND
F18 VSSIO_USB_16 VSS_36 Y12
+3V L47 VDDPL_3.3V_SATA AD14 32mA D9 Y11
VDDPL_33_SATA R486 0_6 VSSIO_USB_17 VSS_37
VDDIO_33_S_1 A21 +3VS5 H12 VSSIO_USB_18 VSS_38 AA11
BLM18PG181SN1D(180,1.5A)_6 AJ20 D21 H14 AA12
C471 C472 VDDAN_11_SATA_1 VDDIO_33_S_2 VSSIO_USB_19 VSS_39

SERIAL ATA
AF18 VDDAN_11_SATA_4 VDDIO_33_S_3 B21 H16 VSSIO_USB_20 VSS_40 G4
2.2U/6.3V_4 *0.1U/10V_4 AH20 K10 C802 C800 C801 H18 J4

3.3V_S5 I/O
+1.1V_AVDD_SATA VDDAN_11_SATA_2 VDDIO_33_S_4 *0.1U/10V_4 2.2U/6.3V_6 2.2U/6.3V_6 VSSIO_USB_21 VSS_41
AG19 VDDAN_11_SATA_3 VDDIO_33_S_5 L10 J11 VSSIO_USB_22 VSS_42 G8
AE18 VDDAN_11_SATA_5 VDDIO_33_S_6 J9 J19 VSSIO_USB_23 VSS_43 G9
AVDD_SATA--SATA phy power 567mA AD18 VDDAN_11_SATA_6 VDDIO_33_S_7 T6 K12 VSSIO_USB_24 VSS_44 M12
+1.1V L40 AE16 T8 K14 AF25
VDDAN_11_SATA_7 VDDIO_33_S_8 VSSIO_USB_25 VSS_45
K16 VSSIO_USB_26 VSS_46 H7
BLM18PG181SN1D(180,1.5A)_6 S5_1.1V--1.1V standby power K18 AH29
C449 C457 C461 C458 C459 VSSIO_USB_27 VSS_47
113mA H19 V10

CORE S5
10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 VDDCR_1.1V R220 0_6 VSSIO_USB_28 VSS_48
VDDCR_11_S_1 F26 +1.1VS5 VSS_49 P6
A18 VDDAN_33_USB_S_1 VDDCR_11_S_2 G26 VSS_50 N4
A19 VDDAN_33_USB_S_2 TBDmA Y4 EFUSE VSS_51 L4
For support USB A20 M8 +VDDIO_AZ C435 C438 L8
+3V_AVDD_USB VDDAN_33_USB_S_3 VDDIO_AZ_S 1U/10V_4 1U/10V_4 VSS_52
wakeup-->3V_S5 AVDDTX--USB Phy B18 VDDAN_33_USB_S_4 D8 VSSAN_HW M
Analog I/O power B19 A11 VDDCR_1.1V_USB
VDDAN_33_USB_S_5 VDDCR_11_USB_S_1
658mA B20 B11 M19 M20

USB I/O
L75 VDDAN_33_USB_S_6 VDDCR_11_USB_S_2 VSSXL VSSPL_SYS
+3VS5 C18 VDDAN_33_USB_S_7
C20 197mA BLM18PG181SN1D(180,1.5A)_6
BLM18PG181SN1D(180,1.5A)_6 VDDAN_33_USB_S_8 L77
D18 VDDAN_33_USB_S_9 VDDPL_33_SYS M21 +VDDPL_3.3V 47mA +1.1VS5 P21 VSSIO_PCIECLK_1 VSSIO_PCIECLK_14 H23
C815 C814 C810 C811 D19 P20 H26
10U/6.3V_8 10U/6.3V_8 1U/10V_4 1U/10V_4 VDDAN_33_USB_S_10 VSSIO_PCIECLK_2 VSSIO_PCIECLK_15
D20 VDDAN_33_USB_S_11 VDDPL_11_SYS_S L22 +VDDPL_1.1V 62mA M22 VSSIO_PCIECLK_3 VSSIO_PCIECLK_16 AA21
E19 C839 C841 C842 M24 AA23

PLL
B VDDAN_33_USB_S_12 10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 VSSIO_PCIECLK_4 VSSIO_PCIECLK_17 B
VDDPL_33_USB_S F19 +VDDPL_3.3V_USB 17mA M26 VSSIO_PCIECLK_5 VSSIO_PCIECLK_18 AB23
P22 VSSIO_PCIECLK_6 VSSIO_PCIECLK_19 AD23

VDDAN_1.1V_USB
TBDmA C11 VDDAN_11_USB_S_1 VDDAN_33_HW M_S D6 +VDDAN_3.3VHWM 5mA P24 VSSIO_PCIECLK_7 VSSIO_PCIECLK_20 AA26
+1.1VS5 L48 D11 P26 AC26
VDDAN_11_USB_S_2 VDDXL_3.3V VSSIO_PCIECLK_8 VSSIO_PCIECLK_21
VDDXL_33_S L20 T20 VSSIO_PCIECLK_9 VSSIO_PCIECLK_22 Y20
BLM18PG181SN1D(180,1.5A)_6 32mA BLM18PG181SN1D(180,1.5A)_6 T22 W 21
C478 C477 L44 VSSIO_PCIECLK_10 VSSIO_PCIECLK_23
+3V T24 VSSIO_PCIECLK_11 VSSIO_PCIECLK_24 W 20
2.2U/6.3V_4 0.1U/10V_4 SB800 A11 V20 AE26
VSSIO_PCIECLK_12 VSSIO_PCIECLK_25
J23 VSSIO_PCIECLK_13 VSSIO_PCIECLK_26 L21
C454 C475 K20
*0.1U/10V_4 2.2U/6.3V_6 VSSIO_PCIECLK_27
Part 5 of 5
SB800 A11

+3V +VDDPL_3.3V +1.1V +VDDPL_1.1V

L43 L42
+VDDIO_AZ +1.8V 5,8,10,11,16,26,42
BLM18PG181SN1D(180,1.5A)_6 BLM18PG181SN1D(180,1.5A)_6
+3V 2,3,5,6,7,10,11,12,13,14,16,24,25,26,27,28,29,30,31,32,33,34,35,36,42
+1.1V 2,3,8,9,10,11,38
C462 C447 C456 C450
+3VS5 5,12,13,14,16,42
+3VS5 R572 0_4 2.2U/6.3V_6 *0.1U/10V_4 2.2U/6.3V_6 *0.1U/10V_4
+1.1VS5 38

C488
2.2U/6.3V_6
A +3VS5 +VDDAN_3.3VHWM +3VS5 SI +VDDPL_3.3V_USB A

L51 *0_6/S

C487 Del L45 for AMD recommand


C464
2.2U/6.3V_6
C453
0.1U/10V_4
PROJECT : LX89
0.1U/10V_4 Quanta Computer Inc.
Size Document Number Rev
Custom 1A
SB820-PWR/DECOUPLING 4/4
NB5/RD2
Date: Monday, September 28, 2009 Sheet 15 of 46
5 4 3 2 1
5 4 3 2 1

16
intermal have pull
OVERLAP COMMON PADS WHERE Hi 10K , confirm AMD +VDDIO_AZ 15
POSSIBLE FOR DUAL-OP RESISTORS. ward this pull Hi +3V 2,3,5,6,7,10,11,12,13,14,15,24,25,26,27,28,29,30,31,32,33,34,35,36,42
not need +3VS5 5,12,13,14,15,42
+1.8V 5,8,10,11,26,42

REQUIRED STRAPS It must ready


refore RSMRST#
+3VS5

D D
+VDDIO_AZ +3V +3VS5 +3VS5
INT CLK GEN R229

10K/F_4
R567 R478
R553
R565 10K/F_4 10K/F_4 *10K/F_4
*10K/F_4
13 SB_GPIO200
13 ACZ_SDOUT 12 PCI_CLK_TPM 12 PCI_CLK2 12 PCI_CLK3 12 PCI_CLK4 12 LPC_CLK0 12 LPC_CLK1 12 RTC_CLK 13 SB_GPIO199

R547 R548 R549 R232 R476


R564 GPIO199 R228 R236 GPIO200
10K/F_4 *10K/F_4 10K/F_4 10K/F_4 10K/F_4 *10K/F_4 *2.2K_4 2.2K_4

EXT CLK GEN

TYPE GPIO199 GPIO200

C FWH L : 2.2K L : 2.2K C

pull down pull down


AZ_SDOUT PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 GPIO200 GPIO199
REQUIRED LPC NC L : 2.2K
STRAPS PULL LOW POWER ALLOW Watchdog USE non_Fusion EC CLKGEN pull down
MODE PCIE Gen2 Timer DEBUG CLOCK MODE ENABLED ENABLED H,H = Reserved
HIGH
DEFAULT Enabled STRAP DEFAULT DEFAULT L : 2.2K
H,L = SPI ROM SPI NC
pull down

PULL PERFORMANCE FORCE Watchdog IGNORE FUSION EC CLKGEN L,H = LPC ROM (Default)
LOW MODE PCIE Gen1 Timer DEBUG CLOCK MODE DISABLED DISABLED L,L = FWH ROM RSVD NC NC
Disabled STRAP
DEFAULT DEFAULT DEFAULT DEFAULT

NB_PWRGD_IN:
RS780/RX780 = 1.8V; RS740 = 3.3V
DEBUG STRAPS Do NOT share it with SB_PWRGD when use Internal Clk Gen
SB820 HAS 15K INTERNAL PU FOR PCI_AD[27:23] (Need SB PLL initialize firstly)

B B
R291 10K/F_4 R286 *0_4/S SB_PWRGD_IN
+3VS5 SB_PWRGD_IN 13

C500 NB/SB POWER GOOD CIRCUIT


*2.2U/6.3V_6 +1.8V
12 AD27 +1.8V
12 AD26
12 AD25
12 AD24 U14 R289
12 AD23 1 5 C501 *0.1U/10V_4 300_4
NC VCC
2 2 RX780,RS780
39 VRM_PWRGD A
R521 R513 R266 R272 R270 3 3 4 R287 *33_4 NB_PWRGD_IN
GND Y NB_PWRGD_IN 10
*2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 Use 2.2K PD.
1 *NL17SZ17DFT2G
5,36 ECPWROK
SOT-353
D17
BAT54A

R285 *0_4/S
WD_PWRGD 13

PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

PULL USE PCI DISABLE ILA USE FC USE DEFAULT DISABLE PCI AL17SZ17000 IC(5P) NL17SZ17DFT2G(SOT-353) SOT-353

A HIGH PLL AUTORUN PLL PCIE STRAPS MEM BOOT ALUC1G17000 IC OTHER(5P) SN74AUC1G17DBVR(SOT23-5) SOT23-5 A

DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT

PULL BYPASS ENABLE ILA BYPASS FC USE EEPROM ENABLE PCI


LOW PCI PLL AUTORUN PLL PCIE STRAPS MEM BOOT PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
SB820-STRAPS
NB5/RD2
Date: Monday, September 28, 2009 Sheet 16 of 46
5 4 3 2 1
5 4 3 2 1

2.5GT/s bit rate U28A


U28H

DP C/D POWER DP A/B POWER


17
PEG_TX0 AA38 Y33 C_PEG_RXP0 C231 .1U/10V_4
9 PEG_TX0 PEG_TX#0 PCIE_RX0P PCIE_TX0P C_PEG_RXN0 PEG_RX0 9 +1.8V_DPC_VDD18 +1.8V_DPA_VDD18
Y37 Y32 C220 .1U/10V_4 AP20 AN24
9 PEG_TX#0 PCIE_RX0N PCIE_TX0N PEG_RX#0 9 DPC_VDD18#1 DPA_VDD18#1
AP21 DPC_VDD18#2 DPA_VDD18#2 AP24

PEG_TX1 Y35 W33 C_PEG_RXP1 C235 .1U/10V_4 +1.0V_VGA


D 9 PEG_TX1 PCIE_RX1P PCIE_TX1P PEG_RX1 9 D
PEG_TX#1 W36 W32 C_PEG_RXN1 C246 .1U/10V_4
9 PEG_TX#1 PCIE_RX1N PCIE_TX1N PEG_RX#1 9 +1.0V_DPC_VDD10 AP13 DPC_VDD10#1 DPA_VDD10#1 AP31
AT13 DPC_VDD10#2 DPA_VDD10#2 AP32
PEG_TX2 W38 U33 C_PEG_RXP2 C247 .1U/10V_4
9 PEG_TX2 PEG_TX#2 PCIE_RX2P PCIE_TX2P C_PEG_RXN2 PEG_RX2 9
V37 U32 C254 .1U/10V_4
9 PEG_TX#2 PCIE_RX2N PCIE_TX2N PEG_RX#2 9
AN17 DPC_VSSR#1 DPA_VSSR#1 AN27
AP16 AP27
PEG_TX3 C_PEG_RXP3 C213 .1U/10V_4 DPC_VSSR#2 DPA_VSSR#2
9 PEG_TX3 V35 PCIE_RX3P PCIE_TX3P U30 PEG_RX3 9 AP17 DPC_VSSR#3 DPA_VSSR#3 AP28
PEG_TX#3 U36 U29 C_PEG_RXN3 C205 .1U/10V_4 AW14 AW24
9 PEG_TX#3 PCIE_RX3N PCIE_TX3N PEG_RX#3 9 DPC_VSSR#4 DPA_VSSR#4
AW16 AW26
DPC_VSSR#5 DPA_VSSR#5
PEG_TX4 U38 T33 C_PEG_RXP4 C262 .1U/10V_4
9 PEG_TX4 PEG_TX#4 PCIE_RX4P PCIE_TX4P C_PEG_RXN4 PEG_RX4 9
T37 T32 C278 .1U/10V_4
9 PEG_TX#4 PCIE_RX4N PCIE_TX4N PEG_RX#4 9

PCI EXPRESS INTERFACE


+1.8V_DPC_VDD18 AP22 AP25 +1.8V_DPA_VDD18
DPD_VDD18#1 DPB_VDD18#1
AP23 AP26
PEG_TX5 C_PEG_RXP5 C261 .1U/10V_4 DPD_VDD18#2 DPB_VDD18#2
9 PEG_TX5 T35 T30 PEG_RX5 9
PEG_TX#5 PCIE_RX5P PCIE_TX5P C_PEG_RXN5 C255 .1U/10V_4 +1.0V_VGA
9 PEG_TX#5 R36 PCIE_RX5N PCIE_TX5N T29 PEG_RX#5 9 ( DPA/B_VDD10 : 1.0V@110mA)
L12
+1.0V_DPC_VDD10 AP14 AN33 +1.0V_DPA_VDD10
PEG_TX6 C_PEG_RXP6 C280 .1U/10V_4 DPD_VDD10#1 DPB_VDD10#1
9 PEG_TX6 R38 P33 PEG_RX6 9 AP15 AP33
PEG_TX#6 PCIE_RX6P PCIE_TX6P C_PEG_RXN6 C285 .1U/10V_4 DPD_VDD10#2 DPB_VDD10#2 HCB1608KF-181T15_6
9 PEG_TX#6 P37 P32 PEG_RX#6 9
PCIE_RX6N PCIE_TX6N C100 C132 C120
10U/6.3V_8 1U/6.3V_4 .1U/10V_4
PEG_TX7 P35 P30 C_PEG_RXP7 C291 .1U/10V_4 AN19 AN29
9 PEG_TX7 PEG_TX#7 PCIE_RX7P PCIE_TX7P C_PEG_RXN7 PEG_RX7 9 DPD_VSSR#1 DPB_VSSR#1
N36 P29 C308 .1U/10V_4 AP18 AP29
9 PEG_TX#7 PCIE_RX7N PCIE_TX7N PEG_RX#7 9 DPD_VSSR#2 DPB_VSSR#2
AP19 DPD_VSSR#3 DPB_VSSR#3 AP30
AW20 AW30
PEG_TX8 C_PEG_RXP8 C316 0.1U/10V_4 DPD_VSSR#4 DPB_VSSR#4
9 PEG_TX8 N38 N33 PEG_RX8 9 AW22 AW32
PEG_TX#8 PCIE_RX8P PCIE_TX8P C_PEG_RXN8 C312 0.1U/10V_4 DPD_VSSR#5 DPB_VSSR#5
9 PEG_TX#8 M37 PCIE_RX8N PCIE_TX8N N32 PEG_RX#8 9
R372
PEG_TX9 M35 N30 C_PEG_RXP9 C295 0.1U/10V_4 R378 150/F_4DPCD_CALR AW18 AW28 DPAB_CALR
C 9 PEG_TX9 PEG_TX#9 PCIE_RX9P PCIE_TX9P C_PEG_RXN9 PEG_RX9 9 DPCD_CALR DPAB_CALR C
L36 N29 C294 0.1U/10V_4
9 PEG_TX#9 PCIE_RX9N PCIE_TX9N PEG_RX#9 9
150/F_4
DP E/F POWER DP PLL POWER
PEG_TX10 L38 L33 C_PEG_RXP10 C293 0.1U/10V_4 AH34 AU28
9 PEG_TX10 PEG_TX#10 PCIE_RX10P PCIE_TX10P C_PEG_RXN10 PEG_RX10 9 +1.8V_DPE_VDD18 DPE_VDD18#1 DPA_PVDD
K37 L32 C292 0.1U/10V_4 AJ34 AV27
9 PEG_TX#10 PCIE_RX10N PCIE_TX10N PEG_RX#10 9 DPE_VDD18#2 DPA_PVSS
( DPA/B_PVDD : 1.8V@20mA+20mA) +1.8V_VGA
PEG_TX11 K35 L30 C_PEG_RXP11 C322 0.1U/10V_4 L58
9 PEG_TX11 PEG_TX#11 PCIE_RX11P PCIE_TX11P C_PEG_RXN11 PEG_RX11 9 +1.8V_DPB_PVDD
J36 L29 C327 0.1U/10V_4 AL33 AV29
9 PEG_TX#11 PCIE_RX11N PCIE_TX11N PEG_RX#11 9 +1.0V_DPE_VDD10 DPE_VDD10#1 DPB_PVDD
AM33 AR28
DPE_VDD10#2 DPB_PVSS HCB1608KF-181T15_6
PEG_TX12 J38 K33 C_PEG_RXP12 C320 0.1U/10V_4 C594 C595 C596
9 PEG_TX12 PCIE_RX12P PCIE_TX12P PEG_RX12 9
PEG_TX#12 H37 K32 C_PEG_RXN12 C325 0.1U/10V_4 10U/6.3V_8 1U/6.3V_4 .1U/10V_4
9 PEG_TX#12 PCIE_RX12N PCIE_TX12N PEG_RX#12 9
AN34 AU18
DPE_VSSR#1 DPC_PVDD
AP39 AV17
PEG_TX13 C_PEG_RXP13 C338 0.1U/10V_4 DPE_VSSR#2 DPC_PVSS
9 PEG_TX13 H35 J33 PEG_RX13 9 AR39
PEG_TX#13 PCIE_RX13P PCIE_TX13P C_PEG_RXN13 C343 0.1U/10V_4 DPE_VSSR#3 +1.8V_VGA
9 PEG_TX#13 G36
PCIE_RX13N PCIE_TX13N
J32 PEG_RX#13 9 AU37
DPE_VSSR#4 ( DPC/D_PVDD:1.8V@20mA+20mA)
AV19 +1.8V_DPC_PVDD
PEG_TX14 C_PEG_RXP14 C353 0.1U/10V_4 DPD_PVDD
9 PEG_TX14 G38 PCIE_RX14P PCIE_TX14P K30 PEG_RX14 9 DPD_PVSS AR18
PEG_TX#14 F37 K29 C_PEG_RXN14 C351 0.1U/10V_4
9 PEG_TX#14 PCIE_RX14N PCIE_TX14N PEG_RX#14 9
AF34
+1.8V_DPE_VDD18 DPF_VDD18#1
AG34
PEG_TX15 C_PEG_RXP15 C342 0.1U/10V_4 DPF_VDD18#2
9 PEG_TX15 F35 H33 PEG_RX15 9 AM37
PEG_TX#15 PCIE_RX15P PCIE_TX15P C_PEG_RXN15 C345 0.1U/10V_4 DPE_PVDD
9 PEG_TX#15 E37 H32 PEG_RX#15 9 AN38
PCIE_RX15N PCIE_TX15N DPE_PVSS
AK33 DPF_VDD10#1
+1.0V_DPE_VDD10 AK34
CLOCK DPF_VDD10#2 +1.8V_VGA
NC_DPF_PVDD
AL38 ( DPE/F_PVDD1.8V@20mA+20mA)
EXT_GFX_CLKP AB35 AM35 L64
2,12 EXT_GFX_CLKP EXT_GFX_CLKN PCIE_REFCLKP NC_DPF_PVSS +1.8V_DPE_PVDD
2,12 EXT_GFX_CLKN AA36
PCIE_REFCLKN
AF39
B DPF_VSSR#1 HCB1608KF-181T15_6 B
AH39 DPF_VSSR#2
CALIBRATION AK39 C621 C618 C619
M72_PCIE_CALRP R347 1.27K/F_4 DPF_VSSR#3 10U/6.3V_8 .1U/10V_4 .1U/10V_4
AJ21 Y30 AL34
NC#1 PCIE_CALRP DPF_VSSR#4
AK21 NC#2 AM34 DPF_VSSR#5
10K/F_4 R90 AH16 Y29 M72_PCIE_CALRN R105 2K/F_4 +1.0V_VGA
PWRGOOD PCIE_CALRN

AA30 R385 150/F_4 DPEF_CALR AM39


12 PCIE_RST# PERSTB DPEF_CALR

M97_m2
100MHz (+/-300ppm) input frequency, M97_m2
0-0.7V single-ended swing

( DPE/F_VDD18 : 1.8V@200mA+200mA) +1.8V_VGA


L20
+1.8V_DPE_VDD18

( VDD10 M97 1.0V) HCB1608KF-181T15_6


C157 C160 C159
( DPE/F_VDD10 : 1.0V@120mA+120mA ) +1.0V_VGA 10U/6.3V_8 1U/6.3V_4 .1U/10V_4
L19
+1.0V_DPE_VDD10

HCB1608KF-181T15_6
C145 C151 C141 ( DPA_VDD18 : 1.8V@130mA) +1.8V_VGA
10U/6.3V_8 1U/6.3V_4 .1U/10V_4 L14
+1.8V_DPA_VDD18
A HCB1608KF-181T15_6 A
C98 C123 C124
+1.0V_VGA 10U/6.3V_8 1U/6.3V_4 .1U/10V_4 19,21,40 +1.0V_VGA
( DPC/D_VDD10 : 1.0V@110mA+110mA) 19,21,41 +1.8V_VGA
+1.0V_DPC_VDD10 +1.8V_VGA
( DPC/D_VDD18 : 1.8V@130mA+130mA)
+1.8V_DPC_VDD18 PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
Custom ATI Park/Madison (PCIE I/F) 1/5 1A
NB5/RD2
Date: Monday, September 28, 2009 Sheet 17 of 46
5 4 3 2 1
5 4 3 2 1

U28C
DDR2 DDR2
Park, M92M Use Channel B Memory Interface Only
U28D
18
GDDR3/GDDR5 GDDR5/GDDR3 DDR2 DDR2
DDR3 DDR3 GDDR3/GDDR5 GDDR5/GDDR3
VMA_DQ0 C37 G24 VMA_MA0 22
DDR3 DDR3
VMA_DQ1 DQA0_0/DQA_0 MAA0_0/MAA_0 VMB_DQ0
C35 J23 VMA_MA1 22 C5 P8 VMB_MA0 23

MEMORY INTERFACE A
D VMA_DQ2 DQA0_1/DQA_1 MAA0_1/MAA_1 VMB_DQ1 DQB0_0/DQB_0 MAB0_0/MAB_0 D
A35 DQA0_2/DQA_2 MAA0_2/MAA_2 H24 VMA_MA2 22 C3 DQB0_1/DQB_1 MAB0_1/MAB_1 T9 VMB_MA1 23
VMA_DQ3 E34 J24 VMB_DQ2 E3 P9
VMA_MA3 22 VMB_MA2 23

MEMORY INTERFACE B
VMA_DQ4 DQA0_3/DQA_3 MAA0_3/MAA_3 VMB_DQ3 DQB0_2/DQB_2 MAB0_2/MAB_2
G32 DQA0_4/DQA_4 MAA0_4/MAA_4 H26 VMA_MA4 22 E1 DQB0_3/DQB_3 MAB0_3/MAB_3 N7 VMB_MA3 23
VMA_DQ5 D33 J26 VMB_DQ4 F1 N8
DQA0_5/DQA_5 MAA0_5/MAA_5 VMA_MA5 22 DQB0_4/DQB_4 MAB0_4/MAB_4 VMB_MA4 23
VMA_DQ6 F32 H21 VMB_DQ5 F3 N9
DQA0_6/DQA_6 MAA0_6/MAA_6 VMA_MA6 22 DQB0_5/DQB_5 MAB0_5/MAB_5 VMB_MA5 23
VMA_DQ7 E32 G21 VMA_MA7 22 VMB_DQ6 F5 U9 VMB_MA6 23
VMA_DQ8 DQA0_7/DQA_7 MAA0_7/MAA_7 VMB_DQ7 DQB0_6/DQB_6 MAB0_6/MAB_6
D31 H19 VMA_MA8 22 G4 U8 VMB_MA7 23
VMA_DQ9 DQA0_8/DQA_8 MAA1_0/MAA_8 VMB_DQ8 DQB0_7/DQB_7 MAB0_7/MAB_7
F30 DQA0_9/DQA_9 MAA1_1/MAA_9 H20 VMA_MA9 22 H5 DQB0_8/DQB_8 MAB1_0/MAB_8 Y9 VMB_MA8 23
VMA_DQ10 C30 L13 VMB_DQ9 H6 W9
DQA0_10/DQA_10 MAA1_2/MAA_10 VMA_MA10 22 DQB0_9/DQB_9 MAB1_1/MAB_9 VMB_MA9 23
VMA_DQ11 A30 G16 VMA_MA11 22 VMB_DQ10 J4 AC8 VMB_MA10 23
VMA_DQ12 DQA0_11/DQA_11 MAA1_3/MAA_11 VMB_DQ11 DQB0_10/DQB_10 MAB1_2/MAB_10
F28 DQA0_12/DQA_12 MAA1_4/MAA_12 J16 VMA_MA12 22 K6 DQB0_11/DQB_11 MAB1_3/MAB_11 AC9 VMB_MA11 23
VMA_DQ13 C28 H16 VMB_DQ12 K5 AA7
DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 VMA_BA2 22 DQB0_12/DQB_12 MAB1_4/MAB_12 VMB_MA12 23
VMA_DQ14 A28 J17 VMB_DQ13 L4 AA8
DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 VMA_BA0 22 DQB0_13/DQB_13 MAB1_5/BA2 VMB_BA2 23
VMA_DQ15 E28 H17 VMB_DQ14 M6 Y8
DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 VMA_BA1 22 DQB0_14/DQB_14 MAB1_6/BA0 VMB_BA0 23
VMA_DQ16 D27 VMB_DQ15 M1 AA9
DQA0_16/DQA_16 DQB0_15/DQB_15 MAB1_7/BA1 VMB_BA1 23
VMA_DQ17 F26 A32 VMA_DM0 VMB_DQ16 M3
VMA_DQ18 DQA0_17/DQA_17 WCKA0_0/DQMA_0 VMA_DM1 VMB_DQ17 DQB0_16/DQB_16 VMB_DM0
C26 DQA0_18/DQA_18 WCKA0B_0/DQMA_1 C32 M5 DQB0_17/DQB_17 WCKB0_0/DQMB_0 H3
VMA_DQ19 A26 D23 VMA_DM2 VMB_DQ18 N4 H1 VMB_DM1
VMA_DQ20 DQA0_19/DQA_19 WCKA0_1/DQMA_2 VMA_DM3 VMB_DQ19 DQB0_18/DQB_18 WCKB0B_0/DQMB_1 VMB_DM2
F24 DQA0_20/DQA_20 WCKA0B_1/DQMA_3 E22 P6 DQB0_19/DQB_19 WCKB0_1/DQMB_2 T3
VMA_DQ21 C24 C14 VMA_DM4 VMB_DQ20 P5 T5 VMB_DM3
VMA_DQ22 DQA0_21/DQA_21 WCKA1_0/DQMA_4 VMA_DM5 VMB_DQ21 DQB0_20/DQB_20 WCKB0B_1/DQMB_3 VMB_DM4
A24 A14 R4 AE4
VMA_DQ23 DQA0_22/DQA_22 WCKA1B_0/DQMA_5 VMA_DM6 VMB_DQ22 DQB0_21/DQB_21 WCKB1_0/DQMB_4 VMB_DM5
E24 E10 T6 AF5
VMA_DQ24 DQA0_23/DQA_23 WCKA1_1/DQMA_6 VMA_DM7 VMB_DQ23 DQB0_22/DQB_22 WCKB1B_0/DQMB_5 VMB_DM6
C22 DQA0_24/DQA_24 WCKA1B_1/DQMA_7 D9 T1 DQB0_23/DQB_23 WCKB1_1/DQMB_6 AK6
VMA_DQ25 A22 VMB_DQ24 U4 AK5 VMB_DM7
VMA_DQ26 DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 VMA_RDQS0 VMB_DQ25 DQB0_24/DQB_24 WCKB1B_1/DQMB_7
F22 C34 V6
VMA_DQ27 DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 VMA_RDQS1 VMB_DQ26 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3 VMB_RDQS0
D21 DQA0_27/DQA_27 EDCA0_1/QSA_1/RDQSA_1 D29 V1 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 F6
VMA_DQ28 A20 D25 VMA_RDQS2 VMB_DQ27 V3 K3 VMB_RDQS1
VMA_DQ29 DQA0_28/DQA_28 EDCA0_2/QSA_2/RDQSA_2 VMA_RDQS3 VMB_DQ28 DQB0_27/DQB_27 EDCB0_1/QSB_1/RDQSB_1 VMB_RDQS2
F20 E20 Y6 P3
VMA_DQ30 DQA0_29/DQA_29 EDCA0_3/QSA_3/RDQSA_3 VMA_RDQS4 VMB_DQ29 DQB0_28/DQB_28 EDCB0_2/QSB_2/RDQSB_2 VMB_RDQS3
D19 DQA0_30/DQA_30 EDCA1_0/QSA_4/RDQSA_4 E16 Y1 DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3 V5
VMA_DQ31 E18 E12 VMA_RDQS5 VMB_DQ30 Y3 AB5 VMB_RDQS4
VMA_DQ32 DQA0_31/DQA_31 EDCA1_1/QSA_5/RDQSA_5 VMA_RDQS6 VMB_DQ31 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 VMB_RDQS5
C18 J10 Y5 AH1
VMA_DQ33 DQA1_0/DQA_32 EDCA1_2/QSA_6/RDQSA_6 VMA_RDQS7 VMB_DQ32 DQB0_31/DQB_31 EDCB1_1/QSB_5/RDQSB_5 VMB_RDQS6
A18 D7 AA4 AJ9
C VMA_DQ34 DQA1_1/DQA_33 EDCA1_3/QSA_7/RDQSA_7 VMB_DQ33 DQB1_0/DQB_32 EDCB1_2/QSB_6/RDQSB_6 VMB_RDQS7 C
F18 DQA1_2/DQA_34 AB6 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7 AM5
VMA_DQ35 D17 A34 VMA_WDQS0 VMB_DQ34 AB1
VMA_DQ36 DQA1_3/DQA_35 DDBIA0_0/QSA_0B/WDQSA_0 VMA_WDQS1 VMB_DQ35 DQB1_2/DQB_34 VMB_WDQS0
A16 E30 AB3 G7
VMA_DQ37 DQA1_4/DQA_36 DDBIA0_1/QSA_1B/WDQSA_1 VMA_WDQS2 VMB_DQ36 DQB1_3/DQB_35 DDBIB0_0/QSB_0B/WDQSB_0 VMB_WDQS1
F16 DQA1_5/DQA_37 DDBIA0_2/QSA_2B/WDQSA_2 E26 AD6 DQB1_4/DQB_36 DDBIB0_1/QSB_1B/WDQSB_1 K1
VMA_DQ38 D15 C20 VMA_WDQS3 VMB_DQ37 AD1 P1 VMB_WDQS2
VMA_DQ39 DQA1_6/DQA_38 DDBIA0_3/QSA_3B/WDQSA_3 VMA_WDQS4 VMB_DQ38 DQB1_5/DQB_37 DDBIB0_2/QSB_2B/WDQSB_2 VMB_WDQS3
E14 C16 AD3 W4
VMA_DQ40 DQA1_7/DQA_39 DDBIA1_0/QSA_4B/WDQSA_4 VMA_WDQS5 VMB_DQ39 DQB1_6/DQB_38 DDBIB0_3/QSB_3B/WDQSB_3 VMB_WDQS4
F14 DQA1_8/DQA_40 DDBIA1_1/QSA_5B/WDQSA_5 C12 AD5 DQB1_7/DQB_39 DDBIB1_0/QSB_4B/WDQSB_4 AC4
VMA_DQ41 D13 J11 VMA_WDQS6 VMB_DQ40 AF1 AH3 VMB_WDQS5
VMA_DQ42 DQA1_9/DQA_41 DDBIA1_2/QSA_6B/WDQSA_6 VMA_WDQS7 VMB_DQ41 DQB1_8/DQB_40 DDBIB1_1/QSB_5B/WDQSB_5 VMB_WDQS6
F12 DQA1_10/DQA_42 DDBIA1_3/QSA_7B/WDQSA_7 F8 AF3 DQB1_9/DQB_41 DDBIB1_2/QSB_6B/WDQSB_6 AJ8
VMA_DQ43 A12 VMB_DQ42 AF6 AM3 VMB_WDQS7
VMA_DQ44 DQA1_11/DQA_43 VMB_DQ43 DQB1_10/DQB_42 DDBIB1_3/QSB_7B/WDQSB_7
D11 DQA1_12/DQA_44 ADBIA0/ODTA0 J21 VMA_ODT0 22 AG4 DQB1_11/DQB_43
VMA_DQ45 F10 G19 VMB_DQ44 AH5 T7
DQA1_13/DQA_45 ADBIA1/ODTA1 VMA_ODT1 22 DQB1_12/DQB_44 ADBIB0/ODTB0 VMB_ODT0 23
VMA_DQ46 A10 VMB_DQ45 AH6 W7
VMA_DQ47 DQA1_14/DQA_46 VMB_DQ46 DQB1_13/DQB_45 ADBIB1/ODTB1 VMB_ODT1 23
C10 H27 VMA_CLK0 22 AJ4
VMA_DQ48 DQA1_15/DQA_47 CLKA0 VMB_DQ47 DQB1_14/DQB_46
G13 G27 VMA_CLK0# 22 AK3 L9 VMB_CLK0 23
VMA_DQ49 DQA1_16/DQA_48 CLKA0B VMB_DQ48 DQB1_15/DQB_47 CLKB0
H13 AF8 L8 VMB_CLK0# 23
VMA_DQ50 DQA1_17/DQA_49 VMB_DQ49 DQB1_16/DQB_48 CLKB0B
J13 J14 VMA_CLK1 22 AF9
VMA_DQ51 DQA1_18/DQA_50 CLKA1 VMB_DQ50 DQB1_17/DQB_49
H11 H14 VMA_CLK1# 22 AG8 AD8 VMB_CLK1 23
VMA_DQ52 DQA1_19/DQA_51 CLKA1B VMB_DQ51 DQB1_18/DQB_50 CLKB1
G10 AG7 AD7 VMB_CLK1# 23
VMA_DQ53 DQA1_20/DQA_52 VMB_DQ52 DQB1_19/DQB_51 CLKB1B
G8 DQA1_21/DQA_53 RASA0B K23 VMA_RAS0# 22 AK9 DQB1_20/DQB_52
VMA_DQ54 K9 K19 VMB_DQ53 AL7 T10
DQA1_22/DQA_54 RASA1B VMA_RAS1# 22 DQB1_21/DQB_53 RASB0B VMB_RAS0# 23
VMA_DQ55 K10 VMB_DQ54 AM8 Y10
VMA_DQ56 DQA1_23/DQA_55 VMB_DQ55 DQB1_22/DQB_54 RASB1B VMB_RAS1# 23
G9 K20 VMA_CAS0# 22 AM7
+1.5V_VGA VMA_DQ57 DQA1_24/DQA_56 CASA0B +1.5V_VGA VMB_DQ56 DQB1_23/DQB_55
A8 K17 VMA_CAS1# 22 AK1 W10 VMB_CAS0# 23
VMA_DQ58 DQA1_25/DQA_57 CASA1B VMB_DQ57 DQB1_24/DQB_56 CASB0B
C8 AL4 AA10 VMB_CAS1# 23
VMA_DQ59 DQA1_26/DQA_58 VMB_DQ58 DQB1_25/DQB_57 CASB1B
E8 K24 VMA_CS0# 22 AM6
R177 VMA_DQ60 DQA1_27/DQA_59 CSA0B_0 VMB_DQ59 DQB1_26/DQB_58
A6 DQA1_28/DQA_60 CSA0B_1 K27 AM1 DQB1_27/DQB_59 CSB0B_0 P10 VMB_CS0# 23
VMA_DQ61 C6 VMB_DQ60 AN4 L10
VMA_DQ62 DQA1_29/DQA_61 R407 VMB_DQ61 DQB1_28/DQB_60 CSB0B_1
R1 E6
DQA1_30/DQA_62 CSA1B_0
M13 VMA_CS1# 22 AP3
DQB1_29/DQB_61
VMA_DQ63 A5 K16 VMB_DQ62 AP1 AD10
DQA1_31/DQA_63 CSA1B_1 VMB_DQ63 DQB1_30/DQB_62 CSB1B_0 VMB_CS1# 23
40.2/F_4 R1 AP5 AC10
MVREFDA DQB1_31/DQB_63 CSB1B_1
L18 K21 VMA_CKE0 22
B MVREFDA CKEA0 40.2/F_4 TP109 FOR Boundary Scan B
L20 MVREFSA CKEA1 J20 VMA_CKE1 22 CKEB0 U10 VMB_CKE0 23
R162 C381 MVREFDB Y12 AA11
MVREFDB CKEB1 VMB_CKE1 23
240/F_4 R175 L27 K26 VMA_WE0# 22 AA12
*240/F_4 R114 MEM_CALRN0 WEA0B MVREFSB
R2 +1.5V_VGA N12 MEM_CALRN1 WEA1B L15 VMA_WE1# 22 +3V_DELAY WEB0B N10 VMB_WE0# 23
240/F_4 R88 AG12 R406 C646 AB11
MEM_CALRN2 WEB1B VMB_WE1# 23
100/F_4 .1U/10V_4 R2
*240/F_4 R161 .1U/10V_4
GDDR5

M12 H23 VMA_MA13 22


240/F_4 R176 MEM_CALRP1 MAA0_8 100/F_4 R350 TESTEN
M27 J19 AD28 T8

GDDR5
MEM_CALRP0 MAA1_8 TESTEN MAB0_8 VMB_MA13 23
240/F_4 R89 AH12 10K/F_4 W8
+1.5V_VGA MEM_CALRP2 TEST_MCLK MAB1_8
AK10 CLKTESTA
SI TEST_YCLK
AL10 AH11 DRAM_RST
+1.5V_VGA CLKTESTB DRAM_RST
AL31 RSVD
R178 C565 C564
*.1U/10V_4 *.1U/10V_4
R1 R101
M97_m2
40.2/F_4 R1 M97_m2 +1.5V_VGA
MVREFSA For PARK For Madison
40.2/F_4 R352 R351
R179 C380 MVREFSB *51_4 *51_4

R2 MEM_CALRNP0 stuff R102 R93


C237 *2.2K_4
Rc
100/F_4 .1U/10V_4 22 VMA_DQ[63..0] R2 R94 680/F_4
MEM_CALRNP1 stuff DRAM_RST VM_RST#
VM_RST# 22,23
22 VMA_DM[7..0] 100/F_4 .1U/10V_4
route 50ohms single-ended/100ohms diff
MEM_CALRNP2 stuff 22 VMA_WDQS[7..0]
and keep short Rb
Debug only, for clock observation, if not needed, DNI
R104 C248
22 VMA_RDQS[7..0] Ra 10K/F_4 Ca 68P/50V_4
A A
Designator For M97-M2 For Mannhatton
DDR3/GDDR3 Memory Stuff Option 23 VMB_DQ[63..0]

23 VMB_DM[7..0]
GDDR5 GDDR3 DDR3 Ra 10K 10K
23 VMB_WDQS[7..0]
+1.5V_VGA 1.5V 1.8V/1.5V 1.5V 23 VMB_RDQS[7..0] Rb 0R/Short 680R PROJECT : LX89
21,22,23,40 +1.5V_VGA Quanta Computer Inc.
R1 40.2R 40.2R 40.2R Rc DNI DNI
Size Document Number Rev
Custom 1A
R2 100R 100R 100R Ca 2.2nF 68pF
NB5/RD2
ATI Park/Madison (MEM I/F) 2/5
Date: Monday, September 28, 2009 Sheet 18 of 46
5 4 3 2 1
5 4 3 2 1

19
MEM_ID[3:0] Vendor Type Vendor P/N
0000 Samsung 64*16-800MHZ K4W1G1646E-HC12
0001 Hinyx 64*16-800MHZ H5TQ1G63BFR-12C U28B U28G
0010 Reserved
0011 Reserved R373 10K/F_4
0100 Reserved LVDS CONTROL
0101 Reserved TXCAP_DPA3P
AU24
VARY_BL
AK27 EXT_DPST_PWM 26
0110 Reserved TXCAM_DPA3N
AV23
DIGON
AJ27 EXT_DISP_ON 26
0111 Reserved
1000 Reserved MUTI GFX TX0P_DPA2P
AT25
1001 Reserved
DPA TX0M_DPA2N
AR24
1010 Reserved
1011 Reserved TX1P_DPA1P
AU26
TXCLK_UP_DPF3P
AK35 EXT_TXUCLKOUT+ 26
1100 Reserved TX1M_DPA1N
AV25
TXCLK_UN_DPF3N
AL36 EXT_TXUCLKOUT- 26
1101 Reserved
D 1110 Reserved AR8
DVPCNTL_MVP_0 TX2P_DPA0P
AT27
TXOUT_U0P_DPF2P
AJ38 EXT_TXUOUT0+ 26 D
1111 Reserved AU8
DVPCNTL_MVP_1 TX2M_DPA0N
AR26
TXOUT_U0N_DPF2N
AK37 EXT_TXUOUT0- 26
NC on PARK AP8
AW8
DVPCNTL_0
DVPCNTL_1 TXCBP_DPB3P
AR30 TXC_HDMI_L+
TXC_HDMI_L-
TXC_HDMI_L+ 27 TXOUT_U1P_DPF1P
AH35 EXT_TXUOUT1+ 26 DisplayPort F Configuration
+1.8V_VGA
Memory ID AR3
DVPCNTL_2 TXCBM_DPB3N
AT29 TXC_HDMI_L- 27 TXOUT_U1N_DPF1N
AJ36 EXT_TXUOUT1- 26
AR1
R383 *10K/F_4 MEM_ID0 AU1 DVPCLK TX0_HDMI_L+
AV31 TX0_HDMI_L+ 27 AG38 EXT_TXUOUT2+ 26
R381 *10K/F_4 MEM_ID1 AU3 DVPDATA_0 TX3P_DPB2P TX0_HDMI_L- TXOUT_U2P_DPF0P
AU30 TX0_HDMI_L- 27 AH37 EXT_TXUOUT2- 26
R382 *10K/F_4 MEM_ID2 AW3 DVPDATA_1 DPB TX3M_DPB2N TXOUT_U2N_DPF0N
R55 *10K/F_4 EXT_LVDS_BLON R380 *10K/F_4 MEM_ID3 AP6 DVPDATA_2 TX1_HDMI_L+
+3V_DELAY AR32 TX1_HDMI_L+ 27 AF35
DVPDATA_3 TX4P_DPB1P TX1_HDMI_L- TXOUT_U3P
AW5 AT31 TX1_HDMI_L- 27 AG36
R379 *10K/F_4 GPIO_23_CLKREQb DVPDATA_4 TX4M_DPB1N TXOUT_U3N
AU5
DVPDATA_5 TX2_HDMI_L+
AR6 AT33 TX2_HDMI_L+ 27
DVPDATA_6 TX5P_DPB0P TX2_HDMI_L- LVTMDP
AW6 AU32 TX2_HDMI_L- 27
DVPDATA_7 TX5M_DPB0N
AU6
GPIO24_TRSTB R63 10K/F_4 DVPDATA_8
AT7 AU14 AP34 EXT_TXLCLKOUT+ 26
DVPDATA_9 TXCCP_DPC3P TXCLK_LP_DPE3P
AV7 AV13 AR34 EXT_TXLCLKOUT- 26
DVPDATA_10 TXCCM_DPC3N TXCLK_LN_DPE3N
AN7
+3V_DELAY DVPDATA_11
AV9 AT15 AW37 EXT_TXLOUT0+ 26
DVPDATA_12 TX0P_DPC2P TXOUT_L0P_DPE2P
AT9 AR14 AU35 EXT_TXLOUT0- 26
DVPDATA_13 TX0M_DPC2N TXOUT_L0N_DPE2N
AR10

R64 *10K/F_4 GPIO25_TDI


AW10
AU10
DVPDATA_14
DVPDATA_15
DPC
TX1P_DPC1P
AU16
AV15
TXOUT_L1P_DPE1P
AR37
AU39
EXT_TXLOUT1+ 26 DisplayPort E Configuration
DVPDATA_16 TX1M_DPC1N TXOUT_L1N_DPE1N EXT_TXLOUT1- 26
AP10
R65 10K/F_4 GPIO27_TMS AV11
DVPDATA_17
DVPDATA_18 TX2P_DPC0P
AT17
TXOUT_L2P_DPE0P
AP35 EXT_TXLOUT2+ 26
For Single-link panel
AT11 AR16 AR35 EXT_TXLOUT2- 26
R66 *10K/F_4 GPIO28_TDO DVPDATA_19 TX2M_DPC0N TXOUT_L2N_DPE0N
SI AR12
DVPDATA_20
NC on PARK AW12
DVPDATA_21 TXCDP_DPD3P
AU20
TXOUT_L3P
AN36
GPIO26_TCK R60 0_4 AU12 AT19 AP37
DVPDATA_22 TXCDM_DPD3N TXOUT_L3N
AP12
DVPDATA_23
AT21
2

C903 C535 TX3P_DPD2P


12MHz Add Y9 to slove Park JTAG test block TX3M_DPD2N
AR20
15P/50V_4
0.01U/16V/X7R_4 Y9 intermittently fails to initialize DPD AU22
DP Channel D is NC on PARK
correctly issue TX4P_DPD1P M97_m2
AV21
1

TX4M_DPD1N
I2C AT23 SI Del R85,R86,R91 for Layout concern
TX5P_DPD0P
AR22
TX5M_DPD0N
C
26 EXT_EDIDCLK
AK26
SCL DIS C

26 EXT_EDIDDATA
AJ26
SDA DPLL_VDCC M97 1.0V
L_CRT_R R396 150/F_4
AD39 L_CRT_R +1.8V_VGA
GENERAL PURPOSE I/O R EXT_CRT_R 26
RB
AD37 (1.8V@75mA DPLL_PVDD)
20 GPIO0 GPIO0 AH20 L_CRT_G R394 150/F_4
GPIO1 GPIO_0 L_CRT_G L11 HCB1608KF-181T15_6 +1.8VDPLL_PVDD
20 GPIO1 AH18 AE36 EXT_CRT_G 26
GPIO2 GPIO_1 G
20 GPIO2 AN16 AD35
GPIO3 GPIO_2 GB L_CRT_B R393 150/F_4
T19 AH23
GPIO4 GPIO_3_SMBDATA L_CRT_B
T71 AJ23 AF37 EXT_CRT_B 26
R52 *0_4 GPIO_4_SMBCLK B C99 C122 C125
36,43 ACIN AH17 AE38
GPIO_5_AC_BATT DAC1 BB 10U/6.3V_8 1U/6.3V_4 .1U/10V_4
AJ17
EXT_LVDS_BLON GPIO_6
26 EXT_LVDS_BLON AK17 AC36 EXT_HSYNC_COM 20,26
GPIO8 GPIO_7_BLON HSYNC
20 GPIO8 AJ13 AC38 EXT_VSYNC_COM 20,26
GPIO9 GPIO_8_ROMSO VSYNC
20 GPIO9 AH15
GPIO10 GPIO_9_ROMSI R349 +1.0V_VGA
T20 AJ16
GPIO11 GPIO_10_ROMSCK +1.8V_VGA
20 GPIO11 AK16 AB34 DAC1_RSET 499/F_4 (1.0V@125mA DPLL_VDDC)
GPIO12 GPIO_11 RSET
20 GPIO12 AL16
GPIO_12
(DAC1_AVDD: 1.8V@70mA)
GPIO13 AM16 AD34 +1.8V_AVDD L10 HCB1608KF-181T15_6 +1.0VDPLL_VDDC
20 GPIO13 GPIO_13 AVDD
T69 HDMI_HP2 AM14 AE34 L21 HCB1608KF-181T15_6 +1.8V_AVDD
GFX_CORE_CNTRL0 GPIO_14_HPD2 AVSSQ
41 GFX_CORE_CNTRL0 AM13
GPIO_15_PWRCNTL_0
AK14 AC33 +VDDD1
VGA_ALERT GPIO_16_SSIN VDD1DI C180 C191 C202 C97 C127 C111
AG30 AC34
HPD3 GPIO_17_THERMAL_INT VSS1DI 10U/6.3V_8 1U/6.3V_4 .1U/10V_4 10U/6.3V_8 1U/6.3V_4 .1U/10V_4
T70 AN14
TEMP_FAIL GPIO_18_HPD3
5 TEMP_FAIL AM17
GFX_CORE_CNTRL1 GPIO_19_CTF
41 GFX_CORE_CNTRL1 AL13 AC30
GPIO_20_PWRCNTL_1 R2
AJ14 AC31
GPIO22 GPIO_21_BB_EN R2B +1.8V_VGA
20 GPIO22 AK13
GPIO_23_CLKREQb GPIO_22_ROMCSB +1.8V_VGA
AN13
GPIO_23_CLKREQB G2
AD30 (1.8V@20mA TSVDD)
GPIO24_TRSTB AM23 AD31 ( DAC2_A2VDDQ: 1.8V@2mA)
TP3 GPIO25_TDI JTAG_TRSTB G2B L22 HCB1608KF-181T15_6 +1.8V_TSVDD
AN23
TP1 GPIO26_TCK JTAG_TDI L23 HCB1608KF-181T15_6 +1.8V_A2VDDQ
AK23 AF30
TP4 GPIO27_TMS JTAG_TCK B2
AL24 AF31
TP5 GPIO28_TDO JTAG_TMS B2B
AM24
JTAG_TDO C161 C149
AJ19
TP6 GENERICA C169 C181 10U/6.3V_8 1U/6.3V_4
AK19 AC32
GENERICB C 1U/6.3V_4 .1U/10V_4
20 GENERICC AJ20 AD32
GENERICC Y
AK20 AF32
B GENERICD COMP B
AJ24
GENERICE_HPD4 DAC2
AH26
GENERICF DAC2_VSY +1.8V_VGA
GenericF/G is NC on PARK AH24
GENERICG H2SYNC
AD29 DAC2_VSY 20
150 OHM AC29 DAC2_HSY (DAC1_VDD1DI:1.8V@100mA)
27 EXT_TMDS_HPD V2SYNC DAC2_HSY 20
*100K/F_4 R374 EXT_TMDS_HPD AK24 L57 HCB1608KF-181T15_6 +VDDD1
HPD1
AG31 +VDDD1
+1.8V_VGA VDD2DI +3V_DELAY
AG32
VSS2DI C592 C574 C576 (DAC2_A2VDD:3.3V@130mA)
10U/6.3V_8 1U/6.3V_4 .1U/10V_4
PLACE VREFG DIVIDER AND CAP AG33 +A2VDD +A2VDD
R401 A2VDD
CLOSE TO ASIC 499/F_4
A2VDDQ
AD33 +1.8V_A2VDDQ SI
+VGA_VREFG AH13 C77 C80
VREFG 1U/6.3V_4 .1U/10V_4
AF33
R400 C635 A2VSSQ
SI
249/F_4 .1U/10V_4 R348
AA29 DAC2_RSET 715/F_4
R2SET
Del L13,C94,C95 for +VDDD2 combine
with +VDDD1 Del L9 A2VDD can be powered
DDC/AUX AM26
by VDDR3 directly without filter
DDC1CLK HDMI_SCL 27
PLL/CLOCK AN26 HDMI_SDA 27
+1.8VDPLL_PVDD DDC1DATA
AM32
DPLL_PVDD
AN32 AM27
DPLL_PVSS AUX1P
AUX1N
AL27 Thermal Sensor 781-1_3V R466 200/F_6 +3V_DELAY
+1.0VDPLL_VDDC AN31 AM19
DPLL_VDDC DDC2CLK U37 C751 0.1U/10V_4
AL19
DDC2DATA R451 *0_4/S MB_CLK2
Remove GND SI AW34
XO_IN 5,36,43 MBCLK2 8
SMCLK VCC
1
AW35 AN20 VGATHRM+
XTALIN XO_IN2 AUX2P R452 *0_4/S MB_DATA2
AV33 AM20 5,36,43 MBDATA2 7 2
XTALOUT XTALIN AUX2N SMDATA DXP C736
AU34
XTALOUT
DDCCLK_AUX3P
AL30
+3V_DELAY
R453 10K/F_4 VGA_ALERT 6
-ALT DXN
3 2200P/50V_4 w/s 10 / 10
R384 1M/F_4 AM30
DDCDATA_AUX3N VGATHRM-
5 4
GND -OVT
AL29
VGATHRM+ DDCCLK_AUX4P G781-1P8@EV
A 2 1 AF29
DPLUS DDCDATA_AUX4N
AM29 DDCxx_AUX4x is NC on PARK A
VGATHRM- AG29 THERMAL -VGATHRM +3V_DELAY
Y4 27MHZ DMINUS R465 10K/F_4
C589 C601 DDCCLK_AUX5P
AN21 I2C ADDRESS: 9AH
AM21
18P/50V_4 18P/50V_4 DDCDATA_AUX5N
AK32
+1.8V_TSVDD TS_FDO
AJ32 AJ30 EXT_DDCCLK 26
TSVDD DDC6CLK
AJ33 AJ31 EXT_DDCDATA 26
TSVSS DDC6DATA
AK30
NC_DDCCLK_AUX7P
AK29 DDCxx_AUX7x is NC on M9x and PARK
NC_DDCDATA_AUX7N
PROJECT : LX89
Quanta Computer Inc.
17,21,40 +1.0V_VGA
M97_m2 17,21,41 +1.8V_VGA Size Document Number Rev
18,20,21,26,27 +3V_DELAY Custom 1A
NB5/RD2
ATI Park/Madison (DISPLAY) 3/5
Date: Monday, September 28, 2009 Sheet 19 of 46
5 4 3 2 1
5 4 3 2 1

U28F

AB39
E39
F34
F39
PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
GND#1
GND#2
GND#3
GND#4
A3
A37
AA16
AA18
20
G33 PCIE_VSS#5 GND#5 AA2
G34 AA21
PCIE_VSS#6 GND#6
H31 AA23
H34
PCIE_VSS#7
PCIE_VSS#8
GND#7
GND#8 AA26 CONFIGURATION STRAPS RECOMMENDED SETTINGS
H39 AA28 0= DO NOT INSTALL RESISTOR
PCIE_VSS#9 GND#9
D
J31 PCIE_VSS#10 GND#10 AA6 ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, 1 = INSTALL 10K RESISTOR
D
J34 PCIE_VSS#11 GND#11 AB12 X = DESIGN DEPENDANT
K31 AB15 THEY MUST NOT CONFLICT DURING RESET NA = NOT APPLICABLE
PCIE_VSS#12 GND#12 +3V_DELAY
K34 PCIE_VSS#13 GND#13 AB17
K39 AB20
PCIE_VSS#14 GND#14 STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS
L31 AB22
PCIE_VSS#15 GND#15
L34 PCIE_VSS#16 GND#16 AB24
M34 AB27 GPIO0 R376 10K/F_4 Transmitter Power Savings Enable
PCIE_VSS#17 GND#17 19 GPIO0
M39 AC11 TX_PWRS_ENB GPIO0
N31
PCIE_VSS#18
PCIE_VSS#19
GND#18
GND#19 AC13 19 GPIO1
GPIO1 R377 10K/F_4
0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)
1
N34 AC16
PCIE_VSS#20 GND#20 GPIO2 R45 *10K/F_4 PCI Express Transmitter De-emphasis Enable
P31 PCIE_VSS#21 GND#21 AC18 19 GPIO2
P34 AC2 TX_DEEMPH_EN GPIO1
P39
PCIE_VSS#22
PCIE_VSS#23
GND#22
GND#23 AC21 19 GPIO8
GPIO8 R357 *10K/F_4
0: Tx de-emphasis disabled for mobile mode
1: Tx de-emphasis enabled (Default setting for Desktop)
1
R34 AC23
PCIE_VSS#24 GND#24 R397 10K/F_4
T31 AC26 19,26 EXT_HSYNC_COM
PCIE_VSS#25 GND#25 BIF_GEN2_EN_A GPIO2 0 = Advertises the PCI-E device as 2.5 GT/s capable at power-on.
T34 AC28
T39
PCIE_VSS#26
PCIE_VSS#27
GND#26
GND#27 AC6 19,26 EXT_VSYNC_COM
R399 10K/F_4 1 = Advertises the PCI-E device as 5.0 GT/s capable at power-on. 0
U31 AD15 5.0 GT/s capability will be controlled by software.
PCIE_VSS#28 GND#28 R375 *10K/F_4
U34 PCIE_VSS#29 GND#29 AD17 19 GENERICC
V34 AD20 RSVD GPIO8 0
PCIE_VSS#30 GND#30 R364 *10K/F_4 BIF_VGA_DIS GPIO9 VGA ENABLED 0
V39 AD22 19 DAC2_VSY
PCIE_VSS#31 GND#31 RSVD GPIO21 0
W31 AD24
PCIE_VSS#32 GND#32 R363 *10K/F_4
W34 PCIE_VSS#33 GND#33 AD27 19 DAC2_HSY
Y34 AD9 BIOS_ROM_EN GPIO_22_ROMCSB ENABLE EXTERNAL BIOS ROM 0
PCIE_VSS#34 GND#34 GPIO22 R358 *10K/F_4
Y39 AE2 19 GPIO22
PCIE_VSS#35 GND#35 ROMIDCFG(2:0) GPIO[13:11] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT 0 0 1
GND#36 AE6
AF10
GND#37 VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS 0
AF16
GND#38
GND#39 AF18
AF21 0

F15
GND#100
GND GND#40
GND#41
GND#42
AG17
AG2
RSVD
AUD[1]
GENERICC
HSYNC AUD[1] AUD[0]
0
11
C AUD[0] VSYNC 0 0 No audio function C
F17 GND#101 GND#43 AG20
F19 AG22 0 1 Audio for DisplayPort and HDMI if dongle is detected
GND#102 GND#44
F21 AG6 1 0 Audio for DisplayPort only
GND#103 GND#45
F23 GND#104 GND#46 AG9 1 1 Audio for both DisplayPort and HDMI
F25 AH21 +3V_DELAY
GND#105 GND#47
F27 AJ10
GND#106 GND#48
F29 GND#107 GND#49 AJ11
F31 AJ2
GND#108 GND#50 GPIO9 R44 *10K/F_4
F33 GND#109 GND#51 AJ28 19 GPIO9
F7 AJ6
GND#110 GND#52 GPIO13 R47 *10K/F_4
F9 GND#111 GND#53 AK11 19 GPIO13
G2 AK31
G6
GND#112
GND#113
GND#54
GND#55 AK7 19 GPIO12
GPIO12 R48 *10K/F_4 AMD RESERVED CONFIGURATION STRAPS
H9 AL11
GND#114 GND#56 GPIO11 R365 10K/F_4
J2
GND#115 GND#57
AL14 19 GPIO11 ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
J27 AL17
GND#116 GND#58 THEY MUST NOT CONFLICT DURING RESET
J6 AL2
GND#117 GND#59
J8 AL20
GND#118 GND#60
K14 AL21
GND#119 GND/PX_EN#61 H2SYNC GENERICC
K7 GND#120 GND#62 AL23
L11 AL26
GND#121 GND#63
L17 AL32
GND#122 GND#64
L2
GND#123 GND#65
AL6 PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
L22 AL8
L24
L6
GND#124
GND#125
GND#66
GND#67
AM11
AM31
Memory Aperture size fix 256M THEY MUST NOT CONFLICT DURING RESET
GND#126 GND#68
M17 GND#127 GND#69 AM9
M22 AN11 GPIO21_BB_EN
M24
N16
GND#128
GND#129
GND#70
GND#71
AN2
AN30
GPIO9 GPIO13 GPIO12 GPIO11
GND#130 GND#72
N18
GND#131 GND#73
AN6 BIOSROM ROMIDCFG2 ROMIDCFG1 ROMIDCFG0
N2 AN8
B GND#132 GND#74 B
N21 AP11
N23
N26
GND#133
GND#134
GND#75
GND#76 AP7
AP9
0 128M 0 0 0 Power Up/Down Sequence
GND#135 GND#77
N6 AR5
R15
R17
GND#136
GND#137
GND#78
B11
0 256M 0 0 1
GND#138 GND#80
R2 B13
R20
R22
GND#139
GND#140
GND#81
GND#82
B15
B17
0 64M 0 1 0
GND#141 GND#83
R24 B19
R27
GND#142
GND#143
GND#84
GND#85 B21 0 32M 0 1 1
R6
GND#144 GND#86
B23 +VGA_CORE VDDC
T11 B25
T13
T16
GND#145
GND#146
GND#87
GND#88
B27
B29
0 512M 1 0 0
GND#147 GND#89
T18 B31
T21
T23
GND#148
GND#149
GND#90
GND#91
B33
B7
0 1G 1 0 1 +VGA_CORE VDDCI
GND#150 GND#92
T26 B9
U15
U17
GND#151
GND#153
GND#93
GND#94
C1
C39
0 2G 1 1 0
GND#154 GND#95
U2 E35 +1.5V_VGA VDDR1
U20
U22
GND#155
GND#156
GND#96
GND#97
E5
F11
0 4G 1 1 1
GND#157 GND#98
U24 F13
GND#158 GND#99
U27
GND#159 It is a shared pin strap with CONFIG[2:0] if BIOS_ROM_EN is set to 0.
U6 GND#160 +3.3V_Delay VDDR3
V11
GND#161
V16
GND#163
V18
GND#164
V21
GND#165 +1.8V_VGA VDDR4
V23 GND#166
A A
V26
GND#167 +1.8V_VGA VDD_CT
W2 GND#168
W6 GND#169
Y15
GND#170 20ms 20ms
Y17 GND#171
Y20
GND#172
Y22 A39
Y24
Y27
GND#173
GND#174
VSS_MECH#1
VSS_MECH#2 AW1
AW39
PROJECT : LX89
U13
GND#175
GND#152
VSS_MECH#3
Quanta Computer Inc.
V13 GND#162
M97_m2 Size Document Number Rev
Custom 1A
18,19,21,26,27 +3V_DELAY NB5/RD2
ATI Park/Madison(GND&Str&Ther)4/5
Date: Monday, September 28, 2009 Sheet 20 of 46
5 4 3 2 1
5 4 3 2 1

U28E
+1.8V_VGA
+1.5V_VGA

21
(VDDR1: 1.5V@7.5A ) MEM I/O L17
PCIE (1.8V@504mA PCIE_VDDR) HCB1608KF-181T15_6
AC7 AA31 +1.8V_PCIE_VDDR
VDDR1#1 PCIE_VDDR#1
AD11 AA32
VDDR1#2 PCIE_VDDR#2
AF7 AA33
C697 C627 C737 C185 C722 C378 C724 VDDR1#3 PCIE_VDDR#3 C119 C118 C121
AG10 AA34
2.2U/10V_4 2.2U/10V_4 2.2U/10V_4 1U/6.3V_4 2.2U/10V_4 2.2U/10V_4 2.2U/10V_4 VDDR1#4 PCIE_VDDR#4 1U/6.3V_4 1U/6.3V_4 10U/6.3V_8
AJ7 V28
VDDR1#5 PCIE_VDDR#5
AK8 W29
VDDR1#6 PCIE_VDDR#6
AL9 W30
VDDR1#7 PCIE_VDDR#7
G11 Y31
VDDR1#8 PCIE_VDDR#8
G14
VDDR1#9
G17
VDDR1#10
G20 G30
VDDR1#11 PCIE_VDDC#1 +1.0V_VGA
D G23 G31 D
C374 C126 C645 C726 VDDR1#12 PCIE_VDDC#2
G26
VDDR1#13 PCIE_VDDC#3
H29 (1.0V@1920mA PCIE_VDDC)
2.2U/10V_4 2.2U/10V_4 2.2U/10V_4 2.2U/10V_4 G29 H30
VDDR1#14 PCIE_VDDC#4
H10 J29
VDDR1#15 PCIE_VDDC#5
J7 J30
VDDR1#16 PCIE_VDDC#6 C311 C270 C282 C297 C74
J9 L28
VDDR1#17 PCIE_VDDC#7 .1U/10V_4 1U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 10U/6.3V_8
K11 M28
VDDR1#18 PCIE_VDDC#8
K13 N28
VDDR1#19 PCIE_VDDC#9
K8 R28
VDDR1#20 PCIE_VDDC#10
L12 T28
C770 C712 C768 C634 C650 C769 VDDR1#21 PCIE_VDDC#11
L16 U28
10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VDDR1#22 PCIE_VDDC#12
L21
VDDR1#23
L23
VDDR1#24
L26 AA15 +VGA_CORE
VDDR1#25 CORE VDDC#1
L7 AA17
VDDR1#26 VDDC#2
M11 AA20
VDDR1#27 VDDC#3 C222 C288 C277 C188 C275 C289 C273 C226 C198 C227
N11 AA22
VDDR1#28 VDDC#4 2.2U/10V_4 2.2U/10V_4 2.2U/10V_4 2.2U/10V_4 2.2U/10V_4 2.2U/10V_4 2.2U/10V_4 2.2U/10V_4 2.2U/10V_4
P7 AA24
VDDR1#29 VDDC#5 2.2U/10V_4
R11 AA27
VDDR1#30 VDDC#6
U11 AB16
VDDR1#31 VDDC#7
U7 AB18
VDDR1#32 VDDC#8
Y11 AB21
VDDR1#33 VDDC#9
Y7 AB23
VDDR1#34 VDDC#10 C224 C274 C259 C290 C276 C272 C225 C229 C223
AB26
VDDC#11 2.2U/10V_4 2.2U/10V_4 2.2U/10V_4 2.2U/10V_4 2.2U/10V_4
AB28
+1.8V_VGA VDDC#12 2.2U/10V_4 2.2U/10V_4 2.2U/10V_4 2.2U/10V_4
AC17
VDDC#13
AC20
+1.8V_VDDC_CT LEVEL VDDC#14
AC22
TRANSLATION VDDC#15
(1.8V@110mA VDD_CT) VDDC#16
AC24

POWER
L62 HCB1608KF-181T15_6 AF26 AC27
VDD_CT#1 VDDC#17
AF27 AD18
VDD_CT#2 VDDC#18
AG26 AD21
C604 C608 C606 VDD_CT#3 VDDC#19
AG27 AD23

1
C
L24 HCB1608KF-181T15_6 +VDDR4 10U/6.3V_8 1U/6.3V_4 .1U/10V_4 VDD_CT#4 VDDC#20 C
AD26
VDDC#21 +
AF17
I/O VDDC#22 C249 C250 C192 C556 C239 C252 C296 C228 C571 C271
AF20
+3V_DELAY VDDC#23 10U/6.3V_6S 22U/6.3V_8 10U/6.3V_6S 22U/6.3V_8 10U/6.3V_6S 10U/6.3V_6S

330u_2.5V_3528
AF23 AF22

2
VDDR3#1 VDDC#24 10U/6.3V_6S 10U/6.3V_6S 22U/6.3V_8
(3.3V@60mA VDDR3) AF24
VDDR3#2 VDDC#25
AG16
C203 C201 C200 AG23 AG18
10U/6.3V_8 1U/6.3V_4 .1U/10V_4 VDDR3#3 VDDC#26
AG24 AG21
VDDR3#4 VDDC#27
AH22
C190 C187 +VDDR4 VDDC#28
AH27
10U/6.3V_8 1U/6.3V_4 VDDC#29
AF13 AH28
L71 HCB1608KF-181T15_6 +MPV18 VDDR4#4 VDDC#30
AF15 M26
VDDR4#5 VDDC#31
AG13 N24
VDDR4#7 VDDC#32
(VDDR4 : 1.8V@190mA) AG15
VDDR4#8 VDDC#33
N27
R18
C730 C398 C390 +VDDR4 VDDC#34
R21
VDDC#35
AD12 R23
10U/6.3V_8 1U/6.3V_4 VDDR4#1 VDDC#36
AF11 R26
.1U/10V_4 VDDR4#2 VDDC#37
AF12 T17
VDDR4#3 VDDC#38
AG11 T20
VDDR4#6 VDDC#39
T22
VDDC#40
(1.8V@75mA SPV18) (Park: 1.8V@75mA +MPV18) VDDC#41
T24
T27
L60 HCB1608KF-181T15_6 +SPV18 VDDC#42
(M97, Broadway and Madison: 1.8V@150mA +MPV18) VDDC#43
U16
M20 U18
NC_VDDRHA VDDC#44
M21 U21
NC_VSSRHA VDDC#45
U23
VDDC#46
U26
C577 C590 C598 VDDC#47
V12 V17
10U/6.3V_8 1U/6.3V_4 .1U/10V_4 NC_VDDRHB VDDC#48
U12 V20
NC_VSSRHB VDDC#49
V22
VDDC#50
V24
VDDC#51
V27
VDDC#52
B Y16
(1.8V@40mA PCIE_PVDD) PLL VDDC#53
Y18
For Madison and Park, VDDCI and VDDC can share one common regulator B

L63 HCB1608KF-181T15_6 +PCIE_PVDD VDDC#54


AB37 Y21
PCIE_PVDD VDDC#55
Y23
+MPV18 VDDC#56
H7 Y26
C626 C631 C633 MPV18#1 VDDC#57
H8
MPV18#2 VDDC#58
Y28 (GDDR3/DDR3 1.12V@4A VDDCI)
10U/6.3V_8 1U/6.3V_4 1U/6.3V_4 +VGA_CORE
+SPV18 (GDDR5 1.12V@16A VDDCI)
(SPV10 :1.0V@120mA) AM10
SPV18
AA13 VDDCI L18
L59 HCB1608KF-181T15_6 +SPV10 VDDCI#1
+1.0V_VGA AN9 AB13
SPV10 VDDCI#2
AC12
VDDCI#3 BLM18SG121TN1D(120,100M,3A)_8
AN10 AC15
C588 C593 C597 SPVSS VDDCI#4
AD13
10U/6.3V_8 1U/6.3V_4 .1U/10V_4 VDDCI#5
AD16
VDDCI#6
M15
VDDCI#7
M16
Add FB Circuit SI-1 Stage VOLTAGE VDDCI#8
Gated 3.3V VDDCI#9
M18
R470 0_8 SENESE M23 C221 C305 C306
60mA by +3V_DELAY VDDCI#10
N13 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4
VDDC VDDCI#11
AF28 N15
FB_VDDC VDDCI#12
+3V_VGA 1 3 N17
VDDCI#13
N20
Q33 VDDCI#14
VDD_R3 --IO power for AG28
FB_VDDCI
N22
3.3 V pins (e.g. *AO3409 ISOLATED VDDCI#15 R12
2

R468 CORE I/O VDDCI#16 R13


GPIO’s). 3.3 V ± 5% *100K/F_4 VDDCI#17 C307 C251
AH29 R16
FB_GND VDDCI#18 1U/6.3V_4 2.2U/6.3V_4
T12
VDDCI#19
T15
VDDCI#20
V15
VDDCI#21
Y13
VDDCI#22

1
D25 *CH501H-40PT L-F C253 +
A A
1 2 M97_m2 .1U/10V_4 C279 C109 C217 C112 C110
3

22U/6.3V_8

330u_2.5V_3528
2
Q32 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8

R469 *68.1K_4 2
36,42,43 MAINON
*2N7002E

C764 PROJECT : LX89


12,41 +3V_VGA
Quanta Computer Inc.
1

+3V_DELAY circuit *0.1U/10V_4 17,19,40 +1.0V_VGA


41 +VGA_CORE
18,22,23,40 +1.5V_VGA Size Document Number Rev
17,19,41 +1.8V_VGA Custom 1A
18,19,20,26,27 +3V_DELAY
NB5/RD2
ATI Park/Madison (POWER) 5/5
Date: Monday, September 28, 2009 Sheet 21 of 46
5 4 3 2 1
5 4 3 2 1

22
18,21,23,40 +1.5V_VGA
CHANNEL A: 256MB/512MB DDR3
18 VMA_DQ[63..0]
18 VMA_DM[7..0]
18 VMA_WDQS[7..0]
18 VMA_RDQS[7..0]
U36 U10 U9 U35

VREFC_VMA1 M9 E4 VMA_DQ19 VREFC_VMA2 M9 E4 VMA_DQ29 VREFC_VMA3 M9 E4 VMA_DQ38 VREFC_VMA4 M9 E4 VMA_DQ57


VREFD_VMA1 H2 VREFCA DQL0 VMA_DQ22 VREFD_VMA2 VREFCA DQL0 VMA_DQ24 VREFD_VMA3 VREFCA DQL0 VMA_DQ34 VREFD_VMA4 VREFCA DQL0 VMA_DQ60
F8 H2 F8 H2 F8 H2 F8
VREFDQ DQL1 VMA_DQ18 VREFDQ DQL1 VMA_DQ30 VREFDQ DQL1 VMA_DQ36 VREFDQ DQL1 VMA_DQ58
DQL2 F3 DQL2 F3 DQL2 F3 DQL2 F3
N4 F9 VMA_DQ21 VMA_MA0 N4 F9 VMA_DQ25 VMA_MA0 N4 F9 VMA_DQ35 VMA_MA0 N4 F9 VMA_DQ61
18 VMA_MA0 A0 DQL3 A0 DQL3 A0 DQL3 A0 DQL3
P8 H4 VMA_DQ16 VMA_MA1 P8 H4 VMA_DQ28 VMA_MA1 P8 H4 VMA_DQ39 VMA_MA1 P8 H4 VMA_DQ56
18 VMA_MA1 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
P4 H9 VMA_DQ20 VMA_MA2 P4 H9 VMA_DQ26 VMA_MA2 P4 H9 VMA_DQ32 VMA_MA2 P4 H9 VMA_DQ63
18 VMA_MA2 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5
N3 G3 VMA_DQ17 VMA_MA3 N3 G3 VMA_DQ31 VMA_MA3 N3 G3 VMA_DQ37 VMA_MA3 N3 G3 VMA_DQ59
18 VMA_MA3 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6
18 VMA_MA4 P9 H8 VMA_DQ23 VMA_MA4 P9 H8 VMA_DQ27 VMA_MA4 P9 H8 VMA_DQ33 VMA_MA4 P9 H8 VMA_DQ62
A4 DQL7 VMA_MA5 A4 DQL7 VMA_MA5 A4 DQL7 VMA_MA5 A4 DQL7
18 VMA_MA5 P3 A5 P3 A5 P3 A5 P3 A5
D VMA_MA6 VMA_MA6 VMA_MA6 D
18 VMA_MA6 R9 A6 R9 A6 R9 A6 R9 A6
R3 D8 VMA_DQ4 VMA_MA7 R3 D8 VMA_DQ9 VMA_MA7 R3 D8 VMA_DQ44 VMA_MA7 R3 D8 VMA_DQ55
18 VMA_MA7 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
T9 C4 VMA_DQ3 VMA_MA8 T9 C4 VMA_DQ15 VMA_MA8 T9 C4 VMA_DQ45 VMA_MA8 T9 C4 VMA_DQ49
18 VMA_MA8 A8 DQU1 A8 DQU1 A8 DQU1 A8 DQU1
R4 C9 VMA_DQ7 VMA_MA9 R4 C9 VMA_DQ10 VMA_MA9 R4 C9 VMA_DQ41 VMA_MA9 R4 C9 VMA_DQ54
18 VMA_MA9 A9 DQU2 A9 DQU2 A9 DQU2 A9 DQU2
L8 C3 VMA_DQ0 VMA_MA10 L8 C3 VMA_DQ13 VMA_MA10 L8 C3 VMA_DQ40 VMA_MA10 L8 C3 VMA_DQ48
18 VMA_MA10 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
18 VMA_MA11 R8 A8 VMA_DQ5 VMA_MA11 R8 A8 VMA_DQ8 VMA_MA11 R8 A8 VMA_DQ42 VMA_MA11 R8 A8 VMA_DQ52
A11 DQU4 VMA_DQ2 VMA_MA12 A11 DQU4 VMA_DQ14 VMA_MA12 A11 DQU4 VMA_DQ46 VMA_MA12 A11 DQU4 VMA_DQ51
18 VMA_MA12 N8 A3 N8 A3 N8 A3 N8 A3
A12/BC DQU5 VMA_DQ6 VMA_MA13 A12/BC DQU5 VMA_DQ12 VMA_MA13 A12/BC DQU5 VMA_DQ43 VMA_MA13 A12/BC DQU5 VMA_DQ53
18 VMA_MA13 T4 A13 DQU6 B9 T4 A13 DQU6 B9 T4 A13 DQU6 B9 T4 A13 DQU6 B9
T8 A4 VMA_DQ1 T8 A4 VMA_DQ11 T8 A4 VMA_DQ47 T8 A4 VMA_DQ50
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M8 M8 M8 M8
A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA

M3 B3 VMA_BA0 M3 B3 VMA_BA0 M3 B3 VMA_BA0 M3 B3


18 VMA_BA0 BA0 VDD#B3 BA0 VDD#B3 BA0 VDD#B3 BA0 VDD#B3
N9 D10 VMA_BA1 N9 D10 VMA_BA1 N9 D10 VMA_BA1 N9 D10
18 VMA_BA1 BA1 VDD#D10 BA1 VDD#D10 BA1 VDD#D10 BA1 VDD#D10
M4 G8 VMA_BA2 M4 G8 VMA_BA2 M4 G8 VMA_BA2 M4 G8
18 VMA_BA2 BA2 VDD#G8 BA2 VDD#G8 BA2 VDD#G8 BA2 VDD#G8
K3 K3 K3 K3
VDD#K3 VDD#K3 VDD#K3 VDD#K3
VDD#K9 K9 VDD#K9 K9 VDD#K9 K9 VDD#K9 K9
N2 N2 N2 N2
VDD#N2 VMA_CLK0 VDD#N2 VDD#N2 VMA_CLK1 VDD#N2
18 VMA_CLK0 J8 CK VDD#N10 N10 J8 CK VDD#N10 N10 18 VMA_CLK1 J8 CK VDD#N10 N10 J8 CK VDD#N10 N10
18 VMA_CLK0# K8 R2 VMA_CLK0# K8 R2 18 VMA_CLK1# K8 R2 VMA_CLK1# K8 R2
CK VDD#R2 VMA_CKE0 CK VDD#R2 CK VDD#R2 VMA_CKE1 CK VDD#R2
18 VMA_CKE0 K10 R10 K10 R10 18 VMA_CKE1 K10 R10 K10 R10
CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA

VMA_ODT0 K2 A2 VMA_ODT0 K2 A2 VMA_ODT1 K2 A2 VMA_ODT1 K2 A2


18 VMA_ODT0 ODT/ODT0 VDDQ#A2 18 VMA_ODT0 VMA_CS0# ODT/ODT0 VDDQ#A2 18 VMA_ODT1 ODT/ODT0 VDDQ#A2 18 VMA_ODT1 VMA_CS1# ODT/ODT0 VDDQ#A2
18 VMA_CS0# L3 A9 L3 A9 18 VMA_CS1# L3 A9 L3 A9
CS /CS0 VDDQ#A9 VMA_RAS0# CS /CS0 VDDQ#A9 CS /CS0 VDDQ#A9 VMA_RAS1# CS /CS0 VDDQ#A9
18 VMA_RAS0# J4 RAS VDDQ#C2 C2 J4 RAS VDDQ#C2 C2 18 VMA_RAS1# J4 RAS VDDQ#C2 C2 J4 RAS VDDQ#C2 C2
K4 C10 VMA_CAS0# K4 C10 K4 C10 VMA_CAS1# K4 C10
18 VMA_CAS0# CAS VDDQ#C10 CAS VDDQ#C10 18 VMA_CAS1# CAS VDDQ#C10 CAS VDDQ#C10
L4 D3 VMA_WE0# L4 D3 L4 D3 VMA_WE1# L4 D3
18 VMA_WE0# WE VDDQ#D3 WE VDDQ#D3 18 VMA_WE1# WE VDDQ#D3 WE VDDQ#D3
VDDQ#E10 E10 VDDQ#E10 E10 VDDQ#E10 E10 VDDQ#E10 E10
VDDQ#F2 F2 VDDQ#F2 F2 VDDQ#F2 F2 VDDQ#F2 F2
VMA_RDQS2 F4 H3 VMA_RDQS3 F4 H3 VMA_RDQS4 F4 H3 VMA_RDQS7 F4 H3
VMA_RDQS0 DQSL VDDQ#H3 VMA_RDQS1 DQSL VDDQ#H3 VMA_RDQS5 DQSL VDDQ#H3 VMA_RDQS6 DQSL VDDQ#H3
C8 H10 C8 H10 C8 H10 C8 H10
C DQSU VDDQ#H10 DQSU VDDQ#H10 DQSU VDDQ#H10 DQSU VDDQ#H10 C

VMA_DM2 E8 A10 VMA_DM3 E8 A10 VMA_DM4 E8 A10 VMA_DM7 E8 A10


VMA_DM0 DML VSS#A10 VMA_DM1 DML VSS#A10 VMA_DM5 DML VSS#A10 VMA_DM6 DML VSS#A10
D4 DMU VSS#B4 B4 D4 DMU VSS#B4 B4 D4 DMU VSS#B4 B4 D4 DMU VSS#B4 B4
VSS#E2 E2 VSS#E2 E2 VSS#E2 E2 VSS#E2 E2
G9 G9 G9 G9
VMA_WDQS2 VSS#G9 VMA_WDQS3 VSS#G9 VMA_WDQS4 VSS#G9 VMA_WDQS7 VSS#G9
G4 DQSL VSS#J3 J3 G4 DQSL VSS#J3 J3 G4 DQSL VSS#J3 J3 G4 DQSL VSS#J3 J3
VMA_WDQS0 B8 J9 VMA_WDQS1 B8 J9 VMA_WDQS5 B8 J9 VMA_WDQS6 B8 J9
DQSU VSS#J9 DQSU VSS#J9 DQSU VSS#J9 DQSU VSS#J9
VSS#M2 M2 VSS#M2 M2 VSS#M2 M2 VSS#M2 M2
M10 M10 M10 M10
VSS#M10 VSS#M10 VSS#M10 VSS#M10
VSS#P2 P2 VSS#P2 P2 VSS#P2 P2 VSS#P2 P2
T3 P10 VM_RST# T3 P10 VM_RST# T3 P10 VM_RST# T3 P10
18,23 VM_RST# RESET VSS#P10 RESET VSS#P10 RESET VSS#P10 RESET VSS#P10
VSS#T2 T2 VSS#T2 T2 VSS#T2 T2 VSS#T2 T2
VMA_ZQ1 L9 T10 VMA_ZQ2 L9 T10 VMA_ZQ3 L9 T10 VMA_ZQ4 L9 T10
ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10
Should be 240 Should be 240 Should be 240 Should be 240
Ohms +-1% A1 B2 Ohms +-1% A1 B2 Ohms +-1% A1 B2 Ohms +-1% A1 B2
NC VSSQ#B2 NC VSSQ#B2 NC VSSQ#B2 NC VSSQ#B2
T1 B10 T1 B10 T1 B10 T1 B10
R454 NC VSSQ#B10 R187 NC VSSQ#B10 R181 NC VSSQ#B10 R462 NC VSSQ#B10
A11 D2 A11 D2 A11 D2 A11 D2
NC VSSQ#D2 NC VSSQ#D2 NC VSSQ#D2 NC VSSQ#D2
240/F_4 T11 NC VSSQ#D9 D9 240/F_4 T11 NC VSSQ#D9 D9 240/F_4 T11 NC VSSQ#D9 D9 240/F_4 T11 NC VSSQ#D9 D9
E3 E3 E3 E3
VSSQ#E3 VSSQ#E3 VSSQ#E3 VSSQ#E3
J2 E9 J2 E9 J2 E9 J2 E9
NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9
L2 F10 L2 F10 L2 F10 L2 F10
NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10
J10 G2 J10 G2 J10 G2 J10 G2
NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2
L10 G10 L10 G10 L10 G10 L10 G10
NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
H5TQ1G63BFR-12C H5TQ1G63BFR-12C H5TQ1G63BFR-12C H5TQ1G63BFR-12C

+1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA


B B

R456 R450 R191 R180 R183 R189 R464 R457


4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4

VREFC_VMA1 VREFD_VMA1 VREFC_VMA2 VREFD_VMA2 VREFC_VMA3 VREFD_VMA3 VREFC_VMA4 VREFD_VMA4

R459 R455 R190 R182 R186 R188 R463 R460


4.99K/F_4 C738 4.99K/F_4 C733 4.99K/F_4 C400 4.99K/F_4 C387 4.99K/F_4 C389 4.99K/F_4 C392 4.99K/F_4 C743 4.99K/F_4 C740
.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4

VMA_CLK0 +1.5V_VGA +1.5V_VGA

R184
56.2/F_4
C742 C739 C725 C731 C727 C761 C723 C721 C752 C754 C728 C732 C746 C734 C744 C741
C386
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
P/N VMA_CLK0_COMM

R185 .01U/16V_4 +1.5V_VGA +1.5V_VGA


Samsung AKD5LGGT503
56.2/F_4

Hinyx AKD5LZGTW01
VMA_CLK0#
A VMA_CLK1 C749 C747 C376 C391 C384 C382 C379 C393 C753 C401 C405 C404 C383 C406 C377 C375 A
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4

R458
56.2/F_4
+1.5V_VGA +1.5V_VGA
C735
VMA_CLK1_COMM PROJECT : LX89
R461 .01U/16V_4 C388 C372 C399 C765 C745 C403 C402 C385 C748 C760
Quanta Computer Inc.
56.2/F_4 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S
Size Document Number Rev
Custom VRAM-A 1A
VMA_CLK1# NB5/RD2
Date: Monday, September 28, 2009 Sheet 22 of 46
5 4 3 2 1
5 4 3 2 1

CHANNEL B: 256MB/512MB DDR3


23
18 VMB_DQ[63..0]
18,21,22,40 +1.5V_VGA 18 VMB_DM[7..0]
18 VMB_WDQS[7..0]
18 VMB_RDQS[7..0]
U7 U29 U25 U6

VREFC_VMB1 M9 E4 VMB_DQ4 VREFC_VMB2 M9 E4 VMB_DQ10 VREFC_VMB3 M9 E4 VMB_DQ43 VREFC_VMB4 M9 E4 VMB_DQ52


VREFD_VMB1 H2 VREFCA DQL0 VMB_DQ3 VREFD_VMB2 VREFCA DQL0 VMB_DQ13 VREFD_VMB3 VREFCA DQL0 VMB_DQ46 VREFD_VMB4 VREFCA DQL0 VMB_DQ51
F8 H2 F8 H2 F8 H2 F8
VREFDQ DQL1 VMB_DQ6 VREFDQ DQL1 VMB_DQ9 VREFDQ DQL1 VMB_DQ44 VREFDQ DQL1 VMB_DQ53
DQL2 F3 DQL2 F3 DQL2 F3 DQL2 F3
N4 F9 VMB_DQ2 VMB_MA0 N4 F9 VMB_DQ14 VMB_MA0 N4 F9 VMB_DQ42 VMB_MA0 N4 F9 VMB_DQ49
18 VMB_MA0 A0 DQL3 A0 DQL3 A0 DQL3 A0 DQL3
P8 H4 VMB_DQ5 VMB_MA1 P8 H4 VMB_DQ8 VMB_MA1 P8 H4 VMB_DQ41 VMB_MA1 P8 H4 VMB_DQ54
18 VMB_MA1 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
P4 H9 VMB_DQ0 VMB_MA2 P4 H9 VMB_DQ12 VMB_MA2 P4 H9 VMB_DQ45 VMB_MA2 P4 H9 VMB_DQ48
18 VMB_MA2 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5
N3 G3 VMB_DQ7 VMB_MA3 N3 G3 VMB_DQ11 VMB_MA3 N3 G3 VMB_DQ40 VMB_MA3 N3 G3 VMB_DQ55
18 VMB_MA3 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6
18 VMB_MA4 P9 H8 VMB_DQ1 VMB_MA4 P9 H8 VMB_DQ15 VMB_MA4 P9 H8 VMB_DQ47 VMB_MA4 P9 H8 VMB_DQ50
A4 DQL7 VMB_MA5 A4 DQL7 VMB_MA5 A4 DQL7 VMB_MA5 A4 DQL7
18 VMB_MA5 P3 A5 P3 A5 P3 A5 P3 A5
D VMB_MA6 VMB_MA6 VMB_MA6 D
18 VMB_MA6 R9 A6 R9 A6 R9 A6 R9 A6
R3 D8 VMB_DQ16 VMB_MA7 R3 D8 VMB_DQ28 VMB_MA7 R3 D8 VMB_DQ63 VMB_MA7 R3 D8 VMB_DQ32
18 VMB_MA7 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
T9 C4 VMB_DQ23 VMB_MA8 T9 C4 VMB_DQ26 VMB_MA8 T9 C4 VMB_DQ56 VMB_MA8 T9 C4 VMB_DQ39
18 VMB_MA8 A8 DQU1 A8 DQU1 A8 DQU1 A8 DQU1
R4 C9 VMB_DQ19 VMB_MA9 R4 C9 VMB_DQ31 VMB_MA9 R4 C9 VMB_DQ60 VMB_MA9 R4 C9 VMB_DQ34
18 VMB_MA9 A9 DQU2 A9 DQU2 A9 DQU2 A9 DQU2
L8 C3 VMB_DQ22 VMB_MA10 L8 C3 VMB_DQ24 VMB_MA10 L8 C3 VMB_DQ58 VMB_MA10 L8 C3 VMB_DQ38
18 VMB_MA10 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
18 VMB_MA11 R8 A8 VMB_DQ17 VMB_MA11 R8 A8 VMB_DQ29 VMB_MA11 R8 A8 VMB_DQ61 VMB_MA11 R8 A8 VMB_DQ37
A11 DQU4 VMB_DQ20 VMB_MA12 A11 DQU4 VMB_DQ25 VMB_MA12 A11 DQU4 VMB_DQ57 VMB_MA12 A11 DQU4 VMB_DQ36
18 VMB_MA12 N8 A3 N8 A3 N8 A3 N8 A3
A12/BC DQU5 VMB_DQ18 VMB_MA13 A12/BC DQU5 VMB_DQ30 VMB_MA13 A12/BC DQU5 VMB_DQ62 VMB_MA13 A12/BC DQU5 VMB_DQ35
18 VMB_MA13 T4 A13 DQU6 B9 T4 A13 DQU6 B9 T4 A13 DQU6 B9 T4 A13 DQU6 B9
T8 A4 VMB_DQ21 T8 A4 VMB_DQ27 T8 A4 VMB_DQ59 T8 A4 VMB_DQ33
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M8 M8 M8 M8
A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA

M3 B3 VMB_BA0 M3 B3 VMB_BA0 M3 B3 VMB_BA0 M3 B3


18 VMB_BA0 BA0 VDD#B3 BA0 VDD#B3 BA0 VDD#B3 BA0 VDD#B3
N9 D10 VMB_BA1 N9 D10 VMB_BA1 N9 D10 VMB_BA1 N9 D10
18 VMB_BA1 BA1 VDD#D10 BA1 VDD#D10 BA1 VDD#D10 BA1 VDD#D10
M4 G8 VMB_BA2 M4 G8 VMB_BA2 M4 G8 VMB_BA2 M4 G8
18 VMB_BA2 BA2 VDD#G8 BA2 VDD#G8 BA2 VDD#G8 BA2 VDD#G8
K3 K3 K3 K3
VDD#K3 VDD#K3 VDD#K3 VDD#K3
VDD#K9 K9 VDD#K9 K9 VDD#K9 K9 VDD#K9 K9
N2 N2 N2 N2
VDD#N2 VMB_CLK0 VDD#N2 VDD#N2 VMB_CLK1 VDD#N2
18 VMB_CLK0 J8 CK VDD#N10 N10 J8 CK VDD#N10 N10 18 VMB_CLK1 J8 CK VDD#N10 N10 J8 CK VDD#N10 N10
18 VMB_CLK0# K8 R2 VMB_CLK0# K8 R2 18 VMB_CLK1# K8 R2 VMB_CLK1# K8 R2
CK VDD#R2 VMB_CKE0 CK VDD#R2 CK VDD#R2 VMB_CKE1 CK VDD#R2
18 VMB_CKE0 K10 R10 K10 R10 18 VMB_CKE1 K10 R10 K10 R10
CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA

VMB_ODT0 K2 A2 VMB_ODT0 K2 A2 VMB_ODT1 K2 A2 VMB_ODT1 K2 A2


18 VMB_ODT0 ODT/ODT0 VDDQ#A2 18 VMB_ODT0 VMB_CS0# ODT/ODT0 VDDQ#A2 18 VMB_ODT1 ODT/ODT0 VDDQ#A2 18 VMB_ODT1 VMB_CS1# ODT/ODT0 VDDQ#A2
18 VMB_CS0# L3 A9 L3 A9 18 VMB_CS1# L3 A9 L3 A9
CS /CS0 VDDQ#A9 VMB_RAS0# CS /CS0 VDDQ#A9 CS /CS0 VDDQ#A9 VMB_RAS1# CS /CS0 VDDQ#A9
18 VMB_RAS0# J4 RAS VDDQ#C2 C2 J4 RAS VDDQ#C2 C2 18 VMB_RAS1# J4 RAS VDDQ#C2 C2 J4 RAS VDDQ#C2 C2
K4 C10 VMB_CAS0# K4 C10 K4 C10 VMB_CAS1# K4 C10
18 VMB_CAS0# CAS VDDQ#C10 CAS VDDQ#C10 18 VMB_CAS1# CAS VDDQ#C10 CAS VDDQ#C10
L4 D3 VMB_WE0# L4 D3 L4 D3 VMB_WE1# L4 D3
18 VMB_WE0# WE VDDQ#D3 WE VDDQ#D3 18 VMB_WE1# WE VDDQ#D3 WE VDDQ#D3
VDDQ#E10 E10 VDDQ#E10 E10 VDDQ#E10 E10 VDDQ#E10 E10
VDDQ#F2 F2 VDDQ#F2 F2 VDDQ#F2 F2 VDDQ#F2 F2
VMB_RDQS0 F4 H3 VMB_RDQS1 F4 H3 VMB_RDQS5 F4 H3 VMB_RDQS6 F4 H3
VMB_RDQS2 DQSL VDDQ#H3 VMB_RDQS3 DQSL VDDQ#H3 VMB_RDQS7 DQSL VDDQ#H3 VMB_RDQS4 DQSL VDDQ#H3
C8 H10 C8 H10 C8 H10 C8 H10
C DQSU VDDQ#H10 DQSU VDDQ#H10 DQSU VDDQ#H10 DQSU VDDQ#H10 C

VMB_DM0 E8 A10 VMB_DM1 E8 A10 VMB_DM5 E8 A10 VMB_DM6 E8 A10


VMB_DM2 DML VSS#A10 VMB_DM3 DML VSS#A10 VMB_DM7 DML VSS#A10 VMB_DM4 DML VSS#A10
D4 DMU VSS#B4 B4 D4 DMU VSS#B4 B4 D4 DMU VSS#B4 B4 D4 DMU VSS#B4 B4
VSS#E2 E2 VSS#E2 E2 VSS#E2 E2 VSS#E2 E2
G9 G9 G9 G9
VMB_WDQS0 VSS#G9 VMB_WDQS1 VSS#G9 VMB_WDQS5 VSS#G9 VMB_WDQS6 VSS#G9
G4 DQSL VSS#J3 J3 G4 DQSL VSS#J3 J3 G4 DQSL VSS#J3 J3 G4 DQSL VSS#J3 J3
VMB_WDQS2 B8 J9 VMB_WDQS3 B8 J9 VMB_WDQS7 B8 J9 VMB_WDQS4 B8 J9
DQSU VSS#J9 DQSU VSS#J9 DQSU VSS#J9 DQSU VSS#J9
VSS#M2 M2 VSS#M2 M2 VSS#M2 M2 VSS#M2 M2
M10 M10 M10 M10
VSS#M10 VSS#M10 VSS#M10 VSS#M10
VSS#P2 P2 VSS#P2 P2 VSS#P2 P2 VSS#P2 P2
T3 P10 VM_RST# T3 P10 VM_RST# T3 P10 VM_RST# T3 P10
18,22 VM_RST# RESET VSS#P10 RESET VSS#P10 RESET VSS#P10 RESET VSS#P10
VSS#T2 T2 VSS#T2 T2 VSS#T2 T2 VSS#T2 T2
VMB_ZQ1 L9 T10 VMB_ZQ2 L9 T10 VMB_ZQ3 L9 T10 VMB_ZQ4 L9 T10
ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10
Should be 240 Should be 240 Should be 240 Should be 240
Ohms +-1% A1 B2 Ohms +-1% A1 B2 Ohms +-1% A1 B2 Ohms +-1% A1 B2
NC VSSQ#B2 NC VSSQ#B2 NC VSSQ#B2 NC VSSQ#B2
T1 B10 T1 B10 T1 B10 T1 B10
R150 NC VSSQ#B10 R408 NC VSSQ#B10 R361 NC VSSQ#B10 R97 NC VSSQ#B10
A11 D2 A11 D2 A11 D2 A11 D2
NC VSSQ#D2 NC VSSQ#D2 NC VSSQ#D2 NC VSSQ#D2
240/F_4 T11 NC VSSQ#D9 D9 240/F_4 T11 NC VSSQ#D9 D9 240/F_4 T11 NC VSSQ#D9 D9 240/F_4 T11 NC VSSQ#D9 D9
E3 E3 E3 E3
VSSQ#E3 VSSQ#E3 VSSQ#E3 VSSQ#E3
J2 E9 J2 E9 J2 E9 J2 E9
NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9
L2 F10 L2 F10 L2 F10 L2 F10
NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10
J10 G2 J10 G2 J10 G2 J10 G2
NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2
L10 G10 L10 G10 L10 G10 L10 G10
NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
H5TQ1G63BFR-12C H5TQ1G63BFR-12C H5TQ1G63BFR-12C H5TQ1G63BFR-12C

+1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA

B B

R148 R116 R409 R435 R362 R403 R95 R69


4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4

VREFC_VMB1 VREFD_VMB1 VREFC_VMB2 VREFD_VMB2 VREFC_VMB3 VREFD_VMB3 VREFC_VMB4 VREFD_VMB4

R149 R115 R404 R434 R355 R402 R96 R67


4.99K/F_4 C356 4.99K/F_4 C284 4.99K/F_4 C641 4.99K/F_4 C706 4.99K/F_4 C572 4.99K/F_4 C636 4.99K/F_4 C196 4.99K/F_4 C73
.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4

VMB_CLK0 +1.5V_VGA
+1.5V_VGA

R152
56.2/F_4
P/N C682 C616 C622 C566 C563 C570 C568 C569
C357
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 C707 C708 C704 C705 C670 C666 C691 C688
VMB_CLK0_COMM 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
Samsung AKD5LGGT503
R151 .01U/16V_4 +1.5V_VGA
Hinyx AKD5LZGTW01 56.2/F_4 +1.5V_VGA

VMB_CLK0#
VMB_CLK1 C163 C179 C105 C96 C72 C71 C234 C197
A 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 C350 C346 C232 C233 C324 C329 C355 C354 A
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
R359
56.2/F_4
+1.5V_VGA +1.5V_VGA
C567
VMB_CLK1_COMM
PROJECT : LX89
R360 .01U/16V_4 C70
10U/6.3V_6S
C78
10U/6.3V_6S
C199
10U/6.3V_6S
C628
10U/6.3V_6S
C562
10U/6.3V_6S
C709
10U/6.3V_6S
C657
10U/6.3V_6S
C340
10U/6.3V_6S
C260
10U/6.3V_6S
C359
10U/6.3V_6S
Quanta Computer Inc.
56.2/F_4
Size Document Number Rev
VMB_CLK1# Custom VRAM-B 1A
NB5/RD2
Date: Monday, September 28, 2009 Sheet 23 of 46
5 4 3 2 1
1 2 3 4 5 6 7 8

+VIN 31,37,38,39,40,41,42,43
+12VALW 33,35,40,41,42
+3V 2,3,5,6,7,10,11,12,13,14,15,16,25,26,27,28,29,30,31,32,33,34,35,36,42
+3V_DELAY 18,19,20,21,26,27
+5V 25,26,27,28,29,33,34,35,42
L53 FBM2125 HM330-T(4A,0.015)_8
+VIN_BLIGHT
+12VALW

C539
+3V
24
+VIN
R320 AO3404 ID 0.1U/10V_4
current
C518 C4 C2 C520 C3 330K_6 5.8A

3
0.1U/50V_6 0.01U/50V_4 0.1U/50V_6 *10U/25V_12 0.1U/50V_6 +5V N-MOS,5.8A
Q27 +3VLCD
AO3404
A LCDONG 2 A

R321

3
R322
100K/F_4

1
22_8
2

1
L6 +3VLCD_CON C532
+3VLCD
PBY201209T-4A_8 C32
1 210U/6.3V_8 Q24 Q26 LCDDISCHG

3
C31
1 2*0.1U/10V_4 PDTC144EU 2N7002E 0.1U/10V_4

2
C30
1 20.01U/16V_4

3
26 DISP_ON 2

LCDON# 2 Q25

1
R314 2N7002E
2.2K_4

1
R303 75/F_6 +LOGO_PWR1
+5V

C523

G_0
1000P/50V_4 +3VLCD_CON 1
2
26 EDIDCLK 3
B
26 EDIDDATA 4 B
+3V 5
26 TXLOUT0- TXLOUT0-
TXLOUT0+ 6
26 TXLOUT0+ 7
C528 TXLOUT1- 8
26 TXLOUT1- 9
From Switch 1000P/50V_4 26 TXLOUT1+ TXLOUT1+
10 G_1
D20 CH501H-40PT DPST_PWM R311 1K/F_4 TXLOUT2- 11
26 DPST_PWM 26 TXLOUT2- 12
PN_BLON 2 1 BLONCON C522 22P/50V_4 26 TXLOUT2+ TXLOUT2+
13
R304 33K_6 TXLCLKOUT- 14
+3VPCU 26 TXLCLKOUT- 15
R300 100K/F_4 PWM_VADJ R305 *1K/F_4 VADJ1 TXLCLKOUT+
26,36 PWM_VADJ 26 TXLCLKOUT+ 16
LVDS_BLON R306 1K/F_4 LID_EC# TXUOUT0- 17
26 LVDS_BLON 2 LID_EC# 35,36 From EC 26 TXUOUT0- 18 G_2
C526 C524 26 TXUOUT0+ TXUOUT0+
PN_BLON *4.7U/6.3V_6 22P/50V_4 19
3 20
26 TXUOUT1- TXUOUT1-
TXUOUT1+ 21
1 HWPG 36,37,38,40,41,42 Vari bright function 26 TXUOUT1+ 22
3

D21 TXUOUT2- 23
26 TXUOUT2- 24 G_3
LCD_BK 2 BAT54A 26 TXUOUT2+ TXUOUT2+
14 LCD_BK 25
Q23
TXUCLKOUT- 26
26 TXUCLKOUT- 27
*PDTC144EU 26 TXUCLKOUT+ TXUCLKOUT+
1

+LOGO_PWR1 28
DIGITAL_D1 29
29 DIGITAL_D1 30
DMIC 29 DIGITAL_CLK
DIGITAL_CLK L54 BK1608HS601-T_6 DIGITAL_CLK_L
31 G_4
+3.9V-CAMARA 32
4 3 USBP2-
13 USBP2- 33
1 2 USBP2+
C CAMERA 13 USBP2+ 34 C
L1 *WCM2012-90 VADJ1 35
BLONCON 36
+VIN_BLIGHT 37
38
39
40

G_5
CAMERA POWER CN4
GS12407-11141-9H

+5V +3.9V-CAMARA DFHS40FS034


Digitizer Connector
GS12407-11141-9H
+5V R299
*0_6 CN5
U16 L7 FWE 1 1
3 4 USBP1+ 4 3 USBP1+ 2
VIN VOUT 13 USBP1+ USBP1- USBP1- 2
13 USBP1- 1 2 3 3
4 4
*WCM2012-90 5
C519 C521 5
1 6
SHDN R1 R301 14 DGT_STOP# DGT_STOP# 7
6
7
1U/10V_4 *215K/F_4 4.7U/6.3V_6 D5 D6 DGT_RESET 8
14 DGT_RESET 8
9
1

+3V 9
2 5 GND 10
GND SET 10
2

YB9210ST25R390
D *PJSD05TS *PJSD05TS TS-FFC-connect D
R302
R2 *100K/F_4
50281-0100n-001-10p-l
DFHD10MR044
PROJECT : LX89
Vout=1.25(1+R1/R2) Quanta Computer Inc.
Size Document Number Rev
Custom 1A
LCD CONN
NB5/RD2
Date: Monday, September 28, 2009 Sheet 24 of 46
1 2 3 4 5 6 7 8

Vout=1.25(1+R1/R2)
5 4 3 2 1

CRT PORT
+3V 2,3,5,6,7,10,11,12,13,14,15,16,24,26,27,28,29,30,31,32,33,34,35,36,42
+5V 24,26,27,28,29,33,34,35,42

25
C11
+3V_DELAY 18,19,20,21,26,27
0.1U/10V_4
+5VCRT

F1 40 mils 40 MIL
+5VCRT SI Add D31~D37 for ME height limit
R19 for UMA use 140 ohm +5V 2 1 DFDS15FR148

16
for DIS+PowerExpress use 150 ohm (AMD) FUSE1A6V_POLY dsub-070546fr015s22fzr-15p-v
6
CRT_R L5 BK1608LL680(0.2A,68)_6 CRT_R1 1 11
7 +3V
D CRT_G L4 BK1608LL680(0.2A,68)_6 CRT_G1 2 12 D
8 D31 *BAV99W
CRT_B L3 BK1608LL680(0.2A,68)_6 CRT_B1 3 13 1 CRT_R1
9 3
4 14
10 2
R19 R18 R10 C34 C29 C20 C22 C28 C33 5 15

150/F_4 150/F_4 150/F_4 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6 D32 *BAV99W

17
1 CRT_G1
CRT CONN 3
close conn CN18
2
within 600mils
CRT_R
26 CRT_R CRT_G D33 *BAV99W
26 CRT_G
CRT_B R3 *0_4/S CRTDDCCLK2
26 CRT_B 1 CRT_B1
R5 33_4 CRTVSYNC 3

CRTHSYNC +5V 2
Del U19,C534,C535 add U46,U47,Q35,Q36 for ME height limit R7 33_4

SI +5V R14 *0_4/S CRTDDCDAT2 D34 *BAV99W

PR_VSYNC 1 DDCCLK2
3
PR_HSYNC
C8 C12 C16 C25 2
5

C536 0.1U/10V_4
U46 *470P/50V_4 *47P/50V_4 *47P/50V_4 *47P/50V_4 D35 *BAV99W
C C
1 CRTVSYNC
26 VSYNC_COM
2 4 3
AHCT1G125DCH
2
5

D36 *BAV99W
U47 AHCT1G125DCH
1 CRTHSYNC
3
26 HSYNC_COM 2 4
2
+3V
D37 *BAV99W
1
2

DDCDAT2
3
DDCCLK 1 3
26 DDCCLK 2
Q35
2N7002E DDCCLK2
+3V

DDCDAT2
2

DDCDATA 1 3 R4 R15
26 DDCDATA
Q36 6.81K_4 6.81K_4
2N7002E
B B

+5VCRT
+5VCRT 2 1 +5V_CRT2 HOLE H8 H4
*H-C217D63P2 *H-C217D63P2

CH501H-40PT D22

1
H19 H17 H15 H1 H3 H14 H5 H16
*H-TC315BC354D118P2 *H-TC315BC354D118P2 *H-TC315BC354D118P2

*H-TC315BC354D118P2 *H-TC315BC354D118P2 *H-TC315I138BC354D118P2 *h-tc315i138bc354d118p2

1
*H-TC315I138BC354D118P2

H13 H9 H12 H6 H10 H11


*H-TC276I169BC197D150P2 *H-TC276I169BC197D150P2 *H-TC276I169BC197D150P2 H18 H2 *H-TC236BC354D130P2
*H-TC236BC354D130P2

*H-TC276I169BC197D150P2 *H-TC276I169BC197D150P2 *H-TC276I169BC197D150P2

1
A A

H7

PROJECT : LX89
*h-tc315i138bc354d118p2 Quanta Computer Inc.
1

Size Document Number Rev


Custom 1A
CRT&HOLE
NB5/RD2
Date: Monday, September 28, 2009 Sheet 25 of 46
5 4 3 2 1
A B C D E

+1.8V

For Single-link panel


LVDS Channel Switch +3V_DELAY R49 4.7K_4 EXT_EDIDCLK
LVDS/CRT DDC Switch +3V R53 4.7K_4 INT_EDIDCLK
26

42
40
30
20
18
13
IGPU_Channel-A

8
5
U2 R46 4.7K_4 EXT_EDIDDATA R56 4.7K_4 INT_EDIDDATA

VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
10 LA_CLK 38 0B1 U22
10 LA_CLK# 37 1B1 SELx Ay
10 INT_EDIDCLK 2 IA0
10 LA_DATAP2 36 2B1 HIGH B2 19 EXT_EDIDCLK 3 IA1 OPTION SIGNAL FROM NB to LVDS/CRT for UMA
10 LA_DATAN2 35 3B1 10 INT_EDIDDATA 5 IB0 YA 4 EDIDCLK 24
LOW B1 6 7 RP15 *0_4P2R_4
4 19 EXT_EDIDDATA IB1 YB EDIDDATA 24 INT_EDIDCLK 4
10 LA_DATAP1 29 4B1 10 INT_DDCCLK 11 IC0 YC 9 DDCCLK 25 3 4 EDIDCLK
28 10 12 INT_EDIDDATA 1 2 EDIDDATA
10 LA_DATAN1 5B1 19 EXT_DDCCLK IC1 YD DDCDATA 25 INT_DDCCLK
10 INT_DDCDATA 14 ID0 3 4 DDCCLK
27 2 follow AMD 13 INT_DDCDATA 1 2 DDCDATA
10 LA_DATAP0 6B1 A0 TXLCLKOUT+ 24 19 EXT_DDCDATA ID1
26 3 1 16
10 LA_DATAN0 7B1 Pericom A1 TXLCLKOUT- 24 reference 10 PE_GPIO2
15
SEL VCC
8
+5V
RP14 *0_4P2R_4
schematic change /E GND

1
C540
DGPU_Channel-A PI2PCIE412-DZHE for reduce 74CBT3257
6 leakage to VDDR3 .1U/10V_4
TXLOUT2+ 24

2
A2
A3 7 TXLOUT2- 24 BUS
19 EXT_TXLCLKOUT+ 34 0B2
19 EXT_TXLCLKOUT- 33 1B2
+3V_DELAY R40 4.7K_4 EXT_DDCCLK +3V R34 4.7K_4 INT_DDCCLK
32 11 R38 4.7K_4 EXT_DDCDATA R32 4.7K_4 INT_DDCDATA
19 EXT_TXLOUT2+ 2B2 A4 TXLOUT1+ 24
19 EXT_TXLOUT2- 31 3B2 A5 12 TXLOUT1- 24
25
19 EXT_TXLOUT1+
19 EXT_TXLOUT1- 24
4B2
5B2
15
VGA Switch
A6 TXLOUT0+ 24 U23
19 EXT_TXLOUT0+ 23 6B2 A7 16 TXLOUT0- 24
19 EXT_TXLOUT0- 22 7B2
10 INT_CRT_R 24 IA0 YA 2 CRT_R 25
10 INT_CRT_G 22 IB0 YB 5 CRT_G 25
GND-THERMAL

SEL FUNCTION 10 INT_CRT_B 18 IC0 YC 6 CRT_B 25


10 INT_HSYNC_COM 17 ID0 YD 8 HSYNC_COM 25
10 PE_GPIO2 R319 9 HIGH DGPU 10 INT_VSYNC_COM 14 11 OPTION SIGNAL FROM NB to CRT for UMA
SEL IE0 YE VSYNC_COM 25
GND08
GND07
GND06
GND05
GND04
GND03
GND02
GND01
GND00
8.25K/F_4 LOW IGPU 19 EXT_CRT_R 23 INT_CRT_R R342 *0_4 CRT_R
IA1 PE_GPIO2 INT_CRT_G R341 *0_4 CRT_G
19 EXT_CRT_G 21 IB1 SEL 12 PE_GPIO2 10
R317 16 INT_CRT_B R340 *0_4 CRT_B
3
19 EXT_CRT_B IC1 3
10K/F_4 19,20 EXT_HSYNC_COM 15 INT_HSYNC_COM 3 4 HSYNC_COM
43

41
39
21
19
17
14
10
4
1

ID1 +3V INT_VSYNC_COM


PI2PCIE412-DZHE 19,20 EXT_VSYNC_COM 13 IE1 1 2 VSYNC_COM
RP16
20 1 *0_4P2R_4
LVDS Channel Switch 10
GND VDD3
4
GND VDD3

1
7 GND VDD3 9
+1.8V 3 19 C557 C543
GND VDD3 .1U/10V_4 .1U/10V_4

2
PI3V512
IGPU_Channel-B
42
40
30
20
18
13
8
5

U1 PI2PCIE412-DZHE
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1

10 LB_CLK 38 0B1
10 LB_CLK# 37 1B1
SELx Ay
10 LB_DATAP2 36 2B1 DIS Change Vari bright function from EC control
10 LB_DATAN2 35 3B1 HIGH B2 +5V
10 LB_DATAP1 29
28
4B1 LOW B1
SI
DPST Control
10 LB_DATAN1 5B1 U17
27 2 R308 0_4 5 6 PE_GPIO2
10 LB_DATAP0 6B1 A0 TXUCLKOUT+ 24 24,36 PWM_VADJ VCC SEL PE_GPIO2 10
26 3
10 LB_DATAN0 7B1 Pericom A1 TXUCLKOUT- 24
19 EXT_DPST_PWM R310 *0_4 1 4 DPST_PWM 24 OPTION DPST SIGNAL FROM NB to LVDS for UMA
IN_B1 A
DGPU_Channel-B PI2PCIE412-DZHE 10 INT_DPST_PWM 3 IN_B0 GND 2
6 INT_DPST_PWM R312 *0_4 DPST_PWM
A2 TXUOUT2+ 24
A3 7 TXUOUT2- 24
2 34 NLASB3157DFT2G 2
19 EXT_TXUCLKOUT+ 0B2
19 EXT_TXUCLKOUT- 33 1B2 SEL FUNCTION(COM)
19 EXT_TXUOUT2+ 32 2B2 A4 11 TXUOUT1+ 24 LOW IN_B0 to A
19 EXT_TXUOUT2- 31 3B2 A5 12 TXUOUT1- 24
HIGH IN_B1 to A
25
19 EXT_TXUOUT1+
19 EXT_TXUOUT1- 24
4B2
5B2
15
Back Light On conrtol
A6 TXUOUT0+ 24
19 EXT_TXUOUT0+ 23 6B2 A7 16 TXUOUT0- 24
22 U18
19 EXT_TXUOUT0- 7B2
5 6 PE_GPIO2
VCC SEL PE_GPIO2 10
GND-THERMAL

SEL FUNCTION 19 EXT_LVDS_BLON 1 IN_B1 A 4 LVDS_BLON 24 OPTION Back Light SIGNAL FROM NB to LVDS for UMA
10 PE_GPIO2 R307 9 HIGH DGPU 3 2
SEL 10 INT_LVDS_BLON IN_B0 GND INT_LVDS_BLON R313 *0_4 LVDS_BLON
GND08
GND07
GND06
GND05
GND04
GND03
GND02
GND01
GND00

8.25K/F_4 LOW IGPU


NLASB3157DFT2G
R309
10K/F_4
43

41
39
21
19
17
14
10
4
1

OPTION SIGNAL FROM NB to LVDS for UMA


+1.8V LA_CLK 1 2 TXLCLKOUT+
LA_CLK# 3 4 TXLCLKOUT-
LA_DATAP0 RP10 1 2 *0_4P2R_4 TXLOUT0+
LA_DATAN0
LA_DATAP1
3
RP13 1
4 TXLOUT0-
2 *0_4P2R_4 TXLOUT1+
LCDVcc control
LA_DATAN1 3 4 TXLOUT1- OPTION LCDVCC SIGNAL FROM NB to LVDS for UMA
LA_DATAP2 RP12 1 2 *0_4P2R_4 TXLOUT2+
1 LA_DATAN2 TXLOUT2- U20 1
3 4
RP11 *0_4P2R_4 5 6 PE_GPIO2 INT_DISP_ON R318 *0_4 DISP_ON
VCC SEL PE_GPIO2 10
C529 C538 C525 C531 C533 LB_CLK 1 2 TXUCLKOUT+
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 LB_CLK# 3 4 TXUCLKOUT- 1 4
RP6 1 19 EXT_DISP_ON IN_B1 A DISP_ON 24
LB_DATAP0 2 *0_4P2R_4 TXUOUT0+
LB_DATAN0 3 4 TXUOUT0- 3 2
10 INT_DISP_ON IN_B0 GND
LB_DATAP1
LB_DATAN1
RP9 1
3
2
4
*0_4P2R_4 TXUOUT1+
TXUOUT1- PROJECT : LX89
LB_DATAN2
LB_DATAP2
RP8 3
1
4 *0_4P2R_4 TXUOUT2-
2 TXUOUT2+
NLASB3157DFT2G Quanta Computer Inc.
RP7 *0_4P2R_4
+5V 24,25,27,28,29,33,34,35,42
Size Document Number Rev
+3V 2,3,5,6,7,10,11,12,13,14,15,16,24,25,27,28,29,30,31,32,33,34,35,36,42 Custom
LVDS/CRT Hyper_switch 1A
+1.8V 5,8,10,11,16,42
NB5/RD2
Date: Monday, September 28, 2009 Sheet 26 of 46
A B C D E
5 4 3 2 1

+3V_DELAY HDMI HPD SENSE


UMA use +3V for the detect pin
Dis use +3V_DELAY for the detect pin R78
10K/F_4
+3V

R82
27
19 EXT_TMDS_HPD 10K/F_4

3
Q10
2N7002E
2

3
D +3V D
Q11
UMA/DISCRETE select for HDMI 2N7002E
R100

1
2 HDMI_DET_R HDMI_DET
for Layout for Layout 10K/F_4
From RS880M concern Swap pin for Layout concern R354
200K/F_4
,placement close ,placement close R99

1
north bridge SI HDMI conn 10 INT_TMDS_HPD
R353 0_4 200K/F_4

3
RP3 Q29
C_PEG_TX#15 C366 *0.1U/10V_4 TX2_HDMI+L TX2_HDMI+L 1 2 TX2_HDMI+ 2N7002E
9 C_PEG_TX#15
C_PEG_TX15 C365 *0.1U/10V_4 TX2_HDMI-L TX2_HDMI-L 3 4 TX2_HDMI- 2
9 C_PEG_TX15 *0_4P2R_4
RP2
C_PEG_TX#14 C361 *0.1U/10V_4 TX1_HDMI+L TX1_HDMI-L 3 4 TX1_HDMI-
9 C_PEG_TX#14 C_PEG_TX14 C358 *0.1U/10V_4 TX1_HDMI-L TX1_HDMI+L 1 2 TX1_HDMI+
9 C_PEG_TX14 *0_4P2R_4
RP4

1
C_PEG_TX#13 C352 *0.1U/10V_4 TX0_HDMI-L TX0_HDMI+L 1 2 *0_4P2R_4 TX0_HDMI+
9 C_PEG_TX#13
C_PEG_TX13 C348 *0.1U/10V_4 TX0_HDMI+L TX0_HDMI-L 3 4 TX0_HDMI-
9 C_PEG_TX13
RP5
C_PEG_TX#12 C344 *0.1U/10V_4 TXC_HDMI-L TXC_HDMI-L 3 4 *0_4P2R_4 TXC_HDMI-
9 C_PEG_TX#12
C_PEG_TX12 C335 *0.1U/10V_4 TXC_HDMI+L TXC_HDMI+L 1 2 TXC_HDMI+
9 C_PEG_TX12

UMA AND DISCRETE HDMI I2C SELECT


Close to HDMI Connector
From Park-M2
TX2_HDMI_L- C656 0.1U/10V_4 TX2_HDMI- *0_4P2R_4
19 TX2_HDMI_L-
TX2_HDMI_L+ C652 0.1U/10V_4 TX2_HDMI+ RP1 3 4 HDMI_SDATA
C 19 TX2_HDMI_L+ 10 HDMI_DDC_DATA C
1 2 HDMI_SCLK
10 HDMI_DDC_CLK
TX1_HDMI_L- C648 0.1U/10V_4 TX1_HDMI- for Layout
19 TX1_HDMI_L-
TX1_HDMI_L+ C642 0.1U/10V_4 TX1_HDMI+
19 TX1_HDMI_L+
TX0_HDMI_L- C660 0.1U/10V_4 TX0_HDMI-
concern
,placement close Discrete DDC1 is 5V UMA
19 TX0_HDMI_L-
TX0_HDMI_L+ C664 0.1U/10V_4 TX0_HDMI+ HDMI conn tolerance , the MOSFET +3V_DELAY +3V
19 TX0_HDMI_L+ +5V
level shifter no need
TXC_HDMI_L- C669 0.1U/10V_4 TXC_HDMI-
19 TXC_HDMI_L-
TXC_HDMI_L+ C674 0.1U/10V_4 TXC_HDMI+
UMA DDC is 3V R61 R62
19 TXC_HDMI_L+ tolerance,the MOSFET 4.7K_4 *4.7K_4
level shifter is need

2
R411 499/F_4 TX2_HDMI+ 1 3 HDMI_SCLK
19 HDMI_SCL
R412 499/F_4 TX2_HDMI-
+5V +3V_DELAY +3V
UMA RS880M Q8
3

R405 499/F_4 TX1_HDMI+


Q30
2N7002E R410 499/F_4 TX1_HDMI-
上 715 ohm CS17152FB17 2N7002E DIS
2 R77 R73 +5V
R414 499/F_4 TX0_HDMI+
DIS Park-M2 4.7K_4 *4.7K_4

R413 499/F_4 TX0_HDMI- 上 499 ohm CS14992FB24

2
1

R416 R417 499/F_4 TXC_HDMI+


1 3 HDMI_SDATA

100K/F_4
R415 499/F_4 TXC_HDMI- Close to HDMI Connector 19 HDMI_SDA

B Q9 B
2N7002E

HDMI PORT
+5V_HDMVCC +5V_HDMVCC CN25
SHELL1 20
TX2_HDMI+ 1 21
D2+ SHELL2
2

TX2_HDMI- 3
D23 D24 TX1_HDMI+ D2-
4 D1+
CH501H-40PT TX1_HDMI- 6
TX0_HDMI+ D1-
7 D0+
TX0_HDMI- 9
1

CH501H-40PT D0-
D2 Shield 2
D1 Shield 5
R395 R398 8
2K_4 2K_4 TXC_HDMI+ D0 Shield
10 CK+ CK Shield 11
TXC_HDMI- 12 17
HDMI_SCLK HDMI_SDATA CK- GND

HDMI_SCLK 15 13
HDMI_SDATA DDC CLK CE Remote
16 DDC DATA NC 14

FUSE1A6V_POLY 1A
A 2 1 +5V_HDMVCC 18 A
+5V +5V
F2
C638 *0.1U/10V_4
+5V 24,25,26,28,29,33,34,35,42
HDMI_DET 19
+3V 2,3,5,6,7,10,11,12,13,14,15,16,24,25,26,28,29,30,31,32,33,34,35,36,42 HP DET
+3V_DELAY 18,19,20,21,26
HDMI CONN
PROJECT : LX89
DFHD19MR041 Quanta Computer Inc.
hdmi-100042gr019s168-19p-ldv-v
Size Document Number Rev
Custom 1A
HDMI
NB5/RD2
Date: Monday, September 28, 2009 Sheet 27 of 46
5 4 3 2 1
8 7 6 5 4 3 2 1

XTAL control pin for


12Mhz crystal or 48Mhz
clk in
+3VSUS R512 *10K/F_4
SI
U43
XD_CLE 43 SP19
SP18
Note:

SP1
SP2
SD/MMC

SD_WP
MS XD

XD_CD#
SP7
SP6
SP8
SP16
SP5
SP15
R528
R524
R531
R579
R522
R578
0_4
0_4
0_4
0_4
0_4
0_4
MS-D0_SD-D0_XD-D6
MS-D1_XD-D3_SD_D1
MS-D2_XD-D2
XD-RE#_SD-D2
MS-BS_XD-D5
SD-D3_XD-WE
28
XD_CE# 42
13 41 SP17 SP3 SD_CD# SP11 R569 0_4 SD_CLK_MS_CLK
XTAL_CTR XD_ALE
Del R512 for Internal 12MHz 14 GPIO0
SP4 SD_DAT1 XD_D4
15 40 SP16 SP5 MS_BS XD_D5 SP2 R511 0_4 SD_WP
EEDO SD_DAT2/XD_RE# SP15 SP6 MS_D1 XD_D3 SP13 R576 0_4 XD-WP#
16 EECS SD_DAT3/XD_W E# 39
17 38 SP14 SP7 SD_DAT0 MS_D0 XD_D6 SP19 R582 0_4 XD-CLE
EESK XD_RDY SP13 SP8 SD_DAT7 MS_D2 XD_D2 SP4 R510 0_4 XD-D4
18 EEDI SD_DAT4/XD_W P#/MS_D7 37
D XD_CD# 19 SP9 MS_INS# SP10 R537 0_4 MS-D3_XD-D7 D
SP2 XD_CD# SD_CMD_R SP10 SD_DAT6 MS_D3 XD_D7 SP14 R577 0_4 XD-RB#
SD_CD#
20 SD_W P SD_CMD 36
SP12
AL005159B00 -->RTS5159GR SP12 XD-D0
21 35 SP11 SD_CLK MS_SCLK XD_D1 R570 0_4
SD_CD# SD_DAT5/XD_D0/MS_D6 SP11 SP12 SD_DAT5 XD_D0 SP17 R580 0_4 XD-ALE
22 MS_D4 SD_CLK/XD_D1/MS_CLK 34
SP4 23 31 SP10 SP13 SD_DAT4 XD_WP# SP18 R581 0_4 XD-CE#
SD_DAT1/XD_D4 SD_DAT6/XD_D7/MS_D3 SP14 XD_R/B# SD_CMD_R R571 0_4 SD-CMD
24 MS_D5 NC 30
29 MS_CD# SP15 SD_DAT3 XD_WE#
R552 6.19K/F_4 RREF MS_INS# SP8 SP16 SD_DAT2 XD_RE#
2 RREF SD_DAT7/XD_D2/MS_D2 28
27 SP7 SP17 XD_ALE
SD_DAT0/XD_D6/MS_D0 SP6 SP18 XD_CE#
XD_D3/MS_D1 26
25 SP5 SP19 XD_CLE
XD_D5/MS_BS
13 USBP11- 4 DM
13 USBP11+ 5 DP AV_PLL_IN 1
C870 Vreg out 1.8V C857 Close to Chipset
0.1U/10V_4 from Internal SP11
C875 5.6P/50V_4 CLK_48M_CR 3.3VLDO 1U/10V_4
48 12MHZ_XTLO
2

12MHz 10 VREG R527 Can not more than 10p


R573 VREG_OUT +3VSUS_RTS *0_8/S C869
5V_IN 8 +3VSUS
270K_4 Y7 3 *5.6P/50V_4
NC C861 C862
33
1

XTLI D3V3_ IN 0.1U/10V_4 4.7U/6.3V_6


47 12MHZ_XTLI
C876 5.6P/50V_4 0.1U/10V_4 C864
BG612000717
D3V3_IN 11 +3VSUS
MODE_SEL 45 0.1U/10V_4 C856 C851
MODE_SEL 4.7U/6.3V_6
R585
7 +3VCARD
C *0_4 NC C
9 5159_RST# R583 *0_4/S 5159_RST_R#
CARD_3V3_OUT +3VCARD 5159_RST_R# 13

AG33 6
46 C858 C847 C848 C849
AG_PLL
DGND2 32
R584 *100K/F_4 5159_RST# 44 12 1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
+3VSUS RST# DGND1
C882 RTS5159 max output current for ..
Internal have pull Hi 200K XD card 250mA
1U/10V_4 Realtek RTS5159 SD/MMC 250mA
MS/MSPRO 250mA

+3VCARD +3VCARD +3VCARD

CPU FAN G991 /FON


+5V

signal have C542 1U/10V_4


CN15
XD-RB# 1 20 MS-D1_XD-D3_SD_D1 internal
R298 XD-RE#_SD-D2 XD-R/B MS-DATA1 MS-BS_XD-D5 pull Hi to
2 XD-RE MS-BS 21
XD-CE# 3 22 VIN , R420 R334
XD-CLE XD-CE 4IN1-GND2 +3V
4 XD-CLE SD-VCC 23 maybe can
*10K/F_4 XD-ALE 5 24 SD_CLK_MS_CLK 10K/F_4 U3
B SD-D3_XD-WE XD-ALE SD-CLK MS-D0_SD-D0_XD-D6 remove +5VFAN1 B
6 XD-W E SD-DAT0 25 2 VIN VO 3
XD-WP# 7 26 MS-D2_XD-D2 R339 5
XD-D0 XD-W P XD-D2 MS-D1_XD-D3_SD_D1 FAN_SMBALERT# GND
8 XD-D0 XD-D3 27 4.7K_6 1 /FON GND 6
SP11 9 28 XD-D4 7
XD-RE#_SD-D2 XD-D1 XD-D4 XD-D4 GND
10 SD-DAT2 SD-DAT1 29 36 FAN1ON 4 VSET GND 8
SD-D3_XD-WE 11 30 MS-BS_XD-D5
SD-DAT3 XD-D5 36 FAN1SIG
SD-CMD 12 31 MS-D0_SD-D0_XD-D6 FANPWR = 1.6*VSET G991PV11
SD-CMD XD-D6 MS-D3_XD-D7
13 4IN1-GND1 XD-D7 32
CN20
14 MS-VCC XD-VCC 33 30 mil
SD_CLK_MS_CLK 15 34 XD_CD# +5VFAN1 1
MS-D3_XD-D7 MS-SCLK XD-CD-SW SD_WP 1
16 MS-DATA3 SD-W P-SW 35 2 2
MS_CD# 17 36 SD_CD# 3 4 8 7 6 5 G991 layout notice
MS-D2_XD-D2 MS-INS SD-CD-SW C545 C544 3 4
18 MS-DATA2
MS-D0_SD-D0_XD-D6 19 FAN CONN Gnd shape
MS-DATA0 2.2U/6.3V_6 0.1U/10V_4
C517 37
SHIELD1-GND
*270P/25V_4 SHIELD2-GND 38 DFHD03MR026
39 1 2 3 4
BOS
BOS 40 footprint: "85205-03xx-3p-l"
CARD READER SOCKET

5 IN1 CARD-READER (PUSH-PUSH)


Support SD/SD PRO/MMC/MS/MS PRO/xD Cards
DFHD36MR005
4in1-cm4s-125-36p-r-v +5V 24,25,26,27,29,33,34,35,42
A +3V 2,3,5,6,7,10,11,12,13,14,15,16,24,25,26,27,29,30,31,32,33,34,35,36,42 A
+3VSUS 13,33,34,35,41,42
+3VCARD

+3VCARD

C512 R297
2.2U/6.3V_6 150K/F_4
C511 C508 C850
PROJECT : LX89
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 Quanta Computer Inc.
CLOSE CONN
Size Document Number Rev
Custom 1A
RTS5159&CPU FAN
NB5/RD2
Date: Monday, September 28, 2009 Sheet 28 of 46
8 7 6 5 4 3 2 1
A B C D E

Close to CODEC 200mil

29
2,3,5,6,7,10,11,12,13,14,15,16,24,25,26,27,28,30,31,32,33,34,35,36,42 +3V
24,25,26,27,28,33,34,35,42 +5V
+5V
+5V_AVDD

L76
BLM18PG181SN1D(180,1.5A)_6

Close to CODEC 200mil


C827
+3V_DVDD_CORE C808 C824
+3V 10U/6.3V_6S 1U/6.3V_4 .1U/10V_4 >40mils trace
C803 C807 C804
C825 C822 10U/6.3V_6S C806
1U/6.3V_4 .1U/10V_4 U41 1U/6.3V_4 .1U/10V_4 10U/6.3V_6S
AGND
1 DVDD_CORE AVDD 27
AVDD 38
+3V 9 DVDD AGND
PVDD 39
3 DVDD_IO PVDD 45

C813 13 SENSE_A SENSE_A R498 2.49K/F_4 +5V_AVDD


PORT PLACE TO
R493 0_4 HD_BCLK SENSE_A SENSE_B
13 BIT_CLK_AUDIO 6 HDA_BITCLK SENSE_B 14 MONO_OUT X
.1U/10V_4 AGND
R494 22_4 HD_SDIN0 8 TO Audio Jack MIC C834 1000P/50V_4
13 ACZ_SDIN0 HDA_SDI
28 MIC_L PORT A External MIC
HP0_PORT_A_L MIC_L 30
R492 0_4 HD_SDOUT 5 29 MIC_R SENSE_B
13 ACZ_SDOUT_AUDIO
C819 *10P/50V_4 HDA_SDO HP0_PORT_A_R VREFOUT_B_L
MIC_R 30
R499 100K/F_4
+5V_AVDD PORT B HP OUT
HDA Bus R495 0_4 HD_SYNC 10
VREFOUT_A_or_F 23 VREFOUT_B_L 30
13 ACZ_SYNC_AUDIO
C828 *10P/50V_4 HDA_SYNC
31 HPOUT_L C835 *1000P/50V_4
AGND PORT C Internal MIC
HP1_PORT_B_L HPOUT_L 30
11 32 HPOUT_R
13 ACZ_RST#_AUDIO HDA_RST# HP1_PORT_B_R HPOUT_R 30 PORT D Internal Speckers
PORT_C_L 19 TO Headphone jack PLACE CLOSE TO PIN 13,14 within 500mil
C809 *10P/50V_4 20
PORT_C_R
TO Digital MIC R490 100/F_4DMIC_CLK_R VREFOUT_C 24
6/17
24 DIGITAL_CLK 2 DMIC_CLK/GPIO1
24 DIGITAL_D1 DIGITAL_D1 4 40 L_SPK+
C817 *10P/50V_4 DMIC0/GPIO2 SPKR_PORT_D_L+ L_SPK-
SPKR_PORT_D_L- 41
IDT_GPIO0 +5V
46 DMIC1/GPIO0/SPDIF_OUT_1 R_SPK-
TO Internal Speakers
SPKR_PORT_D_R- 43
R489 *10K/F_4 48 44 R_SPK+ Changed by IDT recommend
+3V SPDIF_OUT_0 SPKR_PORT_D_R+
36 VOLMUTE# D26 RB500V-40 EAPD 47 15
EAPD PORT_E_L R497
PORT_E_R 16
31 EAPD 10K/F_4
CAP- 17
PORT_F_L C831 C830
35 18
Close to CODEC 200mil CAP- PORT_F_R
1

C816 .1U/10V_4 .1U/10V_4


4.7U/6.3V_6 12 AMP_BEEP AMP_BEEP_L R496 47K_4 AMP_BEEP_R2
PC_BEEP
36
2

CAP+

3
BIT_CLK_AUDIO ACZ_SDIN0 CAP+ 25 BASS_OUT
MONO_OUT BASS_OUT 31
7 R500
DVSS C833 2 ACZ_SPKR 13
1 33 22 ADC_CAP2 10K/F_4 1
C821 C823 AVSS CAP2 .1U/10V_4 2N7002E
30 AVSS
*27P/50V_4 27P/50V_4 26 21 ADC_VREFFILT Q34
AVSS VREFFILT 6/17

1
42 34 ADC_V-
FOR EMI PVSS V-
49 37 ADC_VREG
DAP VREG AGND

EMI Request 92HD80Bx

1
AGND C805 C818 C838 C837
Change P/N to AL80B1X5001 Close to CODEC 200mil
4.7U/6.3V_6 10U/6.3V_6S 10U/6.3V_6S 1U/6.3V_4

2
MUTE_LED +3V AGND AGND AGND AGND
Low -->MUTE
H=2.0 footprint: "3800-X04N-00X-4P-L"
High-->un-Mute
R208
*100K/F_4
INT. SPEAKER DFHD04MR142

INT SPEAKER CONN


L_SPK+ R294 0_6 L_SPK+_R
35 MUTE_LED# 1
L_SPK- R293 0_6 L_SPK-_R
R_SPK- R296 0_6 R_SPK-_R 2
R_SPK+ R295 0_6 R_SPK+_R 3
R221 10K/F_4 4
+3V CN13
3

Q16
VOLMUTE# 2 2N7002E C509
D14 *1000P/50V_4 C510 C506
3 BAT54A MUTE_LED_R 2
+5V +5V *1000P/50V_4
IDT_GPIO0 1 R602 0_6
R244 39.2K/F_4 SENSE_A *1000P/50V_4 C507
R245
SENSE_A *1000P/50V_4 R487 0_6
1

20K/F_4
R261 R501 0_6
47K/J_4 R262
3

3
Q18 47K/J_4 Q17 AGND
DMN601K-7 DMN601K-7
AGND
2 2
30 SENSE_PHONE 30 SENSE_MIC
1

AGND AGND
PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Azalia 92HD80
NB5/RD2
Date: Monday, September 28, 2009 Sheet 29 of 46
A B C D E
1 2 3 4 5 6 7 8

Note: JACK_SEN# is electrically floating when no jack is inserted


and shorted to ground when jack is present.
33,34,36,37,38,39,40,41,42,43 +5VPCU
2,3,5,6,7,10,11,12,13,14,15,16,24,25,26,27,28,29,31,32,33,34,35,36,42 +3V
30
normal CLOSE Line out
CN30
A 1 A
R254 16_4 HPOUT_L1 L50 BK1608HM241 HPOUT_L2 2
29 HPOUT_L
6
29 HPOUT_R R240 16_4 HPOUT_R1 L41 BK1608HM241 HPOUT_R2 3
4
5

SUY_010030HR006G321ZL
C481 C448
1000P/50V_4 1000P/50V_4 C491 C443
0.1U/10V_4 0.1U/10V_4
DFTJ06FR269
audio-010030hr006g121zl-6p-v
AGND

AGND

SENSE_PHONE
29 SENSE_PHONE

Note: JACK_SEN# is electrically floating when no jack is inserted


and shorted to ground when jack is present.

29 VREFOUT_B_L VREFOUT_B_L normal CLOSE


B B
R216
4.7K_4
R211
4.7K_4
C431
*1U/6.3V_4 MIC
C436 100P/50V_4
AGND
CN29
AGND 1
MIC_L C430 2.2U/6.3V_6 MIC_L1 L38 BK1608HM241 MIC_IN_L 2
29 MIC_L
6
29 MIC_R MIC_R C425 2.2U/6.3V_6 MIC_R1 L37 BK1608HM241 MIC_IN_R 3
4
5
AGND C418 100P/50V_4
SUY_010030HR006G321ZL
AGND
DFTJ06FR269
SENSE_MIC
audio-010030hr006g121zl-6p-v
29 SENSE_MIC

C C

SGT-LIS302DLTR interrupt pin default


Accelerometer Sensor is low / active Hi , BIOS need to
programming 22h to change status
from active Hi to low
+3V U39
HP302DLTR8

1 Vdd_IO
6 VDD
C767 C779 C773 3
*10U/6.3V_8 .1U/10V_4 .1U/10V_4 Reserved
11 Reserved

12 INTG# 8 INT1
9 INT2
12 SDO GND 2
2,6,7,13,34 PDAT_SMB 13 SDA/SDI/SDO GND 4
2,6,7,13,34 PCLK_SMB 14 SCL/SPC GND 5
R473 10K/F_4 7 10
D +3V CS GND D

PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Audio Jack/Accelerometer
NB5/RD2
Date: Monday, September 28, 2009 Sheet 30 of 46
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

EQ FOR SUBWOOFER
VREF_2R
R599 10K/F_4 +5V_AVDD
OUT_BY R598 *0_6

+5V_AVDD
31
R600

C898 C897 1NS C886 .027U/25V_6 1OUT_1S

4
10U/6.3V_6S .1U/10V_4
10K/F_4 3 +
VREF_2R
1
A C891 1IN-_1S 2 A
-
100P/50V_4 U45A
TLV2464CPWRG4

11
R587 60.4K/F_4 C890 .027U/25V_6 R590 10K/F_6
AGND HPOUT C885 5600P/50V_6 OUT_S R592 60.4K/F_4 VREF_2R
R588 10K/F_6 AGND
R589 10K/F_6
AGND
2NS C896 .027U/25V_6 2OUT_1S C894 5 +
100P/50V_4 7
10 EQ_S1 6
VREF_2R + -
8 U45B
VREF_2R C892 2IN-_1S 9 TLV2464CPWRG4
-
100P/50V_4 U45C C895 5600P/50V_6
12 + TLV2464CPWRG4
14 R597 60.4K/F_4 C893 .027U/25V_6 EQ_S R595 10K/F_6 SUB_OUT
13 - C888 .47U/6.3V_4 R593 60.4K/F_4 R596 10K/F_6 C887 1U/25V_6
U45D
TLV2464CPWRG4 R594 10K/F_6 AGND
C889
100P/50V_4

HPOUTL_EQ
29 BASS_OUT
C884 1U/25V_6 R591 20K/F_4

MODEL UP7
R9402 60.4K/F_6
B B
R9403 60.4K/F_6
R9407 60.4K/F_6
R9408 60.4K/F_6
C5144 0.027U/25V_6
C5146 0.027U/25V_6
C5148 0.027U/25V_6
C5153 0.027U/25V_6

5/27: NA for subwofer function

+3V R532 100K/F_4


+12VAMP
U44
C868 1U/25V_6
EAPD 5
HPA00304PWR SUB_GND
29 EAPD SHUTDOW N#
SUB_OUT C855 .47U/6.3V_4 SUB_OUT_AMPIN 1 16 C867 1U/25V_6 L79
C854 .47U/6.3V_4 SUB_OUT_AMPIP INN PVCC D30 RB501V-40 MPZ2012S221A
SUB_GND 2 INP
17 SUB_BSP SUB_BSP-1 88266-020L
R517 *120K_6 SUB_G0 BSP R586 51_4 C878 .22U/25V_6 C1
+5V_AVDD 3 GAIN0 OUTP 15
R503 120K_6 SUB_G1 4 14 SUB_OUTP- *1000P/50V_6
R516 120K_6 GAIN1 OUTP SUB_OUT+
+12VAMP SUB_GND_1 1
R504 *120K_6 SUB_OUTN- SUB_OUT-
C7 2
OUTN 11
C 10 *1000P/50V_6 C
C881 1U/25V_6 OUTN SUB_BSN SUB_BSN-1
24 8 CN1
C853 1U/25V_6 VCLAMP VCC BSN R520 51_4 C852 .22U/25V_6 C5 C6
SUB_GND 7 VCLAMP
C880 1U/25V_6 VREF 23 9 C859 1U/25V_6 L78 1000P/50V_4 1000P/50V_4 88266-020L-2p-r
C879 1U/25V_6 BYPASS VREF PVCC D27 RB501V-40 MPZ2012S221A
22 BYPASS

AGND
AGND
PGND
PGND
PGND
C883 220P/50V_4 COSC 21 C860 1U/25V_6 DFHD02MR311
COSC SUB_GND
R575 120K_6 ROSC 20 ROSC
+12VAMP SUB_GND_1

18
19
13
12
6
AGND TPA3007D1 HPA00304PWR
AL000304K20
IC CTRL(24P) HPA00304PWR(TSSOP)

GAIN1 GAIN0 dB
0 0 12 SUB_GND

0 1 18 AGND

1 0 23.6
1 1 36
R507 0_6 R502 0_6

Sub-Woofer power R2

R1
0_6

0_6
R559 0_6 R601 0_6

+VIN +12VAMP R265 0_6 R574 0_6

C872 10UC/25V/S
D +3V 2,3,5,6,7,10,11,12,13,14,15,16,24,25,26,27,28,29,30,32,33,34,35,36,42 D
+5V_AVDD 29
+VIN 24,37,38,39,40,41,42,43
SUB_GND_1
D29 SS1040 +12VAMP_1 D28 SS1040

BCSS1040005 BCSS1040005
d-2_65x1_6 d-2_65x1_6
SUB_GND AGND SUB_GND
PROJECT : LX89
05/16 (PV) Change footprint for SMT line recommend 24,37,38,39,40,41,42,43 +VIN Quanta Computer Inc.
2,3,5,6,7,10,11,12,13,14,15,16,24,25,26,27,28,29,30,32,33,34,35,36,42 +3V
Size Document Number Rev
Custom 1A
SUBWOOFER (EQ & AMP.)
NB5/RD2
Date: Monday, September 28, 2009 Sheet 31 of 46
1 2 3 4 5 6 7 8
5 4 3 2 1

32
for RTL8111DL use 42 +3VLANVCC

+3V_LAN
T : Stuffed for RTL8111DL(10/100/1000) for RTL8111DL use close Pin 44,45
+CTRL12DVDD +CTRL12DVDD R472 *0_6/S +3V_LAN +3VLANVCC R467 *0_8/S
short0603 short0805 Close to PIN 1
C777 C772 C774 C758 C778 C785 C781
10U/6.3V_8 10U/6.3V_8 0.1U/10V_4
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

D XTAL1 D

Y1
1 2 XTAL2

+DVDD12_LAN
+3V if ISOLATEB pin
25MHZ pull-low,the LAN

+3V_LAN
+CTRL12DVDD +CTRL12DVDD chip will not drive
C414 C411
R471 2.49K/F_4 LANRSET it's PCI-E outputs
33P/50V_4 33P/50V_4
( excluding

ENSWREG
R198 PCIE_WAKE# pin )
LAN_TX# *1K/F_4

+CTRL12A +3V_LAN
+3V_LAN
ISOLATEB R195 100_4 LAN_DISABLE# 13,36
2 1

48
47
46
45
44
43
42
41
40
39
38
37

2
U11
R196

NC/ENSWREG
VCTRL12A/SROUT12
GND4

CKTAL2
CKTAL1
NC/AVDD33
NC/LV_PLL
LED0
RSET

VDD33B
VCTR12DVDDSR
NC/VDDSR
*RB501V-40
U34 15K/F_4 D13
C397 .01U/16V_4 V_DAC0 1 24 LAN_MCT0 C371 R174 75/F_4

1
TCT1 MCT1 0.01U/100V_0603
MDI0+ 2 23 LAN_MX0+ +3V_LAN 1 36
TD1+ MX1+ +3V_LAN AVDD33 DVDD12B +DVDD12_LAN
MDI0+ 2 35 LAN_GLINK100#
MDI0- LAN_MX0- MDI0- MDIP0 LED1/EESK LAN_GLINK10#
3 TD1- MX1- 22 3 MDIN0 LED2/EEDI 34 2 1 +3V_LAN
+DVDD12_LAN 4 33 R474 3.6K_6
C396 .01U/16V_4 V_DAC1 LAN_MCT1 C370 R173 75/F_4 MDI1+ NC/FB12 LED3/EEDO EECS
4 TCT2 MCT2 21 5 MDIP1 EECS 32 T34
0.01U/100V_0603 MDI1- 6 31
C MDI1+ LAN_MX1+ MDIN1 GND3 +3V_LAN C
5 TD2+ MX2+ 20
MDI2+
7 GND1 RTL8111DL-VB-GR DVDD12A 30 +DVDD12_LAN
8 NC/MDIP2 VDD33A 29 +3V_LAN
MDI1- 6 19 LAN_MX1- MDI2- 9 28 ISOLATEB C793 0.1U/10V_4
TD2- MX2- +DVDD12_LAN NC/MDIN2 ISOLATEB LAN_REST_R# R475 *0_4
+DVDD12_LAN 10 DVDD12/AVDD12 PERSTB 27 LAN_REST# 36
C395 .01U/16V_4 V_DAC2 7 18 LAN_MCT2 C369 R172 75/F_4 MDI3+ 11 26 PCIE_WAKE#
TCT3 MCT3 NC/MDIP3 LANW AKEB PCIE_WAKE# 13,34
0.01U/100V_0603 MDI3- 12 25 U40
NC/MDIN3 CLKREQB

5
MDI2+ 8 17 LAN_MX2+
TD3+ MX3+

REFCLK_N
REFCLK_P
12 LAN_PLTRST# 2

DVDD12

NC/GPO
EVDD12
MDI2- 9 16 LAN_MX2- 4 LAN_REST_R#

NC/NC
TD3- MX3-

HSON
EGND
HSOP
GND2
1

HSIN
HSIP
C394 .01U/16V_4 V_DAC3 10 15 LAN_MCT3 C368 R171 75/F_4
TCT4 MCT4 0.01U/100V_0603 TC7SH08FU

3
MDI3+ 11 14 LAN_MX3+

13
14
15
16
17
18
19
20
21
22
23
24
TD4+ MX4+
MDI3- 12 13 LAN_MX3-
TD4- MX4- C729 +DVDD12_LAN LAN CABLE DETECT 36
NS892405
1000P/3KV_1808
PCIE_TXP2_LAN PCIE_RXN2_LAN_C C413 0.1U/10V_4
9 PCIE_TXP2_LAN PCIE_RXN2_LAN 9
PCIE_TXN2_LAN
9 PCIE_TXN2_LAN
PCIE_LAN_CLKP PCIE_RXP2_LAN_C C412 0.1U/10V_4
2,12 PCIE_LAN_CLKP PCIE_RXP2_LAN 9
PCIE_LAN_CLKN
2,12 PCIE_LAN_CLKN
EVDD12

B LAN_GLINK100# LAN_GLED# B
NS892402:GIGABIT DB0AT9LAN05 Link
LAN_TX# LAN_YLED#

EVDD12
Power trace Layout 寬 寬 > 60mil
>60mil C416 C415
+CTRL12A
>60mil +CTRL12A_L
Close to 8111DL RJ45
L72 4.7UH_8 C128 *.1U/10V_4 *0.01U/16V/X7R_4 *0.01U/16V/X7R_4
DVDD12 pins-- 19
CN21

+3V_LAN R71 56.2/F_4 LAN_YLED 12


C775 C776 LAN_YLED# LED_GRE_P
11 LED_GRE_N
L149 1U/10V_4 1U/10V_4

RTL8111DL ( Gaga lan ) use 4.7uH LAN_MX3+ 8


C757 C763 C766 LAN_MX3- RX1-
power choke A>600mA tolerance 10U/6.3V_8 10U/6.3V_8 0.1U/10V_4 LAN_MX2-
7 RX1+
6 RX0-
±15% LAN_MX1- 5
LAN_MX1+ TX1-
4 TX1+
LAN_MX2+ 3
LAN_MX0+ RX0+
2 TX0- GND1 14
LAN_MX0- 1
+DVDD12_LAN TX0+
GND 13

R57 1K/F_4 LAN_GLED 10


+3V_LAN LED_YEL_P
LAN_GLED# 9 LED_YEL_N

C52 *.1U/10V_4
RJ45_CONN
A C784 C771 C762 C780 C783 DFTJ12FR104 A
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
rj45-1-2006105-4-12p-rdv-v

PROJECT : LX89
Close to 8111DL DVDD12 pins-- 10, 13, 30, 36, 39. Quanta Computer Inc.
Size Document Number Rev
Custom 1A
RTL8111DL/RJ45
NB5/RD2
Date: Monday, September 28, 2009 Sheet 32 of 46
5 4 3 2 1
5 4 3 2 1

33
+3VPCU +3VSUS

BLUETOOTH RIGHT SIDE USBX2 for 17" RIGHT SIDE USBX2 for 15"
R274 C493 .1U/10V_4 +5VPCU
4.7K_4

1
Q21 C647 .1U/10V_4 1 L52 *WCM2012-90
+5VPCU 2
2 ME2303T1 DFFC06MR001 USBP12+ 1 2 USBP12+
3 USBP12+ 13
USBP12- 4 3 USBP12-
4 USBP12- 13
196047-06021-6P-l
1 5
2 6 USBPW_ON# 34,36
L66 *WCM2012-90

3
3

3
D D
13 USBP5+ 1 2 USBP5+ 4
C494 13 USBP5- 4 3 USBP5- 5
USB CONN
2 Q22 0.1U/10V_4 L65 *WCM2012-90 CN12
14 BT_OFF# 6
PDTC144EU 24mil 13 USBP6+ 1 2 USBP6+ 7
BTV 13 USBP6- 4 3 USBP6- C10 .1U/10V_4 +5VPCU
8
1 9
34,36 USBPW_ON# 10
C505 C502 R12 R13 14 SATA_LED#
10U/6.3V_8 0.1U/10V_4 11 1
*0_4 *0_4 13 ACCLED_EN 12 2
35,36 PWR_LED# 13 3
CN14 USBP6+_R
+3V 14 4
BLUE TOOTH CONN USBP6-_R
87213-0600-6P-L USBP6+_R CN7 5
6
DFHD06MR049 FOR 15" ONLY 7
BTCON_P1 USBP6-_R DUAL USB CONN
6 T56 8 USBPW_ON# 34,36
5 T57 9 SATA_LED# 14
USBP15-
4 USBP15+
USBP15- 13 DFFC14MR001 DFFC12MR000 10 ACCLED_EN 13
3 USBP15+ 13 11 PWR_LED# 35,36
2 12 +3V
BTV
1 USB CONN CN2
196047-12021-12p-l

+5V

SATA HDD CONNECTOR SATA CD-ROM +5V_ODD

Change to ANT connector 120 mils


H=2.6 footprint: "GS12201-1011-9F-20P-L" +5V
C SI +12VALW C
DFHD20MR023 C900
C625 C612 C611 C610 AO3404 ID

2
C516 C514 C513 C515 10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 current .1U/10V_4
CN24
DC Current rating: 0.5 A 10U/6.3V_8 4.7U/6.3V_6 0.1U/10V_4 10U/6.3V_8 R603 5.8A
1 330K_6
21
22

23
24

3
CN31 SATA HDD(1ST)
1
2 SATA_TXP1 Q38 +5V_ODD
SATA_TXP1 14

1
3 SATA_TXN1 SATA_TXN1 14 AO3404
4
+5V: 2 A(4 Pin) 5 SATA_RXN1 2
SATA_RXN1 14
SATA_RXP1
6
SATA_RXP1 14 High : ODD power down

1
+3V: 2 A(4 Pin) 7 R605 *1K/F_4

3
20

Main HDD 8 2 1 SI Low : ODD power on R604


1

Gnd : (5 Pin) 9

1
10 +5V_ODD Add ODD power switch circuit 22_8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

11 ODD_EJECT# 36 ODD_PD 2

2
1
12 C899
13 +5V
14 Q39 .027U/25V_6

3
15 2N7002E

1
SATA_TXP0 14 16
SATA_TXN0 14 17 R422
18 2
19 10K/F_4
SATA_RXN0 14 19
+5V Q37
SATA_RXP0 14
2N7002E
R392 0_4 ODD_EJECT#
36 EJECT#

1
SATA ODD
B B

+5V: 2 A(4 Pin) DFFC06MR001


SATA_2 HDD CONNECTORFOR 17.3" Gnd : (5 Pin) USB Fingerprint CON 196047-06021-6P-l
SI CN9
SI 1. SYSTEM GND C339 .1U/10V_4
6 Swap CN9 Pin define
CN26 2. SYSTEM GND 5 for F/P function
Change to ANT connector +5V 4
3.LED PWR(+5V) +3V 3
1 1 13 USBP14+ 2
2 SATA_TXP2 SATA_TXP2 14 4.USB PWR(+3V) 13 USBP14- 1
3 SATA_TXN2 SATA_TXN2 14
+5V
4
SATA_RXN2
5. USB1.1+
5 FINGER PRINTER CONN
SATA_RXP2 SATA_RXN2 14
6 SATA_RXP2 14 6. USB1.1- +3V
7
8 U30 *PJSR05
9 2 IO1 Vin 4 +3V
Main HDD

10 +5V 3 IO2 Gnd 1


11 C318
12 C655 C668 C672 C661 .1U/10V_4
13 10U/6.3V_8 4.7U/6.3V_6 0.1U/10V_4 10U/6.3V_8
A 14 A
15
16
17
18
19
PROJECT : LX89
19

Quanta Computer Inc.


2nd SATA HDD(2ST) 34,36,37,38,39,40,41,42,43 +5VPCU
13,28,34,35,41,42 +3VSUS
4,6,12,24,35,36,37,38,39,40,41,42,43 +3VPCU Size Document Number Rev
Custom 1A
24,25,26,27,28,29,34,35,42 +5V BT/FP/USBX2/SATA HDDX2/ODD
NB5/RD2
Date: Monday, September 28, 2009 Sheet 33 of 46
5 4 3 2 1
A B C D E

+1.5V
Mini PCI-E Card WLAN
+3V_WLAN
+3VSUS

R356 *10K/F_4 C46


0.01U/16V_4
C35
0.1U/10V_4
C18
10U/6.3V_8
34

2
+3V_WLAN +3V_WLAN
+1.5V
D 3 1 MINICAR_PME# D
13,32 PCIE_WAKE#
CN19 Q28
R8 *0_6 51 52 *PDTC144EU
+5V Reserved +3.3V
49 50 C17 C27
Reserved GND C36 C47 0.1U/10V_4 10U/6.3V_8
47 Reserved +1.5V 48
45 46 0.1U/10V_4 1U/10V_4
36 EC_DEBUG1 Reserved LED_W PAN# T58
43 44 RF_LINK# INTEL WLAN
Reserved LED_W LAN# RF_LINK# 36
41 42 R315 10K/F_4 CARD PIN 20
Reserved LED_W W AN# +3V
39 Reserved GND 40 W_DISABLE#
37 Reserved USB_D+ 38 USBP10+ 13 have
35 GND USB_D- 36 USBP10- 13
PCIE_TXP1_WLAN 33 34 internal
9 PCIE_TXP1_WLAN PETp0 GND pull-up 110k
PCIE_TXN1_WLAN 31 32 DAT_SMB R20 *0_4/S PDAT_SMB 2,6,7,13,30
9 PCIE_TXN1_WLAN PETn0 SMB_DATA CLK_SMB R22 *0_4/S
29 GND SMB_CLK 30 PCLK_SMB 2,6,7,13,30 ohm
27 GND +1.5V 28
PCIE_RXP1_WLAN 25 26
9 PCIE_RXP1_WLAN PERp0 GND
PCIE_RXN1_WLAN 23 24 +3V +3V
9 PCIE_RXN1_WLAN PERn0 +3.3Vaux
21 22 MINI_PLTRST#
GND PERST# MINI_PLTRST# 12
PCLK_LPC_DEBUG 19 20
12 PCLK_LPC_DEBUG Reserved W _DISABLE# RF_OFF# 14
MINI_PLTRST# 17 18 R31 10K/F_4
Reserved GND +3V
R30
15 16 LAD0 *4.7K_4
GND Reserved LAD0 12,36

1
PCIE_MINI1_CLKP 13 14 LAD1 LAD1 12,36
2,12 PCIE_MINI1_CLKP REFCLK+ Reserved
PCIE_MINI1_CLKN 11 12 LAD2
2,12 PCIE_MINI1_CLKN REFCLK- Reserved LAD2 12,36
9 10 LAD3 Q7 R36
GND Reserved LAD3 12,36
T65 CLK_MINI_OE# 7 8 LFRAME# LFRAME# 12,36 2 *ME2303T1 0_8
CLKREQ# Reserved
14 BT_COMBO_EN# 5 BT_CHCLK +1.5V 6
3 BT_DATA GND 4
T66 MINICAR_PME# 1 2
W AKE# +3.3V

3
3
C MINI PCIE H=9.0 C
BT_DATA,BT_CHCLK,CLKREQ# R337
internal pull-DOWN 100k *10K/F_4 MIPCI-800055FB052GX00PL-52P-NB5 14 RF_OFF# 2
ohm PCLK_LPC_DEBUG R92 *0_4 C193 *27PF/50V_4
DFHD52MS154 Q5 +3V_WLAN

1
for EMI request *PDTC144EU

USB2.0 X 1 and E-SATA/USB2.0 COMBO

USB
CN28
+5VSUS_USBP0 1 8
USBP7- 1 GND
13 USBP7- 2 2 GND 7
USBP7+ 3 6
+5VPCU 13 USBP7+ 3 GND
4 4 GND 5
Low: Enable AC Mode
USB CONN
B B
80 mils (Iout=2A) High: Disable DC Mode
C755
1U/6.3V_4 usb-020173gr004s56azl-4p-r-v

1
U38
+5VSUS_USBP0
2 VIN1 OUT3 8 DFHS04FR303

2
3 7 C407
VIN2 OUT2
1

USBPW_ON# 4 6 C759 C750 C756 *Clamp-Diode_6 C410


33,36 USBPW_ON# EN OUT1
1 5 + *Clamp-Diode_6
GND OC
150u_6.3V_3528

G547F2P81U
2

470P/50V_4 .1U/10V_4

USB & ESATA


CN27
*WCM2012-90 +5VSUS_USBP0 1
USBP0- 2 USB Vcc
13 USBP0- 4 3 D-
1 2 USBP0+ 3
13 USBP0+ D+
4 GND
L34

5 GND Shield 14
C373 0.01U/16V/X7R_4 ESATA_TXP3 6
14 SATA_TXP3 A+
C367 0.01U/16V/X7R_4 ESATA_TXN3 7 15
14 SATA_TXN3 A- Shield
8 GND
14 SATA_RXN3 9 B- Shield 12
14 SATA_RXP3 10 B+
11 GND Shield 13
A A

USB_ESATA_COMBO
usb-1-2006102-3-11p-v
DFHS11FR047 PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Mini CARD
NB5/RD2
Date: Monday, September 28, 2009 Sheet 34 of 46
A B C D E
5 4 3 2 1

POWER BUTTON CONNECT


NBSWON1#

1. +3VPCU(LIDSWITCH PWR)
KEYBOARD Con.
KB CONN 36 MY[0..17]
MY[0..17]
35

1
G1 MX[0..7]
2.(+3VPCU) MY5 36 MX[0..7]
C75 *SHORT_ PAD1 C242 220P/50V_4
3. LIDSWITCH MY6 C210 220P/50V_4 MX1 32
0.1U/10V_4 MY3 C244 220P/50V_4 MX7 32
31

2
MY7 C266 220P/50V_4 MX6 31
4.POWERON# MY9
30 30
29 29
D MY8 C301 220P/50V_4 MX4 D
5. PWRLED# MY9 MX5
28 28
C298 220P/50V_4 27
MY10 C268 220P/50V_4 MY0 27
6. GND 26
MY11 C245 220P/50V_4 MX2
MX3
25
24
26
25 KEYBOARD PULL-UP
+3VPCU MY5 24
23 RP18
C66 0.1U/10V_4 MY1 23 MY12
22 22 +3VPCU 10 1
MY1 C265 220P/50V_4 MX0 21 MY10 9 2 MY15
MY2 C209 220P/50V_4 MY2 21 MY11 MY13
20 20 8 3
CN6 MY4 C243 220P/50V_4 MY4 19 MY6 7 4 MY14
PWR BTN CONN MY0 C264 220P/50V_4 MY7 19 MY9
18 18 6 5
MY8 17
MX4 C207 220P/50V_4 MY6 17
16 10P8R-8.2K

7
16 +3VPCU
MX6 C263 220P/50V_4 MY3 15
1 MX3 C208 220P/50V_4 MY12 15
14 RP17
2 MX2 MY13 14 MY7
24,36 LID_EC# 3 196047-06021-6P-l C299 220P/50V_4 13 13 10 1
MY14 12 MY2 9 2 MY8
36 NBSWON1# 4 12
PWR_LED# DFFC06MR001 MY11 11 MY1 8 3 MY3
33,36 PWR_LED# 5 11
MX7 C240 220P/50V_4 MY10 10 MY0 7 4 MY4
6 MX0 C300 220P/50V_4 MY15 10 MY5
9 9 6 5
8
C76 MX5 C241 220P/50V_4 MY16 8
MX1 C206 220P/50V_4 MY17 8
1000P/50V_4 7 +3VPCU 10P8R-8.2K
R168 200/F_6 7
36 WIRELESS_ON 2 1 6 6
MY12 C267 220P/50V_4 R169 2 1 200/F_6 5 R108 8.2K_4 MY16
36 WIRELESS_OFF 5
MY13 C302 220P/50V_4 R170 2 1 200/F_6 4 R113 8.2K_4 MY17
29 MUTE_LED# 4
MY14 C211 220P/50V_4 36 CAPSLED# R164 2 1 200/F_6 3
MY15 C303 220P/50V_4 3
+3V 2 2
MY16 C269 220P/50V_4 1
MY17 C304 220P/50V_4 1

C C

CN10
DFFC32FR024
bl135h-32rla-tand-32p-l
Need check pin define
+5V

3
R123 K/B light function.
TOUCH PAD CONN +12VALW R122 1M_4 2

3
100K/F_4
Q13 140 mA 4.LEDVCC
AO3404 CN8

1
2 +5V_LED_KBLIGHT 3. LEDVCC
36 KB_LED_EN 4
3
2 2. GND
196047-06021-6P-l Q12 C333 C332
1
25 mils 2N7002E .1U/10V_4 .1U/10V_4 1. GND

1
DFFC06MR001 KB LIGHT CONN
+3VSUS DFFC04FR042
C336 0.1U/10V_4 CN11 88513-0401-4p-l
C337 *10P/50V_4
B B
TPDATA L30 BLM18BA470SN1D TPDATA-1 1
36 TPDATA 2
TPCLK L31 BLM18BA470SN1D TPCLK-1
36 TPCLK 3
C331 *10P/50V_4 4
5
6

close conn TOUCH PAD CONN

+3VSUS R126 4.7K_4 TPCLK


R125 4.7K_4 TPDATA

A A

PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
LED/KEYBOARD/SW_BOARD
NB5/RD2
Date: Monday, September 28, 2009 Sheet 35 of 46
5 4 3 2 1
5 4 3 2 1

+3VPCU

12 SERIRQ
12,34 LFRAME#
12,34 LAD0
SERIRQ
LFRAME#
LAD0
LAD1
3
4
10
U5

SERIRQ
LFRAME
LAD0
VCC1
VCC2
VCC3
9
22
33
C555
C548
C560
C615
C552
4.7U/6.3V_6
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
+3V

+3VPCU
R42

R344
R387
R390
*10K/F_4

10K/F_4
10K/F_4
4.7K_4
HWPG

NBSWON1#
SLPBTN#
MBCLK
+3VPCU

R388
36
12,34 LAD1 8 LAD1 VCC4 96
LAD2 7 111 C591 0.1U/10V_4 R389 4.7K_4 MBDATA 10K/F_4
12,34 LAD2 LAD2 VCC5
LAD3 5 125 C549 0.1U/10V_4
12,34 LAD3 LAD3 VCC6
PCLK_LPC_KB3920 12 67 C617 4.7U/6.3V_6
12 PCLK_LPC_KB3920 PCICLK AVCC
PCIRST# 13 Vari_ON
12 PCIRST# PCIRST/GPIO5
CLKRUN# 38
D 12 CLKRUN# CLKRUN +3VPCU_EC D
SCI1# 20 R83
GATEA20 SCI/GPIOE TEMP_MBAT *10K/F_4
13 GATEA20 1 GA20/GPIO0 AD0/GPI38 63 TEMP_MBAT 43
RCIN# 2 64 AD_TYPE RSMRST#
13 RCIN# KBRST/GPIO1 AD1/GPI39 RSMRST# 13
3920_RST# 37 65 AD_AIR
ECRST AD2/GPI3A SYS_I AD_AIR 43
66 C182 2.2U/6.3V_6
AD3/GPI3B SYS_I 43
MX0 55 R84 *8.2K_4
35 MX0 KSI0/GPIO30 +3VPCU
MX1 56 68
35 MX1 KSI1/GPIO31 DA0/GPO3C
MX2 57 70
35 MX2 KSI2/GPIO32 DA1/GPO3D
MX3 58 71 FAN1ON +3VPCU
35 MX3 KSI3/GPIO33 DA2/GPO3E FAN1ON 28
MX4 59 72 D/C#
35 MX4 KSI4/GPIO34 DA3/GPO3F D/C# 43
MX5 60
35 MX5 KSI5/GPIO35
MX6 61 21 PWM_VADJ
35 MX6 KSI6/GPIO36 PW M1/GPIOF PWM_VADJ 24,26
MX7 62 23 KB_LED_EN
35 MX7 KSI7/GPIO37 PW M2/GPIO10 KB_LED_EN 35
MY0 39 26 SI
35 MY0 KSO0/GPIO20 FANPW M1/GPIO12
MY1 40 27 C550
35 MY1 KSO1/GPIO21 FANPW M2/GPIO13
MY2 41 28 FAN1SIG Add ODD_PD for ODD power switch circuit 0.1U/10V_4
35 MY2 KSO2/GPIO22 FANFB1/GPIO14 FAN1SIG 28
MY3 42 29 ODD_PD
35 MY3 KSO3/GPIO23 FANFB2/GPIO15 ODD_PD 33
MY4 43 U21 R346
35 MY4 MY5 KSO4/GPIO24 MBCLK BIOS_CS#
35 MY5 44 KSO5/GPIO25 SCL1/GPIO44 77 MBCLK 43 Battery charge/discharge 1 CE# VDD 8
MY6 45 78 MBDATA Cap button SPI_CLK R345 33_4 SPI_CLK_R 6 10K/F_4
35 MY6 KSO6/GPIO26 SDA1/GPIO45 MBDATA 43 SCK
MY7 46 79 MBCLK2 BIOS_WR# 5
35 MY7 KSO7/GPIO27 SCL2/GPIO46 MBCLK2 5,19,43 SI
MY8 47 80 MBDATA2 VGA thermal BIOS_RD# 2 7 SPI_7P
35 MY8 KSO8/GPIO28 SDA2/GPIO47 MBDATA2 5,19,43 SO HOLD#
MY9 48 system thermal
35 MY9 KSO9/GPIO29
MY10 49 +3VPCU R323 10K/F_4 SPI_3P 3 4
35 MY10 KSO10/GPIO2A W P# VSS
MY11 50
35 MY11 KSO11/GPIO2B
MY12 51 MX25L1605DM2I-12G
35 MY12 KSO12/GPIO2C
MY13 52
35 MY13 KSO13/GPIO2D
MY14 53 6 SUSB# MAX AKE38FP0Z00 2M byte
C 35 MY14 KSO14/GPIO2E GPIO4 SUSB# 13 C
MY15 54
35 MY15
MY16 KSO15/GPIO2F HWPG SPI
35 MY16 81 KSO16/GPIO48 GPIO7 14 HWPG 24,37,38,40,41,42 WINBOND AKE38ZP0N01
35 MY17
MY17 82 KSO17/GPIO49 GPIO8 15 EC_PROCHOT#
EC_PROCHOT# 3 BIOS
SUSC#
EON AKE38ZA0Q00
SLPBTN#
83 PSCLK1/GPIO4A GPIOA 16 SUSC# 13 EC new option
Vari_ON
84 PSDAT1/GPIO4B GPIOB 17 SOCKET DG008000031
85 PSCLK2/GPIO4C GPIOC 18 T4
ACIN 86 19 NBSWON1#
19,43 ACIN PSDAT2/GPIO4D GPIOD NBSWON1# 35
TPCLK 87 25
35 TPCLK PSCLK3/GPIO4E GPIO11 LAN_REST# 32
35 TPDATA TPDATA 88 30
PSDAT3/GPIO4F GPIO16 EC_DEBUG1 34
GPIO17 31
BIOS_RD# 119 32 KBSMI#1
BIOS_WR# RD GPIO18
120 WR
BIOS_CS# 128 34 VRON
SELMEM/SPICS GPIO19 VRON 38,39,41,42
R386 *0_4/S
12 SERR# 89
76
SELIO/GPIO50 GPIO1A 36 Project Model GPIO42
VGA_ON_SB AD5/GPI43
12 VGA_ON_SB 109 D0/GPXD0 SI LX 17.3" High
VGA_PWROK 110 R391 *10K/F_4 +3VPCU
40,41 VGA_PWROK D1/GPXD1
112
114
D2/GPXD2
73 EJECT#
LX 15.6" Low
10 VGA_SWON D3/GPXD3 GPIO40 EJECT# 33
RF_LINK# 115 74 OP_FAN_SEL R81 10K/F_4
34 RF_LINK# D4/GPXD4 GPIO41 T27
BLUELED 116 75 OP_FAN_SEL Add EJECT# for ODD
LAN CABLE DETECT D5/GPXD5 AD4/GPI42 DNBSWON#1 T72
32 LAN CABLE DETECT 117 D6/GPXD6 GPIO52 90 power switch circuit
118 91 CAPSLED#
T9 D7/GPXD7 GPIO53 CAPSLED# 35
PWR_LED#
USBPW_ON# 97
GPIO54 92
93 ECPWROK PWR_LED# 33,35 GPIO42 control fan table
33,34 USBPW_ON# A0/GPXA0 GPIO55 ECPWROK 5,16
SUSON 98 95 RSMRST#
40,42 SUSON A1/GPXA1 GPIO56 RSMRST# 13
MAINON 99 121 VOLMUTE#
21,42,43 MAINON A2/GPXA2 GPIO57 VOLMUTE# 29
LAN_POWER 100 126 SPI_CLK
42 LAN_POWER A3/GPXA3 GPIO58
S5_ON 101 127 LID_EC#
B 38,42 S5_ON A4/GPXA4 GPIO59 LID_EC# 24,35 B
VR2.5_ON 102
40 VR2.5_ON A5/GPXA5
LAN_DISABLE# 103
13,32 LAN_DISABLE# A6/GPXA6
VGACOREON 104 123 CRY2 C67 22P/50V_4
40,41 VGACOREON A7/GPXA7 XCLKO
MBATLED0# 105
43 MBATLED0# A8/GPXA8
4

AC_LED_ON# 106 3920_RST#


43 AC_LED_ON# A9/GPXA9 3920_RST# 5
107 122 CRY1 Y3
35 WIRELESS_ON A10/GPXA10 XCLKI
108 32.768KHZ C64 0.1U/10V_4
35 WIRELESS_OFF A11/GPXA11 R58 47K_4
+3VPCU
11
1

GND1
GND2 24
GND3 35
124 94 C79 22P/50V_4
V18R GND4
GND5 113
AGND 69
C56 C58
0.1U/10V_4 4.7U/6.3V_6
KB3926 +3VPCU_EC +3VPCU +3VPCU

1
For KB3926 C version
D7
*BLM18BA470SN1D 1SS355
L8

2
+5VPCU
SCI1# D3 1 2 CH501H-40PT AD_TYPE R74 100/F_4
SCI# 13 U4 AD_ID 43
5 VOUT VIN 1

C60 C148 R75


C57 24.3K/F_4
A 4.7U/6.3V_6 3 0.1U/10V_4 A
SHDN *1U/6.3V_4
DNBSWON#1 D9 1 2RB500V-40 DNBSWON# 13
4 NR/FB GND 2
C50
KBSMI#1 D4 1 2RB500V-40 KBSMI# 13
*1U/6.3V_4
TPS73133
PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
KB3926/ROM/TP
NB5/RD2
Date: Monday, September 28, 2009 Sheet 36 of 46
5 4 3 2 1
5 4 3 2 1

DC/DC +3V_ALW/+5V_ALW/+5V_ALW2 /+15V_ALW


32
D D

+VIN
Place these CAPs Place these CAPs
close to FETs close to FETs
PD19
PR180 PR179
1 2

8206ON_LDO
1K/F_4 150K/F_4

2
PC90 PC79 PC76 PC72 UDZ5V6B-7-F PC100 PC103 PC95 PC91

2200P/50V_4

2200P/50V_4
4.7U/25V_8

4.7U/25V_8

0.1U/25V_4

0.1U/25V_4

4.7U/25V_8
+5V_VCC1 4.7U/25V_8

1
2
PC98 +3.3V +/- 5%

1
0.1U/25V_4
Countinue current:5A

1
PC92
1U/6.3V_4
Peak current:6A

2
+5V +/- 5%
OCP minimum 7.5A
Countinue current:5A +5VALW
Peak current :6A

5
6
7
8
PC94

6 *0.1U/10V_4
C OCP minimum :7.5A PC89 C

2
PC101 4
8
7
6
5

4.7U/6.3V_6 +5V_VCC1 +3VPCU


0.1U/10V_4
PQ48

8
7

5
4
3
2
1

1
4 AO4496
PR69 PL12

LDOREFIN
LDO
IN
N.C
ONLDO
VCC
TON
REF
+5VPCU 0_4 2.5UH/7.5A

3
2
1
PQ46 +3.3V_ALWP
AO4496

2
PR70

2
9 32 249K/F_4
BYP REFIN2

5
6
7
8
PL8 PR108 10 31 1 2
1
2
3

OUT1 ILIM2

2
2.5uH/7.5A 249K/F_4 5V_FB1 11 30 3V_FB2 PR182
+5V_ALWP FB1 PU6 OUT2 *2.2_8
1 2 12 ILIM1 SKIP 29

1
PGOOD1 13 RT8206B 28 PGOOD2 4 PR72

1
PGOOD1 PGOOD2
2

8
7
6
5

14 27 0_4 +
ON1 ON2
2

5V_DH 15 26 3V_DH PC218 PC214

1
DH1 DH2
1

PR178 5V_LX 16 25 3V_LX PC211 0.1U/10V_4 220U/6.3V_6X4.5ESR18

2
+ *2.2_8 LX1 LX2 *1500P/50V_4
4 37
PC195 PC206 PR106 PAD PQ47
36
1

PAD

AGND
PGND
0.1U/10V_4

*0_4 AO4712
220U/6.3V_6X4.5ESR18

BST1

BST2
39

VDD
PAD
PAD
PAD
PAD

PAD
PAD
2

3
2
1
PAD

2
DL1

DL2
N.C
40
2 PAD

2
PC207 PR71
2

*1500P/50V_4

PQ45 PC105 PC78 *0_4

38
35
34
33
17
18
19
20
21
22
23
24

42
41
0.1U/25V_4

0.1U/25V_4
PR107 AO4712
1
2
3

1
0_4 Rds(on) 14m ohm

1
Rds(on) 17m ohm PR78
1

PR100
1 2 5V_BST1 3V_BST2
1 2
2_6 2_6
B 5V_DL 3V_DL B

1 +5VALW
PC115
PD12 3 2 1
*BAV99 1
2 *0.01U/25V_4
PC97 PGOOD2
1U/6.3V_4
2

2
2

1 PR67
PC128 PC116 *0_4/S
PD9 PD13
*0.1U/25V_4

3 1 2
1

1SS355 *BAV99

1
1 2 2 *0.01U/25V_4 PGOOD1 HWPG 24,36,38,40,41,42

PR112
+5VALW 1 2
100K/F_4
1

PC110 PC129
2.2U/6.3V_6 *1U/25V_6
2

R9 *0_4
5 SYS_SHDN#

A A
+VIN 24,31,38,39,40,41,42,43
+3VPCU 4,6,12,24,33,35,36,38,39,40,41,42,43
+5VPCU 33,34,36,38,39,40,41,42,43

PROJECT : LX6_LX7
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NB5 +5V/+3V (RT8206B)
Date: Monday, September 28, 2009 Sheet 37 of 46
5 4 3 2 1
5 4 3 2 1

PR164
+5VPCU
+VIN +1.1V Volt +/- 5%
Countinue current:5A
38

8208RTVDD1.1V
10_6

PC34 Peak current: 7A


PC186 1U/6.3V_4
PC71 PC70 PC68 OCP minimum: 9A

1U/6.3V_4
PR14

2200P/50V_4
8208BST1.1V_1

0.1U/25V_4

4.7U/25V_8
1 2
2_6

5
D D
PC12

0.1U/25V_4
13
PU1

9
PR27
8208CS1.1V 10 12 8208RTDH1.1V 4

BST
VDDP
VDD
CS DH +1.1V_DYN_S1 +1.1V_DYN
16.5K/F_4
PR168 0_4 8208RTPG1.1V
4 11 8208RTLX2.1V PQ43 PL11
24,36,37,40,41,42 HWPG

3
2
1
PGOOD PHASE AON7410 1UH/11A-PCMD063T-1R0MN
PR12 10K/F_4 8208RTEN1.1V
15 16 8208TON1.1VPR11 1 2
600 mils
36,39,41,42 VRON EN/DEM TON
232K/F_4

2
17 8 8208RTDL1
PAD DL

1
VOUT
PC6 PR176
*2.2_8 +

*0.22U/10V_4
14 5

G0

D0
FB
G1 D1 PQ44 PC84 PC213

330u_2V_7343ESR6
RT8208A AON7702

0.1U/10V_4
4

2
DYN_PWR_EN High Low
PR34

8208VOUT1
8208RTD10.1V PC204

3
2
1
PR39

*1500P/50V_4
+3VPCU 6.65K/F_4
+1.1V_DYN 0.95V 1.25V 10K/F_4 8208RTFB1.1V
PR31

3
PR23 2.67K/F_4
10K/F_4
PC21 *100P/50V_4
PR45
10 DYN_PWR_EN 2 RDSon=14m ohm
0_4 Vo=0.75(R1+R2)/R2
+5VPCU PQ5
Reserve for AMD tunning

1
C PC50 DMN601K-7 +VIN C
PR150 +1.1V Volt +/- 5%
*0.33U/6.3V_4

PC178
10_6 Countinue current:5A

1U/6.3V_4
PC174 Peak current: 7A
1U/6.3V_4

PC241 PC242 PC240 OCP minimum: 9A

2200P/50V_4

0.1U/25V_4

4.7U/25V_8
RTBST_1 PR147 RTBST
RTVDD

5
2_6
PC171
13
2

PU13

0.1U/25V_4
12 RTDH 4
BST
VDDP
VDD

PR154 DH
RTILIM 10 +1.1V
CS +1.1V_S2
PR156 12.1K/F_4
HWPG_S2A 4 11 RTLX PQ61 PL14
24,36,37,40,41,42 HWPG

3
2
1
PGOOD PHASE AON7410 2.2uH/8A
0_4
5 RT8209A 16 RTTON PR144
1 2
600 mils
NC TON
PR146 200K/F_4

1
VRON RTEN 15 8 RTDL
EN/DEM DL

5
PGND

VOUT

+
GND

10_4
PR209 PC237 PC238
NC

17 PAD FB 3
PR145 *2.2_8

0.1U/10V_4
390U/2.5V_6X5.8ESR10
RTFB

2
*1M/F_4 PQ60
14

1
AON7702 4

PC239

*1500P/50V_4
3
2
1
B PR153 PR155 B

4.7K/F_4 10K/F_4
PC172
RDSon=14m ohm
*100P/50V_4 Vo=0.75(R1+R2)/R2

+3VPCU

1.1 Volt +/- 5%


Countinue current:0.2A
3 5
PC153 PC151 VIN NC Peak current:0.5A
10U/6.3V_8

0.1U/10V_4

+1.1VS5
PU10
RT9025 6
VOUT
PR136
36,42 S5_ON 2 EN
10K/F_4
+5VPCU 4 8 PC155 PC154 PC156
VDD GND
10U/6.3V_8

10U/6.3V_8

0.1U/10V_4
ADJ

PC150 1 9
PGOOD GND1
1
0.33U/6.3V_4

PC152
7
1U/6.3V_4
2

A 1.1VADJ PR137 A
R1 38.3K/F_4
2

HWPG PR134 0_4


R2 PR135 VO=(0.8(R1+R2)/R2)
100K/F_4 R2<120Kohm
PROJECT : LX89
1

Quanta Computer Inc.


Size Document Number Rev
Custom 1A
VGA Core/+1.8VGFX/1.0VGFX
NB5/RD2
Date: Monday, September 28, 2009 Sheet 38 of 46
5 4 3 2 1
A B C D E F G H

39
+VIN

5
PC2 PC7 PC16

2200P/50V_4

0.1U/25V_4

4.7U/25V_8
ISL6265 Pin1 OFS VFIXEN UGATE_NB 4 3A
+CPUVDDNB
1.2V PQ29

3
2
1
V X AON7410 PL6

3.3V 2.2UH/8A

5
X V

1
PR162
1 *2.2_8 1
5V 6265AGND +
X X PC202 PC216
LGATE_NB 4

0.1U/10V_4

390U/2.5V_6X5.8ESR10
PC66
+5VPCU PR73
10_6 PQ30 PC185

3
2
1
AON7702

*1500P/50V_4
PR64
VFIXEN VID Codes

1000P/50V_4
22.1K/F_4

PHASE_NB
2
PR60 PR61
PC67

47/F_4

47/F_4
SVC SVD Output 1U/10V_4

1
+VIN
PR58
10_6 6265AGND

1200P/50V_6
0 0 1.4 PC57

PC69

0.1U/50V_6
CPU_VDDNB_RUN_FB_H 3 +VIN
0 1 1.2

PR66
PR172 PC55 CPU_VDDNB_RUN_FB_L 3
1 0 1.0 *0_4/S 0.01U/50V_4 PR50 PR57

1
33P/10VB_4

PC54
1_6 16.9K/F_4
6265AGND + +

44.2K/F_6
1 1 0.8 PC44 PC42 PC38 PC14 PC22 PC233 PC232

5
36 BOOT_NB

100U/25V L-F

100U/25V L-F
PR63 PR62

2200P/50V_4

0.1U/25V_4

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8

2
+5VPCU 0_4 0_4 D D
6265AGND
PR55 4
G
4
G 36A
0_4 S S

49

48

47

46

45

44

37

39

38

41

43

42
PU2

1
2
3

1
2
3
+3VPCU PQ33 PQ39 PL10 +VCORE

GND

VIN

VCC

FB_NB

COMP_NB

FSET_NB

UGATE_NB

LGATE_NB

BOOT_NB

PHASE_NB

OCSET_NB

VSEN_NB

RTN_NB
PR52 AON6428L *AON6428L 0.36uH/25A_11
6265AGND *0_4
PR56 1 2
1
OFS/VFIXEN
*10K/F_4

5
2 2

1
16 VRM_PWRGD PR49 2 34 UGATE_0 D D PR2
0_4 PGOOD UGATE_0 *2.2_8 + +
PC48 G G
4 4 PC75 PC210
PR46 S S
PR47 3 35 BOOT_0

330u_2V_7343

330u_2V_7343
3 CPU_PWRGD_SVID_REG

2
0_4 PWROK BOOT_0
1_6

1
2
3

1
2
3
0.22U/25V_6 PQ40 PQ34 PC5
PR42 4 33 PHASE_0 AON6718L *AON6718L

*1500P/50V_4
3 CPU_SVD SVD PHASE_0
0_4
ISP_0
3 CPU_SVC PR40 5 ISL6265AHRTZ-T 32
0_4 SVC PGND_0 ISN_0

PR165 6 31 LGATE_0 +5VPCU


36,38,41,42 VRON ENABLE LGATE_0 +VCORE Volt +/- 5%
6265AGND

0_4
PR163 PC43
PC190 180P/50V_4 Pin 49 is GND Pin +VIN
10K/F_4 7 30 2 1
Countinue current:35A
RBIAS PVCC
PC32
PR36
19.6K/F_4
PR35
97.6K/F_4
Peak current: 40A
PR24 4.7U/6.3V_6
8 40 OCP minimum: 45A
OCSET PGND_NB
255/F_4
4700P/25V_4
PR28

5
9 28 PC25 PC20 PC39 PC15 PC4
VDIFF_0 PGND_1
D D 36A

2200P/50V_4

0.1U/25V_4

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8
1K/F_4
G G
10 26 UGATE_1 4 4
FB_0 UGATE_1 S S +VCORE
PC13
PR19

1
2
3

1
2
3
11 27 PHASE_1 PQ38 PQ32
COMP_0 PHASE_1 AON6428L *AON6428L PL9
54.9K/F_4
PC9 1200P/50V_6 PC23 0.36uH/25A_11
PR16 PR26
12 25 1 2
VW_0 BOOT_1
6.81K/F_4 1_6

COMP_1
VDIFF_1
VSEN_0

VSEN_1
180P/50V_4 0.22U/25V_6
RTN_0

RTN_1

5
ISN_0

ISN_1
ISP_0

VW_1

ISP_1
PC17 29 LGATE_1 PR175

FB_1
LGATE_1

1
D D *2.2_8
G G + + +
1000P/50V_4 4 4 PC209 PC81 PC74
13

14

15

16

17

18

19

20

21

22

24

23
3 S S 3

330u_2V_7343

330u_2V_7343

330u_2V_7343
2

2
1
2
3

1
2
3
PQ37 PQ31 PC201
AON6718L *AON6718L

*1500P/50V_4
PR10
Close to ISP_0
18.2K/F_4
CPU

PC11
socket
PR160 PR1 PC8
3.92K/F_4 PR9 PR8
0.1U/25V_4

+VCORE 0_4 0_4


10_4 ISN_0 PR21 ISP_1
PR13

*1000P/50V_4
18.2K/F_4
3 CPU_VDD0_RUN_FB_H PR22
PC19 3.92K/F_4
3 CPU_VDD0_RUN_FB_L

0.1U/25V_4
*6.81K/F_4

PR5 ISN_1
PR161 Parallel 0_4

10_4
PR7
+1.5VSUS
1K/F_4
Close to
Reserve for uni-plane PC10
PR105 CPU socket PR6
*1200P/50V_6

*0_4
PR15

10_4
PC3
*4700P/25V_4

3 CPU_VDD1_RUN_FB_L
PC1
*180P/50V_4

+VCORE 5
*1K/F_4

3 CPU_VDD1_RUN_FB_H
4 4
PR104
PR3 PR4
+VCORE
*255/F_4 *54.9K/F_4 +CPUVDDNB5
10_4

PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
C 1A
CPU_CORE(ISL6265)
NB5/RD2
Date: Monday, September 28, 2009 Sheet 39 of 46
A B C D E F G H
1 2 3 4 5 6 7 8

+0.75V_DDR_VTT

40
( VTT/2A )
+VIN
+5VPCU +1.5V +/- 5%
+1.5VSUS
Countinue current:6A

1
PC63 PC62 PR74

25
Peak current:12A

2
0_4 PU5

10U/6.3V_8

10U/6.3V_8
2

2
1 24 PD5 PC27 PC30 PC31 PC28
OCP minimum 15A

GND
VTTGND VTT

2200P/50V_4
PC56 *RB501V-40

0.1U/25V_4

4.7U/25V_8

4.7U/25V_8
PR75
*10U/6.3V_8

5
4 CPU_VTT_SENSE 2 23

1
VTTSNS VLDOIN
D
PC59 G
A *0_4 1116VBST PR51 A
3 GND VBST 22 1 2 4
+1.5VSUS_1 2_6 S
0.1U/25V_4 +1.5VSUS_1 +1.5VSUS
PR77

1
2
3
2 1 4 21 1116DRVH PQ36
MODE DRVH AON6428L PL5
*0_4/S
( 3mA ) CV-10L0MZ01/DC-10F0M102
5 20 1116LL
4,6,7 DDR_VTTREF VTTREF LL
1

1
PC87 6 19 1116DRVL PQ42 PR177 +
COMP DRVL

1
AON6718L *2.2_8 PC188 PC187
0.033U/10V_4
2

1
330u_2V_7343
PR91

0.1U/10V_4
D

2
7 18 G 10K/F_4 PC96

1
NC PGND

*100P/50V_4
4

2
S

2
8 17 PC203

1
2
3
VDDQSNS CS_GND

*1500P/50V_4
PR87
1 2 VDDIO_FB_H 3
V5FILT PR92 1116VDDQSET 1116CS PR68
9 VDDQSET CS 16 *10K/F_4
*0_4 +5VPCU
7.5K/F_4

1
PC77
PR93 PR98
10 S3 V5IN 15 2 1

1
0_4 *10K/F_4
1U/6.3V_4 PR90
PR94 V5FILT PR84 10K/F_4
36,42 SUSON 11 14

2
S5 V5FILT
0_4 10_6 VDDIO_FB_L 3

2
PR95 1116TONSET PR96 PC83
+VIN 12 NC PGOOD 13 HWPG 24,36,37,38,41,42

1U/6.3V_4
619K/F_4 0_4

2
RT8207AGQW
B B

+2.5 Volt +/- 5%


Countinue current: 200mA
Peak current: 600mA
PR126 PU9 +2.5V
10K/F_4
36 VR2.5_ON 3 EN VOUT 5

1 +
PC137
+3VPCU VIN R1 PC138
PR128 PC136 1U/6.3V_4

*0.1U/10V_4

1
41.2VSET

*100P/50V_4
2 110K/F_4
PC139 GND FB

1U/6.3V_4

2
RT9043GB

PR125 Vout=1.2(1+R1/R2)
R2 100K/F_4

C C

+1.0V +/- 5%
Countinue current:1.5A
Peak current:3A
+1.5VSUS

+1.0V_VGA
3 VIN NC 5
+1.5VSUS PC197 PC194
+VIN +1.5V_VGA +12VALW
10U/6.3V_8

0.1U/10V_4
PU3
PR167 RT9025 6
PQ11 PC104 10K/F_4 VOUT
5

PR188 PR181 PR186 AON6426L


0.1U/10V_4

2 EN
1M_4 *22_8 1M_4 D
G +5VPCU 4 8 PC61 PC60 PC58
1.5V_OND PC192 VDD GND

10U/6.3V_8

10U/6.3V_8

0.1U/10V_4
4

ADJ
S 1 9
*0.33U/6.3V_4

PGOOD GND1
3

PQ49 PQ50 (6A )


1
2
3

*DMN601K-7 DMN601K-7 PC200

7
+1.5V_VGA
1U/6.3V_4

2
1

1.5V_ONG 2 2
PC215 PR48
1.2VADJ1.0V
3

D D
0.01U/25V_4

R1 25.5K/F_4
2

2
2 PR187 PC106
36,41 VGA_PWROK
VO=(0.8(R1+R2)/R2)
1

36,41 VGACOREON 1M_4 PR41


0.1U/10V_4

0_4 R2 R2<120Kohm
PR38 100K/F_4
PQ55
1

DTC144EUA
PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
DDR3 (RT8207)
NB5/RD2
Date: Monday, September 28, 2009 Sheet 40 of 46
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

VGA Core
41
+5VPCU PD20
RB501V-40 +VIN
PR118
2 18208RTBST1

8208RTVDD1
10_6
+3VSUS
A PC221 A
PC123 1U/6.3V_4
PC118 PC222 PC122 PC119 PC125 PC121 +VGACORE +/- 5%

1U/6.3V_4

2200P/50V_4
PR201

0.1U/25V_4

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8
10K/F_4 8208BST1_1
1
PR198
2 PC224 Countinue current:17A

0.1U/25V_4
0_6 Peak current:22A

5
PD14 D D

13
OCP minimum: 30A

9
1 2 PU15 G G
24,36,37,38,40,42 HWPG PR193 8208CS1 10 CS 12 8208RTDH1 4 4

BST
VDDP
VDD
1SS355 DH S S
6.8K/F_4
+VGA_CORE

1
2
3

1
2
3
PR196 0_4 8208RTPG1 4 11 8208RTLX2 PL13
36,40 VGA_PWROK PGOOD PHASE PQ17 PQ16 0.56U25A(PCMC104T-R56MN)
PR200 10K/F_4 8208RTEN1 15 16 8208TON1 PR197 AON6428L AON6428L 600 mils
36,40 VGACOREON EN/DEM TON
232K/F_4

2
17 8 8208RTDL1
PWRCNTL1 PWRCNTL0 V-CORE PAD DL

1
VOUT
PC226 PR195
8208RTD11 *2.2_8 + + +

0.22U/10V_4
14 5 D D

G0

D0
FB
G1 D1 PC130 PC132 PC131 PC228 PC229 PC230 PC225
L 0 0 1.05V G G

330u_2V_7343

330u_2V_7343

330u_2V_7343
RT8208A

0.1U/10V_4
*10U/6.3V_8

*10U/6.3V_8

*10U/6.3V_8
4 4

2
PR191 S S
+3VPCU PR192 15K/F_4

1
2
3

1
2
3
8208VOUT1
8208RTD10 PQ51 PQ52 PC227
M 0 1 0.95V

*1500P/50V_4
30K/F_4 AON6718L AON6718L
8208RTFB1
+3VPCU
10K/F_4 PR194 2K/F_4 PR190
H 1 0 0.9V PR199 10K/F_4
PC223 *100P/50V_4 RDSon=5m ohm
B B
10K/F_4
TBD 1 1 0.9V
3
PQ54 PR189
DMN601K-7 Vo=0.75(R1+R2)/R2
19 GFX_CORE_CNTRL0 2

+0.9V +/- 5%

3
PQ53
DMN601K-7
Countinue current:1.5A
1
3

PQ21 2
DMN601K-7
19 GFX_CORE_CNTRL1 Peak current:2A
2 +1.5VSUS
19 GFX_CORE_CNTRL1
1

+1.8V +/- 5%
1

3 5
Countinue current:1.2A PC231 PC146 VIN NC +0.9V

Peak current:3A
+3VPCU +1.8V_VGA PU16
RT9025 6
VOUT

10U/6.3V_8

0.1U/10V_4
PR205
36,38,39,42 VRON 2 EN
10K/F_4
3 5 +5VPCU 4 8 PC142 PC144 PC140
PC217 PC220 VIN NC PC234 VDD GND

10U/6.3V_8

10U/6.3V_8

0.1U/10V_4
ADJ
C +3V_VGA C
10U/6.3V_8

0.1U/10V_4

0.1U/10V_4
1 PGOOD GND1 9

1
PU14 PC141

7
RT9025

1U/6.3V_4
6

2
VOUT
VGACOREON PR183 2 PR130 1.2VADJ0.9V PR204
EN *22_8
10K/F_4 R1 12.7K/F_4

2
+5VPCU 4 8 PC114 PC219 PC112
VDD GND PR206 VO=(0.8(R1+R2)/R2)
10U/6.3V_8

10U/6.3V_8

0.1U/10V_4

24,36,37,38,40,42 HWPG
ADJ

PC212 1 9 PQ56 PQ24 0_4 R2 PR207 R2<120Kohm


PGOOD GND1
1

DMN601K-7 *DMN601K-7 100K/F_4


0.33U/6.3V_4

PC143
7

1
2 MAINON_G2
1U/6.3V_4
2

VO=(0.8(R1+R2)/R2)
1.2VADJ1.8VPR185 R2<120Kohm
R1 127K/F_4
2

+12VALW PR203
1

+3VPCU 68.1K_4
R2 PR184 SI
100K/F_4 +VIN
1

PR208 Del U33,PC147,PR202 for No support


1
2
5
6

1M_4
VGA_PWROK PC235 PQ23
MEM_1.5V function

3
PR133 3VGFX_OND DMN601K-7
0.1U/10V_4

3
1M_4
3

PQ58
DMN601K-7 PQ57 VDDR_1.05_EN 33_4 2
12 VDDR_1.05_EN
4

ME3424D PR129
1

3VGFX_ONG 2 0.19A
3

D PQ59 PC236 VDDR_1.05_EN: D


+3V_VGA
DMN601K-7 PC145
0.01U/25V_4

1 : VDDR =1.05V
2

1
0 : VDDR = 0.9V (Default) 220P/50V_4
VGACOREON PR131 2 PR132 PC148
1

1M_4
0.1U/10V_4

10K/F_4
PC149
PROJECT : LX89
0.33U/6.3V_4

For VDDR 1.05 control Quanta Computer Inc.


Size Document Number Rev
Custom 1A
+VGACORE (RT8208/1.8V)
NB5/RD2
Date: Monday, September 28, 2009 Sheet 41 of 46
1 2 3 4 5 6 7 8
5 4 3 2 1

+VH28
PD15

+VA 2 1

42

1
1SS355 PR143
PR141 0_4
PD16
22_6

2
+BATCHG 2 1

1
PC165
1SS355 0.1U/25V_4 PC166

1U/35V_6
PC164 2 1 P2805PG 43

2
G5934CN
D PC167 D

G5934CP
0.1U/25V_4
2 1

1
1U/25V_6

20

19

18

17

16
PR149
0_4 +VAD_1

VOUT
CP

D_CAP
VIN

CN

2
36 LAN_POWER 1 ON1 PG 15 G5934PG

PR152
100K/F_4

1
21,36,43 MAINON
2 ON2 VSENSE 14G5934VSENSE

2
+12VALW
PR151
3 13 100K/F_4
36,38 S5_ON ON3 REG

1
PC176
1U/16V_4
21,36,43 MAINON 4 ON4
PR159
DISC3 7G5934DISC3 +3VS5
0_6
+3VPCU PR148 PR158
+3VLANVCC G5934DISC1 5 6G5934DISC2 +5V
DISC1 DISC2
0_6

DRIVER4

DRIVER3

DRIVER1

DRIVER2
C 0_6 C

DISC4
+5VPCU +1.5VSUS

GND
8
7
6
5

PC175

12

11

G5934DISC4 8

10

21
PU12
0.1U/10V_4

5
6
7
8

5
4 MAIND3.3V G5934RZ1U PC173 +VIN +1.5V
PC126

0.1U/10V_4

0.1U/10V_4
4.6A +3VPCU
PC183 MAIND 4
+3V
2200P/50V_4

4
PQ27 6A 2.35A PR122
AO4496 PC182 *22_8
1
2
3

2200P/50V_4 PQ26 +5V +1.5V PR120

3
2
1
PC177 PR157 AO4496 PQ19 *1M_4
6
5
2
1

3
0_6 AON7430L PQ20
0.1U/10V_4

3
2
1
PC169 +3VPCU *DMN601K-7
0.17A S5_OND
0.1U/10V_4 3
+3VS5 2
PQ28 PC168 PC127

3
ME3424D PC184 0.1U/10V_4 0.1U/10V_4 PQ14
4

+3V
2200P/50V_4

PC179 *DMN601K-7

1
2
5
6

0.1U/10V_4

1
2
PC170 LAN_ON 3 0.67A PR119
*1M_4
0.1U/10V_4

PQ25 +3VLANVCC
PC181 ME3424D

1
2200P/50V_4
B B
PC180 +1.8V +/- 5%

0.1U/10V_4
Countinue current:0.7A
+12VALW
Peak current:1A
+3VPCU
+VIN +5VSUS +3VSUS +3VPCU +1.8V

PR110
1M_4
1
1
2
5
6

PR124 PR121 PR117 PC120 3 5


1M_4 *22_8 *22_8 PC162 PC163 VIN NC
0.1U/10V_4
2

10U/6.3V_8

0.1U/10V_4
3 2.2A
3

PQ12 PQ13 PQ10 +3VSUS PU11


*DMN601K-7 *DMN601K-7 DMN601K-7 PQ15 RT9025 6
4

ME3424D VOUT
PR142
2 2 2 PC117 36,38,39,41 VRON 2 EN
2200P/50V_4

10K/F_4
1

+5VPCU 4 8 PC158 PC159 PC157


PC124 PC161 VDD GND

10U/6.3V_8

10U/6.3V_8

0.1U/10V_4
ADJ
3

0.1U/10V_4

0.1U/10V_4
1 9
1

PGOOD GND1

1
2 PR123 PC160

7
36,40 SUSON 1M_4

1U/6.3V_4

2
SUS_ONG
PQ22 1.2VADJ1.8VPR139
1

DTC144EUA R1 127K/F_4

2
A A
PR140 VO=(0.8(R1+R2)/R2)
24,36,37,38,40,41 HWPG
0_4 R2 PR138 R2<120Kohm
100K/F_4

1
PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Dis-charge IC (P2806)
NB5/RD2
Date: Monday, September 28, 2009 Sheet 42 of 46
5 4 3 2 1
5 4 3 2 1

TOP DC_JACK
65W/90W +BATCHG
20346-100n-1-10p-ldv PL4
+VAD +PRWSRC 5A/08
CN17 +VA PQ41 CN16
7 PL2 PD18 PQ35 1 8 BATT+ 2 1
VDD P4SMAJ20A P0603BDG 5A/08 2 1
2 LED2 VDD 9 2 7
1 10 5A/08 2 1 4 3 3 6 SMD 3 10
LED1 VDD BATDIS_G PC193 PC18 3 10
PL1 4 5
SMC

0.1U/25V_4

0.1U/25V_4
AD_ID 3 AD_ID 2 4 4 9 9
5A/08 3 PC198 PC33 PC36 FDS6679AZ

1
PC53 1 0.1U/25V_4 0.1U/50V_6 1U/25V_8 5 7
D PC47 PD17 PR169 +VIN +3VPCU 5 7 D

0.1U/25V_4
4 GND GND 5
MEK100-05-DPS RC2512-R010 B_TEMP_MBAT 6

0.1U/25V_4
GND 6 6 8 8
PC73 8 1 2
GND ACOK_IN PR32 100/F_4 BATDIS_G PR30 PR29 200045MR008G10JZR
*0.1U/25V_4

330_4 330_4 DFHD08MR030


DC-IN CONN
+VH28 PR20 150K/F_4 bat-bp02083-b6ab5-7h-8p-l-v
36 MBDATA PR33
AC_LED_ON PR81 10K/F_6 +5VPCU 10K/F_4
8681_VDDP PR166 PR171 8681_VDDA
36 MBCLK
PR25 *0_2/S *0_2/S
PR37
3

100/F_4 TEMP_MBAT 36

CSIN
CSIP
2
PC86 PC107 PD2 PD1 1K/F_4

1
PR18

UDZ5V6B-7-F

UDZ5V6B-7-F
*0.1U/25V_4

2 AC_LED_ON# 36 2 1

3
100K/F_4 PC26 PC133
PQ8 1U/10V_4

0.01U/25V_4

0.01U/25V_4
PDTC144EU
1

2
+VAD 2ACOK# PD3

2
2
*1SS355

3
2 1 PR85 PR97
PQ4 0_4 10/F_4 PR79 8681_VDDP PC41 PC40

*100P/50V_4

*100P/50V_4
DMN601K-7 100/F_4 Place this cap

1
PR44

8681_VDDA
2 ACIN PC45 PC52 PC35 PC24
close to EC

2200P/50V_4
PC82

4.7U/25V_8

0.1U/25V_4
*4.7U/25V_8
1M_4

2 8681IACP
1
PQ7 8681_VDDP

8681IACM
2 1
MBATLED0 PR82 10K/F_6 +5VPCU PQ3 PC46 PC93

2
IMD2 DMN601K-7 *1U/10V_4 2 1 1U/10V_4

15
3

5
6
7
8
PQ9 4 2.2U/10V_6 PD7

6
PDTC144EU RB501V-40

IACM
IACP

VDDA

VDDP
C PC85 2 PR80 C
MBATLED0# 36 PR89

1
PC80
*0.1U/25V_4

5,19,36 MBCLK2 1 2 10 SCL 2_6 4


0_4 8681B_2
12 8681B_1
BST
21,36,42 MAINON
1

0.1U/50V_6 PQ2 +BATCHG


PR86
1 2 11 13 8681HDR AO4496 PR173
5,19,36 MBDATA2 SDL HDR
0_4 PL7 RL3720WT-R020
10UH

3
2
1
14 8681LX 8681LR 1 2
PR101 LX
2 1 9 ACAV

5
6
7
8

1
+VA 19,36 ACIN
100K/F_4
16 8681LDR PR17
PR99 LDR
2 1 *2.2_8 PC191 PC205 PC196 PC199 PC208 PC189
+VAD_1

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
100K/F_4 4
PR174

2
PD8 PD6 PR76 PR170
2 1 +VAD_1 2 1 DCIN 1 *0_2/S *0_2/S
VAC PC29
ICHP 5
1SS355 1SS355 10_8 PQ1 *1500P/50V_4

2
PC88 AO4712

3
2
1
1U/25V_8 PC102

1U/10V_4
PD10

1
PR83 1SS355 4
75K/F_4 PR111 ICHM PR102
2 1 2 1 8681COMP8 8681ICHP 1 28681CSP
8681_VDDA COMP
3.3K/F_4 8681ICHM
0_4
1

GND
36 AD_AIR

1
IAC
PR115 PR103 PC99
PC134 1.3K/F_4 0_4 0.01U/50V_4

17

2
0.1U/10V_4 PU7
2

2 2

B PR88 OZ8681LN B
12.4K/F_4 Can be removed form SI.

8681IAC
PC109
0.47U/10V_4 PR127
1

Place this cap 2 1 SYS_I 36


10/F_4
close to EC

1
8681_VDDP

1
PC135
PC108 0.01U/50V_4 ACOK_IN

2
0.01U/50V_4

2
PR113
*10K/F_6 PR54
Place this cap 2 1
PQ6
close to EC

3
PDTC144EU 0_4
PD4
+VH28 2 D/C#_S6A 1 2 D/C# 36
PC113 PR114
PD11 *20K_6 +VAD_1 *1SS355
*0.1U/10V_4

1
*1SS355 PC37

1
5

1 2 *10U/6.3V_8
PR43 PR53
22_6 PU4 *0_4
PR116 PR109
ACIN 2 4 2 1ACOK#

2
*1M_4 *0_4 1 VIN Vout 8
1

1
PC111 PU8 PC49 P2805MF A0 PC51
*SN74AHC1G14DBVR
0.1U/25V_4

*1U/10V_4 2 6
2

GND PG

0.1U/50V_6
2
A A
NC
CP

3 CN D_CAP 5
+VA 42

1
+VH28 42
7

PC65 PR59 PR65


+VAD_1 42 ACIN

0.1U/25V_6
+3VPCU 4,6,12,24,33,35,36,37,38,39,40,41,42 1 2 1 2

2
+5VPCU 33,34,36,37,38,39,40,41,42 2 1 *0_4 0_4 PROJECT : LX6_LX7
+BATCHG 42
PC64
0.01U/50V_4
Quanta Computer Inc.
42 P2805PG Size Document Number Rev
Custom Charger (BQ24704) 1A
NB5
Date: Monday, September 28, 2009 Sheet 43 of 46
5 4 3 2 1
5 4 3 2 1

CPU Power 1
CPU Power 2
EC Pin98
SUSON HWPG VRM_PWRGD
+VCORE0
+1.8VSUS
D D

EC Pin99
EC Pin34 MAINON
+VCORE1
VDDA_EN

+0.9VSMVTT

+CPUVDDNB

+2.5V
HWPG
+1.2V

EC Pin101
HWPG
C
S5_ON S5_OND +1.1V C

Delay +3VS5

EC Pin101 VCORE_PG
S5_ON
+1.2VS5 +VGACORE
HWPG

+5VSUS EC Pin99
MAINON

EC Pin98 Option 1.8V_OND


Delay +1.8V
SUSON SUSD
Delay +3VSUS VCORE_PG

B B

+5V
+5V
+1.5V
EC Pin99
MAINON MAIND
Delay +3V

1 2 3 4 EC Pin76
A
S5_ON SUSON MAINON HWPG ECPWROK SB_PWRGD_IN NB_PWRGD_IN A

S5_OND SUSD MAIND VCORE_PG Delay 600ms 3.3V 1.8V


RSMRST# VRM_PWRGD

PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Power control
NB5/RD2
Date: Monday, September 28, 2009 Sheet 44 of 46
5 4 3 2 1
5 4 3 2 1

Power & Ground


Label ACTIVE Description Control Signal SMBUS
+VIN S0, S3, S4, S5 AC ADAPTER (19V) DEVICE ADDRESS BUS
+3VPCU S0, S3, S4, S5 ALWAYS POWER (3V) CLOCK GENERATOR
D D
+3V S0 MAINON DDR3
+3VSUS S0, S3 SUSON CPU THERMAL SENSOR
+3VS5 S0, S3, S4, S5 S5_ON CHARGER
+3VLANVCC S0 LAN_POWER

+5VPCU S0, S3, S4, S5 ALWAYS POWER (5V)

+5V S0 MAINON PCB STACK UP


+5V_VCC1 LAYER 1 : TOP
+5VALW LAYER 2 :GND
LAYER 3 : IN1
+10VALW LAYER 4 : IN2
+15VALW LAYER 5 : VCC
LAYER 6 : BOT
C C
+1.8V S0 +1.5_ON

+1.8VSUS S0, S3

+1.5V S0 MAINON
PCI DEVICES IRQ ROUTING
DEVICE IDSEL # REQ/GNT # PCI_INT
+1.5VSUS S0, S3 DDR CORE POWER SUSON

+1.5VSUS_1

+1.5V_VGA S0 VGA , VRAM POWER +1.5_ON

+1.2V S0 VRON

+1.2VSUS S0, S3 SUSON

+1.1V S0 VDDPCIE - PCIE-E MAIN POWER VRON

+1.1VS5 S0, S3, S4, S5 STANDBY POWER S5_ON


B B
+1.1V_DYN S0 NB VDDC - CORE LOGIC POWER DYN_PWR_EN

+1.05V S0 HT POWER (1.05V) VRON

+1.0V_VGA S0 PARK DPX_VDD10 POWER VRON

+2.5V S0 CPU VDDA POWER VR2.5_ON

+VCORE0 S0 CPU CORE POWER (?V) VRON

+VCORE1 S0 CPU CORE POWER (?V) VRON

+CPUVDDNB S0 CPU VDDNB POWER VRON

+0.75_DDR_VTT S0 DDR COMMAND & CONTROL PULL UP POWER SUSON

DDR_VTTREF S0, S3 DDR REFERENCE POWER SUSON

+VGA_CORE S0 VGA CORE POWER MAINON


A A
+AVBAT S0, S3, S4, S5 RTC & KBC POWER (3_3V)

PROJECT : LX89
Quanta Computer Inc.
Size Document Number Rev
Custom<Doc> 1A
NB5/RD2
Date: Monday, September 28, 2009 Sheet 45 of 46
5 4 3 2 1
www.s-manuals.com

You might also like