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INDRAPRASTHA INSTITUTE of

INFORMATION TECHNOLOGY
DELHI

Department
of
Electronics & Communication Engineering

ECE111|Digital Circuits

Dr. G.S. Visweswaran

END SEM PROJECT

Student Name :Arun Yadav


Roll No. : 2020033
Date: 09/04/21
Aim: To design a synchronous decade up counter with inputs of d flip flop with 4 input
multiplexers Q1,Q0 as the select input and realizing the data inputs.

Components/ICs Used: Four 4:1 MUX, Four D flip flop, Hex display, 2:1 splitter,4:1 splitter,
clock

Screenshot of screen

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Truth Table

K Maps
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Logical Expression

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Circuit diagram

Applications
1.Used in analog to digital converter.
2.used in clock generation, alarm clock

Observations/Results
The circuit made on circuit verse counts from 0 to 9 and the aim of the experiment is
completed
e.g To make synchronous decade up counter and the truth table is also satisfied.
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