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DIGITAL ELECTRONICS &SYSTEMS LAB

Akula Srinivas ; CH.EN.U4ECE19001


EXP 2 – HALF ADDRER & FULL ADDER IN DSCH2 & TINKERCAD

Aim To study the Operation of following :

Half Adder and Full Adder

Tools Required:
Logical Gates
Dip switches
Connecting Wires
Power supply
Buttons
LED
IC

Theory :

Half Adder
The half adder circuit is required to add two input digits (for Ex. A and B) and
generate a carry and sum. The half adder adds two binary digits called as augend and
addend and produces two outputs as sum and carry (XOR is applied to both inputs to
produce sum and AND gate is applied to both inputs to produce carry). It means half
adder circuits can add only two digits in other words if we need to add more than 2
digits it will not work, so, it the limitation of an half adder electronic circuits.

Truth Table:
D2SCH Implementation
Implementation of Half Adder using NAND gates:
Implementation of Half Adder using NOR gates:
Tinker cad Implementation

IC Pin Diagram

XOR Gate

AND Gate
Full Adder

Full Adder is the adder which adds three inputs and produces two outputs. The first
two inputs are A and B and the third input is an input carry as C-IN. The output carry
is designated as C-OUT and the normal output is designated as S which is SUM. A
full adder logic is designed in such a manner that can take eight inputs together to
create a byte-wide adder and cascade the carry bit from one adder to the another.

Truth Table

Logical Expression for SUM:


= A’ B’ C-IN + A’ B C-IN’ + A B’ C-IN’ + A B C-IN
= C-IN (A’ B’ + A B) + C-IN’ (A’ B + A B’)
= C-IN XOR (A XOR B)
= (1,2,4,7)

Logical Expression for C-OUT:


= A’ B C-IN + A B’ C-IN + A B C-IN’ + A B C-IN
= A B + B C-IN + A C-IN
= (3,5,6,7)

Another form in which C-OUT can be implemented:


= A B + A C-IN + B C-IN (A + A’)
= A B C-IN + A B + A C-IN + A’ B C-IN
= A B (1 +C-IN) + A C-IN + A’ B C-IN
= A B + A C-IN + A’ B C-IN
= A B + A C-IN (B + B’) + A’ B C-IN
= A B C-IN + A B + A B’ C-IN + A’ B C-IN
= A B (C-IN + 1) + A B’ C-IN + A’ B C-IN
= A B + A B’ C-IN + A’ B C-IN
= AB + C-IN (A’ B + A B’)
Therefore COUT = AB + C-IN (A EX – OR B)

D2SCH Implementation
Implementation of Full Adder using NAND gates:
Implementation of Full Adder using NOR gates:
Tinker cad Implementation
IC Pin Diagram

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