COMPUTER SCIENCE AND ENGINEERING

19CSE281 - DIGITAL ELECTRONICS AND

SYSTEMS

LAB EXPERIMENT- 2

CH SURYA UMA SHANKAR

CH.EN.U4CSE19101
CSE/B

TITLE: HALF ADDRER & FULL ADDER IN DSCH2 &

TINKERCAD

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AIM:

To study the operations and working of

1. Half-adder
2. Full-adder

And implementing them successfully using dsch2 software and Tinkercad by

timing graphs.

COMPONENTS REQUIRED:

1. Logical gates
2. Dip switches
3. Connecting wires
4. IC (depending on gates used )
5. Power supply
6. Buttons
7. LEDs

DISCRIPTION:

ADDERS:

Adders are digital circuits performing addition of numbers. Adders are used
in almost day to day life system residing in ALU ( arithmetic logic unit). They
are also used in other parts of the processor, where addresses , table
indices, increment and decrement operators and similar operations are done
and calculated.

In this report will be discuss about full and half adders.

ADDERS

FULL ADDER HALF ADDER

HALF ADDER:

Half Adder is a combinational logic circuit which is designed by

connecting one EX-OR gate and one AND gate. The half adder circuit
has two inputs: A and B, which add two input digits and generates a carry
and a sum.

The output obtained from the EX-OR gate is the sum of the two numbers
while that obtained by AND gate is the carry. There will be no forwarding
of carry addition because there is no logic gate to process that. Thus, this
is called Half Adder circuit.

Output Expression:

Sum = A XOR B

Carry = A AND B
TRUTH TABLE:
A (input) B (input) C (output) S (output)

0 0 0 0

1 0 0 1

0 1 0 1

1 1 1 0

FULL ADDER:

Full Adder is the circuit which consists of two EX-OR gates, two AND gates
and one OR gate. Full Adder is the adder which adds three inputs and
produces two outputs which consists of two EX-OR gates, two AND gates
and one OR gate.

The first two inputs are A and B and the third input is an input carry as C-IN.
The output carry is designated as C-OUT and the normal output is
designated as S which is SUM.
TRUTH TABLE:

Output Expression:

Sum = (A XOR B) XOR Cin

Carry = A AND B OR Cin(A XOR B)

PROCEDURE FOR CONTRUCTING ADDERS IN DSCH2:

• The required gates to make the half/full adder circuit are

collected from the library browser and placed on the blank screen of
the simulator. These gates are then connected with the help of a
connecting line.

• The buttons and LED’s are connected with the connecting lines to
the logic gates.

• Once the circuit has been built, click on “run” button on the top
left. The simulation of half adder will start once it is clicked.

• Now, multiple inputs are given by changing the state of buttons.

Once simulation is done with various inputs, you can observe the active
and non- active states of gates from the ‘timing diagram’.

IMPLEMENTATION OUTPUTS:

HALF ADDER Dsch2

Outputs: Half Adder:

Timing Graph:

HALF ADDER USING NAND GATES:

Timing Graph:

HALF ADDER USING NOR GATES:

Timing Graph:
TinkerCAD OUTPUT:
FULL ADDER Dsch2 Outputs:
Timing Graph:
FULL ADDER USING NAND GATES:

Timing Graph:
TinkerCAD OUTPUT:
TIMING DIAGRAM EXPLANATION:

1) Half Adder: When two inputs are given to half adder circuit,
two outputs are obtained, namely, sum and carry. It can be
inferred from the timing diagram of half adder that we get sum
when both the
 inputs differ, while we get carry when both the inputs are high i.e.
when ‘1’.
2) Full Adder: In full adder, along with the two inputs, there is a
third input named carry in, and the two outputs namely, sum and
carry out. It can be inferred from the timing diagram that bulb
glowing representing sum, carry in, carry out differs with the inputs.

INFERENCE:

From the timing graphs, simulation diagrams and tinkercad circuits

given above we can make out that half adder and full adders can be
drawn with XOR, AND, NAND gates and the truth tables correlate each
other. Thus the aim of the experiment has been done justice.

RESULT:

Hence, the program to simulation half and full adder has been verified and
implemented successfully using dsch2 and tinkercad.