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FQP13N50/FQPF13N50: 500V N-Channel MOSFET
FQP13N50/FQPF13N50: 500V N-Channel MOSFET
QFET TM
FQP13N50/FQPF13N50
500V N-Channel MOSFET
D
!
◀ ▲
G! ●
●
TO-220 GD S
TO-220F
G DS
FQP Series FQPF Series !
S
Thermal Characteristics
Symbol Parameter FQP13N50 FQPF13N50 Units
RθJC Thermal Resistance, Junction-to-Case 0.74 2.23 °C/W
RθCS Thermal Resistance, Case-to-Sink 0.5 -- °C/W
Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 500 -- -- V
∆BVDSS Breakdown Voltage Temperature
ID = 250 µA, Referenced to 25°C -- 0.48 -- V/°C
/ ∆TJ Coefficient
IDSS VDS = 500 V, VGS = 0 V -- -- 1 µA
Zero Gate Voltage Drain Current
VDS = 400 V, TC = 125°C -- -- 10 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 3.0 -- 5.0 V
RDS(on) Static Drain-Source
VGS = 10 V, ID = 6.25 A -- 0.33 0.43 Ω
On-Resistance
gFS Forward Transconductance VDS = 50 V, ID = 6.25 A (Note 4) -- 10 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V, -- 1800 2300 pF
Coss Output Capacitance f = 1.0 MHz -- 245 320 pF
Crss Reverse Transfer Capacitance -- 25 35 pF
Switching Characteristics
td(on) Turn-On Delay Time -- 40 90 ns
VDD = 250 V, ID = 13.4 A,
tr Turn-On Rise Time -- 140 290 ns
RG = 25 Ω
td(off) Turn-Off Delay Time -- 100 210 ns
tf Turn-Off Fall Time (Note 4, 5) -- 85 180 ns
Qg Total Gate Charge VDS = 400 V, ID = 13.4 A, -- 45 60 nC
Qgs Gate-Source Charge VGS = 10 V -- 11 -- nC
Qgd Gate-Drain Charge (Note 4, 5) -- 22 -- nC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 9.3mH, IAS = 12.5A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 13.4A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
VGS
Top : 15 V
10 V
8.0 V
7.0 V
6.5 V 1
1 6.0 V
10
10
150℃
25℃
0
10 -55℃
0
10
※ Notes :
※ Notes : 1. VDS = 50V
1. 250μ s Pulse Test 2. 250μ s Pulse Test
2. TC = 25℃
-1
10
10
-1
10
0
10
1 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
1.4
1.2
IDR , Reverse Drain Current [A]
VGS = 10V 1
Drain-Source On-Resistance
1.0 10
RDS(ON) [Ω ],
VGS = 20V
0.8
0.6
0
10
0.4 150℃ 25℃
※ Notes :
0.2 1. VGS = 0V
※ Note : TJ = 25℃ 2. 250μ s Pulse Test
0.0 -1
0 10 20 30 40 50 10
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
ID, Drain Current [A] VSD , Source-Drain Voltage [V]
3500 12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd VDS = 100V
3000
10 VDS = 250V
2500
8
Capacitance [pF]
2000 Coss
6
1500
※ Notes : 4
1. VGS = 0 V
1000 Crss 2. f = 1 MHz
2
500
※ Note : ID = 13.4 A
0 0
-1 0 1 0 5 10 15 20 25 30 35 40 45 50
10 10 10
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]
1.2 3.0
2.5
Drain-Source Breakdown Voltage
1.1
Drain-Source On-Resistance
BV DSS , (Normalized)
RDS(ON) , (Normalized)
2.0
1.0 1.5
1.0
0.9 ※ Notes :
1. VGS = 0 V
※ Notes :
2. ID = 250 μ A 0.5 1. VGS = 10 V
2. ID = 6.7 A
0.8 0.0
-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200
o o
TJ, Junction Temperature [ C] TJ, Junction Temperature [ C]
10 µs
10 µs 100 µs
100 µs
10
1
1 ms
ID, Drain Current [A]
1
1 ms 10 ms
10
10 ms 100 ms
DC 0
DC
10
0
10
※ Notes : -1
※ Notes :
o
10
o
1. TC = 25 C 1. TC = 25 C
o o
2. TJ = 150 C 2. TJ = 150 C
3. Single Pulse 3. Single Pulse
-1 -2
10 10
0 1 2 3 0 1 2 3
10 10 10 10 10 10 10 10
Figure 9-1. Maximum Safe Operating Area Figure 9-2. Maximum Safe Operating Area
for FQP13N50 for FQPF13N50
15
12
ID, Drain Current [A]
0
25 50 75 100 125 150
0
10
( t) , T h e r m a l R e s p o n s e
D = 0 .5
0 .2
※ N o te s :
-1
10 1 . Z θ J C ( t) = 0 .7 4 ℃ / W M a x .
0 .1 2 . D u ty F a c to r , D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C ( t)
0 .0 5
0 .0 2
PDM
JC
0 .0 1 t1
s i n g le p u ls e
θ
t2
Z
-2
10
-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
10
0 D = 0 .5
0 .2
※ N o te s :
0 .1 1 . Z θ J C ( t) = 2 .2 3 ℃ /W M a x .
2 . D u ty F a c to r , D = t 1 /t 2
-1
0 .0 5 3 . T J M - T C = P D M * Z θ J C ( t)
10
0 .0 2
0 .0 1 PDM
θ JC
t1
t2
Z
10
-2 s i n g l e p u ls e
-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
VGS
Same Type
50KΩ
as DUT Qg
12V 200nF
300nF 10V
VDS
VGS Qgs Qgd
DUT
3mA
Charge
RL VDS
VDS 90%
VGS VDD
RG
10%
VGS
10V DUT
td(on) tr td(off)
tf
t on t off
L BVDSS
1
VDS EAS = ---- L IAS2 --------------------
2 BVDSS - VDD
BVDSS
ID
IAS
RG
VDD ID (t)
DUT +
VDS
I SD
L
Driver
RG
Same Type
as DUT VDD
IRM
VSD VDD
Body Diode
Forward Voltage Drop
TO-220
9.90 ±0.20 4.50 ±0.20
1.30 ±0.10
(8.70)
2.80 ±0.10
(1.70)
+0.10
ø3.60 ±0.10 1.30 –0.05
18.95MAX.
(3.70)
15.90 ±0.20
9.20 ±0.20
(1.46)
(3.00)
(45°
)
(1.00)
13.08 ±0.20
10.08 ±0.30
10.00 ±0.20
Dimensions in Millimeters
TO-220F
3.30 ±0.10
6.68 ±0.20
15.87 ±0.20
15.80 ±0.20
(1.00x45°)
MAX1.47
9.75 ±0.30
0.80 ±0.10
(3
0°
)
#1
0.35 ±0.10 +0.10
0.50 –0.05 2.76 ±0.20
2.54TYP 2.54TYP
[2.54 ±0.20] [2.54 ±0.20]
4.70 ±0.20
9.40 ±0.20
Dimensions in Millimeters
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Rev. I2