Q.no 1. in Parallel Transfer Data Transmission Mode Number of Bits Transferred at A Time in 8051 Is

Seat No -
Total number of questions : 60
1000257_T1 FUND OF MICROCONTROLLER AND APP

Time : 1hr
Max Marks : 50
N.B
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Q.no 1. In parallel transfer data transmission mode number of bits transferred at

a time in 8051 is ….
A : 16 bit
B : 8 bit
C : 2 bit
D : 4 bit
Q.no 2. Which of the following instructions will copy the content of r1 to r5?
A : MOV R5,R1
B : MOV R1,R5
C : MOV R5,01H
D : MOV R1,11H
Q.no 3. Timers and Counters are used for
A : Generating time delays
B : Measuring pulse durations or timing intervals.
C : Counting pulses or events
D : All of the above
Q.no 4. Which ports assist in addressing lower order and higher address bytes
into the data bus simultaneously, while accessing the external data memory?
A : Port 0 & Port 1 respectively
B : Port 1 & Port 2 respectively
C : Port 0 & Port 2 respectively
D : Port 2 & Port 3 respectively
Q.no 5. 18h-1fh is range for
A : Bank 0
B : Bank 1
C : Bank 2
D : Bank 3
Q.no 6. Which bus acquire the potential of liberally receiving the code byte after
addressing the lower order address byte?
A : Data Bus
B : Address Bus
C : Both a and b
D : None of these
Q.no 7. Which devices are specifically being used for converting serial to parallel
and from parallel to serial respectively?
A : Timers
B : Counters
C : Registers
D : Serial Communication
Q.no 8. Which port gives lower order address bus when 8051 is interfaced with
external memory?
A : P0
B : P1
C : P2
D : P3
Q.no 9. Find out the roll over value for the timer in Mode 0, Mode 1 and Mode 2?
A : 00FFH,0FFFH,FFFFH
B : 1FFFH,0FFFH,FFFFH
C : 1FFFH,FFFFH,00FFH
D : 1FFFH,00FFH,FFFFH
Q.no 10. …….. is sent out first while sending the data.
A : LSB
B : Parity Bit
C : MSB
D : Data Bit
Q.no 11. With what frequency UART operates (where f denoted the crystal
frequency )?
A : f/12
B : f/32
C : f/144
D : f/384
Q.no 12. What is the function of SCON register?
A : to control SBUF and SMOD registers
B : to program the start bit, stop bit, and data bits of framing
C : Both
D : None of the mentioned
Q.no 13. Which port gives higher order address bus when 8051 is interfaced with
external memory?
A : P0
B : P1
C : P2
D : P3
Q.no 14. Operations such as addition or subtraction are performed by which

functional unit of a microprocessor?
A : Control and timing
B : Register array
C : Arithmetic logic unit
D : Integer operations unit
Q.no 15. If Timer 0 is to be used as a counter, then at what particular pin clock
pulse need to be applied?
A : P3.3
B : P3.4
C : P3.5
D : P3.6
Q.no 16. What happens when the RD signal becomes low during the read cycle?
A : Data byte gets loaded from external data memory to data bus
B : Address byte gets loaded from external data memory to address bus
C : Data byte gets loaded from external program memory to address bus
D : Address byte gets loaded from external program memory to data bus
Q.no 17. Which functioning element of microcontroller generate and transmit the
address of instructions to memory through internal bus?
A : Instruction Decoding Unit
B : Timing and Control Unit
C : Program Counter
D : Arithmetic Logic Unit
Q.no 18. Which of the following signal control the flow of data?
A : RTS
B : DTR
C : BOTH
D : NONE
Q.no 19. The timer frequency is always …….of the frequency of the crystal
attached to 8051.
A : 1/16.
B : 1/12.
C : 1/32.
D : 1/64.
Q.no 20. Which of the following best describes the use of framing in asynchronous
means of communication?
A : it binds the data properly
B : it tells us about the start and stop of the data to be transmitted or received
C : it is used for error checking
D : it is used for flow control
Q.no 21. Serial communication is controlled by an 8-bit SRF register called
A : TMOD
B : TCON
C : SCON
D : SMOD
Q.no 22. Which of the following instructions will copy the 10h to the accumulator?
A : mov a, 10
B : mov a, 10h
C : mov a, #10h
D : mov a, @10h
Q.no 23. What is the function of the TMOD register?
A : TMOD register is used to set different timer’s or counter’s to their appropriate

modes
B : TMOD register is used to load the count of the timer.
C : Is the destination or the final register where the result is obtained after the
operation of the timer
D : Is used to interrupt the timer
Q.no 24. What is the clock source for the timers?
A : some external crystal applied to the micro-controller for executing the timer
B : from the crystal applied to the micro-controller
C : through the software
D : through programming
Q.no 25. Which of the following statement is false?
A : All 8051 ports are bidirectional
B : All 8051 ports are bit programmable
C : All 8051 ports output FFH after reset
D : All 8051 ports need external pull ups
Q.no 26. If any ISR is too long, its vector address must contain a
A : CALL instruction
B : Jump instruction
C : RETI instruction
D : None of these
Q.no 27. Which bus is a bidirectional bus?
A : Address bus
B : Data bus
C : Address bus and data bus
D : None of the above
Q.no 28. Each timer has ……..registers that are …….bits wide.
A : 2, 16
B : 3, 8
C : 4, 16
D : 2, 8
Q.no 29. The software used to drive microprocessor-based systems is called
A : assembly language
B : firmware
C : machine language
D : basic interpreter instructions
Q.no 30. How many times loop will be repeated or the value of counter should be ,
if the 8051 operated on a frequency of 12MHz to generate a time delay of 1
second?
A : 14H
B : 12H
C : 20H
D : 16H
Q.no 31. Which of the following instructions will load value 35H into the high byte
of timer 0?
A : MOV TH0, #35H
B : MOV TH0, 35H

C : MOV T0, #35H
D : MOV T0, 35H
Q.no 32. What will be the content of accumulator, if [A] =45H and XRL A, A
instruction is executed?
A : 45H
B : 90H
C : 00H
D : None of these
Q.no 33. Shift register mode is second name to ………serial communication modes.
A : Mode 0
B : Mode1
C : Mode2
D : Mode 3
Q.no 34. Which timer mode exhibit the necessity to generate the interrupt by
setting EA bit in IE enhancing the program counter to jump to another vector
location ?
A : Mode 0
B : Mode 1
C : Mode 2
D : Mode 3
Q.no 35. The memory map of a 4 KB memory begins at the location 4000H. What is
the last location on the chip?
A : 43FFH
B : 4FFFH
C : 47FFH
D : 7FFFH
Q.no 36. What is meant by Maskable interrupts?

A : An interrupt which can never turned off
B : An interrupt that can be turned off by the programmer
C : Both
Q.no 37. The alternate use of TXD pin is
A : Serial data i/p
B : Serial data o/p
C : Parallel data i/p
D : Parallel data o/p
Q.no 38. When TIMER 1 is used to set baud rate it must be in ……
A : MODE 2
B : MODE 1
C : Mode 3
D : MODE 0
Q.no 39. What is the maximum delay generated by the 12 MHz clock frequency in
accordance to an auto-reload mode (Mode 2 ) operation of the timer?
A : 125 μ s
B : 250 μ s
C : 256 μ s
D : 1200 μ s
Q.no 40. What happens when TCON.1 is set by some software instruction?
A : INT0 is acknowledged for a falling edge
B : INT0 is disabled
C : If it is enabled, then a software interrupt is generated
D : None of these
Q.no 41. Following are the features of 8051 microcontroller a. Program Memory b.
No. of I/O Lines c. On chip Peripherals d. No. of Timers/ Counters
A : a-4k ROM, b-32, c-UART, d-2
B : a-4k ROM, b-33, c-USART, d-3
C : a-32k ROM, b-32, c-UART, d-2
D : a-8k ROM, b-32, c-UART, d-3
Q.no 42. 8-bit auto reload timer/counter belongs to which timer mode.
A : Mode 2
B : Mode 1
C : Mode 0
D : Mode 3
Q.no 43. Assuming that initially both interrupts were enabled, what would
happen if, during execution of ISR of one interrupt, another interrupt signal
interrupts the processor?
A : ISR of other interrupt would be executed immediately
B : If the later interrupt is of higher priority, then only its ISR would be executed,
otherwise not
C : The second interrupt ISR would be executed after completion of the RETI
instruction of the first ISR and another instruction
D : None of these
Q.no 44. The stack pointer contains 1FH just prior to the execution of RET at the
end of the subroutine. What is the value of the stack pointer after the execution
of this instruction?
A : 1BH
B : 1CH
C : FFH
D : 00H
Q.no 45. In asynchronous method, each character is placed between start and stop
bits called ……….
A : gating
B : framing
C : packed
D : sending
Q.no 46. When the 8051 is reset and the EA line is LOW, the program counter
points to the first program instruction in the:
A : internal code memory
B : external code memory
C : internal data memory
D : external data memory
Q.no 47. If AJMP instruction is executed, then destination must be
A : Within the same 4Kbytes
B : Within the same 2Kbytes
C : Within the same 8 Kbytes
D : Within the same 2bytes
Q.no 48. Out of following instructions which is incorrect way to add 1 to the
accumulator content?
A : ADD A,#01H
B : MOV R1,#01H ADD A,R1
C : INC A
D : All the above
Q.no 49. For a given 8051 controller system, if the crystal frequency is 18 MHz
then what would be the timer clock frequency,f and its period,T?
A : f-1.5 MHz and T-0.667 microseconds
B : f-1 MHz and T-1 microseconds
C : f-2 MHz and T-1.085 microseconds
D : f-1.085MHz and T-0.60 microseconds

Q.no 50. The ____ instruction transfers the program control to the instruction next
to CALL in the main program:
A : RET
B : RST
C : CALL
D : None
Q.no 51. Which rotate instruction/s has an ability to modify CY flag by moving the
bit-7 & bit-0 respectively to an accumulator?
A : RR & RL
B : RLC & RRC
C : RR & RRC
D : RL & RLC
Q.no 52. What is the Address (SFR) for TCON, SCON, SBUF, PCON and PSW
respectively?
A : 88H, 98H, 99H, 87H, 0D0H.
B : 98H, 99H, 87H, 88H, 0D0H
C : 0D0H, 87H, 88H, 99H, 98H
D : 87H, 88H, 0D0H, 98H, 99H
Q.no 53. Serial data transmission is initiated by
A : Placing the data byte in SBUF
B : Setting TI flag
C : Enabling TI flag
D : None of these
Q.no 54. In mode 0 if count reaches 1FFF H the next count will be……….
A : 0000H
B : FFFF H
C : 1FF H
D : 1111 H
respectively?
A : 88H, 98H, 99H, 87H, 0D0H.
B : 98H, 99H, 87H, 88H, 0D0H
C : 0D0H, 87H, 88H, 99H, 98H
D : 87H, 88H, 0D0H, 98H, 99H
Q.no 56. Which data memory control and handle the operation of several
peripherals by assigning them in the category of special function registers?
A : Internal on-chip RAM
B : External off-chip RAM
C : Both a & b
Q.no 57. ………… are 8-bit register used for serial communication.
A : TMOD/TCON
B : SBUF/SCON
C : SM0
D : SM1
Q.no 58. What is the status of CY, AC and P when 64H and 9CH are added?
A : CY=0,AC=0,P=0
B : CY=0,AC=1,P=0
C : CY=0,AC=0,P=1
D : CY=1,AC=1,P=0
Q.no 59. To transmit the ninth bit, it should be placed in
A : Bit 0 of next byte
B : SMOD of PCON
C : TB8 of SCON
D : None of these
Q.no 60. This bit is used to decide whether the timer is used as a delay generator
(timer) or an event counter.
A : GATE
B : M1,M0
C : C/T
D : NONE
Q.no 1. SCON register, it is a …… addressable register.
A : Bit
B : Byte
C : Both Bit & Byte
D : Hexadecimal
Q.no 2. Timer mode register (TMOD) is a ……. Special function register
A : 16 bit
B : 8 bit
C : 2 bit
D : 4 bit
Q.no 3. An opcode :
A : Translates a mnemonic
B : instructs the processor
C : stores data
D : all of above
Q.no 4. The circuits in the 8051 that provide the arithmetic and logic functions are
called the:
A : CPU
B : ALU
C : I/O
Q.no 5. What is the maximum delay that can be generated with the crystal
frequency of 22MHz?
A : 2978.9 sec
B : 0.011 msec
C : 11.63 sec
D : 2.97 msec
Q.no 6. Which port pins are multifunctional?
A : P3
B : P1
C : P2
D : P0
Q.no 7. The second part of the instruction is the data to be operated on, and it is
called:
A : operand
B : opcode
C : hex code
D : mnemonic
Q.no 8. 8051 has two timers with …… wide.
A:8
B : 16
C : 24
D : 32
Q.no 9. A HIGH on which pin resets the 8051 microcontroller?

A : RESET
B : RST
C : PSEN
D : RSET
Q.no 10. In parallel transfer data transmission mode number of bits transferred
at a time in 8051 is ….
A : 16 bit
B : 8 bit
C : 2 bit
D : 4 bit
external memory?
A : P0
B : P1
C : P2
D : P3
A : LSB
B : Parity Bit
C : MSB
D : Data Bit

modes
A : TMOD
B : TCON
C : SCON
D : SMOD
external memory?
A : P0
B : P1
C : P2
D : P3
A : MOV R5,R1
B : MOV R1,R5
C : MOV R5,01H
D : MOV R1,11H
A : RTS
B : DTR
C : BOTH
D : NONE

B : Register array
C : Program Counter
Q.no 26. Timer mode is being selected by which register.
A : TMOD
B : GATE
C : M0, M1
D : TCON
Q.no 27. NOP is:
A : No output possible
B : no odd parity
C : no operation performed
D : none
D : None of these
Q.no 29. If all bits of SFR IP are cleared and INT0 and INT1 interrupts are received
simultaneously, which one would be serviced first?
A : INT0
B : INT1
C : BOTH
D : NONE
Q.no 30. The upper 128 bytes of an internal data memory from 80H through FFH
usually represent ___________
A : General-purpose registers
B : Special function registers
C : Stack pointers
D : Program counters
Q.no 31. In …....the timer 0 registers are configured as two separate 8 bit counters.
A : Mode 1
B : Mode 2
C : Mode 3
D : Mode 4
Q.no 32. How many registers can be utilized to write the programs by an effective
selection of register bank in program status word (PSW)?
A:8
B : 16
C : 32
D : 64
Q.no 33. Which memory allow the execution of instructions till the address limit
of 0FFFH especially when the External Access (EA) pin is held high?
A : Internal Program Memory
B : External Program Memory
C : Both a & b
of timer 0?
A : MOV TH0, #35H
B : MOV TH0, 35H
C : MOV T0, #35H
D : MOV T0, 35H
B : firmware
A : Serial data i/p
B : Serial data o/p
A : Address bus
B : Data bus
A : 2, 16
B : 3, 8
C : 4, 16
D : 2, 8
second?
A : 14H
B : 12H
C : 20H
D : 16H
D : None of these
A : Mode 2
B : Mode 1
C : Mode 0
D : Mode 3
A : 45H
B : 90H
C : 00H
D : None of these
A : 125 μ s
B : 250 μ s
C : 256 μ s
D : 1200 μ s
D : None of these
A : RET
B : RST
C : CALL
D : None
A : ADD A,#01H
C : INC A
D : All the above
A : Mode 0
B : Mode1
C : Mode2
D : Mode 3
location ?
A : Mode 0
B : Mode 1
C : Mode 2
D : Mode 3
Q.no 51. How many machine cycle/s is / are executed by the counters in 8051 in
order to detect '1' to '0' transition at the external pin?
A:1
B:2
C:4
D:8
Q.no 52. Which of the following statement is true:
A : Accumulator is a 16 bit register

B : PC points to the last instruction to be executed
C : Stack works on the principle of LIFO
D : All instructions affect the flags
Q.no 53. External pull up registers are connected to port 0 so as to
A : Use port 0 as an i/p or an o/p, as it has open drain o/p
B : Configure port 0 as an i/p port
C : Configure port 0 as an o/p port
Q.no 54. Which signal from CPU has an ability to respond the clocking value of D
flip-flop (bit latch) from the internal bus?
A : Write - to - Read Signal
B : Write - to - Latch Signal
C : Read - to - Write Signal
D : Read - to - Latch Signal
Q.no 55. What would be the content of the accumulator after execution of the
instruction, MOV A, SP just after system reset?
A : Undefined
B : 07H
C : 08H
D : None of these
Q.no 56. Assuming that bank 0 is selected and register R0 of this bank contains
80H, which of the following instructions would copy the data from port 0 to
register B?
A : MOV 0F0H, 80H
B : MOV B, @R0
C : MOV F0H,@R0
D : None of these
Q.no 57. Which of the following commands will copy the contents of RAM whose
address is in register 0 to port 1?
A : MOV @ P1, R0
B : MOV @ R0, P1
C : MOV P1, @ R0
D : MOV P1, R0
Q.no 58. Value to be loaded to TMOD register to select counter 0 in mode 2 and
timer 1 in mode 1 is:
A : 16H
B : 64H
C : 32H
D : 20H
Q.no 59. What happens when the pins of port 0 & port 2 are switched to internal
ADDR and ADDR / DATA bus respectively while accessing an external memory?
A : Ports cannot be used as general-purpose Inputs / Outputs
B : Ports start sinking more current than sourcing
C : Ports cannot be further used as high impedance input
B : SMOD of PCON
C : TB8 of SCON
D : None of these
A : Bit
B : Byte
C : Both Bit & Byte

D : Hexadecimal
called the:
A : CPU
B : ALU
C : I/O

A : P3.3
B : P3.4
C : P3.5
D : P3.6
A : Data Bus
B : Address Bus
C : Both a and b
D : None of these
Q.no 6. An opcode :

C : stores data
D : all of above
C : Both
A : Timers
B : Counters
C : Registers
Q.no 9. The timer frequency is always …….of the frequency of the crystal attached
to 8051.
A : 1/16.
B : 1/12.
C : 1/32.
D : 1/64.
A : 16 bit
B : 8 bit
C : 2 bit
D : 4 bit
A : Bank 0
B : Bank 1
C : Bank 2
D : Bank 3
frequency of 22MHz?
A : 2978.9 sec
B : 0.011 msec
C : 11.63 sec
D : 2.97 msec
frequency )?
A : f/12
B : f/32
C : f/144
D : f/384
A : mov a, 10
B : mov a, 10h
C : mov a, #10h
D : mov a, @10h
A : P3
B : P1
C : P2
D : P0
A:8
B : 16
C : 24
D : 32
A : MOV R5,R1
B : MOV R1,R5
C : MOV R5,01H
D : MOV R1,11H
A : 16 bit
B : 8 bit
C : 2 bit
D : 4 bit

C : Program Counter

B : Register array

modes
external memory?
A : P0
B : P1
C : P2
D : P3
A : 1BH
B : 1CH
C : FFH
D : 00H
A : 43FFH
B : 4FFFH
C : 47FFH
D : 7FFFH
A : MODE 2
B : MODE 1
C : Mode 3
D : MODE 0
C : Both
A : INT0
B : INT1
C : BOTH
D : NONE
A : TMOD
B : GATE
C : M0, M1
D : TCON
A : Mode 1
B : Mode 2
C : Mode 3
D : Mode 4
A : gating
B : framing
C : packed
D : sending
otherwise not
D : None of these
D : None of these
Q.no 37. NOP is:
B : no odd parity
D : none

C : Stack pointers
A : 125 μ s
B : 250 μ s
C : 256 μ s
D : 1200 μ s
C : Both a & b
A : ADD A,#01H
C : INC A
D : All the above
A : Serial data i/p
B : Serial data o/p
second?
A : 14H
B : 12H
C : 20H
D : 16H
location ?
A : Mode 0
B : Mode 1
C : Mode 2
D : Mode 3
B : firmware
A:8
B : 16
C : 32
D : 64
A : Mode 0
B : Mode1
C : Mode2
D : Mode 3
A : 0000H
B : FFFF H
C : 1FF H
D : 1111 H
A : GATE
B : M1,M0
C : C/T
D : NONE
A : RR & RL
B : RLC & RRC
C : RR & RRC
D : RL & RLC
C : Both a & b
respectively?
A : 88H, 98H, 99H, 87H, 0D0H.
B : 98H, 99H, 87H, 88H, 0D0H
C : 0D0H, 87H, 88H, 99H, 98H
D : 87H, 88H, 0D0H, 98H, 99H
A : TMOD/TCON
B : SBUF/SCON
C : SM0
D : SM1
D : None of these
respectively?
A : 88H, 98H, 99H, 87H, 0D0H.
B : 98H, 99H, 87H, 88H, 0D0H

C : 0D0H, 87H, 88H, 99H, 98H
D : 87H, 88H, 0D0H, 98H, 99H
A : CY=0,AC=0,P=0
B : CY=0,AC=1,P=0
C : CY=0,AC=0,P=1
D : CY=1,AC=1,P=0
A : 16H
B : 64H
C : 32H
D : 20H
A : LSB
B : Parity Bit
C : MSB
D : Data Bit
C : Both
A : RTS
B : DTR
C : BOTH
D : NONE
A : Data Bus
B : Address Bus
C : Both a and b
D : None of these
called the:
A : CPU
B : ALU
C : I/O

A : P3.3
B : P3.4
C : P3.5
D : P3.6
A : TMOD
B : TCON
C : SCON
D : SMOD
external memory?
A : P0
B : P1
C : P2
D : P3
A : Bit
B : Byte
C : Both Bit & Byte
D : Hexadecimal
Q.no 14. An opcode :
C : stores data
D : all of above
A : RESET
B : RST
C : PSEN
D : RSET
called:
A : operand
B : opcode
C : hex code
D : mnemonic
A:8
B : 16
C : 24
D : 32
external memory?
A : P0
B : P1
C : P2
D : P3
attached to 8051.
A : 1/16.
B : 1/12.
C : 1/32.
D : 1/64.

modes
frequency )?
A : f/12
B : f/32
C : f/144
D : f/384
A : 16 bit
B : 8 bit
C : 2 bit
D : 4 bit
D : None of these
A : MODE 2
B : MODE 1
C : Mode 3
D : MODE 0
of timer 0?
A : MOV TH0, #35H
B : MOV TH0, 35H
C : MOV T0, #35H
D : MOV T0, 35H
A : gating
B : framing
C : packed
D : sending
otherwise not
D : None of these
A : 2, 16
B : 3, 8
C : 4, 16
D : 2, 8

A : TMOD
B : GATE
C : M0, M1
D : TCON
A : INT0
B : INT1
C : BOTH
D : NONE
A : Mode 2
B : Mode 1
C : Mode 0
D : Mode 3
A : RET
B : RST
C : CALL
D : None
A : 1BH
B : 1CH
C : FFH
D : 00H
A : 43FFH
B : 4FFFH
C : 47FFH
D : 7FFFH
A : 45H
B : 90H
C : 00H
D : None of these
A : Address bus
B : Data bus
D : None of these

C : Both
A : Mode 1
B : Mode 2
C : Mode 3
D : Mode 4
C : Both a & b
A : ADD A,#01H
C : INC A
D : All the above
Q.no 47. NOP is:
B : no odd parity
D : none
C : Stack pointers
A : Mode 0
B : Mode1
C : Mode2
D : Mode 3
A : Serial data i/p
B : Serial data o/p
A : Undefined
B : 07H
C : 08H
D : None of these
A:1
B:2
C:4
D:8

register B?
A : MOV 0F0H, 80H
B : MOV B, @R0
C : MOV F0H,@R0
D : None of these
A : MOV @ P1, R0
B : MOV @ R0, P1
C : MOV P1, @ R0
D : MOV P1, R0
B : SMOD of PCON
C : TB8 of SCON
D : None of these
A : TMOD/TCON
B : SBUF/SCON
C : SM0
D : SM1
C : Both
A : Bank 0
B : Bank 1
C : Bank 2
D : Bank 3
A : Timers
B : Counters
C : Registers
A : MOV R5,R1
B : MOV R1,R5
C : MOV R5,01H
D : MOV R1,11H

A : P3.3
B : P3.4
C : P3.5
D : P3.6
A : TMOD
B : TCON
C : SCON
D : SMOD

C : Program Counter
frequency of 22MHz?
A : 2978.9 sec
B : 0.011 msec
C : 11.63 sec
D : 2.97 msec
A : RTS
B : DTR
C : BOTH
D : NONE

Q.no 11. The circuits in the 8051 that provide the arithmetic and logic functions
are called the:
A : CPU
B : ALU
C : I/O
A : mov a, 10
B : mov a, 10h
C : mov a, #10h
D : mov a, @10h
A : Data Bus
B : Address Bus
C : Both a and b
D : None of these
B : Register array
A : P3
B : P1
C : P2
D : P0
A : 16 bit
B : 8 bit
C : 2 bit
D : 4 bit
A : LSB
B : Parity Bit
C : MSB
D : Data Bit

modes
A : 16 bit
B : 8 bit
C : 2 bit
D : 4 bit
A:8
B : 16
C : 24
D : 32
A : Bit
B : Byte
C : Both Bit & Byte
D : Hexadecimal
C : stores data
D : all of above
D : None of these
A : INT0
B : INT1
C : BOTH
D : NONE
of timer 0?
A : MOV TH0, #35H
B : MOV TH0, 35H
C : MOV T0, #35H
D : MOV T0, 35H
A:8
B : 16
C : 32
D : 64
A : gating
B : framing
C : packed
D : sending
A : 2, 16
B : 3, 8
C : 4, 16
D : 2, 8
second?
A : 14H
B : 12H
C : 20H
D : 16H
A : MODE 2
B : MODE 1
C : Mode 3
D : MODE 0
D : None of these
A : 125 μ s
B : 250 μ s
C : 256 μ s
D : 1200 μ s
A : TMOD
B : GATE
C : M0, M1
D : TCON
location ?
A : Mode 0
B : Mode 1
C : Mode 2
D : Mode 3
otherwise not
D : None of these
A : Mode 2
B : Mode 1
C : Mode 0
D : Mode 3
B : firmware

C : Both
A : 45H
B : 90H
C : 00H
D : None of these
A : 43FFH
B : 4FFFH
C : 47FFH
D : 7FFFH
A : 1BH
B : 1CH
C : FFH
D : 00H
A : Serial data i/p
B : Serial data o/p

A : Address bus
B : Data bus
A : ADD A,#01H
C : INC A
D : All the above
C : Both a & b
respectively?
A : 88H, 98H, 99H, 87H, 0D0H.
B : 98H, 99H, 87H, 88H, 0D0H
C : 0D0H, 87H, 88H, 99H, 98H
D : 87H, 88H, 0D0H, 98H, 99H
A : 0000H
B : FFFF H
C : 1FF H
D : 1111 H
A : RR & RL
B : RLC & RRC
C : RR & RRC
D : RL & RLC
A : CY=0,AC=0,P=0
B : CY=0,AC=1,P=0
C : CY=0,AC=0,P=1
D : CY=1,AC=1,P=0
A : 16H
B : 64H
C : 32H
D : 20H
respectively?
A : 88H, 98H, 99H, 87H, 0D0H.
B : 98H, 99H, 87H, 88H, 0D0H
C : 0D0H, 87H, 88H, 99H, 98H
D : 87H, 88H, 0D0H, 98H, 99H
A : GATE
B : M1,M0
C : C/T
D : NONE
D : None of these
C : Both a & b
A : MOV @ P1, R0
B : MOV @ R0, P1
C : MOV P1, @ R0
D : MOV P1, R0
A : RESET
B : RST
C : PSEN
D : RSET
A : Timers
B : Counters
C : Registers

C : Program Counter
external memory?
A : P0
B : P1
C : P2
D : P3
A : MOV R5,R1
B : MOV R1,R5
C : MOV R5,01H
D : MOV R1,11H
frequency )?
A : f/12
B : f/32
C : f/144
D : f/384
A : Bank 0
B : Bank 1
C : Bank 2
D : Bank 3
external memory?
A : P0
B : P1
C : P2
D : P3
C : Both
attached to 8051.
A : 1/16.
B : 1/12.
C : 1/32.
D : 1/64.
A : TMOD
B : TCON
C : SCON
D : SMOD
A : P3.3
B : P3.4
C : P3.5
D : P3.6
called:
A : operand
B : opcode
C : hex code
D : mnemonic
A : Bit
B : Byte
C : Both Bit & Byte
D : Hexadecimal
A : 16 bit
B : 8 bit
C : 2 bit
D : 4 bit
A : RTS
B : DTR
C : BOTH
D : NONE
C : stores data
D : all of above
A : Data Bus
B : Address Bus
C : Both a and b
D : None of these
A : mov a, 10
B : mov a, 10h
C : mov a, #10h
D : mov a, @10h
A : P3
B : P1
C : P2
D : P0
A : 2, 16
B : 3, 8
C : 4, 16
D : 2, 8
C : Stack pointers
A : gating
B : framing
C : packed
D : sending
D : None of these
A : Mode 0
B : Mode1
C : Mode2
D : Mode 3
A : Mode 1
B : Mode 2
C : Mode 3
D : Mode 4
A : RET
B : RST
C : CALL
D : None
A:8
B : 16
C : 32
D : 64
second?
A : 14H
B : 12H
C : 20H
D : 16H
D : None of these
A : MODE 2
B : MODE 1
C : Mode 3
D : MODE 0
of timer 0?
A : MOV TH0, #35H

B : MOV TH0, 35H
C : MOV T0, #35H
D : MOV T0, 35H
Q.no 41. NOP is:
B : no odd parity
D : none
A : INT0
B : INT1
C : BOTH
D : NONE
C : Both a & b
A : 43FFH
B : 4FFFH
C : 47FFH
D : 7FFFH
A : 45H
B : 90H
C : 00H
D : None of these
A : Mode 2
B : Mode 1
C : Mode 0
D : Mode 3
B : firmware
A : Address bus
B : Data bus
A : TMOD
B : GATE
C : M0, M1
D : TCON
A : 125 μ s
B : 250 μ s
C : 256 μ s
D : 1200 μ s
A:1
B:2
C:4
D:8
A : TMOD/TCON
B : SBUF/SCON
C : SM0
D : SM1

B : SMOD of PCON
C : TB8 of SCON
D : None of these
A : Undefined
B : 07H
C : 08H
D : None of these
register B?
A : MOV 0F0H, 80H

B : MOV B, @R0
C : MOV F0H,@R0
D : None of these
A : GATE
B : M1,M0
C : C/T
D : NONE
A : RESET
B : RST
C : PSEN
D : RSET

modes

B : Register array
frequency of 22MHz?
A : 2978.9 sec
B : 0.011 msec
C : 11.63 sec
D : 2.97 msec

C : Program Counter
frequency )?
A : f/12
B : f/32
C : f/144
D : f/384
A : LSB
B : Parity Bit
C : MSB
D : Data Bit
A : 16 bit
B : 8 bit
C : 2 bit
D : 4 bit
A : MOV R5,R1
B : MOV R1,R5
C : MOV R5,01H
D : MOV R1,11H
external memory?
A : P0
B : P1
C : P2
D : P3
A : Bank 0
B : Bank 1
C : Bank 2
D : Bank 3
A : Timers
B : Counters
C : Registers
A:8
B : 16
C : 24
D : 32
are called the:
A : CPU
B : ALU
C : I/O
A : TMOD
B : TCON
C : SCON
D : SMOD
A : 16 bit
B : 8 bit
C : 2 bit
D : 4 bit
A : RTS
B : DTR
C : BOTH
D : NONE
A : Bit
B : Byte
C : Both Bit & Byte
D : Hexadecimal
attached to 8051.
A : 1/16.
B : 1/12.
C : 1/32.
D : 1/64.
otherwise not
D : None of these
A : 1BH
B : 1CH
C : FFH
D : 00H
D : None of these
A : Serial data i/p
B : Serial data o/p
C : Both
location ?
A : Mode 0
B : Mode 1
C : Mode 2
D : Mode 3
A : Mode 0
B : Mode1
C : Mode2
D : Mode 3
C : Stack pointers
D : None of these
A : gating
B : framing
C : packed
D : sending
A : 2, 16
B : 3, 8
C : 4, 16
D : 2, 8
A : ADD A,#01H
C : INC A
D : All the above
A : 43FFH
B : 4FFFH
C : 47FFH
D : 7FFFH
A:8
B : 16
C : 32
D : 64
A : 125 μ s
B : 250 μ s
C : 256 μ s
D : 1200 μ s
A : INT0
B : INT1
C : BOTH
D : NONE
second?
A : 14H
B : 12H
C : 20H
D : 16H
A : Mode 2
B : Mode 1
C : Mode 0
D : Mode 3
D : None of these
Q.no 47. NOP is:
B : no odd parity
D : none
A : Address bus
B : Data bus
A : MODE 2
B : MODE 1
C : Mode 3
D : MODE 0
C : Both a & b
respectively?
A : 88H, 98H, 99H, 87H, 0D0H.

B : 98H, 99H, 87H, 88H, 0D0H
C : 0D0H, 87H, 88H, 99H, 98H
D : 87H, 88H, 0D0H, 98H, 99H
A : CY=0,AC=0,P=0
B : CY=0,AC=1,P=0
C : CY=0,AC=0,P=1
D : CY=1,AC=1,P=0
C : Both a & b
A : RR & RL
B : RLC & RRC
C : RR & RRC
D : RL & RLC

D : None of these
A : MOV @ P1, R0
B : MOV @ R0, P1
C : MOV P1, @ R0
D : MOV P1, R0
A : 0000H
B : FFFF H
C : 1FF H
D : 1111 H
respectively?
A : 88H, 98H, 99H, 87H, 0D0H.
B : 98H, 99H, 87H, 88H, 0D0H
C : 0D0H, 87H, 88H, 99H, 98H
D : 87H, 88H, 0D0H, 98H, 99H
A : 16H
B : 64H
C : 32H
D : 20H
A : RESET
B : RST
C : PSEN
D : RSET
Q.no 2. An opcode :
C : stores data
D : all of above
A : P3
B : P1
C : P2
D : P0
frequency of 22MHz?
A : 2978.9 sec
B : 0.011 msec
C : 11.63 sec
D : 2.97 msec
A : Data Bus
B : Address Bus
C : Both a and b
D : None of these

A : P3.3
B : P3.4
C : P3.5
D : P3.6
A : mov a, 10
B : mov a, 10h
C : mov a, #10h
D : mov a, @10h
external memory?
A : P0
B : P1
C : P2
D : P3
called:
A : operand
B : opcode
C : hex code
D : mnemonic
C : Both

modes

B : Register array

A : LSB
B : Parity Bit
C : MSB
D : Data Bit
A : Bank 0
B : Bank 1
C : Bank 2
D : Bank 3
A:8
B : 16
C : 24
D : 32
A : Bit
B : Byte
C : Both Bit & Byte
D : Hexadecimal

A : 16 bit
B : 8 bit
C : 2 bit
D : 4 bit
are called the:
A : CPU
B : ALU
C : I/O
external memory?
A : P0
B : P1
C : P2
D : P3
A : 16 bit
B : 8 bit
C : 2 bit
D : 4 bit
D : None of these
A : TMOD
B : GATE
C : M0, M1
D : TCON
B : firmware
C : Both
location ?
A : Mode 0
B : Mode 1
C : Mode 2
D : Mode 3

A : RET
B : RST
C : CALL
D : None
A : Serial data i/p
B : Serial data o/p
A : 45H
B : 90H
C : 00H
D : None of these
of timer 0?
A : MOV TH0, #35H
B : MOV TH0, 35H
C : MOV T0, #35H
D : MOV T0, 35H
A : 1BH
B : 1CH
C : FFH
D : 00H
otherwise not
D : None of these
C : Stack pointers
A : Mode 1
B : Mode 2
C : Mode 3
D : Mode 4
A : Mode 0
B : Mode1
C : Mode2
D : Mode 3
A : gating
B : framing
C : packed
D : sending
A : 43FFH
B : 4FFFH
C : 47FFH
D : 7FFFH
A : Mode 2
B : Mode 1
C : Mode 0
D : Mode 3
A : 125 μ s
B : 250 μ s
C : 256 μ s
D : 1200 μ s
D : None of these
A : INT0
B : INT1
C : BOTH
D : NONE
C : Both a & b
A : Undefined
B : 07H
C : 08H
D : None of these
A : TMOD/TCON
B : SBUF/SCON
C : SM0
D : SM1

B : SMOD of PCON
C : TB8 of SCON
D : None of these
A:1
B:2
C:4
D:8
register B?
A : MOV 0F0H, 80H
B : MOV B, @R0
C : MOV F0H,@R0
D : None of these

A : GATE
B : M1,M0
C : C/T
D : NONE
A : MOV @ P1, R0
B : MOV @ R0, P1
C : MOV P1, @ R0
D : MOV P1, R0
A : RESET
B : RST
C : PSEN
D : RSET
A : Data Bus
B : Address Bus
C : Both a and b
D : None of these
A : P3
B : P1
C : P2
D : P0
frequency of 22MHz?
A : 2978.9 sec
B : 0.011 msec
C : 11.63 sec
D : 2.97 msec
A : MOV R5,R1
B : MOV R1,R5
C : MOV R5,01H
D : MOV R1,11H
A : Timers
B : Counters
C : Registers

A : P3.3
B : P3.4
C : P3.5
D : P3.6
frequency )?
A : f/12
B : f/32
C : f/144
D : f/384

C : Program Counter
A : RTS
B : DTR
C : BOTH
D : NONE
attached to 8051.
A : 1/16.
B : 1/12.
C : 1/32.
D : 1/64.
C : stores data
D : all of above
A : TMOD
B : TCON
C : SCON
D : SMOD


modes
C : Both

A : Bank 0
B : Bank 1
C : Bank 2
D : Bank 3

B : Register array
are called the:
A : CPU
B : ALU
C : I/O
C : Both

D : None of these
A : MODE 2
B : MODE 1
C : Mode 3
D : MODE 0
location ?
A : Mode 0
B : Mode 1
C : Mode 2
D : Mode 3
of timer 0?
A : MOV TH0, #35H
B : MOV TH0, 35H
C : MOV T0, #35H
D : MOV T0, 35H
B : firmware
A : Address bus
B : Data bus
A:8
B : 16
C : 32
D : 64
A : TMOD
B : GATE
C : M0, M1
D : TCON
A : Serial data i/p
B : Serial data o/p
second?
A : 14H
B : 12H
C : 20H
D : 16H
A : 2, 16
B : 3, 8
C : 4, 16
D : 2, 8
A : RET
B : RST
C : CALL
D : None
Q.no 42. NOP is:
B : no odd parity
D : none
D : None of these
A : 45H
B : 90H
C : 00H
D : None of these
A : 1BH
B : 1CH
C : FFH
D : 00H
A : ADD A,#01H
C : INC A
D : All the above
C : Both a & b
A : gating
B : framing
C : packed
D : sending
A : Mode 2
B : Mode 1
C : Mode 0
D : Mode 3
C : Both a & b
A : 0000H
B : FFFF H
C : 1FF H
D : 1111 H
D : None of these
A : 16H
B : 64H
C : 32H
D : 20H
A : CY=0,AC=0,P=0
B : CY=0,AC=1,P=0
C : CY=0,AC=0,P=1
D : CY=1,AC=1,P=0
A : RR & RL
B : RLC & RRC
C : RR & RRC
D : RL & RLC
respectively?
A : 88H, 98H, 99H, 87H, 0D0H.
B : 98H, 99H, 87H, 88H, 0D0H
C : 0D0H, 87H, 88H, 99H, 98H
D : 87H, 88H, 0D0H, 98H, 99H
respectively?
A : 88H, 98H, 99H, 87H, 0D0H.
B : 98H, 99H, 87H, 88H, 0D0H
C : 0D0H, 87H, 88H, 99H, 98H
D : 87H, 88H, 0D0H, 98H, 99H

A:1
B:2
C:4
D:8
external memory?
A : P0
B : P1
C : P2
D : P3
A : LSB
B : Parity Bit
C : MSB
D : Data Bit
frequency )?
A : f/12
B : f/32
C : f/144
D : f/384
called:
A : operand
B : opcode
C : hex code
D : mnemonic
A : MOV R5,R1
B : MOV R1,R5
C : MOV R5,01H
D : MOV R1,11H
frequency of 22MHz?
A : 2978.9 sec
B : 0.011 msec
C : 11.63 sec
D : 2.97 msec

A : P3.3
B : P3.4
C : P3.5
D : P3.6
A : mov a, 10
B : mov a, 10h
C : mov a, #10h
D : mov a, @10h
A:8
B : 16
C : 24
D : 32
A : Timers
B : Counters
C : Registers
A : Bit
B : Byte
C : Both Bit & Byte
D : Hexadecimal
A : RESET
B : RST
C : PSEN
D : RSET
A : Data Bus
B : Address Bus
C : Both a and b
D : None of these
C : Program Counter
external memory?
A : P0
B : P1
C : P2
D : P3
A : 16 bit
B : 8 bit
C : 2 bit
D : 4 bit
A : P3
B : P1
C : P2
D : P0
A : 16 bit
B : 8 bit
C : 2 bit
D : 4 bit
attached to 8051.
A : 1/16.
B : 1/12.
C : 1/32.
D : 1/64.
A : Bank 0
B : Bank 1
C : Bank 2
D : Bank 3

modes

C : Both
A : INT0
B : INT1
C : BOTH
D : NONE

C : Stack pointers
A : Mode 1
B : Mode 2
C : Mode 3
D : Mode 4
A : 43FFH
B : 4FFFH
C : 47FFH
D : 7FFFH
A : Mode 0
B : Mode1
C : Mode2
D : Mode 3
D : None of these

otherwise not
D : None of these
A : 125 μ s
B : 250 μ s
C : 256 μ s
D : 1200 μ s
Q.no 35. NOP is:
B : no odd parity
D : none
D : None of these
B : firmware

A:8
B : 16
C : 32
D : 64
A : 1BH
B : 1CH
C : FFH
D : 00H
of timer 0?
A : MOV TH0, #35H
B : MOV TH0, 35H
C : MOV T0, #35H
D : MOV T0, 35H
A : Serial data i/p
B : Serial data o/p
A : 2, 16
B : 3, 8
C : 4, 16
D : 2, 8
A : MODE 2
B : MODE 1
C : Mode 3
D : MODE 0
location ?
A : Mode 0
B : Mode 1
C : Mode 2
D : Mode 3
A : Address bus
B : Data bus
A : Mode 2
B : Mode 1
C : Mode 0
D : Mode 3
second?
A : 14H
B : 12H
C : 20H
D : 16H
A : TMOD
B : GATE
C : M0, M1
D : TCON
A : ADD A,#01H
C : INC A
D : All the above
A : Undefined
B : 07H
C : 08H
D : None of these
A : MOV @ P1, R0
B : MOV @ R0, P1
C : MOV P1, @ R0
D : MOV P1, R0
A : TMOD/TCON
B : SBUF/SCON
C : SM0
D : SM1
C : Both a & b
A : GATE
B : M1,M0
C : C/T
D : NONE
B : SMOD of PCON
C : TB8 of SCON
D : None of these
register B?
A : MOV 0F0H, 80H
B : MOV B, @R0
C : MOV F0H,@R0
D : None of these

Q.no 1. in Parallel Transfer Data Transmission Mode Number of Bits Transferred at A Time in 8051 Is

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Q.no 1. in Parallel Transfer Data Transmission Mode Number of Bits Transferred at A Time in 8051 Is

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Seat No -

Total number of questions : 60

1000257_T1 FUND OF MICROCONTROLLER AND APP

2) Attempt any 50 questions out of 60.

3) Use of calculator is allowed.

4) Each question carries 1 Mark.

5) Specially abled students are allowed 20 minutes extra for examination.

6) Do not use pencils to darken answer.

8) No change will be allowed once the answer is marked on OMR Sheet.

9) Rough work shall not be done on OMR sheet or on question paper.

10) Darken ONLY ONE CIRCLE for each answer.

Q.no 1. In parallel transfer data transmission mode number of bits transferred at

A : Generating time delays

B : Measuring pulse durations or timing intervals.

C : Counting pulses or events

D : All of the above

A : Port 0 & Port 1 respectively

B : Port 1 & Port 2 respectively

C : Port 0 & Port 2 respectively

D : Port 2 & Port 3 respectively

Q.no 5. 18h-1fh is range for

Q.no 12. What is the function of SCON register?

A : to control SBUF and SMOD registers

D : None of the mentioned

Q.no 14. Operations such as addition or subtraction are performed by which

A : Control and timing

C : Arithmetic logic unit

D : Integer operations unit

B : Timing and Control Unit

D : Arithmetic Logic Unit

A : it binds the data properly

C : it is used for error checking

D : it is used for ﬂow control

Q.no 21. Serial communication is controlled by an 8-bit SRF register called

Q.no 23. What is the function of the TMOD register?

A : TMOD register is used to set different timer’s or counter’s to their appropriate

B : TMOD register is used to load the count of the timer.

D : Is used to interrupt the timer

Q.no 24. What is the clock source for the timers?

B : from the crystal applied to the micro-controller

C : through the software

Q.no 25. Which of the following statement is false?

A : All 8051 ports are bidirectional

B : All 8051 ports are bit programmable

C : All 8051 ports output FFH after reset

D : All 8051 ports need external pull ups

Q.no 27. Which bus is a bidirectional bus?

C : Address bus and data bus

D : None of the above

Q.no 29. The software used to drive microprocessor-based systems is called

D : basic interpreter instructions

A : MOV TH0, #35H

B : MOV TH0, 35H

D : MOV T0, 35H

Q.no 36. What is meant by Maskable interrupts?

B : An interrupt that can be turned off by the programmer

D : None of the above

Q.no 37. The alternate use of TXD pin is

A : Serial data i/p

B : Serial data o/p

C : Parallel data i/p

D : Parallel data o/p

Q.no 38. When TIMER 1 is used to set baud rate it must be in ……