Professional Documents
Culture Documents
CV FPGA To HPS Bridge Design Example Readme
CV FPGA To HPS Bridge Design Example Readme
=========================================================
Requirements
-----------------------
* CV Soc DevKit Rev E (some older versions may also work)
* Quartus II 16.0b211
* SoC EDS 16.0b211
Contents
-----------------------
CV_FPGA_to_HPS_Bridge_Design_Example
output_files
CV_fpga_to_hps_bridge.sof - prebuilt FPGA
configuration file
software
Altera-SoCFPGA-HardwareLib-FPGA2HPS-Bridge-CV-GNU - HPS baremetal software
project
spl_bsp - prebuilt Preloader
doc
readme.txt - this file
sample_output.txt - sample results
throughput_results.xlsx - spreadsheet with
results
CV_fpga_to_hps_bridge.qpf - hardware project
...
Running Instructions
-----------------------
1. Extract the archive on a folder on the host PC
2. Use Quartus Programmer to program FPGA with
output_files/CV_fpga_to_hps_bridge.sof
3. Start Eclipse from Embedded Command Shell
4. Select workspace to be anywhere on your computer
5. Import the software/Altera-SoCFPGA-HardwareLib-FPGA2HPS-Bridge-CV-GNU project in
Eclipse. Do not select the option to copy the files into the current workspace
6. Build the project
7. Run the project from Eclipse.