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GOVERNMENT ENGINEERING COLLEGE, GANDHINAGAR

DEPT. OF ELECTRONICS AND COMMUNICATION ENGG .

Experiment No.: 6

AIM: To Implement Timer and Counter Programming for AVR ATmega32.


Objectives:

 To understand the modes and functionality of timers of ATmega16


 To program Timer0 to generate a square waves
 To program Timer1 for event counting

APPRATUS: Atmel Studio, Easy AVR 7 Board

Theory:
Atmega32 has three timers. Timer 0 and Timer 2 are 8-bit timers whereas Timer 1 is the 16-
bit timer. Generally, a timer can be used in two modes i.e. Timer and Counter. If we use
internal clock source, then the frequency of the oscillator is fed to the timer. In this
configuration, timer can be used to generate the time delay. If we use the external clock
option, we feed pulses through one of the I/O pins. In this configuration, timer can be used as
event counter.

Important Registers and Flags Associated with Timers:


Each timer has following registers associated with it:
TCNTn: Timer/Counter Reg: Upon reset, it has zero value and counts up with each timer clock
TCCRn: Timer/Counter Control Reg: For setting modes of operation of Timer n
OCRn: Output Compare Reg: When contents of TCNT are equal to OCR, OCF flag is raised and
value of TCNTn is reset to zero
TOVn: Timer Overflow Flag: When overflow occurs, this flag is raised
OCFn: Output Compare Flag: Discussed in OCRn
There are four modes of operation. Each timer can be programmed to any one mode out of four
available modes options using timer mode selector bit i.e. WGM00 and WGM01 bits for timer0.
Following are the timer modes:

1. Normal Mode:
In this mode, timer can be used for delay generation. Timer starts counting from the initial
value of TCNT0 up to the maximum value at every crystal clock (if no prescaler is used).
After the maximum value, TCNT0 register is reset to value 0x00.

Normal mode of timer 0

Microprocessor and Microcontroller Subject Code: 3141008


GOVERNMENT ENGINEERING COLLEGE, GANDHINAGAR
DEPT. OF ELECTRONICS AND COMMUNICATION ENGG .

2. CTC (Clear Timer on Capture match) Mode:


In CTC mode the counter is cleared to zero when the counter value (TCNT0) matches the
OCR0. The OCR0 defines the top value for the counter.

CTC mode of timer 0

3. PWM, phase correct Mode


4. Fast PWM Mode

Mode 3 and 4 will be discussed in the PWM lab.

a) TIMER 0 PROGRAMMING FOR SQUARE WAVE GENERATION:


Bit # 7 6 5 4 3 2 1 0
Bit Name FOC0 WGM00 COM01 COM00 WGM01 CS02 CS01 CS00
Read/Write W RW RW RW RW RW RW RW
Initial Value 0 0 0 0 0 0 0 0

FOC0 Force Output Compare: FOC0 bit is only active when the WGM00:1 bits
specifies a non-PWM mode. This bit is always read as zero. When this bit is
set, it causes the wave generator to act as if a compare match has occurred.
WGM00 WGM01 Timer Mode 0 Selector Bits (Four modes available)
0 0 Normal Mode
0 1 CTC (Clear Timer on Compare Match) Mode
1 0 PWM, Phase Correct Mode
1 1 Fast PWM
COM01 : COM00 Compare Output Mode: These bits control waveform generation, if CTC
mode is selected through WGM00-01 bits then:
0 0 Normal mode operation
0 1 Toggle OC0 (PB3, Pin 4) on compare match
1 0 Clear OC0 on compare match
1 1 Set OC0 on compare match
CS02:00 D2 D1 D0 Timer 0 Clock Source Selector
0 0 0 No clock source (Timer/Counter stopped)
0 0 1 clk (No Prescaling)
0 1 0 clk / 8
0 1 1 clk / 64
1 0 0 clk / 256
1 0 1 clk / 1024
1 1 0 External clock on T0 (PB0) pin. Clock on falling edge
1 1 1 External clock on T0 (PB0) pin. Clock on rising edge

Microprocessor and Microcontroller Subject Code: 3141008


GOVERNMENT ENGINEERING COLLEGE, GANDHINAGAR
DEPT. OF ELECTRONICS AND COMMUNICATION ENGG .

TCCR0 (Timer / Counter Control Register)

Bit # 7 6 5 4 3 2 1 0
Bit Name OCF2 TOV2 ICF1 OCF1A OCF1B TOV1 OCF0 TOV0
Read/Write W RW RW RW RW RW RW RW
Initial Value 0 0 0 0 0 0 0 0

TOV0 D0 Timer 0 overflow flag bit (0 = Timer0 did not overflow)


OCF0 D1 Timer 0 output compare flag (0 = compare match did not occur)
TOV1 D2 Timer 1 overflow flag bit
OCF1B D3 Timer 1 output compare B match flag
OCF1A D4 Timer 1 output compare A match flag
ICF1 D5 Input capture flag
TOV2 D6 Timer 2 overflow flag
OCF2 D7 Timer 2 output compare flag
TIFR(Timer / Counter Interrupt Flag Register)

Steps to Program 8-Bit, Timer 0 in Normal Mode:


1. Load TCNT0 register with initial values from which the timer will count up.
2. Load TCCR0 register according to the operation required (Mode selection, prescaler setting
etc.)
3. Keep monitoring TOV0 flag in TIFR register. If TOV0 flag is raised, timer overflow occurs.
Now clear TOV0 flag and proceed to step 1 again.

Difference between Timer0 and Timer2:


1. Both the timers are 8-bit timers but first difference is that Timer2 can also be used as Real Time
Clock (RTC) when a crystal of 32.768 kHz is connected between TOSC1 and TOSC2 pins and
AS2 bit of ASSR (Asynchronous Status Reg.) is set.
2. Last two combinations of CS02-00 bits select the rising and falling edge of external event
counter in Timer0. Whereas in Timer2 these two combinations of CS22-20 bits used to select
different options of prescaler.
3. Timer2 cannot be used as an event counter.

b) TIMER 1 PROGRAMMING FOR EVENT COUNTER:


Timer0 and timer1 can also be programmed to count the pulses or events (falling edge or rising edge)
T0 and T1 (PB0 and PB1) pins respectively.
Following steps are undertaken to program the timer1 as 16-bit event counter on T1. Before
programming Timer1, read all the registers of Timer1 thoroughly.

Steps to Program 16-Bit, Timer 1 as an event counter:


1. Activate pull-up on T1 (PB1) using C instruction PORTB = 0x02;

Microprocessor and Microcontroller Subject Code: 3141008


GOVERNMENT ENGINEERING COLLEGE, GANDHINAGAR
DEPT. OF ELECTRONICS AND COMMUNICATION ENGG .

2. Load TCCR1A with 0x00 and TCCR1B register with value 0x06 (External clock source on T1
pin. Clock on falling edge).
3. Now load TCNT1H and TCNT1L with 0x00 to initialize the 16-bit timer with the zero value.
4. Now whenever a falling edge will occur at T1, counter will be incremented.

Programs

1. This program generates 5Hz square wave on PA0 with a duty cycle of 50%. ON time
is 100ms and OFF time is also 100ms.

#define F_CPU 1000000UL


#include<avr/io.h>
#include<util/delay.h>

//Macros definition
#define BitGet(p,m) ((p) & (m))
#define BitSet(p,m) ((p) |= (m))
#define BitClear(p,m) ((p) &= ~(m))
#define BitFlip(p,m) ((p) ^= (m))
#define Bit(x) (0x01 << (x))

void TimerDelay(void);//Function prototype declaration

void main(void)
{
DDRA = 0xFF; //Make PortA output
BitSet(PORTA, Bit(0)); //Initially set PA0

while(1)
{
BitFlip(PORTA, Bit(0)); //Toggle PA0
TimerDelay(); //Generates delay of about 100ms
}
}

/* delay calculation
For a clock generation of 5Hz (200ms), timer should be overflowed twice, so:
Timer overflow @ = 200ms / 2 = 100ms (0.1s high, 0.1s low)
Crystal Clock = 1MHz
Prescaler used = 1024
Timer clock = 1MHz / 1024 = 976.5625 Hz
Timer Period = 1/976.5625 = 1024us
Timer Value = 0.1s / 1024us = 97.65625 = 98 (approx) */

void TimerDelay(void)
{
TCNT0 = 0x9F; // (256+1)-98 = 159 = 0x9F
TCCR0 = 0x05; //Timer0 ON, clk/1024 prescaler, Normal Mode
while(!BitGet(TIFR, Bit(0))); // Wait for timer0 overflow & TOV0 flag is
raised
TCCR0 = 0x00; //Stop Timer
BitClear(TIFR, Bit(0)); //Clear TOV0
}

Microprocessor and Microcontroller Subject Code: 3141008


GOVERNMENT ENGINEERING COLLEGE, GANDHINAGAR
DEPT. OF ELECTRONICS AND COMMUNICATION ENGG .

Simulation:

ATMEGA32

5Hz square wave generation through timer0

Exerceise : LOAD ABOVE PROGRAM IN EASY AVR 7 AND VERIFY THE OUTPUT USING
OSSCILLOSCOPE.

2. This program counts the event occur at T1 (PB1) on every falling edge using 16-Bit Timer1 as
event counter and shows the event count on PORTC an PORTD higher and lower byte
respectively on seven segment display.
#include <avr/io.h>
int main (){
DDRA &= 0x02; // Set PB.1 as input pin
PORTB |= 0x02; // Activate pull-up of PB.1
DDRC = 0xFF; // PORTC as output
DDRD = 0xFF; // PORTD as output

Microprocessor and Microcontroller Subject Code: 3141008


GOVERNMENT ENGINEERING COLLEGE, GANDHINAGAR
DEPT. OF ELECTRONICS AND COMMUNICATION ENGG .

TCNT1 = 0x00; // Set initial Count to 0

TCCR1A = 0x00; // 16-bit Normal mode


TCCR1B = 0x06; // at T1 Falling Edge Counter
while(1)
{
PORTD = TCNT1L;
PORTC = TCNT1H;
if((TIFR & (1<<TOV1))==1) // if it overflows
TIFR = 1 << TOV1; // clear TOV1 flag
}
return 0;
}

Simulation:

U1
9 22
RESET PC0/SCL
23
PC1/SDA
13 24
XTAL1 PC2/TCK
12 25
XTAL2 PC3/TMS
26
PC4/TDO
40 27
PA0/ADC0 PC5/TDI
39 28
PA1/ADC1 PC6/TOSC1
38 29
PA2/ADC2 PC7/TOSC2
37
PA3/ADC3
36 14
PA4/ADC4 PD0/RXD
35 15
PA5/ADC5 PD1/TXD
34 16
PA6/ADC6 PD2/INT0
33 17
PA7/ADC7 PD3/INT1
18
PD4/OC1B
1 19
PB0/T0/XCK PD5/OC1A
2 20
PB1/T1 PD6/ICP1
3 21
PB2/AIN0/INT2 PD7/OC2
4
PB3/AIN1/OC0
5
PB4/SS
6
PB5/MOSI
7 32
PB6/MISO AREF
8 30
PB7/SCK AVCC
ATMEGA32
16-Bit Counter using Timer1

HOMEWORK

1. Implement Proteus project and Write a C Program to toggle only PORTB.4 Bit
continuously every 70us. Use Timer0,Normal Mode, and 1:8 prescaler to create the
delay. Assume XTAL=8Mhz.
Solution :

XTAL = 8MHZ
Prescaler = 1:8 >> Tclock = 8 x 1/8 MHz = 1us
70us/1us = 70 clocks >> 1 + 0xFF -70 = 0x100 – 0x46 = 0xBA = 186
#include “avr/io.h”
Void TODelay ( );

Microprocessor and Microcontroller Subject Code: 3141008


GOVERNMENT ENGINEERING COLLEGE, GANDHINAGAR
DEPT. OF ELECTRONICS AND COMMUNICATION ENGG .

int main ( )
{
DDRB = 0xFF //PORTB output port
While (1)
{
T0Delay ( ) ; // Timer 0 , normal mode
PORTB = PORTB ^ 0x10 //Toggle PORTB,4
}
}
Void TODelay ( )
{
TCNT0 = 186 ; //load TCNT0
TCCR0 = 0x02 ; //Timer0 , normal mode , 1:8 prescaler
While (( TIFR & (1<<TOVO)) ==0); // Wait for TOVO to roll over
TCCR0 = 0 ; //turn off Timer 0
TIFR = 0x1 ; //clear TOVO
}

2. Implement Proteus project and Using CTC mode, Write a program to generate Delay
of 8ms. Assume XTAL=8 MHz.
Solution :

Delay : LDI R20,0


OUT TCNT2,R20 ;TCNT2 = 0
LDI R20 , 249
OUT OCR0 , R20 ;OCR0 = 249
LDI R20 , 0x0E
OUT TCCR0 , R20 ; Timer0, CTC mode , prescaler = 256
AGAIN : IN R20 , TIFR ; read TIFR
SBRS R20 , OCF2 ; if OCF2 is set skip next inst.

Microprocessor and Microcontroller Subject Code: 3141008


GOVERNMENT ENGINEERING COLLEGE, GANDHINAGAR
DEPT. OF ELECTRONICS AND COMMUNICATION ENGG .

RJMP AGAIN
LDI R20 , 0x0 ; Load 0x0 to R20
OUT TCCR2 , R20 ; stop Timer2
LDI R20 , 1<<OFC2
OUT TIFR , R20 ; clear OCF2 flag
RET

3. Assuming that a 1Hz clock pulse is fed into pin T0, use the TOV0 flag to extend Timer0
PORTC to 16-bit counter and display the counter on PORTC and PORTD.
Solution :

.ORG 0x0000
LDI R19, 0 ;R19 = 0
CBI DDRB , 0 ; make T0 (PB0) input
LDI R20 , 0xFF
OUT DDRC , R20 ; make PORTC as an output
OUT DDRD , R20 ; make PORTD as an output
LDI R20 , 0x06 ; load 0x06 to R20
OUT TCCR0 , R20 ; counter , falling edge
AGAIN : IN R20 , TCNT0
OUT PORTC , R20 ; PORTC = TCNTO
IN R16 , TIFR
SBRS R16 , TOVO
RJMP AGAIN ; keep doing it
LDI R16 , 1<<TOVO ; clear TOVO flag
OUT TIFR , R16
INC R19 ; increment it by 1
OUT PORTD , R19 ; PORTD = R19
RJMP AGAIN ; keep doing it

Conclusion : You can as well load a count value in TCNT0 and start the timer from a
specific count. Another interesting feature is that a value can be set in the Output

Microprocessor and Microcontroller Subject Code: 3141008


GOVERNMENT ENGINEERING COLLEGE, GANDHINAGAR
DEPT. OF ELECTRONICS AND COMMUNICATION ENGG .

Compare Register (OCR0), and whenever TCNT0 reaches that value, the Output
Compare Flag (OCF0) flag is Set.

Microprocessor and Microcontroller Subject Code: 3141008

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