Internal Use Only

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PLASMA TV
SERVICE MANUAL
CHASSIS : PP11K

MODEL : 42PT350R 42PT350R-TD

42PT351R 42PT351R-TC
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL67002503 (1102-REV00) Printed in Korea

 CONTENTS

CONTENTS ............................................................................................................................... 2

SAFETY PRECAUTIONS ...........................................................................................................3

SPECIFICATION.........................................................................................................................4

ADJUSTMENT INSTRUCTION ..................................................................................................6

BLOCK DIAGRAM ...................................................................................................................12

EXPLODED VIEW .................................................................................................................. 13

CIRCUIT DIAGRAM .....................................................................................................................

Copyright ©2011 LG Electronics Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
 SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in
the Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to
prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance Leakage Current Hot Check (See below Figure)

An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this monitor is blown, replace it
with the specified.
When replacing a high wattage resistor (Oxide Metal Film
Resistor, over 1W), keep the resistor 10mm away from PCB.
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC
voltage measurements for each exposed metallic part. Any
voltage measured must not exceed 0.75 volt RMS which is
corresponds to 0.5mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

Keep wires away from high voltage or high temperature parts. Leakage Current Hot Check circuit

Due to high vacuum and large surface area of picture tube, AC Volt-meter
extreme care should be used in handling the Picture Tube.
Do not lift the Picture tube by it's Neck.

Good Earth Ground

such as WATER PIPE,
Leakage Current Cold Check(Antenna Cold Check) CONDUIT etc.
To Instrument's
With the instrument AC plug removed from AC source, connect 0.15uF
exposed
an electrical jumper across the two AC plug prongs. Place the METALLIC PARTS
AC switch in the on position, connect one lead of ohm-meter to
the AC plug prongs tied together and touch other ohm-meter
lead in turn to each exposed metallic parts such as antenna 1.5 Kohm/10W
terminals, phone jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩ and 5.2MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright ©2011 LG Electronics Inc. All rights reserved. -3- LGE Internal Use Only
Only for training and service purposes
 SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.

V Application Range
This spec is applied to PDP TV used PP11K Chassis.

Model Name Market Place Brand

42PT350R-TA NON-EU LG
42PT351R-TC

V Specification
Each part is tested as below without special appointment.
(1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 ± 5
(2) Relative Humidity: 65 % ± 10 %
(3) Power Voltage: Standard Input voltage (100 V - 240 V ~, 50 / 60 Hz)
* Standard Voltage of each product is marked by models.
(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
SBOM.
(5) The receiver must be operated for about 20 minutes prior to the adjustment.

V Test Method
(1) Performance : LGE TV test method followed.
(2) Demanded other specification
Safety : CE, IEC specification
EMC : CE, IEC

Model Name Market Remark Appliance

42PT350R-TA NON-EU Safety : IEC/ EN60065, EMI : CISPR13 TEST
42PT351R-TC

V Module Specification
(1) 42” -2D HD
No Item
1 Display Screen Device
2 Aspect Ratio
3 PDP Module
4 Operating Environment
5 Storage Environment
6 Input Voltage
Specification Remark
106 cm (42 inch) wide Color Display Module PDP
16:9
PDP42T3####,
RGB Closed (Well) Type, Glass Filter (38%)
Pixel Format: 1024 horiz. By 768 ver
1) Temp. : 0 deg ~ 40 deg
2) Humidity : 20 % ~ 80 %
LGE SPEC
3) Temp. : -20 deg ~ 60 deg
4) Humidity : 10 % ~ 90 %
AC 100 V ~ 240 V, 50 / 60 Hz Maker LG

Copyright ©2011 LG Electronics Inc. All rights reserved. -4- LGE Internal Use Only
Only for training and service purposes
V Model General Specification
(1) NON - EU Spec.(TA)
No Item Specification Remark
1. Market NON EU
2. Broadcasting system PAL/SECAM-BG/I/DK, NTSC-M
3. Available Channel BAND PAL NTSC China(DK) Australia(BG)
VHF/UHF E2 ~ C69 2~78 VHF/UHF C1~C62 C1~C75
CATV S21 ~ S41 1~71 CATV S1~S41 S2~S44
4. Receiving system Upper Heterodyne
5. Video Input (2EA) PAL,SECAM, NTSC Rear 1EA, Side 1EA
6. Component Input (2EA) Y/Cb/Cr, Y/ Pb/Pr
7. RGB Input (1EA) RGB-PC
8. HDMI Input 2ea HDMI-DTV , Only PCM MODE Side HDMI(1), Rear HDMI(1)
: 42/50PT250R-TA only
3ea Side HDMI(1), Rear HDMI(2)
9. Audio Input (5EA) L/R Input(PC 1EA, Component 2EA,
Rear 1EA, Side 1EA)
10. RS-232C (1EA) Remote control
11. USB Input (1EA) SD DivX, MP3, JPEG,

Copyright ©2011 LG Electronics Inc. All rights reserved. -5- LGE Internal Use Only
Only for training and service purposes
 ADJUSTMENT INSTRUCTION

1. Application Range 3-5. Download Method (By using MSTAR JIG)

This spec sheet is applied to all of the PP11K chassis. - Preliminary Steps
(1) Download method (PCB Ass’y)
- HD

2. Specification
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 °C ± 5 °C of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep 100 V
~ 240 V, 50 / 60 Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over 1) Connect the download jig to D-sub jack
15 °C
- In case of keeping module is in the circumstance of 0 °C,
it should be placed in the circumstance of above 15 °C
for 2 hours
- In case of keeping module is in the circumstance of below
-20 °C, it should be placed in the circumstance of above
15 °C for 3 hours,.

3. S/W Program Download

3-1. Profile 2) Connect the PC to USB jack
This is for downloading the s/w to the flash memory of the
IC402 (2) Download Steps
1) Execute ‘ISP Tool’ program in PC, then a main window
3-2. Equipment will be opened
(1) PC
(2) ISP_tool program
(3) Download jig

3-3. Connection Structure

Double click

2) Click the connect button and confirm “Dialog Box”

3-4. Connection Condition

(1) IC name and circuit number : Flash Memory and IC402
(2) Use voltage : 3.3V (5 pin)
(3) SCL : 15 pin
(4) SDA : 12 pin
(5) Tact time : about 2min and 30seconds

Copyright ©2011 LG Electronics Inc. All rights reserved. -6- LGE Internal Use Only
Only for training and service purposes
 3) Click the Config button and Change speed
E2PROM Device setting : over the 350Khz
4) Read and write bin file
Click “(1)Read” tab, and then load download
file(XXXX.bin) by clicking “Read”.
5) Click “Auto(2)” tab and set as below
6) Click “Run(3)”.
7) After downloading, check “OK(4)” message.
Copyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
3-6. Download Method (By using USB
Memory Stick)
* Caution
- Using ‘power on’ button of the control R/C, power on TV.
- USB file (EPK) version must be bigger than downloaded
version of main B/D.
- It should be only one SW binary file in USB Stick
(1) Using ‘Power ON’ button of the control R/C, Power on TV.
(2) Insert the USB memory stick to the SET.
(3) Display USB loding message then, push the ‘Exit’ Key of
control R/C
(4) Push the ‘MENU’ Key and move the cusor ‘OPTION’ of
OSD ( Fig. 1)
* Caution : Don’t push the ‘OK’ key.Just cusor is on the
‘OPTION’ menu.
( Fig. 1)
(5) Push the “7” key of control R/C continuously.
Then, Display “TV Software Update” Pop-up menu. (Fig. 2)
( Fig. 2)
(6) Select SW file (XXXX.bin) you want, push the “OK” Key.
(7) S/W download process is excuted automatically.
-7- LGE Internal Use Only
4. PCB Assembly Adjustment Method (6) EDID D/L Method
- After software D/L or PCBA manufacturing, you can
download EDID Data.
4-1. Option Adjustment Following BOM - When you adjust Tool Option, H6 Model EDID download
Tool Option process is executed automatically
Area Option
Option 1 * If the model don’t have HDMI 3, HDMI 3 will be disappeared
Option 2 at OSD Window.
Option 3(Available for EU & Non EU model)
[Caution]
- When you adjust tool option, don’t connect HDMI or D-
sub cable.
- If you connect some cable, EDID D/L process will be
failed.

(7) Adjustment method

Before PCBA check, have to change the Tool option and
Area option

( Fig. 3)
* Profile: Must be changed the option value because being
different with some setting value depend on module,
inch and market
* Equipment : Adjustment Remote Controller
(1) Push the IN-START key in the Adjust R/C.
(2) Enter Password number. The value of Password is “0 0 0
0”.
[ About PDP
After done all adjustments, Press IN-START button and
compare Tool option and Area option value with its BOM, if
it is correctly same then Change “RF mode” and then
unplug the AC cable.
If it is not same, then correct it same with BOM and unplug
AC cable.
For correct it to the model’s module from factory JIG
model.
[ Don’t push The IN-STOP KEY after completing the function
inspection.

5. EDID(The Extended Display

Identification Data)
Caution
- Never Use the cable( HDMI or D-sub cable) for EDID
Writing.
- Automatically PP01A/B/C Model EDID download process
is executed when you adjust Tool Option.
(3) Input the Option Number that was specified in the BOM, Inch
into the Shipping area. Tool
(4) Select “Tool Option” by using D/E(CH+/-) key, and press
SIDE AV 0/1
the number key(0~9) consecutively
ex) If the value of Tool Option1 is 4, input the data using HDMI 0/1/2/3
number key “4” (Fig. 3) Side HDMI 0/1

(5) if it is EU model ( such as 42/50PJ**R-ZA ), select “Area COMP2 0/1

option” by using D/E(CH+/-) key , and press the number RGB 0/1
key(0~9) consecutively. RS232C 0/1
ex) If the value of Area Option is 40, input the data using
number key “40” (Fig. 3) Local Key 0 (7KEY) / 1 (8KEY)
LED TYPE 0 (RED) / 1 (RED/White) / 2 (Reserve)
Caution
USB TYPE 0 (NONE) / 1 (PHOTO, MUSIC)
- Don’t Push “IN-STOP” key after PCB assembly
adjustment. / 2 (PHOTO, MUSIC, DivX)

* PP01A/B/C Tool option

Model Tool option Area Option
42PT250R-TA 13 1

Copyright ©2011 LG Electronics Inc. All rights reserved. -8- LGE Internal Use Only
Only for training and service purposes
 <NON-EU AREA> <HDMI 2 : 256bytes>
Inch 42PT350R-TA
Tool option 15

INCH 42
TOOL PT350R

SIDE AV 1
HDMI 3
Side HDMI 1
COMP2 1
RGB 1
RS232C 1
<HDMI 3 : 256bytes> SIDE HDMI(HDMI 3)
Local Key 0
LED TYPE 0
USB TYPE 2

5-1. EDID Data

NO Item Condition Hex Data

1 Manufacturer ID GSM 1E6D
2 Version Digital : 1 01
3 Revision Digital : 3 03

O XGA EDID DATA ( 42 inch)

<Analog(RGB) : 128bytes> 6. HDCP(High-Bandwidth Digital

Contents Protection) Download
HDCP download process is deleted in PP01A/B/C Chassis
In PP01A/B/C Chassis, it is usi g the EEPROM masking
HDCP Key

7. Manual ADC Adjustment

<HDMI 1 : 256bytes> (Component 1, RGB)
Caution
- Do not connect external input cable
- Adjustment result is applied to SET On/Off later.

RF input AV / Component / RGB input

NO SIGNAL or White noise NO SIGNAL

* Adjustment is done using internal ADC, so input signal is not

necessary.

Copyright ©2011 LG Electronics Inc. All rights reserved. -9- LGE Internal Use Only
Only for training and service purposes
7-1. COMPONENT input ADC (SD / HD),
RGB input ADC
(1) Press ADJ key on R/C for adjustment. Need not convert
input mode.
(2) Enter Password number. The value of Password is “0 0 0
0”.
(3) Select “0. ADC calibration” by using D/E(CH +/-) and press
ENTER(V).
(4) Start ADC adjustment by using F / G (VOL +/-) or press
ENTER(V).
(5) Both component and RGB ADC adjustment are executed
automatically
When ADC adjustment is finished, this OSD appear.
Notice : After All mode check, set the Speaker Volume “0”.
Caution : Don’t Press the Power Key on Remote Controller.
Just AC Power Off. ( Not DC off )
Notice : From this sentence, All working is mass production.
8. POWER PCB Assy Voltage
Adjustment
(Vs voltage Adjustment)
8-1. Test Equipment: D.M.M 1EA
8-2. Connection Diagram for Measuring
Refer to (Fig. 4)
8-3. Adjustment Method
(1) Vs Adjustment
1) Connect + terminal of D. M..M. to Vs pin of P811,
connect -terminal to GND pin of P811.
2) After turning VR901, voltage of D.M.M adjustment as
same as Vs voltage which on label of panel right/top
( deviation ; ±0.5V)
(2) Va Adjustment
1) Connect + terminal of D. M..M. to Va pin of P811,
connect -terminal to GND pin of P811.
2) After turning VR502, voltage of D.M.M adjustment as
same as Va voltage which on label of panel right/top
( deviation ; ± 0.5 V)
9. Adjustment of White Balance
9-1. Required Equipment
(Fig. 4)
Copyright ©2011 LG Electronics Inc. All rights reserved. - 10 -
Only for training and service purposes
8-4. Adjustment of Area option.
(1) Area Option Adjustment following BOM
(Including SKD models )
Tool Option
Area Option
Option 1
Option 2
Option 3 ( Available for EU & Non EU model )
..
* Profile : Must be changed the option value because being
different with some setting value depend on module,
inch and market
* Equipment : Adjustment Remote Controller
1) Push the IN-START key in the Adjust R/C.
2) Enter Password number. The value of Password is “0 0
0 0”.
3) Input the Area Option Number that was specified in the
BOM, into the Shipping area.
4) Select “Area Option” by using D / E (CH+/-) key, and
press the number key(0~9) consecutively
ex) If the value of Area Option 40, input the data using
number key “40” (Fig. 3)
Caution:
- Although it is SKD model, adjust area option in SET
assemmbly process.
- Don’t Push “IN-STOP” key after PCB assembly
adjustment.
(1) Remote controller for adjustment
(2) Color Analyzer ( CS-1000, CA-100,100+,CA-210 or same
produc : CH 10 (PDP)
lease adjust CA-210, CA-100+ by CS-1000 before
measuring
(3) Auto W/B adjustment instrument(only for Auto adjustment)
LGE Internal Use Only
9-2. AUTO White Balance Process. O DDC Adjustment Command Set
Before Adjust of White Balance, Please press POWER ONLY
key

Adjust Process will start by execute RS232C Command.

O CS-1000/CA-100+/CA-210(CH 10) White balance adjustment

coordinates and color temperature.
CSM Color Coordinate Temp Color Coordinate
x y
Cool 0.276 0.283 11000K 0.002
Medium 0.285 0.293 9300K 0.002
Warm 0.313 0.329 6500K 0.002 Adjustment

Adjustment

9-3. Manual W/B process (using adjusts Adjustment

Remote control)
(1) Enter ‘PICTURE RESET’ on Picture Mode, then turn off
Fresh Contrast and Fresh colour in Advanced Control
(2) After enter Service Mode by pushing “ADJ” key,
(3) Enter White Pattern off of service mode, and change off ->
on.
(4) Enter “W/B ADJUST” by pushing “ G ” key at “3. W/B
ADJUST”.
(5) Adjust W/B DATA, for all CSM, choose ‘COPY ALL’ 10. Default Value in Adjustment
* Gain Max Value is 192. So, Never make any Gain Value mode
over 192 and please fix one Value on 192, between R, G
and B. 10-1. White Balance
Min Tpy Max (Default values maybe modified the module condition)
R-GAIN 0 192 192
G-GAIN 0 192 192
B-GAIN 0 192 192

* Auto-control interface and directions

(1) Adjust in the place where the influx of light like floodlight
around is blocked. (Illumination is less than 10ux).
(2) Measure and adjust after sticking the Color Analyzer (CA-
100+, CA210 ) to the side of the module.
(3) Aging time
After aging start, keep the Power on (no suspension of
power supply) and heat-run over 5 minutes
10-2. System control condition
* Above optical characteristics are should be measured by 1. AC on time on only one after assembled automatically
following condition.
Measured Mode
Picture Mode Vivid
Fresh Contrast Off
Fresh Color Off
Smart Power Saving Off

Copyright ©2011 LG Electronics Inc. All rights reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
 BLOCK DIAGRAM

Copyright ©2011 LG Electronics Inc. All rights reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
 EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

400
601

520
207
206
200

602

201
204

590
580

501
240

910

900
203
303
301

205

202
304

302
305

A9

A4
A10
LV1

A12
A21
A2
120
300

570

- 13 - LGE Internal Use Only

 EAX64103901(BPR)
NONE_RGBR142 100
H6 Revolution Circuit Diagram NONE_RGBR143 100
ROM_SDA
ROM_SCL
NONE_RGBR144 100
+5V_ST DSUB_SDA
NONE_RGBR150 100
DSUB_SCL
[ Slim Jack : 6630TGA004Q ] R543 100
[ Slim Jack : EAG59023302 ] [ Slim Jack : 6630G00001E ] READY
EYE_SCL
R544 100
+5V_HDMI_1 JK110 JK111 READY
EYE_SDA +3.3V_MPLL
C101 R129
BOT_HDMI R122
R101 SPG09-DB-010 0.01uF 4.7K 4.7K SPG09-DB-009
BOT_HDMI 1K 25V
5A [YL]E-LUG
C BOT_HDMI R132
20 R104
B 10K 10K ISP_RX 4A R508
SC1_VIN
HPD_MST_1 [YL]O-SPRING
19
1
IC103 75
Q100 DSUB_SDA MAX3232CDR 3A R506
E BOT_HDMI [YL]CONTACT
18 10K
RT1C3904-T112 C100 C105
2SC3875S
6 DSUB_SCL 6 0.01uF 0.1uF
SC1_LIN
17 4B [WH]C-LUG
25V VCC C1+ D105 R504 R515
16 1 5.6V 220K 12K
16 DDC_SDA1 1 ROM_SDA 2
11 3C [RD]CONTACT R505
15 DDC_SCL1 PC_R GND V+ 10K
15 2 C108 SC1_RIN
4C [RD]O-SPRING R503 R514
14 7 PC_G 7 R110 0.1uF D108
5.6V 220K 12K
100 DOUT1 C1-
13 CEC 2 12 PC_B 3
14 3 5C [RD]E-LUG

12 TMDS1_RXC- R109 PPJ233-01

100 RIN1 C2+
8
ROM_SCL 8 13 4 JK113
11
R128 C107
10 TMDS1_RXC+ 3 13 PC_HS 4
ROUT1 C2-
0.1uF
68 12 5
R120
9 TMDS1_RX0- 4.7K
C103
68pF 9 DIN1 V-
8 9 11 6
R127
7 TMDS1_RX0+ 4 14 PC_VS 5
68 DIN2 DOUT2 C106
R121 C104 10 7
6 TMDS1_RX1- 0.1uF
4.7K 68pF 10
5 10 ROUT2 RIN2
9 8
4 TMDS1_RX1+ 5 15
R111 R112 R113
3 TMDS1_RX2-
75 75 75
2
100 TXD
1 TMDS1_RX2+ R118
16
100 RXD
R117
YKF45-7058V
JK100 IR_OUT
JK103
PEJ027-01
[ Slim Jack : EAG59023301_SCREW ] PPJ239-01
3
JK107
+5V_HDMI_2
6A
R102
1K R125 6J
7A 10K
C
R103
PC_AUD_L COMP1_Y
20 10K R123 R130 5J R137
B D115
HPD_MST_2 4 5.6V 220K 12K 75
19 4J
E Q101 5
18 RT1C3904-T112
2SC3875S R126 7K
7B 10K
17 PC_AUD_R COMP1_PB
R124 R131 5K R138
16 DDC_SDA2 6B D116
5.6V 220K 12K 75
15 DDC_SCL2 7L

14
R148
COMP1_PR
5L
CEC 10K
13 COMP1_L
5M R140
12 TMDS2_RXC- D124
5.6V
R154 R139
12K 75
220K
11 4N [RD2]CONTACT
JK106
10 TMDS2_RXC+ PPJ235-01 COMP1_R
5N [RD2]O-SPRING_2 R149 R155
D125 R141 10K
9 TMDS2_RX0- 5.6V 220K 12K
6N 6 FIX_TER
[RD2]E-LUG JK116
8 5A
PPJ241-02
R532
7 TMDS2_RX0+ SIDE_VIN 6D [GN1]E-LUG 4 [RD]R_OUT 0 HOTEL
4A
R145 SPK_R+_HOTEL
6 TMDS2_RX1- 75 COMP2_Y
3 [WH]L_OUT
5D [GN1]O-SPRING R165 R540
3A R152
5 10K 75 HOTEL 0
SIDE_LIN 4D 5 [WH]GND AUDIO_R
TMDS2_RX1+ 4B R146 [GN1]CONTACT R533
4 R158
D113 220K 1K
5.6V 12K
3 TMDS2_RX2- 3C R153 7E [BL1]E-LUG-S NONE_HOTEL
MNT_ROUT
10K R528 C111
2 SIDE_RIN COMP2_PB 470K 10uF
5E [BL1]O-SPRING R166
4C
D114 R147 R159 C 16V
1 TMDS2_RX2+ 5.6V 220K 75 B
12K
5C
7F [RD1]E-LUG-S MUTE_LINE
COMP2_PR Q502
5F R167 E 2SC3875S(ALY)
YKF45-7054V [RD1]O-SPRING_1
75
JK101 4F R174
[RD1]CONTACT_1
10K
COMP2_L
[ Slim Jack : EAG42463001] 5G [WH1]O-SPRING R168 R178 R539
+5V_HDMI_3 HDMI CEC
D126 220K 12K 0 HOTEL
SPK_R-_HOTEL
4H
5.6V R175 R535
[RD1]CONTACT_2 1K
+3.3V_MPLL 10K
COMP2_R MNT_LOUT
JACK_GND
R100 C 5H [RD1]O-SPRING_2 R169 R179 NONE_HOTEL
1K R105 D127 R529 C114
10K 220K 12K 10uF
MMBD301LT1G

20 B Q103 5.6V 470K

SIDE_HDMI 6H [RD1]E-LUG 16V
SIDE_HDMI BSS83 G NONE_HOTEL
R106 C
19 E Q102
HPD_MST_3
56K B
HPD RT1C3904-T112 MUTE_LINE
18 2SC3875S D B S Q504
+5V_POWER SIDE_HDMI 2SC3875S(ALY)
D103 E
17 30V
DDC/CEC_GND
16
DDC_SDA3 CEC CEC_C
SDA
15
DDC_SCL3 D104
SCL 10V
14
NC
+5V_HDMI_1 +5V_ST +5V_HDMI_2 +5V_ST +5V_HDMI_3 +5V_ST
13 CEC [ EAG41945401 ]
CEC
SIDE_HDMI

+5V_MULTI
A2

A1

TMDS3_RXC-
A2

A1

A2

A1

12
CLK- D101 D102
D100 KDS184S
11 KDS184S
CLK_SHIELD IC100 KDS184S IC101 IC102
C
C

10 TMDS3_RXC+ CAT24C02WI-GT3 CAT24C02WI-GT3 CAT24C02WI-GT3

CLK+
9 TMDS3_RX0-

KJA-UB-4-0004
JK112

1
DATA0- A0 VCC

USB DOWN STREAM

A0 VCC A0 VCC
1 8 1 8 1 8 C110
8 C102 R180
DATA0_SHIELD R116 R119 R135 R136 C109 R162 R163 0.01uF 5.1
0.01uF 10K 10K

2
TMDS3_RX0+ 10K 10K 10K 10K 0.01uF 25V USB_DN
7 A1 WP 25V A1 WP A1 WP
DATA0+ 25V 2 7 SIDE_HDMI
SIDE_HDMI

SIDE_HDMI

2 7 2 7
R181
6 TMDS3_RX1- R114 5.1
DATA1- R133 R160

3
A2 SCL 100 A2 SCL A2 SCL 100 USB_DP
3 6 3 6 100 3 6
5
DATA1_SHIELD SIDE_HDMI
TMDS3_RX1+ R115 R134 R161
4 VSS SDA

4
VSS SDA 100 VSS SDA 100 100
DATA1+ 4 5 4 5 4 5
TMDS3_RX2- SIDE_HDMI

5
3
DDC_SDA1

DDC_SCL1

DDC_SDA2

DATA2-
DDC_SCL2

DDC_SDA3

DDC_SCL3

2
DATA2_SHIELD
1 SIDE_HDMI TMDS3_RX2+
DATA2+

KJA-ET-0-0032
JK102
[ SIDE HDMI ]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS H6RR 2010/11/1
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. INPUT 1 4
INPUT

Copyright © 2011 LG Electronics Inc. All rights reserved.

Only for training and service purposes LGE Internal Use Only
 EAX64103901(BPR) LVDS Block
H6 Revolution Circuit Diagram
Power Block KEY/IR Interface

P603 +3.3V_MPLL
P200 12507WS-15L FHD
SMAW200-H18S1

+5V_MULTI
Hotel Option 1
+5V_ST P205
104060-8017
IR HOTEL
1 2 +17V_TI R224
C
HOTEL
2 4.7K B Q202 1
3 4 R226 R220 R223
5 6 4.7K
HOTEL +17V_TI 10K 10K
2SC3052 HOTEL
R232
22
2
3 HD
R231 P204 3 E
100 12507WS-08L
KEY1 IR_OUT 4 P201
7 8 ERROR_DET +3.3V_MPLL R227 5 TF05-51S
4.7K
9 10 4
KEY2 R240
10K HOTEL
6
7
11 12 1 R230
+3.3V_MPLL 8
100 1
5
13 14 C228 LED_R 9
+5V_ST 0.1uF 2
2 10
15 16 HOTEL
C205 AC_DET 6
R221 R222
11 3

HOTEL OPTION
17 18 0.01uF
3 AUDIO_R 4.7K 4.7K
12
25V 13 4
7
EYE_SCL 14 5
4 SW_RESET 15
19 6
R209 8 EYE_SDA 16
100
M5V_ON L201 1K 17
5 AC_DET 7
R236 MLB-201209-0120P-N2 18
READY 9 +3.3V_MPLL 8
+5V_MULTI 19
R203 100 120-ohm C208 C212 6 20 9
100uF 0.01uF 10
+3.3V_MPLL 21
RL_ON/POWER_ON 16V 25V
SPK_R+_HOTEL 22 10
7
23 11
11
24 TXCO4+
SPK_R-_HOTEL 12
8 R219 25
10K TXCO4-
12 26 13
9 27 TXCO3+
28 14
13 TXCO3-
TOUCH_VER_CHK 29 15
30
14 31 16
TXCLKO+
32 17
33 TXCLKO-
15 18
34
35 19
IC201 16
C223 36 TXCO2+
MP2305DS R216
20
R4 READY 37
READY TXCO2-
R207 C1 C7 38
100K C210 C221 R5 21
0.01uF BS SS 0.1uF 39 TXCO1+
1 8 TXCO4+ 22
L200 40
TXCO4- TXCO1-
CB3216PA501E C6 41
IN EN TXCO3+ 23
+17V_TI 2 7 42 TXCO0+
43 24
C215 READY TXCO0-
SW COMP R2 44
C202 C204 3 6 25
C2 10uF C8 TXCLKO+,TXCLKO-,TXCO0+,TXCO0-,TXCO1+,TXCO1-,TXCO2+,TXCO2-,TXCO3+,TXCO3-,TXCO4+,TXCO4-
45
READY C217 R213 TXCLKO-
25V 5% 46 26
4700pF 3.6K
GND FB 1/16W V=0.923X(1+R1/R3)=7.2V
4 5 50V 47
THE RECOMMANDED VALUE OF R3 IS 10K TXCO2+ 27
10K 48 TXCE4+
5%

R208 R215 TXCO2- 28

R1 68K 49
IC202 TXCO1+
R3 50 TXCE4-
L1 AZ1117H-ADJTRE1(EH11A) TXCO1- 29
51 TXCE3+
R225 TXCO0+ 30
330 52
INPUT ADJ/GND

3 1 TXCO0- TXCE3-
53 31
D1 L202 2 1/10W
C5 C224 54
33uH C213 C218 1%
1/10W

C9 OUTPUT 32
R217

22uF C222 0.1uF 55

110

ZD201 READY 100uF TXCLKO+,TXCLKO-,TXCO0+,TXCO0-,TXCO1+,TXCO1-,TXCO2+,TXCO2-,TXCO3+,TXCO3-,TXCO4+,TXCO4- TXCE4+

16V TXCLKE+
1%

16V

READY 56 33
16V TXCE4-
3225 57
L203 TXCLKE-
TXCE3+ 34
0 58
+5V_TU TUNER TXCE3-
59
1/4W 35
C225 60
5% 100uF TXCE2+
TXCLKE+ 36
16V 61
TXCLKE-
62 TXCE2-
37
63
TXCE2+ TXCE1+ 38
64
TXCE2-
65 TXCE1-
TXCE1+ 39
66 TXCE0+
356mA MAIN IC : 4 PAGE TXCE1-
67 40
TYPICAL 3A +3.3V_MST TXCE0+
68 TXCE0-
TXCE0- 41
IC203 IC205 69
70 42
AZ1085S-3.3TR/E1 AZ1117BH-ADJTRE1
IC200
71 43
AP2121N-3.3TRE1 1391mA R212
MAIN SUB MICOM INPUT 3 2 OUTPUT 85mA INPUT 3 ADJ/GND 40.2 72
MAX 1A 1 44
16mA VIN 12mA MAIN I2C PULL UP ROM_RX 73 ROM_RX
+5V_ST 3 2 VOUT +3.3V_MPLL 1 2 1/10W
MAX 300mA 1% ROM_TX 74 45
1
RS232C-TRANCEIVER ADJ/GND
C219 C220 OUTPUT ROM_TX
P_SDA 75
1/16W

C200 25V C206 25V CEC LEVEL SHIFT 100uF 0.01uF R211
22uF GND 22uF 75 76 46
0.01uF 0.01uF 16V 25V DISP_EN P_SDA
16V C201 16V C209 1%
P_SCL 77 47
1.899V 78 DISP_EN
59mA ROM_SDA
48
+1.8V_DDR ROM_SCL 79 P_SCL
80 49
C226 25V
330uF 0.01uF DDR2 & Vref ROM_SDA
4V 81 50
C227
ROM_SCL
51

52

Q201 IC204
MP2305DS C236 R247
RTR030P02 R243
R4
C1 C7
READY READY
100K C231 C235 R5
0.1uF
1420mA S D 1420mA 0.01uF BS
1 8
SS
+5V_ST
C6
C214 IN EN
C207 2 7
25V 10uF
10uF C216
0.01uF 16V
1/16W

16V C232 READY

R202

C211 0.01uF R2
SW COMP
10K

25V C229 C230

G
5%

C2 3 6
10uF C8 READY R245
+3.3V_MPLL 16V C233
3.6K
GND FB 4700pF
4 5 50V V=0.923X(1+R1/R3)=1.266V
THE RECOMMANDED VALUE OF R3 IS 10K
1/16W

R246
R200
4.7K

R244 10.5K
R1
5%

3.9K 1%
1% R3
R201 C L1
10K B Q200 3.2A / P-CHANNEL 930mA
RT1C3904-T112
1/16W +1.2V_MST
RL_ON/POWER_ON 5% E D1 L803
10uH C5 C238 C234 MAIN IC CORE
C9 22uF C237
ZD200 READY 100uF
READY 16V
16V OUT:1.27V
3225

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS H6RR 2010/11/1
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Key / Power 2 4
/ Power / LVDS / Option

Copyright © 2011 LG Electronics Inc. All rights reserved.

Only for training and service purposes LGE Internal Use Only
 EAX64103901(BPR)
H6 Revolution Circuit Diagram
Audio Amp AVSS
Tuner(7mm)
This parts are Located TU300
R302
on AVSS area. +3.3V_MST
TAFJ-Z001D(P)
R314
0

470

2200pF
+5V_TU
4700pF
C332
L310

1uF
22K
AVSS 0.033uF +3.3V_AVDD
0.047uF 120-ohm
C320

C316 4700pF 50V

AVSS +17V_TI
C319

C327
NC_1

C321
C333 C341 C307 C326

R315
C313 R313 0.1uF 0.1uF 100uF
25V
100uF
25V L309 1
0.047uF 470 +3.3V_DVDD NC_2 C309
Separate DGND AND AVSS 120-ohm 0.1uF
2

GVDD_OUT_1
+B[5V]
3
PLL_FLTP
PLL_FLTM

PVDD_A_2

PVDD_A_1
SSTIMER
VR_ANA

OC_ADJ

BST_A

OUT_A
RF_AGC
AVSS

4
NC

MOPLL_AS
5
9

6
5

4
3

1
SCL
+3.3V_AVDD SPK_L+ R312
12

11

10

+17V_TI C373 6 330

AVDD 13
48 PGND_AB_2
L308 0.01uF S_SCL
C369 SDA R311

C300 C304 TESTOUT 47 PGND_AB_1 2S AD-9060 2F 0.1uF 7 330

S_SDA
10uF 16V 0.1uF 14 R322 READY READY
I2S_MCLK C364 3.3 NC_3 C305 C308
AVSS MCLK 46 OUT_B 1S 1F 0.47uF 8 27pF 27pF
15 R323
R308 EAP61008401 3.3 SIF
R304 200 OSC_RES 45 PVDD_B_2 C370 9
22 16 50V 0.1uF C374
0.01uF
MAIN_SIF
18K C355 0.033uF NC_4
1% R309 DVSS_1 44 PVDD_B_1 0.1uF 10
17 R303
C359
SPK_L- VIDEO
R301 READY
VR_DIG 43 BST_B 4.7K

AC_DET R300 PDN

18
TAS5709PHPR 42 BST_C
11
GND
+5V_TU
19 12
1K
C301 C302
0.1uF
C306
4.7uF
LRCLK 20
IC300 41 PVDD_C_2
1000pF 13
50V
10V
SCLK 40 PVDD_C_1
50V
0.033uF C371 SPK_R+
21 C353 0.01uF
L307 C366
SDIN 22
39 OUT_C 2S AD-9060 2F 0.1uF SHIELD R318
R320 C314 270
R305 3.3 0.1uF
SDA 38 PGND_CD_2 C363
I2S_WS
22
23 1S 1F 0.47uF 50V
R319
TV_MAIN
R306 R321 270 C323
22 SCL 37 PGND_CD_1 EAP61008401 3.3
I2S_SCK 24 C367 C372 READY
R307
22 0.1uF 0.01uF E
25

26

27

28
29

30

31

32

33

34

35

36

I2S_SDO B Q301
SPK_R- TU300-*1 ISA1530AC1
A_SDA TAFJ-S001D(P)
TU300-*2
TAFJ-H001F(P)
C
PVDD_D_1
PVDD_D_2
AGND
VREG
RESET
STEST

GVDD_OUT_2
BST_D

OUT_D
GND
DVSS_2
DVDD

A_SCL 1
NC_1
PAL EU Tuner NC_1
1
NC_2
P300 2 NC_2
2
SMAW250-H04R +B[5V]
3 +B[5V]
3

C303 C325 +17V_TI 4

RF_AGC
4
RF_AGC
C337 C340 100uF 100uF 5
MOPLL_AS
MOPLL_AS
0.1uF 0.1uF 25V 25V 5
C318 SCL
1000pF SPK_R- 1 6
SDA
6
SCL
C328

7 SDA
7
NC_3
8 NC_3
1uF

SPK_R+ 2
9
SIF
8

9
SIF
NC_4
10 NC_4
10
+3.3V_DVDD C331 0.033uF
50V
SPK_L- 3
11
VIDEO

GND
11
VIDEO

GND
SW_RESET C322 12
12

0.1uF SPK_L+ 4 13
13
C315 C317 SHIELD
10uF 16V 0.1uF SHIELD

DDR Memory for Main IC Gaim Amp for MNT out

+1.8V_DDR V_REF +17V_TI +17V_AMP
DDR2_DQS1M
DDR2_DQS0M

DDR2_DQS1P
DDR2_DQS0P

DDR2_MCLKZ
DDR2_DQM1
DDR2_DQM0

DDR2_CASZ
DDR2_RASZ

DDR2_MCLK

L302
DDR2_ODT

DDR2_BA1
DDR2_BA0
DDR2_WEZ

DDR2_CKE

1K

120-ohm C324
R324

0.1uF

C382 C385
1K
R325

DDR2_A[0-12] 0.1uF 0.1uF

DDR2_A[12]
DDR2_A[11]
DDR2_A[10]

+17V_AMP
DDR2_A[9]
DDR2_A[8]
DDR2_A[7]
DDR2_A[6]
DDR2_A[5]
DDR2_A[4]
DDR2_A[3]
DDR2_A[2]
DDR2_A[1]
DDR2_A[0]

IC302
+1.8V_DDR LM324D

C
R340

56
R338

56
R336

Q302 B 1K R328 OUT1 OUT4

56

1 14
READY

2SC3875S(ALY)
15K R330 1/16W
56
R341

56
R339

R337

R342

V_REF Close to DDR2 IC MNT_LOUT

56

C390
C395 E
6800pF 33pF 5% IN1- IN4-
2 13
0.1uF 50V C392
+1.8V_DDR
VREFHynix

16V R326 R334

4.7K MNT_L_AMP IN1+ IN4+
A10/AP

R332 6.8K
VSSDL

3 12
VDDL

UDQS
LDQS

UDQS
LDQS

IC303-*1 5.6K
NC3
NC2
NC1

NC6
NC5
NC4

UDM
LDM

CAS
RAS

ODT

CKE

BA1
BA0

A12
A11

K4T51163QG-HCE7
WE

CS

CK
CK

A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

Samsung
VREF

A0
J2 G8
G2
H7
DQ0
DQ1
DQ2
C380 C383 C386 C388 C389 +17V_AMP VCC
4 11
VEE/GND
A1
M8
H3 DQ3
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
J1

J7

R8
E2
A2

R7
R3
L1

A8
E8

B3
F3

B7
F7

K3
L7
K7
L8
K9

K2
K8
J8

L3
L2

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

J2

M3 DQ4
A2 H1
M7 DQ5
A3 H9
N2 DQ6
A4
A5
N8
N3
F1
F9 DQ7
DQ8 MNT_R_AMP
R333 IN2+ IN3+
A6 C8
N7
A7
A8
P2
P8
C2
D7
DQ9
DQ10 5.6K 5 10
D3 DQ11
A9 P3
D1 DQ12
A10/AP M2
D9 DQ13
A11 P7
B1 DQ14
A12 R2

IC303 B9 DQ15

BA0
BA1
L2
+17V_AMP R335 IN2- IN3-
L3
A1
E1
VDD_5
VDD_4
6 9
CK J8 J9 VDD_3
CK
CKE
K8
K2
M9
R1
VDD_2
VDD_1
6.8K
C381 C384 C387 C393
ODT K9
OUT2 OUT3
H5PS5162FFR-S6C 33pF
CS L8 A9 VDDQ_10
RAS
CAS
K7
L7
C1
C3
VDDQ_9
VDDQ_8
0.1uF 0.1uF 0.1uF C 1/16W 7 8
WE K3 C7 VDDQ_7
C9 VDDQ_6

LDQS
UDQS
F7
E9
G1
VDDQ_5
VDDQ_4
Q303 B 1K R329 5% 15K R331
B7 VDDQ_3
G3

LDM F3
G7
G9
VDDQ_2
VDDQ_1 2SC3875S(ALY)
UDM

LDQS
B3

VSS_5
MNT_ROUT C391
E8 A3
E
H8
H2
F8
F2
E7
D8
D2
A7
B8
B2

P9
N1
J3
E3
A3

G9
G7
G3
G1
E9
C9
C7
C3
C1
A9

R1
M9
J9
E1
A1

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

UDQS VSS_4
A8 E3
J3
N1
VSS_3
VSS_2
6800pF
NC_4
NC_5
NC_6
L1
R3
R7
P9 VSS_1
50V
R327
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

B2 VSSQ_10
NC_1
NC_2
A2
E2
B8
A7
VSSQ_9
VSSQ_8
4.7K
NC_3 R8
D2 VSSQ_7
D8 VSSQ_6
VSSDL E7 VSSQ_5
J7
F2 VSSQ_4
F8 VSSQ_3
H2 VSSQ_2
VDDL J1 H8 VSSQ_1

AMP :GAIN X 4
DDR2_D[15]
DDR2_D[14]
DDR2_D[13]
DDR2_D[12]
DDR2_D[11]
DDR2_D[10]
DDR2_D[9]
DDR2_D[8]
DDR2_D[7]
DDR2_D[6]
DDR2_D[5]
DDR2_D[4]
DDR2_D[3]
DDR2_D[2]
DDR2_D[1]
DDR2_D[0]

DDR2_D[0-15]
+1.8V_DDR

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS H6RR 2010/11/1
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Tuner/Amp/DDR 3 4
Tuner / Amp / DDR

Copyright © 2011 LG Electronics Inc. All rights reserved.

Only for training and service purposes LGE Internal Use Only
 EAX64103901(BPR) +3.3V_MST
+3.3V_MST
H6 Revolution Circuit Diagram 20pF C454 DDR2_A[0-12]
SUB MICOM

1M 12MHz
V_REF
R444 X400

4.7K
4.7K
+1.2V_MST

4.7K
4.7K
+3.3V_MPLL
Main Flash Memory 20pF C455

DDR2_A[12]

DDR2_A[10]

DDR2_A[11]
DDR2_A[3]
DDR2_A[7]

DDR2_A[9]

DDR2_A[5]

DDR2_A[1]

DDR2_A[8]

DDR2_A[6]
DDR2_A[4]
DDR2_A[2]
DDR2_A[0]

DDR2_CASZ
DDR2_RASZ
Close to IC as close as possible

DDR2_ODT
I2S_OUT

RL_ON/POWER_ON

DDR2_BA0
DDR2_BA1
DDR2_WEZ
TOUCH_VER_CHK

R450
R452

S_SDA R456
R458
C460 C462 C464 C466 C468 C470 C472

MUTE_LINE

SW_RESET
0.01uF 0.01uF 0.01uF 0.01uF0.01uF 0.01uF0.01uF

I2S_MCLK

DDR2_CKE
SYS_RESET

I2S_SDO
I2S_SCK
ISP_RX
IC402 25V 25V 25V 25V 25V 25V 25V

I2S_WS

S_SCL
KEY2
KEY1

M_SCL
M_SDA
LED_R
CEC_C
PC_VS
PC_HS
+3.3V_MST W25X64VSFIG +3.3V_MST

TXD
RXD
RXD

TXD
IR

AR410

AR411
+1.8V_DDR

56
AR409
HOLD CLK

56
AR406

AR408
1 16 SPI_CLK C409 C411

R443
100 R442
100 R439
100 R440
100 R441

R445

100 R460

56
R448 100

5% R449 100
10uF 0.1uF

56

56
C400 +1.8V_DDR

R455

56
25V

100
0.01uF VCC DIO

R457 1/16W
1/16W
1K
2 15 0.01uF

22

22
25V SPI_DI 25V +1.2V_MST
C457

5%
5%
0.01uF

0.1uF
C456

100
100
NC_1 NC_8

UART1_RX/GPIO86 R451

R454

I2S_IN_WS/GPIO67 R459
5%22

22

R461
3 14

R446

1/10W
1/10W
C461 C463 C465 C467 C469 C471
+3.3V_MST

UART2_TX/I2CM_SCK
UART2_RX/I2CM_SDA

I2S_IN_BCK/GPIO68
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
16V 0.1uF
16V
NC_2 NC_7 16V

UART1_TX/GPIO87
4 13

I2S_OUT_BCK

I2S_OUT_MCK

AVDD_MEMPLL
C452

I2S_OUT_SD

I2S_OUT_WS

A_MADR[12]

AVDD_DDR_6
A_MADR[10]

A_MADR[11]
NC_3 NC_6 Close to IC as close as possible

AVDD_MPLL

I2S_IN_SD

A_MADR[3]
A_MADR[7]

A_MADR[9]
A_MADR[5]

A_MADR[1]
A_BADR[0]
A_BADR[1]

A_MADR[8]
A_MADR[6]

A_MADR[4]
A_MADR[2]
A_MADR[0]
+3.3V_MST 5 12

HWRESET

GPIO140
GPIO139
GPIO138
GPIO135
GPIO134

USB0_DP
USB0_DM

A_MCLKE
VSYNC1
HSYNC1
VSYNC0
HSYNC0

GND_18
GND_17

SPDIFO

VDDC_7
GND_16
VDDP_5

VDDC_6

GND_15

A_CASZ
A_RASZ

GND_14
A_WEZ

A_ODT
MVREF
NC_4 NC_5

IRIN

XOUT

SAR3
SAR2
SAR1
SAR0
CEC

XIN
R401 6 11
+3.3V_MST
4.7K
SPI_CZ CS GND R411

256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
240
239
238
237
236
235
234
233
232
231
230
229
228
227
226
225
224
223
222
221
220
219
218
217
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
7 10
4.7K RXBCKNRM/SRS
SD Divx_NON 1 192 B_MCLKZ DDR2_D[0-15]
TMDS2_RXC- 22 DDR2_MCLKZ
1/16W RXBCKP 2 191 B_MCLK R471
SPI_DO DO
8 9
WP
FLASH_WP
TMDS2_RXC+ 10 22 DDR2_MCLK DDR2_D[5]
RXB0N B_MDATA[5] R472
HDMI_2

TMDS2_RX0- 3 5V 3.3V 5V 5V 3.3V 190

AR400 RXB0P B_MDATA[2] AR414 DDR2_D[2]
TMDS2_RX0+ 4 189

SCART H\V SYNC

HOTPLUGB 5 188 B_MDATA[0] 56 DDR2_D[0]
HPD_MST_2 RXB1N B_MDATA[7] DDR2_D[7]
TMDS2_RX1- 6 187
1/16W RXB1P 7 186 AVDD_DDR_5
TMDS2_RX1+
10 AVDD_33_1 8 185 B_MDATA[13]
TMDS2_RX2-
AR401 RXB2N 9 184 B_MDATA[10] DDR2_D[13]
TMDS2_RX2+
RXB2P 10 183 GND_13 AR415 DDR2_D[10]
RXACKN B_MDATA[8] 56 DDR2_D[8]

UART2_TX/I2CM_SCK
UART2_RX/I2CM_SDA

I2S_IN_BCK/GPIO68
I2S_IN_WS/GPIO67
TMDS1_RXC- 11 182

UART1_TX/GPIO87
UART1_RX/GPIO86

I2S_OUT_BCK

I2S_OUT_MCK

AVDD_MEMPLL
I2S_OUT_SD

I2S_OUT_WS

A_MADR[12]

AVDD_DDR_6
A_MADR[10]

A_MADR[11]
RXACKP B_MDATA[15] DDR2_D[15]

AVDD_MPLL

I2S_IN_SD

A_MADR[3]
A_MADR[7]

A_MADR[9]
A_MADR[5]

A_MADR[1]
A_BADR[0]
A_BADR[1]

A_MADR[8]
A_MADR[6]

A_MADR[4]
A_MADR[2]
A_MADR[0]
1/16W 12 181
TMDS1_RXC+

HWRESET

GPIO140
GPIO139
GPIO138
GPIO135
GPIO134

USB0_DP
USB0_DM

A_MCLKE
VSYNC1
HSYNC1
VSYNC0
HSYNC0

GND_18
GND_17

SPDIFO

VDDC_7
GND_16
VDDP_5

VDDC_6

GND_15

A_CASZ
A_RASZ

GND_14
Main EEPROM

A_WEZ

A_ODT
MVREF
IRIN

XOUT

SAR3
SAR2
SAR1
SAR0
CEC

XIN
10 RXA0N AVDD_DDR_4
HDMI_1

TMDS1_RX0- 13 180 MATRIX_ONLY MP3

256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
240
239
238
237
236
235
234
233
232
231
230
229
228
227
226
225
224
223
222
221
220
219
218
217
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
RXBCKN 1 192 B_MCLKZ

AR402 RXA0P 14 179 B_DDR2_DQSB[1] RXBCKP 2 191 B_MCLK

TMDS1_RX0+ DDR2_DQS1M RXB0N

RXB0P
3
4
190
189
B_MDATA[5]
B_MDATA[2]

AVDD_33_2 15 178 B_DDR2_DQS[1] HOTPLUGB 5 188 B_MDATA[0]

RXA1N GND_12
DDR2_DQS1P RXB1N
RXB1P
AVDD_33_1
RXB2N
6
7
8
187
186
185
B_MDATA[7]
AVDD_DDR_5
B_MDATA[13]
B_MDATA[10]

TMDS1_RX1- 16 177 RXB2P

RXACKN
9
10
184
183 GND_13
B_MDATA[8]
11 182

IC400 1/16W RXA1P 17 176 VDDP_4 RXACKP 12 181 B_MDATA[15]

TMDS1_RX1+ RXA0N
RXA0P
13
14
180
179
AVDD_DDR_4
B_DDR2_DQSB[1]

AT24C64CN-SH-T 10 GND_1 18 175 AVDD_DDR_3 AVDD_33_2 15 178 B_DDR2_DQS[1]

+3.3V_MST TMDS1_RX2- RXA1N

RXA1P
GND_1
16
17
177
176
GND_12
VDDP_4
AVDD_DDR_3
AR403 RXA2N 19 174 B_DDR2_DQSB[0] RXA2N
18 175
B_DDR2_DQSB[0]

TMDS1_RX2+ DDR2_DQS0M RXA2P

HOTPLUGA
19
20
21
174
173
172
B_DDR2_DQS[0]
GND_11

RXA2P 20 173 B_DDR2_DQS[0] REXT 22 171 B_DDR2_DQM[0]

DDR2_DQS0P VCLAMP 23 170 B_DDR2_DQM[1]

IC403
REFP AVDD_DDR_2
A0 VCC HOTPLUGA GND_11 REFM
24
25
169
168 B_MDATA[14]

1 8 C404 HPD_MST_1 21 172 BIN1P

SOGIN1
26
27
167
166
B_MDATA[9]
GND_10
GIN1P B_MDATA[12]

0.01uF REXT 22 171 B_DDR2_DQM[0] RIN1P

28 165
B_MDATA[11]

R436 B_DDR2_DQM[1]
DDR2_DQM0 BINM
BIN0P
29
30
31
164
163
162
AVDD_DDR_1
B_MDATA[6]

25V 390 VCLAMP

C410 0.1uF
IC403-*1
GINM 32 161 B_MDATA[1]

A1 WP 23 170 DDR2_DQM1 GIN0P

SOGIN0
33 160 GND_9
B_MDATA[3]
2 7 C406 0.1uF REFP AVDD_DDR_2 RINM
34
35
159
158 B_MDATA[4]

24 169 RIN0P
AVDD_33_3
36
37
157
156
VDDC_5
VDDP_3

C407 0.1uF REFM B_MDATA[14]

GND_2
BIN2P
38 155 GPIO58
GPIO57
25 168 GIN2P
39
40
154
153 GPIO56

A2 SCL C408 0.1uF BIN1P B_MDATA[9] DDR2_D[14]

SOGIN2 41 152 GPIO55

3 6 R424 47 C421 0.047uF 26 167

RIN2P 42 151 GPIO54

M_SCL PC_B LGE4767A (Matrix SD Divx_ Non RM_NON SRS)

CVBS6
CVBS5
43
44
150
149
GPIO53
GPIO52

Close to IC as close as R427 470 C440 1000pF SOGIN1 27 166 GND_10 AR412 DDR2_D[9] CVBS4 45 148 GPIO51

possible with width trace

PC_G CVBS3
CVBS2
CVBS1
46
47
147
146
GND_8
GPIO152/I2C_OUT_SD3
GPIO151/I2C_OUT_SD2

GND SDA R425 47 C422 0.047uF GIN1P 28 scart RGB INPUT 165 B_MDATA[12] 56 DDR2_D[12] VCOM1
CVBS0
48
49
145
144 GPIO150/I2C_OUT_MUTE
VDDC_4
50 143

4 5 M_SDA R426 47 C423 0.047uF RIN1P 29 164 B_MDATA[11] DDR2_D[11]

VCOM0
AVDD_33_4
51
52
142
141
GND_7
AVDD_LPLL

PC_R CVBSOUT
GND_3
53
54
140
139
LVB0M
LVB0P

R415 47 C424 0.047uF BINM 30 163 AVDD_DDR_1 SIF0P

SIF0M
55
56
138
137
LVB1M
LVB1P
VDDC_1 57 136 LVB2M
AUL5 LVB2P

R416 47 C425 0.047uF BIN0P 31 162 B_MDATA[6] AUR5

58
59
135
134 LVBCKM

COMP1_PB
AUVRM 60 133 LVBCKP
AUOUTL2 61 132 LVB3M

R417 47 C426 0.047uF GINM 32 161 B_MDATA[1] DDR2_D[6] AUOUTR2

AUOUTL1
62
63
131
130
LVB3P
LVB4M
AUOUTR1 64 129 LVB4P

100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
R418 47 C427 0.047uF GIN0P GND_9 AR413 DDR2_D[1]

65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
COMP1_Y 33 160

AUL0
AUR0
AUL1
AUR1
AUL2
AUR2
AUL3
AUR3
AUCOM
AUL4
AUR4
GND_4
AUVRP
AUVAG
AVDD_AU
GND_5
VDDC_2
DDCA_CK
DDCA_DA
DDCDA_CK
DDCDA_DA
DDCDB_CK
DDCDB_DA
GPIO20
VDDP_1
VDDC_3
UART2_RX
UART2_TX
DDCDC_CK
RXCCKN
RXCCKP
DDCDC_DA
RXC0N
RXC0P
GND_6
RXC1N
RXC1P
AVDD_DM
RXC2N
RXC2P
HOTPLUGC
USB1_DM
USB1_DP
SCK
SDI
SDO
SCZ
PWM0
PWM1
PWM2
PWM3
LVA4P
LVA4M
LVA3P
LVA3M
LVACKP
LVACKM
LVA2P
LVA2M
LVA1P
LVA1M
LVA0P
LVA0M
VDDP_2
R419 470 C441 1000pF SOGIN0 34 159 B_MDATA[3] 56 DDR2_D[3]

0.01uF
R420 47 C428 0.047uF RINM 35 158 B_MDATA[4] DDR2_D[4]

C459

25V
0.047uF RIN0P VDDC_5
COMP1_PR R421 47 C429
AVDD_33_3
36
37
157
156 VDDP_3 LGE4766A (Matrix Only MP3_NON SRS)
HDCP EEPROM COMP2_PB R431 47 C430 0.047uF
GND_2
BIN2P
38
39
3.3V155
5V 154
GPIO58
GPIO57 100 R464
DISP_EN
R432 47 C431 0.047uF GIN2P GPIO56 100
READY R465
COMP2_Y 40 3.3V 153 ERROR_DET
+3.3V_MST R433 470C442 1000pF SOGIN2 41 5V 152 GPIO55
PCM 100 EYE_SCL
R434 47 C432 0.047uF RIN2P 42 151 GPIO54 R466
COMP2_PR 100 EYE_SDA
CVBS6 43 150 GPIO53 R469
CVBS5 S-VIDEO 3.3V GPIO52 R470 22

UART2_TX/I2CM_SCK
UART2_RX/I2CM_SDA

I2S_IN_BCK/GPIO68
I2S_IN_WS/GPIO67
44 149 5%

UART1_TX/GPIO87
UART1_RX/GPIO86
A_SCL

I2S_OUT_BCK

I2S_OUT_MCK

AVDD_MEMPLL
1/16W22

I2S_OUT_SD

I2S_OUT_WS

A_MADR[12]

AVDD_DDR_6
A_MADR[10]

A_MADR[11]
IC401 CVBS4 GPIO51 R467 +3.3V_MST

AVDD_MPLL

I2S_IN_SD

A_MADR[3]
A_MADR[7]

A_MADR[9]
A_MADR[5]

A_MADR[1]
A_BADR[0]
A_BADR[1]

A_MADR[8]
A_MADR[6]

A_MADR[4]
A_MADR[2]
A_MADR[0]
R422 47 C433 0.047uF 45 148 1/16W
SC1_VIN

HWRESET

GPIO140
GPIO139
GPIO138
GPIO135
GPIO134

USB0_DP
USB0_DM

A_MCLKE
VSYNC1
HSYNC1
VSYNC0
HSYNC0

GND_18
GND_17

SPDIFO

VDDC_7
GND_16
VDDP_5

VDDC_6

GND_15

A_CASZ
A_RASZ

GND_14
A_SDA

A_WEZ

A_ODT
MVREF
R478 4.7K

IRIN

XOUT

SAR3
SAR2
SAR1
SAR0
CAT24WC08W-T

CEC

XIN
R423 47 C434 0.047uF CVBS3 46 147 GND_8 5%
SIDE_VIN MATRIX BASIC

256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
240
239
238
237
236
235
234
233
232
231
230
229
228
227
226
225
224
223
222
221
220
219
218
217
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
RXBCKN 1 192 B_MCLKZ

CVBS2 47 146 GPIO152/I2C_OUT_SD3 RXBCKP 2 191 B_MCLK

R400 M5V_ON R477 4.7K RXB0N

RXB0P
3
4
190
189
B_MDATA[5]
B_MDATA[2]

A0 VCC CVBS1 SCART_CVBS GPIO151/I2C_OUT_SD2 100 R403 HOTPLUGB 5 188 B_MDATA[0]

4.7K 1 8 48 145 P_SCL

RXB1N
RXB1P
6
7
187
186
B_MDATA[7]
AVDD_DDR_5
25V25V

GPIO150/I2C_OUT_MUTE 22
AVDD_33_1 B_MDATA[13]
C402 R429 47 C435 0.047uF VCOM1 49 144 R447 RXB2N
8
9
185
184 B_MDATA[10]

0.1uF P_SDA RXB2P

RXACKN
10 183 GND_13
B_MDATA[8]
A1 WP
R428 47 C436 0.047uF CVBS0 VDDC_4 22 R463 +3.3V_MST RXACKP
11
12
182
181 B_MDATA[15]

2 7 TV_MAIN 50 143 RXA0N 13 180 AVDD_DDR_4

R468 4.7K
25V

RXA0P 14 179 B_DDR2_DQSB[1]

0.047uF VCOM0 GND_7 AVDD_33_2 15 178 B_DDR2_DQS[1]

R408 R430 1/16W47 C437 51 142 RXA1N

RXA1P
16
17
177
176
GND_12
VDDP_4

A2 SCL 100 C413 5% 0.01uF AVDD_33_4 AVDD_LPLL R487 4.7K GND_1

RXA2N
18 175 AVDD_DDR_3
B_DDR2_DQSB[0]
3 6 M_SCL 52 141 RXA2P
19
20
174
173 B_DDR2_DQS[0]

CVBSOUT LVB0M TXCO4+ HOTPLUGA

REXT
21
22
172
171
GND_11
B_DDR2_DQM[0]

R409 53 140 VCLAMP

REFP
23 170 B_DDR2_DQM[1]
AVDD_DDR_2

VSS SDA 100 GND_3 LVB0P TXCO4- REFM

24
25
169
168 B_MDATA[14]

4 5 M_SDA 54 139 BIN1P

SOGIN1
26
27
167
166
B_MDATA[9]
GND_10

SIF0P LVB1M TXCO3+ GIN1P

RIN1P
28 165 B_MDATA[12]
B_MDATA[11]

MAIN_SIF 55 138 BINM

29
30
164
163 AVDD_DDR_1
SCART_AUDIO out

R413 47 TXCO3- BIN0P B_MDATA[6]

FHD LVDS
C419 0.1uF
IC403-*2
31 162
SIF0M 56 137 LVB1P GINM
GIN0P
32
33
161
160
B_MDATA[1]
GND_9
SCART_AUDIO IN

SOGIN0 B_MDATA[3]
R412 47 C420 0.1uF VDDC_1 LVB2M TXCLKO+ RINM
34
35
159
158 B_MDATA[4]

57 136 RIN0P
AVDD_33_3
36
37
157
156
VDDC_5
VDDP_3

AUL5 LVB2P TXCLKO- GND_2

BIN2P
38 155 GPIO58
GPIO57

SIDE_LIN 58 135 GIN2P

39
40
154
153 GPIO56

C417 2.2uF AUR5 LVBCKM TXCO2+ SOGIN2

RIN2P
41
42
152
151
GPIO55
GPIO54

SIDE_RIN 59 134 CVBS6

CVBS5
43 150 GPIO53
GPIO52
C418 2.2uF AUVRM LVBCKP TXCO2- CVBS4
44
45
149
148 GPIO51

60 133 CVBS3
CVBS2
46
47
147
146
GND_8
GPIO152/I2C_OUT_SD3

AUOUTL2 LVB3M TXCO1+ CVBS1

VCOM1
48 145 GPIO151/I2C_OUT_SD2
GPIO150/I2C_OUT_MUTE
61 132 49 144

MNT_L_AMP
CVBS0 50 143 VDDC_4

R438 100 AUOUTR2 LVB3P TXCO1- VCOM0

AVDD_33_4
51
52
142
141
GND_7
AVDD_LPLL

62 131 CVBSOUT 53 140 LVB0M

MNT_R_AMP R437 100 AUOUTL1 63 130 LVB4M TXCO0+ GND_3

SIF0P
SIF0M
54
55
56
139
138
137
LVB0P
LVB1M
LVB1P

3.3V TXCO0-
VDDC_1
AUL5
57 136 LVB2M
LVB2P
AUOUTR1 64 5V 5V 129 LVB4P AUR5
AUVRM
58
59
135
134 LVBCKM
LVBCKP
60 133
AUOUTL2 LVB3M
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
61 132
AUOUTR2 62 131 LVB3P
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99

AUOUTL1 63 130 LVB4M

AUOUTR1 64 129 LVB4P

100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
AUL0
AUR0
AUL1
AUR1
AUL2
AUR2
AUL3
AUR3
AUCOM
AUL4
AUR4
GND_4
AUVRP
AUVAG
AVDD_AU
GND_5
VDDC_2
DDCA_CK
DDCA_DA
DDCDA_CK
DDCDA_DA
DDCDB_CK
DDCDB_DA
GPIO20
VDDP_1
VDDC_3
UART2_RX
UART2_TX
DDCDC_CK
RXCCKN
RXCCKP
DDCDC_DA
RXC0N
RXC0P
GND_6
RXC1N
RXC1P
AVDD_DM
RXC2N
RXC2P
HOTPLUGC
USB1_DM
USB1_DP
SCK
SDI
SDO
SCZ
PWM0
PWM1
PWM2
PWM3
LVA4P
LVA4M
LVA3P
LVA3M
LVACKP
LVACKM
LVA2P
LVA2M
LVA1P
LVA1M
LVA0P
LVA0M
VDDP_2
AUL0
AUR0
AUL1
AUR1
AUL2
AUR2
AUL3
AUR3
AUCOM
AUL4
AUR4
GND_4
AUVRP
AUVAG
AVDD_AU
GND_5
VDDC_2
DDCA_CK
DDCA_DA
DDCDA_CK
DDCDA_DA
DDCDB_CK
DDCDB_DA
GPIO20
VDDP_1
VDDC_3
UART2_RX
UART2_TX
DDCDC_CK
RXCCKN
RXCCKP
DDCDC_DA
RXC0N
RXC0P
GND_6
RXC1N
RXC1P
AVDD_DM
RXC2N
RXC2P
HOTPLUGC
USB1_DM
USB1_DP
SCK
SDI
SDO
SCZ
PWM0
PWM1
PWM2
PWM3
LVA4P
LVA4M
LVA3P
LVA3M
LVACKP
LVACKM
LVA2P
LVA2M
LVA1P
LVA1M
LVA0P
LVA0M
VDDP_2
0.01uF

0.01uF
22K

+3.3V_MST
LGE4765A (Matrix basic_NON_SRS)
22K

25V 25V
R414
C414
R435
C416

2.2uF C444
2.2uF C445
2.2uF C446
2.2uF C447
2.2uF C448
2.2uF C449

2.2uF C450
2.2uF C451

TXCLKE-
TXCLKE+

UART2_TX/I2CM_SCK
UART2_RX/I2CM_SDA

I2S_IN_BCK/GPIO68
TXCE1-
TXCE0-
TXCE0+

TXCE1+
TXCE2-
TXCE2+

TXCE3-
TXCE3+
TXCE4-
TXCE4+

I2S_IN_WS/GPIO67
UART1_TX/GPIO87
UART1_RX/GPIO86

I2S_OUT_BCK

I2S_OUT_MCK

AVDD_MEMPLL
I2S_OUT_SD

I2S_OUT_WS

A_MADR[12]

AVDD_DDR_6
A_MADR[10]

A_MADR[11]
AVDD_MPLL

I2S_IN_SD

A_MADR[3]
A_MADR[7]

A_MADR[9]
A_MADR[5]

A_MADR[1]
A_BADR[0]
A_BADR[1]

A_MADR[8]
A_MADR[6]

A_MADR[4]
A_MADR[2]
A_MADR[0]
HWRESET

GPIO140
GPIO139
GPIO138
GPIO135
GPIO134

USB0_DP
USB0_DM

A_MCLKE
VSYNC1
HSYNC1
VSYNC0
HSYNC0

GND_18
GND_17

SPDIFO

VDDC_7
GND_16
VDDP_5

VDDC_6

GND_15

A_CASZ
A_RASZ

GND_14
C453

A_WEZ

A_ODT
MVREF
IRIN

XOUT

SAR3
SAR2
SAR1
SAR0
CEC

XIN
0.01uF
AR404

1/16W

AR405

AR407

MATRIX_SD DIVX_RM
1/16W

256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
240
239
238
237
236
235
234
233
232
231
230
229
228
227
226
225
224
223
222
221
220
219
218
217
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
RXBCKN 1 192 B_MCLKZ
100

25V C458 RXBCKP 2 191 B_MCLK

10

RXB0N 3 190 B_MDATA[5]

10

RXB0P B_MDATA[2]
22

4 189
0.01uF HOTPLUGB
RXB1N
5
6
188
187
B_MDATA[0]
B_MDATA[7]

25V RXB1P 7 186 AVDD_DDR_5

1/16W

AVDD_33_1 8 185 B_MDATA[13]

[MODE SELECTION] RXB2N

RXB2P
RXACKN
9
10
11
184
183
182
B_MDATA[10]
GND_13
B_MDATA[8]
RXACKP 12 181 B_MDATA[15]
RXA0N 13 180 AVDD_DDR_4
RXA0P 14 179 B_DDR2_DQSB[1]
AVDD_33_2 15 178 B_DDR2_DQS[1]

+3.3V_MST
R453

RXA1N 16 177 GND_12

HD LVDS RXA1P 17 176 VDDP_4

MStar Reset
GND_1 18 175 AVDD_DDR_3
RXA2N 19 174 B_DDR2_DQSB[0]
RXA2P 20 173 B_DDR2_DQS[0]

C439 0.1uF HOTPLUGA

REXT
21
22
172
171
GND_11
B_DDR2_DQM[0]
VCLAMP 23 170 B_DDR2_DQM[1]
REFP 24 169 AVDD_DDR_2
REFM 25 168 B_MDATA[14]
BIN1P 26 167 B_MDATA[9]
SOGIN1 27 166 GND_10
GIN1P B_MDATA[12]
C412 C415 C438 C443 RIN1P
BINM
28
29
30
165
164
163
B_MDATA[11]
AVDD_DDR_1
BIN0P 31 162 B_MDATA[6]

IC403-*3
GINM 32 161 B_MDATA[1]

10uF 0.1uF 1000pF 4.7uF

GIN0P
SOGIN0
33 160 GND_9
B_MDATA[3]
R473 34 159
TMDS3_RXC-
TMDS3_RXC+
TMDS3_RX0-
TMDS3_RX0+

TMDS3_RX1-
TMDS3_RX1+
TMDS3_RX2-
TMDS3_RX2+

RINM 35 B_MDATA[4]
HPD_MST_3

158
RIN0P VDDC_5
DDC_SCL2
DDC_SDA2

36 157
PC_AUD_L
PC_AUD_R

DDC_SCL1
DDC_SDA1
DSUB_SCL
DSUB_SDA

R475
DDC_SDA3
DDC_SCL3

AVDD_33_3 VDDP_3
READY 37 156
SC1_LIN
SC1_RIN
COMP1_L
COMP1_R
COMP2_L
COMP2_R

GND_2 GPIO58
C401 38 155
SPI_CLK
FLASH_WP

BIN2P GPIO57
1K 39 154
ROM_RX
ROM_TX

SPI_DO
SPI_CZ

0.1uF
USB_DN
USB_DP

GIN2P GPIO56
SPI_DI

40 153

+3.3V_MPLL Close to IC 1K
SOGIN2
RIN2P
41
42
152
151
GPIO55
GPIO54
CVBS6 43 150 GPIO53
CVBS5 GPIO52
C403 with width trace CVBS4
CVBS3
44
45
149
148 GPIO51
GND_8
46 147

4.7uF CVBS2
CVBS1
47
48
146
145
GPIO152/I2C_OUT_SD3
GPIO151/I2C_OUT_SD2

R410 VCOM1 49 144 GPIO150/I2C_OUT_MUTE

10V 22
CVBS0
VCOM0
50
51
143
142
VDDC_4
GND_7
AVDD_33_4 52 141 AVDD_LPLL

R474 R476 CVBSOUT

GND_3
53
54
140
139
LVB0M
LVB0P

D401 1/16W SYS_RESET READY SIF0P

SIF0M
55 138 LVB1M
LVB1P

R405 5% 1K 1K VDDC_1
56
57
137
136 LVB2M

KDS181 C405
AUL5
AUR5
58
59
135
134
LVB2P
LVBCKM
USB PART

33K 0.1uF
AUVRM
AUOUTL2
60
61
133
132
LVBCKP
LVB3M
MOVING

ROM D/L HDMI_3 AUOUTR2

AUOUTL1
62
63
131
130
LVB3P
LVB4M

16V FLASH AUOUTR1 64 129 LVB4P

100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
RX,TX

65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
AUL0
AUR0
AUL1
AUR1
AUL2
AUR2
AUL3
AUR3
AUCOM
AUL4
AUR4
GND_4
AUVRP
AUVAG
AVDD_AU
GND_5
VDDC_2
DDCA_CK
DDCA_DA
DDCDA_CK
DDCDA_DA
DDCDB_CK
DDCDB_DA
GPIO20
VDDP_1
VDDC_3
UART2_RX
UART2_TX
DDCDC_CK
RXCCKN
RXCCKP
DDCDC_DA
RXC0N
RXC0P
GND_6
RXC1N
RXC1P
AVDD_DM
RXC2N
RXC2P
HOTPLUGC
USB1_DM
USB1_DP
SCK
SDI
SDO
SCZ
PWM0
PWM1
PWM2
PWM3
LVA4P
LVA4M
LVA3P
LVA3M
LVACKP
LVACKM
LVA2P
LVA2M
LVA1P
LVA1M
LVA0P
LVA0M
VDDP_2
T2

LED

LGE4768A (Matrix Only SD Divx_RM_NON SRS)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS H6RR 2010/11/1
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Main 4 4
Main

Copyright © 2011 LG Electronics Inc. All rights reserved.

Only for training and service purposes LGE Internal Use Only
Repair Process
A. Picture Problem Making
PDP TV Symptom
No Picture/Sound OK Revision
First of all, Check whether all of cable between board was inserted properly or not.
(Main B/D↔ Power B/D, Power B/D↔ Y-sus B/D,Y-Sus B/D ↔Z-Sus B/D,LVDS Cable,Speaker Cable,IR B/D Cable,,,)

Check Module pattern

Y Check Sound Y Check Y
by using “TILT” key Normal Normal Close
Sound OK LVDS Cable
on SVC R/C
N N
Move Replace
N
No Picture/No sound
Main B/D
Section

1.Check Control Board

Check voltage Check B+ Voltage . LED on
Check Y Y on Power Board Y . Crystal(X400)
Normal . -VY Normal Normal
Vs, Va . 1.8V, 3.3V,1.2V 5V FET
. VSC / Control Board
. Rom update
. VZB .Check B+(5V) 2.Replace Control B/D
N N N
Move Move
Power problem 1. Check Y-Sus/ Z-Sus Board Power problem
Section 2. Replace defective B/D Section

※Refer to the Module label for each voltage

<SVC R/C & Pattern>

-VY VSC VZB

1
Repair Process
A. Picture Problem Making
PDP TV Symptom
No Picture/No Sound Revision

Check Module pattern

Y Check Sound Y Check Y
by using “TILT” key Normal Normal Close
Sound OK LVDS Cable
on SVC R/C
N N

N Replace
Move Main B/D
No Picture/ Sound Ok
Section
N Repair/Replace
Check IR operation Normal
IR B/D

Y
Check Input signal
Y Y . RF Cable connection
Power OSD
. SCART Cable connection
LED ON? appear?
. HDMI Cable connection
. Component Cable …
N N

Latest S/W update

Replace
from GCSC
Main B/D
(Firmware Management)

N
Normal

Close

2
Repair Process
A. Picture Problem Making
PDP TV Symptom
Mal-discharge/Noise/dark picture Revision

Check
Picture problem
Type Check CTRL ROM Ver. N N
Dot Normal Replace Normal Replace
and
type Picture? Control board Picture? Module
Rom Upgrade
Y Y
Mal-discharge
Close Close N

Check voltage Check

Scan Normal Y Normal N 1.Check Control B/D Normal
. –VY / VSC Y Drive B/D
Type Picture? & Picture? 2.Replace Board Picture?
(Y-Sus B/D) Replace B/D
N Y
Y
Close
Replace
Y-Sus B/D Close
※Check Discharge resistance (10Ω 2~3ea)
on Power B/D before replace Y Drive B/D

Check RF Cable Normal N Check Tuner

Picture Noise
Connection Picture? & Replace

Y
Close

Check Normal N 1. Check Z-Sus Board Normal N Replace

Dark Picture Picture mode Module
Picture? 2. Replace Board Picture?
setting
Y Y

Close Close
3
Repair Process
A. Picture Problem Making
PDP TV Symptom
Picture broken/Freezing Revision

. By using signal level meter

Check RF Signal level - Signal strength (Normal : over 50%)

- Signal Quality (Normal: over 50%)

Y Check whether other equipments have problem or not.

Normal
(By connecting RF Cable at other equipment)
Signal?
→ DVD Player ,Set-Top-Box, Different maker TV etc

Check RF Cable
Normal Y Check SVC Normal Y
Connection Close
1. Reconnection Picture? S/W Version Bulletin? Picture?

N Y N

S/W Upgrade Check

Normal N Contact with signal distributor Tuner soldering
Picture? or broadcaster (Cable or Air)
Normal N
Y Picture? Replace
Main B/D
Close Y

Close

4
Repair Process
A. Picture Problem Making
PDP TV Symptom
Vertical bar/ Horizontal Bar Revision

Check
defect type Regular Check Module pattern Y
Normal Replace
Vertical by using “TILT” key
Pattern? Module
Line / Bar on SVC R/C
N

1.Check CTRL B/D

Vertical 2.Replace Board ※CTRL B/D: Control board
Line/Bar

Check connection
Irregular N Check Main B/D
of Connector Y 1.Check CTRL B/D Normal
Vertical Normal Replace Module
Line / Bar (COF,TCP) 2.Replace Board Picture?
(If Main B/D doesn’t cause)
on CTRL B/D , X B/D
N
Y
1.Connector re-connection
Close
2.Eliminate foreign material on Connector

Half 1.Check X B/D Normal N Replace

No picture 2.Replace Board Picture? Module

Y
Close
※ H-Line’s Cause is rare CTRL B/D

Check connection Y N N
Horizontal 1. Check Y Drive B/D Normal 1.Check CTRL B/D Normal Replace
of Connector (FPC) Normal
Line/Bar 2. Replace Board Picture? 2.Replace Board Picture? Module
on Y Drive B/D

N Y Y

1.Connector re-connection Close Close

2.Eliminate foreign material on FFC
5
 Repair Process
B. Power Problem Making
PDP TV Symptom
No Power (Not turn on) Revision

Y DC Power on N N
Check Check Repair/Replace
Power LED by pressing Power Key Normal Normal
Power LED ON? R/C IR Operation IR B/D
On Remote control
. Stand-By: Red
. Operating: White or Black N Y Y

Close
Check Power cord
was inserted properly

Y
Normal Close
?
N

Check ST-BY 3.5V

on Power Board

Check
Check Check
Normal Y Normal Y Normal Y the other pin’s N Replace
AC DET Signal RL_ON Signal Normal
Voltage? Signal? Signal? Output voltage Power B/D
on Power B/D on Power B/D
on Power B/D
N N Y
N
Close
Check Power B/D Check Main B/D
Replace Power B/D Replace Main B/D

6
Repair Process
B. Power Problem Making
PDP TV Symptom
Turn off (Instant, under watching) Revision

※ To check Power B/D Protection

Y 1. Check Y-Sus/ Z-Sus Board
Instant Turn on after pull out connector Power LED (especially Short or Open)
Turn off between Power B/D & Y-Sus Green? 2. Replace defective B/D

Check Power B/D

Replace Power B/D

RCU Off

Turn off N KEY Off

Check This is not problem
“Off Timer”
Under watching Set? Power Off History
2HOUR Off Normal operation
Y
NO Signal Off
“Off timer”
Function off Move
Don’t appear
No Power problem
Power Off History Section

7
Repair Process
C. Sound Problem Making
PDP TV Symptom
No sound/ Sound distortion Revision

1.No sound( If HDMI Input only have no sound, upload EDID data) Close

Check N Check Speaker N Y Apply Y

Normal Normal SVC Normal
“Speaker ON/Off” setting jack connection SVC Bulletin
Sound? Sound? Bulletin? Sound?
in OSD Menu & Speaker Cable open (S/W Upgrade etc)
N N
Y Y

Close Close
Check 17V N
Normal Check Power B/D
(Audio IC B+)
voltage? Replace Power B/D
on Power B/D

2.Sound distortion & sound drop

Check Input signal Problem in all input
→Cable connection N Check N
Normal Normal
→Cable open AVL off/on
Sound? Sound?
- RF & external Clear voiceⅡ off/on
(HDMI,SCART,,,)
Y Y Problem in external input (Case 2)
Close Close (SCART,HDMI,,,)

Check whether Problem happen N Y Apply Y

in same output of other equipments or not. Normal SVC Normal
SVC Bulletin Close
(By connecting same output cable of other equipment) Sound? Bulletin? Sound?
(S/W Upgrade etc)
→ DVD Player ,Set-Top-Box, different maker TV etc
Y N N
Explain customer that Check Audio IC
Cause is RF Signal’s problem (Case 1) Replace Main B/D
Cause is Equipment’s problem (case 2)
8
Repair Process
D. General Function Problem Making
PDP TV Symptom
Remote control Revision

1. Remote control (R/C) operating error

Replace
Main B/D

Check & Repair N Y Y

Check R/C itself Normal Y Normal Check B+ 5V Normal Check IR Normal
Cable connection
Operation operating? operating? On Main B/D Voltage? Output signal Signal?
Connector solder
N
Y N N

Check R/C Operating Check & Replace Close Check 5v on Power B/D Repair/Replace
When turn off light Baterry of R/C Replace Power B/D or IR B/D
in room Replace Main B/D
(Power B/D don’t have problem)
If R/C operate, Normal Y
Close
Explain the customer operating?
cause is interference
from light in room. N

Replace R/C

9
Repair Process-Reference data
Symptom A. Picture Problem Making
PDP TV
Item Check Module pattern by Tilt key Revision

Tilt Key

You can see 20 types patterns by using TILT Key on SVC Remote controller (except Old model)
< CHECK Item >
1. Dead pixel 2.Image sticking 3.Mal discharge 4.Module defect (V-Line/Bar, H-Line/Bar,,,)
5. In case of no picture, you can judge defect cause (Module or Main B/D)
- If patterns appear, defect cause is Main B/D
A1
Repair Process-Reference data
A. Picture Problem Making
PDP TV Symptom
Control Board Checking Method(42G2/50G2) Revision

▣ Checking Method ④ Check Crystal(X101)

① Check input voltage(5V of P101) on Control B/D GND

② Check LED On 3.3 V
③ If LED light doesn’t appear, check Crystal X101 output 1.8 V
④ Check 3.3V, 5V,1.8V FET 5V
⑤ Check MCM at VS_DA by using Multi meter

③ Check Crystal(X101)
Check oscillation of Crystal
(Normal: 100 MHZ, 1.6v)

⑤ Check MCM
MCM Check point
(+)VS_DA / (-) GND
(Normal: 3.3V )

② Check LED On ① Check Input voltage

A13
Repair Process-Reference data
A. Picture Problem Making
PDP TV Symptom
PDP Module Rom Ver. Checking method Revision

▣ Check by using Rom Label on control board

Rom ver. Label

▣ Check by using SVC Remocon

Press “In-start” →Press” 0000” ※Refer to the Module Rom upgrade manual
→ Select Panel option → Pop up Module Rom ver. for Rom upgrade.

USB Type Jig

A15
Repair Process-Reference data
A. Picture Problem Making
PDP TV Symptom
Defect type cause by PDP Module Revision

First of all, Check whether all of cable between board was inserted properly or not.
Next, Check whether there is foreign material on connector.
Symptom picture defects description To action

1. Check connection
(CTRL B/D, X B/D)
Regular vertical lines
2. Check CTRL B/D
3. Replace CTRL B/D

1. Check connection
(CTRL B/D, X B/D)
Vertical lines or Bar
2. Check CTRL B/D
3. Replace CTRL B/D

1. Check connection
(CTRL B/D, X B/D)
Many irregular vertical lines
2. Check CTRL B/D
3. Replace CTRL B/D

1. Check connection
(Y-Sus B/D ↔Panel)
Horizontal Line or Bar
2. Check Y-Sus B/D
3. Replace Y-Sus B/D

A19
Repair Process-Reference data
A. Picture Problem Making
PDP TV Symptom
Connector Type on PDP Module Revision

COF Type TCP Type FPC Type

96 Out Put 192 Out Put

1. Check foreign & Connection status TCP (Tape Carrier Package) is film Connector to connect between
2. Check bad soldering for IC connect with Electrode pattern Electrode PAD Of PANEL and
on Chip resistance (Direct Bonding) on X B/D Y Drive B/D,Z-Sus B/D

▣ Defect symptom

A20
Repair Process-Reference data
B. Power Problem Making
PDP TV Symptom
Check voltage on Power board Revision

Pin Map Checking

Checking Order
Order
Power B/D↔Main B/D
(P813) (P1100) Checking
No. Spec Remark
P814 Point
1 17V 2 17V 14 STBY 5V 5V
3 GND 4 GND 16 AC DET High(3.3V~5V)
5 5V 6 5V
8 Error_DET 5V
7 5V 8 Error_DET
15 RL_ON High(3.3V~5V)
9 GND 10 GND
11 GND 12 GND
17 M5_ON High(3.3V~5V)
13 STBY 14 STBY 6 Vs-ON High(3.3V~5V)
15 RL_ON 16 AC_DET 7 Check the other pin’s output
17 M_ON 18 AUTO_GND
Wafer SMAW200-H18S2
A22