You are on page 1of 12

USMAPHP512 - Lab Report

2021 – 22

Analog and Digital Electronics

Experiment: Studying characteristics of-


i) Asynchronous Counters
ii) Modulus Counter

Submitted by: Yogeshwar Singh Submitted to: Mr. Kartikeyan Subbu


Roll No: B-023 Submitted on: 15 August 2021
SAP ID: 40312190339
1.1 Experiment: - Studying the characteristics of asynchronous counters and
modulus operators.

Aim
To study characteristics of Asynchronous and Modulus Operators

Apparatus (Virtual)
TINA simulator

Theory:
(i) Asynchronous circuits-
In digital electronics, an asynchronous
circuit, clockless, or self-timed circuit, is
a sequential digital logic circuit which is not
governed by a clock circuit or global clock
signal. Instead it often uses signals that indicate
completion of instructions and operations,
specified by simple data transfer protocols.
Asynchronous logic is the logic required for the design
of asynchronous digital systems. These system
functions without a clock signal and so individual logic
elements cannot be relied upon to have a discrete
An asynchronous sequential circuit true/false state at any given time. 

Principle
Synchronous sequential circuit works based on memory concept. In such circuits, feedback is present as delay line, and
delay of feedback is not predictable so application of asynchronous sequential circuit is limited. Changes in inputs cause
changes in output (State changes)
Asynchronous sequential circuit design is more complicated than synchronous sequential circuit design. The memory of
the asynchronous sequential circuit may include flip-flops or time-delay devices.

3 Bit Up counter:
Circuit Diagram-

Observation Table:

Cou
Clock Pulse Aout Bout
t

0 (Initially) 0 0 0
1 1 0 0
2 0 1 0
3 1 1 0
4 0 0 1
5 1 0 1
6 0 1 1
7 1 1 1
(Reset) 0 0 0

States of 3 Bit Asynchronous Up Counter


Timing Graph:

3 Bit Down Counter:

Circuit Diagram-
Observation Table:

Clock Pulse Aout Bout Cout

7 (Initially) 1 1 1
6 1 1 0
5 1 0 1
4 1 0 0
3 0 1 1
2 0 1 0
1 0 0 1
0 0 0 0
(Reset) 1 1 1

States of 3 Bit Asynchronous Down Counter


Timing Graph:

(ii) Modulus Counters-

Counters are sequential logic devices that


are activated or triggered by an external
timing pulse or clock signal. The job of a
counter is to count by advancing the
contents of the counter by
a count with each clock pulse.

Such counters are sequential logic devices that follow a


predetermined sequence of counting states which are triggered by an external clock (CLK) signal. The
number of states or counting sequences through which a particular counter advances before returning once
again back to its original first state is called the modulus (MOD). 

Principle-
Modulus Counters, or simply MOD counters, are defined based on the number of states that the counter will
sequence through before returning back to its original value. For example, a 2-bit counter that counts from
002 to 112 in binary, that is 0 to 3 in decimal, has a modulus value of 4 ( 00 → 1 → 10 → 11, and return
back to 00 ) so would therefore be called a modulo-4, or mod-4, counter. MOD counters have a modulus
value that is an integral power of 2, that is, 2, 4, 8, 16 and so on to produce an n-bit counter depending on
the number of flip-flops used, and how they are connected, determining the type and modulus of the
counter.

Counters can be used for a huge array of applications. They can, for example, be used to count pulses from a
sensor attached to a wheel to count the number of revolutions, which in turn can be used to calculate the
speed of the wheel. Counters also can be used as digital clocks for different purposes.

A) Mod 3 Counter:
Circuit Diagram-

Observation Table-

Clock Pulse Aout Bout

0 (Initially) 0 0
1 1 0
2 1 1
Reset 0 0
B) Mod 5 Counter:

Circuit Diagram-

Observation Table-

Clock Pulse Aout Bout Cout

0 (Initially) 0 0 0
1 1 0 0
2 0 1 0
3 1 1 0
4 0 0 1
(Reset) 0 0 0
C) Mod 5 Counter:

Circuit Diagram-

Observation Table-

Clock Pulse Aout Bout Cout

0 (Initially) 0 0 0
1 1 0 0
2 0 1 0
3 1 1 0
4 0 0 1
5 1 0 1
6 0 1 1
7 1 1 1
8 0 0 1
9 1 0 1
(Reset) 0 0 0
Timing Graph-

Results:
1) Asynchronous Counters:
 3 Bit Up Counter is verified through transient output analysis and truth
table.
 3 Bit Down Counter is verified through transient output analysis and truth
table.

2) Modulus Counters:
 Studied the truth table of MOD 3 and verified it.
 Studied the truth table of MOD 5 and verified it.
 Studied the truth table of MOD 10 and verified it.

You might also like