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Probable Interview Questions for DFT Engineer position at Nvidia & Intel
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vishalmatam
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Oct 29, 2010

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Oct 29, 2010  #1

Hello Friends,

V
I'm Vishal. I have applied for many full-time entry New College Graduate positions at Intel , Nvidia etc. I have already
seen other threads where people have asked probable interview questions about DFT in general.

I would like to know interview questions related to DFT, ASIC Design Flow, how Perl can be helpful in design automation
vishalmatam ( if possible some Q & A related to Perl ), interview questions based on VHDL/Verilog - like the usage of assertions,
Newbie level 3 anything which is really important, Timing analysis, different commercial ATPG techniques , which is better etc

Joined: Sep 11, 2010

Also, additional tips regarding how to tackle a technical interview would be greatly appreciated.
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---------- Post added at 18:29 ---------- Previous post was at 17:55 ----------

HI - Can some one explain in detail ( simple words please ) about assertion based verification ?

Oct 29, 2010  #2

do you already worked?

R
read book and made your try is the best, as good training when you done your master school.

trijeth and Basu_Gouda
rca
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Oct 29, 2010  #3

I haven't worked at a company yet...I have the basic knowledge , but it's always better to discuss in an excellent forum

V
like this , where experienced people can give you advice , coz they work in the VLSI industry...

vishalmatam
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Oct 30, 2010  #4

I'm agree with you, you could find some good advise, but you need to know quite well the flow the different implication

R
of differents files inputs to be able to catch the different solution provides in this kind of forum.

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Dec 13, 2010  #5

1) What is the DFT process for an ASIC?

C 2) What factors that affect scan chains?

3) What is the purpose of DFT?

ConradATPG
Member level 1 4) What are the major cost factors of DFT and what do you do to lower costs?

Joined: Dec 1, 2010

5) What are the errors/problems that occur during the DFT process and how do you resolve them?

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8) Given a small circuit (see diagram) how would you generate tests for it?

Provide answers and I will grade them.

designandtest

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Aug 24, 2012  #6
https://www.edaboard.com/threads/probable-interview-questions-for-dft-engineer-position-at-nvidia-intel.191843/ 2/5
22/09/2021, 20:44 Probable Interview Questions for DFT Engineer position at Nvidia & Intel | Forum for Electronics

Hi,

T
I am also very interested in this subject, but the reference is very limited. You can share documents as well as
experience?

Thanks!
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Aug 24, 2012  #7

the042011 said: 

M Hi,

I am also very interested in this subject, but the reference is very limited. You can share documents as well as experience?

maulin sheth Thanks!

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Which type of reference you required.Because I think,For Basics of DFT, Lots of material available on net.
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Aug 26, 2012  #8

maulin sheth said: 

T Which type of reference you required.Because I think,For Basics of DFT, Lots of material available on net.

the042011 If you want to get more materials that related to this topic, you can visit: Intel interview questions

Newbie level 2 Best regards.

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Aug 28, 2012  #9

Hai vishal,

V
I am working as a physical Design Engineer in an MNC.. I will share some of the question which I faced in Interview..

Usage of perl as a Physical Design Engineer:-

Some Cases we will have some repeated works needs to done manually EX:- getting some pin names from a file(ex:-cdl)

vijayR15
Full Member level 3 I am stong in perl, tcl and skill.., As a Physical Design Engineer u should concentrate more on tcl.. Because we can use
tcl code inside tools,

Joined: Dec 10, 2011

Messages: 173
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2. pattern matching example?

We will normally
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22/09/2021, 20:44 Probable Interview Questions for DFT Engineer position at Nvidia & Intel | Forum for Electronics

But regarding Physical Design we will get more question

2.Physcial Design Questions:-

1.What will happen in DFT?

2.what is mux insertion?

DFT is a part of PD.. Timimg analysis is more important in PD.

Basic ques;-

1.Pd flow

2.set up time

3.hold time

4.cell delay

5.core utilization

6.Mention some technology?

etc...

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