_ YAMAHA Si YM3014B Serial Input Floating D/A Converter (DAC-SS) = OUTLINE YM3014B: DAC-SS (hereinafter referred to.as DAC) isa floating D/A converter with serial input for single channel. It can generate analog output (dynamic rar 16 bits) having 10-bit mantissa section and 3-bit exponent section on the basis of input di al signal = FEATURES © An external buffer operational amplifier is provided to obtain analog output easily © A wide dynamic range with 16 bits. ‘© Sample holding circuit is unnecessary © It is possible to reduce noise and the distortion rate of high harmonic and to obtain good temperature characteristics. © It is produced by the monolithic process with high precision thin film resistance and CMOS and contained in a 8 pin plastic DIL package. = TERMINAL DIAGRAM evans eymHe-F Voe be Voo wp resurr > shine) (wos bre ToBUrF Re voso es Bene) on noy]s a FreNowvss) Loa eno rere fines e Sod: fig crock (nc) 6 9 Fine) O} ‘YM30148 CATALOGYAU YM3014B = BLOCK DIAGRAM al CLOCK LOAD - 7 ———- sD SHIFT REGISTER LATCH a Tt 1opiT pac | BIAS-R aml ‘ ANALOG [- DECODER J+) “oh jl To BUFF MP (aNALOS OUT) = = DESCRIPTION OF TERMINAL FUNCIOTNS PIN NO SYMBOL NA\ ‘SDIP [16SOP) EUNCTIONS tft ‘Vop Reference power sourch on the high potential sie. ail > | 2 | ToBUFF Analog output from DAC is input into a buffer operational amplifie 3 | 4 [| VOAD Generar internal sigs to th the seri data hy we of tatingedge. | sf 9 Serial input of the converted digital sigan | 5 [10 | CLOCK | Clock (#1) to operate the sift register and timing generator, 6 [2] vss Power source on the low potential sie (GND). 7/14 Ro High precision 1/2 VDD voltage generated inside ofthe nit is obtained at | is terminal Its added to 8 pin through the buffer operational amplifier 3 | 16 MP Exponential analog value is obtained by S signal with reference to potential given to | MP. Normally it s biased to 1/2VbD.YM3014B VAIMUATIA = DESCRIPTION OF FUNCTIONS 1. Relationship between Digital Input Data and Analog Output Voltage onversion at 16-bit time by YM3014B, the first 3-bit data among the 16-bit serial data is through D, ) is input into the 10-bit DAC B to constitute the mantissa section of analog output. The remaining ‘To perform one processed as invalid data in the DAC. The next 10 bit data ( section as the MSB data from the L 3-bitdata(S, through S, )isinput into the 2 analog shift section to constitute the exponent section of analog output For example, when the basic circuit is used, output voltage is as follows. Do2-? #2719)2-N Vour = 1/2 Vop + 1/4 Vop (— 1 +Dy +Ds27! ++ N=S,2? +,2 +S, S; =, = So = 0: not allowed. ‘That is, it has the maximum aplitude of * 1/4Vbp and the minimum amplitude of £ 1/4Vpp 2 with 1/2Vbp potential in the center. 2. Operation in the DAC Digital input data is taken into the shift register through SD terminal in synchronous with the clock rise. Latch signal is generated in the timing circuit by use of the trailing edge of LOAD. By this latch signal, the serial data of Do through Dy and Sp through Sz is latched, which drives the 10-bit DAC section and the analog shift section, respectively, to start conversion Its analog output is obtained at the terminal “TO BUTT”. It can be output through an adequate buffer operational amplifier. 3, Summary of Operation @ As shown in Fig. 3, Timing diagram, coincide the trailing edge of LOAD with the timing of the S, rear end of the SD signal. “H” time of LOAD requires more than one bit time © Conversion at the bit time other than 16 bits is possible by increasing or d bit number part. -asing the invalid = EXAMPLE OF BASIC CIRCUIT = —1] Voo PD : ee J tog AB wo hie § MPT Oo—1] Loan © vss) p o—1]s0 cocoYARRA YM3014B = ELECTRICAL CHARACTERISTICS 1, Absolute Maximum Rating ITEM Supply voltage igh level input voltage Low level input voltage ‘Storage temperature [Ambient operating temper RATING | UNIT 0354150) V OGRE SAV: v °C 2. Recommended Operation Conditions ITEM Supply voltage Input signal voltage [ Ambient operation temperature SYMBOL MIN. STD. MAX. Vpp $4.75 so | 100 vss o cLock sD ° vop LOAD Ta o | 70 3. D.C. Character 1TEM ‘High level input voltage MEASUREMENT CONDITIONS | MIN. | STD. | MAX. Sov i Low level input voltage 5.0V Input current Power curr \Vpb= 10.0V 5.0V input capacity 4, AC Characteristics a © Clock Frequency igh level ‘Rise time CONDITIONS | _ MIN STD. MAX. 0.65 100 Breaking ine © Data Setup time R [Breaking time time 100 asYM3014B YAMATIA 5. DAC Characteristics maw Syawot | CONDITIONS [MIN | wax | UNIT Max. ouputampliwde |Your i Resolution - Bit Setting ime fom Tol Untorton teat] THD Voo= Tone high harmonic | | revel oa Noi Cc Temperature characterise Output woge Total distortion rate of | S ppm/°C | high hermonic ‘Timind Diagram SD, LOAD CLOCK z 1 Data timing Fig. 2 Input data clock timing = DAC INPUT SIGNAL rc ° > 5 cLock ol [sp U LATCH CONVERT To BUFF ANALOG Fig. 3. YM3014B timingYAMARIA YM3014B = OUTER DIMENSION DRAWING YM3014B boca o Fatt: sore] § gusoag (UNIT) Son YM3014B-F i caiunall (lead thickness) pe O1540.10 3 (UNIT) Te specifications of this product are subject to improvement changes without prior notice YAMAHA CORPORATION ‘AGENCY YAMAHA CORPORATION. Adress inquiries: Semiconductor Sales Department iead fice 203, Matsunokiims, Toyooks murs, inaegum, Srizki-ken, 4340 lecrnicEgupment snes section ‘Tel OSHo2-18 Pan 0539.62 5054 feTokyo rfice 2517-11, Takano, Minato, Tokyo, ios ‘TELL SAB8-5431 Fay. 02 Sab S088 moss Office 3512, Minams Sena, Chao, sa City, Ona, 53 ‘Shins Pars Bug. 4 Telecast 700 Ba 06252615 MUSA Otfice YAMAHA Systems Technolog. To Century Center Court San one, CAVSH12 Copying prohibited © 1987 YAMAHA CORPORATION 0.3K-0325 @ Printed in Japan 94.3,IMPORTANT NOTICE 1. Yamaha reserves the right to make changes to its Products and to this document without notice. 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