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General Description
N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic
feedback, monolithically integrated in Smart SIPMOS technology. Providing embedded protective functions.
+ V bb 3
Voltage Overvoltage Current Gate
source protection limit protection
V Logic
OUT
Voltage Charge pump Limit for
unclamped 5
sensor Level shifter ind. loads Temperature
Rectifier sensor
2 IN
Open load
Load
ESD Logic detection
4 ST
Short circuit
detection
GND PROFET
1
Signal GND Load GND
1) With external current limit (e.g. resistor RGND=150 Ω) in GND connection, resistors in series with IN and ST
connections, reverse load current limited by connected load.
Semiconductor Group 1 of 16 2003-Oct-01
BTS 410 E2
Pin Symbol Function
1 GND - Logic ground
2 IN I Input, activates the power switch in case of logical high signal
3 Vbb + Positive power supply voltage,
the tab is shorted to this pin
4 ST S Diagnostic feedback, low on failure
5 OUT O Output to the load
(Load, L)
Thermal Characteristics
Parameter and Conditions Symbol Values Unit
min typ max
Thermal resistance chip - case: RthJC -- -- 2.5 K/W
junction - ambient (free air): RthJA -- -- 75
SMD version, device on PCB5): -- 35 --
2) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins, e.g. with a
150 Ω resistor in the GND connection and a 15 kΩ resistor in series with the status pin. A resistor for the
protection of the input is integrated.
3) RI = internal resistance of the load dump test pulse generator
4) VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
5) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb
connection. PCB is vertical without blown air.
Semiconductor Group 2 2003-Oct-01
BTS 410 E2
Electrical Characteristics
Parameter and Conditions Symbol Values Unit
at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max
Operating Parameters
Operating voltage 6) Tj =-40...+150°C: Vbb(on) 4.7 -- 42 V
Undervoltage shutdown Tj =25°C: Vbb(under) 2.9 -- 4.5 V
Tj =-40...+150°C: 2.7 -- 4.7
Undervoltage restart Tj =-40...+150°C: Vbb(u rst) -- -- 4.9 V
Undervoltage restart of charge pump Vbb(ucp) -- 5.6 6.0 V
see diagram page 13
Undervoltage hysteresis ∆Vbb(under) -- 0.1 -- V
∆Vbb(under) = Vbb(u rst) - Vbb(under)
Overvoltage shutdown Tj =-40...+150°C: Vbb(over) 42 -- 52 V
Overvoltage restart Tj =-40...+150°C: Vbb(o rst) 40 -- -- V
Overvoltage hysteresis Tj =-40...+150°C: ∆Vbb(over) -- 0.1 -- V
Overvoltage protection7) Tj =-40...+150°C: Vbb(AZ) 65 70 -- V
Ibb=4 mA
Standby current (pin 3) Tj=-40...+25°C: Ibb(off) -- 10 15 µA
VIN=0 Tj= 150°C: -- 18 25
Leakage output current (included in Ibb(off)) IL(off) -- -- 20 µA
VIN=0
Operating current (Pin 1)8), VIN=5 V, IGND -- 1 2.1 mA
Tj =-40...+150°C
6) At supply voltage increase up to Vbb= 5.6 V typ without charge pump, VOUT ≈Vbb - 2 V
7) Meassured without load. See also VON(CL) in table of protection functions and circuit diagram page 7.
Semiconductor Group 3 2003-Oct-01
BTS 410 E2
Parameter and Conditions Symbol Values Unit
at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max
Protection Functions9)
Initial peak short circuit current limit (pin 3 to 5)10), IL(SCp)
( max 450 µs if VON > VON(SC) )
Tj =-40°C: 9 -- 23 A
Tj =25°C: -- 12 --
Tj =+150°C: 4 -- 15
Repetitive overload shutdown current limit IL(SCr)
VON= 8 V, Tj = Tjt (see timing diagrams, page 11) -- 5 -- A
Short circuit shutdown delay after input pos. slope
VON > VON(SC), Tj =-40..+150°C: td(SC) -- -- 450 µs
min value valid only, if input "low" time exceeds 60 µs
Output clamp (inductive load switch off)
at VOUT = Vbb - VON(CL) IL= 40 mA, Tj =-40..+150°C: VON(CL) 61 68 73 V
IL= 1 A, Tj =-40..+150°C: -- -- 75
Short circuit shutdown detection voltage
(pin 3 to 5) VON(SC) -- 8.5 -- V
Thermal overload trip temperature Tjt 150 -- -- °C
Thermal hysteresis ∆Tjt -- 10 -- K
Reverse battery (pin 3 to 1) 11) -Vbb -- -- 32 V
Diagnostic Characteristics
Open load detection current IL (OL) mA
(on-condition) Tj=-40 ..150°C: 2 -- 150
12) If a ground resistor RGND is used, add the voltage drop across this resistor.
Truth Table
Input- Output Status
level level 412 410 410 410 410
B2 D2 E2/F2 G2 H2
Normal L L H H H H H
operation H H H H H H H
Open load L 13) L H H H L
H H H L L L H
Short circuit L L H H H H H
to GND H L L L L H L
Short circuit L H L H H H L
to Vbb H H H H (L14)) H (L14)) H (L14)) H
Overtem- L L L L L L L
perature H L L L L L L
Under- L L L15) L 15) H H H
voltage H L L15) L15) H H H
Overvoltage L L L L H H H
H L L L H H H
L = "Low" Level X = don't care Z = high impedance, potential depends on external circuit
H = "High" Level Status signal after the time delay shown in the diagrams (see fig 5. page 12...13)
13) Power Transistor off, high impedance, versions BTS 410H, BTS 412B: internal pull up current source for
open load detection.
14) Low resistance short V to output may be detected in ON-state by the no-load-detection
bb
15) No current sink capability during undervoltage shutdown
+5V V
Z2
R IN
IN
R ST(ON)
ST Logic
ST
R ST
ESD- V
Z1 PROFET
ZD
GND GND
R GND
ESD-Zener diode: 6 V typ., max 5 mA;
RST(ON) < 250 Ω at 1.6 mA, ESD zener diodes are not Signal GND
to be used as voltage clamp at DC conditions. VZ1 = 6.2 V typ., VZ2 = 70 V typ., RGND= 150 Ω, RIN,
Operation in this mode may result in a drift of the zener RST= 15 kΩ
voltage (increase of up to 1 V).
Open-load detection
Short circuit detection ON-state diagnostic condition: VON < RON * IL(OL); IN
Fault Condition: VON > 8.5 V typ.; IN high high
+ V bb + V bb
V
ON
VON
ON
OUT
V
Z
GND disconnect
VON
3
Vbb
IN
OUT
2
GND PROFET PROFET OUT
5
ST
4
VON clamped to 68 V typ. GND
V V V 1 V
bb IN ST GND
Any kind of load. If VGND > VIN - VIN(T+) device stays off
Due to VGND >0, no VST = low signal available.
S 3 1000
high Vbb
IN
2
PROFET OUT
5 D
ST
4 100
GND
1
V
bb
10
If other external inductive loads L are connected to the PROFET,
additional elements like D are necessary.
1
1 2 3 4 5 6
IL [A]
D=
0.5
0.1 0.2
0.1
0.05
0.02
0.01
0
0.01
1E-5 1E-4 1E-3 1E-2 1E-1 1E0 1E1
tp [s]
16) Latch except when Vbb -VOUT < VON(SC) after shutdown. In most cases VOUT = 0 V after shutdown (VOUT ≠
0 V only if forced externally). So the device remains latched unless Vbb < VON(SC) (see page 4). No latch
between turn on and td(SC).
17) With latch function. Reseted by a) Input low, b) Undervoltage
18) No auto restart after overvoltage in case of short circuit
19) Low resistance short V to output may be detected in ON-state by the no-load-detection
bb
IN
IN
t
t d(ST)
d(bb IN) ST
V
bb
*)
V
OUT
V
OUT
A
IL
ST open drain I L(OL)
t
t
A *) if the time constant of load is too large, open-load-status may
in case of too early VIN=high the device may not turn on (curve A) occur
td(bb IN) approx. 150 µs
IN
IN
ST
ST
VOUT
V
OUT td(SC)
I
L
I
L
t
t
td(SC) approx. -- µs if Vbb - VOUT > 8.5 V typ.
IN
IN
ST
IL
I L(SCp)
IL(SCr)
V
OUT
T
J
ST t
t
IN
IN
t
ST d(ST)
ST
V
OUT
V OUT
I
L
open
IL
**)
t
t
IN
t t
d(ST OL1) d(ST OL2)
ST
off-state
on-state
off-state
V
bb(over)
V
OUT
V V
bb(u rst) bb(o rst)
V
bb(u cp)
normal open normal V
I bb(under)
L
V bb
td(ST OL1) = tbd µs typ., td(ST OL2) = tbd µs typ Figure 7a: Overvoltage:
IN
Vbb V ON(CL) Vbb(over) V bb(o rst)
V
bb
V Vbb(u cp)
bb(under)
V V
bb(u rst) OUT
V OUT
ST
t
ST open drain
IN
Vbb
V bb(o rst)
IL
ST
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