HAT2020R

Silicon N Channel Power MOS FET

High Speed Power Switching

ADE-208-439 J (Z)
11th. Edition
February 1999

Features

• Low on-resistance
• Capable of 4 V gate drive
• Low drive current
• High density mounting

Outline

SOP–8
5
7 6
8

4
3
5 6 7 8 1 2
D D D D

4
G
1, 2, 3 Source
4 Gate
5, 6, 7, 8 Drain
S S S
1 2 3
HAT2020R

Absolute Maximum Ratings (Ta = 25°C)

Item Symbol Ratings Unit
Drain to source voltage VDSS 30 V
Gate to source voltage VGSS ± 20 V
Drain current ID 8 A
Note1
Drain peak current I D(pulse) 64 A
Body-drain diode reverse drain current I DR 8 A
Note2
Channel dissipation Pch 2.5 W
Channel temperature Tch 150 °C
Storage temperature Tstg – 55 to + 150 °C
Note: 1. PW ≤ 10µs, duty cycle ≤ 1 %
2. When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW≤ 10s

Electrical Characteristics (Ta = 25°C)

Item Symbol Min Typ Max Unit Test Conditions
Drain to source breakdown voltage V(BR)DSS 30 — — V I D = 10 mA, VGS = 0
Gate to source breakdown voltage V(BR)GSS ± 20 — — V I G = ± 100 µA, VDS = 0
Gate to source leak current I GSS — — ± 10 µA VGS = ± 16 V, VDS = 0
Zero gate voltege drain current I DSS — — 10 µA VDS = 30 V, VGS = 0
Gate to source cutoff voltage VGS(off) 1.0 — 2.0 V VDS = 10 V, I D = 1m A
Static drain to source on state RDS(on) — 0.020 0.028 Ω I D = 4 A, VGS = 10 V Note3
resistance RDS(on) — 0.030 0.050 Ω I D = 4 A, VGS = 4 V Note3
Forward transfer admittance |yfs| 7 11 — S I D = 4 A, VDS = 10 V Note3
Input capacitance Ciss — 780 — pF VDS = 10 V
Output capacitance Coss — 560 — pF VGS = 0
Reverse transfer capacitance Crss — 240 — pF f = 1MHz
Turn-on delay time t d(on) — 35 — ns VGS = 4 V, ID = 4 A
Rise time tr — 240 — ns VDD ≅ 10 V
Turn-off delay time t d(off) — 50 — ns
Fall time tf — 100 — ns
Body–drain diode forward voltage VDF — 0.8 1.3 V IF = 8 A, VGS = 0 Note3
Body–drain diode reverse t rr — 55 — ns IF = 8 A, VGS = 0
recovery time diF/ dt = 20 A/µs
Note: 3. Pulse test

2
 HAT2020R

Main Characteristics

Power vs. Temperature Derating Maximum Safe Operation Area

4.0 100
10 µs 100 µs
Test Condition :
When using the glass epoxy board 30 1
Pch (W)

PW m
s

I D (A)
(FR4 40x40x1.6 mm), PW < 10 s
3.0 10 DC =
10
Op m
er s
3 at
ion

Drain Current
Channel Dissipation

(P
1 W
2.0 < Note
10 4
Operation in s)
0.3 this area is
limited by R DS(on)
1.0 0.1

0.03 Ta = 25 °C
1 shot Pulse
0.01
0 50 100 150 200 0.1 0.3 1 3 10 30 100
Ambient Temperature Ta (°C) Drain to Source Voltage V DS (V)

Note 4 :
When using the glass epoxy board
(FR4 40x40x1.6 mm)

Typical Output Characteristics Typical Transfer Characteristics

20 20
10V
6V 3.5 V V DS = 10 V
16 5V Pulse Test
16
(A)
I D (A)

Pulse Test
4.5 V
ID

12 4V 12
Drain Current

Drain Current

8 3V 25°C
8
Tc = 75°C
–25°C
4 4
VGS = 2.5 V

0 2 4 6 8 10 0 1 2 3 4 5
Drain to Source Voltage V DS (V) Gate to Source Voltage V GS (V)

3
HAT2020R

Drain to Source Saturation Voltage vs. Static Drain to Source on State Resistance
Gate to Source Voltage vs. Drain Current
0.10 0.5
V DS(on) (V)

Drain to Source On State Resistance

R DS(on) ( Ω )
Pulse Test Pulse Test

0.08 0.2

0.1
Drain to Source Voltage

0.06
ID=2A 0.05
VGS = 4 V
0.04
0.02
1A 10 V
0.02
0.5 A 0.01

0.005
0 2 4 6 8 10 0.2 0.5 1 2 5 10 20
Gate to Source Voltage V GS (V) Drain Current I D (A)

Static Drain to Source on State Resistance Forward Transfer Admittance vs.

vs. Temperature Drain Current
0.10 50
Static Drain to Source on State Resistance

Forward Transfer Admittance |yfs| (S)

R DS(on) ( Ω)

Pulse Test
0.08 20
Tc = –25 °C
10
25 °C
0.06
I D = 0.5 A, 1 A, 2 A 5
0.04 V GS = 4 V 75 °C
2

0.02 0.5 A, 1 A, 2 A
1 V DS = 10 V
10 V
Pulse Test
0 0.5
–40 0 40 80 120 160 0.2 0.5 1 2 5 10 20
Case Temperature Tc (°C) Drain Current I D (A)

4
 HAT2020R

Body–Drain Diode Reverse Typical Capacitance vs.

Recovery Time Drain to Source Voltage
500 10000
VGS = 0
Reverse Recovery Time trr (ns)

f = 1 MHz
200 3000

Capacitance C (pF)
100 1000 Ciss
Coss
50 300
Crss
20 100

10 di/dt = 20 A/µs 30
V GS = 0, Ta = 25°C
5 10
0.2 0.5 1 2 5 10 20 0 10 20 30 40 50
Reverse Drain Current I DR (A) Drain to Source Voltage V DS (V)

Dynamic Input Characteristics Switching Characteristics

50 20 1000
I D= 8 A
V GS (V)
V DS (V)

500
40 V DD = 5 V 16
Switching Time t (ns)

10 V tr
25 V 200
Gate to Source Voltage
Drain to Source Voltage

30 12
V DS tf
100
V GS
t d(off)
20 8
50
t d(on)

10 V DD = 25 V 4
20 V GS = 4 V, V DD = 10 V
10 V
5V PW = 3 µs, duty < 1 %
0 10
0 8 16 24 32 40 0.2 0.5 1 2 5 10 20
Gate Charge Qg (nc) Drain Current I D (A)

5
HAT2020R

Reverse Drain Current vs.

Souece to Drain Voltage
20
Pulse Test

Reverse Drain Current I DR (A)

16

12

V GS = 0 V
8
5V

0 0.4 0.8 1.2 1.6 2.0

Source to Drain Voltage V SD (V)

Normalized Transient Thermal Impedance vs. Pulse Width

10
Normalized Transient Thermal Impedance
γ s (t)

D=1
1

0.5
0.2
0.1
0.1
0.05
θ ch – f(t) = γ s (t) • θ ch – f
0.01
0.02 θ ch – f = 83.3 °C/W, Ta = 25 °C
0.01 When using the glass epoxy board
(FR4 40x40x1.6 mm)

PW
0.001 ulse PDM D=
tp T
ho
1s PW
T
0.0001
10 µ 100 µ 1m 10 m 100 m 1 10 100 1000 10000
Pulse Width PW (S)

6
 HAT2020R

Switching Time Test Circuit Switching Time Waveform

Vin Monitor Vout
Monitor
90%
D.U.T.
RL
Vin 10%

Vin V DD Vout 10%

50Ω 10%
4V = 10 V

90% 90%

td(on) tr td(off) tf

7
HAT2020R

Package Dimensions

Unit: mm

5.0 Max

8 5

4.0 Max
1 4
1.75 Max 6.2 Max

0.25 Max
0 – 8°
1.27 Max
0.25 Max

1.27

0.51 Max

0.15
Hitachi code FP–8DA
0.25 M EIAJ —
JEDEC MS-012AA

8
Cautions

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received the latest product standards or specifications before final design, purchase or use.
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contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
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traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
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failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
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Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.