Clock Generator Driver/Driver for MN3200 Series BBD MN3102 MIN3102 CMOS CLOCK GENERATOR/DRIVER FOR LOW VOLTAGE OPERATION BBD 1 General desori The MN3102 is @ CMOS LSI generating two phase clock signal of low output impedance necessary to drive MN3200 series low voltage operation BBD. Voc power supply circuit is builtin exclusively used for the MIN3200 series BBD" and most suitable Veg voltage can be obtained when the MN3102 is used with the same supply voltage as BBD. Self-oscillation is enabled by external capacitors and resistors and oscillation drive is possible by the separate excita tion oscillation Clock signal frequency is 1/2 of oscillation freguency. + 44n3200 Serie 880 'MIN3204, MINGZOS, MNS206, MN3207, MN3208, MNN3208, N9210, sata Mi Features Direct driving capability to 4096-stage low voltage BBD. Self oscillation and separate exitation are abled. Two phase clock (Duty: 1/2) output. Vee voltage generator for low voltage BBD. Single supply source: 4 ~ 10V. Blead dual-in-line plastic package. eeccee Block Diagram Unit: mm finch) 7082 0 {8-Le0d Dua-in-Line PasticPacksge —T05-Clock Generator Driver/Driver for MN3200 Series BBD MN3102 Wi Absolute Maximum Ratings (Ta = 25°C) Trem ‘Symbol Ratings Unit Drain Supply Voltage Veo =0.3-+12 I v Input Output Terminal Voltage Vi Vo. =0.3~Voo+0.3 I v Power Dissipation Po 200 mW Operating Temperature Tope = 10~+70 c ‘Storage Temperature Tague x= +105 c Operating Condition (Ta = 25°C) Trem Symbol Condition Min [Te | Won | Ua Drain Supply Vote Veo | GNM OV aia amo Electrical Characteristics (Ta = 25°C, Voo = 5V, GND = OV) item Synbor Condition Min [Te | Mex [une Drain Sopa Curent Too__| No load 0.5 7A Total Power Dissipation [Prot ~ | Glock output 40kHz 2.5 mW OX1 Input Terminal _ ~ Input Voltage “H Level Ve Ve=t] | veo [V Input Voltage “L” Level Ve ~ o | 1 a Input Leakage Current ry I [3% | ua {5X2 Output Terminal Ouiput Current “A” Level | Tons os vA Output Curent "7 Level | low O4 A Output Leakage Current Level | tov 30) | uA Output eskane Current "¥” Loe! | aw om arial XB Output Terminal ‘Output Current “H” Level Ton _| (ovr att mA Output Current “L" Level Flow 1 mA ‘Output Leakage Current “L” Level | lov | 3 | HA utp Leakage Curent 7H” Level | Thonn mL #a ‘TPH, CF2 Output Terminal Opa Curent “HW” Level | Tova 5 oA ‘Output Current “L” Level | low | mA Output Leake Carer “t" bevel | hou [a Output Leakoe Curent” Level | an ma Vas jour Output Terminal Vao Output Volage "i [Vavoon] = oo] [eva “1 This terminal generates Veg voltage exclusively applied for low voltage operation BBD manufactured by Matsushita Electronics Corporation, Therefore, sometimes it might not applicable for the device other than Veg voltage of low power operation of BBD by MEC. Vig jour) changes in the following formula depending on the value of Voo. Veo ioun = 14/18 Vo.Clock Generator Driver/Driver for MN3200 Series BBD MN3102 WW Terminal Assignments I Terminal Description smo | v0. ra Nam Desestion eo joo | Pee” | Yoo old onp—|3 sion! with the rlaton st 2 «| {frequency wth duty 172 2nd or: I [Uot me factanon avery. > | ono | Pomesszei [gaan | Somnath a | om 0 | cer eure 2] Outs ac sas with he trclconr | woman ana nave | BalRuecon | Sor Dy and 6 | ow ° Canora | tact ee | O35 oe be al oon ee Veg wine | 4670 w opt, (Yoo = 5 fos.oun oat” | Veawoun = NV b0 Example of Oscillation Circuit ‘Ozatstion cireut of the MN3102 is composed of 4-sta9@ inverter and ocillation frequency is defined by the CF time constant Following i an example of C, R Figure 1 shows fep"*—R cheracteristis, = RUG) [0 Gono ral tent Crate | Seed | wm ~1400 | 10 ~700 Examte [ski | 100, 3.2260 Example (3) ‘5k~1M 20 | 3.0 1,5~130 * clock output frequency of CPt or CP2 erminas ** Orcillation frequency of OX%, OX2 and OX. fop-R ry 5004 300% 100% sok aos 1a z si 3H Te OT 0k 100K 50K 1M 2M Resistance R(2) Figure 1 Examole of Clock Oxeillation Frequency Characteristic Tor ‘PanasonicClock Generator Driver/Driver for MN3200 Series BBD. MN3 102 Mi The maximum clock fraquency ‘The upper limit of the value of clock frequency is determined depending on the load capacitance and power consump: tion ‘The permissible dissipation for this LSI is: Po = 200mW. If the lock frequency or the load capacitance is increased, the power consumption will be increased, (Refer to Figure 2.) Accordingly, in order to use the MN3102 with dissipation less than the permissible value, it is necessary to select adequate values for the clock frequaney and load capacitance. Figure 3 shows an example of the dependence of the maximum clock frequency in Po = 200mW on the foad capaci- tance. if Vpo is less than 7V, the dissipation will not exceed the permissible value. (Provided that the BBD equivalent to less than 4096 steps in used.) Pp—fep 00 Vor=av zm 300} tec pecne = gm nator 300m an £ - z 2 paar Seal % so IeEREOK ob. 200081 ay 2 (tartar E> wang) Ee fana207 <1 5 $20) eI oor Ban 3 No load z 1d £ 2 S soos + iy 3 4 Von =8V (load C,) 00% é3 : Ff Voo=3¥ toad C.) 2 _o Voo=10V (load Cy) pow arson 1M © oo 13k 10K 30k 200K TOOK soy be he dy Clock frequency fer (H2) crea ph ORT WERT” WORT Cock frequency fcr (H2) Figure 2 Example of the dependence of tbat pices Power consumption on the lock frequency. Figure 3 Example of the dependence of the maximum clock frequency fon the load capacitance in the ower consumption of 200mW. Panasonic —108—