Energy Efficient Biopotential Acquisition Unit for
Wearable Health Monitoring Applications
Wazir Singh, Yatharth Gupta, Paritosh Jivani and Sujay Deb
Department of Electronics and Communication Engineering
Indraprastha Institute of Information Technology, New Delhi, India
Email: {wazirs, yatharth15119, paritosh15103, sdeb}@iiitd.ac.in
Abstract— This paper presents a biopotential acquisition unit
with an instrumentation amplifier and analog-to-information
converter for wearable health monitoring applications. The
instrumentation amplifier defines the quality of the acquired
biopotential signals. At the heart of the system is an Analog to
Information Converter (AIC) to enables the random under-
sampling operation. AIC is used to digitize the output of the
biopotential instrumentation amplifier. Both instrumentation
amplifier and AIC are implemented in 65nm CMOS technology.
The simulation results show that the proposed instrumentation
amplifier has a CMRR of 100.18 dB and noise of 35.89nV/sqrt
(Hz). AIC achieves a sampling rate of 0.5 KS/s, an ENOB 9.54
bits, FOM 187 fj/conv-step and consumes 69.66 nW from 1 V
power supply.
Keywords— Instrumentation Amplifier, CMRR, Analog-to-
Information Converter, Charge Redistribution DAC, CMOS
Technology
I. INTRODUCTION
Significant development has been made in the field of
Biomedical Electronics since past few years. Equipment
Design for Biomedical Data Acquisition and Analysis has
gained the worthy attention of Researchers. Biopotential
acquisition unit plays very important role as a front-end design
for such equipment. The design contains Pre-Amplifier,
Instrumentation Amplifier, filters and Analog to digital
converter (ADC) which needs to be integrated on single chip
to provide SoC (System-on-Chip) solution. Most hardware
development of fully integrated, biopotential acquisition
systems to-date, is still in the proof-of-concept stage. To be
ready for practical use, the trade-offs between performance,
power consumption, device size, robustness and compatibility
need to be carefully taken into account [1].
Reliable, long-term biopotential signals monitoring is
critical to the biomedical research and clinical treatment. This
has a few challenges of its own like biomedical signal contains
very small amplitude in the range of hundreds of micro to
some milli volts and frequency variations around tens of hertz
with significant interference act like common mode voltage
[2]. To sense such type of low amplitude and frequency signal,
the amplifier should have a good gain along with high
Common Mode Rejection Ratio (CMRR). The design
optimizations of a fully integrated biopotential system with
on-chip data compression is thus highly desired.
978-1-5090-5404-6/17/$31.00 ©2017 IEEE
Fig. 1(a) Biopotential acquisition system
Fig. 1(b) Compressed sensing based biopotential acquisition
system
A possible solution is to use the high CMRR, low noise,
and ultra-low power acquisition unit as shown in Fig. 1. It
incorporates an Instrumentation Amplifier (INA) to amplify
the small biopotential signals provided at the input, an ADC to
convert the biopotential signals into the digital domain ready
for transmission, and a transmitter [3]. Various solutions have
been coined in instrumentation amplifier like configuring the
Operational Amplifier (OpAmp) in a differential mode which
will overcome the issue of low-frequency noise at the input
like white noise and flicker noise which generally occurs in
common mode. One another challenge is low power design to
support stand alone system with a long operational period
which can be done by reducing the MOSFET count and use
low power MOS devices. One popular configuration with such
advantages is instrumentation amplifier which has a good
gain, better input impedance than normal OpAmp and high
CMRR to deliver above desired properties. Following the
conventional design approach is not that advantageous for on
chip design as the implementation of conventional
instrumentation amplifier will lead to many design issues like
large area of resistors on silicon, resistors mismatch leads to
different branch current and also noise associated with a
resistor which is fed back to input signal. Due to a large
number of resistors being used power associated with the
design will increase. To overcome this issue, the design must
have less number of resistors and MOS devices, and a high
common signal rejection [4]. To meet this requirement current
mode operational amplifier is used. This OpAmp is further
used in instrumentation amplifier to increase the common
signal rejection.
337 18th Int'l Symposium on Quality Electronic Design
An ADC is an integral part of any biopotential acquisition
unit. Flash ADCs are used for high-frequency applications
where dissipated power is of secondary importance. The
pipeline, folding and interpolating ADCs are used when
higher resolution than that of flash ADC is required at the cost
of lower speed. Sigma-Delta is preferred for the highest
resolution converters operating at lower speeds. Finally,
successive approximation register (SAR) converters exhibit
the lowest dissipated power with moderate resolution at
relatively lower data rates. To design ultra-low power
acquisition unit, we have explored SAR ADC in this paper.
Here, the Analog-to-Information Converter (AIC) consists of a
SAR ADC with a random clock edge generator.
In this AIC design, charge redistribution Digital-to-Analog
Converter (DAC) is used for area efficiency. Compared to
conventional DAC architecture, a charge redistribution DAC
array internally performs the sample and hold operation.
Therefore, the sample and hold block is not needed in this
implementation. In order to reduce the power consumed by the
DAC, we have employed smaller size capacitors. To reduce
the power consumption further, a dynamic latch type
comparator is incorporated in the design [5].
An elaborate discussion on our proposed biopotential
acquisition unit is given in the following section. The design
of the data acquisition unit is described in section II and basic
building blocks are briefly discussed with simulation results in
section III and Section IV. Simulation results and performance
summary is introduced in section V. Finally, the conclusions
of this work are discussed in section VI.
II. BIOPOTENTIAL ACQUISITION UNIT
A conventional biopotential acquisition system is shown in
Fig. 1(a) and the block diagram for compressed based
acquisition system is shown in Fig. 1(b). The power
consumption (Psys) of the system shown in Fig. 1 (a) is given
by,
Psys = ( PAmp + PADC + JFs R ) (1)
where Psys is the power consumption of the system, PAmp is
the power consumption of instrumentation amplifier, PADC is
the power consumption of ADC, FS is ADC sampling
frequency, R is the number of bits per sample and J is the net
transmission power per bit. JFSR gives transmitter power
consumption [3].
The power consumption (Psys_cs) for compressed sensing
based system is,
M amplifier biomedical signal is connected at Vin+ of OpAmp1
Psys _ cs = PAmp + PAIC + JFs R (2)
N
Here the instrumentation amplifier power consumption is
same for both the cases. For compressed sensing system, a
pseudorandom clock generator (PN) is used to generate
random clock sequence and that adds to total system power. In
this work, PAIC includes that overhead. In addition to this, the
power required to transmit the number of data bits (JFSR in
(1)) has been reduced by a factor of M/N [6].
Vp
c
Vn Vout2
C0 C1
c
Vout1
c c
Fig. 2 Operational Amplifier (OpAmp)
The OpAmp used in the instrumentation amplifier can be
analyzed in four different stages as depicted in Fig. 2. The first
stage is the biasing stage which provides the tail current for
operation of OpAmp in the saturation region. The second
stage is the differential pair with folded cascode configuration
and single-ended output which is used to minimize the
variation of input common mode current and extract the
differential mode biomedical signal. The third stage acts as a
gain stage to provide significant amplification [4]. The fourth
stage is used for output stage with low output resistance and at
the end level shifter use for the dc offset adjustment for the
feedback to the input. The capacitors C0 and C1 used in the
design acts as zeros and cancel out the effect of poles to
provide the compensation for bandwidth stability.
The AIC repeatedly takes M random samples of the N
input signal from instrumentation amplifier which are
digitized with a low power ADC. The input signal is then
reconstructed using Compressed Sensing method [6]. We
effectively replace the Nyquist sampling SAR ADC with SAR
ADC and a pseudorandom clock generator to provide random
under-sampling of the input signal. This reduces the power
consumption of the signal acquisition process and relaxes the
requirements of the ADC by restricting the minimum sample
spacing [7]. We also no longer need to compress the data from
the ADC since it will be directly compressed by the AIC at a
rate of N/M compared to Nyquist. The pseudorandom clock
signal is generated by Linear Feedback Shift Register (LFSR).
The basic building blocks and its implementation in our
biopotential acquisition unit are being discussed in the
following sections.
III. INSTRUMENTATION AMPLIFIER
Fig. 3 shows the configuration of the proposed
instrumentation amplifier. At the input of the instrumentation
and Vin- of OpAmp2. Both OpAmp1 and OpAmp2 are
connected in a feedback configuration, and R1 resistor
connects the output of both the OpAmps. The voltage
difference of input signal is sensed by the OpAmp and it will
generate differential voltage and that difference at the output
will result in current (I1) flow in the R1. Now the same current
should flow in the feedback path of the second stage which
can be configured by properly adjusting the value of the R2
and R3. Because the biomedical signal is so weak, the
environment noise affects the real biomedical signal seriously.
 Fig. 3 Instrumentation Amplifier
transistors area to reduce the noise effectively. We use PMOS
transistors in the critical path of the amplifier to transform its
DC level. It could avoid the noise jamming from p-sub or
flicker noise. Simulation results for differential gain,
common-mode gain and input noise are shown in Fig. 4, 5
and 6 respectively. The compressed sensing based
biopotential acquisition consists of an SAR ADC with random
sampling capability. The power efficiency of AIC can be
maximized by taking advantage of the variable time between
samples. To meet the requirements, we designed a 12-bit AIC
as discussed in next section.
Fig.4 Gain of instrumentation amplifier IV. ANALOG-TO-INFORMATION CONVERTER
Fig. 7 shows the block diagram of the AIC [6]. It consists
of a PN clock generator, a dynamic latch comparator, a SAR
control logic and a capacitive array DAC [9] incorporating a
sample-and-hold function. The PN generator as depicted in
Fig. 8 contains a LFSR to generate the pseudorandom clock
sequence, which is then used to clock the ADC for the
compressed sensing operation. The SAR control logic block
contains a successive approximation register for the binary
search algorithm. The DAC contains a switching network at
the bottom plate of the capacitor array to perform the
conversion and sample and hold function. A single-ended
structure is chosen for less power consumption.
Fig.5 Acm vs Frequency response (for calculating CMRR)

Fig.6 Total input referred noise of instrumentation amplifier

Due to the low-frequency characteristic of flicker noise
especially, flicker noise has a strong dependence on the width
and length of transistors [8], so we have to increase the
Fig. 7 Block diagram of Analog-to-Information Converter
The DAC conversion is accomplished by a sequence of three
operations such as ‘sample mode,' ‘hold mode,' and
‘redistribution mode.' In the sample mode, the top plates of all
capacitors are applied to the input voltage (VCM ) and bottom
plates with VIN . Thus input voltage is sampled on the capacitor
array. During hold mode, switches connect the bottom plates
to the ground, therefore, a charge of –V IN +V CM is stored on
the capacitor array. At the starting of redistribution mode,
digital code determines the status of switches and actual
conversion is performed in this mode. At the beginning of
conversion, D11 is high, so the MSB capacitor is connected to
VREF. At this step, the output voltage of the DAC is given by
Eq. (3),
V REF
V DAC = −V IN + VCM +
2 Spectre. The recorded data from Cadence is executed in
This process continues up to next sample mode operation
and finally at the end of one conversion period, the output
voltage of charge redistribution DAC is given by
V V V V
VDAC= −VIN +VCM + D11 REF
0
+ D10 REF
1
+..+ D1 REF
11
+ D0 REF
2 2 2 212
Fig. 8 12-bit LFSR
Fig.9 Transient response of charge redistribution DAC
Fig.10 Transient response of AIC
The minimum value of the unit capacitor is limited by several
factors including thermal noise, capacitor matching and the
value of the parasitic capacitances or design rules of the
technology [10]. In order to save the power consumption, the
value should be as small as possible. Considering the process
and the resolution mentioned in [10], we selected the unit
capacitance value to be 20fF. The values of the other
capacitors in the capacitor array are defined based on the unit
capacitance. The simulation result of the 12-bit DAC is
depicted in Fig. 9.
V. SIMULATION RESULTS AND PERFORMANCE EVALUATION
In this section, we focus on the circuit simulations to
testify the performance of biopotential acquisition unit. All the
above blocks are simulated in transistor-level by Cadence
(3)
Matlab for calculating the performance(SNDR/SFDR/ENOB).
The INA and AIC are designed and simulated using
65nm CMOS technology. The timing response of the AIC is
depicted in Fig. 10. The output spectrum for a full-scale
179.69 Hz sinusoidal input, at a supply voltage of 1 V and
(4) sampling rate of 0.5 KS/s, is shown in Fig. 11. The signal-to-
noise and distortion ratio (SNDR), spurious free dynamic
range (SFDR), effective number of bits (ENOB) are 59.19 dB,
66.32 dB, FOM 187 fJ/conv-step and 9.54 bits, respectively.
The performance results of the INA and AIC are summarized
in Table I and Table II respectively.
TABLE I. INA PERFORMANCE SUMMARY
Parameter Value
Gain 37.13dB
-3dB frequency 1.389 MHz
CMRR 100.18dB
PSRR 65.07dB
ICMR 850mV
Total output noise 46.32nV/sqrt Hz
voltage (@1KHz)
Total input referred 35.89pV/sqrt Hz
noise (@1KHz)
Fig. 11 AIC output spectrum
 TABLE II. AIC PERFORMANCE SUMMARY fJ/conv-step with power consumption of 69.66 nW from 1 V
power supply. This design will lead to more power efficient
Parameter Value compressed sensing based biopotential acquisition systems. As
Technology 65nm CMOS part of future work, we would like to design a complete
Supply Voltage 1V
compressing sensing based acquisition system around this unit
to record multiple biomedical signals simultaneously..
Resolution 12 bits
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