You are on page 1of 4

3

FETs and BJTs: Comparison of


Parameters and Circuitry

TYPES OF TRANSISTORS
Because solid state RF power transistors now consist of two basic types of de-
vices, namely bipolar junction and field effect, it is appropriate to discuss and
compare their parameters and performance. In certain applications, the bipolar
Buy this file from http://www.download-it.org/learning-resources.php?promoCode=&partnerID=&content=story&storyID=1177
junction transistor (BJT) will without a doubt yield superior performance,
whereas in other areas, a field effect transistor (FET) will do a better job. There
are only two types of BJTs commercially available today. These are based on sil-
icon technology and are either NPN or PNP polarities. PNP transistors (despite
their inferior performance over NPN types) are primarily used in land mobile
communications equipment requiring a positive ground system. All UHF and
higher frequency devices are of the NPN polarity due to their higher mobility of
electrons as majority carriers, which translates to higher f␶ and improved high
frequency power gain.
There are far more types of FETs commercially available for RF power use.
These include a late newcomer, SIT (static induction transistor), which is a ver-
sion of a depletion mode junction FET and the MESFET (metal gate Schottky
FET). The latter is usually made of gallium arsenide and is also a depletion mode
type. Another depletion mode device is the standard junction FET, which is only
practical in low power use for predrivers and mixers, etc. The vertical channel
silicon MOSFET is the most common RF power FET. It comes in a number of
varieties of die structures, each having slightly different characteristics in
RDS(on) and the various capacitances. The vertical channel MOSFET has been
on the market since around 1975, and has seen numerous improvements regard-
ing its performance and manufacturability.
There is also a lateral channel power MOSFET in existence. It consists of a
series of small signal FETs connected in parallel on a single chip. Due to its lat-
eral channel structure, it consumes more die area for a given power rating than
the vertical channel device and, therefore, is less cost effective. However, the lat-
eral FET features extremely low feedback capacitance (CRSS), which results in
increased stability and higher gain at high frequencies. Both of these silicon
MOSFETs are enhancement mode devices, meaning their gates require positive
voltages with respect to the sources in order for the drain-source channel to con-

Buy this file from http://www.download-it.org/learning-resources.php?promoCode=&partnerID=&content=story&storyID=1177


44 Radio Frequency Transistors

duct. Conversely, a depletion mode FET conducts when the gate and source
are at an equal potential, and requires a negative gate voltage for turn off
(depletion).1

COMPARING THE PARAMETERS


One main difference between a BJT and a MOSFET in RF amplifier use is the
need for base/gate bias voltage. A BJT only requires base bias when linear opera-
tion is desired and there is very little difference in its power gain between a bi-
ased (Class A, AB, or B) and an unbiased condition (Class C). In an unbiased
enhancement mode FET, the gate input voltage swing must overcome the gate
threshold voltage to turn the FET “on” with its positive peaks. Some FETs have
their gate threshold voltages specified as high as 6 volts. If the D.C. gate voltage
is brought closer to its threshold level, a smaller voltage swing is necessary to
overcome it. Since in each case the gate-source RF impedance is about the same,
the actual power gain can vary as much as 5 to 6 dB, depending on the initial
Buy this file from http://www.download-it.org/learning-resources.php?promoCode=&partnerID=&content=story&storyID=1177
threshold voltage and the frequency of operation. For linearity, a FET also needs
to be biased to some idle current in Class A or AB operation. The bias source
may be a simple resistor divider since no D.C. current is drawn, whereas a BJT
requires a constant voltage source of 0.65 to 0.70 volts with a current capacity of
IC (peak)/hFE. A summary of specific characteristics of each device type is pre-
sented in Table 3-1. Note that the table focuses only on silicon MOSFETs in the
FET category, and some of the characteristics may not apply to JFETs and other
depletion mode FETs. Similar electrical sizes for each are assumed for the im-
pedance comparison.1–4
Most RF power design engineers accustomed to circuit design with BJTs are
slowly beginning to look at the FET designs and learn about the differences in
parameters and behavior between the two types of semiconductors. Circuit de-
sign with each type is very similar. The same RF design practices, such as
grounding, filtering, bypassing, and creating a good circuit board layout, apply in
each case. Precautions must be taken with each type of device when designed
into a particular application. The FETs are sensitive to gate rupture. Rupture can
be caused by excessive D.C. potential or an instantaneous transient between the
gate and the source. This can be compared to exceeding the voltage rating of a
capacitor, which usually results in a short or leakage. A power FET can be “re-
stored” in some instances by applying a voltage lower than the rupture level be-
tween the gate and the source. It must be at a sufficient current, but not higher
than 1 to 1.5 A to clear the gate short. A higher current would fuse one of the
bonding wires to the area of the short on the die. A number of cells will always
be destroyed, but with larger devices, such as 30 W and higher, no difference in
performance may be noticed.1 Long-term reliability after such an operation may
be jeopardized and is not recommended in cases where very high reliability is re-
quired.

Buy this file from http://www.download-it.org/learning-resources.php?promoCode=&partnerID=&content=story&storyID=1177


FETs and BJTs: Comparison of Parameters and Circuitry 45

Table 3-1 Bipolar Transistor and RF Power MOSFET Characteristics When Used as RF Amplifiers
Characteristic Bipolar MOSFET

Zin, Rs/Xs (2.0 MHz) 3.80 – j2.0 Ohms 19.0 – j3.0 Ohms

Zin, Rs/Xs (150 MHz) 0.40 + j1.50 Ohms 0.60 – j0.65 Ohms

ZOI (Load Impedance) Nearly equal for each transistor,


depending upon supply voltage
and power output.

Biasing Not required, except for linear operation. Required for linear operation. Low
High current (IC/hFE) constant current source, such as a resistor divider,
voltage source necessary. is sufficient. Gate voltage can be varied
to provide anautomatic gain control
(AGC) function.

Linearity Low order distortion depends on Low order distortion worse than with
electrical size of the die, geometry, bipolars for a given die size and geometry.
and hFE. High order intermodulation High order IMD better due to lack of
Buy this file from http://www.download-it.org/learning-resources.php?promoCode=&partnerID=&content=story&storyID=1177
distortion (IMD) is a function of type and ballast resistors and associated
value of emitter ballast resistors. nonlinear feedback.

Stability Instability mode known as half fo Superior stability because of lack of


troublesome because of varactor effect diode junctions and lower ratio of feed-
in base-emitter junction. Higher ratio back capacitance versus input
of feedback capacitance versus input impedance.
impedance.

Ruggedness Usually fails under high current conditions Overdissipation failure less likely, except
(overdissipation). Thermal runaway under high voltage conditions. gFS
and secondary breakdown possible. hFE decreases with temperature. Other failure
increases with temperature. modes: Gate punch through.

Advantages Wafer processing simpler, making Input impedance more constant under
devices less expensive. Low collector- varying drive levels. Better stability, bet-
emitter saturation voltage makes low ter high order IMD, easier to broadband.
voltage operation feasible. Devices and die can be paralleled with
certain precautions. High voltage
devices easy to implement.

Disadvantages Low input impedance with high reactive Larger die required for comparable
component. Internal matching required to power level. Nonrecoverable gate punc-
increase input impedance. Input impedance ture. High drain-source saturation, which
varies with drive level. Devices or die can- makes low voltage, high power devices
not be easily paralleled. less practical.

Buy this file from http://www.download-it.org/learning-resources.php?promoCode=&partnerID=&content=story&storyID=1177


Chapter extract

To buy the full chapter, and for copyright


information, click here
http://www.download-it.org/learning-resources.php?promoCode=&partnerID=&content=story&storyID=1177

The publisher detailed in the title page holds the copyright for this document

All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted,
in any form or by any means, electronic, mechanical, photocopying, recorded or otherwise, without the written
permission of Spenford IT Ltd who are licensed to reproduce this document by the
publisher

All requests should by sent in the first instance to

rights@download-it.org

Please ensure you have book-marked our website.

www.download-it.org

You might also like