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Application Media Bandwidth Bit Rate Carrier Efficiency Modulation
(MHz) (Mbit/s) (MHz) (b/s/Hz)

ADSL Downstream Twisted Pair 1 6 0.55 6 DMT

ADSL Upstream Twisted Pair 0.1 0.6 0.55 6 DMT
Set-top Upstream HFC 3 10 5 - 30 3 QAM

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sin ( 4 π f )
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4
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FIR
SAW
DAC

x/sin(x) Channel
Channel
4 Correction Output
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I
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N SAW N SAW CH
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digital modulator analog upconversion

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sin ( 2 π f )
SAW
4 9
Q Pulse
Interpolator
input Shaping
FIR
FIR x/sin(x)
DAC

Correction to
4 9 SAW
Pulse FIR
I Interpolator
input Shaping
FIR
FIR
f SAW 4
cos ( 2 π f SAW ) =
fs 9
72 f = fs
N

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 A
(1 + β ) f 2 (1 + β ) f
N N

1/2

fs / 2 fs f
f /2= f f = 4 f sym
sym N sym = 2 f sym

interpolation
SAW
A characteristic

upconversion

f
f fs/2 fs
sym
= 18 f = 36 f
sym sym
f = 16 f
SAW sym

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H(z) H(z)
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N 12-tap FIR 12-tap FIR

coefficients for 12-tap FIR

h(0) = h(11) = -0.01333
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h(2) = h(9) = -0.007119
h(3) = h(8) = 0.07181
h(4) = h(7) = 0.1915
h(5) = h(6) = 0.2848

4-tap 4-tap
FIR FIR
in 4-tap 4-tap out
FIR FIR

4-tap 4-tap
FIR FIR

8 fN 24 fN 72 f
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up S

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G(z) Re to sin(x) compensation
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I
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FIR

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 12-tap FIR 12-tap FIR
3 3
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fs = 8 f N
H (z) H (z)
1 2

coefficients for 12-tap FIR

(unrotated H(z))
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h(1) = h(10) = -0.02573
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h(3) = h(8) = 0.07181
h(4) = h(7) = 0.1915
h(5) = h(6) = 0.2848

q
4-tap FIR 4-tap FIR

out
4-tap FIR 4-tap FIR

i 4-tap FIR 4-tap FIR

8fN 24 f N 72 f N

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Active Critical Power
Component Area Gate Count Path Estimate Area x Power
(mm2) (ns) (mW) (mm2 x mW)

H1 (z) 2.34 5318 30.4 170

Proposed H2 (z) 1.26 2863 27.1 140
Circuit
Total 3.60 8181 310 1110

Mix/Osc 1.14 1998 7.5 330

Conventional Interpolator 1.44 2512 15.8 230
Approach
Total 2.58 4510 560 1440

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dB 0 Parameter Value

-20 Master Clock 108 MHz

Technology CMOS 0.7u 5V
-40
Accuracy 10 bit
-60
Power Consumption 310 mW

-80 Active Area 3.60 mm2

Input Bandwidth 2 MHz
-100 (Q or I input)
Output Carrier 48 MHz
Frequency
24 48 72 96
MHz

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