iCEstick Evaluation Kit

User’s Guide

August 2013
EB82_01.0
 iCEstick Evaluation Kit

Introduction
Thank you for choosing the Lattice Semiconductor iCEstick™ Evaluation Kit.

This guide describes how to start using the iCEstick Evaluation Kit, an easy-to-use USB form factor board for rap-
idly prototyping designs using the iCE40 FPGA. Along with the evaluation board, this kit includes a pre-loaded
design that demonstrates basic board functionality.

The contents of this user’s guide include demo operations, descriptions of the various portions of the evaluation
board, descriptions of the on-board connectors, a complete set of schematics and bill of materials for the iCEstick
Evaluation Board.

Features
The iCEstick Evaluation Kit includes:

• iCEstick Evaluation Board – features the following on-board components

– High-performance, low-power iCE40HX1K FPGA
– FTDI 2232H USB device allows iCE device programming and UART interface to a PC
– Vishay TFDU4101 IrDA transceiver
– Five user LEDs
– 2 x 6 position Diligent PmodTM compatible connector enables many other peripheral connections
– Discera 12Mhz MEMS oscillator
– Micron 32Mbit N25Q32 SPI flash
– Supported by Lattice iCEcube2™ design software
– USB connector provides the power supply
– 16 LVCMOS/LVTTL (3.3V) digital I/O connections on 0.1” through-hole connections
• Pre-loaded demo design – the kit includes the pre-loaded demo design that flashes the on-board LEDs in a
clockwise pattern.
• USB connector – provides a communication and debug port via a USB-to-RS-232 physical channel and pro-
gramming interface to the PC.

Figure 1. iCEstick Evaluation Board

FTDI Lattice Prototyping IrDA
2232H iCE40-1KHX Holes Transceiver
USB
Connector

SPI Pmod
Flash Connector

2
 iCEstick Evaluation Kit

Figure 2. iCEstick Functional Block Diagram

USB Type A Male

Pwr LED I/O LEDs

LDO
iCE40

Pmod

IrDA
FT2232H HX1K
144TQFP

SPI
I/O Access

~4 in.

3
 iCEstick Evaluation Kit

Software Requirements
Before using the iCEstick board, download and install the latest version of Lattice iCEcube2™ and Diamond Pro-
grammer. Make sure you log in to the Lattice website, otherwise these software downloads will not be visible.
These are available at http://www.latticesemi.com/Products/DesignSoftwareAndIP.aspx. If you install Diamond
Programmer 2.2, you will require a software patch. This software patch is available at http://www.lattice-
semi.com/icestick. Go to the Downloads tab and install the appropriate patch. This patch is not required with Dia-
mond Programmer 3.0 or higher.

Figure 3. Software Downloads

Download
iCEcube2
for HDL
development

Download Diamond
Programmer for
physically configuring
the device

4
 iCEstick Evaluation Kit

Communication Between the PC and iCEstick

Communication between the iCEstick Board and a PC is via the FTDI 2232H USB device. To enable this connec-
tion the installation of the FTDI chip USB hardware drivers is needed. This driver is installed when Diamond Pro-
grammer was installed. These drivers enable the computer to recognize and program the iCEstick board. In
addition these drivers allow communication between the PC and the iCEstick board to enable further demonstra-
tions.

Connecting the iCEstick Evaluation Board

Insert the iCEstick evaluation board to an open USB slot in a PC. The default bitstream in the SPI flash loads the
iCE40HX-1k device on the iCEstick board. One should see the green LED on the board light up and continue to be
lit.

Preprogrammed Design and Board LEDs

There are a total of 5 LEDs on the iCEstick board. All are controlled by I/Os of the iCE40HX-1k device. The default
bitstream loads the iCE40HX-1k device and the green LED lights up signifying that the device has loaded correctly
and power is good. The other four red LEDs arranged in a diamond pattern begins to flash in a clockwise direction.
This is the intended function of the default bitstream.

Table 1. User I/O and LEDs

LED location CPLD pin (All in Bank 1) CPLD I/O LED color
D1 99 PIO1_14 Red
D2 98 PIO1_13 Red
D3 97 PIO1_12 Red
D4 96 PIO1_11 Red
D5 95 PIO1_10 Green

Download Demo Designs

The above demo is pre-programmed into the iCEstick board. Other than the default design, Lattice also distributes
source and programming files for demonstration designs compatible with this board. To download the demo
designs:

1. Browse to www.latticesemi.com/icestick and click on the Downloads tab to view other design files and capabil-
ities that the iCEstick board could implement. Various demo designs are available and can be download.
2. Extract the contents of zip files to a local hard drive.

Lattice provides the following demos based on iCEstick board:

• UART over IrDA. In this demo design, the iCEstick device communicates with a laptop or PC through UART over
USB. Then, the payload is transmitted through Vishay IrDA device. This data can be locally looped back or
another iCEstick board could receive the data via it’s IrDA receiver.
• Diligent Pmod Accelerometer. The demo makes use of Digilent PmodAcl module which is plugged into iCEstick
board. In this demo design, the accelerometer setting and reading is done by the on-board iCE device and the
direction of movement is displayed with the diamond pattern LEDs.

5
 iCEstick Evaluation Kit

IrDA Functionality and Demo

The iCEstick board has a Vishay TFDU4101 IrDA transceiver on it. This device allows transmit and receive of infra-
red data up to 115kbps.

Table 2. IrDA Pin Description

IrDA function CPLD pin CPLD I/O Comment
RXD 106 PIO1_19 Receive data pin
TXD 105 PIO1_18 Transmit data pin
SD 107 PIO1_20 Shut down

There are two possible configurations for the IrDA demo design: IrDA TX and IrDA RX. For an end to end complete
IrDA link demo, two iCEstick boards are needed, however using just the IrDA Tx design can support a demo. The
IrDA TX design transfers the data from the PC keyboard input in a terminal window to the IrDA Vishay device TXD.
While the data is transmitted via infrared, it is also by default looped back to the receive channel of the IrDA device.
In this demo the looped back data is received and before it is transmitted to the PC window the text is converted
from lower case to upper case. This is the signal flow for the stand alone demo.

Figure 4. IrDA TX on iCEstick

IrDA TX
UART
iCE40
via USB

Laptop or PC

The IrDA RX design receives infrared data from the Vishay IrDA Tx device. After the IrDA data is wirelessly
received it is then sent to the iCE40 device. The iCE40 then send the character information to the open window on
the PC. Thus whatever is typed in the TX terminal window is displayed in the Rx terminal window.

Figure 5. IrDA RX on iCEstick

UART
iCE40 Vishay IrDA
Over
USB

Laptop or PC

This demo requires a terminal program on PC to communicate with the iCEstick board. The following instructions
describe the setup for IrDA TX stand alone demo using the Tera Term terminal emulator program on Windows 7.

6
 iCEstick Evaluation Kit

Setting Up for the IrDA TX Stand Alone Demo

To set up for the IrDA TX demo:

1. Program the iCE device with IrDA TX bitstream.

2. Plug iCEstick into a PC USB port.
3. Check if the USB driver is installed correctly.
Go to Start, right-click Computer and select Properties. The System window is shown.
Click Device Manager.

Figure 6. System Window

4. If the driver is installed correctly, the device is listed without an error tag under Ports (COM & LPT) as shown in
Figure 7. Proceed to the next step.
Figure 7. Device Manager

7
 iCEstick Evaluation Kit

If the driver is not installed correctly, the device is tagged with a yellow exclamation point as shown in Figure 8.
You need to install the driver. To do this, right-click the device and select Update Driver Software.

Figure 8. Device Manager with Driver Error

Request Windows to search the web for the driver. After Windows locates the FTDI driver, install it and proceed
to the next step.

5. Install Tera Term software. The installer can be downloaded from http://download.cnet.com/Tera-Term/3000-
20432_4-75766675.html.
6. Open Tera Term.
7. In the New connection dialog box, click Serial.
8. On the Port menu, click COMxx: USB Serial Port (COMxx). If there are two or more options, select the last
COM port on the list. Click OK.
Figure 9. New Connection Dialog Box

9. The selected COM port/default baud rate appear in the Tera Term VT window title bar as shown in Figure 10.
On the Setup menu, click Serial port.

8
 iCEstick Evaluation Kit

Figure 10. Tera Term VT Window with Selected COM Port /Default Baud Rate

10. The Serial port setup dialog box opens. In the Baud rate menu, click 115200. Leave other options with default
settings. Click OK.
Figure 11. Serial Port Setup Dialog Box

11. The selected COM port/115200 baud rate appear in the Tera Term VT window title bar as shown in Figure 12.
On the Setup menu, click Terminal.

9
 iCEstick Evaluation Kit

Figure 12. Tera Term VT Window with Selected COM Port /Baud Rate

12. The Terminal setup dialog box opens. Select Local echo. Leave other options with default value. Click OK.

Figure 13. Terminal Setup Dialog Box

When you type in the Tera Term VT window using the TX design, a lower case character is echoed with a capital
character from the iCE device as shown in the Figure 14.

10
 iCEstick Evaluation Kit

Figure 14. Tera Term VT Window Using TX Design

For IrDA RX, the above Tera Term setting is the same but the bitstream for the iCE device is different. With a setup
of two iCEstick boards facing each other, one programmed with IrDA TX and the other programmed with IrDA RX,
the character typed in IrDA TX PC is transferred to and displayed on IrDA RX PC monitor. You can change the
angle of the TX board facing the RX board to see when the IrDA link would break.

11
 iCEstick Evaluation Kit

Diligent Pmod Connector and Accelerometer Demo

On the iCEstick board, location J2 is a 2x6 position Pmod (Peripheral MODule) Digilent connector. The iCEstick
board supports a variety of Pmod peripheral modules for easy I/O expansion. Figure 3 lists the 0.1” through-hole
headers on the iCEstick board that support Pmod modules. Pmod modules come in different form factors, and
each Pmod header includes power and ground supplies. The easiest way to support a Pmod module is to add the
appropriate female socket. Straight-through or right-angle connectors can be used. Male headers are an alternate
solution when using the interface cable provided with most Pmod modules.

Table 3. Diligent Pmod Compatible Connector Description

Connection Left Row pins Right Row pins Connection
PIO1_02 1 7 PIO1_06
PIO1_03 2 8 PIO1_07
PIO1_04 3 9 PIO1_08
PIO1_05 4 10 PIO1_09
Ground 5 11 Ground
3.3v 6 12 3.3v

The Accelerometer demo makes use of the Digilent PmodAcl accelerometer module from Diligent. The PmodAcl
module needs to be plugged into J2 on the iCEstick board through the cable that comes with this module. The four
LEDs D1, D2, D3 and D4 in the north, south, east and west pattern are configured to represent X+, Z+, X-, Z- of
accelerometer movement direction respectively. When the accelerometer module is moved around, the diamond
pattern LEDs on the iCEstick board goes on/off corresponding to the direction of the movement and orientation of
the module. If all these LEDs light up at the same time (indicating a balance point), The D5 LED also lights up.

Figure 15. Accelerometer Demo on iCEstick

Acl Module iCE40 LED

Accelerometer Demo on iCEstick

12
Programming Demo Designs with Lattice Programmer
To program a bitstream file to iCE device:

1. Plug the iCEstick board to a USB port on a host PC with Programmer installed.
2. Run Programmer. The Diamond Programmer Getting Started window opens. Under Select an Action, click
Create a new Blank Project. Click OK. If you try to create a new project from a scan, you will receive an error.
Please select Create a new Blank Project.
Figure 16. Diamond Programmer Getting Started Window

3. The Diamond Programmer interface opens. Under Cable Settings, in the Cable menu, click USB2. In the Port
menu, click FTUSB-0. You can also click Detect Cable to set the correct cable and port.
Figure 17. Cable and Port Settings

4. Select the Enable check box.

5. Double-click the cell under Device Family and click iCE40.
Figure 18. Device Family Options

6. Double-click the cell under Device and click iCE40HX1K.

Figure 19. Device Options

7. Double-click the cell under Operation. The Device Properties dialog box opens as shown in Figure 20. On the
Access Mode menu, click SPI Flash Programming. Click OK.

Warning: NVCM Programming is NOT recommended. NVCM Programming is one time programming. If you
use NVCM Programming to program iCE device, the iCE device can no longer be reprogrammed.
Figure 20. Device Properties Dialog Box

8. Select the SPI flash part number. For the iCEstick, this is Micron SPI-N25Q032 8-pin VDFPN8 package. Also
make sure to select the programming file. Once done, click OK.

Figure 21. Select Serial SPI Flash

9. On the Programmer toolbar, click the Program button to initiate the download. The bitstream starts download-
ing to the iCE device. This takes a few seconds to complete.
Expansion I/O Connections
The iCEstick board contains two unpopulated 0.1” headers for users to implement their own connections. Connec-
tors J1 and J3 each consist of 10 positions for a total of 20 connections. Two of these are tied to 3.3v and two are
tied to ground. This leaves 16 general purpose I/Os that connect to the iCE40HX-1k device for user I/O.

Table 4. Expansion I/O Connections

J1 Connector J3 Connector
Pin CPLD I/O Bank 0 CPLD Pin Pin CPLD I/O Bank 2 CPLD Pin
1 3.3v - 1 3.3v -
2 Ground - 2 Ground -
3 PIO0_02 112 3 PIO2_17 62
4 PIO0_03 113 4 PIO2_16 61
5 PIO0_04 114 5 PIO2_15 60
6 PIO0_05 115 6 PIO2_14 56
7 PIO0_06 116 7 PIO2_13 48
8 PIO0_07 117 8 PIO2_12 47
9 PIO0_08 118 9 PIO2_11 45
10 PIO0_09 119 10 PIO2_10 44

Test Points
There are three unpopulated test points. TP1 is tied to 3.3v, TP2 is tied to 1.2v and TP3 is connected to ground.

Lattice Demonstration Bitstreams

All demonstration bitstreams and Design files are available at www.latticesemi.com/icestick.

Technical Support Assistance

e-mail: techsupport@latticesemi.com
Internet: www.latticesemi.com

Revision History
Date Version Change Summary
August 2013 01.0 Initial release.

© 2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as
listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of
their respective holders. The specifications and information herein are subject to change without notice.
 5 4 3 2 1

D D

HEADER
I/Os
LEDS

BANK 0

I/Os

HEADER
C C
I/Os
FPGA
Appendix A. Schematic Diagrams

iCE40-HX1K-TQ144

BANK 3
HEADER

BANK 1

USB USB to RS232

SPI / RS232 Power from USB 5V
CONNECTOR

BANK 2

I/Os

B
HEADER SPI B

A A

AXELSYS
Title
iCEstick Evaluation Kit - Block Diagram
Size Document Number Rev
B ICE40HX1K-STICK-EVN A

Date: Apr 12, 2013 Sheet 1 of 5

5 4 3 2 1
 5 4 3 2 1

+3.3V

C1 C2

+3.3V 4.7uF 0.1uF

D D

C3 C4

4.7uF 0.1uF

VCC1_8FT +3.3V

+3.3V
VCC1_8FT +3.3V U1
FT2232HL

4
9
12
37
64
20
31
42
56
C6 C7 C5 C8 C9

VPLL
VPHY
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF

VCCIO
VCCIO
VCCIO
VCCIO

VCORE
VCORE
VCORE
16 SCK 0 R1 4
ADBUS0 iCE_SCK
50 17 SI 0 R2 4
VREGIN ADBUS1 iCE_MOSI
18 SO 0 R3 4
C ADBUS2 iCE_MISO C
49 19
VREGOUT ADBUS3 21 SS 0 R4
ADBUS4 iCE_SS_B 4
22
+3.3V 7 ADBUS5 23 0 R44
5 DM DM ADBUS6 iCE_CDONE 4
5 DP 8 24 0 R45 4
DP ADBUS7 iCE_CREST
C10 C11 R5 2.2K 26
14 ACBUS0 27
+3.3V 10uF 0.1uF RESET# ACBUS1 28
R7 R8 R9 R6 12K ACBUS2 29
6 ACBUS3 30
10K 10K 10K REF ACBUS4 32
U2 ACBUS5 33
ACBUS6 34
8 1 FT_EECS 63 ACBUS7
7 VCC CS 2 FT_EECLK 62 EECS 38 0 R10
NU CLK EECLK BDBUS0 RS232_Rx_TTL 4
6 3 FT_EEDATA 61 39 0 R11 4
ORG DI EEDATA BDBUS1 RS232_Tx_TTL
5 4 40 0 R12 RTSn 4
C12 VSS DO BDBUS2 41 0 R13
BDBUS3 CTSn 4
93LC56-SO8 R15 2.2K 2 43 0 R14 DTRn 4
0.1uF OSCI BDBUS4 44 0 R16
BDBUS5 DSRn 4
45 0 R17 4
BDBUS6 DCDn
+3.3V 46
3 BDBUS7
B B
OSCO 48
BCBUS0 52
X1 C13 BCBUS1 53
13 BCBUS2 54
1 4 0.1uF TEST BCBUS3 55
STANDBY# VDD BCBUS4 57
BCBUS5 58
2 3
FTDI High-Speed USB BCBUS6 59
GND OUTPUT BCBUS7
60
12.0000MHZ R18
FT2232H PWREN#
iCE_CLK 4 36
SUSPEND#
0
AGND
GND
GND
GND
GND
GND
GND
GND
GND

1
5

10
11
15
25
35
47
51

A A

AXELSYS
Title
iCEstick Evaluation Kit - USB to SPI/RS232
Size Document Number R ev
B ICE40HX1K-STICK-EVN A

Date: Apr 12, 2013 Sheet 2 of 5

5 4 3 2 1
 5 4 3 2 1

D D
+3.3V U3A +3.3V U3B
iCE40HX1K-TQ144 iCE40HX1K-TQ144 +3.3V
133 112 PIO0_02 89 78 PIO1_02
123 VCCIO0_01 PIO0_02 113 PIO0_03 100 VCCIO1_01 PIO1_02 79 PIO1_03
C14 C15 VCCIO0_02 PIO0_03 114 PIO0_04 C16 C17 VCCIO1_02 PIO1_03 80 PIO1_04
PIO0_04 115 PIO0_05 PIO1_04 81 PIO1_05
0.1uF 0.1uF PIO0_05 116 PIO0_06 0.1uF 0.1uF PIO1_05 87 PIO1_06 R19 R20
PIO0_06 BANK 1 PIO1_06
117 PIO0_07 88 PIO1_07 U4
PIO0_07 118 PIO0_08 82 PIO1_07 90 PIO1_08 47 47
BANK 0 PIO0_08 NC_5 PIO1_08
119 PIO0_09 83 91 PIO1_09 C19
PIO0_09 120 84 NC_6 PIO1_09 95 1
PIO0_10 NC_7 PIO1_10 LED4 5 VCC2
121 85 96 LED3 5 4.7uF
PIO0_11 122 NC_8 PIO1_11 97 6
PIO0_12 PIO1_12 LED2 5 VCC1
134 75 98 LED1 5
110 PIO0_13 135 73 PIO1_21/TCK PIO1_13 99 C18
NC_1 PIO0_14 PIO1_22/TDI PIO1_14 LED0 5
124 136 76 101
125 NC_2 PIO0_15 137 74 PIO1_23/TDO PIO1_15 102 0.1uF
130 NC_3 PIO0_16 138 77 PIO1_24/TMS PIO1_16 104 8
131 NC_4 PIO0_17 139 TRST_B PIO1_17 105 GND
NC_19 PIO0_18 141 94 PIO1_18 106 7
PIO0_19 142 R21 93 GBIN2/PIO1_00 PIO1_19 107 NC
129 PIO0_20 143 GBIN3/PIO1_01 PIO1_20 2
128 GBIN0/PIO0_00 PIO0_21 144 10K IREDC
C GBIN1/PIO0_01 PIO0_22 C
NC pins may be routed through 3
TXD
NC pins may be routed through 4
RXD
5
SD

TFDU4101-TR3

J1 +3.3V
J2

1
PIO1_02 1 7 PIO1_06
2
PIO1_03 2 8 PIO1_07
3 PIO0_02
PIO1_04 3 9 PIO1_08
4 PIO0_03
PIO1_05 4 10 PIO1_09
5 PIO0_04
5 11 +3.3V
B 6 PIO0_05 B
6 12
7 PIO0_06

8 PIO0_07 C20
Pmod 2x6
9 PIO0_08 0.1uF

10 PIO0_09

Female header 1x10

DNI

A A

AXELSYS
Title
iCEstick Evaluation Kit - FPGA
Size Document Number R ev
B ICE40HX1K-STICK-EVN A

Date: Apr 12, 2013 Sheet 3 of 5

5 4 3 2 1
 5 4 3 2 1

+3.3V U3D
iCE40HX1K-TQ144
6 1 DCDn 2
+3.3V U3C 30 VCCIO3_01 PIO3_02/DP00A 2
D VCCIO3_02 PIO3_03/DP00B DSRn 2 D
iCE40HX1K-TQ144 C21 C22 3 2
PIO3_04/DP01A DTRn
46 52 4 CTSn 2
57 VCCIO2_01 PIO2_00 58 0.1uF 0.1uF PIO3_05/DP01B 7
VCCIO2_02 PIO2_03 PIO3_06/DP02A RTSn 2
C23 C24 37 8 RS232_Tx_TTL 2
PIO2_04 38 PIO3_07/DP02B 9
PIO2_05 PIO3_08/DP03A RS232_Rx_TTL 2
0.1uF 0.1uF BANK 2 39 10
R46 PIO2_06 41 PIO3_09/DP03B 11
55 PIO2_07 42 PIO3_10/DP04A 12
10K NC_9 PIO2_08 43 PIO3_11/DP04B
PIO2_09 BANK 3
63 44 PIO2_10 19
64 PIO2_18/CBSEL0 PIO2_10 45 PIO2_11 PIO3_12/DP07A
PIO2_19/CBSEL1 PIO2_11 47 PIO2_12 22
65 PIO2_12 48 PIO2_13 PIO3_13/DP08B
2 iCE_CDONE CDONE PIO2_13
2 66 56 PIO2_14 23
iCE_CREST CRESET_B PIO2_14 PIO3_14/DP09A
60 PIO2_15 24
+3.3V 50 PIO2_15 61 PIO2_16 15 PIO3_15/DP09B 25
R22 10K 49 GBIN4/PIO2_02 PIO2_16 62 PIO2_17 16 NC_10 PIO3_16/DP10A 26
GBIN5/PIO2_01 PIO2_17 17 NC_11 PIO3_17/DP10B 28
18 NC_12 PIO3_18/DP11A 29
NC pins may be routed through NC_13 PIO3_19/DP11B 31
R23 PIO3_20/DP12A 32
21 PIO3_21/DP12B 33
2 iCE_CLK GBIN6/PIO3_00/DP08A PIO3_22/DP13A
0 20 34
DNI GBIN7/PIO3_01/DP07B PIO3_23/DP13B
C C

NC pins may be routed through

+3.3V

R24

U3E 10K
J3 +3.3V iCE40HX1K-TQ144
72 70
SPI_VCC PIOS_00/SPI_SCK 68
1 C25 PIOS_01/SPI_SI 67
PIOS_02/SPI_SO 71
SPI PIOS_03/SPI_SS_B
2 0.1uF
C26
3 PIO2_17
0.1uF
4 PIO2_16
R25 R26 R27
B 5 PIO2_15 2 iCE_MISO B
10K 10K 10K
6 PIO2_14 U5
8

7 PIO2_13
2 iCE_MOSI 5 2
VCC

8 PIO2_12 SDI SDO

2 iCE_SCK 6
9 PIO2_11 SCK
3
10 PIO2_10 WP
2 iCE_SS_B 1 7
CS HOLD
GND

Female header 1x10

4

N25Q032A13ESC40F
DNI

A A

AXELSYS
Title
iCEstick Evaluation Kit - FPGA
Size Document Number R ev
B ICE40HX1K-STICK-EVN A

Date: Apr 16, 2013 Sheet 4 of 5

5 4 3 2 1
 5 4 3 2 1

+1.2V

+3.3V

C27 C28 C29 C30 C31 C32 C33

10uF 1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.01uF

D C34 C35 C36 C37 D

10uF 1uF 0.1uF 0.01uF

VBUS_5V U6 +3.31V +3.3V

R28
18 3
17 IN1_1 OUT1_1
14 IN1_2 4 C40 0.1
13 IN2_1 OUT1_2 R29 C38 R30
IN2_2 0.01uF
C39 R31 R32 20 2 357K 10uF 100 DNI DNI DNI
SHDN1 BYP1 R33 210K
10uF 1M 1M 11 1 TP1 TP2 TP3
SHDN2 ADJ1
C +1.22V +1.2V +3.3V +1.2V C
1
1
1

19 R34
PWRGD1 7
12 OUT2_1
PWRGD2 8 C42 0.1
OUT2_2 C41 R35
0.01uF
21 9 4.7uF 100
THERMPAD BYP2
10
ADJ2

GND1
GND2
GND3
GND4

5
6

16
15
LT3030EFE#TRPBF
LEDs
3 LED0

3 LED1

B 3 LED2 B

3 LED3
VBUS_5V
+3.3V 3 LED4
U3F
iCE40HX1K-TQ144
109 D6 R37 R38 R39 R41 R40
VPP_FAST 108 2 1
POWER VPP_2V5 1K 1K 1K 1K 1K
C43 CDBU0520
5
0.1uF 13 GND_01
14 GND_02 40
1
1
1
1
1

59 GND_03 NC_18 54
69 GND_04 NC_17 126 D5 D4 D3 D2 D1
86 GND_05 NC_16 53
GND_06 NC_15 Green Red Red Red Red
J4 103 127
132 GND_07 NC_14 +1.2V
1 140 GND_08
2
2
2
2
2

VCC 2 +1.2V GND_09 51

D- DM 2 VCC_01
3 DP 2 R43 27
D+ 4 36 VCC_02 92
GND 35 PLLVCC VCC_03 111
A 100 C44 C45 PLLGND VCC_04 A
USB AM 90
10uF 0.1uF
AXELSYS
Title
iCEstick Evaluation Kit - Power, LEDs
Size Document Number R ev
B ICE40HX1K-STICK-EVN A

Date: Apr 12, 2013 Sheet 5 of 5

5 4 3 2 1