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UNIVERSITY OF THE PUNJAB

Second Semester 2013
Examination: B.S. 4 Years Programme Roll No.

PAPER: Digital Logic Design TIME ALLOWED: 2hrs. & 30 mins.

Course Code: IT-12397 / IT-104 MAX. MARKS: 50

Attempt this Paper on Separate Answer Sheet Provided.

SUBJECTIVE TYPE

Q2. Short questions: [20]

1. Perform M-N using 9’s compliment where M= 20 and N= 1000. (3)

2. Perform BCD addition on 259 + 378. (3)

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3. Write dual of A’B + A + B’ . (2)

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4. Construct a Full subtractor using Full Adder. (3)
5. Implement F(x, y, z) = ∑(0,2,4,7) using block diagram of decoder and an external gate.

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(3)
6. Draw the basic NAND Flipflop circuit and truth table. (3)
7. Design 4x1 multiplexer. (3) d
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Q3. a) Simplify the compliment of the following using theorems (don’t use K-map). [5+5]
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F= (A+B+C’)(A+B’+C’)(A+B’+C)(A’+B’+C’).
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And implement the function using NOR gates.

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b) Simplify the following function using K-Map in POS form.

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F(A,B,C,D) = ∑(2,3,6,8,11,12)
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D(A,B,C,D) = ∑0,10,14)

Q4. a) Design BCD to seven segment combinational circuit, with inputs w,x,y,z and outputs
a,b,c,d,e,f,g. [7+3]
b) Draw logic circuit and truth table for 8x3 encoder.

Q5. Draw the logic diagram of a 4-bit register with four D flip flops and four 4x1 multiplexers with
mode selection inputs s1 and s0. The register operations according to the following function table:[10]

S1 s0 Register Operation
0 0 No Change
0 1 Compliment the four outputs
1 0 Shift Left
1 1 Parallel load
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