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5 4 3 2 1

Model Name: GA-H61-S3 1.0


SHEET TITLE SHEET TITLE
01 COVER SHEET 28 VCCSA POWER

m
D
02 BOM & PCB MODIFY HISTORY 29 F_PANEL , F_USB D

co
03 BLOCK DIAGRAM 30 ATX POWER, CLOCK GEN

i a
04 CPU_LGA1155-A 31 HWM,KB/MS , FAN CTRL

a.
05 CPU_LGA1155-B 32 REALTEK RTL8111E

n
06 CPU_LGA1155-C 33 NEC USB3.0

e
07 DDR III CHANNEL A 34 TABLE LIST

if d

si
08 DDR III CHANNEL B 35

n
09 PCH_FDI,DMI,USB,PCIE,NVRAM 36

ne
o
C C
10 PCH_DP,CLK BUFFER 37

C
11 PCH_HOST,SATA,PCI 38

do
e
12 PCH_GPIO,CTRL,AUDIO 39

t
13 PCH_PWR,GND 40

y
in
y
14 PCI EXPRESS*16 SLOT

b p
CPU_VTT VCORE

a
15 PCI EXPRESS*4 SLOT

o
Q7 Q6
DQ39 DQ49

i-
DQ38 DQ40 DQ50 DQ47
MOSFET

g
16 PCI EXPRESS*1 SLOTs X2 Q9 Q8

i C
DL2 DL5
CHOKE L2 L1
17 PCI SLOT 1&2&3

G n ot

DQ41
1 4
B
is B

18 I/O ITE8728

DL3
2

DQ43
DQ42
19 COM, -PROHOT, ESATA CONNECT
kn

CPU SOCKET

DQ44
20 Dual BIOS 3

DL4
o

VCORE
21 ALC892

DQ46
DQ45
D

CHOKE
te

22 REAR AUDIO JACK

MOS
23 VCORE PWM_ISL6364CRZ-1 PCH
w.

24 VCORE PWM_ISL6364CRZ-2
25 DISCRETE POWER
A A
ww

26 DDR_15V & VCC1_05_PCH PWM_ISL6545CBZ


27 CPU_VTT PWM_ISL6322G Gigabyte Technology
Title
Cover Sheet
Size Document Number Rev
Custom GA-H61-S3 1.0
Date: Tuesday, August 16, 2011 Sheet 1 of 34
5 4 3 2 1
5 4 3 2 1

GA-H61-S3
Component value change history Circuit or PCB layout change
DATE Change Item Reason

m
D P61-S3-B3 從P61-DS3-B3修改 D

2011/05/11 1. Rear panel remove LPT , SPDIF

co
PCB:0.1 2. Remove CLK-Buffer for non over clocking
3. Remove 3x power

a
4. Vcore power 4 phase ' 3 phase (Iron choke)

i
5. Audio ALC889 ' VIA VT1708S
Data Change Item Reason 6. LAN RTL8111E-VL ' Atheros AR8151

t
7. Over voltage (Vcore , DDDR_VTT ,DDR15V)

a.
2011/05/11
BOM:01 1. E-BOM

n
2011/05/19
2011/05/19 PCB:1.0 1. 修改文字面: P61-S3-B3 REV0.1 --> P61-S3-B3 REV1.0
1. 修改load-line & prochot

e
BOM:10A

2. load-line DR345 8.2K --> 20K ,DR347 24.9K--> 62K

if d

si
3. PROCHOT DR418 1.6k--> 845
2011/06/27
BOM:10B 1. Load-line change DR303 1.27K/4/1 --> 4.3K/4/1 , DR294 12.7K/4/1 --> 52.3K/4/1

n
2. MB_ID Change Remove R40=8.2K/4, Add R41=8.2K/4

ne
o
C C

H61-S3

do
0.1 1. Remove smart fan function

e
2. Remove on-off charge & 3x USB power

t
3. Add RGB & VAXG power

y
in
y
1.0 1. 文字面: Remove "Ultra Durable2" , Add "All Solid Capacitors"

b p
2. Add R28 For FANPWM2 pull up

a o
3. CPU_VAXG DR417 --> short pad

g i-
4. CESD1 net swap

i C
5. Q92下方的GND切割要修正

G n ot
6. LAN pin1:3VDUAL / pin31:AVDDL POWER用鋪銅將PIN包起來
B
is B

7. EC32左邊背板GND移除,3VDUAL改鋪銅
kn

D o
te
w.

A A
ww

Gigabyte Technology
Title
BOM & PCB MODIFY HISTORY
Size Document Number Rev
Custom GA-H61-S3 1.0
Date: Tuesday, August 16, 2011 Sheet 2 of 34
5 4 3 2 1
5 4 3 2 1

BLOCK DIAGRAM

m
D
CHANNEL A D

DDRIII DIMM X 1

co
i a
PCI EXPRESS X16
INTEL LGA1155

t
CHANNEL B

a.
DDRIII BUS
DDRIII DIMM X 1

en
VRD12

if d

si
FDI DMI

n
Display

ne
RGB

o
C C

PCIE-4 gen2
PCI EXPRESS X1_1/_2

do
e
PCIE-1 gen2

IT8892E

t
SATA III / II
SATAIIX4

y
in
PCI
PCH (H61)

y
SPI BUS

b p
PCI SLOT 1/2/3 DUAL BIOS

g a o
i-
LPC BUS
PCIE-1 gen2
AR8151 1Gb LAN

i
G n ot C
USB 2.0
B
USB PORTS 0~7
is B

AZALIA BUS
LPC I/O ITE8728
kn

o
ALC887-VD2

D
I/O PORTS :
te

COMA KB/PS2

AUDIO PORTS : FRONT AUDIO FRONT PANEL /CPU FAN


w.

LIN_ OUT LINE_IN MIC CD_IN

A A
ww

Gigabyte Technology
Title
BLOCK DIAGRAM
Size Document Number Rev
C GA-H61-S3 1.0
Date: Tuesday, August 16, 2011 Sheet 3 of 34
5 4 3 2 1
5 4 3 2 1

LGA1155D
FDI:12/4/5/4/12(breakout min 6/4/4/4/6)
FDI:4/5(SINGLE END)
AC8 FDI_TXP0
CPU_VTT CPU_VTT CPU_VTT CPU_VTT FDI_FSYNC0AC5 FDI_TX[0] FDI_TXN0
{9} FDI_FSYNC0 FDI_FSYNC[0] FDI_TX#[0] AC7
FDI_LSYNC0AC4 AC2 FDI_TXP1
LGA1155E {9} FDI_LSYNC0 FDI_LSYNC[0] FDI_TX[1]
AC3 FDI_TXN1
CPUCLK W2 BBC11 BBC16 BBC10 BBC12 FDI_TX#[1] FDI_TXP2
{10} CPUCLK BCLK[0] VCCIO_SELECT P33 VTT_SEL {27} FDI_TX[2] AD2
-CPUCLK W1 P34 AD1 FDI_TXN2
{10} -CPUCLK BCLK#[0] VCCSA_VID_0 VSA_SEL {28} FDI_TX#[2]
T2 AD4 FDI_TXP3
PVIDSLCK C37 VCCSA_SENSE VSA_SENSE {28} FDI_TX[3]
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K AD3 FDI_TXN3 FDI_TXP[0..7]
{23} PVIDSLCK PVIDSOUT B37 VIDSCLK FDI_TX#[3] FDI_TXP[0..7] {9}
A36 VCC_SENSE 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K FDI:4/5(SINGLE END)
{23} PVIDSOUT -PVIDALRT A37 VIDSOUT VCC_SENSE VCC_SENSE {23}
D B36 VSS_SENSE AD7 FDI_TXP4 FDI_TXN[0..7] D

m
{23} -PVIDALRT VIDALERT# VSS_SENSE VSS_SENSE {23} CPU_VTT CPU_VTT CPU_VTT CPU_VTT FDI_FSYNC1AE5 FDI_TX[4] FDI_TXN[0..7] {9}
AD6 FDI_TXN4
{9} FDI_FSYNC1 FDI_LSYNC1AE4 FDI_FSYNC[1] FDI_TX#[4]
CPUPWROK J40 AB4 VTT_SENSE AE7 FDI_TXP5
{12,25} CPUPWROK UNCOREPWRGOOD VCCIO_SENSE VTT_SENSE {27} {9} FDI_LSYNC1 FDI_LSYNC[1] FDI_TX[5]
DRAM_PWROK AJ19 AB3 VTT_VSS AE8 FDI_TXN5
{12} DRAM_PWROK SM_DRAMPWROK VSSIO_SENSE VTT_VSS {27} FDI_TX#[5]
-CPURST F36 BBC13 BBC14 BBC15 BBC7 AF3 FDI_TXP6

co
RESET# VAXG_SENSE FDI_TX[6] FDI_TXN6
VCCAXG_SENSE L32 VAXG_SENSE {23} FDI_TX#[6] AF2
M32 VAXG_VSS FDI:4/5(SINGLE END) AG2 FDI_TXP7
VSSAXG_SENSE VAXG_VSS {23} FDI_TX[7]
PMSYNC E38 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K FDI_INT AG3 AG1 FDI_TXN7
{11} PMSYNC PM_SYNC {9} FDI_INT FDI_INT FDI_TX#[7]
PECI J35 L39 TDO 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K CPU_VTT
{11,18} PECI PECI TDO FDI_RCOMP AE2
CATERR- E37 L40 TDI R750
CATERR# TDI TDI {23} FDI_COMPIO
{19,23,25} -PROCHOT
-PROCHOT
-THRMTRIP
H34
G35
PROCHOT# TCK M40
L38
TCK
TMS
Stitching caps for PCIE,DMI bus 24.9/4/1 AE1 FDI_ICOMPO FDI
{11} -THRMTRIP THERMTRIP# TMS LINK

a.
J39 -TRST FDI:10/5(SINGLE END) EXP_TXP[0..15]
TRST# EXP_TXP[0..15] {14}
AJ33 K38 -HPRDY
{12} -SKTOCC SKTOCC# PRDY# 4 OF 10
CFG5:1: 1X16 PEG K32 K40 EXP_TXN[0..15]
{9} -H_SNB FC_K32 PREQ# EXP_TXN[0..15] {14}
CFG5=0: 2X8 PEG E39 -DBR LGA1155[10SC1-F01155-01R]
SM_VREF DBR# VCC1_05_PCH EXP_RXP[0..15]
AJ22 SM_VREF BCLK_ITP C40 TP3 EXP_RXP[0..15] {14}
D40 TP2 CPU_VTT CPU_VTTP PCIEX16:16/5/5/5/16(breakout min 10/4/4/4/10)
BCLK_ITP# LGA1155C EXP_RXN[0..15]
Impedance=80 +- 17.5% EXP_RXN[0..15] {14}
R211 1K/4/1/X SND_CFG0 H36 H40 DR414 0/4/X
CFG[0] BPM#[0]

si
R208 1K/4/1/X SND_CFG1 J36 H38
R213 1K/4/1/X SND_CFG2 CFG[1] BPM#[1]
J37 CFG[2] BPM#[2] G38
R210 1K/4/1/X SND_CFG3 K36 G40 DR415 0/4/SHT/M/X EXP_RXP0 B11 C13 EXP_TXP0
R218 1K/4/1/X SND_CFG4 CFG[3] BPM#[3] EXP_RXN0 PEG_RX[0] PEG_TX[0] EXP_TXN0
L36 CFG[4] BPM#[4] G39 B12 PEG_RX#[0] PEG_TX#[0] C14
R233 1K/4/1/X SND_CFG5 N35 F38 EXP_RXP1 D12 E14 EXP_TXP1
R214 1K/4/1/X SND_CFG6 CFG[5] BPM#[5] EXP_RXN1 PEG_RX[1] PEG_TX[1] EXP_TXN1
L37 CFG[6] BPM#[6] E40 D11 PEG_RX#[1] PEG_TX#[1] E13
R223 1K/4/1/X SND_CFG7 M36 F40 R201 51/4/1/X PVIDSLCK EXP_RXP2 C10 G14 EXP_TXP2
C
R235 1K/4/1/X SND_CFG8 CFG[7] BPM#[7] R202 100/4/1 PVIDSOUT EXP_RXN2 PEG_RX[2] PEG_TX[2] EXP_TXN2 C
J38 CPU_VTTP C9 G13

ne
R215 1K/4/1/X SND_CFG9 CFG[8] R203 100/4/1 -PVIDALRT EXP_RXP3 PEG_RX#[2] PEG_TX#[2] EXP_TXP3
L35 CFG[9] E10 PEG_RX[3] PEG_TX[3] F12
B39 EXP_RXN3 E9 F11 EXP_TXN3
R212 1K/4/1/X SND_CFG10 M38 RSVD_024 TMS EXP_RXP4 PEG_RX#[3] PEG_TX#[3] EXP_TXP4
CFG[10] RSVD_030 J33 1 2 B8 PEG_RX[4] PEG_TX[4] J14
R221 1K/4/1/X SND_CFG11 N36 L34 3 4 TDO EXP_RXN4 B7 J13 EXP_TXN4
CFG[11] RSVD_037 CPU_VTT PEG_RX#[4] PEG_TX#[4]
R243 1K/4/1/X SND_CFG12 N38 L33 5 6 TDI EXP_RXP5 C6 D8 EXP_TXP5
R245 1K/4/1/X SND_CFG13 N39 CFG[12] RSVD_036 -HPRDY EXP_RXN5 PEG_RX[5] PEG_TX[5] EXP_TXN5
CFG[13] RSVD_033 K34 7 8 C5 PEG_RX#[5] PEG_TX#[5] D7
R225 1K/4/1/X SND_CFG14 N37 N33 RN5 51/8P4R/4 EXP_RXP6 A5 D3 EXP_TXP6

PEG
R248 1K/4/1/X SND_CFG15 N40 CFG[14] RSVD_040 EXP_RXN6 PEG_RX[6] PEG_TX[6] EXP_TXN6
M34 A6 C3

do
R209 1K/4/1/X SND_CFG16 G37 CFG[15] RSVD_039 R242 51/4/1 TCK EXP_RXP7 PEG_RX#[6] PEG_TX#[6] EXP_TXP7
CFG[16] RSVD_018 AV1 E2 PEG_RX[7] PEG_TX[7] E6
R207 1K/4/1/X SND_CFG17 G36 AW2 R241 51/4/1 -TRST EXP_RXN7 E1 E5 EXP_TXN7
CFG[17] RSVD_020 EXP_RXP8 PEG_RX#[7] PEG_TX#[7] EXP_TXP8
RSVD_038 L9 F4 PEG_RX[8] PEG_TX[8] F8
J9 EXP_RXN8 F3 F7 EXP_TXN8
RSVD_032 EXP_RXP9 PEG_RX#[8] PEG_TX#[8] EXP_TXP9
AT14 RSVD_016 RSVD_034 K9 G2 PEG_RX[9] PEG_TX[9] G10
AY3 L31 R219 1K/4/1/X CATERR- EXP_RXN9 G1 G9 EXP_TXN9
RSVD_023 RSVD_035 CPU_VTT PEG_RX#[9] PEG_TX#[9]
H7 J31 R224 1K/4/1/X PECI EXP_RXP10 H3 G5 EXP_TXP10
RSVD_028VCC_VALIDATION_SENSE R216 1K/4/1 -THRMTRIP EXP_RXN10 PEG_RX[10] PEG_TX[10] EXP_TXN10
H8 K31 H4 G6

in
RSVD_029
VSSU_VALIDATION_SENSE R220 1K/4/1 -PROCHOT EXP_RXP11 PEG_RX#[10] PEG_TX#[10] EXP_TXP11
VCCAXG_VALIDATION_SENSE AD34 J1 PEG_RX[11] PEG_TX[11] K7
AD35 R228 51/4/1/X CPUPWROK EXP_RXN11 J2 K8 EXP_TXN11
VSSGT_VALIDATION_SENSE EXP_RXP12 PEG_RX#[11] PEG_TX#[11] EXP_TXP12
K3 PEG_RX[12] PEG_TX[12] J5
R236 1K/4/1 EXP_RXN12 K4 J6 EXP_TXN12
EXP_RXP13 PEG_RX#[12] PEG_TX#[12] EXP_TXP13
L1 PEG_RX[13] PEG_TX[13] M8
5 OF 10 R226 8.2K/4/X EXP_RXN13 L2 M7 EXP_TXN13
3VDUAL EXP_RXP14 PEG_RX#[13] PEG_TX#[13] EXP_TXP14
M3 PEG_RX[14] PEG_TX[14] L6

i-
-DBR R222 0/4/X EXP_RXN14 M4 L5 EXP_TXN14
CFG H L NOTE -SYS_RST {12,29,30} PEG_RX#[14] PEG_TX#[14]
LGA1155[10SC1-F01155-01R] EXP_RXP15 N1 N5 EXP_TXP15
0 RSVD RSVD RSVD EXP_RXN15 PEG_RX[15] PEG_TX[15] EXP_TXN15
B N2 PEG_RX#[15] PEG_TX#[15] N6 B
1 RSVD RSVD RSVD
2 NORM Reverse LANE REVERSAL[0],x16 DMI:12/4/5/4/12(breakout min 8/4/4/4/8)
3 RSVD RSVD RSVD Impedance=85 +- 17.5%
4 RSVD RSVD RSVD DDR_15V
7 RSVD RSVD RSVD DMI_0RXP W5 V7 DMI_0TXP
{9} DMI_0RXP DMI_RX[0] DMI_TX[0] DMI_0TXP {9}
8
9
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
DRAM_PWROK
is
R275
{9}
{9}
DMI_0RXN
DMI_1RXP
DMI_0RXN
DMI_1RXP
W4
V3
DMI_RX#[0]
DMI_RX[1]
DMI_TX#[0]
DMI_TX[1]
V6
W7
DMI_0TXN
DMI_1TXP
DMI_0TXN
DMI_1TXP
{9}
{9}
10 RSVD RSVD RSVD BC76 100/4/1 DMI_1RXN V4 W8 DMI_1TXN

DMI
11 RSVD RSVD RSVD {9} DMI_1RXN DMI_RX#[1] DMI_TX#[1] DMI_1TXN {9}
100p/4/NPO/50V/J/X DMI_2RXP Y3 Y6 DMI_2TXP
12 RSVD RSVD RSVD SM_VREF {9} DMI_2RXP DMI_RX[2] DMI_TX[2] DMI_2TXP {9}
DMI_2RXN Y4 Y7 DMI_2TXN
13 RSVD RSVD RSVD {9} DMI_2RXN DMI_RX#[2] DMI_TX#[2] DMI_2TXN {9}
DMI_3RXP AA4 AA7 DMI_3TXP
14 RSVD RSVD RSVD {9} DMI_3RXP DMI_RX[3] DMI_TX[3] DMI_3TXP {9}
R277 BC123 DMI_3RXN AA5 AA8 DMI_3TXN
15 RSVD RSVD RSVD {9} DMI_3RXN DMI_RX#[3] DMI_TX#[3] DMI_3TXN {9}
100/4/1 0.1u/4/X7R/16V/K/X
kn

16 RSVD RSVD RSVD


17 RSVD RSVD RSVD P3 P8
PE_RX[0] PE_TX[0]
P4 PE_RX#[0] PE_TX#[0] P7
R2 PE_RX[1] PE_TX[1] T7
CFG6 CFG5 PCIE CONFIG R1 T8
1 1 1X16 , Default CPU_VTT CPU_VTT CPU_VTT CPU_VTT PE_RX#[1] PE_TX#[1]
T4 PE_RX[2] PE_TX[2] R6
1 0 2X8 3VDUAL VCC3 T3 R5

GEN
0 1 RSVD PE_RX#[2] PE_TX#[2]
U2 U5
te

0 0 X8,X4,X4 BBC1 BBC9 BBC4 BBC8 PE_RX[3] PE_TX[3]


U1 PE_RX#[3] PE_TX#[3] U6
R217
CFG 0-17 all internal PULL-UP R308 200/4/1 B5 GRCOMP R187 24.9/4/1
1K/4/1 1.1V分壓 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K PEG_ICOMPO
C4
CPU_VTT
-CPURST 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K PEG_RCOMPO W=12 mil out of CPU
B4
3 OF 10 PEG_ICOMPI
3

A S=15 mil out of CPU A


CPU_VTT CPU_VTT CPU_VTT CPU_VTT LGA1155[10SC1-F01155-01R]
3

Q19 R199 BC65


w.

MMBT2222A/SOT23/600mA/40 100/4/1 1n/4/X7R/50V/K


SOT23 BBC2 BBC3 BBC6 BBC5
Gigabyte Technology
2

R309 8.2K/4 SOT23 Title


{18} -PFMRST1
Q26 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K CPU LGA1156-A
2

MMBT2222A/SOT23/600mA/40 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K


Size Document Number Rev
Custom 1.0
ww

Stitching caps for PCIE,DMI bus


GA-H61-S3
Date: Tuesday, August 16, 2011 Sheet 4 of 34
5 4 3 2 1
5 4 3 2 1

LGA1155B
LGA1155A MAAB0 AK24 AH7 DQSB0
MAAA0 DQSA0 MAAB1 SB_MA[0] SB_DQS[0] -DQSB0
AV27 SA_MA[0] SA_DQS[0] AK3 AM20 SB_MA[1] SB_DQS#[0] AH6
MAAA1 AY24 AK2 -DQSA0 MAAB2 AM19
MAAA2 SA_MA[1] SA_DQS#[0] MAAB3 SB_MA[2]
AW24 SA_MA[2] AK18 SB_MA[3]
MAAA3 AW23 MAAB4 AP19 AG7 MDB0
MAAA4 SA_MA[3] MDA0 MAAB5 SB_MA[4] SB_DQ[0] MDB1
AV23 SA_MA[4] SA_DQ[0] AJ3 AP18 SB_MA[5] SB_DQ[1] AG8
MAAA5 AT24 AJ4 MDA1 MAAB6 AM18 AJ9 MDB2
MAAA6 SA_MA[5] SA_DQ[1] MDA2 MAAB7 SB_MA[6] SB_DQ[2] MDB3
AT23 SA_MA[6] SA_DQ[2] AL3 AL18 SB_MA[7] SB_DQ[3] AJ8
MAAA7 AU22 AL4 MDA3 MAAB8 AN18 AG5 MDB4

m
D
MAAA8 SA_MA[7] SA_DQ[3] MDA4 MAAB9 SB_MA[8] SB_DQ[4] MDB5 D
AV22 SA_MA[8] SA_DQ[4] AJ2 AY17 SB_MA[9] SB_DQ[5] AG6
MAAA9 AT22 AJ1 MDA5 MAAB10 AN23 AJ6 MDB6
MAAA10 SA_MA[9] SA_DQ[5] MDA6 MAAB11 SB_MA[10] SB_DQ[6] MDB7 LGA1155
AV28 SA_MA[10] SA_DQ[6] AL2 AU17 SB_MA[11] SB_DQ[7] AJ7
MAAA11 MDA7 MAAB12 ILM_BP/1156/CSP

l
AU21 AL1 AT18

co
MAAA12 SA_MA[11] SA_DQ[7] MAAB13 SB_MA[12] DQSB1
AT21 SA_MA[12] AR26 SB_MA[13] SB_DQS[1] AM8
MAAA13 AW32 AP3 DQSA1 MAAB14 AY16 AL8 -DQSB1
MAAA14 SA_MA[13] SA_DQS[1] -DQSA1 MAAB15 SB_MA[14] SB_DQS#[1]
AU20 AP2 AV16

a
MAAA15 SA_MA[14] SA_DQS#[1] SB_MA[15]
AT20 SA_MA[15]

i
-SWEB AR25 AL7 MDB8
{8} -SWEB SB_WE# SB_DQ[8]
-SWEA AW29 AN1 MDA8 -SCASB AK25 AM7 MDB9
{7} -SWEA SA_WE# SA_DQ[8] {8} -SCASB SB_CAS# SB_DQ[9]
-SCASA MDA9 -SRASB MDB10

t
{7} -SCASA AV30 SA_CAS# SA_DQ[9] AN4 {8} -SRASB AP24 SB_RAS# SB_DQ[10] AM10
-SRASA AU28 AR3 MDA10 AL10 MDB11
{7} -SRASA SA_RAS# SA_DQ[10] SB_DQ[11]

a.
AR4 MDA11 SBAB0 AP23 AL6 MDB12
SA_DQ[11] {8} SBAB0 SB_BS[0] SB_DQ[12]
SBAA0 AY29 AN2 MDA12 SBAB1 AM24 AM6 MDB13
{7} SBAA0 {8} SBAB1

n
SBAA1 SA_BS[0] SA_DQ[12] MDA13 SBAB2 SB_BS[1] SB_DQ[13] MDB14
{7} SBAA1 AW28 SA_BS[1] SA_DQ[13] AN3 {8} SBAB2 AW17 SB_BS[2] SB_DQ[14] AL9
SBAA2 AV20 AR2 MDA14 AM9 MDB15
{7} SBAA2 SA_BS[2] SA_DQ[14] SB_DQ[15]
AR1 MDA15 -CSB0 AN25

e
SA_DQ[15] {8} -CSB0 SB_CS#[0]
-CSA0 AU29 -CSB1 AN26 AR8 DQSB2
{7} -CSA0 SA_CS#[0] {8} -CSB1 SB_CS#[1] SB_DQS[2]
-CSA1 AV32 AW4 DQSA2 AL25 AP8 -DQSB2
{7} -CSA1 SA_CS#[1] SA_DQS[2] SB_CS#[2] SB_DQS#[2]
AW30 AV4 -DQSA2 AT26
SA_CS#[2] SA_DQS#[2] SB_CS#[3]

if d

si
AU33 SA_CS#[3] CKEB0 AU16 AP7 MDB16
{8} CKEB0 SB_CKE[0] SB_DQ[16]
CKEA0 AV19 AV2 MDA16 CKEB1 AY15 AR7 MDB17
{7} CKEA0 SA_CKE[0] SA_DQ[16] {8} CKEB1 SB_CKE[1] SB_DQ[17]
CKEA1 AT19 AW3 MDA17 AW15 AP10 MDB18
{7} CKEA1 SA_CKE[1] SA_DQ[17] SB_CKE[2] SB_DQ[18]
AU18 AV5 MDA18 AV15 AR10 MDB19
SA_CKE[2] SA_DQ[18] MDA19 SB_CKE[3] SB_DQ[19] MDB20
AV18 SA_CKE[3] SA_DQ[19] AW5 SB_DQ[20] AP6
AU2 MDA20 MODT_B0 AL26 AR6 MDB21
MODT_A0 SA_DQ[20] MDA21 MODT_B1 SB_ODT[0] SB_DQ[21] MDB22 Need check the new CPU ME
AV31 AU3 AP26 AP9

n
MODT_A1 SA_ODT[0] SA_DQ[21] MDA22 SB_ODT[1] SB_DQ[22] MDB23
AU32 AU5 AM26 AR9

ne
SA_ODT[1] SA_DQ[22] MDA23 SB_ODT[2] SB_DQ[23]
C AU30 SA_ODT[2] SA_DQ[23] AY5 AK26 SB_ODT[3]
C
AW33 AN13 DQSB3

o
SA_ODT[3] DQSA3 SB_DQS[3] -DQSB3
SA_DQS[3] AV8 SB_DQS#[3] AN12
AW8 -DQSA3
DCLKA0 SA_DQS#[3] DCLKB0
{7} DCLKA0 AY25 SA_CK[0] {8} DCLKB0 AL21 SB_CK[0]
-DCLKA0 AW25 -DCLKB0 AL22 AM12 MDB24
{7} -DCLKA0 SA_CK#[0] {8} -DCLKB0 SB_CK#[0] SB_DQ[24]

C
DCLKA1 AU24 AY7 MDA24 DCLKB1 AL20 AM13 MDB25
{7} DCLKA1 SA_CK[1] SA_DQ[24] {8} DCLKB1 SB_CK[1] SB_DQ[25]
-DCLKA1 AU25 AU7 MDA25 -DCLKB1 AK20 AR13 MDB26

do
{7} -DCLKA1 SA_CK#[1] SA_DQ[25] {8} -DCLKB1 SB_CK#[1] SB_DQ[26]
AW27 AV9 MDA26 AL23 AP13 MDB27
SA_CK[2] SA_DQ[26] MDA27 SB_CK[2] SB_DQ[27] MDB28
AY27 SA_CK#[2] SA_DQ[27] AU9 AM22 SB_CK#[2] SB_DQ[28] AL12
AV26 AV7 MDA28 AP21 AL13 MDB29

e
SA_CK[3] SA_DQ[28] MDA29 SB_CK[3] SB_DQ[29] MDB30
AW26 SA_CK#[3] SA_DQ[29] AW7 AN21 SB_CK#[3] SB_DQ[30] AR12
AW9 MDA30 AP12 MDB31

t
TR1 SA_DQ[30] MDA31 SB_DQ[31]
{7,8} -DDR3_RST AW18 SM_DRAMRST# SA_DQ[31] AY9
0/4/SHT/M/X AN29 DQSB4
DQSA4 SB_DQS[4] -DQSB4
AV37 AN28

y
SA_DQS[4] SB_DQS#[4]

in
TBC9 AV36 -DQSA4 AH1

y
0.1u/4/X7R/16V/K/X SA_DQS#[4] {8} VREF_DQB FC_AH1
AH4 FC_AH4
{7} VREF_DQA AR28 MDB32
MDA32 SB_DQ[32] MDB33

b
SA_DQ[32] AU35 SB_DQ[33] AR29

p
AW37 MDA33 AL28 MDB34
SA_DQ[33] MDA34 SB_DQ[34] MDB35
AV13 SA_DQS[8] SA_DQ[34] AU39 SB_DQ[35] AL29
AV12 AU36 MDA35 AP28 MDB36

a
SA_DQS#[8] SA_DQ[35] SB_DQ[36]

o
AW35 MDA36 AP29 MDB37
SA_DQ[36] MDA37 SB_DQ[37] MDB38

i-
AU12 SA_ECC_CB[0] SA_DQ[37] AY36 AN16 SB_DQS[8] SB_DQ[38] AM28
AU14 AU38 MDA38 AN15 AM29 MDB39

g
SA_ECC_CB[1] SA_DQ[38] MDA39 SB_DQS#[8] SB_DQ[39]
AW13 SA_ECC_CB[2] SA_DQ[39] AU37
DQSB5

i
AY13 AP33

C
SA_ECC_CB[3] DQSA5 SB_DQS[5] -DQSB5
AU13 SA_ECC_CB[4] SA_DQS[5] AP38 AL16 SB_ECC_CB[0] SB_DQS#[5] AR33
AU11 AP39 -DQSA5 AM16
B SA_ECC_CB[5] SA_DQS#[5] SB_ECC_CB[1] B
AY12 SA_ECC_CB[6] AP16 SB_ECC_CB[2]
AW12 AR16 AP32 MDB40 VREF_DQA

G n ot
SA_ECC_CB[7] MDA40 SB_ECC_CB[3] SB_DQ[40] MDB41 VREF_DQB
AR40 AL15 AP31
SA_DQ[40]
SA_DQ[41] AR37
AN38
MDA41
MDA42
is AM15
AR15
SB_ECC_CB[4]
SB_ECC_CB[5]
SB_DQ[41]
SB_DQ[42] AP35
AP34
MDB42
MDB43
SA_DQ[42] MDA43 SB_ECC_CB[6] SB_DQ[43] MDB44 TBC1 TBC2
SA_DQ[43] AN37 AP15 SB_ECC_CB[7] SB_DQ[44] AR32
AR39 MDA44 AR31 MDB45 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
SA_DQ[44] MDA45 SB_DQ[45] MDB46
SA_DQ[45] AR38 SB_DQ[46] AR35
AN39 MDA46 AR34 MDB47
SA_DQ[46] MDA47 SB_DQ[47] Place in CPU bottom side
SA_DQ[47] AN40
AL33 DQSB6
SB_DQS[6]
kn

AK38 DQSA6 AM33 -DQSB6


SA_DQS[6] -DQSA6 SB_DQS#[6]
AK39

o
SA_DQS#[6]
MODT_A[0..1] AM32 MDB48
{7} MODT_A[0..1] SB_DQ[48]
AL40 MDA48 AM31 MDB49
SA_DQ[48] MDA49 MODT_B[0..1] SB_DQ[49] MDB50
SA_DQ[49] AL37 {8} MODT_B[0..1] SB_DQ[50] AL35
MDA50 MDB51

D
SA_DQ[50] AJ38 SB_DQ[51] AL32
AJ37 MDA51 AM34 MDB52
SA_DQ[51] SB_DQ[52]
te

AL39 MDA52 MDA[0..63] AL31 MDB53


SA_DQ[52] {7} MDA[0..63] SB_DQ[53]
AL38 MDA53 AM35 MDB54
SA_DQ[53] MDA54 MDB[0..63] SB_DQ[54] MDB55
SA_DQ[54] AJ39 {8} MDB[0..63] SB_DQ[55] AL34
AJ40 MDA55
SA_DQ[55] DQSB7
SB_DQS[7] AG35
AF38 DQSA7 DQSA[0..7] AG34 -DQSB7
SA_DQS[7] -DQSA7 {7} DQSA[0..7] SB_DQS#[7]
SA_DQS#[7] AF39
-DQSA[0..7]
{7} -DQSA[0..7]
AH35 MDB56
w.

MDA56 SB_DQ[56] MDB57


SA_DQ[56] AG40 SB_DQ[57] AH34
A AG37 MDA57 MAAA[0..15] AE34 MDB58 A
SA_DQ[57] {7} MAAA[0..15] SB_DQ[58]
AE38 MDA58 AE35 MDB59
SA_DQ[58] MDA59 MAAB[0..15] SB_DQ[59] MDB60
SA_DQ[59] AE37 {8} MAAB[0..15] SB_DQ[60] AJ35
DDR_0 SA_DQ[60]
SA_DQ[61]
AG39
AG38
MDA60
MDA61 SB_DQ[61]
SB_DQ[62]
AJ34
AF33
MDB61
MDB62

1 OF 10 SA_DQ[62] AE39 MDA62


MDA63
{8} DQSB[0..7]
DQSB[0..7]
DDR_1 SB_DQ[63] AF35 MDB63
AE40
Gigabyte Technology
ww

SA_DQ[63] -DQSB[0..7] 2 OF 10
{8} -DQSB[0..7] Title
LGA1155[10SC1-F01155-01R]
LGA1155[10SC1-F01155-01R] CPU LGA1156-B
Size Document Number Rev
Custom 1.0
GA-H61-S3
Date: Tuesday, August 16, 2011 Sheet 5 of 34
5 4 3 2 1
5 4 3 2 1

VCORE VCORE
CPU_VTT CPU_VAXG LGA1155I LGA1155J
LGA1155F LGA1155G DDR_15V LGA1155H DDR_15V A17 VSS VSS AM27 AV11 VSS
A12 VCC VCC F32 AB33 VCCAXG A23 VSS VSS AM3 AV14 VSS VSS G8
A13 VCC VCC F33 A11 VCCIO_01 AB34 VCCAXG RSVD_04 AB7 A26 VSS VSS AM30 AV17 VSS VSS H1
A14 VCC VCC F34 A7 VCCIO_02 VDDQ_01 AJ13 AB35 VCCAXG RSVD_05 AD37 A29 VSS VSS AM36 AV3 VSS VSS H17
A15 VCC VCC G15 AA3 VCCIO_03 VDDQ_02 AJ14 AB36 VCCAXG RSVD_08 AG4 A35 VSS VSS AM37 AV35 VSS VSS H2
A16 G16 AB8 AJ20 AB37 AJ29 BC116 BC113 BC115 AA33 AM38 AV38 H20
VCC VCC VCCIO_04 VDDQ_03 VCCAXG RSVD_10 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M VSS VSS VSS VSS
A18 VCC VCC G18 AF8 VCCIO_05 VDDQ_04 AJ23 AB38 VCCAXG RSVD_11 AJ30 AA34 VSS VSS AM39 AV6 VSS VSS H23
A24 VCC VCC G19 AG33 VCCIO_06 VDDQ_05 AJ24 AB39 VCCAXG RSVD_12 AJ31 AA35 VSS VSS AM4 AW10 VSS VSS H26
A25 G21 AJ16 AR20 AB40 AV34 AA36 AM40 AW11 H29

m
D VCC VCC VCCIO_07 VDDQ_06 VCCAXG RSVD_19 VSS VSS VSS VSS D
A27 VCC VCC G22 AJ17 VCCIO_08 VDDQ_07 AR21 AC33 VCCAXG RSVD_21 AW34 AA37 VSS VSS AM5 AW14 VSS VSS H33
A28 G24 AJ26 AR22 AC34 CPU_VTT AA38 AN10 AW16 H35
VCC VCC VCCIO_09 VDDQ_08 VCCAXG VSS VSS VSS VSS
B15 VCC VCC G25 AJ28 VCCIO_10 VDDQ_09 AR23 AC35 VCCAXG RSVD_43 P35 AA6 VSS VSS AN11 AW36 VSS VSS H37

l
B16 G27 AJ32 AR24 AC36 P37 AB5 AN14 AW6 H39

co
VCC VCC VCCIO_11 VDDQ_10 VCCAXG RSVD_44 VSS VSS VSS VSS
B18 VCC VCC G28 AK15 VCCIO_12 VDDQ_11 AU19 AC37 VCCAXG RSVD_45 P39 AC1 VSS VSS AN17 AY11 VSS VSS H5
B24 VCC VCC G30 AK17 VCCIO_13 VDDQ_12 AU23 AC38 VCCAXG RSVD_46 R34 AC6 VSS VSS AN19 AY14 VSS VSS H6
B25 G31 AK19 AU27 AC39 R36 BC103 BC109 AD33 AN22 AY18 H9

a
VCC VCC VCCIO_14 VDDQ_13 VCCAXG RSVD_47 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M VSS VSS VSS VSS
B27 VCC VCC G32 AK21 VCCIO_15 VDDQ_14 AU31 AC40 VCCAXG RSVD_48 R38 AD36 VSS VSS AN24 AY35 VSS VSS J11

i
B28 VCC VCC G33 AK23 VCCIO_16 VDDQ_15 AV21 T33 VCCAXG RSVD_49 R40 AD38 VSS VSS AN27 AY4 VSS VSS J17
B30 VCC VCC H13 AK27 VCCIO_17 VDDQ_16 AV24 T34 VCCAXG AD39 VSS VSS AN30 AY6 VSS VSS J20

t
B31 VCC VCC H14 AK29 VCCIO_18 VDDQ_17 AV25 T35 VCCAXG NCTF_01 A38 AD40 VSS VSS AN31 AY8 VSS VSS J23
B33 VCC VCC H15 AK30 VCCIO_19 VDDQ_18 AV29 T36 VCCAXG NCTF_02 AU40 AD5 VSS VSS AN32 B10 VSS VSS J26

a.
B34 H16 B9 AV33 T37 AW38 VCCSA AD8 AN33 B13 J29
VCC VCC VCCIO_20 VDDQ_19 VCCAXG NCTF_03 VSS VSS VSS VSS
C15 H18 D10 AW31 T38 C2 AE3 AN34 B14 J32

n
VCC VCC VCCIO_21 VDDQ_20 VCCAXG NCTF_04 VSS VSS VSS VSS
C16 VCC VCC H19 D6 VCCIO_22 VDDQ_21 AY23 T39 VCCAXG NCTF_05 D1 AE33 VSS VSS AN35 B17 VSS VSS K1
C18 VCC VCC H21 E3 VCCIO_23 VDDQ_22 AY26 T40 VCCAXG AE36 VSS VSS AN36 B23 VSS VSS K12
C19 H22 E4 AY28 U33 BC82 SBC3 AF1 AN5 B26 K13

e
VCC VCC VCCIO_24 VDDQ_23 VCCAXG 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M/X VSS VSS VSS VSS
C21 VCC VCC H24 G3 VCCIO_25 U34 VCCAXG AF34 VSS VSS AN6 B29 VSS VSS K14
C22 VCC VCC H25 G4 VCCIO_26 U35 VCCAXG AF36 VSS VSS AN7 B32 VSS VSS K17
C24 VCC VCC H27 J3 VCCIO_27 U36 VCCAXG RSVD_15 AT11 AF37 VSS VSS AN8 B35 VSS VSS K2

if d

si
C25 VCC VCC H28 J4 VCCIO_28 U37 VCCAXG RSVD_14 AP20 AF40 VSS VSS AN9 B38 VSS VSS K20
C27 VCC VCC H30 J7 VCCIO_29 U38 VCCAXG RSVD_13 AN20 AF5 VSS VSS AP1 B6 VSS VSS K23
C28 H31 J8 VCCPLL U39 AU10 AF6 AP11 C11 K26
VCC VCC VCCIO_30 VCCAXG RSVD_17 CPU_VAXG VSS VSS VSS VSS
C30 VCC VCC H32 L3 VCCIO_31 U40 VCCAXG RSVD_22 AY10 AF7 VSS VSS AP14 C12 VSS VSS K29
C31 VCC VCC J12 L4 VCCIO_32 VCCPLL_01 AK11 W33 VCCAXG AG36 VSS VSS AP17 C17 VSS VSS K33
C33 VCC VCC J15 L7 VCCIO_33 VCCPLL_02 AK12 W34 VCCAXG RSVD_07 AF4 AH2 VSS VSS AP22 C20 VSS VSS K35
C34 VCC VCC J16 M13 VCCIO_34 W35 VCCAXG RSVD_03 AB6 AH3 VSS VSS AP25 C23 VSS VSS K37
C36 J18 N3 W36 AE6 AH33 AP27 C26 K39

n
VCC VCC VCCIO_35 VCCAXG RSVD_06 BC105 DBC111 DBC112 VSS VSS VSS VSS
D13 J19 N4 W37 AJ11 AH36 AP30 C29 K5

ne
VCC VCC VCCIO_36 VCCAXG RSVD_09 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M VSS VSS VSS VSS
C D14 VCC VCC J21 N7 VCCIO_37 W38 VCCAXG AH37 VSS VSS AP36 C32 VSS VSS K6 C
D15 J22 R3 Y33 D38 AH38 AP37 C35 L10

o
VCC VCC VCCIO_38 VCCAXG RSVD_27 VSS VSS VSS VSS
D16 VCC VCC J24 R4 VCCIO_39 Y34 VCCAXG RSVD_26 C39 AH39 VSS VSS AP4 C7 VSS VSS L17
D18 VCC VCC J25 R7 VCCIO_40 Y35 VCCAXG RSVD_25 C38 AH40 VSS VSS AP40 C8 VSS VSS L20
D19 J27 U3 Y36 J34 CPU_VAXG AH5 AP5 D17 L23
VCC VCC VCCIO_41 VCCAXG RSVD_31 VSS VSS VSS VSS
D21 VCC VCC J28 U4 VCCIO_42 Y37 VCCAXG RSVD_41 N34 AH8 VSS VSS AR11 D2 VSS VSS L26

C
D22 VCC VCC J30 U7 VCCIO_43 Y38 VCCAXG AJ12 VSS VSS AR14 D20 VSS VSS L29
D24 K15 V8 AJ15 AR17 D23 L8

do
VCC VCC VCCIO_44 VSS VSS VSS VSS
D25 VCC VCC K16 W3 VCCIO_45 AJ18 VSS VSS AR18 D26 VSS VSS M1
D27
D28
VCC VCC K18
K19 VCCSA POWER 8 OF 10
BC111 BC101
22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M
BC104
22u/8/X5R/6.3V/M
DBC113
22u/8/X5R/6.3V/M
AJ21
AJ25
VSS VSS AR19
AR27
D29
D32
VSS VSS M17
M2

e
VCC VCC LGA1155[10SC1-F01155-01R] VSS VSS VSS VSS
D30 VCC VCC K21 H10 VCCSA_01 AJ27 VSS VSS AR30 D37 VSS VSS M20
D31 K22 H11 AJ36 AR36 D39 M23

t
VCC VCC VCCSA_02 VSS VSS VSS VSS
D33 VCC VCC K24 H12 VCCSA_03 AJ5 VSS VSS AR5 D4 VSS VSS M26
D34 VCC VCC K25 J10 VCCSA_04 AK1 VSS VSS AT1 D5 VSS VSS M29
D35 K27 K10 AK10 AT10 D9 M33

y
VCC VCC VCCSA_05 VSS VSS VSS VSS

in
D36 K28 K11 CPU_VTT AK13 AT12 E11 M35

y
VCC VCC VCCSA_06 VSS VSS VSS VSS
E15 VCC VCC K30 L11 VCCSA_07 AK14 VSS VSS AT13 E12 VSS VSS M37
E16 VCC VCC L13 L12 VCCSA_08 AK16 VSS VSS AT15 E17 VSS VSS M39

b
E18 VCC VCC L14 M10 VCCSA_09 AK22 VSS VSS AT16 E20 VSS VSS M5

p
E19 VCC VCC L15 M11 VCCSA_10 AK28 VSS VSS AT17 E23 VSS VSS M6
E21 L16 M12 BC97 BC91 BC55 BC117 BC114 BC108 AK31 AT2 E26 M9
VCC VCC VCCSA_11 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M VSS VSS VSS VSS
E22 L18 AK32 AT25 E29 N8

a
VCC VCC VSS VSS VSS VSS

o
E24 VCC VCC L19 AK33 VSS VSS AT27 E32 VSS VSS P1

i-
E25 VCC VCC L21 AK34 VSS VSS AT28 E36 VSS VSS P2
E27 L22 AK35 AT29 E7 P36

g
VCC VCC VSS VSS VSS VSS
E28 VCC VCC L24 AK36 VSS VSS AT3 E8 VSS VSS P38

i
E30 L25 AK37 AT30 F1 P40

C
VCC VCC VSS VSS VSS VSS

B
E31
E33
VCC
VCC
VCC
VCC
L27
L28 POWER
7 OF 10
CPU_VTT AK4
AK40
VSS
VSS
VSS
VSS
AT31
AT32
F10
F13
VSS
VSS
VSS
VSS
P5
P6 B
E34 VCC VCC L30 AK5 VSS VSS AT33 F14 VSS VSS R33
E35 M14 AK6 AT34 F17 R35

G n ot
VCC VCC LGA1155[10SC1-F01155-01R] VSS VSS VSS VSS
F15 M15 AK7 AT35 F2 R37
F16
F18
VCC
VCC
VCC
VCC M16
M18
SBC12
isSBC13 SBC14 SBC16 SBC15 SBC9 SBC8
22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X
AK8
AK9
VSS
VSS
VSS
VSS AT36
AT37
F20
F23
VSS
VSS
VSS
VSS R39
R8
VCC VCC VCC1_8_PCH VSS VSS VSS VSS
F19 VCC VCC M19 AL11 VSS VSS AT38 F26 VSS VSS T1
F21 VCC VCC M21 AL14 VSS VSS AT39 F29 VSS VSS T5
F22 VCC VCC M22 AL17 VSS VSS AT4 F35 VSS VSS T6
F24 M24 CPU_VTT AL19 AT40 F37 U8
VCC VCC VSS VSS VSS VSS
F25 VCC VCC M25 AL24 VSS VSS AT5 F39 VSS VSS V1
F27 M27 FB3 BC119 AL27 AT6 F5 V2
VCC VCC VSS VSS VSS VSS
kn

F28 M28 VCCPLL 0/4 1u/6/X7R/16V/K AL30 AT7 F6 V33


VCC VCC VSS VSS VSS VSS
F30
CPU M30 AL36 AT8 F9 V34

o
VCC VCC SBC10 SBC6 SBC18 SBC17 SBC11 VSS VSS VSS VSS
F31 VCC AL5 VSS VSS AT9 G11 VSS VSS V35
22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X AM1 AU1 G12 V36
POWER
6 OF 10
BC121
0.1u/4/X7R/16V/K/X
BC120 BC256
0.1u/4/X7R/16V/K 1u/4/X5R/6.3V/K
AM11
AM14
VSS
VSS
VSS
VSS
VSS
VSS
AU15
AU26
G17
G20
VSS
VSS
VSS
VSS
VSS
VSS
V37
V38

D
AM17 VSS VSS AU34 G23 VSS VSS V39
AM2 VSS VSS AU4 G26 VSS VSS V40
te

LGA1155[10SC1-F01155-01R] AM21 AU6 G29 V5


VSS VSS VSS VSS

VCORE
AM23
AM25
VSS
VSS
GND VSS
VSS
AU8
AV10
G34
G7
VSS
VSS
VSS
VSS
W6
Y5
VSS Y8
A4 VSS_NCTF_01
AV39 VSS_NCTF_02

VSS_NCTF_03 AY37
BC98 BC92 BC83 BC84 BC93 BC99 BC100 BC95 BC86 9 OF 10 B3
w.

VSS_NCTF_04
A
22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M LGA1155[10SC1-F01155-01R]
GND 10 OF 10 A

LGA1155[10SC1-F01155-01R]

VCORE VCORE CPU_VAXG

Gigabyte Technology
ww

SBC7 SBC19 SBC20 SBC21 Title


BC94 BC85 BC107 BC106 SBC5 SBC2 SBC1 SBC4 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X CPU LGA1156-C
22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X
Size Document Number Rev
Custom 1.0
GA-H61-S3
Date: Tuesday, August 16, 2011 Sheet 6 of 34
5 4 3 2 1
8 7 6 5 4 3 2 1

DDR3_1

DDRVTT 120 VTT FREE 48


240 VTT FREE 49
187 DDR_15V
FREE
2 VSS FREE 198
5 VSS
8 79 TR7
VSS RSVD 1K/4/1
11 VSS
14 77 MODT_A1
VSS ODT1 MODT_A0 VREFCA_A -DDR3_RST
17 VSS ODT0 195
20 VSS
23 68 TR6
VSS NC/PAR_IN 1K/4/1
26 VSS NC/ERR_OUT 53
29 167 TC10
VSS NC/TEST4 100p/4/NPO/50V/J
32 VSS
35 VSS CB0 39
38 40

m
VSS CB1
D
41 VSS CB2 45 D
44 46 SMBDATA
VSS CB3 SMBCLK
47 VSS CB4 158
80 VSS CB5 159
83 164

l
VSS CB6

co
86 VSS CB7 165
89 DDR_15V TC14 TC15
VSS 100p/4/NPO/50V/J/X 100p/4/NPO/50V/J/X
92 VSS
95 7 DQSA0

a
VSS DQS0 -DQSA0
98 VSS DQS0* 6
101 VSS

i
104 16 DQSA1 TBC4
MODT_A[0..1] VSS DQS1 -DQSA1 1u/4/X5R/6.3V/K TR5
MODT_A[0..1] {5} 107 VSS DQS1* 15
110 1K/4/1

t
-DQSA[0..7] VSS DQSA2
-DQSA[0..7] {5} 113 VSS DQS2 25
116 24 -DQSA2 VREFDQ_A

a.
VSS DQS2* VREF_DQA {5}
DQSA[0..7] 119
DQSA[0..7] {5} VSS
121 34 DQSA3 TR4
VSS DQS3

n
124 33 -DQSA3 1K/4/1 TBC10
VSS DQS3* 1u/4/X5R/6.3V/K
127 VSS
130 85 DQSA4
VSS DQS4 -DQSA4
133 84

e
VSS DQS4*
136 VSS
139 94 DQSA5
VSS DQS5 -DQSA5
142 VSS DQS5* 93
145 VSS

if d
DQSA6

si
148 VSS DQS6 103
151 102 -DQSA6
VSS DQS6*
154 VSS
157 112 DQSA7
VSS DQS7 -DQSA7
160 VSS DQS7* 111
163 VSS
166 VSS DQS8 43
199 VSS DQS8* 42
202 VSS
205 125

n
VSS DM0/DQS9
208 126
VSS NC/DQS9*
DDR TERMINATION

ne
211 VSS
214 VSS DM1/DQS10 134
217 135
CHANNEL A/B

o
VSS NC/DQS10*
C 220 VSS
C
223 VSS DM2/DQS11 143
226 VSS NC/DQS11* 144
229 VSS
232 VSS DM3/DQS12 152
235 153

C
VSS NC/DQS12*
239 VSS
203

do
DM4/DQS13
204
NC/DQS13* DDR15V Decouple
51 VDD DM5/DQS14 212 DDRVTT Decouple

e
54 VDD NC/DQS14* 213 Check電容限高10mm
57 DDR_15V
VDD
60 221

t
VDD DM6/DQS15 TEC1 560u/FP/D/6.3V/69/A/11m
62 222

1
VDD NC/DQS15*

+
65 VDD
66 230 DDRVTT
DDR_15V VDD DM7/DQS16 TEC4 560u/FP/D/6.3V/69/A/11m
69 231

1
y
VDD NC/DQS16*

in
TBC16

+
72

y
VDD 22u/8/X5R/6.3V/M
75 VDD DM8/DQS17 161
78 VDD NC/DQS17* 162
170 TBC13
VDD 22u/8/X5R/6.3V/M/X

b
173 VDD MDA0

p
176 VDD DQ0 3 MDA[0..63] {5}
179 4 MDA1
VDD DQ1 MDA2
182 VDD DQ2 9
MDA3 DDR_15V DDRVTT

a
183 VDD DQ3 10
MDA4

o
186 VDD DQ4 122
189 123 MDA5 TBC22 TBC27

i-
VDD DQ5 MDA6 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
191 VDD DQ6 128
MDA7

g
194 VDD DQ7 129
197 12 MDA8 TBC23 TBC26
TC2 0.1u/4/X7R/16V/K VDD DQ8 MDA9 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
13

i
DQ9

C
236 18 MDA10
VCC3 VDDSPD DQ10
19 MDA11 TBC25 TBC28
DQ11 MDA12 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
DQ12 131
TC6 0.1u/4/X7R/16V/K VREFCA_A 67 132 MDA13
TC4 0.1u/4/X7R/16V/K VREFDQ_A VREFCA DQ13 MDA14 TBC14
1 VREFDQ DQ14 137

G n ot
138 MDA15 1u/6/X7R/16V/K
DQ15 MDA16
B
{8,12,14,15,17,23,30} SMBCLK
{8,12,14,15,17,23,30} SMBDATA
SMBCLK
SMBDATA
118
238
SCL
SDA
DQ16
DQ17
DQ18
21
22
27
MDA17
MDA18
is B

237 28 MDA19
SA1 DQ19 MDA20
117 SA0 DQ20 140
141 MDA21 DDR_15V
SBAA2 DQ21 MDA22 DDRVTT
{5} SBAA2 52 BA2 DQ22 146
SBAA1 190 147 MDA23 TBC24
{5} SBAA1 BA1 DQ23
SBAA0 71 30 MDA24 1u/4/X5R/6.3V/K TBC21
{5} SBAA0 BA0 DQ24
31 MDA25 1u/4/X5R/6.3V/K
CKEA1 DQ25 MDA26 TBC11
{5} CKEA1 169 CKE1 DQ26 36
kn

CKEA0 50 37 MDA27 1u/4/X5R/6.3V/K TBC15


{5} CKEA0 CKE0 DQ27
149 MDA28 1u/4/X5R/6.3V/K
-CSA1 DQ28 MDA29 TBC17

o
{5} -CSA1 76 S1* DQ29 150
-CSA0 193 155 MDA30 1u/4/X5R/6.3V/K
{5} -CSA0 S0* DQ30
156 MDA31
-DCLKA1 DQ31 MDA32 TBC18
{5} -DCLKA1 64 CK1/NU* DQ32 81
DCLKA1 63 82 MDA33 1u/4/X5R/6.3V/K
{5} DCLKA1 CK1/NU DQ33
87 MDA34
DQ34

D
-DCLKA0 185 88 MDA35 TBC19
{5} -DCLKA0 CK0* DQ35
DCLKA0 184 200 MDA36 1u/4/X5R/6.3V/K
{5} DCLKA0 CK0 DQ36
201 MDA37
te

MAAA0 DQ37 MDA38 TBC20


{5} MAAA[0..15] 188 A0 DQ38 206
MAAA1 181 207 MDA39 1u/4/X5R/6.3V/K
MAAA2 A1 DQ39 MDA40
61 A2 DQ40 90
MAAA3 180 91 MDA41 TBC12
MAAA4 A3 DQ41 MDA42 1u/4/X5R/6.3V/K
59 A4 DQ42 96
MAAA5 58 97 MDA43
MAAA6 A5 DQ43 MDA44 TBC3
178 A6 DQ44 209
MAAA7 56 210 MDA45 1u/4/X5R/6.3V/K
MAAA8 A7 DQ45 MDA46
177 A8 DQ46 215
MAAA9 175 216 MDA47 TBC5
A9 DQ47
w.

MAAA10 70 99 MDA48 1u/4/X5R/6.3V/K


MAAA11 A10/AP DQ48 MDA49
55 A11 DQ49 100
MAAA12 174 105 MDA50 TBC6
MAAA13 A12 DQ50 MDA51 1u/4/X5R/6.3V/K
196 A13 DQ51 106
MAAA14 172 218 MDA52
MAAA15 A14 DQ52 MDA53 TBC7
171 A15 DQ53 219
224 MDA54 1u/4/X5R/6.3V/K
DQ54 MDA55
{5,8} -DDR3_RST 168 RESET* DQ55 225
A -SCASA 74 108 MDA56 TBC8 A
{5} -SCASA CAS* DQ56
-SRASA 192 109 MDA57 1u/4/X5R/6.3V/K
{5} -SRASA RAS* DQ57
-SWEA 73 114 MDA58
ww

{5} -SWEA WE* DQ58


115 MDA59
DQ59 MDA60
DQ60 227
228 MDA61
DQ61 MDA62
DQ62 233
234 MDA63
DQ63

DDR3/240/BU/VA/D
Gigabyte Technology
Title
DDRIII CHANNEL A
Size Document Number Rev
Custom GA-H61-S3 1.0
Date: Sheet 7 of 34
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

DDR3_2

120 48 DDR_15V
DDRVTT VTT FREE
240 VTT FREE 49
FREE 187
2 198 TR13
VSS FREE 1K/4/1
5 VSS
8 VSS RSVD 79
11 VREFCA_B
VSS MODT_B1
14 VSS ODT1 77
17 195 MODT_B0 TR12
VSS ODT0 1K/4/1
20 VSS
23 VSS NC/PAR_IN 68
26 VSS NC/ERR_OUT 53
29 VSS NC/TEST4 167
32 VSS
35 VSS CB0 39
38 40

m
VSS CB1
D
41 VSS CB2 45 D
44 VSS CB3 46
47 VSS CB4 158
80 159 DDR_15V
VSS CB5
83 164

l
VSS CB6

co
-DQSB[0..7] 86 165
-DQSB[0..7] {5} VSS CB7
89 VSS
92 TR11
DQSB[0..7] VSS DQSB0 1K/4/1
95 7

a
DQSB[0..7] {5} VSS DQS0
98 6 -DQSB0
VSS DQS0* VREFDQ_B
101 VSS VREF_DQB {5}

i
104 16 DQSB1
VSS DQS1 -DQSB1 TR10
107 VSS DQS1* 15
110 1K/4/1

t
MODT_B[0..1] VSS DQSB2
MODT_B[0..1] {5} 113 VSS DQS2 25
116 24 -DQSB2

a.
VSS DQS2*
119 VSS
121 34 DQSB3
VSS DQS3

n
124 33 -DQSB3
VSS DQS3*
127
130
VSS
VSS DQS4 85 DQSB4 DDR3 1066,1333,1600MHZ BANDWIDTH
133 84 -DQSB4

e
VSS DQS4*
136 VSS
139 94 DQSB5
142
VSS DQS5
93 -DQSB5 DDR3 1066MHZ
VSS DQS5*
145 VSS DDR3 clock=533MHZ

if d
DQSB6

si
148 VSS DQS6 103
151 102 -DQSB6 DDR3 single channel bandwidth=533x2x8Byte=8.5GB/s
VSS DQS6*
154 VSS
157
160
VSS DQS7 112
111
DQSB7
-DQSB7
DDR3 dual channel bandwidth=533x2x2x8Byte=17GB/s
VSS DQS7*
163 VSS
166 VSS DQS8 43
199 VSS DQS8* 42
202 VSS
205 125

n
VSS DM0/DQS9
208 VSS NC/DQS9* 126 DDR3 1333MHZ

ne
211 VSS
214
217
VSS DM1/DQS10 134
135
DDR3 clock=667MHZ

o
VSS NC/DQS10*
C 220
223
VSS
143
DDR3 single channel bandwidth=10.6GB/s C

VSS DM2/DQS11
226
229
VSS NC/DQS11* 144 DDR3 dual channel bandwidth=21GB/s
VSS
232 VSS DM3/DQS12 152
235 153

C
VSS NC/DQS12*
239 VSS
203

do
DM4/DQS13
NC/DQS13* 204 DDR3 1600MHZ
51 VDD DM5/DQS14 212 DDR3 clock=800MHZ

e
54 VDD NC/DQS14* 213
57
60
VDD
221
DDR3 single channel bandwidth=12.8GB/s

t
VDD DM6/DQS15
62
65
VDD NC/DQS15* 222 DDR3 dual channel bandwidth=25.6GB/s
VDD
66 VDD DM7/DQS16 230
DDR_15V 69 231

y
VDD NC/DQS16*

in
72

y
VDD
75 VDD DM8/DQS17 161
78 VDD NC/DQS17* 162
170 VDD

b
173 VDD MDB0

p
176 VDD DQ0 3 MDB[0..63] {5}
179 4 MDB1
VDD DQ1 MDB2
182 VDD DQ2 9
MDB3

a
183 VDD DQ3 10
MDB4

o
186 VDD DQ4 122
189 123 MDB5

i-
VDD DQ5 MDB6 VCC3
191 VDD DQ6 128
MDB7

g
194 VDD DQ7 129
197 12 MDB8
TC11 0.1u/4/X7R/16V/K VDD DQ8 MDB9 COUPON1 COUPON1
13 1 2 COUPON/X

i
DQ9

C
236 18 MDB10
VCC3 VDDSPD DQ10
19 MDB11
DQ11 MDB12
DQ12 131
TC13 0.1u/4/X7R/16V/K VREFCA_B 67 132 MDB13
TC9 0.1u/4/X7R/16V/K VREFDQ_B VREFCA DQ13 MDB14
1 VREFDQ DQ14 137

G n ot
138 MDB15 COUPON2 COUPON2 1 2 COUPON/X
DQ15 MDB16
B
{7,12,14,15,17,23,30} SMBCLK
{7,12,14,15,17,23,30} SMBDATA
SMBCLK
SMBDATA
118
238
SCL
SDA
DQ16
DQ17
DQ18
21
22
27
MDB17
MDB18
is B

237 28 MDB19
VCC3 SA1 DQ19
117 140 MDB20
SA0 DQ20 MDB21
DQ21 141
SBAB2 52 146 MDB22
{5} SBAB2 BA2 DQ22
SBAB1 190 147 MDB23
{5} SBAB1 BA1 DQ23
SBAB0 71 30 MDB24
{5} SBAB0 BA0 DQ24 MDB25
DQ25 31
CKEB1 169 36 MDB26
{5} CKEB1 CKE1 DQ26
kn

CKEB0 50 37 MDB27
{5} CKEB0 CKE0 DQ27
149 MDB28
-CSB1 DQ28 MDB29

o
{5} -CSB1 76 S1* DQ29 150
-CSB0 193 155 MDB30
{5} -CSB0 S0* DQ30
156 MDB31
-DCLKB1 DQ31 MDB32
{5} -DCLKB1 64 CK1/NU* DQ32 81
DCLKB1 63 82 MDB33
{5} DCLKB1 CK1/NU DQ33
87 MDB34
DQ34

D
-DCLKB0 185 88 MDB35
{5} -DCLKB0
{5} DCLKB0
DCLKB0 184
CK0*
CK0
DQ35
DQ36 200
201
MDB36
MDB37 CPU
te

MAAB0 DQ37 MDB38


{5} MAAB[0..15] 188 A0 DQ38 206
MAAB1 181 207 MDB39
MAAB2 A1 DQ39 MDB40
61 A2 DQ40 90
MAAB3 180 91 MDB41
MAAB4 A3 DQ41 MDB42
59 A4 DQ42 96
MAAB5 58 97 MDB43
MAAB6
MAAB7
178
56
A5
A6
A7
DQ43
DQ44
DQ45
209
210
MDB44
MDB45 DIMM1 CHA
MAAB8 177 215 MDB46
MAAB9 A8 DQ46 MDB47
175 216
A9 DQ47 DIMM2 CHB
w.

MAAB10 70 99 MDB48
MAAB11 A10/AP DQ48 MDB49
55 A11 DQ49 100
MAAB12 174 105 MDB50
MAAB13 A12 DQ50 MDB51
196 A13 DQ51 106
MAAB14 172 218 MDB52
MAAB15 A14 DQ52 MDB53
171 A15 DQ53 219
224 MDB54
DQ54 MDB55
{5,7} -DDR3_RST 168 RESET* DQ55 225
A -SCASB 74 108 MDB56 A
{5} -SCASB CAS* DQ56
-SRASB 192 109 MDB57
{5} -SRASB RAS* DQ57
-SWEB 73 114 MDB58
ww

{5} -SWEB WE* DQ58


115 MDB59
DQ59 MDB60
DQ60 227
228 MDB61
DQ61 MDB62
DQ62 233
234 MDB63
DQ63

DDR3/240/BU/VA/D
Gigabyte Technology
Title
DDRIII CHANNEL B
Size Document Number Rev
Custom GA-H61-S3 1.0
Date: Sheet 8 of 34
8 7 6 5 4 3 2 1
5 4 3 2 1

USB:12/7.5/4.5/7.5/12 (breakout min 8/4/4/4/8)


Impedance=90 +- 17.5%
PCHB PCHG

DMI_0TXN D33 BF36 -USBP0


{4} DMI_0TXN DMI0RXN USBP0N -USBP0 {29}
{4} DMI_0TXP
DMI_0TXP B33 DMI0RXP USBP0P BD36 +USBP0
+USBP0 {29} FDILINK
DMI_0RXN J36 BC33 -USBP1 C42 FDI_TXN0
{4} DMI_0RXN DMI0TXN USBP1N -USBP1 {29} FDI_RXN0
DMI_0RXP H36 BA33 +USBP1 B43 FDI_TXP0
{4} DMI_0RXP +USBP1 {29}

m
DMI_1TXN DMI0TXP USBP1P -USBP2 FDI_RXP0 FDI_TXN1
D {4} DMI_1TXN A36 DMI1RXN USBP2N BM33 -USBP2 {29} H31 TP21 FDI_RXN1 F45 D
DMI_1TXP B35 BM35 +USBP2 J31 F43 FDI_TXP1
{4} DMI_1TXP DMI1RXP USBP2P +USBP2 {29} TP25 FDI_RXP1
DMI_1RXN P38 BT33 -USBP3 C29 H41 FDI_TXN2
{4} DMI_1RXN DMI1TXN USBP3N -USBP3 {29} TP29 FDI_RXN2
DMI_1RXP R38 BU32 +USBP3 E29 J41 FDI_TXP2

co
{4} DMI_1RXP DMI1TXP USBP3P +USBP3 {29} TP33 FDI_RXP2

DMI
DMI_2TXN B37 BR32 -USBP4 C46 FDI_TXN3
{4} DMI_2TXN DMI2RXN USBP4N -USBP4 {32} FDI_RXN3
DMI_2TXP C36 BT31 +USBP4 J27 D47 FDI_TXP3
{4} DMI_2TXP DMI2RXP USBP4P +USBP4 {32} TP22 FDI_RXP3
DMI_2RXN H38 BN29 -USBP5 L27 B45 FDI_TXN4

a
{4} DMI_2RXN DMI2TXN USBP5N -USBP5 {32} TP26 FDI_RXN4
DMI_2RXP J38 BM30 +USBP5 F28 A46 FDI_TXP4
{4} DMI_2RXP DMI2TXP USBP5P +USBP5 {32} TP30 FDI_RXP4

ti
DMI_3TXN E37 BK33 E27 B47 FDI_TXN5
{4} DMI_3TXN DMI3RXN USBP6N TP34 FDI_RXN5
{4} DMI_3TXP
DMI_3TXP
DMI_3RXN
F38
M41
DMI3RXP USBP6P BJ33
BF31
H61 CHIP USB PORT 6/7 J25
FDI_RXP5 C49
J43
FDI_TXP5
FDI_TXN6
{4} DMI_3RXN
DMI_3RXP P41
DMI3TXN USBP7N
BD31 are Disable L25
TP23 FDI_RXN6
H43 FDI_TXP6

a.
W=4 mil out of PCH {4} DMI_3RXP DMI3TXP USBP7P TP27 FDI_RXP6
DMI_COMP B31 BN27 -USBP8 C26 M43 FDI_TXN7
S=15 mil out of PCH VCC1_05_PCH DMI_IRCOMP USBP8N -USBP8 {32} TP31 FDI_RXN7
R350 49.9/4/1 E31 BR29 +USBP8 B27 P43 FDI_TXP7

n
DMI_ZCOMP USBP8P +USBP8 {32} TP35 FDI_RXP7
BR26 -USBP9
USBP9N -USBP9 {32}
-SRCCLK_PCH P33 BT27 +USBP9 L22
{30} -SRCCLK_PCH CLKIN_DMI_N USBP9P +USBP9 {32} TP24

e
SRCCLK_PCH R33 BK25 J22 B51 FDI_FSYNC0
{30} SRCCLK_PCH CLKIN_DMI_P USBP10N TP28 FDI_FSYNC0 FDI_FSYNC0 {4}
BJ25 B25 E49 FDI_LSYNC0
USBP10P TP32 FDI_LSYNC0 FDI_FSYNC1 FDI_LSYNC0 {4}
USBP11N BJ31 D25 TP36 FDI_FSYNC1 C52 FDI_FSYNC1 {4}
J20 BK31 D51 FDI_LSYNC1

if d

si
{15} PCIE_IN1 PERN1 USBP11P FDI_LSYNC1 FDI_LSYNC1 {4}
L20 BF27

USB
{15} PCIE_IP1 PERP1 USBP12N
{15} PCIE_TN1
C18
C17
0.1u/4/X7R/16V/K
0.1u/4/X7R/16V/K
PET_N1
PET_P1
F25
F23
PETN1 USBP12P BD27
BJ27
H61 CHIP USB PORT 12/13 FDI_INT H46 FDI_INT
FDI_INT {4}
{15} PCIE_TP1
{15} PCIE_IN2 P20
PETP1
PERN2
USBP13N
USBP13P BK27 are Disable FDI_TXP[0..7]
FDI_TXP[0..7] {4}
R20 7 OF 11
{15} PCIE_IP2 PERP2
{15} PCIE_TN2
C2 0.1u/4/X7R/16V/K PET_N2 C22 PETN2 OC0#/GPIO59 BM43 OC[3:0]# for BD82H61/B3/S FDI_TXN[0..7]
FDI_TXN[0..7] {4}
C3 0.1u/4/X7R/16V/K PET_P2 A22 BD41 -USBOC_F
Device 29

n
{15} PCIE_TP2 PETP2 OC1#/GPIO40 -USBOC_F {29}
H17 BG41

ne
PERN3 OC2#/GPIO41
J17 PERP3 OC3#/GPIO42 BK43 (ports 0-7)
E21 BP43

o
PETN3 OC4#/GPIO43
C B21 PETP3 OC5#/GPIO9 BJ41 -USBOC_R {29,32} OC[7:4]# for C
P17 BT45 PCHE
{16} PCIEBIN PERN4 OC6#/GPIO10 Device 26
PCI-E
M17 BM45 GPIO14
{16} PCIEBIP PERP4 OC7#/GPIO14
{16} PCIEBON
C15 0.1u/4/X7R/16V/K PET_N4 F18 PETN4 (ports 8-13)

C
C16 0.1u/4/X7R/16V/K PET_P4 E17 M48 AB50
{16} PCIEBOP PETP4 USBRBIAS NV_ALE NV_DQ0/NV_IO0
R341 22.6/4/1 NV_CLE

do
N15 PERN5 USBRBIAS# BP25 R47 NV_CLE NV_DQ1/NV_IO1 Y50
M15 BM25 Y41 AB49
B17
PERP5 USBRBIAS W=4 mil out of PCH USB OC# Configure M50
NV_RB# NV_DQ2/NV_IO2
AB44
PETN5 S=15 mil out of PCH NV_RE#_WRB0 NV_DQ3/NV_IO3

e
C16 PETP5 -DOTCLK
OC0# USB0,1 M49 NV_RE#_WRB1 NV_DQ4/NV_IO4 U49
{32} ML_IN J15 PERN6 CLKIN_DOT_96N BD38 -DOTCLK {30} U43 NV_WE#_CK0 NV_DQ5/NV_IO5 R44

t
L15 BF38 DOTCLK OC1# USB2,3 J57 U50
{32} ML_IP PERP6 CLKIN_DOT_96P DOTCLK {30} NV_WE#_CK1 NV_DQ6/NV_IO6
C41 0.1u/4/X7R/16V/K PET_N6 A16 U46
{32} ML_ON PETN6 NV_DQ7/NV_IO7
C33 0.1u/4/X7R/16V/K PET_P6 B15 OC2# USB4,5 U44
{32} ML_OP PETP6 NV_DQ8/NV_IO8

y
R351 750/4/1

in
J12 A32 H50

y
PERN7 DMI2RBIAS NV_DQ9/NV_IO9
H12 PERP7 W=4 mil out of PCH
OC3# USB6,7 NV_DQ10/NV_IO10 K46
F15 PETN7 NV_DQ11/NV_IO11 L56
H61 CHIP PCIE PORT 7/8 F13 S=15 mil out of PCH
OC4# USB8,9 J55

b
PETP7 NV_DQ12/NV_IO12

p
H10 F53
are Disable J10
PERN8
PERP8 OC5# USB10,11
NV_DQ13/NV_IO13
NV_DQ14/NV_IO14 H52
B13 E52

a
PETN8 NV_DQ15/NV_IO15

o
D13 PETP8 OC6# USB12,13

i-
2 OF 11
OC7# Not Use

g
BD82H61/B3/S K50
NV_CE#0
放靠近 Device & PCI-E Slot

i
K49

C
NV_CE#1
NV_CE#2 AB46
PCIEX1:16/5/5/5/16 (breakout min 8/4/4/4/8) NV_CE#3 G56
Impedance=80 +- 17.5%

G n ot
B
is VCC1_05_PCH
R244 8.2K/4/X DOTCLK
NV_DQS0
NV_DQS1
Y44
L53
B

-USBOC_F -USBOC_R 3VDUAL Mount for non-graphics skus R50 NV_RCOMP


NV_RCOMP
VCC3
BC168
0.1u/4/X7R/16V/K
BC170
0.1u/4/X7R/16V/K R371
NVRAM R422 33/4

BC178 8.2K/4 5 OF 11
kn

1u/4/X5R/6.3V/K BD82H61/B3/S
GPIO14 DOTCLK R246 8.2K/4

o
-DOTCLK R251 8.2K/4
R102 short to GND in non
graphic SKU
PCH_HS SRCCLK_PCH R267 8.2K/4

D
-SRCCLK_PCH R268 8.2K/4
1
te

VCC1_8_PCH

R407
w.

1K/4/1

R408 8.2K/4 NV_CLE

A
-H_SNB {4} DMI /FDI termination voltage A
ww

BC186
0.1u/4/X7R/16V/K
2
Gigabyte Technology
SB_HS/[12SP2-030005-42R_12SP2-030005-43R] Title
PCH FDI,DMI,USB ,PCIE
Size Document Number Rev
Custom 1.0
GA-H61-S3
Date: Tuesday, August 16, 2011 Sheet 9 of 34
5 4 3 2 1
5 4 3 2 1

PCHF PCHH
-PCHCLK R254 8.2K/4
T1 AR4 H_SYNC R740 33/4 GHSYNC R27 -PCHCLK PCHCLK R250 8.2K/4
DDPB_HPD CRT_HSYNC CLKIN_GND1_N -PCHCLK {30}
N2 AR2 V_SYNC R741 33/4 GVSYNC P27 PCHCLK
DDPC_HPD CRT_VSYNC CLKIN_GND1_P PCHCLK {30}
M1 DDPD_HPD
AN6 R AT11 W53 -CLK_GND -CLK_GND R402 8.2K/4
CRT_RED G CLKOUT_PCI0 CLKIN_GND0_N CLK_GND CLK_GND R403 8.2K/4
R8 DDPB_AUXP CRT_GREEN AN2 CLKIN_GND0_P V52
R9 AM1 B R286 33/4 AN14
DDPB_AUXN CRT_BLUE {18} LPC33 CLKOUT_PCI1
U14 DDPC_AUXP CLKOUT_ITPXDP_N R52
U12 AM6 R313 33/4 AT12 N52
DDPC_AUXN CRT_IRTN {11} PCH33 CLKOUT_PCI2 CLKOUT_ITPXDP_P
N6 DDPD_AUXP
R6 AT17 AE2 R393 0/4/SHT/M/X
DDPD_AUXN CLKOUT_PCI3 CLKOUT_PCIE7N -PCIE_CLK1 {15}
AF1 R394 0/4/SHT/M/X

m
D CLKOUT_PCIE7P PCIE_CLK1 {15} D
R14 AW1 DDCDATA AT14
DDPB_0P CRT_DDC_DATA DDCCLK CLKOUT_PCI4 -CLK_CPU R347 0/4/SHT/M/X
R12 DDPB_0N CRT_DDC_CLK AW3 Flex0,2 : 33MHZ CLKOUT_DMI_N P31 -CPUCLK {4}
M11 R31 CLK_CPU R346 0/4/SHT/M/X
DDPB_1P CLKOUT_DMI_P CPUCLK {4}
VGA_RSET R315 1K/4/1 Flex1,3 :

l
M12 AT3

co
DDPB_1N DAC_IREF
H8 DDPB_2P 27/14/24/48/25MHZ CLKOUT_DP_N N56
K8 Pop 0/4 for non graphic skus AT9 M55
DDPB_2N R710 0/4/X CLKOUTFLEX0/GPIO64 CLKOUT_DP_P
L5 BA5

a
DDPB_3P {30} LPCCLK48_BF CLKOUTFLEX1/GPIO65
M3 AW5 AE6 R302 0/4/SHT/M/X
DDPB_3N CLKOUTFLEX2/GPIO66 CLKOUT_PCIE0N -PCIE_CLK2 {15}

ti
L2 R262 33/4 PCH_48M BA2 AC6 R303 0/4/SHT/M/X
DDPC_0P {18} LPCCLK48 CLKOUTFLEX3/GPIO67 CLKOUT_PCIE0P PCIE_CLK2 {15}
J3 DDPC_0N TP6 Y18
G2 DDPC_1P TP7 Y17 CLKOUT_PCIE1N AA5
G4 AB18 R316 90.9/4/1 CLK_RCOMP AL2 W5
DDPC_1N TP8 VCC1_05_PCH XCLK_RCOMP CLKOUT_PCIE1P

a.
F3 DDPC_2P TP9 AB17
F5 PCHCLK14 AN8 AB12 R310 0/4/SHT/M/X
{30} PCHCLK14 -SRCCLK_LAN {32}

n
DDPC_2N REFCLK14IN CLKOUT_PCIE2N R325 0/4/SHT/M/X
E4 DDPC_3P CLKOUT_PCIE2P AB14 SRCCLK_LAN {32}
E2 DDPC_3N
D5 AB9

e
DDPD_0P PCHCLK14 R231 8.2K/4 CLKOUT_PCIE3N
B5 DDPD_0N CLKOUT_PCIE3P AB8
C6 DDPD_1P
D7 XTALO_PCH AJ5 Y9
DDPD_1N XTAL25_OUT CLKOUT_PCIE4N

if d

si
B7 DDPD_2P CLKOUT_PCIE4P Y8
C9 XTALI_PCH AJ3
DDPD_2N XTAL25_IN
E11 DDPD_3P CLKOUT_PCIE5N AF3
B11 DDPD_3N CLKOUT_PCIE5P AG2

XTALI_PCH AB3 R321 0/4/SHT/M/X


CLKOUT_PCIE6N -PBCLK {16}
U2 AL12 DDPC_CTRLCLK AA2 R322 0/4/SHT/M/X
SDVO_INTP DDPC_CTRLCLK CLKOUT_PCIE6P PBCLK {16}
T3 AL14 DDPC_CTRLDATA R282

n
SDVO_INTN DDPC_CTRLDATA X2 1M/4 -SRCCLK1 R300 0/4/SHT/M/X
AG8

ne
CLKOUT_PEG_A_N -SRCCLK_3GIO {14}
C W3 AL9 DDPD_CTRLCLK XTALO_PCH AG9 SRCCLK1 R301 0/4/SHT/M/X C
SDVO_STALLP DDPD_CTRLCLK CLKOUT_PEG_A_P SRCCLK_3GIO {14}
U5 AL8 DDPD_CTRLDATA

o
SDVO_STALLN DDPD_CTRLDATA 25M/20p/30ppm/49US/20/D
CLKOUT_PEG_B_N AE12
U8 AL15 DDPB_CTRLCLK 8 OF 11 AE11
SDVO_TVCLKINP SDVO_CTRLCLK DDPB_CTRLDATA CLKOUT_PEG_B_P
U9 SDVO_TVCLKINN SDVO_CTRLDATA AL17
C107 C106

C
27p/4/NPO/50V/J 27p/4/NPO/50V/J Differential Clock:18/6/4/6/18
6 OF 11 BD82H61/B3/S Impedance=90 +- 15%

do
BD82H61/B3/S

e
VCC3 VCC3 VCC3 VCC3

y t
in
y
R314 R294 R296 R297 R631 R632 R287 R295
2.2K/4/1 2.2K/4/1 2.2K/4/1/X 2.2K/4/1/X 2.2K/4/1/X 2.2K/4/1/X 2.2K/4/1/X 2.2K/4/1/X

a b o p
DDCDATA DDPB_CTRLCLK DDPC_CTRLCLK DDPD_CTRLCLK

i-
DDCCLK DDPB_CTRLDATA DDPC_CTRLDATA DDPD_CTRLDATA

i g C
Check if NC for P67 non graphic chip
B B
FUSEVCC_R1

G n ot
is
BC264
0.1u/4/Y5V/16V/Z/X
VCC

16
VGA
kn

Q108 6
2N7002/SOT23/25pF/5 R742 R743 VGA_R 1 11

o
ESD11 2.2K/4/1 2.2K/4/1 7

G
GVSYNC R744 2 VGA_G 2 12 VGADDCDATA
VCC
GVSYNC 1 6 VGADDCCLK 1K/4/1 3 VGADDCDATA 8

D
C200 DDCDATA 1 VGA_B 3 13 GHSYNC
100p/4/NPO/50V/J Q109

D S
2 5 VCC 9
2N7002/SOT23/25pF/5 4 14 GVSYNC

SOT23
te

G
VGADDCDATA 3 4 GHSYNC C201 GHSYNC R745 2 10
VCC
0.1u/4/X7R/16V/K 1K/4/1 3 VGADDCCLK 5 15 VGADDCCLK

D
C202 DDCCLK 1
AOZ8902CIL/SOT23-6 100p/4/NPO/50V/J

17
SOT23
SSOP6_ESD
w.

ESD12 R FB12 60/6/3A/S VGA_R VGA/BU/SC-11/RA/D/L


A G FB13 60/6/3A/S VGA_G A
1 6 R B FB14 60/6/3A/S VGA_B

2 5 VCC3
R746 R748
B 3 4 G C209 75/4/1 75/4/1
0.1u/4/X7R/16V/K
Gigabyte Technology
ww

AOZ8902CIL/SOT23-6 R747 C203C204C205 C206 C207 C208 Title


75/4/1 10p/4/NPO/50V/J 22p/4/NPO/50V/J PCH DISPLAY ,CLK BUFFER
10p/4/NPO/50V/J 22p/4/NPO/50V/J
Close to Filter 10p/4/NPO/50V/J 22p/4/NPO/50V/J Size Document Number Rev
Custom 1.0
GA-H61-S3
Date: Tuesday, August 16, 2011 Sheet 10 of 34
5 4 3 2 1
5 4 3 2 1

SRCCLK_SATA R265 8.2K/4


SATA:20/4.5/7.5/4.5/20 (breakout min 8/4/4/4/8) -SRCCLK_SATA R266 8.2K/4
Impedance=90 +- 17.5%
PCHC PCHA
AC56 SATA0RXN MB-ID BH8
SATA0RXN SATA0RXP -DEVSEL PAR
SATA0RXP AB55 BH9 DEVSEL# AD0 BF15
AE46 SATA0TXN R331 8.2K/4/X GPIO17 PCH33 BD15 BF17
For WIFI SATA0TXN {10} PCH33 CLKIN_PCILOOPBACK AD1
AE44 SATA0TXP R468 8.2K/4/X GPIO19 AV14 BT7
SATA0TXP SATA1RXN -IRDY PCIRST# AD2
AA53 BF11 BT13

SATA3
SATA1RXN SATA1RXP IRDY# AD3 RN10 VCC3
BA50 CL_CLK1 SATA1RXP AA56 TP11 AV15 PME# AD4 BG12

CLINK

m
D
BF50 AG49 SATA1TXN VCC3 -SERR BR6 BN11 8.2K/8P4R/4 D
CL_DATA1 SATA1TXN SATA1TXP -STOP SERR# AD5 -DEVSEL
BF49 CL_RST1# SATA1TXP AG47 BC12 STOP# AD6 BJ12 1 2
R547 0/4/SHT/M/X GPIO21 R455 8.2K/4 -PLOCK BA17 BU9 -REQ3 3 4
{12,18,30} PWROK1 PLOCK# AD7
GPIO19 R456 8.2K/4 -TRDY -REQ0

l
BC8 BR12 5 6

co
ME_PWROK GPIO36 R439 8.2K/4/X -PERR TRDY# AD8 -TRDY
BC46 APWROK SATA2RXN AL50 BM3 PERR# AD9 BJ3 7 8
AL49 R434 8.2K/4/X GPIO37 R433 8.2K/4/X -FRAME BC11 BR9
SATA2RXP FRAME# AD10

a
C123 BN21 AL56 H61 FDI RX BJ10

SATA2
TP4 PWM0 SATA2TXN AD11
0.01u/4/X7R/25V/K/X TEMP_ALART- R415 8.2K/4 RN11

ti
TP6 BT21 PWM1 SATA2TXP AL53 PORT2.3 {18} TEMP_ALART- AD12 BM8
BM20 AN46 GPIO22 R420 8.2K/4 BF3 8.2K/8P4R/4
TP5 PWM2 SATA3RXN Disable AD13
BN19 AN44 R436 1K/4/1/X GPIO38 R435 8.2K/4 -GNT0 BA15 BN2 -PIRQF 1 2
TP7 PWM3 SATA3RXP {20} -GNT0 GNT0# AD14
AN56 GPIO39 R452 8.2K/4 -GNT1 AV8 BE4 -IRDY 3 4

a.
SATA3TXN {20} -GNT1 GNT1#/GPIO51 AD15
GPIO17 BT17 AM55 GPIO48 R440 8.2K/4 -GNT2 BU12 BE6 -FRAME 5 6
TACH0/GPIO17 SATA3TXP GNT2#/GPIO53 AD16

n
GPIO1 BR19 AN49 SATA4RXN GPIO16 R421 8.2K/4 -GNT3 BE2 BG15 -STOP 7 8
GPIO6 TACH1/GPIO1 SATA4RXN SATA4RXP GNT3#/GPIO55 AD17
BA22 TACH2/GPIO6 SATA4RXP AN50 AD18 BC6
GPIO7 BR16 AT50 SATA4TXN -GNT3 R312 8.2K/4 BT11 RN9

e
GPIO68 TACH3/GPIO7 SATA4TXN SATA4TXP AD19 8.2K/8P4R/4
BU16 TACH4_GPIO68 SATA4TXP AT49 AD20 BA14

FAN
GPIO69 BM18 AT46 SATA5RXN -REQ0 BG5 BL2 -REQ1 1 2
GPIO70 TACH5_GPIO69 SATA5RXN SATA5RXP VCC3 -REQ1 REQ0# AD21 -REQ2
BN17 AT44 BT5 BC4 3 4

if d

si
GPIO71 TACH6_GPIO70 SATA5RXP SATA5TXN -REQ2 REQ1#/GPIO50 AD22 -PIRQH
BP15 TACH7_GPIO71 SATA5TXN AV50 BK8 REQ2#/GPIO52 AD23 BL4 5 6
AV49 SATA5TXP A20GATE R453 8.2K/4 -REQ3 AV11 BC2 -PERR 7 8
SATA5TXP SERIRQ R437 8.2K/4 REQ3#/GPIO54 AD24
{18} SSTCTL BC43 SST AD25 BM13
AF55 -SRCCLK_SATA -KBRST R401 1K/4/1 BA9 RN8
CLKIN_SATA_N -SRCCLK_SATA {30} AD26
AG56 SRCCLK_SATA -INIT_3V R398 1K/4/1/X BF9 8.2K/8P4R/4
CLKIN_SATA_P SRCCLK_SATA {30} AD27
-GNT2 R311 1K/4/1/X -PIRQA BK10 BA8 -PIRQD 1 2

n
C {16} -PIRQA PIRQA# AD28 C
BF57 -GNT3 R293 1K/4/1/X -PIRQB BJ5 BF8 -PIRQC 3 4

ne
SATALED# -SATALED {29} {16} -PIRQB PIRQB# AD29
GPIO22 BA53 AJ55 -PIRQC BM15 AV17 -PIRQB 5 6
SCLOCK/GPIO22 SATAICOMPI {16} -PIRQC PIRQC# AD30
GPIO38 SATACOMP R390 37.4/4/1 -PIRQD -PIRQA

o
BE54 SLOAD/GPIO38 SATAICOMPO AJ53 VCC1_05_PCH {16} -PIRQD BP5 PIRQD# AD31 BK12 7 8
GPIO39 BF55 -PIRQE BN9
GPIO48 SDATAOUT0/GPIO39 GPIO21 W=4 mil out of PCH -PIRQF PIRQE#/GPIO2 RN7
AW53 SDATAOUT1/GPIO48 SATA0GP/GPIO21 BC54 AV9 PIRQF#/GPIO3
AY52 GPIO19 S=15 mil out of PCH -PIRQG BT15 8.2K/8P4R/4
SATA1GP/GPIO19 VCC3 PIRQG#/GPIO4

C
GPIO36 -PIRQH -PIRQG
GPIO

SATA2GP/GPIO36 BB55 BR4 PIRQH#/GPIO5 C/BE0# BN4 1 2


BG53 GPIO37 R337 1K/4/1/X GPIO69 R333 8.2K/4/X -PLOCK

do
SATA3GP/GPIO37 C/BE1# BP7 3 4
AU56 GPIO16 BG2 -PIRQE 5 6
SATA4GP/GPIO16 C/BE2#
BA56 TEMP_ALART-
PCI BP13 -SERR 7 8

e
SATA5GP/GPIO49 C/BE3#
AE54 1 OF 11

t
VCC3 SATA3COMPI SATA3COMP R391 49.9/4/1
AY20 NC_5 SATA3RCOMPO AE52 VCC1_05_PCH BD82H61/B3/S
RN13
W=4 mil out of PCH

y
8.2K/8P4R/4

in
TP16 AE50

y
1 2 GPIO70 S=15 mil out of PCH
3 4 GPIO6 SATA3RBIAS AC52 SATA3BIAS R392 750/4/1

b
5 6 GPIO17 5VSB

p
7 8 GPIO1 PECI

3
1 2 BB57 A20GATE
A20GATE {18}

a
A20GATE
4 GPIO71 -INIT_3V R335 Q27
HOST

3 BN56

o
INIT3_3V#
6 GPIO68 -KBRST 8.2K/4/X MMBT2222A/SOT23/600mA/40/X

i-
5 RCIN# BG56 -KBRST {18}
7 8 GPIO7 AV52 SERIRQ

g
SERIRQ SERIRQ {18} SOT23
B RN12 8.2K/8P4R/4 E56 -THRMTRIP B
THRMTRIP# -THRMTRIP {4}

i
SB_PECI R377 0/4/X PECI R334 1K/4/1/X SB_PECI

C
2

1
PECI H48 PECI {4,18} {18} PECI_CTL
PMSYNCH F55 PMSYNC {4} To prevent PCH PECI crosstalk to CPU when disable PCH PECI
3 OF 11

G n ot
BD82H61/B3/S
is
SATA2_0 SATA2_2
1 GND 1 GND
SATA0TXP 0.01u/4/X7R/25V/K C148 SATA0TXPC SATA4TXP 0.01u/4/X7R/25V/K C146 SATA4TXPC
kn

2 T+ 2 T+
SATA0TXN 0.01u/4/X7R/25V/K C145 SATA0TXNC 3 SATA4TXN 0.01u/4/X7R/25V/K C143 SATA4TXNC 3
T- T-

o
4 GND 4 GND
SATA0RXN 0.01u/4/X7R/25V/K C140 SATA0RXNC 5 SATA4RXN 0.01u/4/X7R/25V/K C138 SATA4RXNC 5
SATA0RXP 0.01u/4/X7R/25V/K C136 SATA0RXPC R- SATA4RXP 0.01u/4/X7R/25V/K C134 SATA4RXPC R-
6 R+ 6 R+
7 7

D
GND GND
te

SATA2/7/BU/H/OP/VA/D/1/B SATA2/7/BU/H/OP/VA/D/1/B

SATA2_1 SATA2_3
A 1 1 A
SATA1TXP 0.01u/4/X7R/25V/K C188 SATA1TXPC GND SATA5TXP 0.01u/4/X7R/25V/K C183 SATA5TXPC GND
2 T+ 2 T+
SATA1TXN 0.01u/4/X7R/25V/K C186 SATA1TXNC SATA5TXN 0.01u/4/X7R/25V/K C179 SATA5TXNC
w.

3 T- 3 T-
SATA1RXN 0.01u/4/X7R/25V/K C184 SATA1RXNC
4
5
GND
R-
SATA5RXN 0.01u/4/X7R/25V/K C176 SATA5RXNC
4
5
GND
R-
Gigabyte Technology
SATA1RXP 0.01u/4/X7R/25V/K C182 SATA1RXPC 6 SATA5RXP 0.01u/4/X7R/25V/K C173 SATA5RXPC 6 Title
R+ R+
7 GND 7 GND PCH HOST , SATA, PCI
Size Document Number Rev
B 1.0
GA-H61-S3
ww

SATA2/7/BU/H/OP/VA/D/1/B SATA2/7/BU/H/OP/VA/D/1/B
Date: Tuesday, August 16, 2011 Sheet 11 of 34
5 4 3 2 1
5 4 3 2 1

RN15
2.2K/8P4R/4 PCHD
1 2 GPIO11 AW55 GPIO0 3VDUAL
3VDUAL SML0DAT BMBUSY#_GPIO0 VCCSA_LEVEL
3 4 CLKRUN#_GPIO32 BC56 VCCSA_LEVEL {28}
5 6 SML1DAT R326 8.2K/4/X GPIO23 BA20 BC25 GPIO33 GP15:Low to Disable TLS,
VCC3 LDRQ1#/GPIO23 HDA_DOCK_EN#_GPIO33 GPIO33 {23}
7 8 SML0CLK LAD0 BK15 BL56 -PCI_STOP Hi to Enable TLS -RI R386 8.2K/4
{18} LAD0 FWH0/LAD0 STP_PCI#_GPIO34

LPC
LAD1 BJ17 BJ57 -ACZ_DET -LPCPME R340 8.2K/4
{18} LAD1 FWH1/LAD1 GPIO35 -ACZ_DET {22} GP8:Low to enable
1 2 SML1CLK LAD2 BJ20 GPIO15 R465 8.2K/4
{18} LAD2 FWH2/LAD2
3 4 -PCH_HOT LAD3 BG20 BP51 -IGC_EN PCH clock chip -SKTOCC R430 8.2K/4
{18} LAD3 FWH3/LAD3 GPIO8
5 6 GPIO60 -LDRQ0 BK17 BK50 GPIO12 R397 1K/4/1/X -IGC_EN R426 8.2K/4/X
{18} -LDRQ0 LDRQ0# LAN_PHY_PWR_CTRL_GPIO12 GP28:Lo disable
7 8 RN14 8.2K/8P4R/4 {18} -LFRAME
-LFRAME BG17 FWH4/LFRAME# HDA_DOCK_RST#_GPIO13 BA25 -LPCPME
-LPCPME {18}
GPIO28 R451 1K/4/1

m
D GPIO15 -SLP_LAN R417 8.2K/4/X D
BM55 VRM ,Hi enable
R378 1K/4/1 SMBCLK R332 33/4 BU22 GPIO15 R675 0/4/X R432 8.2K/4/X GPIO44 R450 8.2K/4
{21} ACZ_BITCLK HDA_BCLK GPIO24_MEM_LED BP53 -SKTOCC {4} VRM
R379 1K/4/1 SMBDATA R330 33/4 BC22 BJ55 GPIO28 R448 8.2K/4/X GPIO45 R463 8.2K/4
{21} -ACZ_RST HDA_RST# GPIO28 GPIO28 {29}
-SLP_LAN R464 8.2K/4/X GPIO46 R449 8.2K/4

l
BD22 BH49

co
HDA_SDIN0 SLP_LAN#_GPIO29 GPIO20 GPIO57 R388 8.2K/4
BF22 HDA_SDIN1 PCIECLKRQ2#_GPIO20 AV43

AUDIO
BK22 BL54 GPIO44 -SUSTAT R431 8.2K/4/X
{21} ACZ_SDIN2 HDA_SDIN2 PCIECLKRQ5#_GPIO44

a
R605 ACZ_SDOUT BJ22 AV44 GPIO45 SUSCLK R466 8.2K/4/X
8.2K/4 R338 33/4 A_SO HDA_SDIN3 PCIECLKRQ6#_GPIO45 GPIO46 R474 0/4/SHT/M/X -SLP_S5 R411 8.2K/4/X

i
3 {21} ACZ_SDOUT BT23 HDA_SDO PCIECLKRQ7#_GPIO46 BP55 -SPI_WP1 {20}
R336 33/4 A_SYC BP23 BT53 GPIO57 R429 0/4/SHT/M/X GPIO72 R389 8.2K/4
{21} ACZ_SYNC HDA_SYNC GPIO57 -SPI_WP0 {20}

t
BJ53 -PCIE_WAKE R428 8.2K/4
SYS_PWROK PCH_VRMPWRGD {23}
Q87 AU53 BJ48

a.
{20} ICH_SPI_MOSI SPI_MOSI RI# -RI {19}
{20} ICH_SPI_MISO AT55 SPI_MISO PLTRST# BK48 -PFMRST {18}
SOT23

SPI
n
GPIO27 R606 8.2K/4 AT57 BC44 3VDUAL_PCH
{20} -ICH_SPI_CS SPI_CS0# WAKE# -PCIE_WAKE {14,15,16,32}
PMBT2907A/SOT23/-600mA/50 -SLP_A -S_WARN R380 8.2K/4
2

{20} ICH_SPI_CLK AR54 SPI_CLK SLP_A# BC41


R607 R457 8.2K/4 AR56 BM53 GPIO27 R608 8.2K/4

e
3VDUAL_PCH VCC3 SPI_CS1# SLP_S3# -SLP_S3 {18,23,25,26}
0/4/X BN52 GPIO31 R385 8.2K/4
SLP_S4# -S4_S5 {18,26}
ACZ_SDOUT : Hi --> Disable ME BH50 -SLP_S5

if d

si
SLP_S5#_GPIO63 -SUSTAT
SUS_SATA#_GPIO61 BN54
GPIO15 BA47 SUSCLK VCC3
SUSCLK_GPIO62 GPIO72
BATLOW#_GPIO72 AV46
R475 -S_ACK C116 -PCI_STOP R399 8.2K/4
SUSACK# BP45 1u/4/X5R/6.3V/K/X
0/4/X BU46 -S_WARN R374 10/4 GPIO0 R454 8.2K/4
Y1 SUSWARN#_SUSPWRDNACK/GPIO30 DRAM_PWROK R447 1K/4/1/X GPIO20 R462 8.2K/4
BR39 BG46

n
C RTCX1 DRAMPWROK C

RTC
GPIO15 : Hi --> Enable TLS Y2 BN39 -ACZ_DET R400 8.2K/4

ne
-RTCRST RTCX2 -SYS_RST R427 1K/4/1
GPIO15 : Lo --> Disable BT41 RTCRST#
-SRTCRST GPIO27 VCCSA_LEVEL R467 1K/4/1

o
BN37 SRTCRST# GPIO27 BJ43
TLS R657 0/4/X PCH_DPWROK BT37 GPIO33 R339 1K/4/1
{18,25} -RSMRST DPWROK
-SRTCRST R360 20K/4/1 DSWVRMEN BR42 BG43 GPIO31 -SLP_A R539 8.2K/4/X
RTCVDD {13,29} DSWVRMEN GPIO31
C111 BD43 GPIO12 R409 8.2K/4
SLP_SUS# -DEPSLP {25}

C
1u/4/X5R/6.3V/K BT43 R658 0/4/SHT/X
PWRBTN# PWRBTSW {18}
R659 0/4/X

do
-PWRBTSW {18,29}
BE52 -SYS_RST
SYS_RESET# -SYS_RST {4,29,30}
BE56 SPKR
SPKR {29}

e
3VDUAL_PCH GPIO11 SPKR 3VDUAL
{29} GPIO11 BN49 SMBALERT#/GPIO11
SMBCLK BT47

t
{7,8,14,15,17,23,30} SMBCLK SMBCLK
SMBDATA BR49 PCH_RST R459 20K/4/1
{7,8,14,15,17,23,30} SMBDATA SMBDATA
R414 GPIO60 BU49 D53 CPUPWROK PCH_TDI R473 200/4/1
SML0ALERT#/GPIO60 PROCPWRGD CPUPWROK {4,25}

SMB
y
8.2K/4 SML0CLK PCH_TDO R410 200/4/1

in
BT51 SML0CLK

y
SML0DAT BM50 PCH_TMS R460 200/4/1
PCH_DPWROK -PCH_HOT SML0DATA PCH_TCK R461 200/4/1/X
{19} -PCH_HOT BR46 SML1ALERT#_PCHHOT#_GPIO74
3

5VSB

b
{18} SML1CLK BJ46

p
SML1CLK/GPIO58 PCH_RST
{18} SML1DAT BK46 SML1DATA/GPIO75 TP12 BC49
D C112 PCH_TCK PCH_RST R444 100/4/1/X
BA43

a
R395 1n/4/X7R/50V/K JTAG_TCK PCH_TDI PCH_TDI R471 100/4/1
BC52

o
22K/4 G S JTAG_TDI PCH_TDO PCH_TDO R396 100/4/1

i-
JTAG_TDO BF47
SOT23 BC50 PCH_TMS PCH_TMS R445 100/4/1

g
JTAG_TMS
3

PCH_TCK R446 51/4/1


2

B B

i C
3VDUAL_PCH Q31 BN41 INTVRMEN
2N7002/SOT23/25pF/5 4 OF 11 INTVRMEN -RSMRST
RSMRST# BK38 -RSMRST {18,25}
R413 75K/4/1 SOT23 PWROK1

G n ot
PWROK BJ38 PWROK1 {11,18,30}
At least 10ms delay after R365 1M/4
2

R412 27K/4/1
3VDUAL_PCH stabel
is INTRUDER# BM38 RTCVDD {13,29}
BD82H61/B3/S
Q32
C122 1u/4/X5R/6.3V/K MMBT2222A/SOT23/600mA/40
kn

BATTERY-DUAL-4

o
BATTERY R369 390K/4 DSWVRMEN
CR2032 DDR_15V
X3-SHT D8 RTCVDD
CR2032 RTCVDD {13,29}
SHW/D0.64*5.08*6.74 BAS40-05/0.2A/SOT23

D
R368 390K/4 INTVRMEN R382
Y1 + 1K/4/1
te

3VDUAL_PCH 2
Y2 10M/4 R381 3 R364 20K/4/1 -RTCRST
2 1 VBATT RB 1K/4/1 1 DRAM_PWROK
DRAM_PWROK {4}
C110
4

X3 RB 必須放在BAT外 1u/4/X5R/6.3V/K C113


A BAT 1u/4/X5R/6.3V/K R383 A
BAT-SK/BK/P/S/D/SN 3K/4/1/X
w.

VBAT
Gigabyte Technology
3

VBAT {18}
CLR_CMOS Title
32.768K/12.5p/20ppm/TF38/35K/D -RTCRST PCH GPIO , CTRL , AUDIO
C117 C118 Size Document Number Rev
18P/4/NPO/50V/J 18P/4/NPO/50V/J PH/1*2/BK/2.54/VA/D B 1.0
GA-H61-S3
ww

Date: Tuesday, August 16, 2011 Sheet 12 of 34


5 4 3 2 1
5 4 3 2 1

VCC1_05_PCH 3VDUAL 5VDUAL VCC3


C108 VCC
0.1u/4/X7R/16V/K
PCHI

3
R283 BC138 1u/4/X5R/6.3V/K
R349 100/4/1 1 2 VCC3
F20 AC24 100/4/1 PCHJ R299 0/4/SHT/M/X VCC1_8_PCH VCC3_ME 3 4
VCC1_05_PCH VCCIO VCCCORE
F30 AC26 1u/4/X5R/6.3V/K 5 6
VCCIO VCCCORE SOT23 SOT23 V5REF BC131
V25 VCCIO VCCCORE AC28 BF1 V5REF 7 8
VCC1_05_PCH R284 0/4/SHT/M/X RN16 0/8P4R/0402/SHT/X

1
V27 VCCIO VCCCORE AC30 VCCVRM AJ1 VCC1_8_PCH
BC145 V31 AC32 Q28 Q24 V5REF_SUS BT25 R2
1u/4/X5R/6.3V/K VCCIO VCCCORE MMBT2222A/SOT23/600mA/40 MMBT2222A/SOT23/600mA/40 V5REF_SUS VCCVRM BC181 1u/4/X5R/6.3V/K
V33 VCCIO VCCCORE AE24 VCCVRM R54
Y24 AE28 BC155 AV28 R56 R406 0/4/SHT/M/X VCC1_8_PCH
VCCIO VCCCORE 3VDUAL VCCSUSHDA VCCVRM
Y26 AE30 1u/4/X5R/6.3V/K BC143
VCCIO VCCCORE 1u/4/X5R/6.3V/K
Y30 VCCIO VCCCORE AE32
BC235 Y32 AE34 AU20 T55 NV_PCH R405 0/4/SHT/M/X VCC1_8_PCH VCC1_05_ME 1 2
VCCIO VCCCORE VCC3_3 VCCPNAND VCC1_05_PCH
1u/4/X5R/6.3V/K/X BC146 Y34 AE36 AV20 T57 R404 0/4/X VCC3 3 4
VCCIO VCCCORE VCC3 VCC3_3 VCCPNAND
1u/4/X5R/6.3V/K

m
VCCCORE AG32 AU22 VCC3_3 5 6
D AG34 BC156 AL38 7 8 D
BC126 VCCCORE 1u/4/X5R/6.3V/K VCC3_3 BC180 1u/4/X5R/6.3V/K RN6 0/8P4R/0402/SHT/X
VCCCORE AJ32 VCC3_3 AN38
1u/4/X5R/6.3V/K AJ34 AN52 VCC3
VCCCORE VCC3_ME VCCSPI
VCCCORE AJ36 VCC3_3 BC17

co
BC147 AL32 BD17
1u/4/X5R/6.3V/K VCCCORE VCC3_3
AA34 VCCIO VCCCORE AL34 VCC3_3 BD20
AA36 AN32 BC154
VCCIO VCCCORE 1u/4/X5R/6.3V/K
V22 AN34 A12

a
VCC1_05_ME VCC3 VCCIO VCCCORE VCC3_3
Y20 VCCIO VCCCORE AR32 VCC3_3 AF57
Y22 AR34 3VDUAL 5VDUAL VCC3_ME BC132 BC183

i
BC148 VCCIO VCCCORE BC236 10u/8/X5R/6.3V/K 1u/4/X5R/6.3V/K Q84 5VSB
1u/4/X5R/6.3V/K 1u/4/X5R/6.3V/K/X L1117LG/N/SOT223/1A

t
BC149 VCC1_05_ME BC159 BC150 BC189 BT35 3
VCCSUS3_3 3VDUAL

a.
1u/4/X5R/6.3V/K AG24 0.1u/4/X7R/16V/K/X 1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K 4 2
VCCASW 3VDUAL_PCH 3VDUAL_PCH
VCCASW AG26 VCCSUS3_3 AV30 1
BC228

n
VCCASW AG28 VCCSUS3_3 AV32 Need isolation
AJ24 AY31 1u/4/X5R/6.3V/K
BC232 BC233 BC129 VCCASW BC127 VCCSUS3_3 R617
CPU_VTT B41 VCCDMI_02 VCCASW AJ26 VCCSUS3_3 AY33
1u/4/X5R/6.3V/K/X 1u/4/X5R/6.3V/K BC133 E41 AJ28 1u/4/X5R/6.3V/K BJ36 301/4/1 BC229

e
1u/4/X5R/6.3V/K/X BC182 VCCDMI_01 VCCASW VCCSUS3_3 10u/8/X5R/6.3V/K
VCCASW AL24 VCCSUS3_3 BK36
1u/4/X5R/6.3V/K BC165 AL28 BM36 C109 BC187
1u/4/X5R/6.3V/K BC166 VCCASW VCCSUS3_3 BC226 R609
VCCASW AN22
1u/4/X5R/6.3V/K AN24 AT40 0.1u/4/X7R/16V/K 510/4/1

if d

si
1u/4/X5R/6.3V/K VCCASW BC130 VCCSUS3_3 1u/4/X5R/6.3V/K BC251
VCCASW AN26 VCCSUS3_3 AU38
AN28 1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K 22u/8/X5R/6.3V/M
VCCASW
VCCASW AR24 VCCSUS3_3 U31
AL40 VCCIO VCCASW AR26
VCC1_05_PCH AN40 AR28 R655 0/4/SHT/M/X 3VDUAL_PCH
VCCIO VCCASW R656 0/4/X
AN41 VCCIO VCCASW AR30 VCCDSW3_3 AV40 3VDUAL
BC234 AG38 AR36 BC128
1u/4/X5R/6.3V/K/X VCCIO VCCASW 1u/4/X5R/6.3V/K BC191
AG40 VCCIO VCCASW AR38
AG41 AU30 0.1u/4/X7R/16V/K

n
VCCIO VCCASW
AU36 CPU_VTT

ne
VCCASW

VCCASW AU34 V_PROC_IO D55


BC237

o
AV36 BC176
1u/4/X5R/6.3V/K/X VCCASW 1u/4/X5R/6.3V/K
C VCCASW AU32 V_PROC_IO_NCTF B56 C

BC152 AE15
1u/4/X5R/6.3V/K VCCDIFFCLKN_01 V_1P1_USB
AE17 VCC1_05_PCH A39
VCCDIFFCLKN_02 FB6 0/6/SHT/M/X DCPSUS_03 TP8
AG15 AA32

C
VCCDIFFCLKN_03 VCC_PCH_SRC DCPSUS_01
AJ20 VCC1_05_PCH
VCCCLKDMI
AE40 BU42

do
VCCIO VCCRTC RTCVDD {12,29}
VCCSSC_01 AC20
AE20 Need isolation BR54 BC163 BC162
VCCSSC_02 DCPRTC 1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K

e
BA38 BT56 V_1P5_RTC_INT
VCC1_05_PCH VCCIO DCPRTC_NCTF
AV24 VCC3_DAC AT1
FB9 0/6/XSATA_PLL_PCH VCCIO VCCADAC

t
U56 VCCAPLLSATA VCCIO AV26
FB8 0/6/XDMI_PLL_PCH B53 AY25 AT41 TP9 BC185
R387 0/4/X IPL_PLL_PCH VCCAPLLEXP VCCIO FB10 0/6/SHT/M/X VCCA_DPLLA DCPSUS_02 TP10 1u/4/X5R/6.3V/K
VCC1_05_PCH C54 VCCAFDIPLL VCCIO AY27 VCC1_05_PCH AB1 VCCADPLLA DCPSUSBYP AV41
R298 0/4/X CLK_PLL_PCH AL5 VCCACLK

y
FB7 0/6/XUSB3_PLL_PCH FB11 0/6/SHT/M/X VCCA_DPLLB V_1P5_INT

in
A19 VCCAPLLDMI2 VCCIO V36 VCC1_05_PCH AC2 VCCADPLLB DCPSST BA46

y
SC1
Y36 0.1u/4/X7R/16V/K/X
VCCIO
10 OF 11

b
AJ38 BC261
VCCIO

p
10u/8/X5R/6.3V/K/X
Y28 BD82H61/B3/S
9 OF 11 VCCIO

a
BC262 BC153

o
BD82H61/B3/S 10u/8/X5R/6.3V/K/X 1u/4/X5R/6.3V/K V_1P5_RTC_INT

i-
BC125 BC184
1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K V_1P1_USB

g
BC161
0.1u/4/X7R/16V/K BC160

i C
1u/4/X5R/6.3V/K
SATA_PLL_PCH IPL_PLL_PCH USB3_PLL_PCH CLOSE北橋(注意震盪水波紋)
V_1P5_INT
BC174
BC188 BC179 1u/4/X5R/6.3V/K BC139 BC140 3VDUAL VCC3_DAC

G n ot
10u/8/X5R/6.3V/K/X 1u/4/X5R/6.3V/K/X 10u/8/X5R/6.3V/K/X 1u/4/X5R/6.3V/K/X BC238

B
is 0.1u/4/X7R/16V/K/X
B

3
+12V

D
R739
CLK_PLL_PCH VCC_PCH_SRC 8.2K/4 G S
DMI_PLL_PCH VCC3_DAC
2

1
BC137 BC134 BC135 Q107
kn

BC175 BC172 1u/4/X5R/6.3V/K 10u/8/X5R/6.3V/K/X 1u/4/X5R/6.3V/K 2N7002/SOT23/25pF/5 BC263 BC136


10u/8/X5R/6.3V/K 1u/4/X5R/6.3V/K 10u/8/X5R/6.3V/K 1u/4/X5R/6.3V/K

o
(3.3V/70mA+360uA)

PCHK

D
BD82H61/B3/S
AM52
te
AM57

BM46
AG11
AG14
AG20
AG22
AG30
AG36
AG43
AG44
AG46

AG50
AG53

AG12
AG18
AG17
AC22
AC34
AC36
AC38

AC54

AH52

AN11
AN12
AN15
AN17
AN18
AN20
AN30
AN36

AN43
AN47
AN54

AR20
AR22
AR52

AU24
AU26
AU28

BC14
AA20
AA22
AA24
AA26
AA28
AA30
AA38
AB11
AB15
AB40
AB41
AB43
AB47
AB52
AB57

AE14
AE18
AE22
AE26
AE38

AE47

AK52

AV12
BA49

BB52

AE49
BA36
AY36

AE41
AE43
BA27
AF52

AT15
AT18
AT43
AT47
AT52
AL11
AL18
AL20
AL22
AL26
AL30
AL36
AL41
AL46
AL47

AL44
AL43
AJ22
AJ30
AJ57

W55
W57
AM3
AG5
AC4

AH6

AN4

AN9

AR6

AU5

M33
M36
M46
M52
M57

M38
AB6

AE4

AE8
AE9

AK6

BB1
BB3

BB6

N54
R11
R15
R17
R22

R41
R43
R46
R49

R25

R36

U47
U53
AF6

AT6
AT8
A26
A29
A42
A49

Y14
Y12
P22

P25

P36

V20
V38

Y11
Y15
Y38
Y40
Y43
Y46
Y47
Y49
Y52
L33

L31
L36

W1
M6
M8
M9
N4

R4
A9

V6

Y6
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
TS_VSS3 11 OF 11 VSS
VSS
TP3
TP13
TP17
TP18
TP19
TP20
TP1
TP4

TP2
TP5

TP14
TP15
TP11

TP10
L_BKLTCTL
L_BKLTEN
L_VDD_EN
w.

VSS_ADAC
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
F1 VSS_NCTF

TS_VSS1
TS_VSS2

TS_VSS4
BC15VSS
BC20VSS
BC27VSS
BC31VSS
BC36VSS
BC38VSS
BC47VSS
BC9 VSS
BD25VSS
BD33VSS
BF12 VSS
BF20 VSS
BF25 VSS
BF33 VSS
BF41 VSS
BF43 VSS
BF46 VSS
BF52 VSS
BF6 VSS
BG22VSS
BG25VSS
BG27VSS
BG31VSS
BG33VSS
BG36VSS
BG38VSS
BH52VSS
BH6 VSS
BJ1 VSS
BJ15 VSS
BK20VSS
BK41VSS
BK52VSS
BK6 VSS
BM10VSS
BM12VSS
BM16VSS
BM22VSS
BM23VSS
BM26VSS
BM28VSS
BM32VSS
BM40VSS
BM42VSS
BM48VSS
BM5 VSS
BN31VSS
BN47VSS
BN6 VSS
BP3 VSS
BP33VSS
BP35VSS
BR22VSS
BR52VSS
BU19VSS
BU26VSS
BU29VSS
BU36VSS
BU39VSS
C19 VSS
C32 VSS
C39 VSS
C4 VSS
D15 VSS
D23 VSS
D3 VSS
D35 VSS
D43 VSS
D45 VSS
E19 VSS
E39 VSS
E54 VSS
E6 VSS
E9 VSS
F10 VSS
F12 VSS
F16 VSS
F22 VSS
F26 VSS
F32 VSS
F33 VSS
F35 VSS
F36 VSS
F40 VSS
F42 VSS
F46 VSS
F48 VSS
F50 VSS
F8 VSS
AV18VSS
AV22VSS
AV34VSS
AV38VSS
AV47VSS
AV6 VSS
AW57VSS
AY38VSS
AY6 VSS
B23 VSS
BA11VSS
BA12VSS
BA31VSS
BA41VSS
BA44VSS
G54 VSS
H15 VSS
H20 VSS
H22 VSS
H25 VSS
H27 VSS
H33 VSS
VSS
J1 VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
T6 VSS
U11 VSS
U15 VSS
U17 VSS
U20 VSS
U22 VSS
U25 VSS
U27 VSS
U33 VSS
U36 VSS
U38 VSS
U41 VSS

VSS
VSS
VSS
VSS
BM57

BU52
BU54

BR36
BP57

AY22

AE56
A A

BM1
M20
M22
M25
M27
M31

BU4

BU6

AU2
BP1

C12

D57
BT2
K52

A54
A52
ww

T52

F57
L12
L17
L38
L41
L43
J33
J46
J48

J53
H6

D1
K6
K9

A4
A6
B2
J5

Gigabyte Technology
Title
PCH PWR ,GND
Size Document Number Rev
Custom 1.0
GA-H61-S3
Date: Tuesday, August 16, 2011 Sheet 13 of 34
5 4 3 2 1
8 7 6 5 4 3 2 1

+12V
X16_+12V
X16_+12V PCIESLOT-164DN-3 X16_+12V

+
1
PCIEX16 3GIO_*16 VCC3
EC8 BC30
270u/FP/D/16V/8C/A/10m 0.1u/4/X7R/16V/K B1 A1 R104 0/4/SHT/X
12V PRSNT1*
B2 12V 12V A2
B3 RSVD 12V A3
0/4/SHT/X R115 B4 A4 R113 0/4/SHT/X BC34 BC39 BC41
SMBCLK GND GND 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
{7,8,12,15,17,23,30} SMBCLK B5 SMCLK JTAG2 A5
SMBDATA B6 A6 VCC3 -PCIE_RST 0.1u/4/X7R/16V/K/X
{7,8,12,15,17,23,30} SMBDATA SMDAT JTAG3
B7 GND JTAG4 A7
3VDUAL B8 A8
VCC3 3.3V JTAG5
B9 A9 C27
JTAG1 3.3V 33p/4/NPO/50V/J
D +12 protect B10 3.3VAUX 3.3V A10
-PCIE_RST D

m
{12,15,16,32} -PCIE_WAKE B11 A11 -PCIE_RST {15,16,18}
short-wire test WAKE*
KEY PWRGD

+12V X16_+12V B12 A12


RSVD GND
B13 A13

l
GND REFCLK+ SRCCLK_3GIO {10}

co
1 2 EXP_TXP0C B14 A14
HSOP0 REFCLK- -SRCCLK_3GIO {10}
3 4 EXP_TXN0C B15 A15
HSON0 GND EXP_RXP0 C32 C29
5 6 B16 GND HSIP0 A16

a
7 8 B17 A17 EXP_RXN0 33p/4/NPO/50V/J/X 33p/4/NPO/50V/J/X
RN3 0/8P4R/4/X PRSNT2* HSIN0
PCIEX16:16/5/5/5/16 B18 GND GND A18

i
1 2
3 4
EXP_RXP[0..15] 5 6 EXP_TXP1C B19 A19

t
EXP_RXP[0..15] {4} HSOP1 RSVD
7 8 EXP_TXN1C B20 A20
EXP_RXN[0..15] RN2 0/8P4R/0402/SHT/X HSON1 GND EXP_RXP1

a.
EXP_RXN[0..15] {4} B21 GND HSIP1 A21
1 2 B22 A22 EXP_RXN1
EXP_TXP[0..15] EXP_TXP2C GND HSIN1
3 4 B23 A23

n
EXP_TXP[0..15] {4} HSOP2 GND
5 6 EXP_TXN2C B24 A24
EXP_TXN[0..15] HSON2 GND EXP_RXP2
EXP_TXN[0..15] {4} 7 8 B25 GND HSIP2 A25
RN4 0/8P4R/4/X B26 A26 EXP_RXN2

e
EXP_TXP3C GND HSIN2
B27 HSOP3 GND A27
EXP_TXN3C B28 A28
HSON3 GND EXP_RXP3
B29 GND HSIP3 A29
B30 A30 EXP_RXN3

if d

si
EXP_TXP0 C43 0.22u/4/X5R/6.3V/K EXP_TXP0C RSVD HSIN3
B31 PRSNT2* GND A31
EXP_TXN0 C36 0.22u/4/X5R/6.3V/K EXP_TXN0C B32 A32
EXP_TXP1 C47 0.22u/4/X5R/6.3V/K EXP_TXP1C GND RSVD
EXP_TXN1 C49 0.22u/4/X5R/6.3V/K EXP_TXN1C EXP_TXP4C B33 A33
EXP_TXP2 C52 0.22u/4/X5R/6.3V/K EXP_TXP2C EXP_TXN4C HSOP4 RSVD
B34 HSON4 GND A34
EXP_TXN2 C54 0.22u/4/X5R/6.3V/K EXP_TXN2C B35 A35 EXP_RXP4
EXP_TXP3 C57 0.22u/4/X5R/6.3V/K EXP_TXP3C GND HSIP4 EXP_RXN4
B36 GND HSIN4 A36
EXP_TXN3 C59 0.22u/4/X5R/6.3V/K EXP_TXN3C EXP_TXP5C B37 A37

n
C EXP_TXP4 C62 0.22u/4/X5R/6.3V/K EXP_TXP4C EXP_TXN5C HSOP5 GND C
B38 HSON5 GND A38

ne
EXP_TXN4 C64 0.22u/4/X5R/6.3V/K EXP_TXN4C B39 A39 EXP_RXP5
EXP_TXP5 C65 0.22u/4/X5R/6.3V/K EXP_TXP5C GND HSIP5 EXP_RXN5
B40 GND HSIN5 A40
EXP_TXN5 C67 0.22u/4/X5R/6.3V/K EXP_TXN5C EXP_TXP6C

o
B41 HSOP6 GND A41
EXP_TXP6 C69 0.22u/4/X5R/6.3V/K EXP_TXP6C EXP_TXN6C B42 A42
EXP_TXN6 C71 0.22u/4/X5R/6.3V/K EXP_TXN6C HSON6 GND EXP_RXP6
B43 GND HSIP6 A43
EXP_TXP7 C76 0.22u/4/X5R/6.3V/K EXP_TXP7C B44 A44 EXP_RXN6
EXP_TXN7 C75 0.22u/4/X5R/6.3V/K EXP_TXN7C EXP_TXP7C GND HSIN6
B45 HSOP7 GND A45
EXP_TXP8 C79 0.22u/4/X5R/6.3V/K EXP_TXP8C EXP_TXN7C B46 A46

C
EXP_TXN8 C80 0.22u/4/X5R/6.3V/K EXP_TXN8C HSON7 GND EXP_RXP7
B47 GND HSIP7 A47

do
EXP_TXP9 C81 0.22u/4/X5R/6.3V/K EXP_TXP9C B48 A48 EXP_RXN7
EXP_TXN9 C82 0.22u/4/X5R/6.3V/K EXP_TXN9C PRSNT2* HSIN7
B49 GND GND A49
EXP_TXP10 C86 0.22u/4/X5R/6.3V/K EXP_TXP10C
EXP_TXN10 C87 0.22u/4/X5R/6.3V/K EXP_TXN10C

e
EXP_TXP11 C90 0.22u/4/X5R/6.3V/K EXP_TXP11C
EXP_TXN11 C91 0.22u/4/X5R/6.3V/K EXP_TXN11C EXP_TXP8C B50 A50

t
EXP_TXP12 C92 0.22u/4/X5R/6.3V/K EXP_TXP12C EXP_TXN8C HSOP8 RSVD
B51 HSON8 GND A51
EXP_TXN12 C93 0.22u/4/X5R/6.3V/K EXP_TXN12C B52 A52 EXP_RXP8
EXP_TXP13 C95 0.22u/4/X5R/6.3V/K EXP_TXP13C GND HSIP8 EXP_RXN8
B53 GND HSIN8 A53
EXP_TXN13 C96 0.22u/4/X5R/6.3V/K EXP_TXN13C EXP_TXP9C

y
B54 A54

in
HSOP9 GND

y
EXP_TXP14 C97 0.22u/4/X5R/6.3V/K EXP_TXP14C EXP_TXN9C B55 A55
EXP_TXN14 C98 0.22u/4/X5R/6.3V/K EXP_TXN14C HSON9 GND EXP_RXP9
B56 GND HSIP9 A56
EXP_TXP15 C99 0.22u/4/X5R/6.3V/K EXP_TXP15C B57 A57 EXP_RXN9
GND HSIN9

b
EXP_TXN15 C100 0.22u/4/X5R/6.3V/K EXP_TXN15C EXP_TXP10C B58 A58
HSOP10 GND

p
EXP_TXN10C B59 A59
HSON10 GND EXP_RXP10
B60 GND HSIP10 A60
B61 A61 EXP_RXN10

a
EXP_TXP11C GND HSIN10
B62 A62

o
EXP_TXN11C HSOP11 GND
B63 A63

i-
HSON11 GND EXP_RXP11
B64 GND HSIP11 A64
EXP_RXN11

g
B65 GND HSIN11 A65
EXP_TXP12C B66 A66
B EXP_TXN12C HSOP12 GND B

i
B67 A67

C
HSON12 GND EXP_RXP12
B68 GND HSIP12 A68
B69 A69 EXP_RXN12
EXP_TXP13C GND HSIN12
B70 HSOP13 GND A70
EXP_TXN13C B71 A71

G n ot
HSON13 GND EXP_RXP13
B72 GND HSIP13 A72

EXP_TXP14C
EXP_TXN14C
B73
B74
B75
GND
is
HSOP14
HSIN13
GND
A73
A74
A75
EXP_RXN13

PCI-E REV:1.1--> 2.5GHZ B76


HSON14 GND
A76 EXP_RXP14
GND HSIP14 EXP_RXN14
B77 GND HSIN14 A77
EXP_TXP15C B78 A78
PCE-E X1(單向) BANDWITH=2.5GHz*(8b/10b)=2Gb/s=250MB/s EXP_TXN15C B79
HSOP15 GND
A79
HSON15 GND EXP_RXP15
B80 GND HSIP15 A80
B81 A81 EXP_RXN15
PCE-E X1(雙向) BANDWITH=2.5GHz*(8b/10b)X2=4Gb/s=500MB/s B82
PRSNT2* HSIN15
A82
kn

RSVD GND

o
PCE-E X16(單向) BANDWITH=2.5GHz*(8b/10b)X16=32Gb/s=4GB/s
PCE-E X16(雙向) BANDWITH=2.5GHz*(8b/10b)X16X2=64Gb/s=8GB/s

D
PCI-E/16X-164P/BU/LOWR EJECTOR
te

PCI-E REV:2.0--> 5GHZ

A A
w.

Gigabyte Technology
Title
PCI EXPRESS * 16
ww

Size Document Number Rev


Custom GA-H61-S3 1.0
Date: Tuesday, August 16, 2011 Sheet 14 of 34
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

3VDUAL

BC37
1u/4/X5R/6.3V/K

PCIE*1
PCIEX1_1 3GIO_X1
D D
+12V B1 A1 R106 0/4/SHT/X
+12V 12V PRSNT1*
B2 A2 +12V

m
12V 12V
B3 RSVD 12V A3
R112 0/4/SHT/X
B4 A4 R109 0/4/SHT/X
SMBCLK GND GND
{7,8,12,14,17,23,30} SMBCLK B5 SMCLK JTAG2 A5
BC31 BC29 BC28 SMBDATA B6 A6
{7,8,12,14,17,23,30} SMBDATA SMDAT JTAG3

l
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K

co
B7 GND JTAG4 A7
VCC3 B8 3.3V JYAG5 A8
B9 JTAG1 3.3V A9 VCC3
B10 A10

a
3VDUAL 3.3VAUX 3.3V
{12,14,16,32} -PCIE_WAKE B11 WAKE* PWRGD A11 -PCIE_RST {14,16,18}

i
VCC3 KEY
B12 A12 C26
RVSD GND

t
B13 A13 22p/4/NPO/50V/J/X
GND REFCLK+ PCIE_CLK1 {10}
PCIE_TP1 B14 A14
{9} PCIE_TP1 HSOP0 REFCLK- -PCIE_CLK1 {10}

a.
PCIE_TN1 B15 A15
{9} PCIE_TN1 HSON0 GND
BC32 BC36 BC38 B16 A16 PCIE_IP1
GND HSIP0 PCIE_IP1 {9}

n
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K/X B17 A17 PCIE_IN1
PRSNT2* HSIN0 PCIE_IN1 {9}
B18 GND GND A18

e
PCI-E/1X-36P/WH/OL

if d

si
PCIEX1_2 3GIO_X1
C C

+12V B1 12V PRSNT1* A1 R707 0/4/SHT/X


B2 12V 12V A2 +12V
B3 RSVD 12V A3
R706 0/4/SHT/X
B4 A4 R708 0/4/SHT/X

n
SMBCLK GND GND
{7,8,12,14,17,23,30} SMBCLK B5 A5

ne
SMBDATA SMCLK JTAG2
{7,8,12,14,17,23,30} SMBDATA B6 SMDAT JTAG3 A6
B7 GND JTAG4 A7

o
VCC3 B8 3.3V JYAG5 A8
B9 JTAG1 3.3V A9 VCC3
3VDUAL B10 3.3VAUX 3.3V A10
VCC3 B11 A11
{12,14,16,32} -PCIE_WAKE WAKE* PWRGD -PCIE_RST {14,16,18}
KEY

C
1 B12 A12 C24
+ RVSD GND 22p/4/NPO/50V/J/X

do
B13 GND REFCLK+ A13 PCIE_CLK2 {10}
BC33 BC40 EC10 PCIE_TP2 B14 A14
{9} PCIE_TP2 HSOP0 REFCLK- -PCIE_CLK2 {10}
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 560u/FP/D/6.3V/69/A/11m PCIE_TN2 B15 A15
{9} PCIE_TN2 HSON0 GND
B16 A16 PCIE_IP2

e
GND HSIP0 PCIE_IP2 {9}
B17 A17 PCIE_IN2
PRSNT2* HSIN0 PCIE_IN2 {9}
B18 GND GND A18

t
PCI-E/1X-36P/WH/OL

y
in
y
B B

g a b o p i-
i
G n ot C
is
kn

o
A A

D
Gigabyte Technology
te

Title
PCI EXPRESS X 4 PORT
Size Document Number Rev
Custom 1.0
GA-H61-S3
Date: Tuesday, August 16, 2011 Sheet 15 of 34
8 7 6 5 4 3 2 1
w.
ww
5 4 3 2 1

VCC3
1.8VD 1.8VA
LDO_18V PFB1 30/6/4A/S 1.8VA
VCC3 3VDUAL 1.8V_AUX 1.8V_AUXA
1.8VD 1.8VA
PFB2 30/6/4A/S 1.8VD
PBC20 PBC21 PBC22 PBC33 PBC34 PBC35
10u/8/X5R/6.3V/K 1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K 0.01u/4/X7R/25V/K PBC23 PBC24 PBC25 PBC26 PBC27 PBC28 PBC29 PBC30 PBC31
0.1u/4/X7R/16V/K 10u/8/X5R/6.3V/K 1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K 10u/8/X5R/6.3V/K 1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K/X 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K LDOAUX_18V PFB3 30/6/4A/S 1.8V_AUX
1u/4/X5R/6.3V/K

PFB4 30/6/4A/S 1.8V_AUXA


D 1.8VD D
BA_D[0..31]

m
BA_D[0..31] {17}
-BC_BE0
-BC_BE0 {17}
-BC_BE1
-BC_BE1 {17}
PBC37 PBC38 PBC39 -BC_BE2
-BC_BE2 {17}

co
RREF PR13 12K/4/1 1u/4/X5R/6.3V/K 0.01u/4/X7R/25V/K -BC_BE3
-BC_BE3 {17}
0.1u/4/X7R/16V/K
-BPERR LDOAUX_18V
-BPERR {17}
VCC3 -BSERR

a
-BSERR {17}
TEST_EN PR21 10K/4/1
BPAR PBC32 PBC40 PBC41

ti
BPAR {17}
-BPLOCK 10u/8/X5R/6.3V/K 1u/4/X5R/6.3V/K 0.01u/4/X7R/25V/K
-BPLOCK {17}
-BDEVSEL
-BDEVSEL {17}
EXT_ARB PR22 10K/4/1 -BSTOP
-BSTOP {17}
-BTRDY
-BTRDY {17}

TP14
TP15

TP16
TP17
TP18
TP19

a.
-BIRDY PCB layout note:

PCICLK_SEL
-BIRDY {17}
-BFRAME

-PCIE_RST
-BFRAME {17}

-BPCIRST

CLKOUT0
RST_SEL PR7 10K/4/1 Close to chip

-BPIRQD
n
-BREQ2

-BREQ0

-BREQ3

-BREQ1
BA_D31
BA_D30
BA_D29
BA_D28
-BGNT2

-BGNT0

-BGNT3

-BGNT1
M66EN
-PCIE_RST LDO_18V

1.8VD

1.8VD
-PCIE_RST {14,15,18}

GND
-BPCIRST

e
-BPCIRST {17}
PBC36 PBC42 PBC45
-BREQ0 10u/8/X5R/6.3V/K 1u/4/X5R/6.3V/K 0.01u/4/X7R/25V/K
-BREQ0 {17}

128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
-BREQ1

99
98
97
PU1 -BREQ1 {17}
-BGNT0
-BGNT0 {17}

if d

si
-BGNT1

VCCK
GNDP
VCCP

SEG_B
SEG_A

VSS
VCCK
GNDP
VCCP

VSS
TP2
GNT0#
REQ0#

TP1
SEG_F/GP1

PERST#

AD28
SEG_E/GP0

INTD#
PCIRST#
PCICLK_SEL

M66EN
SEG_D
SEG_C

NC

NC

PCICLK0
GNT1#
REQ1#
AD31
AD30
AD29
-BGNT1 {17}
-BREQ2
-BREQ2 {17}
PCIEWAKE 1 96 1.8VD -BGNT2
WAKE# VCCK -BGNT2 {17}
-BPCIPME 2 95
PME# GNDP VCC3
3 GNDP_AUX VCCP 94 VCC3
VCCP 4 93 CLKOUT1
LDOAUX_18V VCCP_AUX NC EXT_ARB PRN4 VCC PRN7 VCC PR14
C
5 LDOAUX_18V EXT_ARB 92 C
6 91 RST_SEL 2.7K/8P4R/4 2.7K/8P4R/4 8.2K/4/1/X
1.8V_AUX VSS_AUX RST_SEL TEST_EN -BPIRQA -BFRAME 1
7 90 1 2 2

n
TP23 VCCK_AUX TEST_EN BA_D27 CLKOUT0 PR11 47/4/1 -BPIRQC -BIRDY M66EN
8 89 3 4 3 4

ne
NC AD27 BPCLK0 {17}
9 88 BA_D26 -BPIRQB 5 6 -BTRDY 5 6
{10} -PBCLK CLKN AD26
10 87 -BC_BE3 CLKOUT1 PR12 22/4 -BPIRQD 7 8 -BDEVSEL 7 8 PR29
{10} PBCLK CLKP CBE3# BPCLK1 {17}
1.8VA BA_D25

o
11 86 1K/4/1
1.8VA VCC18A AD25 BA_D24 PR39 22/4 PRN5 PRN6
12 VCC18A AD24 85 BPCLK2 {17}
13 GNDA VCCP 84 VCC3 2.7K/8P4R/4 2.7K/8P4R/4 High: Enable PCI CLK 66MHz
14 83 BA_D23 -BGNT3 1 2 -BSTOP 1 2
GNDA AD23
15 GNDA
IT8892E/BX LQFP128 AD22 82 BA_D22 -BREQ3 3 4 -BPERR 3 4 Low: Disable PCI CLK 66MHz
RREF 16 81 BA_D21 -BGNT1 5 6 -BSERR 5 6

C
RREF AD21 BA_D20 -BREQ1 -BPLOCK 7 VCC3
{9} PCIEBOP 17 DIP AD20 80 7 8 8
18 79

do
{9} PCIEBON DIN VSS
1.8V_AUXA 19 78 1.8VD
PBC43 0.1u/4/X7R/16V/K VCC18A_AUX VCCK BA_D19 PRN3 VCC PR20
{9} PCIEBIN 20 DON AD19 77
PBC44 0.1u/4/X7R/16V/K 21 76 BA_D18 2.7K/8P4R/4 8.2K/4/1/X
{9} PCIEBIP

e
DOP AD18
22 VSS AD17 75 BA_D17 -BGNT2 1 2 High: PCICLK INTPUT form CLK Gen
1.8VD 23 74 BA_D16 -BREQ2 3 4 PCICLK_SEL
VCCK AD16
TP22 -BGNT0 Low: PCICLK OUTPUT form IT8893 chip

t
24 SEG_EN1/GP3 GNDP 73 5 6
TP21 25 72 VCC3 -BREQ0 7 8 PR30
SEG_EN2/GP4 VCCP -BFRAME 10K/4/1
26 EECS# FRAME# 71
27 70 -BIRDY BPAR PR19 2.7K/4/1/X
EECLK IRDY#

y
-BC_BE2

in
28 EEWRDATA CBE2# 69

y
29 68 -BTRDY
BA_D0 EERDDATA TRDY# -BSTOP
30 AD0 STOP# 67
BA_D1 31 66 -BDEVSEL
LDO_18V

AD1 DEVSEL#

b
TP20 32 65 -BPIRQA
PERR#
SERR#

LOCK#
CBE0#

CBE1#

SEG_G INTA#
GNDP

GNDP

GNDP

INTC#
INTB#
VCCP

VCCK

VCCP

VCCP

p
AD10

AD11
AD12
AD13
AD14
AD15

PAR
VSS

VSS
AD2
AD3

AD4
AD5
AD6
AD7

AD8
AD9

a
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64

o
IT8892E/CX/LQFP128

i-
B B

g
LDO_18V

-BPLOCK
-BC_BE0

-BC_BE1

-BPIRQB
-BPIRQC
BA_D10

BA_D11
BA_D12
BA_D13
BA_D14
BA_D15
-BPERR
-BSERR

i C
VCC3

VCC3
BA_D2
BA_D3

BA_D4
BA_D5
BA_D6
BA_D7

BA_D8
BA_D9
1.8VD

BPAR

G n ot
is
VCC3

-BPIRQA 1 2
-BPIRQC -BPIRQA1 {17}
3 4 -BPIRQC1 {17}
-BPIRQB 5 6 PCI slot
-BPIRQD -BPIRQB1 {17}
7 8
IT8893 PRN8 0/8P4R/0402/SHT/X-BPIRQD1 {17}

-BPCIPME PR24 0/4/X


-BPCIPME1 {17}
kn

PCIEWAKE PR25 0/4/X


-PCIE_WAKE {12,14,15,32} 3VDUAL

o
VCCP PR26 0/4/SHT/M/X 3VDUAL
PR2
0/4/SHT/M/X
VCC3

D
For BX legacy mode
PR32
te

PCIEWAKE PR34 10K/4/1 0/4/X


PRN9 -BPCIPME PR33 10K/4/1
A A
0/8P4R/4/X
-BPIRQA1 1 2 For Legacy Mode
-BPIRQB1 -PIRQA {11}
3 4 -PIRQB {11}
-BPIRQC1 5 6
-BPIRQD1 -PIRQC {11}
PCI slot 7 8 -PIRQD {11} chipset side
-BPCIPME1 PR27 0/4/SHT/M/X
w.

-PCIE_WAKE {12,14,15,32}
VCCP PR28 0/4/X VCC3
Gigabyte Technology
Title
Legacy Mode : remove PRN12,PR42,PR43,PR40 PCIEX1_1,2,3
Size Document Number Rev
add PRN11,PR38,PR39 Custom
GA-H61-S3 1.0
Date: Tuesday, August 16, 2011Sheet 16 of 34
ww

5 4 3 2 1
5 4 3 2 1

PCI SLOT 1 BA_D[0..31] PCI SLOT 2 PCI SLOT 3


{16} BA_D[0..31] VCC
-12V VCC VCC3 +12V -12V VCC VCC3 +12V -12V VCC VCC3 +12V

-BPCIRST
-BPCIRST {16}
-BPCIRST -BPCIRST
-BPCIRST {16} -BPCIRST {16}
PBC9 PBC56
33p/4/NPO/50V/J PBC10 PBC55 22u/8/X5R/6.3V/M
PCI1 33p/4/NPO/50V/J PCI2 33p/4/NPO/50V/J PCI3
D B1 A1 -BPTRST B1 A1 -BPTRST B1 A1 -BPTRST D
BPTCK -12V TRST BPTCK -12V TRST BPTCK -12V TRST
B2 TCK +12V A2 B2 TCK +12V A2 B2 TCK +12V A2
B3 A3 BPTMS B3 A3 BPTMS B3 A3 BPTMS
GND TMS GND TMS GND TMS

m
B4 TDO TDI A4 B4 TDO TDI A4 B4 TDO TDI A4
B5 +5V +5V A5 B5 +5V +5V A5 B5 +5V +5V A5
B6 A6 -BPIRQA1 B6 A6 -BPIRQB1 B6 A6 -BPIRQC1
+5V INTA -BPIRQA1 {16} +5V INTA -BPIRQB1 {16} +5V INTA -BPIRQC1 {16}
-BPIRQB1 B7 A7 -BPIRQC1 -BPIRQC1 B7 A7 -BPIRQD1 -BPIRQD1 B7 A7 -BPIRQA1
{16} -BPIRQB1 INTB INTC -BPIRQC1 {16} {16} -BPIRQC1 INTB INTC -BPIRQD1 {16} {16} -BPIRQD1 INTB INTC -BPIRQA1 {16}
-BPIRQD1 B8 A8 -BPIRQA1 B8 A8 -BPIRQB1 B8 A8

l
{16} -BPIRQD1 INTD +5V {16} -BPIRQA1 INTD +5V {16} -BPIRQB1 INTD +5V

co
B9 PRSNT1 RESERVED A9 B9 PRSNT1 RESERVED A9 B9 PRSNT1 RESERVED A9
B10 A10 BPCLK0 PBC12 10p/4/NPO/50V/J/X B10 A10 B10 A10
RESERVED +5V RESERVED +5V RESERVED +5V
B11 PRSNT2 RESERVED A11 B11 PRSNT2 RESERVED A11 B11 PRSNT2 RESERVED A11

a
B12 A12 BPCLK1 PBC11 10p/4/NPO/50V/J/X B12 A12 B12 A12
GND GND GND GND GND GND
B13 GND GND A13 B13 GND GND A13 B13 GND GND A13

ti
B14 A14 3VDUAL BPCLK2 PBC54 10p/4/NPO/50V/J/X B14 A14 3VDUAL B14 A14 3VDUAL
RESERVED 3.3V_AUX -BPCIRST RESERVED 3.3V_AUX -BPCIRST RESERVED 3.3V_AUX -BPCIRST
B15 GND RST A15 B15 GND RST A15 B15 GND RST A15
BPCLK0 B16 A16 BPCLK1 B16 A16 BPCLK2 B16 A16
{16} BPCLK0 CLK +5V {16} BPCLK1 CLK +5V {16} BPCLK2 CLK +5V
B17 A17 PR35 100/4/1 B17 A17 PR36 100/4/1 B17 A17 PR37 100/4/1
GND GNT -BGNT0 {16} GND GNT -BGNT1 {16} GND GNT -BGNT2 {16}
-BREQ0 -BREQ1 -BREQ2

a.
{16} -BREQ0 B18 REQ GND A18 {16} -BREQ1 B18 REQ GND A18 {16} -BREQ2 B18 REQ GND A18
B19 A19 -BPCIPME1 B19 A19 -BBPIPME1 B19 A19 -BBPIPME1
+5V PME -BPCIPME1 {16} +5V PME -BPCIPME1 {16} +5V PME -BPCIPME1 {16}
BA_D31 B20 A20 BA_D30 BA_D31 B20 A20 BA_D30 BA_D31 B20 A20 BA_D30

n
BA_D29 AD31 AD30 BA_D29 AD31 AD30 BA_D29 AD31 AD30
B21 AD29 +3.3V A21 B21 AD29 +3.3V A21 B21 AD29 +3.3V A21
B22 A22 BA_D28 B22 A22 BA_D28 B22 A22 BA_D28
BA_D27 GND AD28 BA_D26 BA_D27 GND AD28 BA_D26 BA_D27 GND AD28 BA_D26
B23 A23 B23 A23 B23 A23

e
BA_D25 AD27 AD26 BA_D25 AD27 AD26 BA_D25 AD27 AD26
B24 AD25 GND A24 B24 AD25 GND A24 B24 AD25 GND A24
B25 A25 BA_D24 B25 A25 BA_D24 B25 A25 BA_D24
-BC_BE3 +3.3V AD24 PR3 100/4/1 BA_D16 -BC_BE3 +3.3V AD24 PR4 100/4/1 BA_D17 -BC_BE3 +3.3V AD24 PR38 100/4/1 BA_D18
{16} -BC_BE3 B26 C/BE3 IDSEL A26 {16} -BC_BE3 B26 C/BE3 IDSEL A26 {16} -BC_BE3 B26 C/BE3 IDSEL A26
BA_D23 B27 A27 BA_D23 B27 A27 BA_D23 B27 A27

if d

si
AD23 +3.3V BA_D22 AD23 +3.3V BA_D22 AD23 +3.3V BA_D22
C B28 GND AD22 A28 B28 GND AD22 A28 B28 GND AD22 A28 C
BA_D21 B29 A29 BA_D20 BA_D21 B29 A29 BA_D20 BA_D21 B29 A29 BA_D20
BA_D19 AD21 AD20 BA_D19 AD21 AD20 BA_D19 AD21 AD20
B30 AD19 GND A30 B30 AD19 GND A30 B30 AD19 GND A30
B31 A31 BA_D18 B31 A31 BA_D18 B31 A31 BA_D18
BA_D17 +3.3V AD18 BA_D16 BA_D17 +3.3V AD18 BA_D16 BA_D17 +3.3V AD18 BA_D16
B32 AD17 AD16 A32 B32 AD17 AD16 A32 B32 AD17 AD16 A32
-BC_BE2 B33 A33 -BC_BE2 B33 A33 -BC_BE2 B33 A33
{16} -BC_BE2 C/BE2 +3.3V {16} -BC_BE2 C/BE2 +3.3V {16} -BC_BE2 C/BE2 +3.3V
B34 A34 -BFRAME B34 A34 -BFRAME B34 A34 -BFRAME
GND FRAME -BFRAME {16} GND FRAME -BFRAME {16} GND FRAME -BFRAME {16}
-BIRDY B35 A35 -BIRDY B35 A35 -BIRDY B35 A35
{16} -BIRDY {16} -BIRDY {16} -BIRDY

n
IRDY GND -BTRDY IRDY GND -BTRDY IRDY GND -BTRDY
B36 +3.3V TRDY A36 -BTRDY {16} B36 +3.3V TRDY A36 -BTRDY {16} B36 +3.3V TRDY A36 -BTRDY {16}

ne
-BDEVSEL B37 A37 -BDEVSEL B37 A37 -BDEVSEL B37 A37
{16} -BDEVSEL DEVSEL GND {16} -BDEVSEL DEVSEL GND {16} -BDEVSEL DEVSEL GND
B38 A38 -BSTOP B38 A38 -BSTOP B38 A38 -BSTOP
GND STOP -BSTOP {16} GND STOP -BSTOP {16} GND STOP -BSTOP {16}
-BPLOCK -BPLOCK -BPLOCK

o
{16} -BPLOCK B39 LOCK +3.3V A39 {16} -BPLOCK B39 LOCK +3.3V A39 {16} -BPLOCK B39 LOCK +3.3V A39
-BPERR B40 A40 BPCI_A40 -BPERR B40 A40 BPCI_A40 -BPERR B40 A40 BPCI_A40
{16} -BPERR PERR SDONE {16} -BPERR PERR SDONE {16} -BPERR PERR SDONE
B41 A41 BPCI_A41 B41 A41 BPCI_A41 B41 A41 BPCI_A41
-BSERR +3.3V SBO -BSERR +3.3V SBO -BSERR +3.3V SBO
{16} -BSERR B42 SERR GND A42 {16} -BSERR B42 SERR GND A42 {16} -BSERR B42 SERR GND A42
B43 A43 BPAR B43 A43 BPAR B43 A43 BPAR
+3.3V PAR BPAR {16} +3.3V PAR BPAR {16} +3.3V PAR BPAR {16}
-BC_BE1 B44 A44 BA_D15 -BC_BE1 B44 A44 BA_D15 -BC_BE1 B44 A44 BA_D15

C
{16} -BC_BE1 C/BE1 AD15 {16} -BC_BE1 C/BE1 AD15 {16} -BC_BE1 C/BE1 AD15
BA_D14 B45 A45 VCC BA_D14 B45 A45 BA_D14 B45 A45
AD14 +3.3V AD14 +3.3V AD14 +3.3V

do
B46 A46 BA_D13 B46 A46 BA_D13 B46 A46 BA_D13
BA_D12 GND AD13 BA_D11 BA_D12 GND AD13 BA_D11 BA_D12 GND AD13 BA_D11
B47 AD12 AD11 A47 B47 AD12 AD11 A47 B47 AD12 AD11 A47
BA_D10 B48 A48 BA_D10 B48 A48 BA_D10 B48 A48
AD10 GND BA_D9 AD10 GND BA_D9 AD10 GND BA_D9

e
B49 GND AD9 A49 B49 GND AD9 A49 B49 GND AD9 A49
PBC17 PBC5
0.1u/4/X7R/16V/K

t
BA_D8 B52 A52 -BC_BE0 0.1u/4/X7R/16V/K BA_D8 B52 A52 -BC_BE0 BA_D8 B52 A52 -BC_BE0
AD8 C/BE0 -BC_BE0 {16} AD8 C/BE0 -BC_BE0 {16} AD8 C/BE0 -BC_BE0 {16}
BA_D7 B53 A53 BA_D7 B53 A53 BA_D7 B53 A53
AD7 +3.3V BA_D6 AD7 +3.3V BA_D6 AD7 +3.3V BA_D6
B54 +3.3V AD6 A54 B54 +3.3V AD6 A54 B54 +3.3V AD6 A54
BA_D5 BA_D4 BA_D5 BA_D4 BA_D5 BA_D4

y
B55 A55 B55 A55 B55 A55

in
B AD5 AD4 AD5 AD4 AD5 AD4 B

y
BA_D3 B56 A56 BA_D3 B56 A56 BA_D3 B56 A56
AD3 GND BA_D2 VCC AD3 GND BA_D2 AD3 GND BA_D2
B57 GND AD2 A57 B57 GND AD2 A57 B57 GND AD2 A57
BA_D1 B58 A58 BA_D0 BA_D1 B58 A58 BA_D0 BA_D1 B58 A58 BA_D0
AD1 AD0 AD1 AD0 AD1 AD0

b
B59 +5V +5V A59 B59 +5V +5V A59 B59 +5V +5V A59

p
-BACK64 B60 A60 -BPCI1_REQ64 -BACK64 B60 A60 -BPCI2_REQ64 -BACK64 B60 A60 -BPCI3_REQ64
ACK64 REQ64 ACK64 REQ64 ACK64 REQ64
B61 +5V +5V A61 B61 +5V +5V A61 B61 +5V +5V A61
B62 A62 PBC18 PBC6 B62 A62 B62 A62

a
+5V +5V 0.1u/4/X7R/16V/K +5V +5V +5V +5V

o
PCI/120/P/IV/VA 0.1u/4/X7R/16V/K PCI/120/P/IV/VA PCI/120/P/IV/VA

i-
PRN1
8.2K/8P4R/4

g
-REQ0/-GNT0/A_D16 -REQ1/-GNT1/A_D17
-BPTRST 1 2 -REQ2/-GNT2/A_D18
BPTCK PR5 0/6/SHT/X BPCI_A40

i
3 4

C
{7,8,12,14,15,23,30} SMBCLK
BPTMS 5 6 PR6 0/6/SHT/X BPCI_A41
VCC {7,8,12,14,15,23,30} SMBDATA
7 8 3VDUAL 3VDUAL VCC3 VCC3 +12V +12V

PRN2

G n ot
1K/8P4R/4
1
3
5
2
4
6
-BACK64
-BPCI2_REQ64
-BPCI3_REQ64
PBC7 PBC8 PBC13
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
PBC15 PBC16
0.1u/4/X7R/16V/K
PBC14
is PBC3
0.1u/4/X7R/16V/K
PBC1 PBC4
0.1u/4/X7R/16V/K
PBC2

7 8 -BPCI1_REQ64 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K


VCC

A A
3VDUAL VCC3 VCC +12V
kn

o
PBC46 PBC47 PBC48 PBC49 PBC50 PBC51
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K Title
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K PCI SLOT 1&2

D
Size Document Number Rev
te

Custom 1.0
GA-H61-S3
Date: Tuesday, August 16, 2011 Sheet 17 of 34
5 4 3 2 1
w.
ww
8 7 6 5 4 3 2 1

R40 8.2K/4/X IT_AVCC


VCC3
MB_ID2 ERP {25}
R41 8.2K/4
8728_GP67 {30}

3
MB_ID2
{12} SML1DAT D
{12} SML1CLK Q1
For IT8275 JP2 2N7002/SOT23/25pF/5 For 8728 EUP function
{19} RTS1- G S
{19} DSR1- JP3 -PSON SOT23 IO_PWOK R21 0/6/SHT/M/X
{19} TXD1 3VDUAL_PCH IT_VCCH

1
R2 1K/4/1 VTT_LEVEL {19} RXD1 JP4 R19 0/6/X
VCC3 {19} DTR1- 3VDUAL
3VDUAL_PCH R26 1K/4/1 -5VSB_CTRL R1
R7 8.2K/4 -THERM {19} DCD1- 510/4/1 C9 R18 0/6/SHT/M/X

m
VCC3 -THERM {19} {19} RI1- VCC3 IT_AVCC
D 1n/4/X7R/50V/K D
R65 8.2K/4/X IO_GP43

31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
3VDUAL

9
8
7
6
U1

co
For IT8721 Power leakage

GNDD
RI1#/GP32
DCD1#/GP33

DSR1#/GP45

VCORE_EN/PCH_C0/FAN_CTRL4
DTR1#/JP4
SIN1/GP41

RTS1#/JP2

GP66
GP67
SOUT1#/JP3

PD7/GP77/BUSSO2
PD6/GP76/BUSSO1
PD5/GP75/BUSSO0
PD4/GP74/BUSSI2
PD3/GP73/BUSSI1
PD2/GP72/BUSSI0
PD1/GP71
PD0/GP70
STB#/GP87/SMBC_M1
AFD#/GP86/SMBC_R1
VLDT_EN/PCH_D0/GP65

ERR#

ACK#/GP83
INIT#/GP85/SMBD_M1
SLIN#/GP84/SMBD_R1
{19} CTS1- 32 CTS1#/GP31 BUSY/GP82 5

a
33 BEEP_GB PE/GP81 4
-THERM R8 0/4/SHT/M/X 34 3 R729

ti
PCIRSTIN#/CIRTX2/GP15 SLCT/GP80 8.2K/4
35 2
IT_VCCH
HOLD_M 36
3VSB AVCC3
1
IT_AVCC GP22 ISOLAT
HOLD_M#/GP64 VIN0/VCORE(1.1V) VIN0 {31} 3VDUAL
HOLD_B 37 128
HOLD_B#/GP63 VIN1/VDIMM_STR(1.5V) VIN1 {31}

a.
{31} FANIO1 38 FAN_TAC1 VIN2(+12V) 127 VIN2 {31}
39 126

n
FAN_CTL1 VIN3(+5V) VIN3 {31}
{31} FANIO2 40 FAN_TAC2/GP52 VIN4/VLDT_12 125
41 124
{31} FANPWM2 FAN_CTL2/GP51 VIN5 VIN5 {31} for LAN AR8151

e
{31} FANIO3 42 FAN_TAC3/GP37 VIN6 123 VIN6 {31}
{31} FANPWM3 43 FAN_CTL3/GP36 VREF 122 VREF {31}
{27} VTT_LEVEL 44 RSTCONOUT/GP35 TMPIN1 121 SYS_TEMP {31}
45 120 1 k8 power sequency function is Disable

if d

si
{29} BEEP- RSTCONIN/GP34 TMPIN2 CPU_TEMP {31}
46 GNDD TMPIN3 119 PWM_TEMP {31} JP4
-5VSB_CTRL 47 118 R54 0/4/X 0 k8 power sequency function is Enable
48
5VSB_CTRL#
5VAUX_SW IT8728F(GB) TS_D-
GNDA 117

IO_PWOK
ITE_PWROK2 49 PWRGD2_50ms RSMRST#/CIRRX1/GP55 116 R53
R62
22/4
22/4
-RSMRST
-RSMRST {12,25} 1 1 The default value of EC Index 63h/6Bh/73h is 80h.
50 ATXPG/GP30 PCIRST3#/GP10 115 -PCIE_RST {14,15,16}
51 GP27/SIN2 MCLK/GP56 114 MCLK {31} JP3 10 The default value of EC Index 63h/6Bh/73h is FFh.

n
{23} 8728_GP26 52 GP26/SOUT2 MDAT/GP57 113 MDAT {31}
JP5 0 1 The default value of EC Index 63h/6Bh/73h is 00h.

ne
{31} FANIO4 53 FAN_TAC4/GP25/DSR2# KCLK/GP60 112 KCLK {31}
54 FAN_TAC5/GP24/RTS2# KDAT/GP61 111 KDAT {31}
0 0 The default value of EC Index 63h/6Bh/73h is 40h.

o
{11} TEMP_ALART- 55 GP23/CPU_PG 3VSBSW#/GP40 110
C 56 109 C
{11} PECI_CTL GP22 PWRGD3_150ms
57 GP21/DCD2# SUSC#/GP53 108 -S4_S5 {12,26}
58 107 R70 0/4/SHT/M/X
GP20/CTS2# PSON#/GP42 -PSON {26,30}
59 106 IO_GP43 R71 0/4/SHT/M/X

C
{32} ISOLAT GP17/RI2# PANSWH#/GP43 -PWRBTSW {12,29}
JP5 60 105
DTR2# GNDD

SST/AMDTSI_D/PCH_D1/MTRB#

do
R52 1K/4/1 -RST_BTN 61 104
VCC3 CIRTX1/CE_N PME#/GP54 -LPCPME {12}
{30} 8728_GP14 62 PCH_C1/GP14 PWRON#GP44 103 PWRBTSW {12}
R55 22/4 ITE_PWROK 63 102 R86 0/4/SHT/M/X

e
{11,12,30} PWROK1 PWRGD1_30ms SUSB# -SLP_S3 {12,23,25,26}
R64 22/4 CEB_N

PECI/AMDTSI_C/DRVB#
{32} -PFMRST2 64 PCIRST1#/GP12 CE2_N/GP47 101
R68 22/4 PRST1- 65 100

t
{4} -PFMRST1 PCIRST2#/GP11 VBAT VBAT {12}

SMBD_M2/WGATE#
66 99

SMBD_R2/HDSEL#
IT_VCCH 3VSB COPEN# -CASEOPEN {29}

SMBC_M2/STEP#
SIO_18V 67 98 IT_VCCH C13 R73
VCORE 3VSB

SMBC_R2/DIR#
-PFMRST 28_3VSB 0.01u/4/X7R/25V/K 8.2K/4/X -PFMRST

y
68 97

in
{12} -PFMRST LRESET# SYS_3VSB -PFMRST {12}
KRST#/GP62

y
-LDRQ0
CE_IN/GP50
{12} -LDRQ0 69 LDRQ# DSKCHG# 96
BC20
LFRAME#

GA20/JP5

DENSEL#

WDATA#

RDATA#
SERIRQ

3VDUAL_PCH 22p/4/NPO/50V/J/X
PCICLK

INDEX#
MTRA#

DRVA#

TRK0# b
CLKIN
GNDD

WPT#
BC21 BC22
LAD0
LAD1
LAD2
LAD3

p
0.1u/4/X7R/16V/K 1u/4/X5R/6.3V/K
EUP FROM PCH

a o
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95

i-
IT8728F/DX (GB)/QFP128 internal power pin, max 22nF cap

g
{11} SERIRQ
LAD0
LAD1
LAD2
LAD3

i
SIO_18V

C
{12} -LFRAME

{12} LAD0
BC18 BC19
{12} LAD1

G n ot
1u/4/X5R/6.3V/K 1u/4/X5R/6.3V/K VCC
{12} LAD2
B {12} LAD3
is B
{11} -KBRST For IT8728
{11} A20GATE R81 0/4/SHT/M/X R36
{10} LPC33 PECI {4,11}
8.2K/4/X
R80 0/4/SHT/M/X
{10} LPCCLK48 SSTCTL {11} EUP control detect R31 0/4/SHT/M/X IO_PWOK
R83 100/4/1 28_3VSB {30} PWOK
kn

IT8721 IT8728 C14


3VDUAL
FAN_CTL4/VID_TURBO 10p/4/NPO/50V/J/X

o
PIN121 VCORE_EN/PCH_C0

PIN120 VDDA_EN VLDT_EN/PCH_D0 +12V


GP30 CSIN
ATXPG

D
PIN19

BC249 -LDRQ0 R75 1K/4/1 VCC


te

PIN31 GP14 PCH_C1 VCC3


0.1u/4/X7R/16V/K/X R77
SST/AMDTSI_D/PECI_AVA/MTRB#/PCH_D 8.2K/4/X VCC 10mil JP2 R12 8.2K/4
PIN53 SST/AMDTSI_D/MTRB#/PCH_D1 VCC3
ITE_PWROK2 R32 1K/4/1 IT_VCCH R10 1K/4/1/X JP3 R11 8.2K/4
VCC3 VCC3
PECI/AMDTSI_C/DRVB# R28 3VDUAL_PCH JP4 R9 8.2K/4
PIN55 PECI/AMDTSI_C/DRVB#/PCH_C VCC3
CEB_N R90 1K/4/1/X VCC 8.2K/4 R749 8.2K/4 JP5 R50 8.2K/4/X
VCC3
GP47 SYS_3VSB R85 680/4/1/X ITE_PWROK R56 1K/4/1 R29
PIN66 VCC3
8.2K/4
w.

PIN70 SYS_3VSB GP47 R91 1K/4/1 VCC3 BC6 BC1 BC4


-PCIE_RST R66 1K/4/1 1u/4/X5R/6.3V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
VCC3 {31} FANPWM2
PIN95 VIN3/ATXPG VIN2(VCC5) HOLD_M R6 1K/4/1 VCC3
HOLD_B R4 1K/4/1 -PFMRST1 R67 1K/4/1/X {31} FANPWM3
PIN96 VIN2 VIN1(VCC12) VCC3 VCC3
Only For Push-Pull Mode JP3--- High SPI-Flash Disable
VIN1(VCC5) VIN1/VDIMM_STR(1.5V) -PFMRST2 R63 1K/4/1/X
A PIN97
R79 8.2K/4/X R78 0/4/X CSIN
VCC3 Low SPI-Flash Enable A
VCC3
ww

PIN98 VIN0(VCC12) VIN0/VCORE(1.1V)


A20GATE R76 680/4/1/X
3

IT_VCCH 3VDUAL IT_AVCC

{20} -SPI_HOLD0
R84 8.2K/4/X CEB_N Q4 Gigabyte Technology
MMBT2222A/SOT23/600mA/40/X
SOT23 Title
R5 10/4 HOLD_M Hi :Disable WDT BC23
10u/8/X5R/6.3V/K BC17 BC3 BC2 ITE 8728 LPC IO
2

{20} -SPI_HOLD1
R51 8.2K/4/X -RST_BTN {11,12,30} PWROK1 R89 47K/4/1/X Lo :Enable WDT to rest PWROK 0.1u/4/X7R/16V/K 10u/8/X5R/6.3V/K 22u/8/X5R/6.3V/M
Size Document Number Rev
R3 10/4 HOLD_B BC24 Custom 1.0
0.1u/4/X7R/16V/K/X GA-H61-S3
Date: Tuesday, August 16, 2011 Sheet 18 of 34
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

COMA AU1 COM RI


NRIA- ACN1
{18} RI1- 19 RY1 RA1 2
18 3 NCTSA- NDCDA- 7 8
{18} CTS1- RY2 RA2 NDSRA-
17 4 NDSRA- Q5 5 6
{18} DSR1- RY3 RA3
16 5 NRTSA- MMBT2222A/SOT23/600mA/40 NSINA 3 4 COMA
{18} RTS1- DA1 DY1
15 6 NDTRA- NRTSA- 1 2 NDCDA- 1
{18} DTR1- DA2 DY2
14 7 NSINA -RI NDSRA- 6
{18} RXD1 RY4 RA4 -RI {12}

3
13 8 NSOUTA NSINA 2 10
{18} TXD1 DA3 DY3
12 9 NDCDA- 180p/8P4C/6/NPO/50V/K NRTSA- 7
{18} DCD1- RY5 RA5 D6 NSOUTA 3
11 20 VCC NCTSA- 8
GND 5V NRIA- R93 75K/4/1 SOT23 NDTRA-
-12V 10 1 +12V 4 11

m
-12V 12V NRIA-

1
D
9 D
R92 ACN2
CD4148WP/1206/300mA 5
ABC2 ABC1 ABC3 8.2K/4 NSOUTA 7 8
0.1u/4/X7R/16V/K/X GD75232/TSSOP20 0.1u/4/X7R/16V/K/X NCTSA- 5 6

co
NDTRA- 3 4
0.1u/4/X7R/16V/K/X NRIA- 1 2
COM/GE/SC-6mm/RA/1/D

i a
180p/8P4C/6/NPO/50V/K

a.
en
if d

si

SOT23
Q36
BAT54A/SOT23/200mA
VR_HOT {23}
-PROCHOT
{4,23,25} -PROCHOT
R458 0/4/X
-PCH_HOT {12}

ne
o
C C
VCC -THERM {18}

3
C
Q37
D 2N7002/SOT23/25pF/5

do
R443
22K/4 G S
SOT23

1
t

3
y
Q40

in
y
MMBT2222A/SOT23/600mA/40
-PROCHOT R424 8.2K/4 SOT23

1
g a b o p i-
i
G n ot C
B
is B
kn

D o
te
w.

A A
ww

Gigabyte Technology
Title
COM & PROHOT/Dynamic O.C.
Size Document Number Rev
Custom
GA-H61-S3 1.0
Date: Tuesday, August 16, 2011 Sheet 19 of 34
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

VCC3
VCC3
MOSI For DMI RX Termination Voltage
VCC3 R558 ICH_SPI_MOSI R619 8.2K/4/X
{12} ICH_SPI_MOSI
0/4/SHT/X -ICH_SPI_CS R590 8.2K/4/X
{12} -ICH_SPI_CS
-SPI_HOLD0 R613 8.2K/4/X
-SPI_HOLD1 R602 8.2K/4/X

BC208 M_BIOS BC211


0.1u/4/X7R/16V/K 1u/4/X5R/6.3V/K VCC3
D -ICH_SPI_CS R603 22/4 1 8 D
CS# VDD

m
-SPI_WP1 R683 8.2K/4/X
{12} -SPI_WP1
C168 SPI_MISO 2 7 -SPI_HOLD0 -SPI_WP0 R684 8.2K/4/X
SO HOLD# -SPI_HOLD0 {18} {12} -SPI_WP0
10p/4/NPO/50V/J/X ICH_SPI_MISO R685 8.2K/4
{12} ICH_SPI_MISO
-SPI_WP0 ICH_SPI_CLK

l
3 6

co
WP# SCK
4 5 ICH_SPI_MOSI
VSS SI

a
C180 R290 1K/4/1/X
{11} -GNT0
MAIN 10p/4/NPO/50V/J/X

i
32M/SPI/SO8/200mil/S R289 1K/4/1/X
{11} -GNT1

t
VCC3
Default int pull up

a.
n
R598
0/4/SHT/X

e
SPI_MISO R615 22/4
ICH_SPI_MISO {12}

if d

si
B_BIOS BC213
1u/4/X5R/6.3V/K
-ICH_SPI_CS R600 22/4 1 CS# VDD 8 BOOT
C
DEVICE GNT0 GNT1 C
SPI_MISO 2 7 -SPI_HOLD1
SO HOLD# -SPI_HOLD1 {18}
LPC 0 0

n
-SPI_WP1 3 6 ICH_SPI_CLK

ne
WP# SCK ICH_SPI_CLK {12}
PCI 0 1
ICH_SPI_MOSI

o
4 VSS SI 5 ICH_SPI_MOSI {12}
NAND 1 0
BACKUP BIOS
32M/SPI/SO8/200mil/S SPI 1 1

do
e
1 means floating
0 means PD 1K

y t
in
b p y
B B

i g a C o i-
G n ot
is
kn

D o
A A

Gigabyte Technology
te

Title
BIOS
Size Document Number Rev
Custom GA-H61-S3
w.

1.0
Date: Tuesday, August 16, 2011 Sheet 20 of 34
8 7 6 5 4 3 2 1
ww
5 4 3 2 1

AZALIA CODEC ALC887-VD2/ALC889/VT1708S-CD/VT1708S-CE Colay


ALC887-VD2 ALC889 VT1708S-CD VT1708S-CE
CR65 X O O X
CR64 X X X 0.1u/4
CBC35 O X X O

m
D D
CR44/CBC6 47ohm+1nF 47ohm+1nF22ohm+100P 22ohm+100P
CR31 O O O O

co
CR30 X X X X

a
CBC1/CBC2 22uF/X5R 22uF/X5R 22uF/X5R 22uF/X5R

i
CR20 5.11K/4/1 5.11K/4/1 5.1K/4/1 5.1K/4/1

t
CR34 20K/4/1 20K/4/1 5.1K/4/1 20K/4/1

a.
n
CBC39/CBC40 N/A N/A 100P/4 100P/4

e
CR6/CR7/CR54/CR58 22K/4 22K/4 10K/4 10K/4 CR34: 20K/4/1% @Realtek cdec

if d
CR34: 5.1K/4/1 @VIA cdec

si
CR5/CR8/CR1/CR14/ CBC39 100P @VIA codec
CR17/CR22
CR34 20K/4/1
CR13/CR11/CR57/CR53 75 ohm 62 ohm 75 ohm 75 ohm
CBC39 100p/4/NPO/50V/J/X

n
CR51/CD1/CBC7 O X X O

ne
CD2/CD3/CQ3/CQ5 X O O X

o
C C
CESD1 O O O O
AVDD
CESD2 X O O X

do
CBC12
{22} SPDIF

e
CR63 2.2/H/6 0.1u/4/X7R/16V/K VT1708S :22 OHM + 100PF
VCC3
CR44 47/4/1

t
FAUDIO_JD {22}
CBC34

48
47
46
45
44
43
42
41
40
39
38
37
CU1
co-layout 22u/8/X5R/6.3V/M
CBC26

LFE

JDREF
SPDIF0

SURBACK-L
EAPD

AVSS2

SURR-L
AVDD2
SURBACK-R

CEN

SURR-R

NC
y
in
1n/4/X7R/50V/K

y
VT1708S
CR46,CR57 For ALC889A driver config
{22} SPDIFO2_HDMI JD resistors close to pin34 of CODEC

b
CR32 8.2K/4/X 1 36

p
DVDD1 FRONT-R LINE_O_R {22}
CBC40 For ALC888-VD & ALC892 CAP CBC35 10u/8/X5R/6.3V/K 2 GPIO0/SPDIF1 FRONT-L 35 LINE_O_L {22} Can Support Amp Out
CR64 8.2K/4/X 3 34

a
CR65 0/4/X GPIO1 SENSE B CR28 8.2K/4/X AVDD

o
4 DVSS1 CAP 33
VODR CR16 8.2K/4

i-
{12} ACZ_SDOUT 5 SDATA_OUT MIC1-VREFO-R/FMIC2 32 MIC1_VREFO_R {22}
50歐姆:4/5 CR60 22/4 6 31 VT1708S :3.3K

g
{12} ACZ_BITCLK BIT_CLK LINE2-VREFO/JD4 LINE2_VREFO {22}
7 DVSS2 MIC2-VREFO/AFILT2 30 MIC2_VREFO {22}

i
ACZ_BITCLK:4/12 CR61 22/4 8 29

C
{12} ACZ_SDIN2 SDATA-IN LINE1-VREFO-L/AFILT1
9 28 VOBR CR19 8.2K/4
VCC3 DVDD2 MIC1-VREFO-L/VREFOUT VT1708S :3.3K MIC1_VREFO_L {22}
{12} ACZ_SYNC 10 SYNC VREF 27
11 26 AVDD 5VDUAL
{12} -ACZ_RST RESET# AVSS1

G n ot
12 PC_BEEP AVDD1 25
B CR14/CBC4 close to SouthBridge
CBC32
is
CBC33
CBC38
CBC7
22u/8/X5R/6.3V/M
CR51 0/6
B

1
22p/4/NPO/50V/J/X 0.1u/4/X7R/16V/K CD1

SENSE A

CD_GND
LINE2-R

LINE1-R
LINE2-L

LINE1-L
0.1u/4/X7R/16V/K CBC10 CBC8 AZ2225-01L/SOD323

MIC2-R

MIC1-R
MIC2-L

MIC1-L
CD_R
CD_L
CBC41 22u/8/X5R/6.3V/M
22p/4/NPO/50V/J/X
0.1u/4/X7R/16V/K For ALC888-VD/ALC892
ALC887-VD2-CG/LQFP48/S
kn

13
14
15
16
17
18
19
20
21
22
23
24
o
Digital Area Analog Area
CBC1 22u/8/X5R/6.3V/M
LINE_IN_R {22}

D
CBC2 22u/8/X5R/6.3V/M 50歐姆:4/10
VT1708S CBC40 LINE_IN_L {22}
te

100p/4/NPO/50V/J/X CBC9 10u/8/X5R/6.3V/K


MIC1_R {22}
CR20 5.11K/4/1 CBC11 10u/8/X5R/6.3V/K
{22} FRONT_JD MIC1_L {22}
CR23 10K/4/1
{22} LINE1_JD
CR18 20K/4/1
w.

{22} MIC1_JD

JD resistors close to pin13 of CODEC


A A
ww

CESD1
{22} LINE2_L
LINE2_R LINE2_L
1 6 {22} LINE2_R Gigabyte Technology
2 5 AVDD {22} MIC2_L Title
MIC2_L 3 4 MIC2_R HD AUDIO VT1708S
{22} MIC2_R
Size Document Number Rev
AOZ8902CIL/SOT23-6 Custom GA-H61-S3 1.0
Date: Tuesday, August 16, 2011 Sheet 21 of 34
5 4 3 2 1
5 4 3 2 1

CR50 0/6/X CR49 0/6/X CR7 22K/4


CODEC POWER/EMI PAD LINE-OUT CR6 22K/4
CR21 2.2/6 CEC1 100u/OS/D/6.3V/66/A/35m
+12V CR5 75/4/1 AJ_B5

1
{21} LINE_O_R

+
CEC2 100u/OS/D/6.3V/66/A/35m
EUP

4
CD3 CR8 75/4/1 AJ_B2

1
{21} LINE_O_L
CD4148WP/1206/300mA/X

+
5VDUAL AVDD CBC19 CBC24
CQ5 CQ3 180p/4/NPO/50V/J 180p/4/NPO/50V/J
78L05/SOT89/0.1A/X

1
2
3

m
CD4148WP/1206/300mA/X
D D
0.1u/4/X7R/16V/K/X Only reserved for ALC888
1

CD2

l
CBC13 AZ2225-01L/SOD323/X

co
22u/8/X5R/6.3V/M
LINE-IN CR1 75/4/1 AJ_A5
{21} LINE_IN_R

a
CR24 0/4/X
CR14 75/4/1 AJ_A2
{21} LINE_IN_L

i
上ALC892時,此顆電容要保留 CBC20 CBC23

t
180p/4/NPO/50V/J 180p/4/NPO/50V/J
Verify MIC function
ADD CD2 For ESD PROTECT DIODE

a.
in LINE-in

n
For 889A/888

e
MIC-IN CR17 75/4/1 AJ_C5
{21} MIC1_R

if d

si
CR22 75/4/1 AJ_C2
{21} MIC1_L
CBC3 CBC4
{21} MIC1_VREFO_L
180p/4/NPO/50V/J 180p/4/NPO/50V/J
{21} MIC1_VREFO_R

ne
o
C C

do
SPDIF_OUT

te
CR30 0/4/X
{21} SPDIF

y
in
y
CR31 0/4/SHT/X
{21} SPDIFO2_HDMI

b
PIN

p
CBC17

a o
100p/4/NPO/50V/J
SPDIF_O

i-
PH/1*2/BK/2.54/VA/D

i g C
For HDMI SPDIF

G n ot
B
is B

AUDIO
C4
kn

SOT23
LINE1_JD C4
{21} LINE1_JD
AJ_A5
C3 C3 BLUE AZALIA FRONT PANEL VT1708S :3.3K
C5

o
C5 CQ4
LINE-IN
AJ_A2 C2 BAT54A/SOT23/200mA CR52 8.2K/4
C2 GND

SOT23
{21} LINE2_VREFO
CR56 8.2K/4

D
B4 B4
FRONT_JD B3 CQ2
te

{21} FRONT_JD B3
AJ_B5 B5 BAT54A/SOT23/200mA CR10 8.2K/4
B5 GREEN
AJ_B2 B2 LINE-OUT
{21} MIC2_VREFO
CR9 8.2K/4
Digital Area
B2 GND 3VDUAL
CR58 22K/4
A4 CR54 22K/4
MIC1_JD A4 CR62
{21} MIC1_JD A3 A3
AJ_C5 A5 F_AUDIO 8.2K/4/X
A5 PINK
w.

CBC6 10u/8/X5R/6.3V/K CR13 75/4/1 M2_L 1 2


{21} MIC2_L
AJ_C2 A2 MIC-IN CBC5 10u/8/X5R/6.3V/K CR11 75/4/1 M2_R 3 4
A2 GND {21} MIC2_R -ACZ_DET {12}
A1 L2_R L2-R 5 6 CR55 20K/4/1
A1 CR57 75/4/1
MH1 MH1 {21} FAUDIO_JD 7
MH4 MH2 L2_L L2-L 9 10 CR59 39.2K/4/1
MH4 MH2 CR53 75/4/1
MH5 MH5 MH3 MH3
PH/2*5K8/GED/2.54/VA/D
A
CR12 0/4/X A
ww

A3RP/13P/BL,LI,PK/RA/D/1/B 100u/OS/D/6.3V/66/A/35m
L2_R
1

{21} LINE2_R
CEC9 CBC30 CBC29 CBC37 CBC36
+

L2_L 180p/4/NPO/50V/J 180p/4/NPO/50V/J 180p/4/NPO/50V/J 180p/4/NPO/50V/J


1

{21} LINE2_L
CEC6
+

100u/OS/D/6.3V/66/A/35m
Gigabyte Technology
Title
AUDIO JACK
Size Document Number Rev
Custom GA-H61-S3 1.0
Date: Tuesday, August 16, 2011 Sheet 22 of 34
5 4 3 2 1
5 4 3 2 1

VIN

DL1

D1
D2
D3
D4
D5
VCC CPU_VTTP VIN DBC72
V12
1uH/30A/IMD0814/R/D 1u/6/X7R/16V/K
VCC 1 1 DQ38
DBC73 DBC74 DBC75 DEC1 + DEC3+ DBC88 G
1u/6/X7R/16V/K RDC=0.9(mΩ)
DR280 1u/6/X7R/16V/K 270u/FP/D/16V/8C/A/10m DL2
check power sequence 2.2/6 1u/6/X7R/16V/K UG1 DR279 2.2/6 UG1_1 0.6uH/42A/IMD0814/R/D

S3
S2
S1
1u/6/X7R/16V/K 270u/FP/D/16V/8C/A/10m NTMFS4921N/N/6.95m/PPAKSO8
DR275 DBC76 DR276 DR277 DR278 VCC_6364 DR281 8.2K/4 VCORE
1K/4/1 1u/4/X5R/6.3V/K 100/4/1 100/4/1 100/4/1 DBC77 PHASE1
R50

D1
D2
D3
D4
D5

D1
D2
D3
D4
D5
1u/4/X5R/6.3V/K
DR283
DBC78 2.2/6
1u/6/X7R/16V/K

m
D D
DQ39 DQ40
PHASE1 LG1 DR284 0/6S/X LG1_1 G

35
G
DU13 DC100 47p/4/NPO/50V/J/X VCC +12V DC101
40 38 PWM1 DC102 1n/4/X7R/50V/K

VCC
{25,28} VTT_PWRGD EN_VTT PWM1
11 46 DR286 100/4/1 ISEN1 0.1u/6/X7R/25V/K

S3
S2
S1

S3
S2
S1
l
{4} -PVIDALRT SVALERT# ISEN1+

co
{4} PVIDSOUT 10 SVDATA ISEN1- 45
DR288 51/4/1 12 PHASE1 DR289 8.06K/4/1 DBC790.1u/6/X7R/25V/K DBC80 DR410 DR287 DR290
{4} PVIDSLCK SVCLK
VR_RDY 13 0.1u/6/X7R/25V/K 2.2/6 2.2/6/X 0/6/SHT/X DU16 PHASE1
VR_RDY UG1 NTMFS4935N/N/3.2mm/PPAKSO8 NTMFS4935N/N/3.2mm/PPAKSO8
ISEN1 DR291 0/4S/X
17 VR_RDYS 2 BOOT UGATE 1

a
DR292 0/4/SHT/X 15 DC103 47p/4/NPO/50V/J/X 7 8 VIN
{19} VR_HOT VR_HOT# PVCC PHASE
36 PWM2 DR293 0/6/SHT/X 6
PWM2 VCC

ti
DR294 56K/4/1 DBC81 1n/4/X7R/50V/K 42 DR295 100/4/1 ISEN2 PWM1 3
ISEN2+ PWM

D1
D2
D3
D4
D5
8 41 4 5 LG1
FB DBC82 150p/4/NPO/50V/J COMP ISEN2- PHASE2 DR296 8.06K/4/1 DBC830.1u/6/X7R/25V/K DBC84 GND LGATE
FB 7 0.1u/6/X7R/25V/K DBC85 DBC86 DBC70
DR297 FB 1u/6/X7R/16V/K 0.1u/4/X7R/16V/K ISL6609ACBZ/SO8 1u/6/X7R/16V/K

a.
3.83K/4/1/X VDIFF DBC89 DR298 6 DC104 47p/4/NPO/50V/J/X DQ41
PSICOMP
1n/4/X7R/50V/K 100/4/1
PWM3 39 PWM3 Pop ISL6625CB for PSI G RDC=0.9(mΩ)
VCORE DBC90 DR299 48 DR300 100/4/1 ISEN3 DL3
[ISL6625CBZ/SO8]

n
1n/4/X7R/50V/K 100/4/1 ISEN3+ UG2 DR302 2.2/6 UG2_1 0.6uH/42A/IMD0814/R/D
5 HFCOMP ISEN3- 47
DC105 DR303 DR301 1.27K/4/1/X PHASE3 DR304 8.06K/4/1 DBC91 0.1u/6/X7R/25V/K DBC92

S3
S2
S1
2.2n/4/X7R/50V/K/X DR305 4.53K/4/1 0.1u/6/X7R/25V/K PHASE2 DR306 8.2K/4 NTMFS4921N/N/6.95m/PPAKSO8 VCORE
8.2K/4 DR307 VCC +12V PHASE2

e
R50

D1
D2
D3
D4
D5

D1
D2
D3
D4
D5
10/4 VSEN 4 DC107
DBC93 VSEN
37 DR310 0/4/SHT/M/XVCC_6364
Disable 0.1u/6/X7R/25V/K
{4} VCC_SENSE
DR309 1K/4/1 0.1u/4/X7R/16V/K/X 3 RGND
PWM4
ISEN4+ 44 ISEN4+ phase 4 DR311
43 ISEN4- DR411 DR308 DR312 2.2/6
ISEN4-

if d

si
DBC94 2.2/6 2.2/6/X 0/6/SHT/X DU17 DQ42 DQ43
DR314 0/4S/X 0.1u/4/X7R/16V/K/X 2 1 UG2 LG2 DR315 0/6S/X LG2_1 G G DC108
{4} VSS_SENSE BOOT UGATE
7 8 1n/4/X7R/50V/K
DR392 30K/4/1 DC144 1n/4/X7R/50V/K DC159 47P/4/NPO/50V/J ISENS PVCC PHASE
ISENS {24} 6 VCC
18 26 PWMS PHASES PHASES {24} PWM2 3

S3
S2
S1

S3
S2
S1
COMPS PWMS PWMS {24} PWM VCORE VCORE
DR318 DC146 33p/4/NPO/50V/J 24 DR419 680/4/1 ISENS DR316 4 5 LG2
100/4/1 ISENS+ DC162 0.1u/4/X7R/16V/K 0/6S/X GND LGATE
19 FBS ISNES- 25
DC147 DR394 DR395 DC148 PHASES DC160 0.22u/4/X5R/6.3V/K DBC98 DBC99 ISL6609ACBZ/SO8 PHASE2
1n/4/X7R/50V/K 249/4/1 249/4/1/X 1n/4/X7R/50V/K/X DR420 DBC100 0.1u/4/X7R/16V/K 1u/6/X7R/16V/K 0.1u/4/X7R/16V/K/X NTMFS4935N/N/3.2mm/PPAKSO8 ISEN2 DR319 0/4S/X
CPU_VAXG DR407 5.11K/4/1 VIN NTMFS4935N/N/3.2mm/PPAKSO8 1 1
OVP

n
DR396 2.49K/4/1 10/4 DR397 499/4/1/X 16 DR389 2.74K/4/1 DR322 6.65K/4/1 + DEC10 + DEC11
HFCOMPS

ne
1 DR320 100K/4/1 +12V
EN_PWR_OVP

D1
D2
D3
D4
D5
C DR398 DC149 20 +12V 560u/FP/D/6.3V/69/A/11m C
10K/4/1 0.1u/4/X7R/16V/K/X VSENS DR324 1M/4 560u/FP/D/6.3V/69/A/11m
RAMP_ADJ 2

o
DR399 499/4/1 VAXSEN 21 PHASE3 DBC71
{4} VAXG_SENSE RGNDS BTS
DC150 30 DR326 499K/4/1 VCC_6364 VCC +12V 1u/6/X7R/16V/K
0.1u/4/X7R/16V/K/X BTS_DES_TCOMPS DC109 DQ44
{4} VAXG_VSS
DR400 0/4/SHT/X RTNG IMONS 14 IMONS BT_FDVID_TCOMP 29 BT DR329 499K/4/1/X 0.1u/6/X7R/25V/K G RDC=0.9(mΩ) VCORE VCORE
DC151 DL4
DR401 0.1u/4/X7R/16V/K/X 27 DR332 10K/4/1/X DR412 DR330 DR333 UG3 DR334 2.2/6 UG3_1 0.6uH/42A/IMD0814/R/D
ADDR_IMAXS_TMAX

C
100/4/1 9 2.2/6 2.2/6/X 0/6/SHT/X DU18

S3
S2
S1
IMON DR336 54.9K/4/1 UG3 DR337 8.2K/4 NTMFS4921N/N/6.95m/PPAKSO8 VCORE
NPSI_DE_IMAX 28 2 BOOT UGATE 1
IOUT PHASE3 1 1

do
7 PVCC PHASE 8 R50 + +

D1
D2
D3
D4
D5

D1
D2
D3
D4
D5
6 DEC12 DEC7
FS DR327 DR331 DR335 DR339 PWM3 VCC
34 FS_DRP 3 PWM
22 31 453K/4/1/X 499K/4/1 10K/4/1 205K/4/1 DR341 4 5 LG3 DR343 560u/FP/D/6.3V/69/A/11m
FSS_DRPS TM GND LGATE

e
DR338 2M/4/1/X 33 0/6S/X 2.2/6 560u/FP/D/6.3V/69/A/11m
GND

VCC RSET
32 23 DBC103 DBC104 ISL6609ACBZ/SO8 DQ45 DQ46
IAUTO TMS VCC_6364 1u/6/X7R/16V/K 0.1u/4/X7R/16V/K/X LG3 DR344 0/6S/X LG3_1 DC110
G G

t
1n/4/X7R/50V/K
49

DBC106 DR345 ISL6364CRZ/QFN48 DR342 1K/4/1


0.047u/4/X7R/16V/K 20K/4/1 DR346 R641 DR347 DR348

S3
S2
S1

S3
S2
S1
243K/4/1 243K/4/1 62K/4/1 0/4S/X DR390 0/4/X

y
DBC105 RS_VRM1 PHASE3

in
y
0.1u/4/X7R/16V/K 10K/1/4/S ISEN3 DR349 0/4S/X
Close VCORE output choke NTMFS4935N/N/3.2mm/PPAKSO8 NTMFS4935N/N/3.2mm/PPAKSO8
BOTTOM PAD
IOUTS
CONNECT TO GND

b
IMONS DEFAULT FW=200KHz

p
Through 8 VIAs DR421 1K/4/1

VCC DR416 2M/4/1/X

a
DC161 RS_VRM3

o
VCORE_ADJ DR34 0/4/SHT/X VSEN 0.1u/4/X7R/16V/K 10K/1/4/S
VCORE_ADJ
ISEN4+ DR313 1K/4/1/X

i-
DC158 DR409
VAXG_ADJ
VAXG_ADJ DR417 0/4/SHT/X VAXSEN Close VAXG output choke

g
0.047u/4/X7R/16V/K 10K/4/1 ISEN4- DR354 0/4/SHT/M/X

disable

i C
OCP點做在180A phase 4
L=0.6uH/0.9m ohm
B B
FB L/DCR=RC' 0.6u/0.9m=RX0.1u R=6.67K

G n ot
DR185~DR187=6.67K*1.2=8.06K
DR355
1K/4/1
Risen=[load/phase)*DCR]/Isen
=[(180A/3)X0.9m]/50uA=1.08k ohm
is VCC3

+12V 一定要靠近PWM Rset=DR347=62k (ISL6364 set range DR371


3

3.84k~115.2k) 3VDUAL 1K/4/1 -PROCHOT


-PROCHOT {4,19,25}
D 62K/64=0.98K , 0.98K + 100ohm(Risen)=1.08k

3
DR360
PCH_VRMPWRGD {12}

3
8.2K/4 Isens+ DR184~DR186阻值100ohm
G S
DR374 DQ64
SOT23 Vmon=(Rimon/N)*(DCR/Risen)*Iout 8.2K/4 DR375 CPU_VTT MMBT2222A/SOT23/600mA/40
3

DQ51 VCC3 DQ58 100K/4/1 DC113 SOT23


2

kn

2N7002/SOT23/25pF/5
1.085=(20k/3)*(0.9/1080)*Iout SOT23 0.1u/4/X7R/16V/K R637 100/4/1

1
DQ54 Iout=180A , Rmon=DR241=20K C190 MMBT2222A/SOT23/600mA/40

1
o
MMBT2222A/SOT23/600mA/40 0.1u/4/X7R/16V/K/X VCC3
Fsw=5*(10^10)/(Rt)=205KHz , Rt=243k

3
DR364 8.2K/4 SOT23 R17 1K/4/1
{12} GPIO33
VDIFF DR376
2

1K/4/1 8728_GP26
{18} 8728_GP26
CPU loadline calibration DQ60
VIN=12V,IF VR_RDY DR380 8.2K/4 SOT23

D
VOUT=1.2V,IOUT=112A(VCORE)+17A(VTT)+8.8A(VSSA)=137.8A,PHASE=5 MMBT2222A/SOT23/600mA/40

1
DR382 8.2K/4/X
{12,18,25,26} -SLP_S3
IRMS=13.78A
te

DR404 10K/4/1 BT
3

+12V
D
DQ69
DR405 2N7002/SOT23/25pF/5
22K/4 G S
SOT23
2

1
3

For 治具Vcore Boot voltage=1.1V 0X22 = 75%xVCC


w.

BC258
0.1u/4/X7R/16V/K U19
A R735 0/6/X NCT_POWER 1 8 VCORE_ADJ A
5VDUAL VDD VREF1 VCORE_ADJ
DR406 1K/4/1 SOT23
{4} TDI VCC R736 0/6/SHT/X R737 1.3K/4/1 R131 0/4
2

3VDUAL 2 B_SEL VREF2 7 0_6LEVEL_DDR {26} VAXG_ADJ


R738 3.9K/4/1
3 6 R132 0/4/X
GND VREF3 VTTD_ADJ {27}
DQ70 DR422
MMBT2222A/SOT23/600mA/40 10K/4/1 4 5
{7,8,12,14,15,17,30} SMBDATA SDA SCL SMBCLK {7,8,12,14,15,17,30}
3

BC259 NCT3933U/SOT23-8 BC260


ww

100p/4/NPO/50V/J/X 100p/4/NPO/50V/J/X
D
DQ71
2N7002/SOT23/25pF/5
G S
SOT23 BTS Title
ISL6366 for VR12 DT
2

For 治具Vcore Boot Size Document Number Rev


CustomGA-H61-S3 1.0
voltage=1.1V
Date: Tuesday, August 16, 2011 Sheet 23 of 34
5 4 3 2 1
5 4 3 2 1

VAXG
D VIN D

ISL6612 use +12V


VIN
ISL6609 use VCC 1

m
ISL6612 use 1 ohm + DEC13
270u/FP/D/16V/8C/A/10m
ISL6609 use 0 ohm

D1
D2
D3
D4
D5
l

co
DBC102
VCC PHS DR28 1u/6/X7R/16V/K

a
2.2/6 DQ13

i
DC10 UGS UGS_1 G NTMFS4921N/N/6.95m/PPAKSO8
0.1u/6/X7R/25V/K MAX:35A CPU_VAXG

t
DR117 CPU_VAXG
C C

a.
1/6 DR30 8.2K/4

D2 S3
D3 S2
D4 S1
DU5 PHS
R50

D1

D5

D1
D2
D3
D4
D5
2 1 UGS
BOOT UGATE
7 PVCC PHASE 8

e
6 DR423 DL18
PWMS VCC 2.2/6 0.6uH/42A/IMD0814/R/D 1 1
3 PWM
4 5 LGS + +
GND LGATE

if d

si
LGS LGS_1 G G DC155 DEC14 DEC15
DBC15 DBC16 ISL6609ACBZ/SO8 1n/4/X7R/50V/K 560u/FP/D/6.3V/69/A/11m 560u/FP/D/6.3V/69/A/11m
1u/6/X7R/16V/K 0.1u/4/X7R/16V/K/X DR35
0/6/SHT/M/X
Pop ISL6625CB for PSI

S3
S2
S1

S3
S2
S1
DQ15

n
NTMFS4935N/N/3.2mm/PPAKSO8

ne
B DQ14 B
NTMFS4935N/N/3.2mm/PPAKSO8

o
PWMS
PWMS {23}
ISENS PHASES
ISENS {23}
ISENS

C
PHASES DR424 0/4/SHT/X
PHASES {23}

do
te
Gigabyte Technology

y
in
y
A Title A

CPU CORE VR-2

b p
Size Document Number Rev
Custom

a
GA-H61-S3 1.0

o i-
Date: Tuesday, August 16, 2011 Sheet 24 of 34

g
5 4 3 2 1

i
G n ot C
is
kn

D o
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w.
ww
5 4 3 2 1

3VDUAL
5VSB +12V
5VDUAL
5VDUAL +12V

R555 NTD4963NT4G/TO252/990pF/9.6m VCC1_8_PCH

8
VCC=4.2V U17A 8.2K/4 3VDUAL 2_5LEVEL VCC3
R620 8.2K/4 Q95 5VDUAL BC231 BC239
VCC 3 +
1 5V_DRV 1 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K Q20

2
R621 2 2 R373 47K/4/1 -RSMRST NTD4963NT4G/TO252/990pF/9.6m
- -RSMRST {12,18}
12K/4/1 C187 KA393D/SO8 3 R538
VCC 1
1u/6/X7R/16V/K R554 3 R623 3K/4/1 U15A

4
1K/4/1 100/4/1 BC225 + C115 LM324DR/SO14

4
2
1 0.1u/4/X7R/16V/K EC32 1n/4/X7R/50V/K VCC18_EN 3 +
Q96 560u/FP/D/6.3V/69/A/11m R269 100/4/1VCC15_G

3
1
R612 10K/4/1 P2003ED/P/TO252/30m R626 R546 2
5VSB -
5VSB P_EN 1 Q92 169/4/1 BC207 BC204 8.2K/4 C159 1.6A max

m
2 L1085DG/TO252/5A Meet the rise time 1u/6/X7R/16V/K 0.1u/4/X7R/16V/K/X 1n/4/X7R/50V/K C102

11
D D
R618 C185 3 -RSMRST 8.2K/4
10K/4/1 1u/4/X5R/6.3V/K R553 5VSB VCC1_8_PCH

3
U17B 8.2K/4/X 1 1 5VSB R561

8
+ EC36 + EC34 40.2K/4/1 2K/4/1

l
+12V=10V

co
R556 8.2K/4 D R552 1
+12V 5 +
7 R638 BC209 +
6 22K/4 G S
- SOT23

a
R557 C158 KA393D/SO8 100u/OS/D/16V/69/A/35m 0.01u/4/X7R/25V/K/X EC18

3
2.74K/4/1 0.1u/4/X7R/16V/K 560u/FP/D/6.3V/69/A/11m Q99

1
i
2N7002/SOT23/25pF/5

4
3VDUAL Q100 560u/FP/D/6.3V/69/A/11m
MMBT2222A/SOT23/600mA/40

t
R639 75K/4/1 SOT23
5VDUAL_GATE At least 10ms delay after

a.
3
5VSB R640 27K/4/1
3VDUAL stabel
D D21

n
C192 1u/4/X5R/6.3V/K
R622 Q94
8.2K/4 G S 2N7002/SOT23/25pF/5
SOT23

e
{12} -DEPSLP
3

Q93 BAT54A/SOT23/200mA
2

MMBT2222A/SOT23/600mA/40

SOT23
C181
1n/4/X7R/50V/K/X

if d

si
-SLP_S3 R624 SOT23 DDRVTT
{12,18,23,26} -SLP_S3 8.2K/4
2

DDR_15V
5VDUAL VCC

R519
0/6/X R518

n
BC199 0/6/SHT/X

ne
1u/4/X5R/6.3V/K R508 U13
1K/4/1

o
1 VIN VREF2 8
C C
2 GND ENABLE 7

DDR_VTT_REF 3 6
VREF1 VCNTL BC196

C
4 5 10u/8/X5R/6.3V/K

GND
R505 VOUT BOOT_SEL

do
1K/4/1

C137 RT9173DPSP/3A/SO8/S

9
e
1u/4/X5R/6.3V/K

t
DDRVTT 1A max
-PROHOT

y
in
y
+12V
FOR ERP R441 158K/4/1 deasserted at 116 degree

b
5VSB 5VDUAL +12V -PROCHOT

p
-PROCHOT {4,19,23}

3
R604 R418 Q34
10K/4/1 1.6K/4/1 D 2N7002/SOT23/25pF/5

4
R581 R651

o
220/6/X 220/6 TSM_5 G S
10 +

i-
2_5LEVEL 8 TSM_7 SOT23
2_5LEVEL TSM_6

1
From I/O ErP R650 0/4/SHT/X
9 -
U15C R? CLOSE Q32
Control {18} ERP
LM324DR/SO14

i
C

11
C
D14 BC250 RS_VRM2 R425 113~127 degree
BAT54C/SOT23/200mA 22u/8/X5R/6.3V/M 100K/1/4/S 1K/4/1
PCH ErP Control 5VDUAL SHORT PROTECT C175
SOT23

RS2 CLOSE 0.1u/4/X7R/16V/K/X


D13 Q79

G n ot
CPU VR MOSFET
A

BAT54A/SOT23/200mA AP431N/SOT23/150mA
B
5VSB
5VSB
P_EN
is CLOSE PWM HOT MOSFET B
3

R665
8.2K/4 R573
8.2K/4 Q72 VCC18_EN
3

3
5VSB MMBT2907A/SOT23/-600mA/5 0 5VSB
R574 SOT23
D Q104 1K/4/1 D Q60
2

R666 2N7002/SOT23/25pF/5 5VSB R569 2N7002/SOT23/25pF/5


kn
G S
3

22K/4 8.2K/4 G S
SOT23 PWR_EN SOT23

o
5VSB Q46
2

1
From PCH ErP
3

PMBT2907A/SOT23/-600mA/50
Control

3
SOT23 5VDUAL C162
R477 MMBT2222A/SOT23/600mA/40 1n/4/X7R/50V/K/X
2

R667 Q105 150K/4 Q70 VTT_PWRGD


VTT_PWRGD {23,28}

3
270K/4 SOT23

D
{12} -DEPSLP MMBT2222A/SOT23/600mA/40 -SLP_S3 SOT23
2

C197 {12,18,23,26} -SLP_S3 R570 22K/4 D Q56

1
te

1u/4/X5R/6.3V/K R476 C129 2N7002/SOT23/25pF/5


270K/4 0.1u/6/X7R/25V/K G S
SOT23

3
R482

1
0/4/X
VCC3 R484
VCC1_05_EN {26}

3
8.2K/4 Q45
5VL_EN 5VDUAL SOT23
MMBT2222A/SOT23/600mA/40 D Q41

1
3

5VSB BC194 R483 2N7002/SOT23/25pF/5


w.
3

0.1u/6/X7R/25V/K 8.2K/4 G S
Q76 SOT23
MMBT2222A/SOT23/600mA/40 R578 Q74

1
SOT23 22K/4 PMBT2907A/SOT23/-600mA/50
R520 270K/4 R579 220/6 SOT23 C155
2

{12} -DEPSLP 1n/4/X7R/50V/K/X


2

1
3

5VSB
C193
D CPUPWROK {4,12}
A 1u/4/X5R/6.3V/K Q73 A

3
2N7002/SOT23/25pF/5 BC212
ww

G S 22u/8/X5R/6.3V/M/X
C198 R681 SOT23 D Q61
P_EN 2N7002/SOT23/25pF/5
2

R577 8.2K/4 5VL_EN G S


1u/6/X7R/16V/K 1K/4/1 {12} -DEPSLP 5VDUAL PWR_EN SOT23
3

C163

1
0.1u/4/X7R/16V/K
D
3

Q106
G S
2N7002/SOT23/25pF/5 Gigabyte Technology
Q75
5VL_EN R682 8.2K/4 SOT23 PMBT2907A/SOT23/-600mA/50 Title
R580 220/6 SOT23
2

DISCRETE POWER
2

C199 5VSB Size Document Number Rev


0.1u/4/X7R/16V/K C GA-H61-S3 1.0
Date: Tuesday, August 16, 2011 Sheet 25 of 34
5 4 3 2 1
5 4 3 2 1

DDR18V
5VDUAL VIN=5V,VOUT=1.5V,IOUT=25A,PHASE=1
D17 C126
IRMS=11.45A
+12V 0.1u/4/X7R/16V/K
R582 2.2/6 560u/FP/D/6.3V/68/8m RIPPLE CURRENT=4.7A
5VDUAL
C166
L6 Coefficient=1.7(85℃),1(105℃)
1uH/30A/IMD0814/R/D
SDM20E40C/0.4A/SOT23
R601 0/6/X
1u/6/X7R/16V/K
VIN Ripple current=4.7X1.7=7.99A(85℃)
-->故固態電容須2X7.99=15.98>11.45A

m
D Q91 IN_D D

2
OCP : Ipeak=(2xIocsetxRocset)/Rdson
BAT54C/SOT23/200mA/X Q55 typ Iocset=20uA , Rocset=4.7k

l
1 1

co
NTD4963NT4G/TO252/990pF/9.6m
C165 C125 + EC33 + EC28
OCP
R531 0.1u/6/X7R/25V/K 1u/6/X7R/16V/K 560u/FP/D/6.3V/69/A/11m 560u/FP/D/6.3V/69/A/11m
:59.6A=(2x20uAx8.2k)/(5.5m)

5
a
20K/4/1/X

H 1

3
DDR_EN L5 DDR_15V
7 1

VCC
COMP BOOT

i
2 R526 0/6/SHT/X
UG PH
PHASE 8 25A max

t
R532 C153 R542 1uH/30A/IMD0814/R/D

2
20K/4/1 10p/4/NPO/50V/J 8.2K/4 BC192

GND

a.
6 4 L R559 0.1u/4/X7R/16V/K
FB LG/OC 2.2/6 Remote sense請從最重的負載端點拉回

n
C154 R614 CLOSE CHOKE
4.7n/4/X7R/25V/K U16 8.2K/4 C169 R527

3
ISL6545CBZ/S 1n/4/X7R/50V/K RS 2K/4/1

3
e
Q82
LOOK 0.6V NTD4906NT4G/TO252/1932pF/5.5m

if d

si
0_6LEVEL_DDR

放靠近IC pin4 {23} 0_6LEVEL_DDR R534


PWR SEQ RO 1.27K/4/1
DDR_EN 注意 : Rocset的阻值要依據Lo side Rdson改變
一般Ipeak設定在50~60A即可 0.6*[(RS+RO)/RO] = Vout = 1.54V
3

ne
DDR_EN
D Q65

3
o
2N7002/SOT23/25pF/5 5VSB
C G S Q64 C
2N7002/SOT23/25pF/5
{18,30} -PSON
R571
2

22K/4 SOT23

C
2

1
3

do
3
Q51 Q71
MMBT2222A/SOT23/600mA/40 R572 MMBT2222A/SOT23/600mA/40

e
R496 SOT23 8.2K/4
SOT23
2

t
{12,18,23,25} -SLP_S3 {12,18} -S4_S5
22K/4

1
C131
POWER ISSUE 1u/6/X7R/16V/K

y
in
a b o p y i-
i g C
VIN=3.3V,VOUT=1.05V,IOUT=7.5A,PHASE=1

G n ot
IRMS=3.4875A
B
VCC1_05_PCH
is 1000u/D/6.3V/8C/30m RIPPLE CURRENT=1.14A B

Coefficient=1.7(85℃),1(105℃)
DDR_15V
VIN Ripple current=1.14X1.7=1.938A(85℃)
-->故電解電容須2X1.938=3.876>3.4875A
kn

2_5LEVEL +12V
2

o
Q30 Q33
R535 NTD4963NT4G/TO252/990pF/9.6m NTD4963NT4G/TO252/990pF/9.6m
13.7K/4/1 U15B
4

LM324DR/SO14 OCP : Ipeak=(2xIocsetxRocset)/Rdson


VCC1_05_EN
1

D
{25} VCC1_05_EN 5 +
7 R718 100/4/1 typ Iocset=20uA , Rocset=8.2k
te

6 -
BC195 R524 R717 OCP :58.57A=(2x20uax8.2k)/5.6m
1u/4/X5R/6.3V/K 10K/4/1 8.2K/4
11

C114
1n/4/X7R/50V/K

R716 VCC1_05_PCH
40.2K/4/1
w.

R498 2K/4/1 8.5A max


1
BC205 + EC25
10u/8/X5R/6.3V/K 560u/FP/D/6.3V/69/A/11m

A A
ww

Gigabyte Technology
Title
DDR_15V
Size Document Number Rev
Custom
GA-H61-S3 1.0
Date: Tuesday, August 16, 2011 Sheet 26 of 34
5 4 3 2 1
5 4 3 2 1

CPU_VTT

VTT_LEVEL {18}

3
By GPI to inform BIOS the default
CPU_VTT is 1.05/1.1V
D D VIN D

G S
SOT23
TQ1 1

1
VCC3 2N7002/SOT23/25pF/5 + TEC5
VCC VCC 270u/FP/D/16V/8C/A/10m

m
TR17
8.2K/4 TR27 TR28

4
8
A
@
1
.
1
V
2.2/6 1/6
CPU_VTT

l
VCC3

co
TBC30 VIN

3
1u/4/X5R/6.3V/K
TR14 TBC31
8.2K/4 TQ2 1u/4/X5R/6.3V/K

a
TR16

D1
D2
D3
D4
D5
TBC34
SOT23 1u/6/X7R/16V/K

17
{4} VTT_SEL TU1

i
MMBT2222A/SOT23/600mA/40 1 1

1
C TR15 1K/4/1 3 18 + TEC6 + TEC7 C

VCC
8.2K/4 VID0 PVCC TQ3

t
TR26 8.2K/4 2 TR31 G NTMFS4921N/N/6.95m/PPAKSO8
VID1 TR29 1/6 TBC33 0.1u/6/X7R/25V/K 22K/4

a.
VTT_SEL BOOT 16
CPU_VTT_GD 12 560u/FP/D/6.3V/69/A/11m
{28} CPU_VTT_GD PGOOD
HI

n
1.05V

S3
S2
S1
15 VTT_UGATE1 TR30 1/6 VTT_UG1 560u/FP/D/6.3V/69/A/11m
CPU_VTT VTT_EN UGATE TL1
LO 1.0V 13 EN TR32 0.6uH/42A/IMD0814/R/D
CPU_VTT

e
8.2K/4
14 VTT_PHASE
{23} VTTD_ADJ PHASE
TR18 48A Max
R50

D1
D2
D3
D4
D5
3.83K/4/1 TBC35
0.1u/4/X7R/16V/K/X

if d

si
TR19 4.02K/4/1 VTT_VSEN 8 19 VTT_LG1 TR35
{4} VTT_SENSE FB LGATE 2.2/6
TBC36 1 Need fine tune RC=L/DCR OCP=40A TQ4 TR36 TR37
TR20 0/4/SHT/X 1n/4/X7R/50V/K/X VTT_VSS_F RTN TR33 5.11K/4/1 TBC37
{4} VTT_VSS G 0/6/SHT/M/X
1n/4/X7R/50V/K 0/6/SHT/M/X
OCSET 9
TR21 TBC38
B 100/4/1 0.1u/4/X7R/16V/K/X 4 10 TBC32 B

S3
S2
S1
TBC29 TR22 SREF VO 0.1u/4/X7R/16V/K NTMFS4935N/N/3.2mm/PPAKSO8
0.1u/4/X7R/16V/K 100K/4/1

n
5 TR34 5.11K/4/1

ne
VCC3 SET0
6 11

THPAD
SET1 FSEL

PGND
TR23 7
51K/4/1 SET2 VTT_PHASEA

o
TR42
8.2K/4 VTT_ISEN

21

20
TR24 VCC
VTT_EN 7.87K/4/1 ISL95870BHRZ-T/QFN20 F_SEL
3

VCC3
PU 1MHz

C
BOTTOM PAD TR38
D TQ7 TR25 10K/4/1/X
CONNECT TO GND PD 600KHz

do
TR41 2N7002/SOT23/25pF/5 147K/4/1
8.2K/4 G S
SOT23
THROUGH 4 VIA NC 500KHz
VCC1_05_PCH TR39 Short
2

e
300KHz
100K/4/1/X GND
3

CHECK POWER SEQUENCE

t
A A
TR40 TQ6
8.2K/4 MMBT2222A/SOT23/600mA/40
SOT23 Title

y
in
CPU_VTT PWM_ISL6322CRZ
2

y
TBC39 Size Document Number Rev
0.1u/4/X7R/16V/K Custom GA-H61-S3 1.0

b
Date: Tuesday, August 16, 2011 Sheet 27 of 34

p
5 4 3 2 1
Patch EUP function

i g a C o i-
G n ot
is
kn

D o
te
w.
ww
5 4 3 2 1

CPU_VTT

VCC_SA
Check電容限高10mm
VCCSA PWR SEQ
BC110 VSA_REF
2_5LEVEL 22u/8/X5R/6.3V/M BC56
D 22u/8/X5R/6.3V/M D
+12V

3
VCC

2
R528
10K/4/1 Q12 D Q68

m
4
NTD4963NT4G/TO252/990pF/9.6m VCC3 R564 2N7002/SOT23/25pF/5
G S
VSA_REF 12 + REV:0.2 22K/4
14 R155 100/4/1 SOT23
修正

3
l
R481

1
13

co
-
BC201 R537 C157 8.2K/4
0.1u/4/X7R/16V/K 5.23K/4/1 U15D 1n/4/X7R/50V/K C46 C161

11
a
LM324DR/SO14 8.2K/4 VCCSA Q44 0.1u/4/X7R/16V/K/X

8
.
8
A
@
0
.
8
5
/
0
.
9
2
5
V
R480 8.2K/4 SOT23

i
R560 {27} CPU_VTT_GD

1
R543 2K/4/1 40.2K/4/1 MMBT2222A/SOT23/600mA/40

t
{4} VSA_SENSE R551 2K/4/1 C128
1

a.
0.1u/4/X7R/16V/K/X
BC203 BC54 +

n
C 0.01u/4/X7R/25V/K/X 22u/8/X5R/6.3V/M EC12 C
560u/FP/D/6.3V/69/A/11m
Check電容限高10mm

e
CPU_VTT

if d

si
R193
2_5LEVEL 8.2K/4
5VDUAL
VTT_PWRGD {23,25}

3
3
+12V R191
8.2K/4 D Q17
D

n
Q59 2N7002/SOT23/25pF/5

ne
VCC3 R562 2N7002/SOT23/25pF/5 G S
22K/4 G S SOT23

o
SOT23

1
3

3
2

1
B
R479 R563 Q16 B
8.2K/4/X 80.6K/4/1 VCCSA MMBT2222A/SOT23/600mA/40

C
PDG 1.01 Q43 VSA_REF
R504 1K/4/1 SOT23 C160 R192 1K/4/1 SOT23

do
{4} VSA_SEL 0.1u/4/X7R/16V/K/X

1
VSA_SEL MMBT2222A/SOT23/600mA/40 C72
0.1u/4/X7R/16V/K

e
HI 0.85V
R478
VCCSA_LEVEL {12}
100K/4/1

t
LO 0.925V

3
By GPI to inform BIOS the default
VCCSA is 0.85/0.925V
D

y
in
y
Q103
G S 2N7002/SOT23/25pF/5
SOT23

a b o p 2

1
A A

i-
Gigabyte Technology

g
Title

i
CPU VTT PWM_ISL6312

C
Size Document Number Rev
Custom
GA-H61-S3 1.0

G n ot
5 4
is 3 2
Date: Tuesday, August 16, 2011
1
Sheet 28 of 34
kn

D o
te
w.
ww
8 7 6 5 4 3 2 1

FUSEVCC1 F15
FRONT USB1
5VDUAL FUSEVCC1
BC124 1 SMD1812P260/6V
BC122 0.1u/4/X7R/16V/K +
0.1u/4/X7R/16V/K F_USB1 EC23
100u/OS/D/16V/69/A/35m CASE OPEN
1 2
{9} -USBP0 3 4 -USBP1 {9}
{9} +USBP0 5 6 +USBP1 {9}
7 8
10

m
D D
BH/2*5K9/BU/ON/2.54/VA/D/GF

co
i a
ESD9 R530 1M/4 -CASEOPEN
{12,13} RTCVDD -CASEOPEN {18}
-USBP0 6 +USBP0

t
1

a.
2 5 BC198
FUSEVCC1
0.01u/4/X7R/25V/K

n
-USBP1 3 4 +USBP1

e
AOZ8902CIL/SOT23-6

VCC3
SATA LED

if d

si
Close to connector -HDLED
R489
1K/4/1
C124
VCC3 180p/4/NPO/50V/J/X

3
n
R490

ne
C
D2 1K/4/1 R491 C
8.2K/4

o
{11} -SATALED SOT23 SOT23

1
Q53
BAT54A/SOT23/200mA MMBT2222A/SOT23/600mA/40 Q39

SOT23
C
MMBT2222A/SOT23/600mA/40

do
e
VCC

t
D16
FUSEVCC1
FRONT USB2 CD4148WP/1206/300mA

y
in
y
BC96 BC102 VCC R591 R610 To disable TCO VCC3

b p
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 1K/4/1 75/6/1
F_USB2 SPK-
timer

3
1 2 R585

3
o
3 4 1K/4/1
{9} -USBP2 -USBP3 {9} D
R583 Q78

i-
{9} +USBP2 5 6 +USBP3 {9}
7 8 FUSEVCC1 8.2K/4 R611 MMBT2222A/SOT23/600mA/40 R:0.2

g
G S SOT23 75/6/1
10 修正
R274 8.2K/4 -USBOC_F BEEP- SOT23 Q77 SPKR

1
i
-USBOC_F {9} {18} BEEP-

C
BH/2*5K9/BU/ON/2.54/VA/D/GF Q88 MMBT2222A/SOT23/600mA/40

1
2N7002/SOT23/25pF/5 SPKR
B SPKR {12} B
R276 for ITE8728 R584 8.2K/4
15K/4/1 R:0.2 修正

G n ot
rstconin isuue
ESD8
is VCC
-USBP2 1 6 +USBP2

2 5 R438
FUSEVCC1
VCC 330/6
-USBP3 3 4 +USBP3 MPD+

3
kn

AOZ8902CIL/SOT23-6 Q38

o
R419 BC206 MMBT2222A/SOT23/600mA/40
330/6 0.01u/4/X7R/25V/K/X
SOT23
Close to connector F_PANEL

1
3VDUAL_PCH

D
HD+ 1 2 MPD+ R470 8.2K/4
HD+ MSG/PD+ GPIO28 {12}
te

R472
-HDLED 3 4 8.2K/4
HD- MSG/PD-

5VSB R495 5 6 -PWRBT_1 R469 33/4


GND PW+ -PWRBTSW {12,18}
8.2K/4/X
R497 100/4/1 -RST 7 8
{4,12,30} -SYS_RST RESET PW- C127 BC190
INTEL FRONT PANEL 9 0.01u/4/X7R/25V/K/X 0.01u/4/X7R/25V/K
CI-
w.

-CASEOPEN 11
SOT23

BC197 CI+
A A
0.01u/4/X7R/25V/K 14
D11 SP+ VCC
ESD10
1 -USBOC_F MPD+ 15 16
-RST -RST PWR+ NC
F_USB POWER PROTECT {12} GPIO11 3 1 6
-USBOC_R
2 -USBOC_R {9,32}
2 5 5VSB
17 PWR- NC 18
Gigabyte Technology
ww

19 20 SPK-
BAT54A/SOT23/200mA -PWRBT_1 PWR- SP- Title
3 4 -PWRBT_1
BH/2*10K10,12,13/WH/2.54/VA/PA
FP,F_USB,USB PWR,FDD,BZ
AOZ8902CIL/SOT23-6 Rev 0.2 modefy Size Document Number Rev
Custom GA-H61-S3 1.0
Date: Tuesday, August 16, 2011 Sheet 29 of 34
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

ATX POWER CONNECTOR VCC3 VCC3 VCC3

-12V VCC3 VCC3


ATX
13 1 BC214 BC215 BC227
3.3V 3.3V 22u/8/X5R/6.3V/M 1u/4/X5R/6.3V/K 1u/4/X5R/6.3V/K
14 -12V 3.3V 2

15 GND GND 3

16 4 V12 ATX_12V
{18,26} -PSON PSON 5V VCC
17 5 4 1

m
BC216 GND GND +12V GND
D 0.1u/4/X7R/16V/K D
18 GND 5V 6 VCC 3 +12V GND 2

19 7 APW/2*2/IV/P/4.2/SN/PA66
GND GND

co
-5V 20 -5V POK 8 PWOK {18}
BC25

a
VCC 21 5V 5VSB 9 5VSB
0.1u/4/X7R/16V/K

i
VCC 22 5V 12V 10 +12V

1
23 11 AD1

t
BC218 5V 12V BC217 BC222 BC223 BC224 AZ2225-01L/SOD323

a.
1u/6/X7R/16V/K 24 12 510/6/X 1u/6/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
GND 3.3V
BC219 BC230 BC221

n
0.1u/4/X7R/16V/K/X 0.1u/4/X7R/16V/K/X 510/6/X BC220
To prevent the 5VSB 0.1u/4/X7R/16V/K
APW/2*12/IV/VA/SN/2SHK/PA66

e
under loading when
boot
MH1 MH2 MH3

if d

si
I1 I2
6
5
4

6
5
4

6
5
4
7 3 7 3 7 3 K3 K6 K2
8 2 8 2 8 2
9 1 9 1 9 1
4MMH/X 4MMH/X
HOLE_3/X HOLE_3/X HOLE_3/X
10
11
12

10
11
12

10
11
12

K1_ICT/X K1_ICT/X K1_ICT/X


I3 I4

ne
1

1
MH4 MH5 MH6

o
C
K5 K1 K4 4MMH/X 4MMH/X C
6
5
4

6
5
4

6
5
4

I5
7 3 7 3 7 3
8 2 8 2 8 2
9 1 9 1 9 1

C
K1_ICT/X K1_ICT/X K1_ICT/X

do
HOLE_3/X HOLE_3/X HOLE_3/X 4MMH/X
10
11
12

10
11
12

10
11
12

1
y te
in
b p y
3VDUAL
3VDUAL

g a o i-
FB1 BC68
U5 CKVDD 30/6/4A/S/X BC69 1u/4/X5R/6.3V/K/X

i C
1u/4/X5R/6.3V/K/X
DOC_0 31 11
DOC_1 DOC_0 VDD96
32 DOC_1 VDDSATA 25
VDDPCIEX 7

G n ot
R249 0/4/X PCH_CLK 5 3 BC75 BC80 BC72 BC78 BC74 BC79 BC87
{10} PCHCLK CPUT_LR VDDCPU
B
{10} -PCHCLK
R253

R257
0/4/X -PCH_CLK

0/4/SHT/X SATA_CLK
6 CPUC_LR
is VDDREF
VDD25
22
28
1u/4/X5R/6.3V/K/X/X
1u/4/X5R/6.3V/K/X
1u/4/X5R/6.3V/K/X 1u/4/X5R/6.3V/K/X
0.1u/4/X7R/16V/K/X
1u/4/X5R/6.3V/K/X
1u/4/X5R/6.3V/K/X B
{11} SRCCLK_SATA 24 SATACLKT_LR
R258 0/4/SHT/X -SATA_CLK 23
{11} -SRCCLK_SATA SATACLKC_LR C89 27p/4/NPO/50V/J/X
R259 0/4/SHT/X PCH_SRC 9 20 X1
{9} SRCCLK_PCH PCIEXT_LR X1
R260 0/4/SHT/X -PCH_SRC 10 21 14.318M/16p/20ppm/49US/40/D/X
{9} -SRCCLK_PCH PCIEXC_LR X2
R247 0/4/SHT/X DOT_CLK 13 C88 27p/4/NPO/50V/J/X
{9} DOTCLK DOT96T_LR
0/4/SHT/X -DOT_CLK
kn
R252 14 2 R238 10/4/X
{9} -DOTCLK DOT96C_LR SDATA SMBDATA {7,8,12,14,15,17,23}
1 R237 10/4/X
SCLK SMBCLK {7,8,12,14,15,17,23}

o
R256 33/4/X LPC_48 16 33
{10} LPCCLK48_BF 48M/FSLB GNDPAD
4 C83
GNDCPU 100p/4/NPO/50V/J/X
15 24_12M GNDPCIEX 8
29 12 C84
25M GND96

D
R230 33/4/X FS_133M 19 18 100p/4/NPO/50V/J/x
{10} PCHCLK14 REF/FSLA GNDREF
GNDSATA 26
te

R644 10/4/X 27
{4,12,29} -SYS_RST GND25
R261 8.2K/4/X CPU_STP 30
CKVDD RLATCH/RESET_IN#/RESET#
17 VTTPWRGD/WOL_STOP#
VCC3
R240 1K/4/1/X
R232 8.2K/4/X ICS9LRS4105B/[10HL6-184105-10R]/X
{11,12,18} PWROK1
BC73
0.1u/4/X7R/16V/K/X
w.

VCC3 R255 8.2K/4/X LPC_48 PCHCLK14 C85 10p/4/NPO/50V/J/X


R229 8.2K/4/X FS_133M
LPCCLK48_BF C94 10p/4/NPO/50V/J/X
CKVDD CKVDD R239 8.2K/4/X

A A
CPU Frequency Selection
ww

R645 R646
VCC 8.2K/4/X VCC 8.2K/4/X
DOC_0 DOC_1 FSLB FSLA CPU
3

0 0 100M <Default>
R647 R648
8.2K/4/X D 8.2K/4/X D
0 1 133M
G
Q101
S 2N7002/SOT23/25pF/5/X G
Q102
S 2N7002/SOT23/25pF/5/X
Gigabyte Technology
SOT23 SOT23
1 0 200M Title
{18} 8728_GP14 {18} 8728_GP67
1 1 166M
2

ATX POWER CONNECTOR


Size Document Number Rev
Custom GA-H61-S3 1.0
Date: Tuesday, August 16, 2011 Sheet 30 of 34
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

TEMP H/W MONITOR


CPU SMART FAN Anti Spike
R288
Rev 0.2 modefy 100/4/1
{18} VREF {18} FANPWM3
+12V

R42

2
4
6
8
10K/4/1 R279
RN1 +12V 3.3K/4/1

m
{18} SYS_TEMP 8.2K/8P4R/4
D R280 D
R348

1
3
5
7
{18} CPU_TEMP FANIO1 {18}
0/4

co
15K/4/1 R281 C105
{18} PWM_TEMP
CPUFAN_VCC 6.2K/4/1 0.047u/4/X7R/16V/K

a
C11 C12 RS_SYS

ti
1u/4/X5R/6.3V/K 1u/4/X5R/6.3V/K 10K/1/4/S 1

1
2
3
4
+
EC22

a.
Close SIO 100u/OS/D/16V/69/A/35m

G
V
S
C
CPU_FAN
FAN/1*4/WH/A3/PA66

e
VOLTAGE-- H/W MONITOR
SHORT PROTECT
R0402-2 +12V +12V

if d

si
* * *
+12V
VCORE DDR_15V VCC VCC3 +12V VCC R628
3.3K/4/1
R630 SHORT PROTECT +12V R96
0/4 R627 R0402-2 3.3K/4/1

n
R35 R39 R643 R23 R25 R34

ne
FANIO3 {18} R95
8.2K/4 8.2K/4 7.15K/4/1/X 6.49K/4/1 30.9K/4/1 7.15K/4/1
R625 C189 R97

o
C {18} VIN5 FANIO4 {18} C
15K/4/1 6.2K/4/1 0.047u/4/X7R/16V/K 0/4
{18} VIN6

1
2
3
R94 C19
{18} VIN1
2.9V 15K/4/1 6.2K/4/1 0.047u/4/X7R/16V/K
{18} VIN2

1
2
3
C
{18} VIN3 2.9V

C
V
S

do
PWR_FAN
C8 C10 C4 R22 R27 R30 FAN/1*3/WH/A3/PA66

C
V
S
e
1u/4/X5R/6.3V/K 1u/4/X5R/6.3V/K 1u/4/X5R/6.3V/K 10K/4/1 C5 10K/4/1 C6 10K/4/1 SYS FAN SYS_FAN1
1u/4/X5R/6.3V/K FAN/1*3/WH/A3/PA66

t
1u/4/X5R/6.3V/K

y
in
{18} FANPWM2

y
R24 8.2K/4 +12V
{18} VIN0 CPU_VTT

b
+12V

p
C1 1u/4/X5R/6.3V/K

a
The division voltage of VIN2 & VIN3 must be around 2.9V R114

o
R98 100/4/1 R101

i-
0/4 3.3K/4/1

i g C
FANIO2 {18}
KDAT R38 82/4 KBDATA R103

G n ot
{18} KDAT
KB/USB KCLK R46 82/4 KBCLK 15K/4/1 R107 C20
B {18} KCLK
is 6.2K/4/1 0.047u/4/X7R/16V/K
B

MDAT R722 82/4 MSDATA


{18} MDAT

1
2
3
4
MCLK R723 82/4 MSCLK R20 0/6/SHT/M/X
{18} MCLK
BC253 BC254 BC11 BC8

180p/4/NPO/50V/J 180p/4/NPO/50V/J

G
V
S
C
180p/4/NPO/50V/J SYS_FAN2
kn

KB_MS FUSEVCC_R1 180p/4/NPO/50V/J FAN/1*4/WH/A3/PA66

o
MSDATA 7 10
8
MSCLK 11 BC13

D
12 0.1u/4/X7R/16V/K
MS 9
te

KBDATA 1 4
2 FOR EMI ONLY
KBCLK 5
6 3 +12V
KB
KB/MS/6P/PC99/OS/RA/D/2
FUSEVCC_R1
w.

C21
1n/4/X7R/50V/K

ESD1 R45 8.2K/4 KCLK


A R37 8.2K/4 KDAT A
KBCLK 1 6 MSCLK
R724 8.2K/4 MCLK
ww

2 5 R725 8.2K/4 MDAT


FUSEVCC_R1
Gigabyte Technology
KBDATA 3 4 MSDATA
Title
HWM,KB/MS, FAN CTRL
AOZ8902CIL/SOT23-6/X
Size Document Number Rev
Custom
GA-H61-S3 1.0
Date: Tuesday, August 16, 2011 Sheet 31 of 34
8 7 6 5 4 3 2 1
5 4 3 2 1

LAN:AR8151/AR8161 LAN POWER NEW DESIGN ONLY FOR INTERNAL SWR


AR8151:LAR3(O),LAR5(X)
AR8161:LAR5(O),LAR3/LAR4(X)
離IC近越好 LA_ ML-->80歐姆:[15/5/5/5/15]
{10} -SRCCLK_LAN
LL1
{10} SRCCLK_LAN
4.7uH/0.8A/3225/S/[10LC4-5A470B-01R_10LI5-12470B-01R]
SRCCLK-->50歐姆:[18/4/10/4/18] LX_OUT LX
{9} ML_OP
{9} ML_ON
LBC9 CLOSE
1u/4/X5R/6.3V/K LX 200mil
LBC13 LBC33 LBC16

m
1u/4/X5R/6.3V/K 10u/8/X5R/6.3V/K 0.1u/4/X7R/16V/K
D LBC12 LBC1 AVDDVCO D
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
AR8161-->N/A

l
VDDCT AR8161-->N/A

co
AVDDVCO
LED_ACT_TXRX
LBC35 LBC36 LR36 0/4 AR8151 POWER

LED_LINK100
(LAR3,LAR4)

DVDDL

AVDDL
0.1u/4/X7R/16V/K/X 4.7u/6/X5R/6.3V/K/X

a
AVDD_CEN

LX
LR29 0/4

i
3VDUAL LBC19 AR8161-->(O)
LBC26 0.1u/4/X7R/16V/K

t
LBC24 1u/4/X5R/6.3V/K
10u/8/X5R/6.3V/K LU1

41

40
39
38
37
36
35
34
33
32
31

a.
DVDDL AVDDL AVDDVCO
LA_ ML-->80歐姆:[15/5/5/5/15] LR38 0/6/X LFB2 0/6/X LFB3 0/6 AR8161 POWER

EGND

REFCLKN
RX_N

AVDDL/NC
LX

AVDDL
LED1
LED0

REFCLKP
RX_P
DVDDL_REG
n
3VDUAL
AR8161-->(O) AR8161-->BEAD AR8161-->BEAD
AR8151-->N/A AR8151-->0/6
離IC近越好

e
LR31
8.2K/4 1 30 ML_IP_C LC2 0.1u/4/X7R/16V/K
VDD3V TX_P ML_IP {9}
ML_IN_C LC1 0.1u/4/X7R/16V/K
{18} -PFMRST2 2 PERST# Atheros
TX_N 29 ML_IN {9} Power domain chart

if d

si
{12,14,15,16} -PCIE_WAKE 3 WAKE# NC 28 AR8161-->(O)
AR8161-->N/A -CLKREQ 4 27 LED_ACT_TXRX
CLKREQ# TESTMODE AVDDH
LBC17 VDDCT 5 26 LR39 8.2K/4/X AR8151 AR8161
(LBC17) 1u/4/X5R/6.3V/K AVDDL VDDCT/ISOLAT SMDATA
6 AVDDL_REG SMCLK 25 AR8161-->N/A
XTALO 7 AR8151/AR8161DVDDL/PPS 24 PPS LR32 0/4 DVDDL LBC5 0.1u/4/X7R/16V/K LED_LINK100
XTALI XTLO LED_LINK1000 (LR32,LBC5) LR40 8.2K/4/X
AVDDH
8 XTLI LED2 23
AVDDH LBC6 0.1u/4/X7R/16V/K
AVDD33 N/A 3.3V
9 22

AVDDH/AVDD33
AVDDH_REG AVDDH P_MDI3-
10 RBIAS TRXN3 21
VDD33 3.3V 3.3V

n
AVDDL/NC
LBC31 VCC3
AR8161-->(O)

ne
1u/4/X5R/6.3V/K

AVDDL
TRXN0

TRXN1

TRXN2
TRXP0

TRXP1

TRXP2

TRXP3
LBC32 AVDDH 2.7V 2.7V
0.1u/4/X7R/16V/K LBC23 LR30

o
1u/4/X5R/6.3V/K 30K/4/X
C C
LBC21 LR15 AR8151-BL1A-R/S LR37 AVDDL/DVDDL 1.1V 1.1V
11
12
13
14
15
16
17
18
19
20
0.1u/4/X7R/16V/K 2.37K/4/1 0/4/X
VDDCT
ISOLAT {18}
VDDCT 1.7V

C
P_MDI0+

P_MDI1+

P_MDI2+

P_MDI3+
P_MDI0-

P_MDI1-

P_MDI2-
AVDDL

AVDDL

do
XTALI
close to
LX1 artheros AR8161-->N/A AR8152-->N/A

e
XTALO
AR8151

t
25M/20p/30ppm/49US/20/D P_MDI0+ P_MDI1+ P_MDI2+ P_MDI3+
LBC8 LBC11 P_MDI0- P_MDI1- P_MDI2- P_MDI3-
LC11 LC12 0.1u/4/X7R/16V/K 1u/4/X5R/6.3V/K
27p/4/NPO/50V/J 27p/4/NPO/50V/J LR16 LR14 LR13 LR11 LR10 LR9 LR6 LR5

y
in
LR42 0/4/X 49.9/4/1 49.9/4/1 49.9/4/1 49.9/4/1 49.9/4/1 49.9/4/1 49.9/4/1 49.9/4/1

y
3VDUAL
AR8161-->N/A LR43 0/4
AVDDH
AR8151:AVDDH

b
LC6 LC5 LC4 LC3

p
AR8161:3VDUAL 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
AR8152-->N/A
LBC10

a
1u/4/X5R/6.3V/K CLOSE LAN CHIP

g o i-
LAESD1 CLOSE USB_LAN FUSEVCC_R1 FUSEVCC_R1

i C
LED_LINK100 LED_ACT_TXRX F1
1 6
5VDUAL FUSEVCC_R1
USB_LAN CONNECTOR 2 5 LAN_3VDUAL_LED LR12 0/6 BC10 BC12
USB_LAN SMD1812P350SLR/S/[10FP1-06350B-20R] 0.1u/4/X7R/16V/K R_USB 0.1u/4/X7R/16V/K

G n ot
LED_LINK1000 3 4 LED_D2 1 1 2

B
3VDUAL
is + EC3
100u/OS/D/16V/69/A/35m
{9} -USBP8
{9} +USBP8
3
5
75 3 1 4
6
-USBP9 {9}
+USBP9 {9}B
AOZ8902CIL/SOT23-6 7 8
LBC22 FUSEVCC_R1 86 4 2
0.1u/4/X7R/16V/K EMI LR3

12
11
10
USB_LAN LFB1 R60 8.2K/4 -USBOC_R

9
-USBOC_R {9,29}
AVDD_CEN 0/6/SHT/M/X
L1 D1 LED_ACT_TXRX
P_MDI0+ L2 0/6/SHT/M/X R72
LED_D2 150/6 LAN_3VDUAL_LED
kn
P_MDI0- L3 D2 LR20 15K/4/1 USB/A/O/BLACK/GF/2/RA/D
P_MDI1+ L4 ESD6
P_MDI1-

o
L5
P_MDI2+ L6 D3 LED_LINK100 LR21 150/6 LBC25 +USBP4 1 6 -USBP4 ESD3
P_MDI2- L7 0.1u/4/Y5V/16V/Z/X
P_MDI3+ L8 D4 LED_LINK1000 LR22 150/6 P4+ 2 5 +USBP8 1 6 -USBP8
+USBP4 {9} FUSEVCC_R1
P_MDI3- L9 P4-
GND_L10 L10 U1
LR21:AR8151(O),AR8152(X) P5+
-USBP4 {9}
+USBP5 3 4 -USBP5 2 5

D
FUSEVCC_R1 +USBP5 {9} FUSEVCC_R1
U2 P4- P5-
-USBP5 {9}
LC10 U3 P4+ +USBP9 3 4 -USBP9
te

0/4/SHT/M/X UP U4 LBC15 AOZ8902CIL/SOT23-6


U5 0.1u/4/X7R/16V/K
FUSEVCC_R1
U6 P5- AOZ8902CIL/SOT23-6
U7 P5+
DOWN U8 LBC34
0.1u/4/X7R/16V/K

USB+LAN/1G/GO,Y/OS/RA/D/8C/[11NR6-702009-91R_11NR6-702009-0ER]
USB-->90歐姆:[15/4.5/7.5/4.5/15]
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注意:LAN LED PROTECT:(CO-LAYOUT)


1.ESD(6PIN):AOZ8902CIL/SOT23-6(DEFAULT)
2.SURGE(5PIN):AZ2025-04S/SOT23-5L
料號 規格 廠商
11NR6-702009-0ER 1G LAN (12core) UDE
U4 U3 U2 U1 Dual Color LED 11NR6-702009-91R 1G LAN(8 core) FOXCONN
A A
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U8 U7 U6 U5 D4 D3 11NR6-702009-92R 1G LAN(8 core) UDE


11NR6-702009-11R 1G LAN(12core/RED) UDE
Green
L1 L3 L5 L7 L9 11NR6-702009-12R 1G LAN(8 core/RED) FOXCONN
D4 D3
L2 L4 L6 L8 L10
Orange
D1 D2 D3 D4 USB_LAN BOM區分:
Gigabyte Technology
Single Color LED Title
1.(紅色/12CORE/三倍):USB+LAN/1G/GO,Y/OS/RA/D/1/RED
D2 D1 2.(黑色/12CORE):USB+LAN/1G/GO,Y/OS/RA/D/1 ARTHEROS AR8151/AR8161
Size Document Number Rev
Yellow
3.(黑色/8CORE):USB+LAN/1G/GO,Y/OS/RA/D/8C Custom GA-H61-S3 1.0
YELLOW ORANGE GREEN
(+,-) (-,+) Date: Tuesday, August 16, 2011 Sheet 32 of 34
5 4 3 2 1
5 4 3 2 1

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Title
EJ168
Size Document Number Rev
Custom GA-H61-S3 1.0
Date: Tuesday, August 16, 2011 Sheet 33 of 34
5 4 3 2 1
5 4 3 2 1

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B
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Title
Marvell 9172 SATA 3.0
Size Document Number Rev
Custom GA-H61-S3 1.0
Date: Tuesday, August 16, 2011 Sheet 34 of 34
5 4 3 2 1

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