6 5 4 3 2 1

REVISION RECORD

LTR ECO NO: APPROVED: DATE:

* Shiled & Hole *

D
MT6582 Power D

HOLE-3.0-4.0 HOLE-1.6-2.6
H1101 H5
1 1

M11
U11
U12
V11
V12
V13
T13
T16
T17
T18
T21
U1201-B
1.2V IO for DDR2
R1121
T11 H18 1 2 BUCK1_FB[3]

DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS DVDD12_EMI 0R
R11 H16
R2
DVSS
DVSS
DVDD12_EMI
DVDD12_EMI H15 DVDD12_EMI R1122
HOLE-3.0-4.0
G6 G9 DVDD12_EMI 1 2 VM12_SW_PMU
G7
DVSS
DVSS
DVDD12_EMI
DVDD12_EMI G11 0R
H6
G14 DVSS DVDD12_EMI G13 1
C1101 C1102 C1103 C1105 C1140

1
G17 G15 C1104
DVSS DVDD12_EMI n.m
G20 DVSS DVDD12_EMI G16 2 1
VM_PMU
H10 G18 100NF 100NF 100NF 100NF 10UF 10UF

2
DVSS DVDD12_EMI R1123
M20 DVSS DVDD12_EMI H8
N11 DVSS DVDD12_EMI E7
A19 DVSS DVDD12_EMI F7
A26 DVSS DVDD12_EMI F8
B4 DVSS DVDD12_EMI G8
HOLE-3.0-4.0-PAS-SOLDER-DEL HOLE-1.6-2.6
B10 H11
E21
DVSS DVDD12_EMI
H13
C1107 close to pin E1 (150mil) H2 H3
DVSS DVDD12_EMI
F6 DVSS C1106 close to pin G26 (150mil)
B12 DVSS DVDD28_MSDC1 E1 VMC_PMU VMC_PMU 1 1
B14 DVSS DVDD28_MSDC2 V1 VIO18_PMU VIO18_PMU
B17 DVSS DVDD28_BPI AD26 VIO18_PMU VIO18_PMU
B22 U25
B24
DVSS
DVSS
DVDD28_MD
DVDD18_MSDC0 G26 HOLE-3.0-4.0
C4 DVSS DVDD18_IO0 L26 VIO18_PMU VIO18_PMU
C8 DVSS DVDD18_IO1 Y26 H1102 HOLE-1.6-2.6
C11 DVSS DVDD18_IO2 D1
C12 W1
1 H4
DVSS DVDD18_IO3 C1106 C1107 C1108 C1109 C1110 C1111 C1112 C1113

1
1

1
C16 DVSS DVDD18_IO4 AG13
C17 1
DVSS
C18 R10 100NF 1UF 100NF 100NF 100NF

2
DVSS VCCK 100NF 100NF 100NF
C20 DVSS VCCK P9
C C21
C22
DVSS
DVSS
VCCK
VCCK
L11
L12
C
C23 DVSS VCCK L13 VCORE_SW_FB
C25 DVSS VCCK L14
D4 DVSS VCCK L15
D5 DVSS VCCK L16 VCCK R1105
D7 DVSS VCCK L17 1 2
D9 DVSS VCCK M10
C1114 C1115 C1116 C1139 C1117 C1118 C1119 C1120 0R HOLE-3.0

1
1

1
D11 M18 C1141 VCORE_SW_PMU

1
DVSS VCCK H1
D13 DVSS VCCK N10

2
D15 N18 1UF 1UF 1UF 10uF 10uF

2
DVSS VCCK 100NF 100NF 100NF 22UF

2
1

R1120
D17 P18

n.m
DVSS VCCK
D21 DVSS VCCK R9
D24 R18 Bottom CAP
DVSS VCCK
E5 T10

1
DVSS VCCK
E8 DVSS VCCK U10
E10 DVSS VCCK V10
E18 DVSS VCCK_VPROC R1106
F18 DVSS VCCK_VPROC N12 1 2 VPROC_PMU
P21 DVSS VCCK_VPROC N13 C1137 C1124 C1127 0R
C1121 C1122 C1123 C1125 C1126 C1142

1
1

1
L10 DVSS VCCK_VPROC N14
VCCK_VPROC N15
AE5 N16 100NF 100NF 100NF 1UF 1UF 1UF 22UF 22UF 22UF

2
AVSS18_WBG VCCK_VPROC
V7 AVSS18_WBG VCCK_VPROC N17
U7 AVSS18_WBG VCCK_VPROC P14
W7 AVSS18_WBG VCCK_VPROC R15 Bottom CAP
Y7 AVSS18_WBG VCCK_VPROC P15
AB6 AVSS18_WBG VCCK_VPROC R14 R11070R
AB8 AVSS18_WBG VCCK_VPROC R13 2 1
AC3 AVSS18_WBG VCCK_VPROC R12 GND_VPROC_FB
AC5 AVSS18_WBG VCCK_VPROC R16 2 1
AC7 AVSS18_WBG VCCK_VPROC R17 R1108 0R VPROC_FB
AD4 AVSS18_WBG VCCK_VPROC T14
AE3 AVSS18_WBG VCCK_VPROC T15
VCCK_VPROC U15

Test Points
VCCK_VPROC U16
V15 VPROC_FB, GND_VPROC_FB should be laid differential pair
VCCK_VPROC
W20 AVSS18_MD VCCK_VPROC V16 with ground shielding remote sense to PMIC
U20 AVSS18_MD
V20 AVSS18_MD
V21 AVSS18_MD DVSS M15
U21 AVSS18_MD DVSS N21
W21 AVSS18_MD DVSS P10
Y20 AVSS18_MD DVSS P11
Y21 AVSS18_MD DVSS P12 JTDI TP1101
AA21 AVSS18_MD DVSS P13 [2]
AB21 AVSS18_MD DVSS P16 JTMS TP1102
U17
U18

A2
AVSS18_AP
AVSS18_AP
DVSS
DVSS
DVSS
P17
L18
M14
M13
[2]
JTCK
[2]
TP1103 Trace32
B R24
AVSS18_MEMPLL
AVSS33_USB
DVSS
DVSS M12
JTDO
[2]
TP1104
Debug port B
SYSRST_B TP1105
VIO18_PMU VIO18_PMU AE21 AVDD18_MD DVDD18_MIPITX L2 VIO18_PMU [2,3]
VIO18_PMU TP1106
AE19 AVDD18_AP C1129
2

2
G1 VIO18_PMU C1130
DVDD18_MIPIIO TP1107
VTCXO_PMU VTCXO_PMU AE22 AVDD28_DAC
VIO18_PMU AE18 T24 VUSB_PMU 100NF
1

1
VIO18_PMU DVDD18_PLLGP AVDD33_USB VUSB_PMU100NF
VIO18_PMU A3 AVDD18_MEMPLL AVDD18_USB P26 VIO18_PMU VIO18_PMU SH1
VIO18_PMU
AC21 AVSS18_MD
C1131 C1132 AD22 AVSS18_MD DVSS18_MIPIIO H4
C1133 1
2

C1134 AG26 H5 GND

AVSS18_MD DVSS18_MIPIIO
V17 AVSS18_AP DVSS18_MIPIIO J5
100NF 100NF 100NF 100NF V18 J7
1

AVSS18_AP DVSS18_MIPIIO C1135 C1136

2

AA18 AVSS18_AP DVSS18_MIPITX L4 SHA-ANCHI-WIFI

AB19 AVSS18_AP DVSS18_MIPITX M7
M8 100NF TP1111
1

100NF
1

DVSS18_MIPITX VBAT
AF3 AVSS18_WBG DVSS18_MIPITX N3
AG1 AVSS18_WBG PWRKEY TP1112
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS

[3,7]
TP1113
T12
M16
K21
M17
H12
J21
H20
H17
H14
V14

MT6582

UTXD0
[2]
TP1114
MP Test Points
TP1115
AVDD18_MEMPLL pin and AVSS18_MEMPLL pin should URXD0
[2]
be connected with PCB CAP first, and then connected UTXD1 TP1116
[2]
with PMU and PCB ground. CAP should be near MT6592 URXD1
[2]
TP1117

as possible as we can. UTXD2 TP1118

[2]
Pb

1
SF1
UTXD3 TP1120 PB1
[2] STATIC-FREE
TP1121 LEAD-FREE
URXD3
[2]

A A
COMPANY:
Lenovo MIDH_Phone
TITLE:

DRAWN: DATED:
Stella_MB_H101
chengfei&fanpeng 20130422
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
wangdj 20130425
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> D 11_MT6582_POWER H101
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET:1 OF 10
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

CPU U1201-D

SCL0 [2,6]
HWID I2C pull high DDR ED31
ED30
ED29
ED28
C26
C24
A25
B25
RDQ31
RDQ30
RDQ29
RDQ28
RCS0_B
RCS1_B

RCKE
B7
B6

B5
ECS0_B [5]
ECS1_B [5]

ECKE [5]
ED27 B26 RDQ27
SDA0 [2,6]
SCL1 [2,3,6] VIO18_PMU ED26 B23 RDQ26
[1] URXD3 URXD3 SDA1 [2,3,6] VIO18_PMU VIO18_PMU ED25 A23 RDQ25 RDQM0 D16 EDQM0 [5]
VIO18_PMU DVDD12_EMI ED24 D25 D18
SCL2 [2,7] VIO18_PMU RDQ24 RDQM1 EDQM1 [5]
UTXD3 ED23 A11 D10
[1] UTXD3 SDA2 [2,7] RDQ23 RDQM2 EDQM2 [5]
ED22 A14 D23 EDQM3 [5]

[4]
RDQ22 RDQM3
stella add ED21 A13 RDQ21
EINT11_G [7] ED20 D12 RDQ20 RDQS0 F15 EDQS0 [5]
DVDD12_EMI

HI_Z_TPA6136
ED19 A10 F17
EINT14_CTP_RST [6] RDQ19 RDQS1 EDQS1 [5]

1
ED18 B13 F12
EARPHONE_CODEC_SDB [4] RDQ18 RDQS2 EDQS2 [5]

R1202
ED17

R1201
C10 E20

4.7K

4.7K
R1220 EINT16_SUB_CMRST [6] RDQ17 RDQS3 EDQS3 [5]

1
[2] FREQ_HOP 1 2 ED16

R1206

R1205
[4] B11 RDQ16
GPIO17_OTG_ID

n.m

n.m
R1222

C1201
ED15

R1204
D22 E15

100NF
EDQS0_B [5]

R1203
RDQ15 RDQS0_B

n.m
SUB_CMPDN [6]

8.2K
39K
ED14 B20 E17

2
GPIO_CHG_EN [3] RDQ14 RDQS1_B EDQS1_B [5]
UTXD2 ED13 D20 E12

2
[1] UTXD2 [2,7] SCL2 RDQ13 RDQS2_B EDQS2_B [5]

2
GPIO93_HWID[2]

SDNT1005X104F4250FTF
KCOL0 [7] [2]
GPIO167_HWID ED12 A22 F20

2
RDQ12 RDQS3_B EDQS3_B [5]
KROW0 [7] [2,7] SDA2 [2,5] EVREF EVREF ED11 C19 RDQ11
[1] URXD1 URXD1 [2] AUX_IN0 [2] VIO18_PMU ED10 B19
GPIO167_HWID AUX_IN1 [2] RDQ10
[1] UTXD1 UTXD1 LCM_ID [6] ED9 A20 RDQ9 RCLK0_B F9 EDCLK_B [5]
[1] URXD0 URXD0 ED8 B21 RDQ8 RCLK0 E9
KCOL2 [7] EDCLK [5]

1
1

C1202
R1208 1

100NF
UTXD0 ED7

R1210

R1209

R1207
[1] UTXD0 B16 RDQ7

100K

100K
1

8.2K
ED6 A17 RDQ6
GPIO93_HWID [2]

R1223
C1203

100K
ED5 B18

2
RDQ5
ED4 EA0

AC11
AD10

AC10

AC13

AD13
A16 B8

AE10

AB13

AE13

AA13
AF10
RDQ4 RA0
AD8

AC8
AC9

AD7

AG8
AA3
AB3

AE7
AA1
AA2

AB9

AE9
R23

AF8
P23
P22

Y13
T23

1
W2

ED3 B15 B9 EA1

U2
Y2

V2

RDQ3 RA1

2
U1201-C
ED2 EA2

R1211

R1212
C15 D8

2
RDQ2 RA2

1K

1K
ED1 D14 A8 EA3
UTXD0
URXD0

UTXD1
URXD1

UTXD2
URXD2

UTXD3
URXD3

SCL0
SDA0
SCL1
SDA1
SCL2
SDA2

SPI_CS
SPI_MO
SPI_MI
SPI_CK

EINT11

EINT14
EINT15
EINT16
EINT17
EINT18
EINT19
EINT20

KPCOL0
KPROW0

KPCOL1
KPROW1

KPCOL2
KPROW2
RDQ1 RA3
ED0 C14 RDQ0 RA4 A7 EA4
C C1204 are for ESD ehnhace proposal. C7 EA5
C

2
RA5
[8] CLK1_BB CLK1_BB AF26 CLK26M It can be cancel for cost-down proposal [2,3,6] SCL1 RA6 A5 EA6
[2,5] EVREF F16 VREF RA7 D6 EA7
DVDD18_IO3 DVDD28_MD SYSRSTB M25 SYSRST_B [1,3] RA8 C6 EA8
RTC32K_CK L25 [2,3,6] SDA1
[3]RTC32K_CK RTC32K_CK C1204 RA9 A4 EA9
VIO18_PMU

1
R12132 1 TESTMODE
AF11 M24 n.m
0R TESTMODE SRCLKENAI
FSOURCE_PR5 N25

2
FSOURCE_P SRCLKENA SRCLKENA [3,8]
R12142
0R 1 FSOURCE_P R4
DVDD18_EFUSE TP1201 TP_MEMPLL A1 TP_MEMPLL REXTDN B3 REXTDN
N26 WATCHDOG PWRAP_SPI0_CSN J23 PMIC_SPI_CS [3]
[3]WATCHDOG_B

R1215
H23 PMIC_SPI_SCK [3]

54.9R
PWRAP_SPI0_CK
[1] JTCK AF12 JTCK PWRAP_SPI0_MI J24 PMIC_SPI_MISO[3]
[1] JTDO AE12 JTDO PWRAP_SPI0_MO H22 PMIC_SPI_MOSI[3]

1
PWRAP_INT H24 EINT_PMIC[3]

R1216

R1217
[1] JTDI AG11 JTDI

4.7K

4.7K
AUD_CLK_MOSI K26 AUD_CLK [3]
[1] JTMS AF13 JTMS AUD_DAT_MISO K25 AUD_DAT_MISO[3]
J25

2
5.1K AUD_DAT_MOSI AUD_DAT_MOSI[3]
2 1 USB_VRT P25 USB_VRT
R1218 GPIO12 AG10 [2,6] SCL0
[4]USB_DP R26 USB_DP GPIO13 AF9 [2,6] SDA0
Close to MT6582 [4]USB_DM R25 USB_DM
SIM1_SCLK L21 SIM1_SCLK [3]
SIM1_SIO K23 SIM1_SIO [3]
90 Ohm SIM1_SRST L23 SIM1_SRST [3]
L20 SIM2_SCLK [3]
differential
[3] CHD_DP N23 CHD_DP
SIM2_SCLK
SIM2_SIO
SIM2_SRST
L24
K24
SIM2_SIO [3]
SIM2_SRST [3]
I2C0:TP
N24
[3] CHD_DM CHD_DM
EINT0
EINT1
W22
V22
EINT0_MT6333[3]
EINT1_A [7]
I2C1:charger,sub camera,main camera
EINT2 AA24 EINT2_CTP [6]
EINT3
EINT4
V24
W25
EINT4_HP [4]
I2C2:sensor,flash driver,LCD driver
stella add EINT5 Y25
EINT6 AA23
DVDD28_MD EINT6_M [7]
EINT7 AA26
V5 I2S_BCK
DVDD18_IO3 EINT8 AA25
[6] FLASH_STROBE U5 I2S_LRCK EINT9 Y23 EINT9_MAINCAM_RST [6]
[4] W5 I2S_DATA_IN EINT10 Y22 EINT10_CMPDN [6]
GAIN_TPA6136
PCM_CLK V23
PCM_RX V26
V25

RF LCM & camera

PCM_SYNC
[2] AUX_IN0 AC19 AUX_IN0 PCM_TX U24
AD19 AUX_IN1
[2] AUX_IN1
C1232 C1231 AF18 AUX_XP
AG17 AUX_XM
100PF 100PF AF17 AUX_YP
DVDD28_MSDC2 DVDD28_MSDC1 DVDD18_MSDC0 U1201-E

AG16
B AUX_YM
U1201-A
[6] M3 U3 B
MSDC0_RSTB
MSDC2_DAT3
MSDC2_DAT2
MSDC2_DAT1
MSDC2_DAT0

MSDC1_DAT3
MSDC1_DAT2
MSDC1_DAT1
MSDC1_DAT0

MSDC0_DAT7
MSDC0_DAT6
MSDC0_DAT5
MSDC0_DAT4
MSDC0_DAT3
MSDC0_DAT2
MSDC0_DAT1
MSDC0_DAT0

MIPI_TCP TCP LCM_RST LRSTB [6]

MSDC2_CMD

MSDC1_CMD

MSDC0_CMD

AG19
MSDC2_CLK

MSDC1_CLK

MSDC0_CLK

REFP [6] MIPI_TCN M4 TCN DSI_TE Y3

AF19 [8] LPTE [6]
AVSS_REFN TX_BBIP TX_BBIP AF22 UL_I_P BPI_BUS0 AB24 ASM_VCTRL_A ASM_VCTRL_A [8] [6] MIPI_TDP0 M1 TDP0 DISP_PWM AD9 PWM [6]
C1205 [8] TX_BBIN TX_BBIN AF21 AB23 ASM_VCTRL_B M2
UL_I_N BPI_BUS1 ASM_VCTRL_B [8] [6] MIPI_TDN0 TDN0
1

[8] TX_BBQP TX_BBQP AG20 UL_Q_P BPI_BUS2 AD25 ASM_VCTRL_C ASM_VCTRL_C [8] [6] MIPI_TDP1 P2 TDP1
[8] TX_BBQN TX_BBQN AF20 AC24 WG_GGE_PA_ENABLE [6] N2

DVDD28_BPI
1UF UL_Q_N BPI_BUS3 WG_GGE_PA_ENABLE [8] MIPI_TDN1 TDN1
2

MT6582
BPI_BUS4 AC23 P1 TDP2
T2
T1
T5
T6
R7
T3

D3
C2
D2
E4
C3
E3

F22
E23
F24
G24
E26
E25
G23
G22
D26
E24
G25

BPI_BUS5 AE25 FREQ_HOP[2] R1 TDN2

BPI_BUS6 AD24 N5 TDP3
BPI_BUS7 AF16 W_PA_B1_EN W_PA_B1_EN [9] M5 TDN3
EMMC_RST [5] BPI_BUS8 AA17 W_PA_B2_EN[9]
EMMC_CMD [5] BPI_BUS9 AD16 [6] MIPI_RCP K6 RCP CMMCLK B2 CMMCLK [6]
EMMC_CLK[5] [8] RX_BBIP RX_BBIP AG25 DL_I_P BPI_BUS10 AC16 W_PA_B8_EN [9] [6] MIPI_RCN K5 RCN CMPCLK B1
CMPCLK [6]
EMMC_DAT0 [5] [8] RX_BBIN RX_BBIN AG24 DL_I_N BPI_BUS11 AF15 [6] MIPI_RDP0 L3 RDP0
EMMC_DAT1 [5] [8] RX_BBQP RX_BBQP AG22 DL_Q_P BPI_BUS12 AC17 [6] MIPI_RDN0 K3 RDN0 CMDAT0 E2
FLASH_HWEN

C1205 Close to MT6582 EMMC_DAT2 [5] RX_BBQN RX_BBQN AG23 AB17 K1 F2

SPK_EN

[8] DL_Q_N BPI_BUS13 [6] MIPI_RDP1 RDP1 CMDAT1

EMMC_DAT3 [5] BPI_BUS14 AC15 [6] MIPI_RDN1 K2 RDN1
AF19 should connect to C1205.2 first, EMMC_DAT4 [5] BPI_BUS15 Y15 [6] CMDAT7 J1 RDP2_
EMMC_DAT5 [5] [6] CMDAT6 J2 RDN2_
than connect to GND by via EMMC_DAT6 [5] [6] CMDAT3 G2 RDP3_
[4]

EMMC_DAT7 [5] AG14 [6] CMDAT2 H2

DVDD18_IO4
VM0 VM0 [9] RDN3_
VM1 AF14
VM1 [9]
[6]

[6] CMDAT5 F5 RCP_A_

BSI_EN AD14 BSI-A_EN BSI-A_EN[8] [6] CMDAT4 G5 RCN_A_
AF25 VBIAS BSI_CLK Y14 BSI-A_CK BSI-A_CK[8] [6] CMVSYNC G4 RDP0_A
MC1CM [5] WG_GGE_PA_VRAMP AE24 AB14 BSI-A_DAT0 [6] CMHSYNC G3
[8] WG_GGE_PA_VRAMP APC BSI_DATA0 BSI-A_DAT0[8] RDN0_A
MC1CK [5] BSI_DATA1 AA14 BSI-A_DAT1 BSI-A_DAT1[8] [6] CMDAT1 J3 RDP1_A
MC1DA0 [5] [8] DCOC_FLAG DCOC_FLAG AE14 TXBPI BSI_DATA2 AC14 BSI-A_DAT2 BSI-A_DAT2[8] [6] CMDAT0 H3 RDN1_A
MC1DA1 [5]
MC1DA2 [5]
MC1DA3 [5] MIPI_VRT N1 VRT

1
R1219

1.5K
MT6582 MT6582

2
Close to MT6582

A A
COMPANY:
Lenovo MIDH_Phone
TITLE:

DRAWN: 1
DATED:
Stella_MB_H101
chengfei&fanpeng 20130422
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
wangdj 20130425
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> D 12_MT6582_BASEBAND H101
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 2 OF 10
 6 5 4 3 2 1
REVISION RECORD
VBAT
LTR ECO NO: APPROVED: DATE:
U1302
VBAT
FAN53555 I2C:0XC0
U1303
NCP6335D I2C:0X1C AVIN
D1
C1360

2
SPK_P K1 B4
AGND
R1306 SPK_N L1 D2
PVIN
1 2 P1 E1

1
VBAT_SPK PVIN 4.7UF
stella change ANT_SEL1 A2 E2
1K EN PVIN
L2 GND_SPK AU_HSP H1 AU_HSP [4] [10]

1
G1 R1361 E3

C1307
2.2UF
AU_HSN AU_HSN[4] 2 1 AUDIOGND[4] SW
ANT_SEL2 A1 E4
VSEL SW
H4 0R [10] D3

2
AU_HPL AU_HPL[4] SW L1310 VPROC_PMU
F2 AU_MICBIAS0 AU_HPR J4 B3 D4
MICBIAS0 AU_HPR[4] PG SW
G2 AU_MICBIAS1
MICBIAS1 C1 0.47uH
PGND
B2 C2
C1310 INTB PGND Please refer to MT6333 application notice

1
C3

PMIC
[4]AU_VIN0_P E4 AU_VIN0_P ISINK0 E9 PGND
AUDIO DRIVER B1 C4
100NF
[4]AU_VIN0_N F4 AU_VIN0_N ISINK1 C9
E10
SDA1
[2,3,6]
SDA PGND for R813<12R-0805> & U3 selection guide

2
ISINK2
[4]AU_VIN1_P G3 AU_VIN1_P ISINK3 C10 SCL1 A3 A4
SCL FB
[4]AU_VIN1_N G4 AU_VIN1_N [2,3,6]
D D2 AU_VIN2_P NCP6335D
L1501 / L1502/ L1503 / L1504
D
D1 AU_VIN2_N
R1311 Please use inductor recommand by MTK
1 2 J2 AVDD28_ABB
VA_PMU Refer to MT6333 design notice
0R D3 AVDD28_AUXADC VPROC_FB I2C:0XD6

1
H2 GND_ABB L1302
C1311
VPROC_PMU
1UF C1314 are for VPROC_FB decoupling proposal.

C5

C4

D3

C3
0.68uH U1305
It can be cancel for cost-down proposal

1
C1312 E2

PGND_CHR
CHR_GATE

GND
AGND
[4]ACCDET ACCDET C1341 n.m
BUCK OUTPUT C14
1UF VPROC

1
E1 D14

2
B4
CLK4_AUDIO
[8] CLK26M VPROC C1314 LX
VPROC E14 A5
CHRIN
4.7UF

2
connect to MT6166 x04 pin directly LX B5
[1,3,4,6,7,8,9] VBAT
VPROC_FB B12 VPROC_FB B3
VBUS
CHARGER C12 A3
GND_VPROC_FB BOOT
P13 BATSNS L1303 GND_VPROC_FB
[3] ISENSE P12 ISENSE VPA A14 VPA_SW W_PA_VCC
[3] BAT_ON BAT_ON K3 BATON VPA B14 A2
DRVCDT CS D4
2.2uH

1
VCDT A12 VCDT C1317 CS D5
[3] VCDT
M13 VDRV VPA_FB D12 W_PA_VCC 2.2UF

2
C1
C1339 n.m ISET R1354
BATSNS C2 1 2
R1352
VBUS_1 1 2 CHR_LDO N13 CHRLDO 0R
L1304
3.3K
VSYS H14 VSYS_SW VSYS_PMU VBAT E4 40mil
A4 E5
VBAT
0.68uH VLED VBAT C1345
1

C1318 CONTROL SIGNAL

2
R1316 C1340 n.m C1346
Switching Charger

2
1UF [1,7] PWRKEY 1 2 M2 PWRKEY
A1 VCAMA_PMU VA_PMU
2

1
1K [2]WATCHDOG_B SYSRSTB R1343
K4 1 2 n.m

1
[1,2] SYSRST_B RESETB ALDO OUTPUT VIO18_PMU 10UF
A9 FSOURCE VA M3 VA_PMU 4.7K Buck Converter
[2]
EINT_PMIC A7 INT
Close to PMIC [3] EXT_PMIC_EN N12 EXT_PMIC_EN VCN28 N3 VCN28_PMU L1305
VTCXO L4 1 0R 2 VTCXO_PMU [2] E2
INT VMEM_LX E3
N2
EINT0_MT6333 VM12_SW_PMU
PMU_TESTMODE R1314 0.68uH C1347

2
VCAMA P3 VCAMA_PMU VMEM_FB B2 BUCK1_FB BUCK1_FB[1]
[2] AUD_DAT_MOSI E7 M6 VCN33_PMU C1320 [2,3,6] SCL1 A1
AUD_MOSI VCN33 C1319 SCL 4.7UF

1
E8 C3

1
[2] AUD_CLK AUD_CLK AVDD33_RTC VRTC [2,3,6] SDA1 B1
SDA
[2]AUD_DAT_MISO B6 AUD_MISO
1UF L1306

2
1UF
[2,3,8] SRCLKENA A2 SRCLKEN SRCLKENA
[2,3,8] E1
SLEEP_B BUCK2_SW VCORE_SW_PMU
M1 DLDO OUTPUT VM_PMU
TP1302 FCHR_ENB R1319 R1355 0.68uH C1348

2
VM J13 [3] 1 2 F1
BUCK_EN VCORE_LX F5
D9 H11 1 2 PMU side EXT_PMIC_EN

PGND_BUCK
PGND_BUCK
[2] PMIC_SPI_SCK SPI_CLK VRF18 0R VRF18_PMU 1K 4.7UF

1
B7 L12

1
[2] PMIC_SPI_CS VIO18_PMU D1
VBAT Vbat should connect to C1322 first, SPI_CSN VIO18 1UF C1350 VCORE_FB VCORE_SW_FB
[2] PMIC_SPI_MOSI D8 SPI_MOSI VIO28 M4 VIO28_PMU

VRF_FB
VRF_LX
B8 J12 C1365 VRTC

2
then star-connetion to MT6323 [2] PMIC_SPI_MISO SPI_MISO VCN18 VCN18_PMU 47NF
VCAMD K14 VCAMD_PMU
C Star-connection F13 VBAT INPUT
VBAT_VPROC
VCAM_IO L13 VCAMD_IO_PMU
RTC C338 / C339 are for VMEM_FB / VCORE_FB decoupling proposal. C
F14 MT6333
It can be cancel for cost-down proposal

F3
F4

F2

D2
50mil 50mil 30mil VBAT_VPROC
G13 VBAT_VPROC VEMC_3V3 P7 VEMC_3V3_PMU
30mil A13 VBAT_VPA VMC L6 VMC_PMU VRF_SW_PMU
VMCH P4 VMCH_PMU
20mil H13 VBAT_VSYS VUSB N6 VUSB_PMU

R1325
P8 VBAT_LDOS3 VSIM1 P9 VSIM1_PMU L1307

1K
1

P6 N9 VRF_SW_PMU
C1322

VSIM2_PMU
22UF

20mil VBAT_LDOS3 VSIM2

P5 VBAT_LDOS2 VGP1 L8 VGP1_PMU
P2 2.2uH
2

30mil VBAT_LDOS1
C1359

2
VIBR M7 VIBR_PMU
VSYS_PMU J14 AVDD22_BUCK VGP2 N8
M14 L14

1
AVDD22_BUCK VGP3 4.7UF
N7 VCAM_AF

1
VCAM_AF

MT6333(Reserve)
C1324 C1323
+ n.m
DVDD18_DIG A8
T1303

DVDD18_DIG
100NF
VIO18_PMU A5 DVDD18_IO -

2
GND

BAT1301
[3,8] AUXADC_REF AUXADC_REF C2 AUXADC C1325
AUXADC_VREF18
[8]THERM_ADC B1 AUXADC_AUXIN_GPS VREF P14
B2 1 2
AVSS28_AUXADC
100NF
C1326 must to be close C1326 C1338
1

to MT6323 pin B1 BC 1.1

100NF 100NF[2] A10 N14 VBUS VBUS_1
2

CHD_DM CHG_DM GND_VREF

[2] CHD_DP A11 CHG_DP

RTC_32K1V8 D5 RTC32K_CK [2] R1301

SIM LVS RTC 1 2
B5
RTC_32K2V8 C4
A3 32K_IN
Close to MT6323
[2] SIM1_SCLK SIM1_AP_SCLK XIN 0R
GND_AUXADC [2] SIM1_SIO M11 SIMLS1_AP_SIO XOUT A4 32K_OUT
[2] SIM1_SRST E6 SIM1_AP_SRST
C1327 C1328 C1329 C1330 C1331 C1332 C1333 C1334 C1335 C1302

1
C1303 C1313

2
1

1
1

1
C5 B10 X1301
[2] SIM2_SCLK
[2] SIM2_SIO K11
SIM2_AP_SCLK GND_ISINK
G11
25V rating
Connect TSX/XTAL GND SIMLS2_AP_SIO GND_VSYS

2
C1337 22PF

1
1uF

1
4.7UF 4.7UF 4.7UF 4.7UF 10UF D6 E13
2

2
1UF 10UF 1UF 1UF [2] SIM2_SRST SIM2_AP_SRST GND_VPA 100NF
C1336

1
to AVSS28_AUXADC first GND_VPROC E11 32.768KHz
M9 F11

2
[7]
SIM1_CARD_SCLK SIMLS1_SCLK GND_VPROC 18PF VBUS_1
than connect to main GND N11 F10

2
[7] SIM1_CARD_SIO SIMLS1_SIO GND_VPROC 18PF
SIM1_CARD_SRST
[7] M10 SIMLS1_SRST
GND_LDO K6
[7]
SIM2_CARD_SCLK K9 SIMLS2_SCLK GND_LDO K8
[7] SIM2_CARD_SIO
[7]
SIM2_CARD_SRST
L11
K10
SIMLS2_SIO
SIMLS2_SRST GND_LDO F5
I2C:0XD4
GND_LDO F6

40mil
F7
B GND_LDO
F8 B
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO

GND_LDO R1330 C1304

GND_LDO F9 2 1 PMU_32K [8] n.m
G5 TI_1 SW
GND_LDO n.m

A3
GND_LDO G6 VBUS_1 U1301
R1331
2 1 A1 C1

NC
J10
J9
J8
J7
J6
H10
H9
H8
H7
H6
H5
G9
G8
G7

VBUS SW ISENSE
A2 C2 [3]
n.m VBUS SW
C3 L1301

1% 330K
SW
* VCDT rating: 1.268V * C1305

R1302

68mOHM
C1306 4.7UF54013_PMID 4.7UF

R1305
MT6323 B1
PMID
B2 D3
PMID PGND
B3 D2
PMID PGND VBAT
B VCDT *I2C Address: 1101010* PGND
D1 [1,3,4,6,7,8,9]
[3] * Write-0xD4,Read-0xD5 *
B4 FAN54015
SDA1 SDA
[2,3,6] E1 VBAT
CSIN

R1304
A4

39K
SCL1 SCL
[2,3,6]
*CHG_EN=0* E2 E4
[2] GPIO_CHG_EN DISABLE VBAT
D4
OTG Á¬½Óµç³Ø¶Ë
OTG_54013
C4 E3 VREG_54013 C1308
R1307 STAT VREG
80mil 10UF
100K C1309
VBAT

*Charging: STAT=0*
*STOP: STAT=1*

1UF
R1309
2

C1366
C1315 10K
D1301

PZ3D4V2H

n.m
22PF
T1301

n.m
VIBR_PMU
1

7 3 R1310
GND
6
GND
GND

Switching Charger
TEMP AUXADC_REF
5
GND
4 1
GND
J1301
R1308
0R
R1313

16.9K

15mil 1 PAD5

R1315 PAD_0.5X2.0
BAT_ON [3] C1355
1K 1UF D1305

T1304
A A
R1317

30K

n.m
COMPANY:

GND
R1313,R1317 must to be close to
PAD6 Lenovo MIDH_Phone
2

C1321 PMIC AUXADC_REF pin 1

T1302

4mil is ok
1

PAD_0.5X2.0 TITLE:
GND

DRAWN: DATED:
Stella_MB_H101
chengfei&fanpeng 20130422
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:

VIBRATOR
wangdj 20130425
A

BAT. CONN. QUALITY CONTROL:

RELEASED:
<QC By>
DATED:
<QC Date>
DATED:
<Code> D 13_MT6323_PMIC_AUDIO H101
<Released By> <Release Date> SCALE: <Scale> SHEET:3 OF 10
 6 5 4 3 2 1
REVISION RECORD
LTR ECO NO: APPROVED:DATE:

MICBIAS0
MIC Receiver SPEAKER VBAT

D D

2
R1434

1K
C1442 C1443
PAD9 33PF 4.7UF

1
B1401
1 PAD-2.5X1.5

VDD A2
[3] AU_HSN U1403
SZ1005K102TF
[3,4]
AU_HPR C1444 10NF B1418

2
PA_IN+ A1 IN+ 1 PAD1

R1433

1.5K

1
33PF [3,4] C1445 10NF PA_IN- C1 IN- PA_OUT- BLM18HE102SN1
C1431
PAD10 AUDIOGND OUT- C3 C1453 PAD_0.4X2.5

2
B1417
1
B1403
PA_OUT+
100PF
[3] AU_HSP 1 PAD-2.5X1.5 [2] SPK_EN C2 CTRL OUT+ A3 1 PAD2
B1410 SZ1005K102TF
BLM18HE102SN1

B3 PGND
B1 AGND
1 2 1 PAD7

C1404
C1426 VREF

33PF
C1403
100NF B2 VREF

33PF
[3] AU_VIN0_P
0402B_HZ1005K102TF R1420 PAD_0.4X2.5
C1446

2
C1427 C1454 C1455

T1415
C1435 PAD_0.5X2.0 100K

T1402
1UF
33PF

GND

GND
10UF
B1411
YDA145 33PF
1 100PF
2 1 PAD8

T1417

T1418
C1425 100NF
[3] AU_VIN0_N 1 PAD3
0402B_HZ1005K102TF
PAD_0.5X2.0
PAD_0.4X2.5
2
R1435

C1430
1.5K

C1429

T1421
T1416
1 PAD4
33PF 33PF
1

GND
PAD_0.4X2.5

GND
2
R1436

1K
1

C C

F3.5 Earphone MIC£¬GND£¬R£¬L

VIO18_PMU

USB IO

R1406

470K
stella change

3F66-00_US
B1404 SZ1005K182TF
1
HP_M HP_MIC [4]
MIC
3
AUDIO-R HP_R B1406SZ1005K182TF HP_JACK_1 47K
5 EINT4_HP [2]
JACK
4 B1405 SZ1005K182TF R1401 R1408
1 33R 2
AUDIO-L HP_L HP_MP3L [4] Jack:0
2 B1407 R1402
1 33R 2 HP_MP3R [4]
GND
SZ1005K182TF
stella change

J1401 C1420
R1461 R1462
82PF C1405
T1465

C1438
100NF
T1407
n.m

T1406
C1411

n.m
C1410
1NF 33PF
33PF
1

1
T1409

n.m

2
T1410

470R 470R
T1408

T1412

FM_ANT [10]

GND
PESD5V0S1BL

1
PESD5V0S1BL
PESD5V0V1BL

PESD5V0S1BL

GND
L1403 100nH

GND

6
7
100nH

L1404

VBUS B1419
B B

GND

GND
BLM18SG331TN1
GND
GND
GND

GND

1 VUSB
C1459 n.m
R1415
1 2 FM_RX_N_6572 [10] C1456 C1457 C1458 1
R1421
2 2 D-/UTXD
0R 100NF 2.2NF 330PF T1107 [2] USB_DM

2
PESD12VS1ULD R1422
[2] USB_DP 1 2 3 D+/URXD
R1423
MICBIAS1
GPIO17_OTG_ID
1 2 4 ID
U1402

GND
GND
[2] 1K

1
[3,4]AUDIOGND C4
0402T_PESD12VS1ULD_38PF 5 GND
INR+

T1420
T1419

GND

GND
[3,4] AU_HPR C1447 n.m D4 D3 HP_MP3R [4]
INR- OUTR
[3,4]AUDIOGND B4 A3 HP_MP3L[4]
INL+ OUTL
R1411

8
9
1K

33PF [3,4] AU_HPL C1448 n.m A4

INL-
J1402
C1437
2

GND of C1436(10uF) and headset 3.2.01.0130

Earphone MICPHONE AU_VIN1_N1 [2]
EARPHONE_CODEC_SDB
A1
EN SGND
C3

* close IC * should tie together and single [2] GAIN_TPA6136 D2 B1

GAIN TPA6136A2_NM GND
via to GND plane
1

C1436 D1 C2
C1433

[2] HI_Z_TPA6136
33PF

100NF C1416 HI-Z HPVSS

[3] AU_VIN1_N 10UF
R1424
R1412

A2
2

1.5K

1 n.m 2
n.m

100PF VBAT VDD

C1432 B3
100NF C1417 HPVDD
CPN
CPP

C1451

[3] AU_VIN1_P
1

2
C1434
33PF

tie together and single via to GND plane n.m

R1425

C1450
B2

C1
n.m
2

HP_MIC [4] n.m

C1449
1

C1452 n.m

B1408
SZ1005K182TF
[3,4] AU_HPL C1401 22UF HP_MP3L [4]
A R1413 A
[3] ACCDET HP_MIC[4] B1409
SZ1005K182TF COMPANY:
* HOOK* C1402 22UF
Lenovo MIDH_Phone
[3,4]AU_HPR HP_MP3R [4]

TITLE:
Stella_MB_H101
DRAWN: DATED:
chengfei&fanpeng 20130422
CHECKED: DATED: CODE: SIZE: DRAWING NO: REV:
wangdj 20130425
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> D 14_AUDIO_USB H101
RELEASED: DATED:
<Released By> <Release Date> SCALE:
<Scale> SHEET:4 OF10
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D MEMORY_EMMC_LPDDR2 D

186 Ball, 0.5mm pitch

VDD1=1.8V
VDD2=1.20V

[2] EA[0:9]

EA0 Y6
U1501

KMK7U000VM-B309
H9
VDD1 : Core 1
DVDD18_EMI
VDDCA=1.2V
VDDQ= 1.20V
DVDD18_EMI

R1501
VIO18_PMU

SD CARD
CA0 VDD1 1 2
EA1 W6 J4
EA2 V6
CA1
CA2
VDD1
VDD1
AA4 VDD2 : Core 2 0R
EA3 V5 AB9 DVDD12_EMI VMC_PMU
CA3 VDD1 C1501 C1502

1
EA4 V4
CA4
EA5 N5
CA5 VDD2
H8
100NF

2
EA6 M5
CA6 VDD2
K5 2.2UF
EA7 M6
CA7 VDD2
N4
EA8 L6
CA8 VDD2
R10
[2] ED[0:31]
EA9 L5
CA9 VDD2
Y5
AB8
VDD2
ED0 W11
DQ0
ED1 V11
DQ1 VDDQ
J10

R1502

R1504

R1503

R1505

R1506

R1507
n.m

n.m

n.m
n.m
n.m
ED2

n.m
V10 J13
DQ2 VDDQ

C1507
ED3 V12 K8

C1506
DQ3 VDDQ

C1505

C1508
Power

C1504
ED4

C1503
V9 L12
DQ4 VDDQ
ED5 U10
DQ5 VDDQ
M13

1
ED6 U11 P9
ED7 U12
DQ6 VDDQ R9 stella change
DQ7 VDDQ

100NF

100NF

100NF
2.2UF

100NF
ED8 N12 T9

2
2.2UF
ED9 N11
DQ8 VDDQ V13 J1501
DQ9 VDDQ
ED10 N10
DQ10 VDDQ
W12
ED11 M9
DQ11 VDDQ
Y8
[2] MC1DA2 1
ED12 M12
DQ12 VDDQ
AA10 DAT2
ED13 M10
DQ13 VDDQ
AA13
2
ED14 M11
DQ14 1. VCC : Core Voltage 2.7v ~ 3.6v [2] MC1DA3 CD/DAT3
ED15 L11
DQ15 VDDCA
M4
3
ED16 AB10 P4 2. VCCQ : IO Voltage 1.7v~1.95v (low voltage range) [2] MC1CM CMD
C ED17
ED18
Y9
AB11
DQ16
DQ17
VDDCA
VDDCA
W5
VMCH_PMU
4
VDD
C
DQ18
ED19 W8
DQ19 VCC
D11 VEMC_3V3_PMU 5
ED20 Y10 E5 [2] MC1CK CLK
DQ20 VCC
ED21 AB12
DQ21 VCCQ
E11
VIO18_PMU 6
ED22 AA11
DQ22 VDDI
D8 VSS
ED23 W9
DQ23 R1512 7
ED24 L9
DQ24 CLKM
E8 1
27R 2
EMMC_CLK [2]
[2] MC1DA0 DAT0
ED25 J11 F4
DQ25 RST EMMC_RST [2] C1509 C1510 C1511 C1512 8

1
C1513 C1514 [2] MC1DA1 DAT1

1
ED26 H12 F8
DQ26 CMD EMMC_CMD [2]
ED27 K10
DQ27 eMMC 9

C1515
ED28 100NF 1UF 2.2UF GND

C1521

C1516
L8 E7

2
4.7UF 220NF 100NF

C1520
EMMC_DAT7 [2]

C1519
C1517

C1518
DQ28 DAT7

C1522
ED29 H11 D7
DQ29 DAT6 EMMC_DAT6 [2] 10
ED30 K9 D9 GND
ED31 H10
DQ30 DAT5 E9 EMMC_DAT5 [2]
DQ31 DAT4 EMMC_DAT4 [2] 11
DAT3
D10
EMMC_DAT3 [2]
D1

4.7UF
n.m

n.m

100NF
Close to Memory

n.m

n.m
n.m

n.m
R1510 1 2 240R1% K6 E10
240R1% ZQ0 DAT2 EMMC_DAT2 [2] 12
R15111 2 J6
ZQ1 DAT1
E6
EMMC_DAT1 [2]
D2
D6
DAT0 EMMC_DAT0 [2]
J9 U4
VSSQ CS0# ECS0_B [2]
J12
K13
VSSQ CS1#
U5
ECS1_B [2]
TF001-22112A81
L13
VSSQ T4
M8
VSSQ CKE0 T5
ECKE [2,5]
N13
VSSQ CKE1 ECKE [2,5]
R8
VSSQ R6
U13
VSSQ CLK P6
EDCLK [2]
V8
VSSQ CLK# EDCLK_B [2]
W13
VSSQ U9
Y13
VSSQ DQS0 U8
EDQS0 [2]
VSSQ DQS0# EDQS0_B [2]
AA9 N9
AA12
VSSQ DQS1 N8
EDQS1 [2]
VSSQ DQS1# Y11
EDQS1_B [2]
DQS2 EDQS2 [2]
W4 Y12
R4
VSSCA DQS2# K11
EDQS2_B [2]
VSSCA DQS3 EDQS3 [2]
L4 K12
VSSCA DQS3# EDQS3_B [2]
E12 T8
VSSM DM0 EDQM0 [2]
H4 P8
VSSM DM1 EDQM1 [2]
J5
J8
VSS LP-DDR2 DM2
W10
L10
EDQM2 [2]
VSS DM3 EDQM3 [2]
K4
P5
VSS N6
VSS VREFCA EVREF[2]
R11 R12
Y4
VSS VREFDQ
AA5
VSS F5
AA8
VSS NC F7
VSS NC C1523 C1524
1

F6 F9
VSSQM NC G4
NC
B A1 G5 4.7UF 100NF
B
2

A3
DNU NC G6
A14
DNU NC G7
A16
DNU NC G8
B2
DNU NC G9
B15
DNU NC H5
C1
DNU NC H6
C16
DNU NC R5
D4
DNU NC T6
D5
DNU NC U6
D12
DNU NC AA6
D13
DNU NC AB5
E4
DNU NC AB6
E13
DNU NC
H13
DNU
K2
DNU
K15
DNU
M2
DNU
M15
DNU
R2
DNU
R15
DNU
U2
DNU
U15
DNU
AB4
DNU
AB13
DNU
AC4
DNU
AC5
DNU
AC12
DNU
AC13
DNU
AD1
DNU
AD16
DNU
AE2
DNU
AE15
DNU
AF1
DNU
AF3
DNU
AF14
DNU
AF16
DNU
DNU

8Gb+16GB(Default)[KMK8U000VM-B410_11.5x13_0]
A A

16Gb+32GB (ROW)[KMI2U000MA-B800_186F_12x16] COMPANY:

TITLE:
Lenovo MIDH_Phone

DRAWN: DATED:
Stella_MB_H101
chengfei&fanpeng 20130422
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
wangdj 20130425

15_MEMORY_EMMC_LPDDR2H101
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> D
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 5 OF 10
 6 5 4 3 2 1
REVISION RECORD
LTR ECO NO: APPROVED:DATE:

stella change
VIO18_PMU VIO28_PMU

LCM Flash LED and Driver IC

LCD BACKLIGHT

2
R1604
R1605

0R
0R
2

1
J1601
AXE530124-CW
D VDD(IOVCC)1
D
VCI 2
R1603
ID(GND) 3 2 1
LCM_ID [2]
1K
LED1+ 4 VLED_P [6] C1602 C1603

1
1UF
LED2+ 5
TP1601 1UF

2
MTP 6
VBAT
LED1- 7
VBAT VLED_P
LED2- 8 VLED_N[6] C1620
C1619

D1602
R1615 1UF
NRES 9 2 1 LRSTB [2]
1UF

1
TE 10 2
R1610
1
1K
LPTE [2] L1601 SW_LCD_BL D1601
C1601
1 2

2
1K n.m
PWM 11 22uH

10

11
LCD_CABC[6] C1604 C1605

7
2.2UF 1UF RB160VA-40 C1606
GND 12 E1603 4.7UF

C1P

C1N

C2P

C2N
ACFT4A2G900E 1uF C1608 14
50V FLED
DATA0_N 13 3 4 MIPI_TDN0[2] 6
VIN
12
-6V to 0.3V
U1601 KTD2500 VOUT
DATA0_P 14 2 1 MIPI_TDP0[2]
R1612 8.06K 1
RFS C1621
GND 15 R1606 6 4 2
VIN SW RTS 4.7UF
[2] PWM R1613 24K 16
1K CT
GND 16 5 1 3

AGND

AGND

PGND
E1601 R1607 EN_LCD_BL CTRL FB [2] FLASH_HWEN ENF

GND
ACFT4A2G900E VLED_N 4

NC
[6]LCD_CABC n.m [2] FLASH_STROBE ENT
DATA1_N17 3 4 COMP 2 3
MIPI_TDN1[2] COMP GND
R1609

MC
U1602

17

13

15
DATA1_P 18 2 1
R1608 10R
MIPI_TDP1 [2] C1607 RT9387AGQW
VIH = 1.4V 100K 1%

7
GND 19 E1602 220NF
ACFT4A2G900E
CLK_N 20 3 4
MIPI_TCN [2]
CLK_P 21 2 1
MIPI_TCP [2]
GND 22
NC 23

NC 24

GND 25

C NC 26 C
NC 27

GND 28

GND 29

GND 30
34
33
32
31

Touch Panel
Main Camera VGP1_PMU

I2C add:0x6C,0X6D main/sub camera:power

SUB Camera VCAMA_PMU
VIO18_PMU

T1605
AF_VCC:2.8V
DOVDD:1.8V
AVDD:2.8V
I2C add:0x42,0X43 C1609 VIO18_PMU
J1605 1UF
C1691

GND
VCAM_AF

MAIN DVDD:1.5V

2
OV5648 AF:2.8V NC 1 C1625
100NF
J1603 1UF
J1602 AGND 2 1

1
VCC
SUB DVDD:1.2V

2
2
AXE530124-CCW
B B

R1620
2

R1602
SIO_D 3 SDA1 [2,3,6]

47K
47K
1 VIO
DGND 3
4
SDA0 [2]
2

C1618 SDA
2 VCAMD_IO_PMU 1UF

1
1
AF-GND 4
EMI-ICVE10184E070R101FR-R100C15 SIO_C 5 SCL1[2,3,6] VCAMD_PMU VCAMD_IO_PMU SCL SCL0 [2]
1

3
SDA SDA1[2,3,6] EINT16_SUB_CMRST[2]
E1604 5
4
OV5648 IOVDD:1.8V RESET 6
INT EINT2_CTP [2]
AF-VDD(2.8) VCAMA_PMU 6
5 DOVDD_CAM1 1
R1601
2
[2] CMVSYNC 6
6 10
10
SENSOR_VREF [6] VSYNC 7 SENSOR_VREF[6]
C1627 RESET EINT14_CTP_RST[2]
DOVDD(1.8) n.m

T1661

T1601
SUB_CMPDN [2] 7

T1604
5 9 8

T1602
6
0R OV5648 AVDD:2.8V
5 9 PWDN GND
SCL1 [2,3,6]

T1603
SCL
2

4 8 HREF 9 SENSOR_HREF[6] 8
C1617 [2] CMHSYNC 4 8 SENSOR_HREF[6] NC
AGND
7 100NF R1611
3 7 10
1

10

9
8 [2]CMDAT7 3 7 SENSOR_DAT7[6]
BLM15AG102SN1D
1

PWDN [2]
EINT10_CMPDN
11
1

2
2

9 AVDD_CAM1 C1613 C1614

AVDD(2.8) 100NF 10UF VCAMD_PMU Y9 12 SENSOR_DAT7[6]
10

GND

GND

GND

GND
2

2
DVDD_CAM1
1

DVDD(1.5) C1628 C1629

GND
XCLK 13 SENSOR_MCLK[6] 100NF
11 [2] 100NF
EINT9_MAINCAM_RST

1
RESET OV5648 DVDD:1.5V
Y8 14 SENSOR_DAT6[6]
12
STROBE 1
R1
2 DGND 15
13 EMI-ICVE10184E070R101FR-R100C15
DGND 0R
Y7 16 [6]
SENSOR_DAT5
SENSOR_MCLK [6] C1616
2

14 E1608
XCLK1 2.2UF C1615
100NF PCLK 17 SENSOR_PCLK[6]
15 6 10
1

DGND [2]CMPCLK 6 10 SENSOR_PCLK

[6]
Y6 18 SENSOR_DAT4[6]
16 5 9
MDP3 [2] CMDAT6 5 9 SENSOR_DAT6
[6]
Y2 19 SENSOR_DAT0[6]
17 4 8
MDN3 [2] CMDAT2 4 8 [6]
SENSOR_DAT2
Y5 20 SENSOR_DAT3[6]
18 3 7
DGND [2]CMDAT5 3 7 [6]
SENSOR_DAT5
21 SENSOR_DAT1[6]
1

19
Y3
MDP2
1

Y4 22 SENSOR_DAT2[6]
20
MDN2
Y1 23
21
DGND
Y0 24
22
MDP0 MIPI_RDP0[2]
23
MDN0 MIPI_RDN0[2]
EMI-ICVE10184E070R101FR-R100C15
24
DGND E1609
25
MCP MIPI_RCP[2]
[2] CMDAT3 6 10
6 10 SENSOR_DAT3[6]
A MCN
26 MIPI_RCN[2] A
[2] CMDAT4 5 9
5 9 SENSOR_DAT4[6]
DGND
27 COMPANY:
[2] CMDAT1 4
4 8
8
SENSOR_DAT1[6]
Lenovo MIDH_Phone
MDP1
28
MIPI_RDP1[2] R1621 51R
29 [2] CMDAT0 3
3 7
7
SENSOR_DAT0[6] [2] CMMCLK SENSOR_MCLK[6]
1

MDN1 MIPI_RDN1[2]
TITLE:
1

30 C1623
DGND 22PF
Stella_MB_H101
DRAWN: DATED:
34
33
32
31

chengfei&fanpeng 20130422
CHECKED: DATED: CODE: SIZE: DRAWING NO: REV:
wangdj 20130425
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> D 16_LCD_CAMERA_CTP H101
RELEASED: DATED:
<Released By> <Release Date> SCALE:
<Scale> SHEET:6 OF10
 6 5 4 3 2 1
REVISION RECORD
LTR ECO NO: APPROVED:DATE:

VIO28_PMU

D I2C add:0x92,0X93 C1703

VBAT
D

2.2UF

U1701
G-Sensor
8 5
VDD LEDA

I2C add:0x34
4
LEDK
7
[2,7]SCL2 SCL
NC
3
1 C1702
[2,7]SDA2 VIO18_PMU
SDA
1UF
2 6
INT GND
EPL2182

R1701 VIO18_PMU
VIO18_PMU
47K
[2] EINT1_A
C1706
* VDD=VDDIO=1.8V *

2
R1709 100NF
100R
U1707

1
1
IOVDD
8
RES
14
VDD
15
NC
4
SCL SCL2 [2,7]
C1704 2 6
C1705 3
RES SDA SDA2 [2,7]
2.2UF 100NF DNC R1710
5 7 1
GND NC 0R 2
10
RES R1711
1 n.m 2
12 VIO18_PMU
GND
13 11
16
RES INT
9 EINT11_G [2]
RES RES EINT6_M [2]

KXTIK-1004

C
ALS & PS (Elan P-sensor) C

KEYPAD SIM Card

VSIM1_PMU

TP1701 TP1702 TP1703 TP1704

J1702

SIMF006G5K15-10R

[3] 6 1 SIM1_CARD_SIO
SIM1_CARD_SCLK CLK I/O SIM1_CARD_SIO [3]
[3]SIM1_CARD_SRST 5 2
RST VPP
4 3
VCC GND C1707

T1707
33PF

2
T1708

T1709

10
9
8
7
2

2
C1708 C1709
B C1710 C1711 B
stella change

T1719
33PF 33PF

2
1UF

1
33PF

1
Power Key
Side Key 1 J1763PAD_2X0.5
[1,3] PWRKEY 1 J1764PAD_2X0.5
TP1711
1 J1765PAD_2X0.5 TP1708 TP1709 TP1710
V- [7] KCOL2_0 J1704
[7] KROW0_0
1 J1766PAD_2X0.5 VSIM2_PMU

V+[7] 1 J1767PAD_2X0.5 SIMF006G5K15-10R

KCOL0_0
Test Point
6 1 SIM2_CARD_SIO
T1710

T1711

T1712

[7]KROW0_0 TP1707 [3] SIM2_CARD_SCLK CLK I/O SIM2_CARD_SIO [3]

PESD5V0S1BL

5 2
PESD5V0S1BL

PESD5V0S1BL

[3] SIM2_CARD_SRST RST VPP

100NF
[7] KCOL0_0 TP1706
T1701

C1701 4 3
VCC GND

T1713
C1716 C1712

2
[7] KCOL2_0 TP1705 C1713 C1714 1UF 33PF 33PF
T1714

T1715
GND

GND

GND

GND

10
9
8
7
2

33PF
2
33PF

T1720
C1715

1
1

1
R1704
[2] KROW0 2 1K 1 KROW0_0 [7]
R1707
[2] KCOL2 1K KCOL2_0 [7]
R1708
[2] KCOL0 2 1K 1 KCOL0_0 [7]

A A
COMPANY:
Lenovo MIDH_Phone

TITLE:
Stella_MB_H101
DRAWN: DATED:
chengfei&fanpeng 20130422
CHECKED: DATED: CODE: SIZE: DRAWING NO: REV:
wangdj 20130425
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> D 17_KEY_SIM_SENSOR_LED H101
RELEASED: DATED:
<Released By> <Release Date> SCALE:
<Scale> SHEET:7 OF10
 6 5 4 3 2 1
REVISION RECORD
LTR ECO NO: APPROVED:DATE:

SKY77590 control logic table

Enable VctC VctB VctA
EDGE TXM
[8]
GGE_PA_HB_IN
C2101
R2102
0R
0201R J2101
D LB_GMSK_TX H L L H 0201C
18PF
20369C3 D
R2101 R2103
HB_GMSK_TX H L H H 1.5PF 1.5PF
CON2101

GND

GND

GND
LB_EDGE_TX H H L H ECT818000001

SIG
U2102

8
7
6
5
4
3
2
1
HB_EDGE_TX H H H H

1
GND
GND
GND
GND
GND
GND
GND
GND
5 G G 6
TRX1 L H L L

1 RX/TX
C2102 GND

INT
29
TRX2 L H H L

G
G
R2105 TX_HB_IN
9
TX_LB_IN GND
[8] GGE_PA_LB_IN

3
10 28
TRX3 L H L H 0201C 0R 11
BS2 GND
27 R2152,R2151=NM when using sky77593 R2115 C2131

2
BS1 ANT 1 2 2 1
56PF 12 26 R2151 51R R2116

R2104

R2106
TRX4 L H H H VBATT GND

n.m

n.m
13 25 2.7nH 2.7nH 1 2
VCC TRX6

1
TRX5 L L H L 14 24 0R

2
2
C2112 C2116

VRAMP
GND TRX5 TRXB8 C2113 C2115
15 23

MODE
TRXB2 [9] [9]

TXEN
1

TRX1
TRX2
TRX3
TRX4 1.5PF C2114 0.5PF
TRX6 L L L H 22

1
1
39nH

2
R2153
16
17
18
19
20
21
R2107 1K

n.m
[2] ASM_VCTRL_A
R2108 TRXB1 [9]
[2] ASM_VCTRL_B
VBAT
1K 2G_LB [8]
C2103 C2104
0201C 0201C
22PF 22PF 2G_HB [8]
C2105 C2106 C2107

2
2

2
22UF 100NF

1
R2109
[2] ASM_VCTRL_C
1K
R2110
WG_GGE_PA_ENABLE
[2] 1K
C2109 C2110
0201C 0201C
22PF 22PF

BPI0~4 and 10~11 are 2G+3G mode both WG_GGE_PA_VRAMP 1

R2111
2
BPI5~9 and 12~14 are 3G mode only [2] 10K
R2123
VRF18_PMU 1 2 VRF18_RF
(suggest BPI5~9 = 1.8V) [3]

[8]
C R2112 C2111
220PF
n.m C
24K
R2122
VRF_SW_PMU 1 2
[3]
0R

GGE_PA_HB_IN [8]

W_PA_B1_IN [9]

W_PA_B8_IN [9]
L2104

W_PA_B2_IN[9]

[8]
1 2
LB_RX_P

GGE_PA_LB_IN
[8]
12nH

1
1

L2106

39nH
L2103

n.m
10
C2117 L2101 U2103

2
2
1 2

3GB8_RXP [9]
L2105

GND

3GB2_RXN [9]
2G_LB

3GB8_RXN [9]
3GB2_RXP [9]
[8] 2 1

[9]
[9]
1 LBIN LBOUT 9 1 2 LB_RX_N [8]
2.2nH C2119
22PFC2118
12nH VRF18_RF [8]

3GB1_RXP

3GB1_RXN
2 8

L2111

L2150
GND LBOUT

2
3 GND HBOUT 7 VRF18_RF

2
C2150
L2102 L2108
1 2 1 2

1
4 6
[8] 2G_HB

GND
2 1 HBIN HBOUT HB_RX_P [8]
3nH PDET C2129 470NF
6.2nH

1
2
22PF C2120 C2121 PDET [9]

2
1
2.2nH

n.m
1
5

L2110

6.8nH
L2107
1

n.m
RFBLN2012090BM5T25

2
2
L2109

D11

C10
A10

A11

B11

B10
1 2

D3
C3

C2

C7

C8

C9
E3

A2

A3

B3

B4

A5

B5

A6

B6

B8

A8

A9
J2

J7

J8
HB_RX_N [8]
6.2nH

GND
GND
GND
GND
GND

3GB1_RXP

3GB1_RXN

3GB5_RXP

3GB5_RXN

3GB2_RXP

3GB2_RXN

3GB8_RXP

3GB8_RXN

2GHB_TX

3GH1_TX

3GH2_TX

3GL5_TX

2GLB_TX

VTXHF

DET

GND
GND

GND
GND
GND
GND
GND
F3 GND GND D9
G3 GND GND E9
H3 GND GND F9
J3 GND GND G9
Two Application Circuit Conditions, C4
D4
GND
FDD RX TXO GND H9
J9
GND GND
1.TSX Circuit : U2104=TSX, R2118=R2121=NC, R2117=100K+-1%, R2119=R2120=0ohm A1 D10
B B40_RXP DETGND B
2.XTAL Circuit :U2104=Mobile XTAL, R2118=R2121=0ohm, R2117=R2119=R2120=NC B1 B40_RXN TMEAS C11

LB_RX_P C1 E10 VTCXO_PMU

[8] LB_RX_P LB_RXP
TDD RX U2101 V28 VTCXO_PMU
[1,3,8]

1
[8] LB_RX_N LB_RX_N D1 LB_RXN 3GTX_IP G10 TX_BBIP TX_BBIP [2] C2128
connect to main GND 470NF
HB_RX_P E1 G11 TX_BBIN

2
[8] HB_RX_P HB_RXP
TX(I/Q) 3GTX_IN TX_BBIN [2]
Route AUXADC_REF with 4mil trace width
[8]VRF18_RF HB_RX_N HB_RX_N F1 HB_RXN 3GTX_QP F10 TX_BBQP
[3]AUXADC_REF [8] TX_BBQP [2]

1
C2123 470NF VRF18_RF F2 F11 TX_BBQN
VRXHF
MT6166 3GTX_QN

R2117

R2118
2 1 TX_BBQN
2

U2104 [2]

n.m
1uF

0R
C2122 G2 L11
7M26000028-7L26002007_26MHZ-SOFINA RFVCO_MON TXVCO_MON VRF18_RF [8]
1

n.m
2 4 GND C2127
[3] THERM_ADC Route AUXADC_TSX with 4mil trace width 2 1
HOT 3 J1 XTAL1 VTXLF J11 VRF18_RF
1 2
Connect X600 pin2 R2119
H2 H10 DCOC_FLAG
XTAL2 TXBPI
GND to MT6323 pin XO 470NF
1 HOT DCOC_FLAG [2]
B2 first then GND 2 VTCXO_PMU K1 VTCXO28
Test pin RCAL J10

GND_AUXADC RCAL

1
connect Route AUXADC_GND with 24mil trace width n.m n.m G1 32K_EN TST2 K11
2 1 2 1

R2129
to main GND under AUXADC_REF/AUXADC_TSX trace

2K
R2120 R2130 SRCLKENAL1 EN_BB TST1 L10
near pin B2 BSI
1

VTCXO_PMU
[1,3,8] SRCLKENA K2 G8 BSI-A_DAT2

2
CLK_SEL BSI_DATA2 BSI-A_DAT2
R2121

Close to each other 26M output [2]

0R

C2124

2
Connect TSX/XTAL GND L2 XO3 BSI_DATA1 H8 BSI-A_DAT1 BSI-A_DAT1
and nearby X600 470NF [2]
2

to GND_AUXADC first

1
E4 GND GND B7

AVDD_VIO18
F4 GND GND J6
than connect to main GND

BSI_DATA0
G4 RX(I/Q) D8
connect to main GND GND GND

BSI_CLK
OUT32K

VXODIG
H4 E8

XMODE

BSI_EN
RX_QN
GND

RX_QP
GND

VRXLF
[2,3,8] SRCLKENA

RX_IN
RX_IP
GND
GND
GND
GND
GND
GND

GND
GND

GND
GND
GND
GND
XO4

XO2

XO1
Route AUXADC_REF/AUXADC_TSX as differential trace with well GND shielding [2,3,8] SRCLKENA MT6166

J4
C5
D5
E5
F5
D7

K4

K3

L4

K5

L5

K6

K7

L7

L8

K8

K10

K9

G6

H6

F8

E7
J5

C6
D6
E6
F6
and route AUXADC_GND with 24mil trace width under
AUXADC_TSX/AUXADC_REF trace to provide return current path. CLK4_AUDIO
[3] CLK4_AUDIO BSI-A_DAT0
R2155
[10] CLK2_WCN 1 2 CLK1_BB BSI-A_CK BSI-A_DAT0 [2]

VRF18_RF
[2] CLK1_BB n.m n.m BSI-A_CK
2 1 BSI-A_EN [2]
[3] PMU_32K
R2160 BSI-A_EN
[2]

VIO18_LC
[8] VIO18_LC

[2] RX_BBIP

[2] RX_BBIN

[2] RX_BBQP

[2] RX_BBQN
[8]

R2150
Logic

n.m
MODE XMODE VXODIG VIO18_PMU 1
R2128
2
A DCXO_ A

2
[1,2,3,4,5,6,7] 0R VRF18_RF [8]
32K_EN 1 C2125 1uF
C2126 COMPANY:

1
1 2 Lenovo MIDH_Phone
DCXO + 32K XO 0(GND) 1(VIO18) 1(VIO18)
Reserved LC filter 470NF
VIO18_LC
TITLE:
DCXO + 32K-Less 1(VTXCO28) 1(VTXCO28) 1(VTXCO28)
VIO18_LC
[8]
Stella_MB_H101
DRAWN: DATED:
chengfei&fanpeng 20130422
CHECKED: DATED: CODE: SIZE: DRAWING NO: REV:

QUALITY CONTROL: DATED: 21_RF_MT6166

<QC By> <QC Date> <Code> D H101
RELEASED: DATED:
<Released By> <Release Date> SCALE:
<Scale> SHEET:8 OF10
 6 5 4 3 2 1
REVISION RECORD
LTR ECO NO: APPROVED:DATE:

RF_TX
D D
W_PA_VCC

R2221
1 2
C2216 C2241 0R
100NF C2223
2.2UF

VBAT
C2214 4.7UF

C2215 39PF
C2229 L2205
C2217 100NF 12nH

W_PA_OUT_B8 [9]
C2237
C2228 TRXB1
C2227 33PF [8]
56PF 2.2nH

20

19

18

17
[8] W_PA_B8_IN C2231

VBAT

VCC

GND

GND
L2231
0.5PF
1 2.2nH
RFIN_LB RFOUT_LB
R2227 16
R2228 2 RF7849
VM1 CPLIN_REF
U2202 15
3 51R
VM2 GND R2229
14
4
[2] W_PA_B8_EN VEN_LB RFOUT_HB
13
5
VEN_HB GND
1K 12
VM0 6

6
[2,9] RFIN_HB CPL
11

SAYRF1G95HQ0F0A
R2260 1K GND

GND

GND

GND

GND

ANT
G
C [2,9]
VM1
G
9 C
R2263 7
W_PA_B1_EN G 5
7

10

21
[2] G 4
G

U2201
2

RX
RX
TX
C2245 C2246 C2247
C2219 R2274

3
1
8
33PF
1nH

R2273
L2204

n.m
L2232 3.3nH
R2232 R2233 n.m C2222
PDET n.m
[8]
[8] W_PA_B1_IN 27R 27R
R2234 C2232
C2218 33R
4.3PF C2234
22PF
L2233 C2233
L2234 4.3PF
R2219 R2218
n.m n.m
R2224

R2226
n.m

n.m

3GB1_RXN
3GB1_RXP

[8]
[8]
R2276
R2275

n.m
n.m

B B
L2237
C2235 L2235 3GB8_RXP [8]
n.m 5.1nH U2204 6.2nH

9
7
5
4
2
L2236

G
G
G
G
G

L2239

n.m
RX 8
TRXB2 C2236 1 10nH
RX
[8] [8] TRXB8 6 3
ANT TX

C2248
33PF
L2238
SAYFH897MHC0F0A 3GB8_RXN [8]
6.2nH
L2213 W_PA_OUT_B8
[9]
C2249 n.m

W_PA_VCC
VBAT

C2242

6
C2226 C2224

ANT
G 9
R2271

U2203
G
n.m

7
C2251

C2225

C2258

G 5
1 VCC1 VCC2 10 G 4
G

U2205
n.m 2

RX
RX
TX
[8] W_PA_B2_IN 2 RF_IN RF_OUT 9

n.m

SAYRF1G88CA0B0A_NM
R2272

3
1
8
VM1 3 VMODE1/VBP GND/ISO 8
[2,9]
R2257

VM0 4 7
n.m

VMODE0 GND
[2,9]
R2261 R2262 W_PA_B2_EN 5 6 L2251
GND

VEN CPL
[2] C2259 n.m
n.m
L2212 n.m
11

C2240
L2210 C2244
L2211 C2243

A n.m n.m A
COMPANY:
Lenovo MIDH_Phone

TITLE:
3GB2_RXN
3GB2_RXP

Stella_MB_H101
DRAWN: DATED:
chengfei&fanpeng 20130422
[8]
[8]

CHECKED: DATED: CODE: SIZE: DRAWING NO: REV:

wangdj 20130425
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> D 22_RF_TX H101
RELEASED: DATED:
<Released By> <Release Date> SCALE:
<Scale> SHEET:
9 OF10
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D
U1201-F

[10] WB_RSTB AF6 WB_RSTB AVDD18_WBG AE4 AVDD18_WBG

XIN_WBG AD6 XO_IN [10] [10]

1
GPS_RXQN AF5 C2322
GPS_RX_QN[10] 100NF
AG5

2
GPS_RXQP GPS_RX_QP [10]
[10] FM_DATA Y10 F2W_DATA GPS_RXIN AG4 GPS_RX_IN [10]
AA10 F2W_CLK GPS_RXIP AF4 GPS_RX_IP [10]
[10] FM_CLK

[10] WB_SCLK AG7 WB_SCLK WB_TXQN AF2 WB_TX_QN [10]

[10] WB_SDATA AF7 WB_SDATA WB_TXQP AG2 WB_TX_QP [10]
AE6 WB_SEN WB_TXIN AF1 WB_TX_IN [10]
[10] WB_SEN
WB_TXIP AE1
WB_TX_IP [10]
[10] WB_CTRL0 Y6 WB_CRTL0 WB_RXQN AE2 WB_RX_QN [10]
[10] WB_CTRL1 AA6 WB_CRTL1 WB_RXQP AD2 WB_RX_QP [10]
[10] WB_CTRL2 AA5 WB_CRTL2 WB_RXIN AC2
7L26002015 U2303 WB_RX_IN [10]
[10] WB_CTRL3 AA4 WB_CRTL3 WB_RXIP AC1
VCN28_PMU WB_RX_IP [10]
0R [10] WB_CTRL4 AB5 WB_CRTL4
1 2 3 OUT VCC 4 AB4 ANT_SEL0 [10]
[10] WB_CTRL5 WB_CRTL5
R2306 ANT_SEL0 AB25 1 TP2301
ANT_SEL1 AC26 1 TP2302

1
2 GND VREF 1 AC25 1
ANT_SEL2 TP2303
[10] XO_IN
C2306 1UF MT6582
R2307

2
1 2 ANT_SEL1
MT6582
[3]
n.m
ANT_SEL2
[3]

CLK2_WCN [8]

RF pls check
C C
WIFI/BT/GPS Single ANT Ref. CON2301
ECT818000001 WB_CTRL3 [10]

WB_CTRL2[10]
6 G G 5 [10] WB_CTRL4
1 RX/TX

U2302
INT

WB_CTRL1[10]
G

6 GND WIFI 1 [10] WB_CTRL5

Close to MT6572
3

50 Ohm
1

0R R2331 WB_CTRL0[10]
1

ANT2302 5 ANT GND 2 1 2

ANT2301
50 Ohm R2302 R2303 C2304 0R
1 2 [3,10]VCN18_PMU WB_RX_IP[10]
+

R2316
R2322

4 GND GPS 3 [10]AVDD18_WBG 1 2

n.m

0R 50 Ohm VCN18_PMU

1
PESD5V0F1BL

L2301
0R C2320 C2321

2
2

2
18PF

n.m
C2314 C2315 WB_RX_IN[10]
C2302
T2301

DP1608-V1524CA C2331

2
n.m 100NF
C2301 100PF

2
1

1
n.m
C2312 100NF

1
30

29

28

27

26

25

24

23

22

21
C2305

W_LNA_EXT

AVDD18_WBT

WB_CTRL5

WB_CTRL4

WB_CTRL3

WB_CTRL2

WB_CTRL1

WB_CTRL0

WB_RX_IP

WB_RX_IN
R2301
1 2 WB_RX_QP [10]
WBG_ANT 50 Ohm 31 WB_GPS_RF_IN WB_RX_QP 20

WB_RX_QN [10]
32 GPS_DPX_RFOUT WB_RX_QN 19
[10] AVDD18_GPS R2318
1 2 VCN18_PMU
0R
[10] AVDD33_WB 33 AVDD33_WBT WB_TX_IP 18
WB_TX_IP[10]
C2318 C2319 Star Conn
Close to MT6625 100PF 4.7UF

50 Ohm
34 NC U2301 WB_TX_IN 17
WB_TX_IN[10]
for WB/GPS/WBG 1V8

35 16 [10]
WB_TX_QP
GPSµÄ
NC WB_TX_QP

2
VCN28_PMU

2
R2319
MT6627 C2313 4.7NF C2316

1
1 2 1UF

1
36 15 [10]
WB_TX_QN

2
0R AVDD28_FM WB_TX_QN
B C2317 10NF
B

1
FM FM_RX_N_6572
37 FM_LANT_N GPS_RX_IP 14 GPS_RX_IP [10]
[4]FM_RX_N_6572
L2302
[4] FM_ANT 2 1 FM_LANT_P
38 FM_LANT_P GPS_RX_IN 13 GPS_RX_IN [10]
82nH
1

L2303
n.m GPS_RFIN 50 Ohm 39 GPS_RFIN GPS_RX_QP 12 GPS_RX_QP [10]
2

[10] AVDD18_GPS
40 AVDD18_GPS GPS_RX_QN 11 GPS_RX_QN [10]

AVDD28_FSOURCE
41 DVSS

F2W_DATA

F2W_CLK
FM_DBG
HRST_B
R2351

SDATA
1 2

XO_IN
CEXT
SCLK
VCN18_PMU

SEN
n.m R2350
GPS VCN28_PMU 1 2 ANT_SEL0 [10]
MT6627 SMD QFN40
1

10
22nH
C2329 330PF
C2309 100NF
50 Ohm
Close to MT6627
[10] WB_RSTB
R2320
2

U2305
4

[10] AVDD33_WB 1 2 VCN33_PMU

XO_IN [10]
R2310

0R
VCC

ENABLE

0R
SAFEB1G57KE0F00R14
C2323
Close to ANT
1

2
C2334 C2324 C2310 C2311
U2304 L2304 [10] FM_DATA
1 4 1 2 3 6 1 2 1UF 100PF
IN OUT

1
RFIN BGU7005 RFOUT
GND

GND

GND

18PF 0R
NXP 18PF [10] FM_CLK
2
2
2

GND

GND

L2311
L2305

n.m

n.m
2

1
1

[10] WB_SCLK

A [10] WB_SDATA A
COMPANY:
[10] WB_SEN Lenovo MIDH_Phone
R2329 R2330
1 2 1 2 TITLE:

DRAWN: DATED:
Stella_MB_H101
chengfei&fanpeng 20130422
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
wangdj 20130425
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> D <Drawing Number> H101
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 10
OF 10