Acer Aspire e5-571g-39tx (z5wah La-b162p Rev 0.3) Схема

A B C D E
Compal Confidential
Model Name : Z5WAH
File Name : LA-B162P
1 1
Compal Confidential
2 2
EA50_HB M/B Schematics Document

Intel Broadwell ULT (Broadwell + Wildcat point)
Nvidia N15S-GT / N15V-GM / N15V-GL
3 2013-12-24 3
REV:0.2
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

2013/09/11 2013/09/24 Title
Issued Date Deciphered Date Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAH M/B LA-B162P
Date: Wednesday, January 08, 2014 Sheet 1 of 54
A B C D E
A B C D E
VGA eDP
LVDS LVDS-Translator
Fan Control
RTD2132R
page 24
page 36
page 28 page 25
Memory BUS 204pin DDR3L-SO-DIMM X1
BANK 0, 1, 2, 3 page 15
1 HDMI Conn. Dual Channel 1
DP to VGA
ITE IT6513FN eDP
Intel Broadwell ULT 1.35V DDR3L 1333/1600
page 27 204pin DDR3L-SO-DIMM X1
BANK 4, 5, 6, 7 page 16
DDI
DP x 2 lanes
page 26 Broadwell ULT
HDMI x 4 lanes
Processor USB 3.0 USB 2.0
conn x1 conn x2 CMOS
OPI USB port 0 USB/B (port 1,2) Camera
Nvidia N15x USB port 7
with DDR3 x4 or 8
page 31 page 17~23
MINI Card Finger
WLAN PCIe 2.0 PCIe 2.0 x4
USB port 4 5GT/s 5GT/s Print
2
port 4 port 5
Wildcat point USB (port 5)
2
Flexible IO
page 33 page 33 page 25 page 33
PCH
PCIe 2.0 48MHz
5GT/s USBx8
SATA3.0 SATA3.0
port 3 6.0 Gb/s 6.0 Gb/s
port 0 port 1 HD Audio 3.3V 24MHz
Touch
LAN(GbE)/ Card Reader SATA HDD SATA CDROM Screen
Conn. Conn. HDA Codec I2C (PORT1)
Realtek 8411B 1168pin BGA USB (port 6)
page 29 ALC283
page 04~14 page 36 page 25
SPI
Card Reader RJ45 conn.

3 2 in 1 (SD) LPC BUS 3
page 32 page 32 SPI ROM x2 Int. Speaker Int. MIC Combo Jack
CLK=24MHz
page 7
page 30 ENE page 36 page 36 page 36
page 30 KB9012/9022
page 34
RTC CKT. Sub Board

page 6
LS-B161P Touch Pad Int.KBD
PS2 / I2C
PWR/B
Power On/Off CKT. page 33
page 35
page 35 page 35
LS-B162P
USB/B (port 1,2)
4
DC/DC Interface CKT. 4
page 33
page 38
LS-B163P Security Classification Compal Secret Data Compal Electronics, Inc.

2013/09/11 2013/09/24 Title
Power Circuit DC/DC BATT/B (UMA)
Issued Date Deciphered Date Block Diagrams
page 39~50 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A B C D E
A B C D E
SIGNAL
Voltage Rails STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Power Plane Description S1 S3 S5 Full ON HIGH HIGH HIGH HIGH ON ON ON ON

VIN Adapter power supply (19V) N/A N/A N/A
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
BATT+ Battery power supply (12.6V) N/A N/A N/A
B+ AC or battery power rail for power circuit. N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
+CPU_CORE Core voltage for CPU ON OFF OFF
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
1
+VGA_CORE Core voltage for GPU ON OFF OFF 1
+0.675VS +0.675VS power rail for DDR3L terminator ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.05VS_VTT +1.05V power rail for CPU ON OFF OFF
Board ID / SKU ID Table for AD channel
+1.05VSDGPU +1.05VSDGPU switched power rail for GPU ON OFF OFF
+1.35V +1.35V power rail for DDR3L ON ON OFF
Vcc 3.3V +/- 5%
+1.5VSDGPU +1.5VSDGPU power rail for GPU ON OFF OFF
Ra/Rc/Re 100K +/- 5%
Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+1.5VS +1.5V power rail for CPU ON OFF OFF
+3VALW +3VALW always on power rail ON ON ON*
0 0 0 V 0 V 0 V
+3VLP B+ to +3VLP power rail for suspend power ON ON ON
1 12K +/- 5% 0.347 V 0.354 V 0.360 V
+3VS +3VALW to +3VS power rail ON OFF OFF
2 15K +/- 5% 0.423 V 0.430 V 0.438 V
+3VSDGPU +3VS to +3VSDGPU power rail for GPU ON OFF OFF
3 20K +/- 5% 0.541 V 0.550 V 0.559 V
+5VALW +5VALWP to +5VALW power rail ON ON ON*
4 27K +/- 5% 0.691 V 0.702 V 0.713 V
+5VS +5VALW to +5VS power rail ON OFF OFF
5 33K +/- 5% 0.807 V 0.819 V 0.831 V
+RTCVCC RTC power ON ON ON
6 43K +/- 5% 0.978 V 0.992 V 1.006 V
7 56K +/- 5% 1.169 V 1.185 V 1.200 V
8 75K +/- 5% 1.398 V 1.414 V 1.430 V
9 100K +/- 5% 1.634 V 1.650 V 1.667 V
2 2
10 130K +/- 5% 1.849 V 1.865 V 1.881 V
11 160K +/- 5% 2.015 V 2.031 V 2.046 V
12 200K +/- 5% 2.185 V 2.200 V 2.215 V
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
13 240K +/- 5% 2.316 V 2.329 V 2.343 V
EC SM Bus1 address EC SM Bus2 address USB Port Table BTO Option Table
Device Address Device Address
3 External BTO Item BOM Structure
USB 2.0 Port
USB Port Unpop @
Smart Battery 0001 011X On Board Thermal Senser 0100 110x
VGA Internal Thermal Senser 0100 000x
0 USB Port(Left 3.0) Connector CONN@
G Senser 0011 000x
1 USB Port(Right 2.0) EC 9022 9022@
2 USB Port(Right 2.0) EC 9012 9012@
PCH SM Bus address 3 UMA Component UMA@
EHCI1
4 Mini Card (WLAN+BT) GPU VGA@
Device Address
ChannelA DIMM0 1010 0000 JDIMM1
5 Touch Screen VRAM x 8pcs 128@
ChannelB DIMM1 1010 0010 JDIMM2
6 Camera EDP panel EDP@
3 7 Finger Print eDP to LVDS LVDS@ 3
USB 3.0 Port EMC Component EMC@

0 USB Port(Left 3.0) EMC Reserve XEMC@
1 On Board HDD HDD@
XHCI
2 G-Sensor BA@
3 TPM Module BA@
Redriver HDD BA@
BOARD ID Table Touch Screen TS@
DGPU_IDEN VGL@, VGM@, SGT@
Board ID PCB Revision CPU_IDEN HW@, BW@
0 0.1 GC6 2.0 GC6@
1 0.2 non GC6 NGC6@
2 0.3 One DMIC EA50@
3 0.4 Two DMIC EA54@
4 0.5 VRAM Selection X76@
5 1.0
4 6 4

2013/09/11 2013/09/24 Title
Issued Date Deciphered Date Notes List
A B C D E
5 4 3 2 1
U1 U1 AAA1
CPU Haswell InteI I5-4200U 1.6G CPU Haswell Intel I3-4010U 1.7G PCB 154 LA-B162P REV0 M/B
4200@ 4010@ @
SA00006SMB0 SA00006SX70 DA60014P000
U1 U1
HASWELL_MCP_E
U1A
D D
CPU Haswell Intel I7-4500U 1.8G CPU_Haswell intel I3-4158U 2G C54 C45
<27> CPU_DP1_N0 DDI1_TXN0 EDP_TXN0 EDP_TXN0 <25>
4500@ 4158@ C55 B46
SA00006SLB0 SA00006VW40
<27>
<27>
CPU_DP1_P0
CPU_DP1_N1
B58 DDI1_TXP0
DDI1_TXN1
EDP_TXP0
EDP_TXN1
A47
EDP_TXP0
EDP_TXN1
<25>
<25>
eDP Panel
C58 B47
U1 DP to CRT <27> CPU_DP1_P1
B55 DDI1_TXP1
DDI1_TXN2
EDP_TXP1 EDP_TXP1 <25>
A55 C47
A57 DDI1_TXP2 EDP_TXN2 C46
B57 DDI1_TXN3 EDP_TXP2 A49
DDI1_TXP3 DDI EDP EDP_TXN3 B49
C51 EDP_TXP3
<26> CPU_DP2_N0 DDI2_TXN0
CPU_Haswell intel I7-4550U 1.5G C50 A45 EDP_AUXN <25>
<26> CPU_DP2_P0 DDI2_TXP0 EDP_AUXN
4550@ C53 B45 EDP_AUXP <25>
<26> CPU_DP2_N1 DDI2_TXN1 EDP_AUXP
SA00006SJ40 B54
HDMI <26>
<26>
CPU_DP2_P1
CPU_DP2_N2
C49 DDI2_TXP1
DDI2_TXN2 EDP_RCOMP
D20 EDP_COMP R1 1 2 24.9_0402_1% +VCCIOA_OUT
B50 A43 Trace width=20 mils,Spacing=25mil,Max length=100mils
<26> CPU_DP2_P2 DDI2_TXP2 EDP_DISP_UTIL
A53
<26> CPU_DP2_N3 DDI2_TXN3
B53
<26> CPU_DP2_P3 DDI2_TXP3 EDP_DISP_UTIL <25>
1 OF 19 Rev1p2
HASWELL-MCP-E-ULT_BGA1168
@
C C
HASWELL_MCP_E
U1B
C94 1 2 6.8P_0402_50V8C
XEMC@ T20 @ D61
T2 @ K61 PROC_DETECT MISC
N62 CATERR J62 XDP_PRDY#_R @ T157
+1.35V <34> H_PECI PECI PRDY K62 XDP_PREQ#_R @ T158
2 1 R68 R8 JTAG
PREQ E60 XDP_TCK_R @ T159
+1.05VS_VTT PROC_TCK
62_0402_5% 56_0402_5% E61 XDP_TMS_R @ T160
1 2 H_PROCHOT#_R K63 PROC_TMS E59 XDP_TRST#_R @ T161
<34,39> H_PROCHOT# PROCHOT PROC_TRST
THERMAL F63 XDP_TDI_R @ T162
PROC_TDI
1
C95 1 2 6.8P_0402_50V8C F62 XDP_TDO_R @ T163

R184 XEMC@ PROC_TDO
470_0603_5% R6 1 2 10K_0402_5% H_CPUPWRGD C61
PROCPWRGD PWR
C60 1 2 6.8P_0402_50V8C J60 XDP_BPM#0_R @ T164
2
XEMC@ BPM#0 H60 XDP_BPM#1_R @ T165

DIMM_DRAMRST# <15,16> BPM#1 H61 @ T148
BPM#2 H62 @ T149
2 BPM#3
DDR3 Compensation Signals R11 1 2 200_0402_1% SM_RCOMP0 AU60 K59 @ T150
C96 R13 1 2 120_0402_1% SM_RCOMP1 AV60 SM_RCOMP0 DDR3 BPM#4 H63 @ T151
Trace width=12~15 mil, Spcing=20 mils R41 1 2 100_0402_1% SM_RCOMP2 AU61 SM_RCOMP1 BPM#5 K60 @ T152
6.8P_0402_50V8C SM_RCOMP2 BPM#6
1
XEMC@
Max trace length= 500 mil DIMM_DRAMRST# AV15 J61 @ T153
DDR_PG_CTRL AV61 SM_DRAMRST BPM#7
<15> DDR_PG_CTRL SM_PG_CNTL1
B Close to AV15 B
2 OF 19 Rev1p2
@
A A

2013/09/11 2013/09/24 Title
Issued Date Deciphered Date BDW MCP(1/11) DDI,MSIC,XDP
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Z5WAH M/B LA-B162P
5 4 3 2 1
5 4 3 2 1
D D
HASWELL_MCP_E HASWELL_MCP_E
U1C U1D
DDR_A_D0 AH63 AU37

SA_DQ0 SA_CLK#0 SA_CLK_DDR#0 <15>
DDR_A_D1 AH62 AV37 DDR_B_D0 AY31 AM38
SA_DQ1 SA_CLK0 SA_CLK_DDR0 <15> SB_DQ0 SB_CK#0 SB_CLK_DDR#0 <16>
DDR_A_D2 AK63 AW36 DDR_B_D1 AW31 AN38
SA_DQ2 SA_CLK#1 SA_CLK_DDR#1 <15> SB_DQ1 SB_CK0 SB_CLK_DDR0 <16>
DDR_A_D3 AK62 AY36 DDR_B_D2 AY29 AK38
SA_DQ3 SA_CLK1 SA_CLK_DDR1 <15> SB_DQ2 SB_CK#1 SB_CLK_DDR#1 <16>
DDR_A_D4 AH61 DDR_B_D3 AW29 AL38
SA_DQ4 SB_DQ3 SB_CK1 SB_CLK_DDR1 <16>
DDR_A_D5 AH60 AU43 DDR_B_D4 AV31
SA_DQ5 SA_CKE0 DDRA_CKE0_DIMMA <15> SB_DQ4
DDR_A_D6 AK61 AW43 DDR_B_D5 AU31 AY49
SA_DQ6 SA_CKE1 DDRA_CKE1_DIMMA <15> SB_DQ5 SB_CKE0 DDRB_CKE0_DIMMB <16>
DDR_A_D7 AK60 AY42 DDR_B_D6 AV29 AU50
SA_DQ7 SA_CKE2 SB_DQ6 SB_CKE1 DDRB_CKE1_DIMMB <16>
DDR_A_D8 AM63 AY43 DDR_B_D7 AU29 AW49
DDR_A_D9 AM62 SA_DQ8 SA_CKE3 DDR_B_D8 AY27 SB_DQ7 SB_CKE2 AV50
DDR_A_D10 AP63 SA_DQ9 AP33 DDR_B_D9 AW27 SB_DQ8 SB_CKE3
SA_DQ10 SA_CS#0 DDRA_CS0_DIMMA# <15> SB_DQ9
DDR_A_D11 AP62 AR32 DDR_B_D10 AY25 AM32
SA_DQ11 SA_CS#1 DDRA_CS1_DIMMA# <15> SB_DQ10 SB_CS#0 DDRB_CS0_DIMMB# <16>
DDR_A_D12 AM61 DDR_B_D11 AW25 AK32
SA_DQ12 SB_DQ11 SB_CS#1 DDRB_CS1_DIMMB# <16>
DDR_A_D13 AM60 AP32 DDRA_ODT0 @ T4 DDR_B_D12 AV27
DDR_A_D14 AP61 SA_DQ13 SA_ODT0 DDR_B_D13 AU27 SB_DQ12 AL32 DDRB_ODT0 @ T5
DDR_A_D15 AP60 SA_DQ14 AY34 DDR_B_D14 AV25 SB_DQ13 SB_ODT0
SA_DQ15 SA_RAS DDR_A_RAS# <15> SB_DQ14
DDR_A_D16 AP58 AW34 DDR_B_D15 AU25 AM35
SA_DQ16 SA_WE DDR_A_WE# <15> SB_DQ15 SB_RAS DDR_B_RAS# <16>
DDR_A_D17 AR58 AU34 DDR_B_D16 AM29 AK35
SA_DQ17 SA_CAS DDR_A_CAS# <15> SB_DQ16 SB_WE DDR_B_WE# <16>
DDR_A_D18 AM57 DDR_B_D17 AK29 AM33
SA_DQ18 SB_DQ17 SB_CAS DDR_B_CAS# <16>
DDR_A_D19 AK57 AU35 DDR_B_D18 AL28
SA_DQ19 SA_BA0 DDR_A_BS0 <15> SB_DQ18
DDR_A_D20 AL58 AV35 DDR_B_D19 AK28 AL35
SA_DQ20 SA_BA1 DDR_A_BS1 <15> SB_DQ19 SB_BA0 DDR_B_BS0 <16>
DDR_A_D21 AK58 AY41 DDR_B_D20 AR29 AM36
SA_DQ21 SA_BA2 DDR_A_BS2 <15> SB_DQ20 SB_BA1 DDR_B_BS1 <16>
DDR_A_D22 AR57 DDR_B_D21 AN29 AU49
SA_DQ22 SB_DQ21 SB_BA2 DDR_B_BS2 <16>
DDR_A_D23 AN57 AU36 DDR_A_MA0 DDR_B_D22 AR28
DDR_A_D24 AP55 SA_DQ23 SA_MA0 AY37 DDR_A_MA1 DDR_B_D23 AP28 SB_DQ22 AP40 DDR_B_MA0
DDR_A_D25 AR55 SA_DQ24 SA_MA1 AR38 DDR_A_MA2 DDR_B_D24 AN26 SB_DQ23 SB_MA0 AR40 DDR_B_MA1
DDR_A_D26 AM54 SA_DQ25 SA_MA2 AP36 DDR_A_MA3 DDR_B_D25 AR26 SB_DQ24 SB_MA1 AP42 DDR_B_MA2
DDR_A_D27 AK54 SA_DQ26 SA_MA3 AU39 DDR_A_MA4 DDR_B_D26 AR25 SB_DQ25 SB_MA2 AR42 DDR_B_MA3
C DDR_A_D28 AL55 SA_DQ27 SA_MA4 AR36 DDR_A_MA5 DDR_B_D27 AP25 SB_DQ26 SB_MA3 AR45 DDR_B_MA4 C
DDR_A_D29 AK55 SA_DQ28 SA_MA5 AV40 DDR_A_MA6 DDR_B_D28 AK26 SB_DQ27 SB_MA4 AP45 DDR_B_MA5
DDR_A_D30 AR54 SA_DQ29 SA_MA6 AW39 DDR_A_MA7 DDR_B_D29 AM26 SB_DQ28 SB_MA5 AW46 DDR_B_MA6
DDR_A_D31 AN54 SA_DQ30 SA_MA7 AY39 DDR_A_MA8 DDR_B_D30 AK25 SB_DQ29 SB_MA6 AY46 DDR_B_MA7
DDR_A_D32 AY58 SA_DQ31 SA_MA8 AU40 DDR_A_MA9 DDR_B_D31 AL25 SB_DQ30 SB_MA7 AY47 DDR_B_MA8
DDR_A_D33 AW58 SA_DQ32 SA_MA9 AP35 DDR_A_MA10 DDR_B_D32 AY23 SB_DQ31 SB_MA8 AU46 DDR_B_MA9
DDR_A_D34 AY56 SA_DQ33 SA_MA10 AW41 DDR_A_MA11 DDR_B_D33 AW23 SB_DQ32 SB_MA9 AK36 DDR_B_MA10
DDR_A_D35 AW56 SA_DQ34 DDR CHANNEL A SA_MA11 AU41 DDR_A_MA12 DDR_B_D34 AY21 SB_DQ33 DDR CHANNEL B SB_MA10 AV47 DDR_B_MA11
DDR_A_D36 AV58 SA_DQ35 SA_MA12 AR35 DDR_A_MA13 DDR_B_D35 AW21 SB_DQ34 SB_MA11 AU47 DDR_B_MA12
DDR_A_D37 AU58 SA_DQ36 SA_MA13 AV42 DDR_A_MA14 DDR_B_D36 AV23 SB_DQ35 SB_MA12 AK33 DDR_B_MA13
DDR_A_D38 AV56 SA_DQ37 SA_MA14 AU42 DDR_A_MA15 DDR_B_D37 AU23 SB_DQ36 SB_MA13 AR46 DDR_B_MA14
DDR_A_D39 AU56 SA_DQ38 SA_MA15 DDR_B_D38 AV21 SB_DQ37 SB_MA14 AP46 DDR_B_MA15
DDR_A_D40 AY54 SA_DQ39 AJ61 DDR_A_DQS#0 DDR_B_D39 AU21 SB_DQ38 SB_MA15
DDR_A_D41 AW54 SA_DQ40 SA_DQSN0 AN62 DDR_A_DQS#1 DDR_B_D40 AY19 SB_DQ39 AW30 DDR_B_DQS#0
DDR_A_D42 AY52 SA_DQ41 SA_DQSN1 AM58 DDR_A_DQS#2 DDR_B_D41 AW19 SB_DQ40 SB_DQSN0 AV26 DDR_B_DQS#1
DDR_A_D43 AW52 SA_DQ42 SA_DQSN2 AM55 DDR_A_DQS#3 DDR_B_D42 AY17 SB_DQ41 SB_DQSN1 AN28 DDR_B_DQS#2
DDR_A_D44 AV54 SA_DQ43 SA_DQSN3 AV57 DDR_A_DQS#4 DDR_B_D43 AW17 SB_DQ42 SB_DQSN2 AN25 DDR_B_DQS#3
DDR_A_D45 AU54 SA_DQ44 SA_DQSN4 AV53 DDR_A_DQS#5 DDR_B_D44 AV19 SB_DQ43 SB_DQSN3 AW22DDR_B_DQS#4
DDR_A_D46 AV52 SA_DQ45 SA_DQSN5 AL43 DDR_A_DQS#6 DDR_B_D45 AU19 SB_DQ44 SB_DQSN4 AV18 DDR_B_DQS#5
DDR_A_D47 AU52 SA_DQ46 SA_DQSN6 AL48 DDR_A_DQS#7 DDR_B_D46 AV17 SB_DQ45 SB_DQSN5 AN21 DDR_B_DQS#6
DDR_A_D48 AK40 SA_DQ47 SA_DQSN7 DDR_B_D47 AU17 SB_DQ46 SB_DQSN6 AN18 DDR_B_DQS#7
DDR_A_D49 AK42 SA_DQ48 AJ62 DDR_A_DQS0 DDR_B_D48 AR21 SB_DQ47 SB_DQSN7
DDR_A_D50 AM43 SA_DQ49 SA_DQSP0 AN61 DDR_A_DQS1 DDR_B_D49 AR22 SB_DQ48 AV30 DDR_B_DQS0
DDR_A_D51 AM45 SA_DQ50 SA_DQSP1 AN58 DDR_A_DQS2 DDR_B_D50 AL21 SB_DQ49 SB_DQSP0 AW26 DDR_B_DQS1
DDR_A_D52 AK45 SA_DQ51 SA_DQSP2 AN55 DDR_A_DQS3 DDR_B_D51 AM22 SB_DQ50 SB_DQSP1 AM28 DDR_B_DQS2
DDR_A_D53 AK43 SA_DQ52 SA_DQSP3 AW57 DDR_A_DQS4 DDR_B_D52 AN22 SB_DQ51 SB_DQSP2 AM25 DDR_B_DQS3
DDR_A_D54 AM40 SA_DQ53 SA_DQSP4 AW53 DDR_A_DQS5 DDR_B_D53 AP21 SB_DQ52 SB_DQSP3 AV22 DDR_B_DQS4
DDR_A_D55 AM42 SA_DQ54 SA_DQSP5 AL42 DDR_A_DQS6 DDR_B_D54 AK21 SB_DQ53 SB_DQSP4 AW18 DDR_B_DQS5
DDR_A_D56 AM46 SA_DQ55 SA_DQSP6 AL49 DDR_A_DQS7 DDR_B_D55 AK22 SB_DQ54 SB_DQSP5 AM21 DDR_B_DQS6
DDR_A_D57 AK46 SA_DQ56 SA_DQSP7 DDR_B_D56 AN20 SB_DQ55 SB_DQSP6 AM18 DDR_B_DQS7
DDR_A_D58 AM49 SA_DQ57 AP49 DDR_B_D57 AR20 SB_DQ56 SB_DQSP7
SA_DQ58 SM_VREF_CA SM_DIMM_VREFCA <15> SB_DQ57
DDR_A_D59 AK49 AR51 DDR_B_D58 AK18
SA_DQ59 SM_VREF_DQ0 SA_DIMM_VREFDQ <15> SB_DQ58
DDR_A_D60 AM48 AP51 DDR_B_D59 AL18
SA_DQ60 SM_VREF_DQ1 SB_DIMM_VREFDQ <16> SB_DQ59
B DDR_A_D61 AK48 DDR_B_D60 AK20 B
SA_DQ61 SB_DQ60 <16> DDR_B_D[0..63]
DDR_A_D62 AM51 DDR_B_D61 AM20
DDR_A_D63 AK51 SA_DQ62 DDR_B_D62 AR18 SB_DQ61
SA_DQ63 SB_DQ62 <16> DDR_B_MA[0..15]
DDR_B_D63 AP18
SB_DQ63
<16> DDR_B_DQS#[0..7]
<15> DDR_A_D[0..63]
<16> DDR_B_DQS[0..7]
<15> DDR_A_MA[0..15]
<15> DDR_A_DQS#[0..7]
<15> DDR_A_DQS[0..7]
3 OF 19 Rev1p2 4 OF 19 Rev1p2
HASWELL-MCP-E-ULT_BGA1168 HASWELL-MCP-E-ULT_BGA1168
@ @
A A

2013/09/11 2013/09/24 Title
Issued Date Deciphered Date BDW MCP(2/11) DDRIII
Z5WAH M/B LA-B162P
5 4 3 2 1
5 4 3 2 1
PCH_RTCX1
1 2 PCH_RTCX2
R101 10M_0402_5%
Y1
32.768KHZ_12.5PF_Q13FC135000040
2 1
D D
15P_0402_50V8J
18P_0402_50V8J
1 1
C153 C154
2 2
DVT modify 11/27

TXC recommend from 18P change to 15P
HASWELL_MCP_E
U1E
+RTCVCC
1
C149
+RTCVCC 1U_0402_6.3V6K ME CMOS PCH_RTCX1 AW5
PCH_RTCX2 AY5 RTCX1
R69 2 R72 1 2 1M_0402_5% SM_INTRUDER# AU6 RTCX2 J5
+RTCVCC INTRUDER SATA_RN0/PERN6_L3 SATA_PRX_DTX_N0 <32>
20K_0402_1% PCH_INTVRMEN AV7 RTC H5
1 2 PCH_SRTCRST# AV6 INTVRMEN
SRTCRST
SATA_RP0/PERP6_L3
SATA_TN0/PETN6_L3
B15
SATA_PRX_DTX_P0
SATA_PTX_DRX_N0
<32>
<32>
HDD
1 2 PCH_RTCRST# AU7 A15
RTCRST SATA_TP0/PETP6_L3 SATA_PTX_DRX_P0 <32>
PCH_INTVRMEN R73 1 2 330K_0402_5% R70
R74 1 @ 2 330K_0402_5% 20K_0402_1% 1 J8 SATA_PRX_DTX_N1 <32>
D SATA_RN1/PERN6_L2
1
C150 Q52 H8 SATA_PRX_DTX_P1 <32>
1U_0402_6.3V6K JME1 <34> 2 L2N7002LT1G_SOT23-3 SATA_RP1/PERP6_L2 A17
INTVRMEN
* H：Integrated VRM enable SHORT PADS
EC_RTCRST#
G @ SATA_TN1/PETN6_L2 B17
SATA_PTX_DRX_N1
SATA_PTX_DRX_P1
<32>
<32>
ODD
1
2 CMOS DVT modify 11/12 SATA_TP1/PETP6_L2
L：Integrated VRM disable @ S
3
add Q19 for EC_RTCRST# HDA_BIT_CLK AW8 J6
pull low on EC side HDA_SYNC AV11 HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 H6
HDA_RST# AU8 HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 B14
HDA_SDIN0 AY10 HDA_RST/I2S_MCLK SATA_TN2/PETN6_L1 C15
<36> HDA_SDIN0 HDA_SDI0/I2S0_RXD SATA_TP2/PETP6_L1
RTCRST close RAM door T6 @ AU12 AUDIO SATA
C HDA_SDOUT AU11 HDA_SDI1/I2S1_RXD F5 C
HDA for AUDIO ME Debug T7 @ AW10 HDA_SDO/I2S0_TXD
HDA_DOCK_EN/I2S1_TXD
SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0
E5
<34> HDA_SDO R122 1 @ 2 0_0402_5% T8 @ AV10 C17
T9 @ AY8 HDA_DOCK_RST/I2S1_SFRM SATA_TN3/PETN6_L0 D17
RP14 EMC@ I2S1_SCLK SATA_TP3/PETP6_L0
<36> HDA_SDOUT_AUDIO 1 8 HDA_SDOUT
<36> HDA_RST_AUDIO# 2 7 HDA_RST# V1 PCH_GPIO34 PCH_GPIO34 <9>
3 6 HDA_SYNC SATA0GP/GPIO34 U1 PCH_GPIO35
<36> HDA_SYNC_AUDIO SATA1GP/GPIO35 PCH_GPIO35 <9> +1.05VS_ASATA3PLL
<36> HDA_BITCLK_AUDIO 4 5 HDA_BIT_CLK V6 PCH_GPIO36
SATA2GP/GPIO36 PCH_GPIO36 <9>
AC1 PCH_GPIO37
SATA3GP/GPIO37 PCH_GPIO37 <9>
33_0804_8P4R_5% T95 PCH_JTAG_RST#
@ AU62
51_0402_5% 1 @ 2 R97 PCH_JTAG_TCK AE62 PCH_TRST A12 SATA_IREF R75 1 @ 2 0_0603_5%
T21 @ PCH_JTAG_TDI AD61 PCH_TCK SATA_IREF L11 @ T13
T19 @ PCH_JTAG_TDO AE61 PCH_TDI RSVD K10 @ T14
T15 @ PCH_JTAG_TMS AD62 PCH_TDO JTAG RSVD C12 SATA_RCOMP R2 1 2 3.01K_0402_1%
T10 @ AL11 PCH_TMS SATA_RCOMP U3 R10 1 2
RSVD SATALED +3VS
T11 @ AC4 10K_0402_5%
T22 @ PCH_TCK_JTAGX AE63 RSVD
JTAGX SATA_RCOMP, IREF
T12 @ AV2
RSVD Trace width=12~15 mil, Spcing=12 mils
Max trace length= 500 mil
W=20mils trace width 10mil W=20mils 5 OF 19 Rev1p2

+RTCBATT +CHGRTC +RTCVCC @
D23
2
B BAS40-04_SOT23-3 1 B
C151
0.1U_0402_16V4Z
2
+RTCBATT
+RTCBATT
2
+CHGRTC
R446
+
1K_0402_5%
@
3 1
+RTCBATT_R
2
20mil
20mil
+RTCVCC
D32
1
CHN202UPT_SC70-3 JBATT1
-
1 @ LOTES_AAA-BAT-054-K01
2
C168 CONN@
0.1U_0402_16V4Z SP07000H700
@
2
A A

2013/09/11 2013/09/24 Title
Issued Date Deciphered Date BDW MCP(3/11) RTC,SATA,XDP
Z5WAH M/B LA-B162P
5 4 3 2 1
5 4 3 2 1
HASWELL_MCP_E
U1F
XTAL24_IN C43 A25 XTAL24_IN

C42 CLKOUT_PCIE_N0 XTAL24_IN B25 XTAL24_OUT
2 1 XTAL24_OUT PCH_GPIO18 U2 CLKOUT_PCIE_P0 XTAL24_OUT
<9> PCH_GPIO18 PCIECLKRQ0/GPIO18
1M_0402_5% R48 K21 @ T16
B41 RSVD M21 @ T17
Y2 A41 CLKOUT_PCIE_N1 RSVD C26 XCLK_BIASREF R78 1 2 3.01K_0402_1%
CLKOUT_PCIE_P1 DIFFCLK_BIASREF +1.05VS_AXCK_LCPLL
24MHZ_12PF_X3G024000DC1H PCH_GPIO19 Y5
1 3 C35 R140 1 2 10K_0402_5%
D TESTLOW_C35 D
2 4 CLK_PCIE_LAN# C41 CLOCK C34 R141 1 2 10K_0402_5%
<29> CLK_PCIE_LAN# CLKOUT_PCIE_N2 TESTLOW_C34
CLK_PCIE_LAN B42 AK8 R142 1 2 10K_0402_5%
PCIE LAN <29> CLK_PCIE_LAN CLKOUT_PCIE_P2 TESTLOW_AK8
1
1
+3VS R52 1 2 10K_0402_5% AD1 SIGNALS AL8 R148 1 2 10K_0402_5%
C2 C3 PCIECLKRQ2/GPIO20 TESTLOW_AL8
<29> LAN_CLKREQ#
15P_0402_50V8J 15P_0402_50V8J CLK_PCIE_MINI1# B38 AN15 CLKOUT_LPC0 R390 2 EMC@ 1 22_0402_5%
<31> CLK_PCIE_MINI1# CLK_PCI_LPC <34>
2
CLK_PCIE_MINI1 C37 CLKOUT_PCIE_N3 CLKOUT_LPC_0 AP15 CLKOUT_LPC1 R395 2 BA@ 1 22_0402_5%

<31> CLK_PCIE_MINI1 CLKOUT_PCIE_P3 CLKOUT_LPC_1 CLK_PCI_TPM <35>
MINI1_CLKREQ# N1
DVT modify 11/27

WLAN <31,8> MINI1_CLKREQ# PCIECLKRQ3/GPIO21
CLKOUT_ITPXDP_N
B35 CLK_BCLK_ITP# @ T184
CLK_PEG_VGA# A39 A35 CLK_BCLK_ITP @ T183
TXC recommend from 10P change to 15P <17> CLK_PEG_VGA# CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P
CLK_PEG_VGA B39
<17> CLK_PEG_VGA CLKOUT_PCIE_P4
VGA_CLKREQ# U5
VGA PCIECLKRQ4/GPIO22
B37
A37 CLKOUT_PCIE_N5
PCH_GPIO23 T2 CLKOUT_PCIE_P5
6 OF 19 Rev1p2
@
HASWELL_MCP_E
U1G
LPC_AD0 AU14 AN2 PCH_GPIO11

+3VS <34,35> LPC_AD0 LAD0 SMBALERT/GPIO11 PCH_GPIO11 <9>
LPC_AD1 AW12 AP2 PCH_SMBCLK
<34,35> LPC_AD1 LAD1 LPC SMBCLK PCH_SMBCLK <31>
LPC_AD2 AY12 AH1 PCH_SMBDATA
<38,49,8,9> DGPU_PWR_EN <34,35> LPC_AD2 LAD2 SMBDATA PCH_SMBDATA <31>
LPC_AD3 AW11 AL2 PCH_GPIO60
<34,35> LPC_AD3 LAD3 SML0ALERT/GPIO60 PCH_GPIO60 <9>
1
LPC_FRAME# AV12 SMBUS AN1 SML0CLK +3VALW_PCH

<34,35> LPC_FRAME# LFRAME SML0CLK
R115 AK1 SML0DATA
VGA@ 10K_0402_5% SML0DATA AU4 PCH_GPIO73
SML1ALERT/PCHHOT/GPIO73 PCH_GPIO73 <9>
2
G
L2N7002LT1G_SOT23-3 Q2 AU3 SML1CLK SML0CLK RP8 1 8 2.2K_0804_8P4R_5%

SML1CLK/GPIO75 AH3 SML1DATA PCH_SMBCLK 2 7
Pull high @ VGA side
2
3 1 VGA_CLKREQ# PCH_SPI_CLK AA3 SML1DATA/GPIO74 PCH_SMBDATA 3 6

C <17> PEG_CLKREQ# SPI_CLK C
PCH_SPI_CS0# Y7 AF2 @ T23 SML0DATA 4 5
S
SPI_CS0 CL_CLK
1
PCH_SPI_CS1# Y4 AD2 @ T24

R107 R112 AC2 SPI_CS1 SPI C-LINK CL_DATA AF4 @ T25 SML1CLK R114 1 2 2.2K_0402_5%
2.2K_0402_5% 2.2K_0402_5% PCH_SPI_MOSI AA2 SPI_CS2 CL_RST SML1DATA R113 1 2 2.2K_0402_5%
@ @ PCH_SPI_MISO AA4 SPI_MOSI
PCH_SPI_WP1# Y6 SPI_MISO
2
PCH_SPI_HOLD1# AF1 SPI_IO2

SPI_IO3
7 OF 19 Rev1p2
@
+3V_SPI for Share EC ROM, +3VS change to +3VALW
R105 1 2 1K_0402_5% PCH_SPI_IO2_1 R126
R106 1 2 1K_0402_5% PCH_SPI_IO3_1 +3V_SPI +3V_SPI 1 2 0_0402_5% +3VALW
R123
+3V_SPI 1 @ 2 0_0402_5% +3VS
R103 1 @ 2 1K_0402_5% PCH_SPI_HOLD1#
R102 1 @ 2 1K_0402_5% PCH_SPI_WP1# SPI ROM ( 8MByte ) +3VS
2ROM pop
C66 1 2 +3VS
2
U6 RP19
PCH_SPI_CS0# 1 8 0.1U_0402_16V4Z PCH_SPI_MISO_1 1 8 PCH_SPI_MISO R116 R119
PCH_SPI_MISO_1 2 CS# VCC 7 PCH_SPI_IO3_1 PCH_SPI_IO3_1 2 7 PCH_SPI_HOLD1# SPI ROM Q7A 4.7K_0402_5% 4.7K_0402_5%
DO(IO1) HOLD#(IO3)
2
PCH_SPI_WP1# 2 1 PCH_SPI_IO2_1 3 6 PCH_SPI_CLK_1 PCH_SPI_CLK_1 3 6 PCH_SPI_CLK DMN66D0LDW-7_SOT363-6
R108 15_0402_5% 4 WP#(IO2) CLK 5 PCH_SPI_MOSI_1 PCH_SPI_MOSI_1 4 5 PCH_SPI_MOSI
1
B GND DI(IO0) PCH_SMBDATA 6 1 D_CK_SDATA B
D_CK_SDATA <15,16,37>
EN25QH64-104HIP_SO8 15_0804_8P4R_5%
5
DDR, G‐sensor
PCH_SMBCLK 3 4 D_CK_SCLK D_CK_SCLK <15,16,37>
Reserve for EMI(Near SPI ROM)
C152 PCH_SPI_MOSI_1 R498 1 2 0_0402_5% EC_SPI_SO <34> Q7B
10P_0402_50V8J PCH_SPI_CLK_1 R500 1 2 0_0402_5% From EC DMN66D0LDW-7_SOT363-6
EC_SPI_CLK <34>
1 2 2 1 PCH_SPI_CLK_1 PCH_SPI_MISO_1 R502 1 2 0_0402_5% (For share ROM)
EC_SPI_SI <34>
R104 XEMC@ 33_0402_5% PCH_SPI_CS0# R505 1 2 0_0402_5% EC_SPI_CS# <34>
XEMC@
DVT modify 11/15 +3VS
pop share rom
Q8A
2
DMN66D0LDW-7_SOT363-6
PU 2.2K at EC side (+3VS)
SML1CLK 6 1 EC_SMB_CK2 <17,34>
5
+3V_SPI VGA, EC
SPI ROM ( 4MByte ) 2ROM pop RP20 SML1DATA 3 4 EC_SMB_DA2 <17,34>
C67 1 2 PCH_SPI_MOSI_2 1 8 PCH_SPI_MOSI
U7 @ PCH_SPI_CLK_2 2 7 PCH_SPI_CLK Q8B
PCH_SPI_CS1# 1 8 0.1U_0402_16V4Z PCH_SPI_IO3_2 3 6 PCH_SPI_HOLD1# DMN66D0LDW-7_SOT363-6
PCH_SPI_MISO_2 2 CS# VCC 7 PCH_SPI_IO3_2 PCH_SPI_MISO_2 4 5 PCH_SPI_MISO
PCH_SPI_WP1# 2 @ 1 R109 PCH_SPI_IO2_2 3 DO HOLD# 6 PCH_SPI_CLK_2 33_0804_8P4R_5%
4 WP# CLK 5 PCH_SPI_MOSI_2 @
33_0402_5% GND DI
EN25QH32-104HIP_SO8
@
A A
2ROM is SPI ROM 2M + 4M Byte

2ROM POP Reserve for EMI(Near SPI ROM)
U6 - EN25QH16-104HIP_SO8 (SA00004UG00) C453
10P_0402_50V8J
RP19 - 33_0804_8P4R_5% (SD309330A80) 1 2 2 1 PCH_SPI_CLK_2
R108 - 33_0402_5% (SD028330A80) R402 XEMC@ 33_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
XEMC@ 2013/09/11 2013/09/24 Title
Issued Date Deciphered Date BDW MCP(4/11) CLK,SPI,SMBUS
Z5WAH M/B LA-B162P
5 4 3 2 1
5 4 3 2 1
+3VS
1
R227
10K_0402_5% DSWODVREN ‐ On Die DSW VR Enable
2
* H：Enable(DEFAULT)
L：Disable
SYS_RESET# +RTCVCC
2 HASWELL_MCP_E
U1H
C513 R124 1 2 330K_0402_5%
0.01U_0402_16V7K R125 1 @ 2 330K_0402_5%
D 1 D
R206 SYSTEM POWER MANAGEMENT
XEMC@
SUSWARN# 1 @ 2 0_0402_5% SUSACK# AK2 AW7 DSWODVREN
SYS_RESET# AC3 SUSACK DSWVRMEN AV5 PCH_RSMRST#_R
SYS_PWROK R61 1 @ 2 0_0402_5% SYS_PWROK_R AG2 SYS_RESET DPWROK AJ5 PCH_PCIE_WAKE#
place near AC3 SYS_PWROK WAKE PCH_PCIE_WAKE# <29>
<34> PCH_PWROK R62 1 2 0_0402_5% PCH_PWROK_R AY7 1K_0402_5% 1 2 R120 +3VALW_PCH
R63 1 @ 2 0_0402_5% PM_APWROK AB5 PCH_PWROK 8.2K_0402_5% 1 2 R157
<11,34> VCCST_PG_EC APWROK +3VS
AG7 V5 CLKRUN# CLKRUN# <35>
PCH_PWROK_R 2 1 R64 0_0402_5% PLTRST CLKRUN/GPIO32 AG4 LPCPD#
SUS_STAT/GPIO61 LPCPD# <35>
PLT_RST# AE6 SUSCLK R127 1 @ 2
<17,34,35> PLT_RST# SUSCLK/GPIO62 AP5 PM_SLP_S5# 10K_0402_5%
SLP_S5/GPIO63 PM_SLP_S5# <34>
PCH_RSMRST# R117 1 2 10K_0402_5% <34> PCH_RSMRST# R79 1 @ 2 0_0402_5% PCH_RSMRST#_R AW6 @ T27
SUSWARN# AV4 RSMRST @ T28 @ T29
<9> SUSWARN# SUSWARN/SUSPWRDNACK/GPIO30
<34> PBTN_OUT# R110 1 @ 2 0_0402_5% PBTN_OUT#_R AL7 AJ6 PM_SLP_S4#
PWRBTN SLP_S4 PM_SLP_S4# <34>
PCH_ACIN AJ8 AT4 PM_SLP_S3#
ACPRESENT/GPIO31 SLP_S3 PM_SLP_S3# <34>
+3VALW_PCH R156 1 2 8.2K_0402_5% PCH_BATLOW# AN4 AL5 @ T30
T31 @ AF3 BATLOW/GPIO72 SLP_A AP4 @ T96
AM5 SLP_S0 SLP_SUS AJ7 PM_SLP_LAN# R118 1 @ 2
+3VALW_PCH SLP_WLAN/GPIO29 SLP_LAN +3VALW_PCH
10K_0402_5%
1
not support Deep S4,S5 can NC
R245 8 OF 19 Rev1p2
100K_0402_5% HASWELL-MCP-E-ULT_BGA1168
@ @
@ D21 Note: Deep Sx need use EC GPIO for
2
1 2 PCH_ACIN
<34,39,41> ACIN ACPRESENT function
RB751V-40 SOD-323
+3VS
5
C R65 C
DDPB_CTRLDATA: Port B Detected
PCH_PWROK 2 0_0402_5%
P
B 4 SYS_PWROK 1 2 PCH_PWROK
Y DDPC_CTRLDATA: Port C Detected
VGATE_3V 1
A
G
1
U43 1: Port B or C is detected
*
3
R208 MC74VHC1G08DFT2G_SC70-5 R207

10K_0402_5% @ 10K_0402_5% 0: Port B or C is not detected
@
(Have internal PD)
2
HASWELL_MCP_E
U1I
+3VS
+3VS
+1.05VS_VTT B8 B9
<24,25> PCH_INV_PWM EDP_BKLCTL DDPB_CTRLCLK
1
A9 C9 R271 1 2 2.2K_0402_5%
<34> ENBKL EDP_BKLEN DDPB_CTRLDATA
U17 R310 C6 eDP SIDEBAND D9 DDI2_CTRL_CK
<25> PCH_ENVDD EDP_VDDEN DDPC_CTRLCLK DDI2_CTRL_CK <26>
1 5 10K_0402_5% D11 DDI2_CTRL_DATA
NC VCC DDPC_CTRLDATA DDI2_CTRL_DATA <26>
@
<11,46> VGATE 2 R2057 0_0402_5%
2
A 4 VGATE_3V GC6_FB_EN 2 GC6@ 1 PCH_GPIO77 U6

Y VGATE_3V <34> <17> GC6_FB_EN PIRQA/GPIO77
3 DGPU_PWR_EN P4 C5 DDI1_AUX_DN
GND <38,49,7,9> DGPU_PWR_EN PIRQB/GPIO78 DDPB_AUXN DDI1_AUX_DN <27>
DGPU_HOLD_RST# N4 DISPLAY B6
<17,9> DGPU_HOLD_RST# PIRQC/GPIO79 DDPC_AUXN
74AUP1G07GW_TSSOP5 PCH_GPIO80 N2 B5 DDI1_AUX_DP
PIRQD/GPIO80 DDPB_AUXP DDI1_AUX_DP <27>
@ T26 @ AD4 A6
PME GPIO DDPC_AUXP
TP_INT# U7
<35,9> TP_INT# GPIO55
<37> G_SEN_INT G_SEN_INT L1
Project_ID1 L3 GPIO52 C8
GPIO54 DDPB_HPD CPU_DP_HPD <27>
PCH_GPIO51 R5 A8 CPU_HDMI_HPD <26>
<9> PCH_GPIO51 GPIO51 DDPC_HPD
+3VS Project_ID0 L4 D6 CPU_EDP_HPD <25>
B GPIO53 EDP_HPD B
RP27 1 8 G_SEN_INT
2 7 PCH_GPIO80
3 6 MINI1_CLKREQ# MINI1_CLKREQ# <31,7> 9 OF 19 Rev1p2
4 5 DEVSLP0 DEVSLP0 <32,9> HASWELL-MCP-E-ULT_BGA1168
10K_0804_8P4R_5% @
+3VS
R210 1 NGC6@ 2 PCH_GPIO77
10K_0402_5%
+3VS
5
U30
+3VS +3VS PLT_RST# 2
P
B 4
Y PLT_RST_BUF# <29,31>
1
A
G
1
1
R205 R204 MC74VHC1G08DFT2G_SC70-5 R416
Project_ID1 Project_ID0
3
10K_0402_5% 10K_0402_5% 100K_0402_5%
@ EA54@ Project ID
GPIO54 GPIO53
2
2
Project_ID1 Project_ID0
*Z5WAH 0 0
2
A R214 R215 Z5W1H 0 1 A

10K_0402_5% 10K_0402_5%
EA50@ Z5WBH 1 0
Reserved 1 1
1

2013/09/11 2013/09/24 Title
Issued Date Deciphered Date BDW MCP(5/11) PM,GPIO,DDI
Z5WAH M/B LA-B162P
5 4 3 2 1
5 4 3 2 1
+3VS +3VS
RP23 1 8 PCH_GPIO87 RP36 1 8 EC_SMI#_SCI#

2 7 PCH_GPIO51 PCH_GPIO51 <8> 2 7 PCH_GPIO85
3 6 DGPU_PWR_EN DGPU_PWR_EN <38,49,7,8> 3 6 PCH_GPIO92
4 5 PCH_GPIO83 4 5 PCH_GPIO88
10K_0804_8P4R_5% 10K_0804_8P4R_5%
RP24 1 8 PCH_GPIO68
2 7 PCH_GPIO69
3 6 PCH_GPIO5
4 5 PCH_GPIO4
10K_0804_8P4R_5%
RP25 1 8 PCH_GPIO1 +1.05VS_VTT
2 7 PCH_GPIO94
D D
3 6 PCH_GPIO93
1
4 5 HASWELL_MCP_E
PCH_GPIO2 U1J
10K_0804_8P4R_5% R144
RP26 1 8 PCH_GPIO91 1K_0402_5%
2 7 PCH_GPIO0
3 6 PCH_GPIO90
2
4 5 PCH_GPIO38 PCH_GPIO76 P1 D60 H_THERMTRIP#
10K_0804_8P4R_5% PCH_GPIO8 AU2 BMBUSY/GPIO76 THERMTRIP V4
GPIO8 RCIN/GPIO82 EC_KBRST# <34>
RP16 1 8 PCH_GPIO19 PCH_GPIO19 <7> AM7 T4 SERIRQ SERIRQ <34,35>
2 7 PCH_GPIO36 EC_LID_OUT# AD6 LAN_PHY_PWR_CTRL/GPIO12 CPU/ SERIRQ AW15 PCH_OPIRCOMP 1 2 R145
PCH_GPIO36 <6> <34> EC_LID_OUT# GPIO15 MISC PCH_OPI_RCOMP
3 6 TP_INT# TP_INT# <35,8> PCH_GPIO16 Y1 AF20 @ T106 49.9_0402_1%
4 5 SERIRQ PCH_GPIO17 T3 GPIO16 RSVD AB21 @ T32
10K_0804_8P4R_5% PCH_GPIO24 AD5 GPIO17 RSVD
RP28 1 8 PCH_GPIO18 CPU_IDEN AN5 GPIO24
PCH_GPIO18 <7> GPIO27
2 7 PCH_GPIO35 PCH_GPIO35 <6> PCH_GPIO28 AD7
3 6 PCH_GPU_ACIN DGPU_IDEN AN3 GPIO28
4 5 PCH_GPIO34 GPIO26 R6 PCH_GPIO83
PCH_GPIO34 <6> GSPI0_CS/GPIO83
10K_0804_8P4R_5% PCH_GPIO56 AG6 L6 PCH_GPIO84
RP29 1 8 PCH_GPIO71 PCH_GPIO57 AP1 GPIO56 GSPI0_CLK/GPIO84 N6 PCH_GPIO85
2 7 PCH_GPIO16 PCH_GPIO58 AL4 GPIO57 GSPI0_MISO/GPIO85 L8 PCH_GPIO86
3 6 EC_KBRST# PCH_GPIO59 AT5 GPIO58 GSPI0_MOSI/GPIO86 R7 PCH_GPIO87
4 5 PCH_GPIO37 R71 PCH_GPIO44 AK4 GPIO59 GSPI1_CS/GPIO87 L5 PCH_GPIO88 +3VS
PCH_GPIO37 <6> GPIO44 GSPI1_CLK/GPIO88
10K_0804_8P4R_5% 0_0402_5% PCH_GPIO47 AB6 GPIO N7 PCH_GPIO89
DGPU_AC_DETECT 1 @ 2 PCH_GPU_ACINU4 GPIO47 GSPI1_MISO/GPIO89 K2 PCH_GPIO90
<17,34> DGPU_AC_DETECT GPIO48 GSPI_MOSI/GPIO90
RP30 8 1 PCH_GPIO67 DGPU_PRSNT# Y3 J1 PCH_GPIO91
7 2 PCH_GPIO65 TS_INT# P3 GPIO49 UART0_RXD/GPIO91 K3 PCH_GPIO92
<25> TS_INT# GPIO50 UART0_TXD/GPIO92
6 3 DGPU_HOLD_RST# DGPU_HOLD_RST# <17,8> PCH_GPIO71 Y2 J2 PCH_GPIO93
5 4 PCH_GPIO64 PCH_GPIO13 AT3 HSIOPC/GPIO71 LPIO UART0_RTS/GPIO93 G1 PCH_GPIO94
GPIO13 UART0_CTS/GPIO94
2
10K_0804_8P4R_5% PCH_GPIO14 AH4 K4 PCH_GPIO0
RP31 8 1 PCH_GPIO84 PCH_GPIO25 AM4 GPIO14 UART1_RXD/GPIO0 G2 PCH_GPIO1 R275 R274
7 2 PCH_GPIO3 PCH_GPIO45 AG5 GPIO25 UART1_TXD/GPIO1 J3 PCH_GPIO2 2.2K_0402_5%
GPIO45 UART1_RST/GPIO2 2.2K_0402_5%
6 3 PCH_GPIO46 AG3 J4 PCH_GPIO3
5 4 PCH_GPIO89 GPIO46 UART1_CTS/GPIO3 F2 PCH_GPIO4
1
C 10K_0804_8P4R_5% PCH_GPIO9 AM3 I2C0_SDA/GPIO4 F3 PCH_GPIO5 C
RP32 8 1 PCH_GPIO17 PCH_GPIO10 AM2 GPIO9 I2C0_SCL/GPIO5 G4
GPIO10 I2C1_SDA/GPIO6 PCH_I2C1_SDA <25,35>
7 2 PCH_GPIO23 PCH_GPIO23 <7> DEVSLP0 P2 F1
<32,8> DEVSLP0 DEVSLP0/GPIO33 I2C1_SCL/GPIO7 PCH_I2C1_SCL <25,35>
6 3 PCH_GPIO76 GPU_EVENT# 2 1 PCH_GPIO70 C4 E3 PCH_GPIO64
<17> GPU_EVENT# SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64
5 4 R2058 GC6@ 0_0402_5% PCH_GPIO38 L2 F4 PCH_GPIO65
10K_0804_8P4R_5% EC_SMI#_SCI# N5 DEVSLP1/GPIO38 SDIO_CMD/GPIO65 D3 PCH_GPIO66 Touch Pad, Touch Screen
<34> EC_SMI#_SCI# DEVSLP2/GPIO39 SDIO_D0/GPIO66
PCH_SPKR V2 E4 PCH_GPIO67
<36> PCH_SPKR SPKR/GPIO81 SDIO_D1/GPIO67
R216 1 NGC6@ 2 PCH_GPIO70 C3 PCH_GPIO68
SDIO_D2/GPIO68 E2 PCH_GPIO69
+3VALW_PCH 10K_0402_5% SDIO_D3/GPIO69
10 OF 19 Rev1p2
RP34 1 8 PCH_GPIO10 @
2 7 PCH_GPIO11
PCH_GPIO11 <7>
3 6 PCH_GPIO57
4 5 PCH_GPIO13
10K_0804_8P4R_5%
RP35 1 8 USB_OC1#
USB_OC1# <10>
2 7 PCH_GPIO8
3 6 PCH_GPIO73
PCH_GPIO73 <7>
4 5 SUSWARN#
SUSWARN# <8>
10K_0804_8P4R_5%
RP37 1 8 PCH_GPIO46
2 7 PCH_GPIO42 PCH_GPIO42 <10>
3 6 PCH_GPIO14 +3VALW_PCH +3VS
4 5 PCH_GPIO60 PCH_GPIO60 <7>
10K_0804_8P4R_5% R269 1 @ 2 1K_0402_5% PCH_SPKR
RP38 1 8 PCH_GPIO28 R247 1 @ 2 10K_0402_5% EC_LID_OUT#
2 7 PCH_GPIO47
3 6 PCH_GPIO45
4 5 PCH_GPIO24 GPIO15 : TLS Confidentiality SPKR / GPIO81 : NO REBOOT
10K_0804_8P4R_5%
RP39 1 8 PCH_GPIO43
PCH_GPIO43 <10>
B 2 7 PCH_GPIO59 1: Intel ME TLS with confidentiality 1: ENABLED B
3 6 PCH_GPIO25
4 5 PCH_GPIO58 0: Intel ME TLS with no confidentiality 0: DISABLED (Have internal PD)
RP40 1 8
10K_0804_8P4R_5%
USB_OC0#
USB_OC0# <10,33>
* (Have internal PD)
*
2 7 PCH_GPIO56
3 6 PCH_GPIO44
4 5 PCH_GPIO9
10K_0804_8P4R_5%
+3VS
PCH_GPIO66 R270 1 @ 2 1K_0402_5%
PCH_GPIO86 R272 1 @ 2 1K_0402_5%
+3VS R273 1 2 1K_0402_5%
1
R306 GSPI0_MOSI / GPIO86 : Boot BIOS Strap SDIO_D0 / GPIO66 : Top‐Block Swap Override

10K_0402_5%
UMA@
1: ENABLED 1: ENABLED
2
DGPU_PRSNT# GPIO49 0: SPI ROM (Have internal PD) 0: DISABLED (Have internal PD)

DGPU_PRSNT# * *
2
R219
10K_0402_5%
DIS,Optimus 0
VGA@
UMA 1
1
+3VALW_PCH +3VALW_PCH
A A
1
R311 R312
10K_0402_5% 10K_0402_5%
VGM@ BW@
2
DGPU_IDEN
GPIO26 CPU_IDEN
GPIO27
VGA INFO CPU INFO Security Classification Compal Secret Data Compal Electronics, Inc.
2
R220 R221 2013/09/11 2013/09/24 Title

10K_0402_5%
N15V-GL 0 10K_0402_5%
Haswell 0 Issued Date Deciphered Date BDW MCP(6/11) GPIO,LPIO
VGL@ HW@
N15V-GM 1 Boradwell 1 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1
Z5WAH M/B LA-B162P
5 4 3 2 1
5 4 3 2 1
D D
HASWELL_MCP_E
U1K
PEG_GTX_HRX_N0 C76 1 2 VGA@ 0.22U_0402_10V6K PEG_GTX_C_HRX_N0 F10 AN8 USB20_N0

PEG_GTX_HRX_P0 C77 1 2 VGA@ 0.22U_0402_10V6K PEG_GTX_C_HRX_P0 E10 PERN5_L0
PERP5_L0
USB2N0
USB2P0
AM8 USB20_P0
USB20_N0
USB20_P0
<33>
<33>
USB2 Port 0 (USB3.0 P0)
PEG_HTX_C_GRX_N0 C78 1 2 VGA@ 0.22U_0402_10V6K PEG_HTX_GRX_N0 C23 AR7 USB20_N1
PEG_HTX_C_GRX_P0 C79 1 2 VGA@ 0.22U_0402_10V6K PEG_HTX_GRX_P0 C22 PETN5_L0
PETP5_L0
USB2N1
USB2P1
AT7 USB20_P1
USB20_N1
USB20_P1
<33>
<33>
USB2 Port 1
PEG_GTX_HRX_N1 C80 1 2 VGA@ 0.22U_0402_10V6K PEG_GTX_C_HRX_N1 F8 AR8 USB20_N2
PEG_GTX_HRX_P1 C81 1 2 VGA@ 0.22U_0402_10V6K PEG_GTX_C_HRX_P1 E8 PERN5_L1
PERP5_L1
USB2N2
USB2P2
AP8 USB20_P2
USB20_N2
USB20_P2
<33>
<33>
USB2 Port 2
PEG_HTX_C_GRX_N1 C82 1 2 VGA@ 0.22U_0402_10V6K PEG_HTX_GRX_N1 B23 AR10
PEG_HTX_C_GRX_P1 C83 1 2 VGA@ 0.22U_0402_10V6K PEG_HTX_GRX_P1 A23 PETN5_L1 USB2N3 AT10
VGA PETP5_L1 USB2P3
PEG_GTX_HRX_N2 C84 1 2 VGA@ 0.22U_0402_10V6K PEG_GTX_C_HRX_N2H10 AM15 USB20_N4
PEG_GTX_HRX_P2 C85 1 2 VGA@ 0.22U_0402_10V6K PEG_GTX_C_HRX_P2G10 PERN5_L2
PERP5_L2
USB2N4
USB2P4
AL15 USB20_P4
USB20_N4
USB20_P4
<31>
<31>
Mini Card(WLAN+BT)
PEG_HTX_C_GRX_N2 C86 1 2 VGA@ 0.22U_0402_10V6K PEG_HTX_GRX_N2 B21 AM13 USB20_N5
PEG_HTX_C_GRX_P2 C87 1 2 VGA@ 0.22U_0402_10V6K PEG_HTX_GRX_P2 C21 PETN5_L2
PETP5_L2
USB2N5
USB2P5
AN13 USB20_P5
USB20_N5
USB20_P5
<25>
<25>
Touch Screen
PEG_GTX_HRX_N3 C88 1 2 VGA@ 0.22U_0402_10V6K PEG_GTX_C_HRX_N3 E6 AP11 USB20_N6 DVT modify 11/12
PEG_GTX_HRX_P3 C89 1 2 VGA@ 0.22U_0402_10V6K PEG_GTX_C_HRX_P3 F6 PERN5_L3
PERP5_L3
USB2N6
USB2P6
AN11 USB20_P6
USB20_N6
USB20_P6
<25>
<25>
Camera change to USB port setting
PEG_HTX_C_GRX_N3 C90 1 2 VGA@ 0.22U_0402_10V6K PEG_HTX_GRX_N3 B22 AR13 USB20_N7

PEG_HTX_C_GRX_P3 C91 1 2 VGA@ 0.22U_0402_10V6K PEG_HTX_GRX_P3 A21 PETN5_L3
PETP5_L3
USB2N7
USB2P7
AP13 USB20_P7
USB20_N7
USB20_P7
<33>
<33>
Finger Print
<29> PCIE_PRX_DTX_N3 PCIE_PRX_DTX_N3 G11
C PCIE_PRX_DTX_P3 F11 PERN3 G20 C
<29> PCIE_PRX_DTX_P3 PERP3 USB3RN1 PCH_USB3_RX0_N <33>
H20
PCIE LAN C155 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_N3 C29 USB3.0 P1 USB3RP1 PCH_USB3_RX0_P <33>
<29>
<29>
PCIE_PTX_C_DRX_N3
PCIE_PTX_C_DRX_P3
C160 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_P3 B30 PETN3
PETP3
PCIe USB
USB3TN1
C33
PCH_USB3_TX0_N <33>
USB3 Port 0
B34
USB3TP1 PCH_USB3_TX0_P <33>
<31> PCIE_PRX_DTX_N4 PCIE_PRX_DTX_N4 F13
PCIE_PRX_DTX_P4 G13 PERN4 E18
<31> PCIE_PRX_DTX_P4 PERP4 USB3RN2 F18
WLAN <31> PCIE_PTX_C_DRX_N4
C156 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_N4 B29
PETN4
USB3.0 P2 USB3RP2
C157 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_P4 A29 B33
<31> PCIE_PTX_C_DRX_P4 PETP4 USB3TN2 A33
G17 USB3TP2
F17 PERN1/USB3RN3
PERP1/USB3RP3
C30 USB3.0 P3 / PCIE P1
C31 PETN1/USB3TN3 AJ10 USBRBIAS R154 1 2 22.6_0402_1%
PEG_GTX_HRX_N[0..3] <17> PETP1/USB3TP3 USBRBIAS CAD note:
AJ11
PEG_GTX_HRX_P[0..3] <17>
F15 USBRBIAS AN10 @ T35 Route single‐end 50‐ohms and max 450‐mils length.
G15 PERN2/USB3RN4 RSVD AM10 @ T36 Recommended minimum spacing to other signal traces is 15 mils
PEG_HTX_C_GRX_N[0..3] <17> PERP2/USB3RP4 USB3.0 P4 / PCIE P2 RSVD
PEG_HTX_C_GRX_P[0..3] <17>
B31
A31 PETN2/USB3TN4
PETP2/USB3TP4 AL3 USB_OC0#
OC0/GPIO40 USB_OC0# <33,9>
AT1 USB_OC1#
+1.05VS_AUSB3PLL OC1/GPIO41 USB_OC1# <9>
AH2 PCH_GPIO42
OC2/GPIO42 PCH_GPIO42 <9>
T33 @ E15 AV3 PCH_GPIO43
RSVD OC3/GPIO43 PCH_GPIO43 <9>
T34 @ E13
R232 1 2 3.01K_0402_1% PCIE_RCOMP A27 RSVD
R155 1 @ 2 0_0603_5% PCIE_IREF B27 PCIE_RCOMP
PCIE_IREF
Trace width=12~15 mil, Spcing=12 mils
Max trace length= 500 mil 11 OF 19 Rev1p2
B HASWELL-MCP-E-ULT_BGA1168 B
@
A A

2013/09/11 2013/09/24 Title
Issued Date Deciphered Date BDW MCP(7/11) PCIE,USB
Z5WAH M/B LA-B162P
5 4 3 2 1
5 4 3 2 1
+1.35V +1.35V_CPU
@J6
@ J6
1 2
+CPU_CORE
D HASWELL_MCP_E D
JUMP_43X118 U1L
Shark Bay ULT have internal gate for VDDQ T37 @ L59 C36

+1.35V_CPU T38 @ J58 RSVD VCC C40
RSVD VCC C44
AH26 VCC C48
AJ31 VDDQ VCC C52
AJ33 VDDQ VCC C56
AJ37 VDDQ VCC E23
AN33 VDDQ VCC E25
AP43 VDDQ VCC E27
+3VS AR48 VDDQ VCC E29
+1.05VS_VTT AY35 VDDQ VCC E31
AY40 VDDQ VCC E33
VDDQ VCC
1
+3VALW_PCH AY44 E35

VDDQ VCC
1
R422 +CPU_CORE AY50 E37
100K_0402_5% U16 R309 VDDQ VCC E39
@ 1 5 10K_0402_5% F59 VCC E41
NC VCC R166 T39 @ N58 VCC VCC E43
2
2 0_0402_5% +VCCIO_OUT T40 @ AC58 RSVD VCC E45

<34,8> VCCST_PG_EC
2
A 4 VCCST_PG_EC_R 1 @ 2 +1.05VS_VTT RSVD VCC E47
Y VCCST_PWRGD <34,44> VCC
3 VCC_SENSE_R E63 E49
GND T41 @ AB23 VCC_SENSE VCC E51
74AUP1G07GW_TSSOP5 2 R164 1 A59 RSVD VCC E53
@ 0_0603_5% E20 VCCIO_OUT VCC E55
+VCCIOA_OUT VCCIOA_OUT VCC
T42 @ AD23 E57
T43 @ AA23 RSVD VCC F24
T44 @ AE59 RSVD VCC F28
RSVD VCC F32
H_CPU_SVIDALRT# L62 VCC F36
0_0402_5% 1 @ 2 R165 H_CPU_SVIDCLK N63 VIDALERT VCC F40
<46> VR_SVID_CLK VIDSCLK VCC
VIDSOUT L63 F44
+1.05VS_VTT VCCST_PG_EC_R B59 VIDSOUT HSW ULT POWER VCC F48
C 0_0402_5% 1 2 R167 PCH_VR_EN F60 VCCST_PWRGD VCC F52 C
<46> VR_ON VR_EN VCC
<46,8> VGATE 0_0402_5% 1 2 R168 VR_READY C59 F56
@C167
@ C167 VR_READY VCC G23
VCC
2
1 2 0.1U_0402_16V4Z D63 G25
R169 CPU_PWR_DEBUG H59 VSS VCC G27
SVID ALERT 150_0402_1% Reserved Only P62 PWR_DEBUG
VSS
VCC
VCC
G29
@ T45 @ P60 G31
1 T46 @ P61 RSVD_TP VCC G33
+1.05VS_VTT T47 @ N59 RSVD_TP VCC G35
Place the CPU RSVD_TP VCC
CPU_PWR_DEBUG T48 @ N61 G37
resistors close to CPU T98 @ T59 RSVD_TP VCC G39
RSVD VCC
1
T142 @ AD60 G41

RSVD VCC
2
R171 T143 @ AD59 G43

R170 T144 @ AA59 RSVD VCC G45
75_0402_1% RSVD VCC
10K_0402_5% T141 @ AE60 G47
R172 T140 @ AC59 RSVD VCC G49
@
2
43_0402_1% T147 @ AG58 RSVD VCC G51

1
2 1 H_CPU_SVIDALRT# +1.05VS_VTT T145 @ U59 RSVD VCC G53

<46> VR_ALERT# RSVD VCC
T146 @ V59 G55
RSVD VCC G57
AC22 VCC H23
+CPU_CORE AE22 VCCST VCC J23
AE23 VCCST VCC K23
SVID DATA VCCST VCC
VCC
K57
AB57 L22
+1.05VS_VTT AD57 VCC VCC M23
AG57 VCC VCC M57
Place the CPU VCC VCC
C24 P57
resistors close to CPU C28 VCC VCC U57
VCC VCC
1
C32 W57
R173 VCC VCC
130_0402_1% 12 OF 19 Rev1p2
B R174 @ B
2
0_0402_5%
2 @ 1 VIDSOUT +1.05VS_VTT
<46> VR_SVID_DATA
+1.35V_CPU
VDDQ DECOUPLING
+CPU_CORE
1U_0402_6.3V6K
22U_0805_6.3V6M
@ 1 1
1
C7
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
EMC@ EMC@ 1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
C6
R177 1 1 1 1 1 1 1 1 1 1
+
C8
C9
C10
C11
100_0402_1% Note: 0 ohm PLACED CLOSE TO CPU @ @ C18
2 2
C12
C13
C14
C15
C16
C17
330U_2.5V_M
2
VCC_SENSE_R 2 @ 1 R178 2 2 2 2 2 2 2 2 2 2 2
VCC_SENSE <46>
0_0402_5% SF000006S00
330U 2.5V H4.2
2 @ 1 R235
17mohm OSCON
13> VSS_SENSE_R VSS_SENSE <46>
0_0402_5%
1
+1.35V : 470UF/2V/7343 *2
R233
100_0402_1% 10UF/6.3V/0603 * 6
2.2UF/6.3V/0402 * 4
2
A A

2013/09/11 2013/09/24 Title
Issued Date Deciphered Date BDW MCP(8/11) Power
Z5WAH M/B LA-B162P
5 4 3 2 1
5 4 3 2 1
D D
+1.05VS_VTT
+1.05VS_VTT HASWELL_MCP_E
U1M
K9 +3VALW_PCH +RTCVCC
VCCHSIO
1U_0402_6.3V6K
1 SF000006R00 L10
VCCHSIO
1U_0402_6.3V6K
M9 C30 1 2 1U_0402_6.3V6K
C408 + 220U 6.3V OSCON N8 VCCHSIO mPHY AH11
VCC1_05 VCCSUS3_3
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
P9 RTC AG10
220U_6.3V_M
ESR 17mohm@100Khz 1 1 1
B18 VCC1_05 VCCRTC AE7 +VCCRTCEXT 1 2
+RTCVCC
2 +1.05VS_AUSB3PLL VCCUSB3PLL DCPRTC 1 1 1
C21
C20
C31 +1.05VS_ASATA3PLL B11 C54 0.1U_0402_16V4Z @ @
VCCSATA3PLL +3V_SPI
C52
C51
C50
1U_0402_6.3V6K
2 2 2
EMC@ 2 2 2
Y20 SPI Y8 C58 2 1 0.1U_0402_16V4Z
AA21 RSVD OPI VCCSPI @
Near PJ601 +1.05VS_APLLOPI VCCAPLL
Near K9 Near L10 Near M9 W21
VCCAPLL AG14
VCCASW +1.05VS_VTT
AG13
+3VALW_PCH VCCASW
+1.05VS_VTT
+1.05VS_VTT +1.05VS_AUSB3PLL HDA --> 3.3V or 1.5V T105 @ J13 USB3 @
I2C --> 1.8V DCPSUS3
Near B18 VCC1_05
J11 C27 1 2 10U_0603_6.3V6M C2567 0.47U_0402_6.3V6K
C42 1 2 1U_0402_6.3V6K H11 C33 1 2 1U_0402_6.3V6K 1 2 +3VALW_PCH
L1 1 2 C32 1 2 100U_1206_6.3V6M 2 1 C38 AH14 AXALIA/HDA VCC1_05 H15 C40 1 2 10U_0603_6.3V6M
2.2UH_LQM2MPN2R2NG0L_30% 1U_0402_6.3V6K VCCHDA VCC1_05 AE8 EMC@
VCC1_05 Broadwell only
Idc 1.2A Rdc 0.11ohm +/-30% AF22 1U_0402_6.3V6K
T116 @ AH13 VRM/USB2/AZALIA VCC1_05 AG19 +PCH_VCCDSW 1 @ 2+PCH_VCCDSW_R C41 1 2 Intel recommends a 0.47uF boot strap
+1.05VS_ASATA3PLL DCPSUS2 CORE DCPSUSBYP AG20 R209 0_0402_5% capacitor to be placed between V3.3DSW
C +3VALW_PCH DCPSUSBYP AE9 C
VCCASW +1.05VS_VTT and DcpSUSByp power rail
Near B11 C28
VCCASW
AF9 C36 1 2 22U_0805_6.3V6M
to support in‐rush current.
C46 1 2 1U_0402_6.3V6K Near AC9 2 1 22U_0805_6.3V6M AC9 AG8 C37 1 2 1U_0402_6.3V6K
L2 1 2 C61 1 2 100U_1206_6.3V6M C59 @ AA9 VCCSUS3_3 VCCASW AD10 C43 @1 2 1U_0402_6.3V6K
2.2UH_LQM2MPN2R2NG0L_30% Near AH10 2 1 0.1U_0402_16V4Z AH10 VCCSUS3_3 DCPSUS1 AD8
Idc 1.2A Rdc 0.11ohm +/-30% C29 V8 VCCDSW3_3 GPIO/LCC DCPSUS1
Near V8 2 1 22U_0805_6.3V6M W9 VCC3_3
+1.05VS_APLLOPI VCC3_3 J15
+3VS THERMAL SENSOR VCCTS1_5 +1.5VS
K14 +3VS
VCC3_3
Near AA21 VCC3_3
K16 C55 1 2 0.1U_0402_16V4Z
C47 1 2 1U_0402_6.3V6K
L3 1 2 C22 1 2 100U_1206_6.3V6M
2.2UH_LQM2MPN2R2NG0L_30% +1.05VS_AXCK_DCB J18
Idc 1.2A Rdc 0.11ohm +/-30% K19 VCCCLK SDIO/PLSS U8
VCCCLK VCCSDIO +3VS
+1.05VS_AXCK_LCPLL A20 T9 C44 1 2 1U_0402_6.3V6K
J17 VCCACLKPLL VCCSDIO
+1.05VS_VTT VCCCLK
C57 R21
+1.05VS_VTT +1.05VS_AXCK_DCB Near J17 2 1 1U_0402_6.3V6K T21 VCCCLK LPT LP POWER C53 @1 2 1U_0402_6.3V6K
C56 T100 @ K18 VCCCLK SUS OSCILLATOR AB8 C25 @1 2 100U_1206_6.3V6M
Near J18 Near R21 2 1 1U_0402_6.3V6K T101 @ M20 RSVD DCPSUS4
C48 1 2 1U_0402_6.3V6K T102 @ V21 RSVD
L4 1 2 C23 1 2 100U_1206_6.3V6M AE20 RSVD AC20 @ T103
+3VALW_PCH VCCSUS3_3 RSVD
2.2UH_LQM2MPN2R2NG0L_30% AE21 AG16 +1.05VS_VTT
Idc 1.2A Rdc 0.11ohm +/-30% VCCSUS3_3 USB2 VCC1_05 AG17
VCC1_05 C45 1 2 1U_0402_6.3V6K
+1.05VS_AXCK_LCPLL
Near A20
C49 1 2 1U_0402_6.3V6K 13 OF 19 Rev1p2
L5 1 2 C24 1 2 100U_1206_6.3V6M HASWELL-MCP-E-ULT_BGA1168
2.2UH_LQM2MPN2R2NG0L_30% @
Idc 1.2A Rdc 0.11ohm +/-30%
B B
+3VALW TO +3VALW(PCH AUX Power)
Short J8 for PCH VCCSUS3.3
+3VALW J8 @ +3VALW_PCH
JUMP_43X39
1 2
1 2
A A

2013/09/11 2013/09/24 Title
Issued Date Deciphered Date BDW MCP(9/11) Power
Z5WAH M/B LA-B162P
5 4 3 2 1
5 4 3 2 1
D D
HASWELL_MCP_E HASWELL_MCP_E
U1N U1O U1P HASWELL_MCP_E
H17
A11 AJ35 AP22 AV59 D33 VSS H57
A14 VSS VSS AJ39 AP23 VSS VSS AV8 D34 VSS VSS J10
A18 VSS VSS AJ41 AP26 VSS VSS AW16 D35 VSS VSS J22
A32 VSS VSS AJ47 AP31 VSS VSS AW35 D39 VSS VSS K1
A36 VSS VSS AJ50 AP38 VSS VSS AW37 D41 VSS VSS K12
A40 VSS VSS AJ52 AP39 VSS VSS AW4 D42 VSS VSS L13
AA1 VSS VSS AJ63 AR11 VSS VSS AW50 D49 VSS VSS L58
AA58 VSS VSS AK23 AR15 VSS VSS AW51 D5 VSS VSS L61
AB10 VSS VSS AK3 AR17 VSS VSS AW59 D50 VSS VSS L7
AB20 VSS VSS AK52 AR23 VSS VSS AW60 D51 VSS VSS M22
AB22 VSS VSS AL10 AR31 VSS VSS AY11 D53 VSS VSS N10
AB7 VSS VSS AL13 AR33 VSS VSS AY16 D54 VSS VSS N3
AC61 VSS VSS AL17 AR39 VSS VSS AY18 D55 VSS VSS P59
AD21 VSS VSS AL20 AR43 VSS VSS AY22 D57 VSS VSS P63
AD3 VSS VSS AL22 AR49 VSS VSS AY24 D59 VSS VSS R10
C AD63 VSS VSS AL23 AR5 VSS VSS AY26 D62 VSS VSS R22 C
AE10 VSS VSS AL26 AR52 VSS VSS AY30 D8 VSS VSS R8
AE5 VSS VSS AL29 AT13 VSS VSS AY33 E11 VSS VSS T1
AE58 VSS VSS AL31 AT35 VSS VSS AY4 E17 VSS VSS T58
AF11 VSS VSS AL33 AT37 VSS VSS AY51 F20 VSS VSS U20
AF17 VSS VSS AL45 AT46 VSS VSS AY6 F38 VSS VSS V10
AF18 VSS VSS AL46 AT49 VSS VSS B20 F42 VSS VSS V3
AG1 VSS VSS AL51 AT61 VSS VSS B24 F46 VSS VSS V7
AG11 VSS VSS AL52 AT62 VSS VSS B26 F50 VSS VSS W20
AG21 VSS VSS AL54 AT63 VSS VSS B28 F54 VSS VSS W22
AG23 VSS VSS AL57 AU1 VSS VSS B32 F58 VSS VSS Y10
AG60 VSS VSS AL60 AU16 VSS VSS B36 F61 VSS VSS Y59
AG61 VSS VSS AL61 AU18 VSS VSS B4 G18 VSS VSS Y63
AG62 VSS VSS AM1 AU20 VSS VSS B40 G22 VSS VSS
AG63 VSS VSS AM17 AU22 VSS VSS B44 G3 VSS
AH17 VSS VSS AM23 AU24 VSS VSS B48 G5 VSS V58
AH19 VSS VSS AM31 AU26 VSS VSS B52 G6 VSS VSS AH46
AH20 VSS VSS AM52 AU28 VSS VSS B56 G8 VSS VSS V23
AH22 VSS VSS AN17 AU30 VSS VSS B60 H13 VSS VSS E62
VSS VSS VSS VSS VSS VSS_SENSE VSS_SENSE_R <11>
AH24 AN23 AU33 C11 AH16
AH28 VSS VSS AN31 AU51 VSS VSS C14 16 OF 19 Rev1p2 VSS
AH30 VSS VSS AN32 AU53 VSS VSS C18 HASWELL-MCP-E-ULT_BGA1168
AH32 VSS VSS AN35 AU55 VSS VSS C20
VSS VSS VSS VSS @
AH34 AN36 AU57 C25
AH36 VSS VSS AN39 AU59 VSS VSS C27
AH38 VSS VSS AN40 AV14 VSS VSS C38
AH44 VSS VSS AN45 AV24 VSS VSS D12
B AH51 VSS VSS AN48 AV33 VSS VSS D18 B
AJ13 VSS VSS AN60 AV41 VSS VSS D25
AJ25 VSS VSS AP10 AV49 VSS VSS D29
VSS VSS VSS 15 OF 19 Rev1p2 VSS
@
14 OF 19 Rev1p2
@
A A

2013/09/11 2013/09/24 Title
Issued Date Deciphered Date HSW MCP(10/11) GND
Z5WAH M/B LA-B162P
5 4 3 2 1
5 4 3 2 1
D D
HASWELL_MCP_E
U1R
HASWELL_MCP_E
U1Q
T51 @ AT2 N23 @ T64
T52 @ AU44 RSVD RSVD R23 @ T65
DC_TEST_AY2_AW2 AY2 A3 DC_TEST_A3_B3 T53 @ AV44 RSVD RSVD T23 @ T66
DC_TEST_AY3_AW3 AY3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 A4 @ T58 T54 @ D15 RSVD RSVD U10 @ T67
T49 @ AY60 DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4 RSVD RSVD
DC_TEST_AY61_AW61 AY61 DAISY_CHAIN_NCTF_AY60 A60 @ T59
DC_TEST_AY62_AW62 AY62 DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 A61 DC_TEST_A61_B61 T55 @ F22 AL1 @ T68
T50 @ B2 DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 A62 @ T60 T56 @ H22 RSVD RSVD AM11 @ T69
DC_TEST_A3_B3 B3 DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 AV1 @ T61 T57 @ J21 RSVD RSVD AP7 @ T70
DC_TEST_A61_B61 B61 DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 AW1 @ T62 RSVD RSVD AU10 @ T71
DC_TEST_B62_B63 B62 DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 AW2 DC_TEST_AY2_AW2 RSVD AU15 @ T72
B63 DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 AW3 DC_TEST_AY3_AW3 RSVD AW14 @ T73
DC_TEST_C1_C2 C1 DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 AW61 DC_TEST_AY61_AW61 RSVD AY14 @ T74
C2 DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 AW62 DC_TEST_AY62_AW62 RSVD
DAISY_CHAIN_NCTF_C2 DAISY_CHAIN_NCTF_AW62 AW63 @ T63
DAISY_CHAIN_NCTF_AW63
17 OF 19 Rev1p2 18 OF 19 Rev1p2
HASWELL-MCP-E-ULT_BGA1168 HASWELL-MCP-E-ULT_BGA1168
@ @
U1S HASWELL_MCP_E
C C
T104 @ CFG0 AC60 AV63 @ T75
T107 @ CFG1 AC62 CFG0
CFG1
RSVD_TP
RSVD_TP
AU63 @ T76 CFG Straps for Processor
T108 @ CFG2 AC63
T166 @ CFG3 AA63 CFG2
T167 @ CFG4 AA60 CFG3 C63 @ T77
T168 @ CFG5 Y62 CFG4 RSVD_TP C62 @ T78
T169 @ CFG6 Y61 CFG5 RSVD_TP B43 @ T79 CFG3
T170 @ CFG7 Y60 CFG6 RSVD
CFG7
1
T171 @ CFG8 V62 A51 @ T80
T172 @ CFG9 V61 CFG8 RSVD_TP B51 @ T81 R224
T182 @ CFG10 V60 CFG9 RSVD_TP 1K_0402_5%
T181 @ CFG11 U60 CFG10 L60 @ T82 @
T180 @ CFG12 T63 CFG11 RESERVED RSVD_TP
2
T179 @ CFG13 T62 CFG12 N60 @ T83
T178 @ CFG14 T61 CFG13 RSVD
T177 @ CFG15 T60 CFG14 W23 @ T84
CFG15 RSVD Y22 @ T85
T176 @ CFG16 AA62 RSVD AY15 OPI_COMP
T175 @ CFG18 U63 CFG16 PROC_OPI_RCOMP
T174 @ CFG17 AA61 CFG18 AV62 @ T86
CFG17 RSVD Physical Debug Enable (DFX Privacy)
T173 @ CFG19 U62 D58 @ T87
CFG19 RSVD
CFG_RCOMP V63 P22 1: DISABLED
CFG_RCOMP VSS N21
VSS CFG3
T90 @ A5 0: ENABLED; SET DFX ENABLED BIT
RSVD P20 @ T88
T91 @ E1 RSVD R20 @ T89 IN DEBUG INTERFACE MSR
T92 @ D1 RSVD RSVD
T93 @ J20 RSVD
T94 @ H18 RSVD CFG4
TD_IREF B12 RSVD
TD_IREF
1
B 19 OF 19 Rev1p2 R225 B
HASWELL-MCP-E-ULT_BGA1168 1K_0402_5%
@
2
2 1 CFG_RCOMP
R222 49.9_0402_1%
2 1 OPI_COMP
R223 49.9_0402_1% Display Port Presence Strap
2 1 TD_IREF
R226 8.2K_0402_5%
1 : Disabled; No Physical Display Port
CFG4 attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
A A

2013/09/11 2013/09/24 Title
Issued Date Deciphered Date BDW MCP(11/11) RSVD
Z5WAH M/B LA-B162P
5 4 3 2 1
A B C D E
+1.35V
+1.35V +1.35V +1.35V
JDIMM1
1
+V_DDR_REFA 1 2
VREF_DQ VSS1 +5VALW +5VS
0.1U_0402_16V4Z
3 4 DDR_A_D9
VSS2 DQ4
C34
R54 DDR_A_D13 5 6 DDR_A_D12 1
R293 1.8K_0402_1% DDR_A_D8 7 DQ0 DQ5 8 @
2_0402_1% 9 DQ1 VSS3 10 DDR_A_DQS#1 R187 1 2 SA_ODT0
2
1 2 11 VSS4 DQS#0 12 DDR_A_DQS1 66.5_0402_1%
<5> SA_DIMM_VREFDQ DM0 DQS0 2
2.2U_0402_6.3V6M
1 13 14
VSS5 VSS6
2
@ 1 1 DDR_A_D14 15 16 DDR_A_D15
DQ2 DQ6 +1.35V
C105
0.1U_0402_16V4Z
C106
C158 @ DDR_A_D10 17 18 DDR_A_D11 R186 R191 R188 1 2 SA_ODT1
0.022U_0402_25V7K R185 19 DQ3 DQ7 20 U45 66.5_0402_1%
VSS7 VSS8 100K_0402_5% 100K_0402_5%
2 1.8K_0402_1% DDR_A_D29 21 22 DDR_A_D25 1 5 Q18
DQ8 DQ12 NC VCC @
1
2 2 DDR_A_D28 23 24 DDR_A_D24 LBSS138LT1G_SOT-23-3
D
1
DQ9 DQ13
1
25 26 <4> DDR_PG_CTRL 2 R189 1 2 SB_ODT0
1 VSS9 VSS10 A SB_ODT0 <16> 1
R176 DDR_A_DQS#3 27 28 4 2 66.5_0402_1%
24.9_0402_1% DDR_A_DQS3 29 DQS#1 DM1 30 DIMM_DRAMRST# 3 Y G
DQS1 RESET# DIMM_DRAMRST# <16,4> GND
@ 31 32 S
2
3
DDR_A_D30 33 VSS11 VSS12 34 DDR_A_D27 74AUP1G07GW_TSSOP5 M_A_B_DIMM_ODT R190 1 2 SB_ODT1
DQ10 DQ14 SB_ODT1 <16>
DDR_A_D31 35 36 DDR_A_D26 66.5_0402_1%
37 DQ11 DQ15 38
DDR_A_D44 39 VSS13 VSS14 40 DDR_A_D45
DQ16 DQ20 DDR_VTT_PG_CTRL <43>
DDR_A_D41 41 42 DDR_A_D40
43 DQ17 DQ21 44
VSS15 VSS16 DDR_A_DQS#[0..7] <5>
DDR_A_DQS#5 45 46
DDR_A_DQS5 47 DQS#2 DM2 48
DQS2 VSS17 DDR_A_DQS[0..7] <5>
49 50 DDR_A_D42
DDR_A_D43 51 VSS18 DQ22 52 DDR_A_D46
DQ18 DQ23 DDR_A_D[0..63] <5>
DDR_A_D47 53 54
55 DQ19 VSS19 56 DDR_A_D52
All VREF traces should VSS20 DQ28 DDR_A_MA[0..15] <5>
Layout Note: DDR_A_D51 57 58 DDR_A_D53
have 10 mil trace width DDR_A_D50 59 DQ24 DQ29 60
Place near JDIMM1 61 DQ25 VSS21 62 DDR_A_DQS#6
+1.35V 63 VSS22 DQS#3 64 DDR_A_DQS6
65 DM3 DQS3 66
DDR_A_D48 69 DQ26 DQ30 70 DDR_A_D55
DQ27 DQ31
1U_0402_6.3V6K
C107
1U_0402_6.3V6K
C108
1U_0402_6.3V6K
C109
1U_0402_6.3V6K
C110
71 72
VSS25 VSS26
1 1 1 1
@ @
<5> DDRA_CKE0_DIMMA DDRA_CKE0_DIMMA 73 74 DDRA_CKE1_DIMMA DDRA_CKE1_DIMMA <5>

2 2 2 2 75 CKE0 CKE1 76
77 VDD1 VDD2 78 DDR_A_MA15
DDR_A_BS2 79 NC1 A15 80 DDR_A_MA14
<5> DDR_A_BS2 BA2 A14
81 82
DDR_A_MA12 83 VDD3 VDD4 84 DDR_A_MA11
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7
2 87 A9 A7 88 2
+1.35V DDR_A_MA8 89 VDD5 VDD6 90 DDR_A_MA6
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
93 A5 A4 94
DDR_A_MA3 95 VDD7 VDD8 96 DDR_A_MA2
A3 A2
10U_0603_6.3V6M
C111
10U_0603_6.3V6M
C112
10U_0603_6.3V6M
C113
10U_0603_6.3V6M
C114
DDR_A_MA1 97 98 DDR_A_MA0
99 A1 A0 100
1 1 1 1 VDD9 VDD10
<5> SA_CLK_DDR0 SA_CLK_DDR0 101 102 SA_CLK_DDR1 SA_CLK_DDR1 <5>
SA_CLK_DDR#0 103 CK0 CK1 104 SA_CLK_DDR#1
<5> SA_CLK_DDR#0 CK0# CK1# SA_CLK_DDR#1 <5>
105 106
2 2 2 2 DDR_A_MA10 107 VDD11 VDD12 108 DDR_A_BS1
A10/AP BA1 DDR_A_BS1 <5> +1.35V
<5> DDR_A_BS0 DDR_A_BS0 109 110 DDR_A_RAS# DDR_A_RAS# <5>
111 BA0 RAS# 112
DDR_A_WE# 113 VDD13 VDD14 114 DDRA_CS0_DIMMA#
<5> DDR_A_WE# WE# S0# DDRA_CS0_DIMMA# <5>
1
<5> DDR_A_CAS# DDR_A_CAS# 115 116 SA_ODT0
117 CAS# ODT0 118 R56
DDR_A_MA13 119 VDD15 VDD16 120 SA_ODT1 1.8K_0402_1%
DDRA_CS1_DIMMA# 121 A13 ODT1 122
+1.35V <5> DDRA_CS1_DIMMA# S1# NC2
123 124 R296
2
125 VDD17 VDD18 126 +VREF_CA 1 2
NCTEST VREF_CA SM_DIMM_VREFCA <5>
127 128 2_0402_1% 1
VSS27 VSS28
1
EMC@ EMC@ DDR_A_D0 129 130 DDR_A_D5 @
DQ32 DQ36
10U_0603_6.3V6M
C115
10U_0603_6.3V6M
C116
10U_0603_6.3V6M
C117
10U_0603_6.3V6M
C161
2.2U_0402_6.3V6M
0.1U_0402_16V4Z
1 DDR_A_D1 131 132 DDR_A_D4 C162
@ 133 DQ33 DQ37 134 R295 0.022U_0402_25V7K
1 1 1 1 VSS29 VSS30 1 1
+ 2
C119
C120
C118 DDR_A_DQS#0 135 136 @ 1.8K_0402_1%
DQS#4 DM4
1
330U_2.5V_M DDR_A_DQS0 137 138
2
139 DQS4 VSS31 140 DDR_A_D3
2 2 2 2 2 DDR_A_D2 141 VSS32 DQ38 142 DDR_A_D7 2 2 @ R294
SF000006S00 DDR_A_D6 143 DQ34 DQ39 144 24.9_0402_1%
330U 2.5V H4.2 145 DQ35 VSS33 146 DDR_A_D18
2
17mohm OSCON DDR_A_D20 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDR_A_DQS#2
3 153 VSS36 DQS#5 154 DDR_A_DQS2 3
155 DM5 DQS5 156
DDR_A_D16 159 DQ42 DQ46 160 DDR_A_D23
+0.675VS DQ43 DQ47 +VREF_CA <16>
161 162
DDR_A_D33 165 DQ48 DQ52 166 DDR_A_D32
167 DQ49 DQ53 168
VSS41 VSS42
1U_0402_6.3V6K
C121
1U_0402_6.3V6K
C122
1U_0402_6.3V6K
C123
1U_0402_6.3V6K
C124
DDR_A_DQS#4 169 170

DDR_A_DQS4 171 DQS#6 DM6 172
1 1 1 1 DQS6 VSS43
@ @ 173 174 DDR_A_D35
DDR_A_D38 177 DQ50 DQ55 178
2 2 2 2 179 DQ51 VSS45 180 DDR_A_D63
DDR_A_D58 183 DQ56 DQ61 184
185 DQ57 VSS47 186 DDR_A_DQS#7
187 VSS48 DQS#7 188 DDR_A_DQS7
189 DM7 DQS7 190
DDR_A_D61 193 DQ58 DQ62 194 DDR_A_D57
Layout Note: DQ59 DQ63
195 196
Place near JDIMM1.203,204 197 VSS51 VSS52 198
199 SA0 EVENT# 200 D_CK_SDATA
+3VS VDDSPD SDA D_CK_SDATA <16,37,7>
201 202 D_CK_SCLK
SA1 SCL D_CK_SCLK <16,37,7>
+0.675VS 203 204 +0.675VS
VTT1 VTT2
2.2U_0402_6.3V6M
205 206
G1 G2
2
1 1
Channel A
0.1U_0402_16V4Z
C125
C126
0_0402_5%
R211
0_0402_5%
R212
@
@ @ LCN_DAN06-K4406-0100
2 2
SP07000N300
1
CONN@
4 4
<Address: SA1:SA0=00>
DIMM_1 H:4mm
DIS for Standard type Security Classification
2013/09/11
Compal Secret Data
2013/09/24 Title
Compal Electronics, Inc.
UMA for Reverse type
Issued Date Deciphered Date DDRIII DIMMA
Z5WAH M/B LA-B162P
A B C D E
A B C D E
+1.35V
+1.35V +1.35V
JDIMM2
DDR_B_DQS#[0..7] <5>
1
+V_DDR_REFB 1 2
3 VREF_DQ VSS1 4 DDR_B_D12
VSS2 DQ4 DDR_B_DQS[0..7] <5>
R57 DDR_B_D8 5 6 DDR_B_D9
R297 1.8K_0402_1% DDR_B_D14 7 DQ0 DQ5 8
DQ1 VSS3 DDR_B_D[0..63] <5>
2_0402_1% 9 10 DDR_B_DQS#1
2
1 2 11 VSS4 DQS#0 12 DDR_B_DQS1
<5> SB_DIMM_VREFDQ DM0 DQS0 DDR_B_MA[0..15] <5>
2.2U_0402_6.3V6M
1 13 14
VSS5 VSS6
1
@ 1 1 DDR_B_D10 15 16 DDR_B_D13
DQ2 DQ6
C127
0.1U_0402_16V4Z
C128
C159 @ DDR_B_D11 17 18 DDR_B_D15
0.022U_0402_25V7K R213 19 DQ3 DQ7 20
2 1.8K_0402_1% DDR_B_D28 21 VSS7 VSS8 22 DDR_B_D25
DQ8 DQ12
1
2 2 DDR_B_D29 23 24 DDR_B_D24
2
25 DQ9 DQ13 26
1 VSS9 VSS10 1
R179 DDR_B_DQS#3 27 28
24.9_0402_1% DDR_B_DQS3 29 DQS#1 DM1 30 DIMM_DRAMRST#
DQS1 RESET# DIMM_DRAMRST# <15,4>
@ 31 32
2
DDR_B_D26 33 VSS11 VSS12 34 DDR_B_D30

DDR_B_D27 35 DQ10 DQ14 36 DDR_B_D31
37 DQ11 DQ15 38
43 DQ17 DQ21 44
DDR_B_DQS#5 45 VSS15 VSS16 46
DDR_B_DQS5 47 DQS#2 DM2 48
49 DQS2 VSS17 50 DDR_B_D47
DDR_B_D46 51 VSS18 DQ22 52 DDR_B_D43
DDR_B_D42 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDR_B_D61
All VREF traces should VSS20 DQ28
Layout Note: DDR_B_D56 57 58 DDR_B_D60
have 10 mil trace width DDR_B_D57 59 DQ24 DQ29 60
Place near JDIMM2 61 DQ25 VSS21 62 DDR_B_DQS#7
+1.35V 63 VSS22 DQS#3 64 DDR_B_DQS7
65 DM3 DQS3 66
DQ27 DQ31
1U_0402_6.3V6K
C129
1U_0402_6.3V6K
C130
1U_0402_6.3V6K
C131
1U_0402_6.3V6K
C132
71 72
VSS25 VSS26
1 1 1 1
@ @
<5> DDRB_CKE0_DIMMB DDRB_CKE0_DIMMB 73 74 DDRB_CKE1_DIMMB DDRB_CKE1_DIMMB <5>

2 2 2 2 75 CKE0 CKE1 76
77 VDD1 VDD2 78 DDR_B_MA15
DDR_B_BS2 79 NC1 A15 80 DDR_B_MA14
<5> DDR_B_BS2 BA2 A14
81 82
DDR_B_MA12 83 VDD3 VDD4 84 DDR_B_MA11
DDR_B_MA9 85 A12/BC# A11 86 DDR_B_MA7
2 87 A9 A7 88 2
+1.35V DDR_B_MA8 89 VDD5 VDD6 90 DDR_B_MA6
DDR_B_MA5 91 A8 A6 92 DDR_B_MA4
93 A5 A4 94
DDR_B_MA3 95 VDD7 VDD8 96 DDR_B_MA2
A3 A2
10U_0603_6.3V6M
C133
10U_0603_6.3V6M
C134
10U_0603_6.3V6M
C135
10U_0603_6.3V6M
C136
DDR_B_MA1 97 98 DDR_B_MA0
99 A1 A0 100
1 1 1 1 VDD9 VDD10
<5> SB_CLK_DDR0 SB_CLK_DDR0 101 102 SB_CLK_DDR1 SB_CLK_DDR1 <5>
SB_CLK_DDR#0 103 CK0 CK1 104 SB_CLK_DDR#1
<5> SB_CLK_DDR#0 CK0# CK1# SB_CLK_DDR#1 <5>
105 106
2 2 2 2 DDR_B_MA10 107 VDD11 VDD12 108 DDR_B_BS1
A10/AP BA1 DDR_B_BS1 <5>
<5> DDR_B_BS0 DDR_B_BS0 109 110 DDR_B_RAS# DDR_B_RAS# <5>
111 BA0 RAS# 112
DDR_B_WE# 113 VDD13 VDD14 114 DDRB_CS0_DIMMB#
<5> DDR_B_WE# WE# S0# DDRB_CS0_DIMMB# <5>
<5> DDR_B_CAS# DDR_B_CAS# 115 116 SB_ODT0 SB_ODT0 <15>
117 CAS# ODT0 118
DDR_B_MA13 119 VDD15 VDD16 120 SB_ODT1
A13 ODT1 SB_ODT1 <15>
<5> DDRB_CS1_DIMMB# DDRB_CS1_DIMMB# 121 122
+1.35V 123 S1# NC2 124
125 VDD17 VDD18 126 +VREF_CA
NCTEST VREF_CA +VREF_CA <15>
127 128
DQ32 DQ36
10U_0603_6.3V6M
C137
10U_0603_6.3V6M
C138
10U_0603_6.3V6M
C139
2.2U_0402_6.3V6M
DDR_B_D1 131 132 DDR_B_D0
133 DQ33 DQ37 134
1 1 1 VSS29 VSS30 1 1
C141
0.1U_0402_16V4Z
C142
DDR_B_DQS#0 135 136 @
@ 139 DQS4 VSS31 140 DDR_B_D2
2 2 2 DDR_B_D3 141 VSS32 DQ38 142 DDR_B_D6 2 2
DDR_B_D7 143 DQ34 DQ39 144
145 DQ35 VSS33 146 DDR_B_D16
DDR_B_D20 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDR_B_DQS#2
3 153 VSS36 DQS#5 154 DDR_B_DQS2 3
155 DM5 DQS5 156
DDR_B_D23 159 DQ42 DQ46 160 DDR_B_D18
+0.675VS 161 DQ43 DQ47 162
DDR_B_D33 165 DQ48 DQ52 166 DDR_B_D32
167 DQ49 DQ53 168
VSS41 VSS42
1U_0402_6.3V6K
C143
1U_0402_6.3V6K
C144
1U_0402_6.3V6K
C145
1U_0402_6.3V6K
C146
DDR_B_DQS#4 169 170

1 1 1 1 DQS6 VSS43
@ @ 173 174 DDR_B_D34
DDR_B_D39 177 DQ50 DQ55 178
2 2 2 2 179 DQ51 VSS45 180 DDR_B_D51
+3VS DDR_B_D49 183 DQ56 DQ61 184
185 DQ57 VSS47 186 DDR_B_DQS#6
187 VSS48 DQS#7 188 DDR_B_DQS6
DM7 DQS7
2
189 190
R229 DDR_B_D48 191 VSS49 VSS50 192 DDR_B_D54
10K_0402_5% DDR_B_D53 193 DQ58 DQ62 194 DDR_B_D50
Layout Note: DQ59 DQ63
195 196
Place near JDIMM2.203,204 197 VSS51 VSS52 198
1
199 SA0 EVENT# 200 D_CK_SDATA

+3VS VDDSPD SDA D_CK_SDATA <15,37,7>
201 202 D_CK_SCLK
SA1 SCL D_CK_SCLK <15,37,7>
+0.675VS 203 204 +0.675VS
VTT1 VTT2
2.2U_0402_6.3V6M
205 206
G1 G2
2
1 1
Channel B
0.1U_0402_16V4Z
C147
C148
0_0402_5%
R231
@
@ LCN_DAN06-K4406-0100
2 2
SP07000N300
1
CONN@
4 4
<Address: SA1:SA0=10>
DIMM_2 H:4mm
DIS for Standard type Security Classification
2013/09/11
Compal Secret Data
2013/09/24 Title
UMA for Reverse type
Issued Date Deciphered Date DDRIII DIMMB
Z5WAH M/B LA-B162P
A B C D E
A B C D E
UGPU1A
GPIO I/O USAGE
Part 1 of 6 +3VSDGPU_AON
AG6 C6 GC6_FB_EN GC6_FB_EN <8> RP2000
GPIO0 I GC6_FB_EN
<10> PEG_HTX_C_GRX_P0 PEX_RX0 GPIO0
AG7 B2 10K_0804_8P4R_5%
<10> PEG_HTX_C_GRX_N0 PEX_RX0_N GPIO1
AF7 D6 GPIO8_OVERT 8 1 GPIO1 O MEM_VDD_CTL
<10> PEG_HTX_C_GRX_P1 PEX_RX1 GPIO2
AE7 C7 GPIO9_ALERT 7 2
AE9 F9 GPIO9_ALERT_GATE 6 3
<10> PEG_HTX_C_GRX_P2 PEX_RX2 GPIO4 3VSDGPU_MAIN_EN <38,49>
AF9 A3 3VSDGPU_MAIN_EN ACIN_BUF 5 4 GPIO2 O LCD_BL_PWM
AG9 A4 GPU_EVENT#
<10> PEG_HTX_C_GRX_P3 PEX_RX3 GPIO6 GPU_EVENT# <9>
AG10 B6 VGA@
AF10 A6 GPIO8_OVERT N14x for GPIO8 GPIO3 O LCD_VCC
AE10 NC OVERT F8 GPIO9_ALERT
AE12 NC GPIO9 C5 N15x for OVERT +3VSDGPU_AON
1 NC GPIO10 1
AF12 E7 DGPU_VID RP2001 GPIO4 O LCD_BL_EN
AG12 NC GPIO11 D7 ACIN_BUF DGPU_VID <49> 10K_0804_8P4R_5%
AG13 NC GPIO12 B4 PSI ACIN_BUF 2 1 GPU_EVENT# 8 1
GPIO
AF13 NC GPIO13 B3 PSI <49> D2000 DGPU_AC_DETECT <34,9> 3VSDGPU_MAIN_EN 7 2
AE13 NC GPIO14 C3 RB751V-40_SOD323-2 GPU_PEX_RST_HOLD# 6 3
GPIO5 O 3V3_MAIN_EN
AE15 NC GPIO15 D5 VGA@ GC6_FB_EN 5 4
AF15 NC GPIO16 D4
AG15 NC GPIO17 C2 GC6@
GPIO6 I GPU_EVENT#
AG16 NC GPIO18 F7
AF16 NC GPIO19 E6
AE16 NC GPIO20 C4 GPU_PEX_RST_HOLD#
GPIO7 O 3D Vision
AE18 NC GPIO21 +3VSDGPU_AON
AF18 NC AB6
AG18 NC PEX_WAKE_NC GPIO8 I SYS_PEX_RST_MON#
AG19 NC SYS_PEX_RST_MON# 2 R2056 1 10K_0402_5%
AF19 NC @
AE19 NC I2CS_SDA 1 VGA@ 21.8K_0402_5%
GPIO9 I/O ALERT
AE21 NC AG3 R2000
AF21 NC NC AF4 I2CS_SCL 1 VGA@ 21.8K_0402_5%
AG21 NC NC AF3 R2001
GPIO10 O MEM_VREF_CTL
AG22 NC NC
NC PSI 2 VGA@ 1 10K_0402_5%
R2052 GPIO11 O PWM_VID
<10> PEG_GTX_HRX_P0 AC9 AE3
PEX_TX0 NC
DACs
<10> PEG_GTX_HRX_N0 AB9 AE4
AB10 PEX_TX0_N NC
<10> PEG_GTX_HRX_P1 PEX_TX1
<10> PEG_GTX_HRX_N1 AC10 GPIO12 I PWR_LEVEL
PEX_TX1_N
PCI EXPRESS
<10> PEG_GTX_HRX_P2 AD11
AC11 PEX_TX2 W5 PLTRST_VGA#
<10> PEG_GTX_HRX_N2 PEX_TX2_N NC
<10> PEG_GTX_HRX_P3 AC12 AE2 GPIO13 O PSI
AB12 PEX_TX3 TSEN_VREF AF2
<10> PEG_GTX_HRX_N3 PEX_TX3_N NC
AB13
NC
2
AC13 GPIO14 I HPD_A
2 AD14 NC 2
AC14 NC GPIO8_OVERT 1 6
NC GPU_OVERT <34>
AC15 VGA@ GPIO15 I HPD_C
AB15 NC DMN66D0LDW-7_SOT363-6
AB16 NC B7 R2003 1 VGA@ 2 1.8K_0402_5%
NC I2CA_SCL Q2000A
AC16 A7 R2004 1 VGA@ 2 1.8K_0402_5% GPIO16 RESERVED
AD17 NC I2CA_SDA
AC17 NC C9 R2005 1 VGA@ 2 1.8K_0402_5% GPIO9_ALERT_GATE
AC18 NC I2CB_SCL C8 R2006 1 VGA@ 2 1.8K_0402_5%
NC I2CB_SDA GPIO17 I HPD_D
I2C
AB18
NC
5
AB19 A9 R2007 1 VGA@ 2 1.8K_0402_5%
AC19 NC I2CC_SCL B9 R2008 1 VGA@ 2 1.8K_0402_5%
AD20 NC I2CC_SDA GPIO9_ALERT 4 3
GPIO18 I HPD_E
NC GPU_ALERT <34>
AC20 D9 I2CS_SCL VGA@
AC21 NC I2CS_SCL D8 I2CS_SDA DMN66D0LDW-7_SOT363-6
AB21 NC I2CS_SDA GPIO19 I HPD_F or HPD_B
NC Q2000B
AD23 Place Under L6
AE23 NC
AF24 NC VGA@
GPIO20 Reserved
AE24 NC L6 +PLLVDD 1 2
AG24 NC PLLVDD M6 C2000 0.1U_0402_16V4Z
AG25 NC SP_PLLVDD GPIO21 O GPU_PEX_RST_HOLD#
NC N6 VGA@ +3VSDGPU_AON
NC +GPU_PLLVDD 1 2
C2001
GPIO22
2
+3VSDGPU_AON 1 VGA@ 2 AE8 0.1U_0402_16V4Z
<7> CLK_PEG_VGA PEX_REFCLK
R2009 10K_0402_5% AD8 GPIO23
<7> CLK_PEG_VGA# PEX_REFCLK_N
PEG_CLKREQ# AC6 Place Under M6 I2CS_SCL 1 6
<7> PEG_CLKREQ# PEX_CLKREQ_N EC_SMB_CK2 <34,7>
VGA@
PEX_TSTCLK_OUT+ AF22 DMN66D0LDW-7_SOT363-6
CLK
2 @ 1 PEX_TSTCLK_OUT- AE22 PEX_TSTCLK_OUT C11 XTALIN

GPIO24
PEX_TSTCLK_OUT_N XTAL_IN Q2001A
R2010 200_0402_1% B10 XTALOUT
XTAL_OUT +3VSDGPU_AON
3 PLTRST_VGA# AC7 A10 XTAL_SSIN R2012 1 VGA@ 2 10K_0402_5% 3
PEX_RST_N XTAL_SSIN
5
2 VGA@ 1 PEX_TREMP AF25 C10 XTAL_OUTBUFF
R2013 1 VGA@ 2 10K_0402_5%
R2011 2.49K_0402_1% PEX_TERMP XTAL_OUTBUFF
I2CS_SDA 4 3
EC_SMB_DA2 <34,7>
GM108-ES-S-A1_FCBGA595 VGA@
@ Q2001B
SM010019400 3000ma 33ohm@100mhz DCR 0.05

38mA +1.05VSDGPU
D2001 VGA@
GC6_FB_EN 2 +PLLVDD 1 2 27MHZ_10PF_7V27000023
GC6 2.0 function 1 1.5VS_DGPU_PWR_EN 1.5VS_DGPU_PWR_EN <38,48> L2000 CHILISIN PBY160808T-330Y-N
3 1 XTALOUT 3 1 XTALIN
C2003 3 1
PLL_VDD
1
GND GND
10P_0402_50V8J
10P_0402_50V8J
BAV70W_SOT323-3 VGA@ 1 1
GC6@ R2014
0.1Ux1, 22Ux1 22U_0603_6.3V6M VGA@ VGA@ X2000 VGA@
10K_0402_5% 33ohm(ESR0.05)x1 2 4 2
R2016 GC6@ Near GPU C2004 C2005
1 NGC6@ 2 2 2
<38,49> VGA_PWROK
2
SM010028480 1500ma 180ohm@100mhz DCR 0.18

0_0402_5% 17mA
Crystals must have a max ESR of 80 ohm
+3VSDGPU_AON VGA@
+GPU_PLLVDD 1 2
5
U2001 VGA@ L2001 BLM18PG181SN1D_2P DVT modify 11/27

PLT_RST# 2 SP_PLLVDD+VID_PLLVDD TXC recommend from 18P change to 10P
1 1
P
<34,35,8> PLT_RST# B X2000 from SJ100009700 change to SJ10000G300

4SYS_PEX_RST_MON# C2006 C2007
DGPU_HOLD_RST# 1 Y SYS_PEX_RST_MON# <19> 0.1Ux2, 4.7Ux1,22Ux1 VGA@ VGA@
<8,9> DGPU_HOLD_RST# A
G
4 180ohm(ESR0.2)x1 4.7U_0603_6.3V6K 22U_0603_6.3V6M 4

+3VSDGPU_AON R2019 R2017 2 2
3
MC74VHC1G08DFT2G_SC70-5 0_0402_5% 10K_0402_5% Near GPU

NGC6@ VGA@
1
R2055
D2002 10K_0402_5%
SYS_PEX_RST_MON# 2 GC6@
2
1 PLTRST_VGA#
Issued Date 2013/09/11 Deciphered Date 2013/09/24 Title
GPU_PEX_RST_HOLD# 3 DVT modify 11/20
use diode need to pull high
use AND gate need to pull down THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N15X PEG 1/7
BAT54A-7-F_SOT23-3 Size Document Number Rev
GC6@ DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.3
Z5WAH M/B LA-B162P
A B C D E
A B C D E
VRAM Interface
UGPU1
UGPU1B N15V-GM
VGM@
SA00007BR00
MDA[15..0]
1 <22> MDA[15..0] 1
Part 2 of 6
MDA[31..16] CMDA[31..0] <22,23>
UGPU1
<22> MDA[31..16]
MDA0 E18 C27 CMDA0
MDA[47..32] MDA1 F18 FBA_D00 FBA_CMD0 C26 CMDA1
<23> MDA[47..32] FBA_D01 FBA_CMD1
MDA2 E16 E24 CMDA2
MDA[63..48] MDA3 F17 FBA_D02 FBA_CMD2 F24 CMDA3
<23> MDA[63..48] FBA_D03 FBA_CMD3
MDA4 D20 D27 CMDA4
MDA5 D21 FBA_D04 FBA_CMD4 D26 CMDA5 N15V-GT
MDA6 F20 FBA_D05 FBA_CMD5 F25 CMDA6 SGT@
MDA7 E21 FBA_D06 FBA_CMD6 F26 CMDA7
FBA_D07 FBA_CMD7 SA00007GJ00
MDA8 E15 F23 CMDA8
MDA9 D15 FBA_D08 FBA_CMD8 G22 CMDA9
MDA10 F15 FBA_D09 FBA_CMD9 G23 CMDA10 UGPU1
MDA11 F13 FBA_D10 FBA_CMD10 G24 CMDA11
MDA12 C13 FBA_D11 FBA_CMD11 F27 CMDA12
MDA13 B13 FBA_D12 FBA_CMD12 G25 CMDA13
MDA14 E13 FBA_D13 FBA_CMD13 G27 CMDA14
MDA15 D13 FBA_D14 FBA_CMD14 G26 CMDA15
MDA16 B15 FBA_D15 FBA_CMD15 M24 CMDA16 N15V-GL
MDA17 C16 FBA_D16 FBA_CMD16 M23 CMDA17 VGL@
MDA18 A13 FBA_D17 FBA_CMD17 K24 CMDA18
FBA_D18 FBA_CMD18 SA00007OO00
MDA19 A15 K23 CMDA19
MDA20 B18 FBA_D19 FBA_CMD19 M27 CMDA20
MDA21 A18 FBA_D20 FBA_CMD20 M26 CMDA21
MDA22 A19 FBA_D21 FBA_CMD21 M25 CMDA22
MDA23 C19 FBA_D22 FBA_CMD22 K26 CMDA23
MDA24 B24 FBA_D23 FBA_CMD23 K22 CMDA24
MDA25 C23 FBA_D24 FBA_CMD24 J23 CMDA25
MDA26 A25 FBA_D25 FBA_CMD25 J25 CMDA26
MDA27 A24 FBA_D26 FBA_CMD26 J24 CMDA27
MDA28 A21 FBA_D27 FBA_CMD27 K27 CMDA28
MDA29 B21 FBA_D28 FBA_CMD28 K25 CMDA29
MDA30 C20 FBA_D29 FBA_CMD29 J27 CMDA30
2 MDA31 C21 FBA_D30 FBA_CMD30 J26 CMDA31 2
MDA32 R22 FBA_D31 FBA_CMD31
FBA_D32 DQMA[3..0] <22>
MDA33 R24 D19 DQMA0
INTERFACE A
MDA34 T22 FBA_D33 FBA_DQM0 D14 DQMA1
MDA35 R23 FBA_D34 FBA_DQM1 C17 DQMA2
MDA36 N25 FBA_D35 FBA_DQM2 C22 DQMA3
FBA_D36 FBA_DQM3 DQMA[7..4] <23>
MDA37 N26 P24 DQMA4
MEMORY
MDA38 N23 FBA_D37 FBA_DQM4 W24 DQMA5
MDA39 N24 FBA_D38 FBA_DQM5 AA25 DQMA6
MDA40 V23 FBA_D39 FBA_DQM6 U25 DQMA7
NV 15x DG‐06803‐V03 MDA41
MDA42
V22
T23
FBA_D40
FBA_D41
FBA_DQM7
F19 DQSA#0
DQSA#[3..0] <22>
MDA43 U22 FBA_D42 FBA_DQS_RN0 C14 DQSA#1
MDA44 Y24 FBA_D43 FBA_DQS_RN1 A16 DQSA#2
MDA45 AA24 FBA_D44 FBA_DQS_RN2 A22 DQSA#3
FBA_D45 FBA_DQS_RN3 DQSA#[7..4] <23>
MDA46 Y22 P25 DQSA#4
MDA47 AA23 FBA_D46 FBA_DQS_RN4 W22 DQSA#5
MDA48 AD27 FBA_D47 FBA_DQS_RN5 AB27 DQSA#6
MDA49 AB25 FBA_D48 FBA_DQS_RN6 T27 DQSA#7
MDA50 AD26 FBA_D49 FBA_DQS_RN7
FBA_D50 DQSA[3..0] <22>
MDA51 AC25 E19 DQSA0
MDA52 AA27 FBA_D51 FBA_DQS_WP0 C15 DQSA1
MDA53 AA26 FBA_D52 FBA_DQS_WP1 B16 DQSA2
MDA54 W26 FBA_D53 FBA_DQS_WP2 B22 DQSA3
FBA_D54 FBA_DQS_WP3 DQSA[7..4] <23>
SM010019400 3000ma 33ohm@100mhz DCR 0.05 MDA55 Y25 R25 DQSA4
MDA56 R26 FBA_D55 FBA_DQS_WP4 W23 DQSA5
MDA57 T25 FBA_D56 FBA_DQS_WP5 AB26 DQSA6
MDA58 N27 FBA_D57 FBA_DQS_WP6 T26 DQSA7
+1.05VSDGPU MDA59 R27 FBA_D58 FBA_DQS_WP7
MDA60 V26 FBA_D59
VGA@
15+55mA MDA61 V27 FBA_D60
2 1 L2002 +FB_PLLAVDD MDA62 W27 FBA_D61
FBA_D62
22U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CHILISIN PBY160808T-330Y-N MDA63 W25

3 FBA_D63 D24 3
FBA_CLK0 CLKA0 <22>
1 2 2 2 F16 D25
FB_PLLAVDD_1 FBA_CLK0_N CLKA0# <22>
P22
C2008 C2011 C2010 C2009 FB_PLLAVDD_2 N22
FBA_CLK1 CLKA1 <23>
VGA@ VGA@ VGA@ VGA@ T97 @ D23 M22
2 1 1 1 FB_VREF_PROBE FBA_CLK1_N CLKA1# <23>
D18
H22 FBA_WCK01 C18
FB_DLLAVDD FBA_WCK01_N D17
Place Near GPU Place Under F16 P22 H22 1 VGA@ 2 FB_CLAMP F3 FBA_WCK23 D16
10K_0402_5% R2028 FB_CLAMP FBA_WCK23_N T24
NC
FBA_WCK45 U24
60.4_0402_1% 1 @ 2 R2020FBA_CMD34 F22 FBA_WCK45_N V24
60.4_0402_1% 1 @ 2 R2022FBA_CMD35 J22 FBA_CMD34 FBA_WCK67 V25
+1.5VSDGPU FBA_CMD35 FBA_WCK67_N
GM108-ES-S-A1_FCBGA595
4 4

N15X VRAM 2/7
Z5WAH M/B LA-B162P
A B C D E
A B C D E
UGPU1C MULTI LEVEL STRAPS
Part 3 of 6 F11
AC3 NC AD10 +3VSDGPU_AON +3VSDGPU_MAIN
AC4 NC NC AD7
Y4 NC NC B19 strap0 strap1 strap2 strap3 strap4
Y3 NC FBA_CMD32 V5
NC NC
1
AA3 V6
AA2 NC NC G1 R2029 R2030 R2031 R2032 R2033 R2035 R2036 R2037
AB1 NC NC G2 @ @ @ @ @ @ @ @
NC NC
NC
AA1 G3 45.3K_0402_1% 4.99K_0402_1% 20K_0402_1% 4.99K_0402_1% 10K_0402_1% 30K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
AA4 NC NC G4
2
AA5 NC NC G5
1 NC NC 1
G6
NC G7 STRAP0
AB5 NC V1 STRAP1 ROM_SI
AB4 NC NC V2 STRAP2 ROM_SO
AB3 NC NC W1 STRAP3 ROM_SCLK
AB2 NC NC W2 STRAP4
AD3 NC NC W3
AD2 NC NC W4
NC NC
1
AE1
AD1 NC R2038 R2039 R2040 R2041 R2042 R2044 R2045 R2046
AD4 NC @ @ @ @ @ @ @ @
NC For GC62.0 use
AD5 D11 R2050 1 @ 2 10K_0402_5% 4.99K_0402_1% 34.8K_0402_1% 15K_0402_1% 4.99K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1% 4.99K_0402_1%
NC BUFRST_N N14x for CEC ,NC
2
D10 N15x for GPIO8
T2 NC
T3 NC E9 SYS_PEX_RST_MON#
NC GPIO8 SYS_PEX_RST_MON# <17>
T1
R1 NC E10
R2 NC NC
GENERAL
NC
LVDS/TMDS
R3 F10
N2 NC NC
N3 NC
NC D1 STRAP0
STRAP0 D2 STRAP1
V3 STRAP1 E4 STRAP2
V4 NC STRAP2 E3 STRAP3
U3 NC STRAP3 D3 STRAP4
U4 NC STRAP4 C1
T4 NC NC
T5 NC
R4 NC F6 MULTI_STRAP_REF0_GND 1 SGT@ 2
R5 NC MULTI_STRAP_REF0_GND F4 R2051 40.2K_0402_1%
NC NC F5
2 NC 2
N1
M1 NC
M2 NC F12
M3 NC THERMDP For N15S-GT Binary strap table Decive ID : 0x1341
K2 NC E12 GPU X76 Freq Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 ROM_SI ROM_SO ROM_SCLK
K3 NC THERMDN
NC
K1
NC X76550BOL01 0x7 (SA000067550) Micron MT41J128M16JT-093G:K PD 45.3K
J1
NC
X76550BOL02 1GHz 128Mx16x4 0x8 (SA000068U90) Samsung K4W2G1646Q-BC1A PU 4.99K
M4
NC VDD_SENSE
F2 VCCSENSE_VGA
VCCSENSE_VGA <49> N15S-GT X76550BOL07 0x6 (SA00006H430) Hynix H5TC2G63FFR-11C PD 34.8K
M5 PU 50K NC NC NC NC PD 4.99K PD 4.99K
NC
L3
NC X76550BOL05 0x1 (SA000077K20) Micron MT41J256M16HA-093G:E PD 10K
L4
K4 NC 2GHz 256Mx16x4 0x2 (SA000076P20) Samsung K4W4G1646D-BC1A PD 15K
NC
K5
NC X76550BOL06 0x0 (SA00006E840) Hynix H5TC4G63AFR-11C PD 4.99K
J4 F1 VSSSENSE_VGA
NC GND_SENSE VSSSENSE_VGA <49>
J5
N4 NC For N15V-GL/GM Binary strap table Decive ID : 0x1140
N5 NC
NC
TEST GPU X76 Freq Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 ROM_SI ROM_SO ROM_SCLK
P3
NC TESTMODE
AD9 TESTMODE R2054 1 VGA@ 2 10K_0402_5% X76550BOL03 0x1 (SA000067550) Micron MT41J128M16JT-093G:K PU 10K PD10K PD 10K PD 10K
P4 AE5 JTAG_TCK PAD @ T18
NC JTAG_TCK
JTAG_TDI
AE6 JTAG_TDI PAD @ T1 X76550BOL04 0x5 (SA000068U00) Samsung K4W2G1646E-BC1A PU 10K PD10K PU 10K PD 10K
AF6 JTAG_TDO PAD @ T186 1GHz 128Mx16x4
JTAG_TDO
J2
NC JTAG_TMS
AD6 JTAG_TMS PAD @ T3 X76550BOL08 0xC (SA00006H430) Hynix H5TC2G63FFR-11C PD 10K PD10K PU 10K PU 10K
J3
NC JTAG_TRST_N
AG4 JTAG_RST R2053 1 VGA@ 210K_0402_5% N15V-GL
0xE (SA000068U90) Samsung K4W2G1646Q-BC1A PD 10K PU 10K PU 10K PU 10K PD 10K PD 10K PD 10K PD 10K
3 N15V-GM 3
H3 0x9 (SA000076P20) Samsung K4W4G1646D-BC1A PU 10K PD10K PD 10K PU 10K
H4 NC
NC SERIAL 2GHz 256Mx16x4 0xD (SA000077K20) Micron MT41J256M16HA-093G:E PU 10K PD10K PU 10K PU 10K
D12
ROM_CS_N B12 ROM_SI 0x4 (SA00006E840) Hynix H5TC4G63AFR-11C PD 10K PD10K PU 10K PD 10K
ROM_SI A12 ROM_SO
ROM_SO C12 ROM_SCLK
ROM_SCLK
4 4

N15X LVDS 3/7
Custom 0.3
Z5WAH M/B LA-B162P
A B C D E
A B C D E
NV 15x DG‐06803‐V03
1 1
UGPU1D +1.05VSDGPU
+1.5VSDGPU 3.24A 1.275A
Part 4 of 6
4.7U_0603_6.3V6K
B26 AA10
FBVDDQ_01 PEX_IOVDDQ_1
10U_0603_6.3V6M
22U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
C25 AA12
VGA@ C2039 FBVDDQ_02 PEX_IOVDDQ_2
VGA@ C2040
VGA@ C2032
VGA@ C2033
VGA@ C2021
VGA@ C2022
VGA@ C2013
VGA@ C2014
VGA@ C2016
VGA@ C2017
1 1 1 1 2 2 E23 AA13 1 1 1 1
E26 FBVDDQ_03 PEX_IOVDDQ_3 AA16
F14 FBVDDQ_04 PEX_IOVDDQ_4 AA18
F21 FBVDDQ_05 PEX_IOVDDQ_5 AA19
2 2 2 2 1 1 G13 FBVDDQ_06 PEX_IOVDDQ_6 AA20 2 2 2 2
G14 FBVDDQ_07 PEX_IOVDDQ_7 AA21
G15 FBVDDQ_08 PEX_IOVDDQ_8 AB22
Under GPU G16 FBVDDQ_09 PEX_IOVDDQ_9 AC23
G18 FBVDDQ_10 PEX_IOVDDQ_10 AD24
10U_0603_6.3V6M
G19 AE25 Under GPU Near GPU
22U_0603_6.3V6M
VGA@ C2045
VGA@ C2047
1 1 G20 AF26 Midway GPU & Power supply
G21 FBVDDQ_13 PEX_IOVDDQ_13 AF27
H24 FBVDDQ_14 PEX_IOVDDQ_14
H26 FBVDDQ_AON
2 2 J21 FBVDDQ_AON AA22
K21 FBVDDQ_AON PEX_IOVDD_1 AB23
L22 FBVDDQ_AON PEX_IOVDD_2 AC24
L24 FBVDDQ_19 PEX_IOVDD_3 AD25
Near GPU
POWER
L26 FBVDDQ_20 PEX_IOVDD_4 AE26
M21 FBVDDQ_21 PEX_IOVDD_5 AE27
2 N21 FBVDDQ_22 PEX_IOVDD_6 2
R21 FBVDDQ_23
T21 FBVDDQ_24
V21 FBVDDQ_25 +3VSDGPU_AON
W21 FBVDDQ_26
FBVDDQ_27 G10
3V3_AON
1U_0402_6.3V6K
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
G12 56mA
3V3_AON
VGA@ C2048
VGA@ C2049
VGA@ C2050
G8 2 1 1
VDD33_3 G9
VDD33_4
V7 1 2 2
W7 NC +1.5VSDGPU
AA6 NC
W6 NC D22 FB_CAL_PD_VDDQ 1 VGA@ 2
NC FB_CAL_PD_VDDQ Under GPU Near GPU
Y6 40.2_0402_1% R2078 +3VSDGPU_MAIN
NC
C24 FB_CAL_PU_GND 1 VGA@ 2
FB_CAL_PU_GND 42.2_0402_1% R2079
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
VGA@ C2051
VGA@ C2052
VGA@ C2053
VGA@ C2054
M7 B25 FB_CAL_TERM_GND1 VGA@ 2 2 2 1 1
N7 NC FB_CAL_TERM_GND 51.1_0402_1% R2080
T6 NC
P6 NC
NC 1 1 2 2
T7 Under GPU Near GPU
R7 IFPD_PLLVDD_2 +3VSDGPU_AON
U6 NC
R6 IFPD_RSET AA8
286mA
NC PEX_PLL_HVDD_1 AA9
PEX_PLL_HVDD_2
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
VGA@ C2034
VGA@ C2035
VGA@ C2036
3 AB8 2 1 1 3
PEX_SVDD_3V3
J7
K7 NC 1 2 2
K6 NC AA14
H6 NC PEX_PLLVDD_1 AA15
J6 NC PEX_PLLVDD_2
NC Near GPU
+1.05VSDGPU
130mA +PEX_PLLVDD 2 1
0.1U_0402_16V4Z
R2075 SGT@ 0_0603_5%
VGA@ C2041
VGA@ C2042
VGA@ C2043
1U_0402_6.3V6K
4.7U_0603_6.3V6K
2 1 1
@ 1 2 2
Under GPU Near GPU
R2075 R2075
BLM18PG121SN1D_0603 BLM18PG121SN1D_0603
VGL@ VGM@
4 SM010028800 SM010028800 4
SM010028800 2000ma 120ohm@100mhz DCR 0.1

N15X POWER & GND 4/9
Z5WAH M/B LA-B162P
A B C D E
A B C D E
UGPU1F
UGPU1E +VGA_CORE +VGA_CORE
Part 6 of 6
A2
A26 GND_001
Part 5 of 6
GND_057
K11
K13 K10 V18
NV 15x DG‐06803‐V03
AB11 GND_002 GND_058 K15 K12 VDD_001 VDD_041 V16
1 GND_003 GND_059 VDD_002 VDD_040 1
AB14 K17 K14 V14
AB17 GND_004 GND_060 L10 K16 VDD_003 VDD_039 V12
AB20 GND_005 GND_061 L12 K18 VDD_004 VDD_038 V10
AB24 GND_006 GND_062 L14 L11 VDD_005 VDD_037 U17
GND_007 GND_063 VDD_006 VDD_036
POWER
AC2 L16 L13 U15
AC22 GND_008 GND_064 L18 L15 VDD_007 VDD_035 U13
AC26 GND_009 GND_065 L2 L17 VDD_008 VDD_034 U11
AC5 GND_010 GND_066 L23 M10 VDD_009 VDD_033 T18
AC8 GND_011 GND_067 L25 M12 VDD_010 VDD_032 T16
AD12 GND_012 GND_068 L5 M14 VDD_011 VDD_031 T14
AD13 GND_013 GND_069 M11 M16 VDD_012 VDD_030 T12
AD15 GND_014 GND_070 M13 M18 VDD_013 VDD_029 T10
AD16 GND_015 GND_071 M15 N11 VDD_014 VDD_028 R17
AD18 GND_016 GND_072 M17 N13 VDD_015 VDD_027 R15
AD19 GND_017 GND_073 N10 N15 VDD_016 VDD_026 R13
AD21 GND_018 GND_074 N12 N17 VDD_017 VDD_025 R11
AD22
AE11
GND_019
GND_020
GND_075
GND_076
N14
N16
P10
P12
VDD_018
VDD_019
VDD_024
VDD_023
P18
P16
DA‐06840‐V03
AE14 GND_021 GND_077 N18 VDD_020 VDD_022 P14
AE17 GND_022 GND_078 P11 VDD_021
AE20 GND_023 GND_079 P13
AF1 GND_024 GND_080 P15
AF11 GND_025 GND_081
GND
P17
AF14 GND_026 GND_082 P2
AF17 GND_027 GND_083 P23
AF20 GND_028 GND_084 P26
AF23 GND_029 GND_085 P5
AF5 GND_030 GND_086 R10
AF8 GND_031 GND_087 R12 GM108-ES-S-A1_FCBGA595
AG2 GND_032 GND_088 R14
AG26 GND_033 GND_089 R16
GND_034 GND_090 @
B1 R18
B11 GND_035 GND_091 T11
2 B14 GND_036 GND_092 T13 2
B17 GND_037 GND_093 T15
B20 GND_038 GND_094 T17
B23 GND_039 GND_095 U10
B27 GND_040 GND_096 U12
B5
B8
GND_041
GND_042
GND_097
GND_098
U14
U16
DA‐06925‐V05
E11 GND_043 GND_099 U18
E14 GND_044 GND_100 U2
E17 GND_045 GND_101 U23
E2 GND_046 GND_102 U26
E20 GND_047 GND_103 U5
E22 GND_048 GND_104 V11
E25 GND_049 GND_105 V13
E5 GND_050 GND_106 V15
E8 GND_051 GND_107 V17
H2 GND_052 GND_108 Y2
H23 GND_053 GND_109 Y23
H25 GND_054 GND_110 Y26
H5 GND_055 GND_111 Y5
GND_056 GND_112
AA7
GND AB7
GND
@ DA07075‐V01
3 3
4 4

N15X POWER & GND 5/7
Z5WAH M/B LA-B162P
A B C D E
A B C D E
VRAM DDR3 chips <18,23> DQSA[7..0]

DQSA[7..0]
DQSA#[7..0]
<18,23> DQSA#[7..0]
DQMA[7..0]
<18,23> DQMA[7..0]
<18,23> MDA[63..0]
MDA[63..0]
CMDA[30..0]
Low 32
<18,23> CMDA[30..0]
Mode D
1 Address 0..31 32..63 1
CMD0 CS0_L#
U2004 X76@ U2005 X76@
CMD1
+MEM_VREF0 M8 E3 MDA12 +MEM_VREF1 M8 E3 MDA3
VREFCA DQL0 VREFCA DQL0
+MEM_VREF1 H1
VREFDQ DQL1
F7 MDA13 +MEM_VREF0 H1
VREFDQ DQL1
F7 MDA4 CMD2 ODT_L
F2 MDA8 F2 MDA2
DQL2 DQL2
CMDA9 N3
A0 DQL3
F8 MDA15 CMDA9 N3
A0 DQL3
F8 MDA7 CMD3 CKE_L
CMDA11 P7 H3 MDA9 Group1 CMDA11 P7 H3 MDA0 Group0
A1 DQL4 A1 DQL4
CMDA8 P3
A2 DQL5
H8 MDA11 CMDA8 P3
A2 DQL5
H8 MDA5 CMD4 A14 A14
CMDA25 N2 G2 MDA10 CMDA25 N2 G2 MDA1
A3 DQL6 A3 DQL6
CMDA10 P8
A4 DQL7
H7 MDA14 CMDA10 P8
A4 DQL7
H7 MDA6 CMD5 RST RST
CMDA24 P2 CMDA24 P2
A5 A5
CMDA22 R8
A6
CMDA22 R8
A6 CMD6 A9 A9
CMDA7 R2 D7 MDA17 CMDA7 R2 D7 MDA27
A7 DQU0 A7 DQU0
CMDA21 T8
A8 DQU1
C3 MDA21 CMDA21 T8
A8 DQU1
C3 MDA29 CMD7 A7 A7
CMDA6 R3 C8 MDA18 CMDA6 R3 C8 MDA25
A9 DQU2 A9 DQU2
CMDA29 L7
A10/AP DQU3
C2 MDA23 CMDA29 L7
A10/AP DQU3
C2 MDA30 CMD8 A2 A2
CMDA23 R7 A7 MDA19 Group2 CMDA23 R7 A7 MDA24 Group3
A11 DQU4 A11 DQU4
CMDA28 N7
A12 DQU5
A2 MDA22 CMDA28 N7
A12 DQU5
A2 MDA28 CMD9 A0 A0
CMDA20 T3 B8 MDA16 CMDA20 T3 B8 MDA26
A13 DQU6 A13 DQU6
CMDA4 T7
A14 DQU7
A3 MDA20 CMDA4 T7
A14 DQU7
A3 MDA31 CMD10 A4 A4
CMDA14 M7 CMDA14 M7
A15/BA3 A15/BA3
+1.5VSDGPU +1.5VSDGPU CMD11 A1 A1
CMDA12 M2
BA0 VDD
B2 CMDA12 M2
BA0 VDD
B2 CMD12 BA0 BA0
CMDA27 N8 D9 CMDA27 N8 D9
BA1 VDD BA1 VDD
CMDA26 M3
BA2 VDD
G7 CMDA26 M3
BA2 VDD
G7 CMD13 WE* WE*
K2 K2
VDD VDD
VDD
K8
VDD
K8 CMD14 A15 A15
N1 N1
VDD VDD
CLKA0 J7
CK VDD
N9 CLKA0 J7
CK VDD
N9 CMD15 CAS* CAS*
CLKA0# K7 R1 CLKA0# K7 R1
CK VDD CK VDD
2 CMDA3 K9
CKE/CKE0 VDD
R9
+1.5VSDGPU
CMDA3 K9
CKE/CKE0 VDD
R9
+1.5VSDGPU
CMD16 CS0_H# 2
CMD17
CMDA2 K1 A1 CMDA2 K1 A1
ODT/ODT0 VDDQ ODT/ODT0 VDDQ
CMDA0 L2
CS/CS0 VDDQ
A8 CMDA0 L2
CS/CS0 VDDQ
A8 CMD18 ODT_H
CMDA30 J3 C1 CMDA30 J3 C1
RAS VDDQ RAS VDDQ
CMDA15 K3
CAS VDDQ
C9 CMDA15 K3
CAS VDDQ
C9 CMD19 CKE_H
CMDA13 L3 D2 CMDA13 L3 D2
WE VDDQ WE VDDQ
310mAVDDQ E9
VDDQ
E9 CMD20 A13 A13
F1 310mAVDDQ F1
VDDQ
DQSA1 F3
DQSL VDDQ
H2 DQSA0 F3
DQSL VDDQ
H2 CMD21 A8 A8
DQSA2 C7 H9 DQSA3 C7 H9
DQSU VDDQ DQSU VDDQ
CMD22 A6 A6
DQMA1 E7
DML VSS
A9 DQMA0 E7
DML VSS
A9 CMD23 A11 A11
DQMA2 D3 B3 DQMA3 D3 B3
DMU VSS DMU VSS
VSS
E1
VSS
E1 CMD24 A5 A5
G8 G8
VSS VSS
DQSA#1 G3
DQSL VSS
J2 DQSA#0 G3
DQSL VSS
J2 CMD25 A3 A3
DQSA#2 B7 J8 DQSA#3 B7 J8
DQSU VSS DQSU VSS
VSS
M1
VSS
M1 CMD26 BA2 BA2
M9 M9
VSS VSS
VSS
P1
VSS
P1 CMD27 BA1 BA1
CMDA5 T2 P9 CMDA5 T2 P9
RESET VSS RESET VSS
VSS
T1
VSS
T1 CMD28 A12 A12
ZQ0 L8 T9 ZQ1 L8 T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS
CMD29 A10 A10
1
1
J1
NC/ODT1 VSSQ
B1 J1
NC/ODT1 VSSQ
B1 CMD30 RAS* RAS*
R2081 VGA@ L1 B9 R2082 VGA@ L1 B9
243_0402_1% J9 NC/CS1 VSSQ D1 243_0402_1% J9 NC/CS1 VSSQ D1
NC/CE1 VSSQ NC/CE1 VSSQ Not Available
L9 D8 L9 D8
2
2
NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
3 VSSQ E8 VSSQ E8
LOW HIGH 3
VSSQ F9 VSSQ F9
VSSQ G1 VSSQ G1
VSSQ G9 VSSQ G9
VSSQ VSSQ Command Bit Default Pull-down
96-BALL 96-BALL ODTx 10k
SDRAM DDR3 SDRAM DDR3
H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 DDR3 CKEx 10k
RST 10k
CS* No Termination
+1.5VSDGPU +1.5VSDGPU
R2085 R2086
VGA@ VGA@
1.33K_0402_1% 1.33K_0402_1%
+1.5VSDGPU CLKA0
<18> CLKA0
1
+MEM_VREF0 +MEM_VREF1
CMDA2 R2093 1 VGA@ 2 10K_0402_5% VGA@
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CMDA3 R2094 1 VGA@ 2 10K_0402_5% 1 1 R2087

VGA@ C2071
VGA@ C2072
VGA@ C2073
VGA@ C2074
VGA@ C2075
VGA@ C2076
VGA@ C2077
VGA@ C2078
VGA@ C2079
VGA@ C2080
VGA@ C2081
VGA@ C2082
1 1 1 1 1 1 1 1 1 1 1 1 CMDA5 R2095 1 VGA@ 2 10K_0402_5% R2091 C2055 R2092 C2056 160_0402_1%

CMDA18 R2098 1 VGA@ 2 10K_0402_5% VGA@ VGA@ VGA@ VGA@
2
CMDA19 R2099 1 VGA@ 2 10K_0402_5% 1.33K_0402_1% 0.1U_0402_16V4Z 1.33K_0402_1% 0.1U_0402_16V4Z CLKA0#
2 2 <18> CLKA0#
4 4
2 2 2 2 2 2 2 2 2 2 2 2

N15X DDR3 6/7
Custom 0.3
Z5WAH M/B LA-B162P
A B C D E
A B C D E
VRAM DDR3 chips <18,22> DQSA[7..0]

DQSA[7..0]
DQSA#[7..0]
Mode D
Address 0..31 32..63
<18,22> DQSA#[7..0]
<18,22> DQMA[7..0]
DQMA[7..0] CMD0 CS0_L#
<18,22> MDA[63..0]
MDA[63..0] CMD1
<18,22> CMDA[30..0]
CMDA[30..0] CMD2 ODT_L
CMD3 CKE_L
1 CMD4 A14 A14 1
High 32 CMD5
CMD6
RST
A9
RST
A9
U2007 X76@ CMD7 A7 A7
U2006 X76@
+MEM_VREF3 M8
VREFCA DQL0
E3 MDA45 CMD8 A2 A2
+MEM_VREF2 M8 E3 MDA39 +MEM_VREF2 H1 F7 MDA40
VREFCA DQL0 VREFDQ DQL1
+MEM_VREF3 H1
VREFDQ DQL1
F7 MDA35
DQL2
F2 MDA46 CMD9 A0 A0
F2 MDA37 CMDA9 N3 F8 MDA41
DQL2 A0 DQL3
CMDA9 N3
A0 DQL3
F8 MDA33 CMDA11 P7
A1 DQL4
H3 MDA47 Group5 CMD10 A4 A4
CMDA11 P7 H3 MDA38 Group4 CMDA8 P3 H8 MDA43
A1 DQL4 A2 DQL5
CMDA8 P3
A2 DQL5
H8 MDA32 CMDA25 N2
A3 DQL6
G2 MDA44 CMD11 A1 A1
CMDA25 N2 G2 MDA36 CMDA10 P8 H7 MDA42
A3 DQL6 A4 DQL7
CMDA10 P8
A4 DQL7
H7 MDA34 CMDA24 P2
A5 CMD12 BA0 BA0
CMDA24 P2 CMDA22 R8
A5 A6
CMDA22 R8
A6
CMDA7 R2
A7 DQU0
D7 MDA53 CMD13 WE* WE*
CMDA7 R2 D7 MDA61 CMDA21 T8 C3 MDA49
A7 DQU0 A8 DQU1
CMDA21 T8
A8 DQU1
C3 MDA59 CMDA6 R3
A9 DQU2
C8 MDA55 CMD14 A15 A15
CMDA6 R3 C8 MDA60 CMDA29 L7 C2 MDA50
A9 DQU2 A10/AP DQU3
CMDA29 L7
A10/AP DQU3
C2 MDA57 CMDA23 R7
A11 DQU4
A7 MDA52 Group6 CMD15 CAS* CAS*
CMDA23 R7 A7 MDA63 Group7 CMDA28 N7 A2 MDA48
A11 DQU4 A12 DQU5
CMDA28 N7
A12 DQU5
A2 MDA56 CMDA20 T3
A13 DQU6
B8 MDA54 CMD16 CS0_H#
CMDA20 T3 B8 MDA62 CMDA4 T7 A3 MDA51
A13 DQU6 A14 DQU7
CMDA4 T7
A14 DQU7
A3 MDA58 CMDA14 M7
A15/BA3 +1.5VSDGPU
CMD17
CMDA14 M7
A15/BA3 +1.5VSDGPU CMD18 ODT_H
CMDA12 M2 B2
BA0 VDD
CMDA12 M2
BA0 VDD
B2 CMDA27 N8
BA1 VDD
D9 CMD19 CKE_H
CMDA27 N8 D9 CMDA26 M3 G7
BA1 VDD BA2 VDD
CMDA26 M3
BA2 VDD
G7
VDD
K2 CMD20 A13 A13
K2 K8
VDD VDD
2
VDD
K8
VDD
N1 CMD21 A8 A8 2
N1 CLKA1 J7 N9
VDD CK VDD
CLKA1 J7
CK VDD
N9 CLKA1# K7
CK VDD
R1 CMD22 A6 A6
CLKA1# K7 R1 CMDA19 K9 R9
CK VDD CKE/CKE0 VDD
CMDA19 K9
CKE/CKE0 VDD
R9
+1.5VSDGPU
+1.5VSDGPU CMD23 A11 A11
CMDA18 K1
ODT/ODT0 VDDQ
A1 CMD24 A5 A5
CMDA18 K1 A1 CMDA16 L2 A8
ODT/ODT0 VDDQ CS/CS0 VDDQ
CMDA16 L2
CS/CS0 VDDQ
A8 CMDA30 J3
RAS VDDQ
C1 CMD25 A3 A3
CMDA30 J3 C1 CMDA15 K3 C9
RAS VDDQ CAS VDDQ
CMDA15 K3
CAS VDDQ
C9 CMDA13 L3
WE VDDQ
D2 CMD26 BA2 BA2
CMDA13 L3 D2 310mAVDDQ E9
WE VDDQ
310mAVDDQ E9
VDDQ
F1 CMD27 BA1 BA1
F1 DQSA5 F3 H2
VDDQ DQSL VDDQ
DQSA4 F3
DQSL VDDQ
H2 DQSA6 C7
DQSU VDDQ
H9 CMD28 A12 A12
DQSA7 C7 H9
DQSU VDDQ
CMD29 A10 A10
DQMA5 E7 A9
DML VSS
DQMA4 E7
DML VSS
A9 DQMA6 D3
DMU VSS
B3 CMD30 RAS* RAS*
DQMA7 D3 B3 E1
DMU VSS E1 VSS G8
VSS VSS Not Available
G8 DQSA#5 G3 J2
DQSA#4 G3 VSS J2 DQSA#6 B7 DQSL VSS J8
DQSA#7 B7 DQSL VSS J8 DQSU VSS M1
LOW HIGH
DQSU VSS M1 VSS M9
VSS M9 VSS P1
VSS P1 CMDA5 T2 VSS P9
VSS RESET VSS Command Bit Default Pull-down
CMDA5 T2 P9 T1
RESET VSS T1 ZQ3 L8 VSS T9 ODTx 10k
ZQ2 L8 VSS T9 ZQ/ZQ0 VSS
ZQ/ZQ0 VSS 10k
1
VGA@ DDR3 CKEx
1
R2101 J1 B1 RST 10k

VGA@ J1 B1 243_0402_1% L1 NC/ODT1 VSSQ B9
3 R2100 L1 NC/ODT1 VSSQ B9 J9 NC/CS1 VSSQ D1 CS* No Termination 3
243_0402_1% J9 NC/CS1 VSSQ D1 L9 NC/CE1 VSSQ D8
2
L9 NC/CE1 VSSQ D8 NCZQ1 VSSQ E2
2
NCZQ1 VSSQ E2 VSSQ E8

VSSQ E8 VSSQ F9
VSSQ F9 VSSQ G1
VSSQ G1 VSSQ G9
VSSQ G9 VSSQ
VSSQ 96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3 H5TQ2G63BFR-11C_FBGA96
H5TQ2G63BFR-11C_FBGA96
+1.5VSDGPU
+1.5VSDGPU
R2089
+1.5VSDGPU R2088 VGA@
VGA@ 1.33K_0402_1%
1.33K_0402_1%
CLKA1
<18> CLKA1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+MEM_VREF3
1
VGA@ C2059
VGA@ C2060
VGA@ C2061
VGA@ C2062
VGA@ C2063
VGA@ C2064
VGA@ C2065
VGA@ C2066
VGA@ C2067
VGA@ C2068
VGA@ C2069
VGA@ C2070
1 1 1 1 1 1 1 1 1 1 1 1 +MEM_VREF2
R2090 1
VGA@ 1 R2097 C2058
160_0402_1% R2096 C2057 VGA@ VGA@
2 2 2 2 2 2 2 2 2 2 2 2 VGA@ VGA@ 1.33K_0402_1% 0.1U_0402_16V4Z
4 4
2
CLKA1# 1.33K_0402_1% 0.1U_0402_16V4Z 2

<18> CLKA1# 2

N15X DDR3 7/7
Custom 0.3
Z5WAH M/B LA-B162P
A B C D E
5 4 3 2 1
LVDS Translator ‐ RTD2132R
D D
+3VS_TL
+3VS +3VS_TL U50 LVDS@
LVDS@ 19 TXOUT_CLK+ TXOUT_CLK+ <25>
L63 2 1 DP_V33 TXEC+
30mil 30mil 40mil 3 DP_V33 TXEC-
20 TXOUT_CLK- TXOUT_CLK- <25>
2 1 HCB2012KF-221T30_0805
R928 LVDS@ 0_0603_5% LVDS@ 60mil13 SWR_VDD TXE2+
21 TXOUT2+ TXOUT2+ <25>
+1.2V_TL
Power
L73 2 1 SWR_VDD 18 22 TXOUT2-
LVDS
+3VS PVCC TXE2- TXOUT2- <25>
HCB2012KF-221T30_0805
LVDS@ L6 1 2 +1.2V_TL_OUT 60mil12 23 TXOUT1+ TXOUT1+ <25>
4.7UH_PG031B-4R7MS_1.1A_20% 11 SWR_LX TXE1+ 24 TXOUT1-
60mil 27 SWR_VCCK TXE1- TXOUT1- <25>
+1.2V_TL VCCK
7 25 TXOUT0+ TXOUT0+ <25>
DP_V12 TXE0+ 26 TXOUT0-
60mil TXE0- TXOUT0- <25>
Close to Pin3
DP_V33
2
RTD2132S
<25> EDP_AUXP_C_TL AUX_P
10U_0603_6.3V6M
C1016
0.1U_0402_16V4Z
C1015
0.1U_0402_16V4Z
C983
DP-IN
1 14
GPIO
<25> EDP_AUXN_C_TL AUX_N GPIO(PWM OUT) TL_INVT_PWM <25>
1 1 1 15
GPIO(Panel_VCC) TL_ENVDD <25>
5 16 R934 1 LVDS@ 2 0_0402_5%
<25> EDP_TXP0_C_TL LANE0P GPIO(PWM IN) PCH_INV_PWM <25,8>
6 17
<25> EDP_TXN0_C_TL LANE0N GPIO(BL_EN) TL_BKOFF# <25>
LVDS@
LVDS@
LVDS@
2 2 2
CSCL 9
CIICSCL1 LVDS MIICSCL1
29 I2CC_SCL I2CC_SCL <25>
CSDA 10 28 I2CC_SDA
C CIICSDA1 EDID MIICDA1 I2CC_SDA <25>
Other
C
<25> EDP_HPD 1 2 TL_HPD 32

HPD ROM MIICSCL0
31 MODE_CFG1
30 MODE_CFG0
R936 8 MIICSDA0
1K_0402_5% 4 DP_REXT 33
DP_GND GND
2
Close to L64 Close to Pin13 Close to P18 LVDS@
LVDS@
SWR_VDD R938 RTD2132N-CG_QFN32_5X5
12K_0402_1% Part Number = SA00007A300 LVDS@ +3VS_TL
10U_0603_6.3V6M
C984
0.1U_0402_16V4Z
C1020
22U_0805_6.3V6M
C986
0.1U_0402_16V4Z
C1019
0.1U_0402_16V4Z
C1018
RP41
1
I2CC_SCL 1 8
1 1 1 1 1
use 2132S symbol I2CC_SDA 2 7
CSCL 3 6
LVDS@
LVDS@
LVDS@
LVDS@
LVDS@
CSDA 4 5
2 2 2 2 2
4.7K_8P4R_5%
+3VS_TL
2
@
R943 R944
Close to L6 Close to Pin27 Close to Pin7
4.7K_0402_5% 4.7K_0402_5%
+1.2V_TL LVDS@ +3VS_TL
10U_0603_6.3V6M
C1014
1
0.1U_0402_16V4Z
C1022
0.1U_0402_16V4Z
C1017
0.1U_0402_16V4Z
C1021
1
1 1 1 MODE_CFG0
MODE_CFG1
LVDS@
2
2
LVDS@
LVDS@
LVDS@
@
2 2 2 R945 R946 @
2
B 4.7K_0402_5% 4.7K_0402_5% Q53A B
LVDS@
CSDA 1 6
EC_I2C_TPDAT <34,35>
1
DMN66D0LDW-7_SOT363-6 @
5
Q53B
CSCL 4 3
MODE_CFG0(PIN30) EC_I2C_TPCLK <34,35>
0 1 DVT modify 11/18
LVDS EP mode SMbus on SMbus3
0 X EP MODE
MODE_CFG1(PIN31)
1 ROM ONLY MODE* EEPROM MODE
A A
Security Classification Compal Secret Data

LVDS Translator - RTD2132R
Custom 0.3
Z5WAH M/B LA-B162P
5 4 3 2 1
A B C D E
EDP / LVDS conn.
Place closed to JLVDS1
+LCDVDD
+3VS
LCD POWER CIRCUIT
1 1
+INVPWR_B+ B+ C375 @ C419
+3VS +LCDVDD
U8
W=60mils 0.1U_0402_16V4Z 0.1U_0402_16V4Z
1
1
W=60mils L11
W=60mils 2 2 1
5 OUT HCB2012KF-221T30_0805
IN 2 1
1 1
2 C368 XEMC@ EMC@
GND
1U_0402_6.3V6K
C140
1000P_0402_50V7K
C364
4 0.1U_0402_16V4Z 1 1 XEMC@
IN @ C365
1 SM01000EJ00 3000ma
3 C367 2 2 68P_0402_50V8J
EN 4.7U_0603_6.3V6K
220ohm@100mhz
G5243T11U_SOT23-5 2 2 DCR 0.04
2
LCD/ LED PANEL Conn.
R947 1 EDP@ 2 0_0402_5%
<8> PCH_ENVDD
R950 1 LVDS@ 2 0_0402_5% @
<24> TL_ENVDD
1 R959 2
100K_0402_5%
W=60mils JLVDS1
+INVPWR_B+ 1
2 1 41
DVT modify 12/09 3 2 G1 42
change to SA00000OH00 4 3 G2 43
U20 @ +3VS +3VS W=60mils 5 4 G3 44
M74VHC1GT125DF2G_SC70-5 +3VS INVTPWM 6 5 G4 45
1 @ 2 1 5 XEMC@ DISPOFF# 7 6 G5 46
OE Vcc 7 G6
5
R362 U22 LVDS@ INVTPWM C549 1 2 220P_0402_50V7K EDP_HPD 8
100K_0402_5% R401 BKOFF# 2 XEMC@ 9 8
P
<34> BKOFF# B +LCDVDD 9
2 1K_0402_5% 4 DISPOFF# C528 1 2 220P_0402_50V7K 10
IN A TL_BKOFF# 1 Y TS_EN_1 11 10
@ <24> TL_BKOFF# A 11
G
TXOUT_CLK+ 12
<24> TXOUT_CLK+
2
12
2
3 4 INVTPWM MC74VHC1G08DFT2G_SC70-5 TXOUT_CLK- 13
<24> TXOUT_CLK-
3
GND OUT Y R951 TXOUT2+ 14 13
<24> TXOUT2+ 14
100K_0402_5% TXOUT2- 15
2 <24> TXOUT2- 15 2
LVDS@ TS_RST# 16
<34> TS_RST# 16
R363 1 EDP@2 0_0402_5% R949 1 EDP@2 0_0402_5% TXOUT1+ 17
<24,8> PCH_INV_PWM <24> TXOUT1+
1
TXOUT1- 18 17
<24> TXOUT1- 18
1
R404 1 @ 2 0_0402_5% R280 1 @ 2 10K_0402_5% TXOUT0+ 19

<4> EDP_DISP_UTIL <24> TXOUT0+ 19
R393 TXOUT0- 20
<24> TXOUT0- 20
R405 1 LVDS@ 2 0_0402_5% @ 100K_0402_5% EDID_I2C_SDA 21
<24> TL_INVT_PWM 21
EDID_I2C_SCL 22
23 22
+3VS
2
24 23
EDP_AUXN_C 25 24
EDP_AUXP_C 26 25
27 26
EDP_TXP0_C 28 27
EDP_TXN0_C 29 28
DVT modify 11/15 30 29
Co-lay TS_I2C and LVDS EDID EDP_TXP1_C 31 30
EDP_TXN1_C 32 31
TS_INT# 33 32
<9> TS_INT# 33
+5VS_TS 34
R438 1 EDP@2 0_0402_5% EDID_I2C_SDA USB20_P5 35 34
<35,9> PCH_I2C1_SDA <10> USB20_P5 35
Touch Screen I2C <35,9> R439 1 EDP@2 0_0402_5% EDID_I2C_SCL Touch Screen USB20_N5 36
PCH_I2C1_SCL <10> USB20_N5 36
+3VS 37
USB20_P6_CAMERA 38 37
R415 1 LVDS@ 2 0_0402_5% USB20_N6_CAMERA 39 38
<24> I2CC_SDA For Camera 39
LVDS EDID R433 1 LVDS@ 2 0_0402_5% 40
<24> I2CC_SCL 40
E-T_0871K-F40N-00L
CONN@
SP010011Z00
3 3
eDP Camera
Touch Screen
C372 1 2 EDP@ 0.1U_0402_16V7K EDP_TXN0_C
<4> EDP_TXN0
C371 1 2 EDP@ 0.1U_0402_16V7K EDP_TXP0_C R427 1 2 0_0402_5%
<4> EDP_TXP0
C377 1 2 LVDS@0.1U_0402_16V7K EDP_TXN0_C_TL R428 1 2 0_0402_5%
C376 1 2 LVDS@0.1U_0402_16V7K EDP_TXP0_C_TL
EDP_TXN0_C_TL
EDP_TXP0_C_TL
<24>
<24> pin define, conn need to confirm
USB20_N6 3 4 USB20_N6_CAMERA
<10> USB20_N6 3 4
C374 1 2 0.1U_0402_16V7K EDP_TXN1_C
<4> EDP_TXN1 +3VS
C373 1 2 0.1U_0402_16V7K EDP_TXP1_C USB20_P6 2 1 USB20_P6_CAMERA
<4> EDP_TXP1 <10> USB20_P6 2 1
+5VS +5VS_TS DVT modify 11/12 L27 XEMC@
+3VS R81 Port 7 change to Port 6 DLW21HN900HQ2L_4P
EDP@ 0_0603_5%
<4> EDP_AUXN C369 1 2 0.1U_0402_16V7K EDP_AUXN_C R613 2 @ 1 100K_0402_5% 1 TS@ 2
<4> EDP_AUXP C370 1 2 0.1U_0402_16V7K EDP_AUXP_C R614 2 @ 1 100K_0402_5% JCAM1
EDP@ 1
C388 1 2 LVDS@0.1U_0402_16V7K USB20_P6_EXCA 2 1
EDP_AUXN_C_TL <24> 2
C389 1 2 LVDS@0.1U_0402_16V7K EDP_AUXP_C_TL <24> +3VS R615 1 TS@ 2 100K_0402_5% TS_INT# R431 1 @ 2 0_0402_5% USB20_N6_EXCA 3 5
R430 1 @ 2 0_0402_5% 4 3 G1 6
4 G2
R616 1 @ 2 100K_0402_5% TS_RST# USB20_P6 3 4 USB20_P6_EXCA ACES_88266-04001
3 4 CONN@
USB20_N6 2 1 USB20_N6_EXCA SP02000K200

2 1
4 L28 XEMC@ 4
<8> CPU_EDP_HPD 1 @ 2 EDP_HPD EDP_HPD <24> R414 1 TS@ 2 0_0402_5% TS_EN_1 DLW21HN900HQ2L_4P
<34> TS_EN
R406
0_0402_5%
1
R364
100K_0402_5%
2
eDP Connector
Custom 0.3
Z5WAH M/B LA-B162P
A B C D E
A B C D E
HDMI conn.
1 1
RP15
2.2K_0804_8P4R_5%
1 8 HDMI_SCLK
+HDMI_5V_OUT 2 7 HDMI_SDATA
3 6 DDI2_CTRL_CK
4 5 DDI2_CTRL_DATA
+3VS
HDMI connector
JHDMI1
+3VS HDMI_HPD 19
18 HP_DET
+HDMI_5V_OUT +5V
17
+HDMI_5V_OUT Q15A HDMI_SDATA 16 DDC/CEC_GND
SDA
2
+5VS U3 DMN66D0LDW-7_SOT363-6 HDMI_SCLK 15
14 SCL
3
W=40mils 1 6 HDMI_SCLK 13 Reserved
OUT <8> DDI2_CTRL_CK CEC
1 HDMI_R_CK- 12
1 4 3 HDMI_SDATA 11 CK-
2 IN <8> DDI2_CTRL_DATA CK_shield 2
1 1 C378 Q15B HDMI_R_CK+ 10
2 0.1U_0402_16V4Z DMN66D0LDW-7_SOT363-6 HDMI_R_D0- 9 CK+
C398 C396 GND 2 EMC@ 8 D0-
5
0.1U_0402_16V4Z 0.1U_0402_16V4Z HDMI_R_D0+ 7 D0_shield
2 2 +3VS D0+
EMC@ EMC@ AP2330W-7_SC59-3 Place closed to JHDMI1 HDMI_R_D1- 6
5 D1-
HDMI_R_D1+ 4 D1_shield 20
HDMI_R_D2- 3 D1+ GND 21
2 D2- GND 22
HDMI_R_D2+ 1 D2_shield GND 23
D2+ GND
SUYIN_100042GR019M23MZR
CONN@
SM070001310 400ma 90ohm@100mhz DCR 0.3
+3VS HDMI_CLK- R368 1 XEMC@ 2 0_0402_5% HDMI_R_CK-
DC232001I00
+3VS HDMI_CLK+ R369 1 XEMC@ 2 0_0402_5% HDMI_R_CK+
1
R376
1M_0402_5% Q14A
2
DMN66D0LDW-7_SOT363-6 HDMI_TX0- R370 1 XEMC@ 2 0_0402_5% HDMI_R_D0-

RP17
2
<8> CPU_HDMI_HPD 1 6 HDMI_HPD HDMI_TX0+ R371 1 XEMC@ 2 0_0402_5% HDMI_R_D0+ 470_8P4R_5%

<4> CPU_DP2_N1 C381 2 1 0.1U_0402_16V7K HDMI_TX1- 4 5
1
1 <4> CPU_DP2_P1 C382 2 1 0.1U_0402_16V7K HDMI_TX1+ 3 6

<4> CPU_DP2_N0 C379 2 1 0.1U_0402_16V7K HDMI_TX2- 2 7
R121 C387 HDMI_TX1- R372 1 XEMC@ 2 0_0402_5% HDMI_R_D1- <4> CPU_DP2_P0 C380 2 1 0.1U_0402_16V7K HDMI_TX2+ 1 8
100K_0402_5% 220P_0402_50V7K
HDMI_GND
2 EMC@ HDMI_TX1+ R373 1 XEMC@ 2 0_0402_5% HDMI_R_D1+ C383 2 1 0.1U_0402_16V7K HDMI_TX0- 4 5
<4> CPU_DP2_N2
2
<4> CPU_DP2_P2 C384 2 1 0.1U_0402_16V7K HDMI_TX0+ 3 6

3
<4> CPU_DP2_N3 C385 2 1 0.1U_0402_16V7K HDMI_CLK- 2 7 3
<4> CPU_DP2_P3 C386 2 1 0.1U_0402_16V7K HDMI_CLK+ 1 8
HDMI_TX2- R374 1 XEMC@ 2 0_0402_5% HDMI_R_D2-
RP18
HDMI_TX2+ R375 1 XEMC@ 2 0_0402_5% HDMI_R_D2+ 470_8P4R_5%
3
Q14B
+3VS 5
4
4 4

HDMI Conn
Custom 0.3
Z5WAH M/B LA-B162P
A B C D E
5 4 3 2 1
DP to VGA‐IT6513
+3VS_6513
+1.8V_VDDO +1.8V_RX_VCC +1.8V_VDDO +1.8V_RX_VDD +1.8V_VDDO +1.8V_DAC_VDD
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
+3VS +3VS_6513
1U_0402_6.3V6K
1 L2500 2 1 L2501 2 1 L2502 2
+3VS +HDMI_5V_OUT
1U_0402_6.3V6K
1 1 1 1 0_0603_5% 0_0603_5% 1 0_0603_5%
1U_0402_6.3V6K
@ 1
C2500
C2501
C2502
C2505
2 R929 1 1
D +3VS D
C2503
0_0603_5%
1
2 2 2 2 2
C2504
2
C2506
R2502 R2503 R2504 R2505
2 4.7K_0402_5% 2.2K_0402_5%
4.7K_0402_5% 2.2K_0402_5%
2
2
Place near Pin 35,36 Place near Pin 13,48
CRT_DATA_1 1 6 CRT_DATA
CRT_DATA <28>
Q2501A
5
CRT_CLK_1 4 3 CRT_CLK CRT_CLK <28>
+1.8V_VDDO Q2501B
1
10U_0603_6.3V6M DVT modify 11/25
add level shift
C2507
@ +1.8V_RX_VDD
+3VS_6513
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R2501 1 @ 2 0_0402_5% DP_HPD 2
<8> CPU_DP_HPD
1 1 1
1
ISPSDA
C2508
C2509
C2510
R2506 ISPSCL
4.7K_0402_5%
2 2 2
13
48
35
36
38
39
12
14
44
46
2
U2500
1
2
DVT modify 11/25
+3VS_6513 form +5VS_6513 change to +3VS_6513
OVDD
OVDD
IVDD
IVDD
IVDD
IVDD
IVDDO
IVDDO
DDCSDA
DDCSCL
IVDD33
IVDD33
DP_HPD 40
C HPD C
45 +3VS_6513
C2511 2 1 0.1U_0402_16V7K CPU_DP1_C_P0 26 270mA 270mA MCUVDDH
<4> CPU_DP1_P0 RX0P
C2512 2 1 0.1U_0402_16V7K CPU_DP1_C_N0 27
<4> CPU_DP1_N0 RX0N
C2513 2 1 0.1U_0402_16V7K CPU_DP1_C_P1 29 47 @ T2501
<4> CPU_DP1_P1 RX1P MCURSTN
C2514 2 1 0.1U_0402_16V7K CPU_DP1_C_N1 30
<4> CPU_DP1_N1 RX1N
28 @ T2502
R2508 2 @ 1 1M_0402_5% URDBG
+3VS
C2515 15 ISPSCL 1 2 R2510 22_0402_5%
0.1U_0402_16V7K ISPSCL 16 ISPSDA 1 2 R2511 22_0402_5%
2 1 DDI1_AUX_C_DP 20 ISPSDA
<8> DDI1_AUX_DP RXAUXP
2 1 DDI1_AUX_C_DN 19 23 R2514 2 1 22_0402_5% CRT_CLK_1
<8> DDI1_AUX_DN RXAUXN VGADDCCLK
C2516 21 R2515 2 1 22_0402_5% CRT_DATA_1
0.1U_0402_16V7K VGADDCSDA
18 3
DCAUXP VSYNC VSYNC <28>
R2516 2 @ 1 1M_0402_5% 17 4
DCAUXN HSYNC HSYNC <28>
+1.8V_DAC_VDD
C2517
C2519
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1
+1.8V_RX_VCC 25 10
AVCC VDDC
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2 1 31
AVCC
C2518
C2520
1 2 22
PVCC
IT6513FN 2 2
11 CRT_R
IORP CRT_R <28>
Place near Pin 22 9 CRT_G
IOGP CRT_G <28>
B B
+1.8V_RX_VDD 2 24
DVDD18 8 CRT_B
IOBP CRT_B <28>
C2521
1
0.1U_0402_16V4Z 41
1 NC/VGADETECT
5 R2517 1 2 100_0402_1%
32 RSET
+1.8V_RX_VCC 2 ASPVCC
75_0402_1% 2
75_0402_1% 2
75_0402_1% 2
C2522
7 +1.8V_DAC_VDD
0.1U_0402_16V4Z VDDA
1
DVT modify 11/25 6 1 2
form +5VS_6513 change to +3VS_6513 COMP
R2518
R2519
R2520
1 R2521 2 2.2K_0402_5% 43 C2523 0.1U_0402_16V4Z
1 R2522 2 2.2K_0402_5% 42 PCSDA
+3VS_6513 PCSCL 34 XTALIN_6513
XTALIN 33 XTALOUT_6513
XTALOUT
PWDNB
Note: need external PU to 2K ~ 10K R2523

PAD
1M_0402_5%
XTALOUT_6513 @ XTALIN_6513
IT6513FN_QFN48_6X6
37
49
X2500
27MHZ_10PF_X3G027000BA1H-U
R2549 Crystal
+3VS_6513 1 2 PWDNB 3 4
OUT GND
2 1
10K_0402_5% GND IN
18P_0402_50V8J
@1
18P_0402_50V8J
1@
DVT modify 11/25
add pull high 10K C2524 @
2 C2525
2
A A

ITE IT6513FN
Custom 0.3
Z5WAH M/B LA-B162P
5 4 3 2 1
A B C D E
CRT conn.
W=40mils
+HDMI_5V_OUT
1 CRB1.0 use 47ohm@100Mhz Bead 1
DVT modify 11/12

chang PN to SM01000FH00
CRT Connector
L2503 EMC@
BLM15BB470SN1D_2P
1 2 CRT_R_2 JCRT1
<27> CRT_R
L2505 EMC@ 6
BLM15BB470SN1D_2P T99 @ 11
1 2 CRT_G_2 1
<27> CRT_G
L2504 EMC@ 7
BLM15BB470SN1D_2P 12
1 2 CRT_B_2 2
<27> CRT_B
8
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
13
1 1 1 1 1 1 3
9
C2529
C2530
C2531
C2532
C2533
C2534
14
T109 @ 4
2 2 2 2 2 2 10 16
G
15 G 17
5
CCM_070546HR015M25FZR
CONN@
R2524
DC060005810
+HDMI_5V_OUT 1 @ 2 0_0603_5% CRT_HSYNC_2
U2502 @
1 5 0.1U_0402_16V4Z 2 1 C2535 R2525 CRT_CLK <27>
R2526 OE Vcc 1 @ 2 0_0603_5% CRT_VSYNC_2
CRT_DATA <27>
0_0402_5% 1 1
2 @ 1 CRT_HSYNC 2 @ @
2 <27> HSYNC IN A 2
PVT modify 12/31 C2536 C2537
form +5VS_6513 change to +HDMI_5V_OUT 10P_0402_50V8J 10P_0402_50V8J
3 4 CRT_HSYNC_1 2 2
GND OUT Y
M74VHC1GT125DF2G_SC70-5
R2528 +HDMI_5V_OUT
0_0402_5% U2503
2 @ 1 1 5
OE Vcc
2 @ 1 CRT_VSYNC 2
<27> VSYNC IN A
R2529
0_0402_5%
3 4 CRT_VSYNC_1
GND OUT Y
M74VHC1GT125DF2G_SC70-5
3 3
4 4

CRT Connector
Custom 0.3
Z5WAH M/B LA-B162P
A B C D E
5 4 3 2 1
LAN‐RTL8411B
+3VALW DVT modify 12/20 +3V_LAN
reserve 0 ohm
2 1
@ 0_0603_5% W=60mil W=60mil
R2551 IDC=1200mA +LAN_VDD +3V_LAN
W=60mil
60mil U2504
60mil L2506
300mA 1.4A
D D
1 +REGOUT 1 2
5 OUT 2.2UH_NLC252018T-2R2J-N_5%
IN
4.7U_0603_6.3V6K
C2538
0.1U_0402_16V7K
C2539
0.1U_0402_16V7K
C2540
0.1U_0402_16V7K
C2541
0.1U_0402_16V7K
C2542
0.1U_0402_16V7K
C2543
0.1U_0402_16V7K
C2544
1U_0402_6.3V6K
C2545
0.1U_0402_16V7K
C2546
4.7U_0603_6.3V6K
C2547
0.1U_0402_16V7K
C2548
0.1U_0402_16V7K
C2549
0.1U_0402_16V7K
C2550
2 1 1 1 1 1 1 1 1 1 1 1 1 1
4 GND
IN
2
3 LAN_PWR_EN LAN_PWR_EN <34>
C2551 EN 2 2 2 2 2 2 2 2 2 2 2 2 2
1U_0402_6.3V6K G5243T11U_SOT23-5
1
Part Number = SA000028Y10
Using for Switch mode
Place near Pin 3,8,33,46 Place near Pin 20 Using for Switch mode Place near Pin 11,32,48
The trace length from Lx to
From EC PIN48 (REGOUT) and from C to Lx The trace length
must < 200mils. from C to
High active.
PIN46,47(VDDREG)
EN threshold voltage min:1.2V typ:1.6V max:2.0V
must < 200mils.
Current limit threshold 1.5~2.8A
+3V_LAN Rising time must >0.5ms and <100ms
reserve EC_PME# pull high 100K to +3VALW_EC

U2505
<8> PCH_PCIE_WAKE# R2532 1 @ 2 0_0402_5% Power Manahement/Isolation
ISOLATEB 31
R2533 1 @ 2 0_0402_5% LAN_PME# 39 ISOLATEBPIN
<34> EC_PME# LANWAKEB Card Reader
DVT modify 12/04 R2550 1 2 10K_0402_5% 15 SD_D0 R2534 1 2 0_0402_5% SD_D0_R
+3V_LAN SD_D0/MS_D1 SD_D0_R <30>
for WOL pull high to +3V_LAN PCI-Express 14 SD_D1 R2537 1 2 0_0402_5% SD_D1_R
C SD_D1 SD_D1_R <30> C
<7> CLK_PCIE_LAN CLK_PCIE_LAN 23 16 SD_CLK R2538 1 2 10_0402_5% SD_CLK_R SD_CLK_R <30>
CLK_PCIE_LAN# 24 REFCLK_P SD_CLK/MS_D0 17 SD_CMDR2539 1 2 0_0402_5% SD_CMD_R
<7> CLK_PCIE_LAN# REFCLK_N SD_CMD/MS_D2 SD_CMD_R <30>
18 SD_D3 R2535 1 2 0_0402_5% SD_D3_R
SD_D3/MS_D3 SD_D3_R <30> 2
PLT_RST_BUF# 30 19 SD_D2 R2536 1 2 0_0402_5% SD_D2_R
<31,8> PLT_RST_BUF# PERSTBPIN SD_D2/MS_CLK SD_D2_R <30>
LAN_CLKREQ# 29 28 SD_WP C2554
PU at PCH side <7> LAN_CLKREQ# CLKREQBPIN MS_BS/SD_WP# SD_WP <30>
5P_0402_50V8C
C2552 1 2 0.1U_0402_16V7K PCIE_PRX_C_DTX_P3 25 1
C2552, C2553 <10> PCIE_PRX_DTX_P3
C2553 1 2 0.1U_0402_16V7K PCIE_PRX_C_DTX_N3 26 HSOP XEMC@
Place near Pin 25,26 <10> PCIE_PRX_DTX_N3 HSON
<10> PCIE_PTX_C_DRX_P3 21 42 SD_CD# close to pin17
HSIP SD_CD# SD_CD# <30>
<10> PCIE_PTX_C_DRX_N3 22 43
HSIN MS_CD#
Transceiver Interface
LAN_MIDI0+ 1
<30> LAN_MIDI0+ MDIP0
LAN_MIDI0- 2
<30> LAN_MIDI0- MDIN0
LAN_MIDI1+ 4
<30> LAN_MIDI1+ MDIP1 +3V_LAN
LAN_MIDI1- 5 48
<30> LAN_MIDI1- MDIN1 HV_GIGA
LAN_MIDI2+ 6 11
<30> LAN_MIDI2+ MDIP2 HV_GIGA
LAN_MIDI2- 7 12 1400mA
<30> LAN_MIDI2- MDIN2 VDD33
LAN_MIDI3+ 9 32
<30> LAN_MIDI3+ MDIP3 VDD33
LAN_MIDI3- 10
+3V_LAN <30> LAN_MIDI3- MDIN3
1
XTLI 44 33 +LAN_VDD
R2541 XTLO 45 CKXTAL1 Clock VDD10 3
CKXTAL2 AVDD10 8
10K_0402_5% AVDD10
300mA
@
GPO Regulator and Reference
2
+REGOUT 36 20
35 REG_OUT VDDTX
+3V_LAN VDDREG
SWR mode 34 800mA
46 ENSWREG 13
+LAN_VDD LV_GEN Card_3V3 +CARD_3V3 Protect cotact Card contact
2 R2542 1 LAN_RST 47
B 2.49K_0402_1% RSET 27 +VDD33_18 B
DV33/18 Write protect Write Enable
0.1U_0402_16V7K
C2555
4.7U_0603_6.3V6K
C2556
0.1U_0402_16V7K
C2557
41
Y2500 R2540 1 @ 2GPO 38 LED0
1 1 1
(Lock) (Unlock)
<34> LAN_GPO LED1/GPO
25MHZ_10PF_7V25000014 0_0402_5% 37 LEDs
40 LED2 Card Uninsert Open Open Open
XTLI 1 3 XTLO LED_CR 49 @
1 3 DVT modify 12/20 E_Pad 2 2 2 Card insert Open Close Close
GND GND for disable PHY
1 1
10P_0402_50V8J reserve 0 ohm
10P_0402_50V8J 2 4 C2559
C2558 Place near Pin 27
2 2
RTL8411B-CGT_QFN48_6X6
DVT modify 11/27
TXC recommend from 12P change to 10P
+3VS
1
R2543
1K_0402_5%
2
ISOLATEB
2
R2544
15K_0402_5%
A A
1

LAN RTL8411-CG
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Z5WAH M/B LA-B162P 0.3
5 4 3 2 1
5 4 3 2 1
RJ45 / Card Reader conn.
D D
T2500
LAN_TERMAL1 24
LAN_MIDI3- 2 TCT1 MCT1 23 RJ45_MIDI3-
<29>
<29>
LAN_MIDI3-
LAN_MIDI3+ LAN_MIDI3+ 3 TD1+
TD1-
MX1+
MX1-
22 RJ45_MIDI3+ LAN Connector
4 21 JRJ1
LAN_MIDI2- 5 TCT2 MCT2 20 RJ45_MIDI2-
<29> LAN_MIDI2- TD2+ MX2+
<29> LAN_MIDI2+ LAN_MIDI2+ 6 19 RJ45_MIDI2+
TD2- MX2-
7 18
LAN_MIDI1- 8 TCT3 MCT3 17 RJ45_MIDI1- RJ45_MIDI0+ 1 9
<29> LAN_MIDI1- TD3+ MX3+ PR1+ SHLD1
<29> LAN_MIDI1+ LAN_MIDI1+ 9 16 RJ45_MIDI1+ 10
TD3- MX3- RJ45_MIDI0- 2 SHLD2
10 15 PR1-
LAN_MIDI0- 11 TCT4 MCT4 14 RJ45_MIDI0- RJ45_MIDI1+ 3
<29> LAN_MIDI0- TD4+ MX4+ PR2+
<29> LAN_MIDI0+ LAN_MIDI0+ 12 13 RJ45_MIDI0+
TD4- MX4- RJ45_MIDI2+ 4
PR3+ JP2501XEMC@
75_0402_1%
75_0402_1%
75_0402_1%
75_0402_1%
RJ45_MIDI2- 5 B88069X9231T203_4P5X3P2-2
PR3-
1
GST5009-E 2 1
SP050006B10 RJ45_MIDI1- 6 40mil
PR2-
R2545
R2546
R2547
R2548
1
RJ45_MIDI3+ 7 RJ45_GND 1 2 LANGND
C2561 PR4+ C2560
2
0.1U_0402_16V7K RJ45_MIDI3- 8 40mil 10P_0402_50V8J
C 2 PR4- C
Place close to TCT pin LANGND
1
@
JUMP_43X118
J15 JP2500
RJ45_GND XEMC@
SANTA_130452-0B D1 B88069X9231T203_4P5X3P2-2
2
EMC@
CONN@
MESC5V02BD03 3P C/A SOT23
DC234005310
1
Card Reader Connector
JREAD1
<29> SD_D3_R SD_D3_R 1
CD/DAT3
+CARD_3V3 <29> SD_CMD_R SD_CMD_R 2
CMD
B 3 B
VSS1
Close to Card Reader CONN 4
VDD
4.7U_0603_6.3V6K
C2564
0.1U_0402_16V7K
C2565
<29> SD_CLK_R SD_CLK_R 5
CLK
1 1
6
VSS2
SD_D0_R 7
2 2 <29> SD_D0_R DAT0
<29> SD_D1_R SD_D1_R 8 12
DAT1 G1
<29> SD_D2_R SD_D2_R 9 13
DAT2 G2
SD_CD# 10 14
<29> SD_CD# CD G3
SD_WP 11 15
<29> SD_WP WP G4
TAITW_PSDAT4-11GLBS1NN4H2
CONN@
SP07000ZC00
A A

LAN RJ45/CR SD Connector
5 4 3 2 1
A B C D E
Wireless LAN
+1.5VS J13 +1.5VS_WLAN

JUMP_43X39 +3VS_WLAN
1 2
Mini Card Power Rating
1 2 +3VS_WLAN
1 +1.5VS_WLAN 1
@ 1
@ C463 R429 1 2 4.7K_0402_5%
0.1U_0402_16V4Z JMINI1
WLAN_PME# 1 2
2 <34> WLAN_PME# WAKE# 3.3V
R423 3 4
0_0402_5% 5 NC GND 6
1 @ 2 7 NC 1.5V 8
<7,8> MINI1_CLKREQ# CLKREQ# NC
9 10
11 GND NC 12
<7> CLK_PCIE_MINI1# REFCLK- NC
13 14
<7> CLK_PCIE_MINI1 REFCLK+ NC
60mil 15 16
+3VS +3VS_WLAN 17 GND NC 18
@J7
@ J7 19 NC GND 20 WL_OFF#
NC NC WL_OFF# <34>
1 2 21 22 PLT_RST_BUF#
GND PERST# PLT_RST_BUF# <29,8>
1 1 1 <10> PCIE_PRX_DTX_N4 23 24
JUMP_43X118 C458 C459 C460 25 PERn0 +3.3Vaux 26
<10> PCIE_PRX_DTX_P4 PERp0 GND
@ 0.1U_0402_16V4Z 27 28
4.7U_0603_6.3V6K 0.1U_0402_16V4Z 29 GND +1.5V 30 MINI1_SMBCLK R432 1 @ 2 0_0402_5%
2 2 2 GND SMB_CLK PCH_SMBCLK <7>
31 32 MINI1_SMBDATA R434 1 @ 2 0_0402_5% PCH_SMBDATA <7>
<10> PCIE_PTX_C_DRX_N4 PETn0 SMB_DATA
33 34
<10> PCIE_PTX_C_DRX_P4 PETp0 GND
35 36
GND USB_D- USB20_N4 <10>
37 38
NC USB_D+ USB20_P4 <10>
39 40
41 NC GND 42
+3VS_WLAN NC LED_WWAN#
43 44
+3VS_WLAN R435 45 NC LED_WLAN# 46
+3VALW 0_0402_5% 47 NC LED_WPAN# 48
U9 1 @ 2 E51TXD_P80DATA_R 49 NC +1.5V 50
1
W=60mils <34> E51TXD_P80DATA
1 @ 2 E51RXD_P80CLK_R 51 NC GND 52
OUT <34> E51RXD_P80CLK NC +3.3V
5
IN
1
R436 53 54
GND
2 BT_ON# used RX to work 0_0402_5% GND GND
1U_0402_6.3V6K
C165
4 R437
2 IN 100K_0402_5% ACES_50709-0524W-P01 2
1
3 CONN@
2
@ EN
G5243T11U_SOT23-5
2 @
DC04000C400
<34> WLAN_ON
3 3
4 4

MINI CARD (WLAN)
Custom 0.3
Z5WAH M/B LA-B162P
A B C D E
A B C D E
SATA HDD1 Conn. SATA ODD Conn.
JHDD1
1 1
JODD1
1
SATA_PTX_DRX_P0 HDD@ C392 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2 GND 1
<6> SATA_PTX_DRX_P0 A+ GND
<6> SATA_PTX_DRX_N0 SATA_PTX_DRX_N0 HDD@ C393 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N0 3 <6> SATA_PTX_DRX_P1 C401 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P1 2
4 A- C402 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N1 3 A+
GND <6> SATA_PTX_DRX_N1 A-
SATA_PRX_DTX_N0 HDD@ C391 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 5 4
<6> SATA_PRX_DTX_N0 B- GND
SATA_PRX_DTX_P0 HDD@ C394 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6 C403 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N1 5
<6> SATA_PRX_DTX_P0 B+ <6> SATA_PRX_DTX_N1 B-
7 C405 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P1 6
GND <6> SATA_PRX_DTX_P1 B+
7
GND
R308 8 +5VS R593
+3VS V33
0_0402_5% 9 0_0805_5% 80mils 8
1 @ 2 +3VS_HDD 10 V33 1 @ 2 +5VS_ODD 9 DP
V33 +5V
10U_0603_6.3V6M
C404
0.1U_0402_16V4Z
C407
11 1 10
GND +5V
1
<8,9> DEVSLP0 R307 1 @ 2 0_0402_5% 12 ODD_MD 11
13 GND 12 MD 14
R49 1 @ 2 0_0805_5% +5VS_HDD 14 GND T185 @ 13 GND GND 15
+5VS
2
15 V5 2 GND GND
16 V5
17 V5 SANTA_201902-1
18 GND CONN@
19 Reserved 23
+3VS +5VS 20 GND GND 24
21 V12 GND 25 SP01001RS00
22 V12 GND 26
100mils V12 GND
10U_0603_6.3V6M
C420
0.1U_0402_16V4Z
C397
1 1 CCM_C127043HR022M27FZR
1
0.1U_0402_16V4Z
C390
@ CONN@
HDD@ HDD@
DC010009X00
2
2 2
2 2
SATA Re-Driver HDD Conn. for BA50

+3VS
+3VS
1
0.01U_0402_16V7K
BA@ C410
0.1U_0402_16V7K
BA@ C411
1 1
R589
4.7K_0402_5%
@ 2 2
U2506
2
7 10
SATA_PTX_DRX_P0 BA@ C406 2 1 SATA_PTX_C_DRX_P0_1 0.01U_0402_16V7K 1

EN VDD
VDD
20 SATA HDD1 Conn.
A_INp
3 SATA_PTX_DRX_N0 BA@ C409 2 1 SATA_PTX_C_DRX_N0_1 0.01U_0402_16V7K 2
A_INn NC
6
16
1 R660 2 BA@
4.99K_0402_1%
CL 4.0 mm 3
SATA_PRX_DTX_P0 BA@ C399 2 1 SATA_PRX_C_DTX_P0_1 0.01U_0402_16V7K 5 NC

SATA_PRX_DTX_N0 BA@ C400 2 1 SATA_PRX_C_DTX_N0_1 0.01U_0402_16V7K 4 B_OUTp 9 APE0 JHDD2
B_OUTn A_PRE0 8 BPE0 1
APE1 19 B_PRE0 RDSATA_PTX_DRX_P0 C534 1 2 BA@ 0.01U_0402_16V7K RDSATA_PTX_C_DRX_P0 2 1
BPE1 17 A_PRE1 15 RDSATA_PTX_DRX_P0 RDSATA_PTX_DRX_N0 C535 1 2 BA@ 0.01U_0402_16V7K RDSATA_PTX_C_DRX_N0 3 2
B_PRE1 A_OUTp 14 RDSATA_PTX_DRX_N0 4 3
TEST 18 A_OUTn RDSATA_PRX_DTX_N0 C536 1 2 BA@ 0.01U_0402_16V7K RDSATA_PRX_C_DTX_N0 5 4
R665 TEST 5
3 11 RDSATA_PRX_DTX_P0 RDSATA_PRX_DTX_P0 C537 1 2 BA@ 0.01U_0402_16V7K RDSATA_PRX_C_DTX_P0 6
2 1 13 GND B_INp 12 RDSATA_PRX_DTX_N0 7 6
+3VS GND B_INn 7
21 8
EPAD +3VS 8
9
4.7K_0402_5% PS8520CTQFN20GTR2-A_TQFN20_4X4 10 9
10
2
@ BA@ 11
R658 R659 12 11
0_0402_5% 4.7K_0402_5% 13 12
USE 8527 re-driver 13
@ BA@ +5VS 14
+3VS SA00007JU00 15 14
1
for 8520 use 16 15

R338 1 BA@ 2 4.7K_0402_5% APE0 17 16
+5VS 18 17
R335 1 BA@ 2 4.7K_0402_5% BPE0 19 18
20 19
R332 1 @ 2 4.7K_0402_5% APE1
100mils 21 20
22 G1
G2
10U_0603_6.3V6M
C421
0.1U_0402_16V4Z
C412
R337 1 @ 2 4.7K_0402_5% BPE1 1 23
G3
1
24
R334 1 @ 2 4.7K_0402_5% TEST BA@ BA@ G4
ACES_50406-02071-001
2
2 CONN@
R586 1 @ 2 4.7K_0402_5% APE0
SP010016L00
4 R339 1 @ 2 4.7K_0402_5% BPE0 4
R588 1 BA@ 2 4.7K_0402_5% APE1
R587 1 BA@ 2 4.7K_0402_5% BPE1
R351 1 BA@ 2 4.7K_0402_5% TEST

HDD/ODD/ HDD Re-Driver
A B C D E
A B C D E
USB3.0 (Port 0)
DVT modify 11/15
change to SM070003K00
For ESD request +5VALW +USB3_VCCA
CMMI21T-900Y-N_4P D15 XEMC@ C483 EMC@ U25

W=60mils
<10> PCH_USB3_TX0_N 2 1 PCH_USB3_TX0_N_C 3 4 U3TXDN0 U3RXDN0 1 1 109 U3RXDN0 0.1U_0402_16V4Z 1 8
C482 0.1U_0402_16V7K 3 4 1 2 2 GND OUT 7 R454
U3RXDP0 2 2 98 U3RXDP0 3 IN OUT 6 0_0402_5%
1 IN OUT 1
<10> PCH_USB3_TX0_P 2 1 PCH_USB3_TX0_P_C 2 1 U3TXDP0 <34> USB_EN# USB_EN# 4 5 1 @ 2
2 1 EN/ENB OCB USB_OC0# <10,9>
C484 0.1U_0402_16V7K U3TXDN0 4 4 77 U3TXDN0
L24 EMC@ SY6288D10CAC_MSOP8 1
U3TXDP0 5 5 66 U3TXDP0 C612
0.1U_0402_16V4Z
3 3 @
CMMI21T-900Y-N_4P 2
PCH_USB3_RX0_N 3 4 U3RXDN0 8
<10> PCH_USB3_RX0_N 3 4
L05ESDL5V0NA-4 SLP2510P8
PCH_USB3_RX0_P 2 1 U3RXDP0
<10> PCH_USB3_RX0_P 2 1
L25 EMC@
+USB3_VCCA SF000006R00
220U 6.3V OSCON
R458 1 @ 2 0_0402_5% W=100mils
R461 1 @ 2 0_0402_5% EMC@
ESR 17mohm@100Khz
1 1
USB20_P0 3 4 U2DP0_L C487
<10> USB20_P0 3 4 C486 +
0.1U_0402_16V4Z
USB3.0 Conn.
USB20_N0 2 1 U2DN0_L 220U_6.3V_M 2
<10> USB20_N0 2 1 2
L26 XEMC@
DLW21HN900HQ2L_4P
JUSB1
1
U2DN0_L 2 VBUS
U2DP0_L 3 D-
4 D+
U3RXDN0 5 GND
2 U3RXDP0 6 StdA-SSRX- 10 2
7 StdA-SSRX+ GND 11
U3TXDN0 8 GND-DRAIN GND 12
U3TXDP0 9 StdA-SSTX- GND 13
StdA-SSTX+ GND
ACON_TARAC-9V1391
CONN@
DC23300AG00
PWR/B Finger Print /B for BA50 USB/B (USB Port 1, Port2)
JPWR1
1 +3VALW
3 1 2 +3VS +5VALW 3
2 +3VLP
3 LID_SW# LID_SW# <34> JFP1 JUSB2
3 4 PWR_LED# 4 6 1
4 PWR_LED# <35> 4 G2 1
7 5 ON/OFFBTN# ON/OFFBTN# <34,35> USB20_P7 3 5 2
G1 5 <10> USB20_P7 3 G1 2
8 6 USB20_N7 2 3
G2 6 <10> USB20_N7 2 3
1 4
ACES_51524-0060N-001 DVT modify 11/12 1 USB_EN# 5 4
5
2
CONN@ Port 5 change to Port 7 ACES_50504-0040N-001 6

CONN@ USB20_N1 7 6
SP010014M10 SP01000Z300
<10> USB20_N1
USB20_P1 8 7
<10> USB20_P1 8
9
D38 USB20_N2 10 9
<10> USB20_N2 10
YSLC05CH_SOT23-3 USB20_P2 11
<10> USB20_P2 11
XEMC@ 12
13 12
14 13
1
14
ACES_88514-01201-071
CONN@
SP01001BF00
4 4

USB3.0 Conn/USB_B/PWR_B
A B C D E
A B C D E
C501 +3VLP +3VALW_EC DVT modify 11/12 L31 SM010030010 200ma 120ohm@100mhz DCR 0.2 LID_SW# R476 1 2 100K_0402_5% +3VALW_EC
22P_0402_50V8J change to SM010009U00 BLM15BD121SN1D_2P
2 1 2 XEMC@ 1 CLK_PCI_LPC 1 @ 2 1 2 +EC_VCCA +EC_VCCA
XEMC@ R477 33_0402_5% XEMC@ XEMC@ 1 EC_I2C_TPCLK R489 1 @ 2 2.2K_0402_5%
R236 1 1 1 1 2 2 EC_I2C_TPDAT R488 1 @ 2 2.2K_0402_5%
0.1U_0402_16V4Z
C502
0.1U_0402_16V4Z
C503
0.1U_0402_16V4Z
C504
0.1U_0402_16V4Z
C505
1000P_0402_50V7K
C506
1000P_0402_50V7K
C507
0_0805_5% @ @ C508
0.1U_0402_16V4Z TP_CLK R485 1 2 4.7K_0402_5% +3VS
2
ECAGND
+3VALW_EC TP_DATA R483 1 2 4.7K_0402_5%
R480 2 9012@ 1 47K_0402_5% EC_RST# 2 2 2 2 1 1
EC_MUTE# R481 1 @ 2 10K_0402_5% +3VS
C509 2 1 0.1U_0402_16V4Z
ECAGND <40>
111
125
9012@
22
33
96
67
U28
9
EC_LID_OUT# R482 1 @ 2 10K_0402_5% +3VS
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
EC_VDD0
GPU_ALERT R486 1 2 10K_0402_5% +3VS
1 1
9022: ECRST# is internally pull‐up to VCC via 40Kohm resistor,
1 21 VCCST_PG_EC
so can remove external pull‐up resistor and capacitor. EC_KBRST# 2 GATEA20/GPIO00 GPIO0F 23 BEEP# VCCST_PG_EC <11,8> GPU_OVERT R487 1 2 10K_0402_5%
<9> EC_KBRST# KBRST#/GPIO01 BEEP#/GPIO10 BEEP# <36> +3VS
SERIRQ 3 26
<35,9> SERIRQ LPC_FRAME# 4 SERIRQ GPIO12 27 EC_RTCRST#
<35,7> LPC_FRAME# LPC_FRAME# ACOFF/GPIO13 EC_RTCRST# <6>
LPC_AD3 5
<35,7> LPC_AD3 LPC_AD3
LPC_AD2 7 PWM Output C510 2 1 100P_0402_50V8J ECAGND 9012_PECI R497 1 2 43_0402_1%
<35,7> LPC_AD2 LPC_AD2 H_PECI <4>
LPC_AD1 8 63 BATT_TEMP
+3VALW_EC <35,7> LPC_AD1 LPC_AD1 BATT_TEMP/GPIO38 BATT_TEMP <39,40>
LPC_AD0 10 LPC & MISC 64 VCIN1_BATT_DROP
<35,7> LPC_AD0 LPC_AD0 GPIO39 VCIN1_BATT_DROP <40>
65 ADP_I
ADP_I/GPIO3A ADP_I <40,41>
CLK_PCI_LPC 12 AD Input 66 AD_BID0
<7> CLK_PCI_LPC CLK_PCI_EC GPIO3B
R484 1 @ 2 100K_0402_5% EC_PME# PLT_RST# 13 75 WLAN_PME#
<17,35,8> PLT_RST# PCIRST#/GPIO05 GPIO42 WLAN_PME# <31>
EC_RST# 37 76 EC_PME#
EC_RST# IMON/GPIO43 EC_PME# <29>
EC_SMI#_SCI# 20 R509 1 @ 2 0_0402_5% ACIN <39,41,8>
+3VALW_EC <9> EC_SMI#_SCI# EC_SCII#/GPIO0E
RP12 WLAN_ON 38
<31> WLAN_ON GPIO1D 68 LAN_PWR_EN
DAC_BRIG/GPIO3C LAN_PWR_EN <29>
1 8 EC_SMB_CK1 70 EN_DFAN1 EC_ACIN C512 2 1 100P_0402_50V8J
EN_DFAN1/GPIO3D EN_DFAN1 <37>
2 7 EC_SMB_DA1 DA Output 71 TP_EN
IREF/GPIO3E TP_EN <35>
3 6 EC_SMB_CK2 KSI0 55 72 KBL_EN#
KSI0/GPIO30 CHGVADJ/GPIO3F KBL_EN# <35>
+3VS 4 5 EC_SMB_DA2 KSI1 56
KSI2 57 KSI1/GPIO31
2.2K_0804_8P4R_5% KSI3 58 KSI2/GPIO32 83 EC_MUTE#
KSI4 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 USB_EN# EC_MUTE# <36>
KSI5 60 KSI4/GPIO34 USB_EN#/GPIO4B 85 EC_I2C_TPCLK USB_EN# <33>
KSI5/GPIO35 CAP_INT#/GPIO4C EC_I2C_TPCLK <24,35>
C511 1 2 0.01U_0402_16V7K PLT_RST# KSI6 61 PS2 Interface 86 EC_I2C_TPDAT EC_RTCRST# R490 1 2 10K_0402_5%
KSI6/GPIO36 EAPD/GPIO4D EC_I2C_TPDAT <24,35>
EMC@ KSI7 62 87 TP_CLK
KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK <35>
ESD request KSO0 39 88 TP_DATA
KSI[0..7] KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <35> DVT modify 11/15
KSO1 40
<35> KSI[0..7] KSO1/GPIO21 EC pin will have HiZ status on Reset mode
KSO2 41 R691 2 1 100K_0402_5%
KSO[0..17] KSO3 42 KSO2/GPIO22 97 ENBKL
+3VS <35> KSO[0..17] KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 ENBKL <8>
KSO4 43 98
KSO5 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 HDA_SDO
KSO6 45 KSO5/GPIO25 Int. K/B HDA_SDO/GPXIOA02 109 VCIN0_PH_R
HDA_SDO <6>
2 R492 1 @ 2 10K_0402_5%
EC_SMI#_SCI# KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 KB9022&9012 Co-Layout Item 2
KSO7/GPIO27 SPI Device Interface
KSO8 47 Reserve for Share ROM EC
KSO9 48 KSO8/GPIO28 119 EC_SPI_SI
KSO9/GPIO29 SPIDI/GPIO5B EC_SPI_SI <7>
KSO10 49 120 EC_SPI_SO EC_SPI_SO <7>
KSO11 50 KSO10/GPIO2A SPIDO/GPIO5C 126 EC_SPI_CLK H_PROCHOT#_EC 1 9022@ 2
9022:Change control method from push‐pull to open‐drain, KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58 EC_SPI_CLK <7>
KSO12 51 128 EC_SPI_CS# R499 0_0402_5%
so EC_SCI# must be pull high. *PU on PCH side KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A EC_SPI_CS# <7>
(Pull high in PCH side) KSO14 53 KSO13/GPIO2D 1 2
KSO14/GPIO2E <46> VR_HOT# H_PROCHOT# <39,4>
KSO15 54 73 GPU_ALERT R496 0_0402_5%
KSO15/GPIO2F ENBKL/GPIO40 GPU_ALERT <17>
KSO16 81 74 GPU_OVERT
KSO16/GPIO48 PECI_KB930/GPIO41 GPU_OVERT <17>
KSO17 82 89
KSO17/GPIO49 FSTCHG/GPIO50 D
1
90 BATT_BLUE_LED#
BATT_CHG_LED#/GPIO52 BATT_BLUE_LED# <35>
91 H_PROCHOT#_EC 2 Q50
CAPS_LED#/GPIO53
For abnormal shutdown <40,41> EC_SMB_CK1
EC_SMB_CK1 77
EC_SMB_CK1/GPIO44 GPIO PWR_LED#/GPIO54
92 PWR_LED PWR_LED <35> G L2N7002LT1G_SOT23-3
EC_SMB_DA1 78 93 BATT_AMB_LED# S 9012@
<40,41> EC_SMB_DA1 BATT_AMB_LED# <35>
3
D25 EC_SMB_CK2 79 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 95 SYSON
<17,7> EC_SMB_CK2 SM
EC_SMB_CK2/GPIO46 Bus SYSON/GPIO56 SYSON <38,43> Latest design guide suggest change to
RB751V-40 SOD-323 EC_SMB_DA2 80 121 EC_TP_INT#
<17,7> EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 EC_TP_INT# <35> 74LVC1G06.
SPOK 1 2 PCH_RSMRST# 127
PM_SLP_S4#/GPIO59
D26
RB751V-40 SOD-323 PM_SLP_S3# 6 100 PCH_RSMRST#
<8> PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 PCH_RSMRST# <8>
@ 1 2 PCH_PWROK PM_SLP_S5# 14 101 EC_LID_OUT#
<8> PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT# <9>
15 102 VCIN1_PROCHOT
TS_RST# 16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103 H_PROCHOT#_EC
<25> TS_RST# GPIO0A H_PROCHOT#_EC/GPXIOA06 H_PROCHOT#_EC <40>
TS_EN 17 104 MAINPWON
<25> TS_EN GPIO0B VCOUT0_PH/GPXIOA07 MAINPWON <40,42>
WL_OFF# 18 GPO 105 BKOFF#
<31> WL_OFF# GPIO0C BKOFF#/GPXIOA08 BKOFF# <25> +3VALW_EC
EC_GPIO0D 19 GPIO 106 LAN_GPO
GPIO0D PBTN_OUT#/GPXIOA09 LAN_GPO <29>
SPOK 25 107 DGPU_AC_DETECT
+3VALW_EC <42> SPOK EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 DGPU_AC_DETECT <17,9>
FAN_SPEED1 28 108 VCCST_PWRGD
<37> FAN_SPEED1 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 VCCST_PWRGD <11,44>
29
Board ID <31> E51TXD_P80DATA
E51TXD_P80DATA 30 EC_PME#/GPIO15
EC_TX/GPIO16
2
2
Analog Board ID definition, E51RXD_P80CLK 31 110 EC_ACIN
<31> E51RXD_P80CLK EC_RX/GPIO17 AC_IN/GPXIOD01
R503 PCH_PWROK 32 112 EC_ON
3 Ra 100K_0402_5% Please see page 3. <8> PCH_PWROK
PWR_SUSP_LED# 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 ON/OFFBTN#
EC_ON <42>
@ @ 3
<35> PWR_SUSP_LED# SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 ON/OFFBTN# <33,35>
36 GPI 115 LID_SW# R697 R696
NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# <33>
116 SUSP# 10K_0402_5% 10K_0402_5%
SUSP# <38,43,44,45>
1
1
AD_BID0 SUSP#/GPXIOD05 117 VGATE_3V VCIN0_PH_R R501 1 @ 2 0_0402_5%
GPXIOD06 VGATE_3V <8> VCIN0_PH <40>
118 9012_PECI VCIN1_PROCHOT
PECI_KB9012/GPXIOD07 VCIN1_PROCHOT <40>
1
PBTN_OUT# 122 AGND/AGND

1 <8> PBTN_OUT# XCLKI/GPIO5D
R506 C517 PM_SLP_S4# 123 124 +V18R R507 1 9022@ 2
GND/GND
GND/GND
GND/GND
GND/GND
<8> PM_SLP_S4# XCLKO/GPIO5E V18R +3VALW_EC

Rb 15K_0402_5% 0.1U_0402_16V4Z 1 0_0402_5% PU will disable PH function
GND0
@
2 PVT modify 12/31 C515
2
change to 15K 4.7U_0603_6.3V6K

9022@ KB9022QC-A3_LQFP128_14X14 2 9012@
11
24
35
94
113
69
L32
20mil BLM15BD121SN1D_2P
ECAGND 1 2
reserve for LVDS EP mode
SM010030010 200ma 120ohm@100mhz DCR 0.2
DVT modify 11/12
R491 1 @ 2 10K_0402_5% EC_GPIO0D change to SM010009U00
DVT modify 11/18
4 4

EC ENE-KB9012
A B C D E
A B C D E
KB Conn. KSI[0..7]
TP/B Conn. DVT modify 11/12
+3VS change to +3VALW
1 2
Support TP Wake
pop R462, D22. unpop R463, R452.
normal TP
To BA50 TP/B Conn.
KSI[0..7] <34> +3VALW
JKB1 R462 0_0402_5%
KSO[0..17] 1 @ 2 popR463, R452. unpop R462, D22 +5VS
KSO[0..17] <34> +3VS
KSO0 1 R463 0_0402_5% C664 BA@
KSO1 2 1 JTP1 JTP2 0.1U_0402_16V4Z
KSO2 3 2 10 1 1 2
KSO3 4 3 GND 9 0.1U_0402_16V4Z 1 2 TP_DATA
KSO4 5 4 GND 8 C663 1 2 2 3 TP_CLK
KSO5 6 5 8 7 @ 3 4
6 7 TP_CLK <34> 4
KSO6 7 6 7 5 RIGHT_BTN#
KSO7 8 7 6 5
TP_DATA <34> EC PS2 8 G1 5 6 LEFT_BTN#
KSO8 9 8 5 4 TP_SDATA G2 6
1 9 4 1
KSO9 10 3 TP_SCLK ACES_51524-0060N-001
KSO10 11 10 3 2 TP_INT#_R CONN@
KSO11 12 11 2 1 TP_EN
KSO12 13 12 1 TP_EN <34> SP010014M10
KSO13 14 13
KSO14 15 14 ACES_50578-0080N-001
KSO15 16 15 CONN@ SW7 BA@ SW6 BA@
KSO16 17 16 TJE-532QR5_4P TJE-532QR5_4P
KSO17 18 17 SP010010M00 LEFT_BTN# 3 1 RIGHT_BTN# 3 1
KSI0 19 18
KSI1 20 19 EC_TP_INT# 1 2 TP_INT#_R 4 2 4 2
20 <34> EC_TP_INT#
KSI2 21 R453 0_0402_5%
KSI3 22 21
5
6
5
6
KSI4 23 22 EC_I2C_TPDAT 1 @ 2 TP_SDATA
KSI5 24 23 EC I2C <24,34> EC_I2C_TPDAT
R445 0_0402_5%
KSI6 25 24 27
KSI7 26 25 G1 28 EC_I2C_TPCLK 1 @ 2 TP_SCLK
26 G2 <24,34> EC_I2C_TPCLK
R447 0_0402_5%
TP_CLK
E-T_6905-E26N-01R TP_DATA
100P_0402_50V8J
CONN@ PCH_I2C1_SDA 1 2 TP_SDATA
<25,9> PCH_I2C1_SDA
100P_0402_50V8J
C553
XEMC@ C551
R448 0_0402_5%
SP01000IJ00 1 1
PCH I2C PCH_I2C1_SCL 1 2 TP_SCLK
<25,9> PCH_I2C1_SCL
R449 0_0402_5%
2 2
XEMC@
KB BackLight Conn. Reserve +3VALW
2
2 R633 2
PH 10K to +3VS at PCH side 10K_0402_5%
D22
1
+5VS TP_INT# 2 1 TP_INT#_R
<8,9> TP_INT#
JBL1
S
3 1 +5VS_BL 4 6 RB751V-40_SOD323-2
+5VALW 3 4 G2 5
BA@ 2 3 G1 1 @ 2
R451 Q44 1 2 R452 0_0402_5% DVT modify 11/26
G
2
100K_0402_5% DMG2301U-7_SOT23-3 1 for TP wake function

1 BA@ 2 KBL_EN_R ACES_50504-0040N-001 Q51 remove, add D22
CONN@ +3VS change to +3VALW
SP01000Z300
1
<34> KBL_EN# 1 @ 2
R592 C524
0_0402_5% 0.1U_0603_25V7K
LED
2
@
LED6 +3VALW
<34> BATT_BLUE_LED# BATT_BLUE_LED# 1 2 1 2

B R699 51_0402_5%
<34> BATT_AMB_LED# BATT_AMB_LED# 3 4 1 2

A R698 680_0402_5%
PWR_LED# LTST-C295TBKF-CA_AMBER-BLUE
PWR_LED# <33>
3 LED7 3
D
1
Q17
<34> PWR_LED 2 L2N7002LT1G_SOT23-3 PWR_LED# 1 2 1 2
B
ON/OFF BTN G R700 51_0402_5%
1
S
3
R535 <34> PWR_SUSP_LED# PWR_SUSP_LED# 3 4 1 2
100K_0402_5% A R701 680_0402_5%
avoid flash issue when LTST-C295TBKF-CA_AMBER-BLUE
2
+3VLP abnormall shutdown
2
R534
100K_0402_5%
TPM Board for BA50
1
ON/OFFBTN#
JTPM1
DVT modify 11/12
Delete D24 (BAV70W SOT323-3) CLKRUN# 1 2 LPC_AD3
<8> CLKRUN# 1 2 LPC_AD3 <34,7>
<17,34,8> PLT_RST# PLT_RST# 3 4 LPC_AD2
3 4 LPC_AD2 <34,7>
Test Only 5 6 CLK_PCI_TPM
5 6 CLK_PCI_TPM <7>
SW3 7 8 LPC_FRAME#
7 8 LPC_FRAME# <34,7> +3VS
EVQPLDA15_4P +3VALW 9 10 LPC_AD1
9 10 LPC_AD1 <34,7> R392
1 3 +3VS 11 12 LPC_AD0
11 12 LPC_AD0 <34,7>
TOP 13 14 LPCPD#_R 2 BA@ 1
2 4 DVT modify 12/10 15 13 14 16 SERIRQ
15 16 SERIRQ <34,9>
chagne to SN100000K00
@ 10K_0402_5%
6
5
FOX_QT510166-L010-7H R444
4 CONN@ <8> LPCPD# 1 @ 2 4
0_0402_5%
SP020011OA0
<33,34> ON/OFFBTN#

KB & TP & TPM Connector & LED
Custom 0.3
Z5WAH M/B LA-B162P
A B C D E
A B C D E
+5VS +VDDA
40mil J1
40mil Int. Speaker Conn.
HD Audio Codec C2111
1
1
JUMP_43X118
@
2
4.75V
SPKR+
SPKR-
SPKL+
1
R2120
1
R2121
1
R2122
2
2
2
0_0603_5%
0_0603_5%
0_0603_5%
40mil SPK_R+
SPK_R-
SPK_L+
1
2
3
JSPK1
1
2 5
0.1U_0402_16V4Z SPKL- 1
R2123 2 0_0603_5% SPK_L- 4 3 G1 6
XEMC@2
(output = 300 mA) 4 G2
3
+PVDD_HDA Reserved for ESD ACES_88266-04001
SM01000EJ00 3000ma 220ohm@100mhz DCR 0.04 40mil CONN@ GND
L2003 2 1 0.1U_0402_16V4Z 0.1U_0402_16V4Z GND
+VDDA +AVDD1_HDA
HCB2012KF-221T30_0805 1 1 D2003 D2004
1
10U_0603_6.3V6M
C2112
C2113 C2114 MESC5V02BD03_SOT23-3 MESC5V02BD03_SOT23-3
XEMC@ XEMC@
@
2
2 2 R2119
1
0.1U_0402_16V4Z 20mil
1 2
1
+VDDA
1
C2117
10U_0603_6.3V6M
GND GND 1 1 0_0603_5%
1
Place near Pin41 Place near Pin46
C2115 C2116 GND GND
@
2
2 2 +MICBIAS2
+3VS_DVDD 0.1U_0402_16V4Z Int. MIC Reserve
2
R2124 GNDA
1 2 20mil 0.1U_0402_16V4Z +3VS_DVDD Place near Pin26 @R544
@ R544
+3VS
0_0603_5% 2.2K_0402_5%
1 1 1 R2125 15mil 15mil
C2118 C2119 C2120@ +1.5VS_VDDA 0.1U_0402_16V4Z 1 2 XEMC@ JMIC1
+1.5VS
1
1 0_0603_5% INT_MIC_R 1 2 INT_MIC_R_1 1
1
1
C2122
10U_0603_6.3V6M
10U_0603_6.3V6M C2121 R9 2
2 2 2 0_0603_5% 2
1
0.1U_0402_16V4Z C550
2
2 XEMC@ 3
220P_0402_50V7K 4 G1
Place near Pin1, 9 GND 2 G2
GNDA
U2012 Place near Pin40 ACES_88266-02001
41
46
26
40
1
9
CONN@
GND SP020008Y00
DVDD
DVDD-IO
PVDD1
PVDD2
AVDD1
AVDD2
GNDA
Internal MIC Reserve LINE1-L 22
LINE1-R 21 LINE1-L(PORT-C-L) 43 SPKL-
INT_MIC_R 2 @ 1 INT_MIC C770 1 2 LINE2_C_L LINE1-R(PORT-C-R) SPK-OUT-L- 42 SPKL+
R726 1K_0402_5% @ 4.7U_0603_6.3V6K 24
LINE2-L(PORT-E-L)
SPK-OUT-L+ Digital MIC Conn.
GNDA C62 1 2 C769 1 2 LINE2_C_R 23 45 SPKR+
XEMC@ 1000P_0402_50V7K @ 4.7U_0603_6.3V6K LINE2-R(PORT-E-R) SPK-OUT-R+ 44 SPKR-
2 40mil RING2 17
18 MIC2-L(PORT-F-L) /RING2
SPK-OUT-R- Slave (EA54) +3VS Main (EA50) 2
Combo MIC SLEEVE
MIC2-R(PORT-F-R) /SLEEVE 32 HP_LEFT +3VS
+MICBIAS 31 HPOUT-L(PORT-I-L) 33 HP_RIGHT MIC2 @
+MICBIAS LINE1-VREFO-L HPOUT-R(PORT-I-R)
+MICBIAS2 1 @ 2 +MICBIAS2_R 30 6 5 DMIC_DATA
R450 0_0402_5% LINE1-VREFO-R 10 HDA_SYNC_AUDIO MIC1 @ VDD DATA
SYNC HDA_SYNC_AUDIO <6>
DMIC_DATA 2 6 HDA_BITCLK_AUDIO 6 5 DMIC_DATA_S 2 4 DMIC_CLK
GPIO0/DMIC-DATA BCLK HDA_BITCLK_AUDIO <6> VDD DATA CS CLK
DMIC_CLK 3
GPIO1/DMIC-CLK 1 XEMC@ 2 1 2 C2123 XEMC@ 2 4 DMIC_CLK 2 R459 1 1 3
GND CS CLK ENHANCE GND
R2126 0_0402_5% 22P_0402_50V8J 0_0402_5%
3
EC_MUTE# 47 5 HDA_SDOUT_AUDIO 1 3 EA50@ EA54@ S MIC ST MP45DT02TR
HDA_RST_AUDIO# 11 PDB
RESETB
ALC283-CG SDATA-OUT
SDATA-IN
8 HDA_SDIN0_AUDIO 1 R2127 2
HDA_SDOUT_AUDIO
HDA_SDIN0 <6>
<6> ENHANCE GND
2
0_0402_5%
0.1U_0402_16V4Z
33_0402_5% S MIC ST MP45DT02TR 2 EA50@
R455
48
SPDIF-OUT/GPIO2 +MIC2_VREFO 0_0402_5%
C2141
MONO_IN 12
PCBEEP 16 D2005 R460
Close codec MONO-OUT 1
HP_PLUG# R2129 2 1 39.2K_0402_1% SENSE_A 13 10U_0603_6.3V6M 2 1 C2124 GND MESC5V02BD03_SOT23-3 D2009
1
14 SENSE A XEMC@ @ MESC5V02BD03_SOT23-3
10mil SENSE B 29 XEMC@
1
1
37 MIC2-VREFO 10U_0603_6.3V6M 2 1 C2126
CBP GNDA
C2125 35 7
2.2U_0402_6.3V6M CBN LDO3-CAP 39
2 LDO2-CAP 27 10U_0603_6.3V6M 2 1 C2127 R526 Realtek add request
LDO1-CAP GNDA
+3VS_DVDD 36
CPVDD 1 R2130 2 +MIC2_VREFO
28 CODEC_VREF 100K_0402_5%
10mil Headphone Out
1 @ R2131 2100K_0402_5% 20 VREF
+3VS CPVREF 1 1 1
Realtek add request
2.2U_0402_6.3V6M
C2130
@
15 20K_0402_1% 1 2 R2132 GNDA @
JDREF
0.1U_0402_16V4Z
C2129
10U_0603_6.3V6M
C2131
10U_0603_6.3V6M 2 1 C2128 19 34 CPVEE HPOUT_L_2
GNDA MIC-CAP CPVEE HPOUT_R_2
Close codec
1
2 2 2
TVNST52302AB0_SOT523-3
1
3
4 R2133 R2134
49 DVSS 25 C2132 2.2K_0402_5%
Thermal PAD AVSS1 2.2K_0402_5%
DVT modify 12/10
D2007
38 2.2U_0402_6.3V6M
3 AVSS2 2 change to Bead R2149 EMC@ 3
2
BLM15PX330SN1D 0402
ALC283-CG_MQFN48_6X6 Place next pin27 XEMC@ SLEEVE_L 1 2 SLEEVE
1
GND RING2_L 1 2 RING2
3
GND
GNDA GNDA GND BLM15PX330SN1D 0402
R2150 EMC@
2 2
C2142 C2140
D2008
R2137 AZ5123-02S.R7G 3P C/A SOT23 680P_0402_50V7K 680P_0402_50V7K DVT modify 12/10
47K_0402_5% +3VALW +3VS +3VLP EMC@ EMC@ 1 1 EMC@ change to 680P
2 @ 1 BEEP#_R 1 2 MONO_IN
<34> BEEP#
1
C2133 GND GND
2
R2140 1 1U_0402_6.3V6K GND

2
47K_0402_5% XEMC@ @ RING2 JHP1

2
100P_0402_50V8J
C2134
4.7K_0402_5%
R2141
2 1 R2142 @ R2144 60.4_0603_1% RING2_L 3

<9> PCH_SPKR R2143 HP_LEFT R2135 1 2 HPOUT_L_1 R2136 1 2 HPOUT_L_2 1
100K_0402_5%
2 100K_0402_5% 0_0603_5%
100K_0402_5%
1
HP_PLUG# 5
1
D
5 G
Q2003A 6
GNDA S
HP_RIGHT R2138 1 2 HPOUT_R_1 R2139 1 2 HPOUT_R_2 2

DMN66D0LDW-7_SOT363-6 60.4_0603_1% 0_0603_5%
6
EC_MUTE# 2 R2147 1@ Q2003B SLEEVE_L 4

<34> EC_MUTE# D
DVT modify 11/15
10K_0402_5% 2 G LINE1-L 1 2 2 2 7
J11 J12 HDA_RST_AUDIO#2 R2148 1 S change to 0603 size C2135 4.7U_0603_6.3V6K C2137 C2138
<6> HDA_RST_AUDIO#
JUMP_43X39 JUMP_43X39 10K_0402_5% GNDA LINE1-R 1 2 XEMC@ XEMC@
1
1 2 1 2 C2136 4.7U_0603_6.3V6K 330P_0402_50V7K 330P_0402_50V7K SINGA_2SJ3080-001111F

@ 1 2 @ 1 2 1 2 +MICBIAS D2006 1 1 CONN@
4 2 2 R2145 1 4
J9 J10 @ C2139
@C2139 GNDA 4.7K_0402_5% GNDA
JUMP_43X39 JUMP_43X39 1U_0402_6.3V6K 1 DC23000B300
1 2 1 2 GNDA
@ 1 2 @ 1 2 3 2 R2146 1
4.7K_0402_5%
J2 J3 To solve the background noise while combo jack BAT54A-7-F_SOT23-3 GNDA
JUMP_43X39 JUMP_43X39
1 2 1 2 connecting to an active
@ 1 2 @ 1 2 speaker and system entry into S3/S4/S5 without analog Security Classification Compal Secret Data Compal Electronics, Inc.
J4 J5 power 2013/09/11 2013/09/24 Title
JUMP_43X39 JUMP_43X39
Issued Date Deciphered Date
1 2 1 2
HD Audio Codec ALC283
@ 1 2 @ 1 2 Size Document Number Rev
Custom 0.3
GND GNDA GND GNDA
Z5WAH M/B LA-B162P
A B C D E
FAN1 Conn Screw Hole
+5VS C632
4.7U_0603_10V6K +5VS
1 2
H3 H4 H5 H6 H9 H10 H11 H12 H21 H17 FD1 FD2
H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_6P5
U31
1 8 1 @ @
1
2 EN GND 7
1
+VCC_FAN1 3 VIN GND 6 C413 FIDUCIAL_C40M80 FIDUCIAL_C40M80
2 @ 1 4 VOUT GND 5 0.1U_0402_16V4Z
<34> EN_DFAN1 VSET GND 2
EMC@ FD3 FD4
R515 NCT3942S SOP 8P @ @ @ @ @ @ @ @ @ @
1
0_0402_5%
C626 H13 H14 H15 H16 H20 @ @
1
0.1U_0402_16V4Z DVT modify 12/04 H_4P0 H_4P0 H_4P0 H_4P0 H_4P0
2 @ ESD request add 0.1u to 5VS FIDUCIAL_C40M80 FIDUCIAL_C40M80
1
C627
4.7U_0603_10V6K
+3VS 1 2 @ @ @ @ @
@ C631
@C631 H27
1
1000P_0402_50V7K H_3P7
R516 1 2
10K_0402_5%
40mil
1
JFAN1
2
+VCC_FAN1 1
2 1 4
<34> FAN_SPEED1 2 GND @
3 5
3 GND
1
C630
1000P_0402_50V7K ACES_88231-03041 H23 H25
XEMC@ CONN@ H_3P5X3P0N H_3P0N
2
SP020020710
@ @
1
G‐Sensor for BA50
+3VS
1
R518 +3VS
10K_0402_5%
BA@ U2 BA@
1 C633 1 2 10U_0603_6.3V6M
2
8 Vdd_IO BA@
4 CS 14 C628 1 2 0.1U_0402_16V4Z
<15,16,7> D_CK_SCLK SCLSPC Vdd
<15,16,7> D_CK_SDATA 6
7 SDA/SDI/SDO
R519 1 @ 2 10K_0402_5% SDO/SA0 11 G_SEN_INT
+3VS INT1 G_SEN_INT <8>
R520 1 BA@ 2 10K_0402_5% 16 9
15 ADC1 INT2
13 ADC2 10
ADC3 RES
2
3 NC 5
NC GND 12
GND
LIS3DHTR_LGA16_3X3
BA@
LIS3DH
SA0 ->0, Address is 0011 000 (0x30h)
SA0 ->1, Address is 0011 001 (0x32h)

FAN & Screw Hole & G-Sensor
Custom 0.3
Z5WAH M/B LA-B162P
A B C D E
DC & VGA Interface
U11 @J36
@ J36 For ESD
+3VALW 1 14 +3VS_OUT1 2 +3VS
2 VIN1 VOUT1 13 1 2 +5VS +3VALW_PCH +CPU_CORE +1.05VS_VTT
47K_0402_5% VIN1 VOUT1 C976 JUMP_43X118
SUSP# 2 R927 1 3VS_ON 3 12 2 1 330P_0402_50V7K
C980 ON1 CT1 1 2
1 2 +5VALW 4 11 EMC@ C93
VBIAS GND
10U_0603_6.3V6M
0.1U_0402_16V4Z 1 1 1 22U_0805_6.3V6M
1 1
2 @ 1 5VS_ON 5 10 2 1 EMC@
ON2 CT2
C92
R926 330P_0402_50V7K C39 C64
0_0402_5% C979 +5VALW 6 9 C967 @J37
@ J37 EMC@ EMC@
1 2 EMC@ 7 VIN2 VOUT2 8 +5VS_OUT1 2 2 2 2
VIN2 VOUT2 1 2 +5VS
0.1U_0402_16V4Z 22U_0805_6.3V6M
Reserved for ESD 15 JUMP_43X118 22U_0805_6.3V6M
GPAD
TPS22966DPUR_SON14_2X3
+5VALW
+1.35V +5VALW
2
+0.675VS +1.05VS_VTT
2
R552
2
100K_0402_5% R573 R554
2
@ 470_0603_5% 100K_0402_5%
R566 R567 @ @
1
470_0603_5% 470_0603_5%
1
SUSP @ @
1
+1.35V_R SYSON#
1
+0.675VS_R
3
+1.05VS_VTT_R
D
1
@
D D
1
2
<34,43,44,45> SUSP#
G SUSP 2 2 SUSP SYSON# 2 5 SYSON
SYSON <34,43>
1
S G G Q40A Q40B
3
R555 Q29 Q36 S S Q37 DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6
4
10K_0402_5% L2N7002LT1G_SOT23-3 L2N7002LT1G_SOT23-3 L2N7002LT1G_SOT23-3 @ @
@ @ @
2 2
+1.05VS_VTT to +1.05VSDGPU
160mil
+1.05VS_VTT +1.05VSDGPU +VGA_CORE
U40
AO4478L_SO8
2
8 1
+3VS to +3VSDGPU_AON for GPU 7 2 R572
10U_0603_6.3V6M
C613
6 3 47_0603_5%
C617
10U_0603_6.3V6M
0.1U_0603_25V7K
C683
5 1 @
1
VGA@ VGA@ +VGA_CORE_R
1
+3VS +3VSDGPU_AON VGA@ VGA@ VGA@ R514
4
U12 VGA@ 100mil(1.5A) 47_0402_5% L2N7002LT1G_SOT23-3
D
1
1 2 @
5 OUT DGPU_PWR_EN# 2
2
IN +1.05VSDGPU_R G
2
2 10mil S
3
GND
3
3 4 C621 10mil Q35 3
IN VGA@ R469 1 VGA@ 2 47K_0402_5% 1.05VSDGPU_GATE
2 1 4.7U_0603_6.3V6K B+
C620 3
4.7U_0603_6.3V6K EN VGA@ 5 VGA_PWROK#
1
6
VGA@ G5243T11U_SOT23-5 C622 Q1007B
1 0.1U_0603_25V7K DMN66D0LDW-7_SOT363-6
4
VGA@
VGA_PWROK# 2 2
Q1007A
DGPU_PWR_EN DMN66D0LDW-7_SOT363-6 VGA@
1
+3VSDGPU_AON +3VSDGPU_MAIN
@J14
@ J14
1 2 +5VALW +1.5VSDGPU
1 2 DVT modify 11/20
JUMP_43X79 +5VALW +3VLP +5VALW change to +3VLP
2
@
R998 R571
2
@ VGA@ 100K_0402_5% 47_0603_5%

R994 R995 @
100K_0402_5% 100K_0402_5%
1
+3VS to +3VSDGPU_MAIN for GC6‐2.0 1.5VS_DGPU_PWR_EN# +1.5VSDGPU_R
1
DGPU_PWR_EN# VGA_PWROK#
6
+3VS +3VSDGPU_MAIN L2N7002LT1G_SOT23-3 L2N7002LT1G_SOT23-3
D D
1
U14 @ VGA@
1 2 2 1.5VS_DGPU_PWR_EN 5 2 1.5VS_DGPU_PWR_EN#
OUT <49,7,8,9> DGPU_PWR_EN VGA_PWROK <17,49> <17,48> 1.5VS_DGPU_PWR_EN
5 100mil(1.5A) G G Q45A
IN
2
2 S S @ Q45B DMN66D0LDW-7_SOT363-6
3
1
2
4 2 Q33 Q34 R999 DMN66D0LDW-7_SOT363-6 @ 4

4 GND C625 @ VGA@ 100K_0402_5% @
IN GC6@ R996 R997
2 1 4.7U_0603_6.3V6K
C624 3 100K_0402_5% 100K_0402_5%
1
GC6@ EN
1
1U_0402_6.3V6K G5243T11U_SOT23-5
1 GC6@

<17,49> 3VSDGPU_MAIN_EN Issued Date 2013/09/11 Deciphered Date 2013/09/24 Title
DC Interface
3VSDGPU_MAIN_EN From GPU Size Document Number Rev
Custom 0.3
Z5WAH M/B LA-B162P
A B C D E
A B C D
+5VS
1 VIN 1
@ PJP101 EMI@ PL101

ACES_50305-00441-001_4P HCB2012KF-121T50_0805
DC_IN_S1 1 2
1 +3VALW
2
3
4
GND
1
1
9012@
GND ESD@ PC101 EMI@ PC102 EMI@ PC103 PR102 9012@
0.1U_0603_25V7K 100P_0603_50V8 1000P_0603_50V7K <34,4> H_PROCHOT# 47K_0402_1% PR103
2
2
10K_0402_1%
9012@
2
8
PC104
D
6
9012@ 0.022U_0402_16V7K 3
P
+ BATT_TEMP <34,40>
2 2 1 1
PQ101A G O 2
-
G
DMN66D0LDW-7_SOT363-6 PU101A
1
S 9012@ LM393DR_SO8
4
PD101 9012@ 9012@
1
LL4148_LL34-2 PR101
1
1.5M_0402_5% 9012@ 9012@
PC105 PR104
2
100P_0402_50V8J 100K_0402_1%
2
1
9012@
2
PR105 2
H_PROCHOT# 47K_0402_1% 9012@
9012@ PU101B
8
PC106 LM393DR_SO8
D
3
9012@ 0.022U_0402_16V7K 5
P
5 2 1 7 +
PQ101B G O 6
- ACIN <34,41,8>
G
DMN66D0LDW-7_SOT363-6 9012@
1
S
4
PD104 9012@
LL4148_LL34-2 PR106
1.5M_0402_5%
2
3 3
@PR111
@ PR111
0_0402_5%
1 2
+3VLP +CHGRTC
- PBJ101 @ + PR112
560_0603_5%
PR113
560_0603_5%
2 1 1 2 1 2 +RTCBATT
ML1220T13RE
4 4

DCIN
Size Document Number
Rev
A B C D
A B C D
+3VLP
1
@ PJP201
SUYIN_200275GR008G13GZR @ PC202
1
10 0.1U_0603_25V7K
2
GND 9
1
GND 8 @ PR204 @ PR205
1
8 7 PR209 100_0402_1% 10K_0402_1% 10K_0402_1%

7 6 EC_SMDA 2 1
<45,47>
EC_SMB_DA1 <34,41>
2
6 5 PR208 100_0402_1%
5 4
1
EC_SMCK 2 1 @ PU201
4 3 EC_SMB_CK1 <34,41>
@ PR206 1 8
3 2 TH 2 1 100K_0402_1% VCC TMSNS1
2 1 +3VLP
PR201 2 7 2 1
1 6.49K_0402_1% GND RHYST1
1
1 2 MAINPWON 3 6 @ PR207
BATT_TEMP <34,39> OT1 TMSNS2
PR211 1K_0402_1% PR210 47K_0402_1%
BI 1 2 1K_0402_1% 4 5 @ PH201
OT2 RHYST2 100K_0402_1%_NCP15WF104F03RC
G718TM1U_SOT23-8
2
EMI@ PL201
HCB2012KF-121T50_0805
BATT_S1 1 2 BATT+ 2013/10/28 update PH201 chang
EMI@ PL202
HCB2012KF-121T50_0805 Common part SL200002H00
1 2
1
EMI@ PC201
1000P_0402_50V7K
2 2
---Battery_pin define--- ---Battery Con_pin define--- For KB9012 For KB9022

PIN1 GND PIN8 GND OTP OTP
PIN2 GND PIN7 GND
PIN3 SMD PIN6 SMD 92℃ 1.2V 1.0V
PIN4 SMC PIN5 SMC 2013/10/14 update
PIN5 TS PIN4 TS 56℃ 1.2V 1.0V
PIN6 B/I PIN3 B/I
For KB9022
sense 20mΩ
Active Recovery
PIN7 Batt+ PIN2 Batt+
PIN8 Batt+ PIN1 Batt+ PR216 22.6K ohm32.4K ohm 40W 52W,0.51V 40W,0.51V
PR227 26.1K ohm30K ohm 65W 84.5W,0.82V 65W,0.82V
PH201 under CPU botten side :

CPU thermal protection at 92 degree C ( shutdown )
Recovery at 56 degree C +EC_VCCA
3 3
2013/10/02 ADP_I <34,41>

40W@ PR202
Add for ENE9022 Battery Voltage drop detection. B+
1
10.5K_0402_1%
Connect to ENE9022 pin64 AD1. 9022@ PR216
32.4K_0402_1%
65W@
PR202
10K_0402_1%
Battery is 3-cell design.
2
@9022@
1
PR230
B+=9V 80.6K_0402_1%
<34> VCIN0_PH
9022@ PR227
PR229 30K_0402_1%
2
@9022@ 0_0402_5%
<34,42> MAINPWON
1 2 VCIN1_PROCHOT <34>
1 2
VCIN1_BATT_DROP <34> 65W@ PR223
54.9K_0402_1%
1
1 2 H_PROCHOT#_EC <34>
1
PH202
2
@9022@ PC203 @9022@ PR228 100K_0402_1%_NCP15WF104F03RC

B value:4250K±1% 40W@ PR223
0.1U_0402_25V6 10K_0402_1% 105K_0402_1%
1
2
2013/10/28 update PH202 chang
2
Common part SL200002H00
1
1
1_0402_1%
PR226
PR203
0_0402_5%
10K_0402_1%
PR225
2
For 65W adapter==>action 70W , Recovery 54W @
4 4
2
2
For 40W adapter==>action 52W , Recovery 40W
<34> ECAGND
BATTERY CONN / OTP
A B C D
A B C D
Protection for reverse input
Vgs = 20V 2013/10/14
1
PQ301 D
2 Vds = 60V PR303 10m ohm chang -->20m ohm B+
G Id = 250mA SD00000S120
S 2N7002KW_SOT323-3
3
PR302
PR301
1 2 1 2 Rds(on) typ = 35mohm max
1M_0402_5% 3M_0402_5%
Vgs = 20V Rds(on) = 35mohm max
1
Need check the SOA for inrush Vds = 30V Vgs = 20V 1
ID = 7.7A (Ta=70C) Vds = 30V

VIN
P1 P2 ID = 7.7A (Ta=70C)
1 1 8 PR303 EMI@ PL301 CHG_B+
2 2 7 0.02_1206_1% 1UH_NRS4018T1R0NDGJ_3.2A_30% 8 1
5 3 3 6 1 4 1 2 7 2
Isat: 4A
2200P_0402_25V7K
10U_0805_25V6K
10U_0805_25V6K
5 6 3
2200P_0402_50V7K
0.1U_0402_25V6
2 3 5
DCR: 27mohm
0.1U_0402_25V6
@EMI@PC306
4
4
1
1
0_0402_5%
PC303
PC304
EMI@ PC305
0.01U_0402_50V7K
PQ302 PQ303
PC301
@ PR304
4
1
1
AON6414AL_DFN8-5 AO4466L_SO8 VIN PQ304
PC302
PC307
AO4466L_SO8
2
2
VF = 0.5V
2
2
3
2
PD301
BQ24725A_ACDRV_1 BAS40CW_SOT323-3
0.1U_0402_25V6
0.1U_0402_25V6
BQ24725A_BATDRV 1 2BQ24725A_BATDRV_1
Rds(on) = 30mohm max
1
1
PC308
PC310
PR305
Vgs = 20V
1 1
1 2
10_1206_1%
PC311 4.12K_0603_1%
0.047U_0402_25V7K Vds = 30V
PR306
2
PC309 1 2
0.1U_0402_25V6 ID = 7A (Ta=70C) 2013/11/29 update PL302 change
VF = 0.37V
Common part SH00000YB00
5
2.2_0603_5%
AON7408L_DFN8-5
PR307
PD302
BQ24725A_VCC2
RB751V-40_SOD323-2 Support max charge 3.5A
PR308 7*7*3
BQ24725A_ACP
Power loss: 0.245W
PQ305
0_0402_5%
BQ24725A_REGN
BQ24725A_BST2
2
DH_CHG 1 2 4 CSR rating: 1W
BQ24725A_LX
4.12K_0603_1%
4.12K_0603_1%
VSRP-VSRN spec < 81.28mV

2 2
1
PC312 BATT+
PR309
PR310
DH_CHG
1 2 PL302
10UH_PCMB063T-100MS_4A_20% PR311
3
2
1
1U_0603_25V6K 1 2 0.01_1206_1%
BQ24725A_ACN
BQ24725A_LX 1 2 CHG1 4
2
PC313
5
1U_0603_25V6K 2 3
20
19
18
17
16
PU301
AON7408L_DFN8-5
CSON1
CSOP1
1
680P_0402_50V7K 4.7_1206_5%
VCC
PHASE
HIDRV
BTST
REGN
10U_0805_25V6K
10U_0805_25V6K
@EMI@
PR312
21
0.1U_0402_25V6
0.1U_0402_25V6
PAD
PC314
PC315
1
1
PQ306
1 15 DL_CHG 4
ACN LODRV
PC316
PC317
2
2
2 14
ACP GND PR313
3
2
1
2
1
@EMI@
BQ24735RGRR_QFN20_3P5X3P5 10_0603_1%
PC318
BQ24725A_CMSRC 3 13 SRP1 2 CSOP1
CMSRC SRP
1
PR314
2
6.8_0603_1%
BQ24725A_ACDRV 4 12 SRN1 2 CSON1
2
ACDRV SRN PC319
0.1U_0603_16V7K
+3VLP 1 2 5
ACOK BATDRV
11 **Design Notes**
BQ24725A_BATDRV
Module model information PR315 100K_0402_1%
ACDET
#For 65 /90W system, 3S1P/3S2P battery
IOUT
SDA
ILIM
SCL
Maximum Charging current 3.5A
BQ24735A_V1.mdd <34,39,8> ACIN Battery discharge power 55W.
#Register Setting
6
10
+3VALW
3
BQ24735A_V2.mdd 1. 0X12 bit8 set 0 (default 1) to disable IFAULT HI if add ISN choke 3
BQ24725A_ACDET
BQ24725A_ILIM 1 2
2. 0X12 bit3 set 1 (default 0) to enable turbo boost function
BQ24725A_IOUT
PR316
3. Disable turbo when AC only
100K_0402_1%
0.01U_0402_25V7K
316K_0402_1%
1
#Circuit Design
PC320
PR317
1
PR318
422K_0402_1% 1. ACOK,ILIM pull high voltage need base on 3/5V enable control
VIN 1 2 2. Use 10X10 choke and 3X3 H/L side MOSFET
2
Charge current 3.5A
2
Power loss : 1.82W

Power density : 0.81 (15X15)
3. If use 4S per cell 4.35V battery, need additional circuit
for ACDET(PR218/PR220/PR222 change to 0.1%, parallel resistors
with PR222 for ACDET setting)
2200P_0402_50V7K
4. PC223 2200p is for quick response when AC plug out.

66.5K_0402_1%
EC_SMB_CK1 <34,40>
5. For hybrid design, need double check PQ202,PQ203,PQ204,PQ205 component rating
100P_0402_50V8J
1
1
PC321
#Protect function
1
PC322
PR319
EC_SMB_DA1 <34,40>1. ACOVP : ACDET voltage > 3.14V

2
2. Charger timeout : No communication within 175s(default)

2
@ PR320
@PR320
2
0_0402_5% 3. ACOC : 3.33 X Input current DAC setting(default)

1 2
ADP_I <34,40> 4. CHGOCP : 3/4.5/6A based on current current setting
5. BATOVP : 103-106%
1
6. BATLOWV : 2.5V
PC323 @
100P_0402_50V8J
7. TSHUT : 155C
8. IFAULT HI : 750mV (default)
2
4
Close EC chip 9. IFAULT LOW : 110mV (default) 4
Vin Dectector
Min. Typ Max.
L-->H 17.16V 17.63V 18.12V
H-->L 16.76V 17.22V 17.70V
VILIM = 20*ILIM*Rsr Issued Date 2014/07/02 Deciphered Date 2013/09/24 Title
ILIM = 3.3*100/(100+107)/20/0.02
CHARGER
= 3.986 A Size
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Common Circuit 0.3
A B C D
A B C D E
Module model information

SY8208B_V2.mdd
SY8208C_V2.mdd
1 1
EN1 and EN2 dont't floating

PR402
499K_0402_1%
ENLDO_3V5V 1 2
B+
1
150K_0402_1%
PU401 PC402 PR403
B+
PR404
EMI@ PL401 7 1 3V5V_EN 0.01U_0402_25V7K 1K_0402_5%
HCB2012KF-121T50_0805 IN EN1 1 2 1 2
2200P_0402_50V7K
1 2 3V_VIN 8 3 3V_FB
IN EN2 PR401 PC403
2
10U_0805_25V6K
10U_0805_25V6K
@EMI@ PC401
EMI@ PC404
0.1U_0402_25V6
6 1
BST_3V 2 1 2
BS
1
1
PC406
2.2_0603_5%
PC405
0.1U_0603_25V7K
PL402
2
2
10 LX_3V 1 2
@ LX +3VALWP
9 4 1.5UH_PCMB053T-1R5MS_6A_20%
GND OUT
@EMI@
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
PR405
1
1
680P_0603_50V7K 4.7_1206_5%
2 5
+3VALWP PG LDO +3VLP
PC407
PC408
PC409
PC410
1
SY8208BQNC_QFN10_3X3
2
PC411
13V_SN
4.7U_0603_6.3V6M
2
1
Check pull up resistor of SPOK at HW side

PR412
100K_0402_5%
3.3V LDO 150mA~300mA
@EMI@
PC412
2
2
2
Vout is 3.234V~3.366V Ipeak=4.65A 2
<34> SPOK
Imax=3.25A
TDC=6A Iocp=10A
@ PJ401
+3VALWP 1 2 +3VALW
1 2
JUMP_43X118
B+ EMI@ PL403
HCB2012KF-121T50_0805
1 2 5V_VIN
@ PJ402
+5VALWP 1 2 +5VALW
1 2
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
PU402 PC413 PR406 JUMP_43X118

8 1 3V5V_EN 6800P_0402_25V7K 1K_0402_5%
IN EN1 1 2 1 2
1
1
PC414
PC415
EMI@ PC417
@EMI@ PC418
3 5V_FB PR407 PC416

EN2 2.2_0603_5% 0.1U_0603_25V7K
6 BST_5V 1 2 1 2
2
BS
5*5*3
@
PL404
9 10 LX_5V 1 2 +5VALWP
GND LX
VCC_3V 5 4 1.5UH_PCMB053T-1R5MS_6A_20% @ @
VCC OUT
680P_0603_50V7K 4.7_1206_5%
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
PR408
1
@EMI@
SPOK 2 7
PG LDO VL
1
PC419
PC420
PC421
PC422
PC423
PC428
PC427
4.7U_0603_6.3V6M
3 3
SY8208CQNC_QFN10_3X3
2
15V_SN
2
2
1
PC424
4.7U_0603_6.3V6M
2
PC425
@EMI@
Vout is 4.998V~5.202V
TDC=6A Ipeak=9A
5V LDO 150mA~300mA Imax=6.25A
Iocp=10A
PR409
2.2K_0402_5%
1 2
<34> EC_ON PD401
1 2
<34,40> MAINPWON
RB751V-40_SOD323-2
20131209 PR410_R-short change to PD401_SCS00000Z00
3V5V_EN
1M_0402_1%
4.7U_0402_6.3V6M
1
EC VDD0 is +3VL, PC426 UNPOP

1
PR411
PC426
EC VDD0 is +3VALW, PC426 POP

4 4
2
@
2

+3VALW/+5VALW
A B C D E
5 4 3 2 1

RT8207M_V1.mdd For Single layer
RT8207M_V2.mdd For Dual layer
D D
Pin19 need pull separate from +1.5VP.

If you have +1.5V and +0.75V sequence question, 0.75Volt +/- 5%
EMI@ PL501
HCB2012KF-121T50_0805
you can change from +1.5VP to +1.5VS. TDC 0.7A
B+ 1 2 1.35V_B+ PR501 Peak Current 1A
2.2_0603_5%
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
BST_1.35V 1 2 BOOT_1.35V
+1.35VP
1
1
@EMI@ PC502
EMI@ PC503
PC504
PC505
DH_1.35V +0.675VSP
2
10U_0805_6.3V6K
10U_0805_6.3V6K
SW_1.35V
1
PC501
PC506
PC507
5
0.1U_0603_25V7K
16
17
18
19
20
2
C
2013/10/20 update PU501 C
2
PHASE
UGATE
BOOT
VTT
VLDOIN
Setting OCP__PR502-->6.65K 21
PQ501 PAD
AON7408L_DFN8-5 4 DL_1.35V 15 1
LGATE VTTGND
2013/10/28 update PL502 chang
1.364V 1.1% Common part 7*7*3 SH00000YE00 14 2
PL502 PR502 PGND VTTSNS
1
2
3
1UH_PCMB063T-1R0MS_12A_20% 6.65K_0402_1%
1 2 1 2 CS_1.35V 13 3
+1.35VP PC508 CS RT8207MZQW_WQFN20_3X3 GND
1
1U_0603_10V6K
5
H=4.5 @EMI@ PR503 PR504
1 2 12
VDDP VTTREF
4 VTTREF_1.35V
SF000002Z00 4.7_1206_5% 5.1_0603_5%

330U_2.5V_M
1 PQ502 1 2 VDD_1.35V 11 5
1 2
+5VALW VDD VDDQ

+1.35VP
1
PGOOD
AON7506_DFN33-8-5
+
PC509
ESR=15m ohm 4 PC510
TON
1
@EMI@ PC512 0.033U_0402_16V7K
FB
S5
S3
2
2013/10/28 update PC509 chang 680P_0402_50V7K PC513
+5VALW
2
2 1U_0603_10V6K
10
6
Common part SF000006S00 H4.5
1
2
3
FB_1.35V
EN_0.675VSP
TON_1.35V
EN_1.35V
PR506
8.2K_0402_1%
2013/10/14 update PR507 1 2 +1.35VP
887K_0402_1%
B PQ502__AON7702A EOL change 1.35V_B+ 1 2 B
-->AON7506_SB000010A00
1
Mode Level +0.75VSP VTTREF_1.5V @ PR509 PR508
0_0402_5% 10K_0402_1%
S5 L off off 1 2
<34,38> SYSON
2
S3 L off on
S0 H on on
1
MOSFET: 3x3 DFN @ PC514
0.1U_0402_10V7K
Note: S3 - sleep ; S5 - power off H/S Rds(on): 27mohm(Typ), 34mohm(Max)
2
L/S Rds(on): 22mohm(Typ), 13.5mohm(Max) @ PR510
0_0402_5%
1 2
Choke: 7x7x3 <34,38,44,45> SUSP# PR511
0_0402_5% @ PJ501
Rdc=8.3mohm(Typ), 10mohm(Max) 1 2 +1.35VP 1 2 +1.35V
<15> DDR_VTT_PG_CTRL 1 2
1
JUMP_43X118
Switching Frequency: 285kHz @ PC515 @ PJ502
Ipeak=5.4A 0.1U_0402_10V7K 1 2
2
1 2
Delta I =4.4A JUMP_43X118
Iocp=9.15~6.58A
@ PJ503
OVP: 110%~120% 1 2
VFB=0.75V, Vout=1.364V +0.675VSP 1 2 +0.675VS
JUMP_43X39
A A
Security Classification Compal Secret Data

Title
Issued Date 2010/07/20 Deciphered Date 2013/09/24
+1.35VP/+0.675VSP
5 4 3 2 1
5 4 3 2 1
D D

SY8208D_V1.mdd
EN pin don't floating

If have pull down resistor at HW side, pls delete PR2
PR602
0_0402_5%
1 2
SUSP# <34,38,43,45>
C C
1
@ PC602
1M_0402_1%
0.22U_0402_10V6K
2
PR603
2
@EMI@ PR604 @EMI@ PC603
4.7_1206_5% 680P_0603_50V7K
EMI@ PL601 1 2SNB_1.05V 1 2
HCB2012KF-121T50_0805 PU601
B+ 1 2 B+_1.05V 8
IN EN
1 PR601 PC601 TDC 8A
10U_0805_25V6K
10U_0805_25V6K
0_0603_5% 0.1U_0603_25V7K
2200P_0402_50V7K
6 1
BST_1.05V 2 1 2 PL602
0.1U_0402_25V6
BS 1.062V 1.1%
1
1
@EMI@ PC606
PC604
PC607
1UH_PCMB063T-1R0MS_12A_20%
LDO_3V
+1.05VSP
EMI@ PC605
9 10 LX_1.05V 1 2
GND LX
2
15.4K_0402_1%
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2013/10/28 update PL602 chang
1
330P_0402_50V7K
Common part 7*7*3 SH00000YE00
1
PR606
4
FB
Rup
PC608
PC609
PC610
PC611
PC612
PC615
@ PR605
0_0402_5% ILMT_1.05V3 7
+3VALW
2
ILMT BYP
4.7U_0603_6.3V6K
2
2
ILMT_1.05V
+3VS 1 2 VCCST_PWRGD 2 5 LDO_3V
4.7U_0603_6.3V6K
PG LDO
1
PC614
PR608 @
1
PC613
10K_0402_5% SY8208DQNC_QFN10_3X3
FB = 0.6V
2
1
PR607 @
2
0_0402_5%
Rdown PR609
2
20K_0402_1%
2
<11,34> VCCST_PWRGD +1.05VSP PJ601
Pin 7 BYP is for CS. 1
1 2
2 +1.05VS_VTT
B
The current limit is set to 8A, 12A or 16A when this pin Common NB can delete +3VALW and PC15 B
JUMP_43X118 @
is pull low, floating or pull high
VFB=0.6V
Vout=0.6V* (1+Rup/Rdown)
Vout=1.05V
A A

+1.05VSP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.3
5 4 3 2 1
5 4 3 2 1
+3VS +5VALW
Ultra Low Dropout 0.23V(typical) at 3A Output Current
1
D D
1
@ PJ701 PC702
1
JUMP_43X39 1U_0402_6.3V6K
2
2
2
PC703 PU701
1
4.7U_0805_6.3V6K APL5930KAI-TRG_SO8
6
1.507V 0.53%
5 VCNTL 3
2
PR701 9 VIN VOUT 4 @ PJ702
100K_0402_5% VIN VOUT
+1.5VSP +1.5VSP 1
1 2
2 +1.5VS
20K_0402_1%
1 2 8
<34,38,43,44> SUSP# EN
1
7 2 JUMP_43X39
GND
POK FB
PR703
PC704
1
Rup 0.01U_0402_25V7K
0.1U_0402_16V7K
1
PC701
PR704 PC705
2
47K_0402_5% 22U_0603_6.3V6M
2
2
1
PR705
Rdown 22.6K_0402_1%
2
C C
Vout=0.8V* (1+Rup/Rdown)
Ultra Low Dropout 0.23V(typical) at 3A Output Current
B B
A A

+1.5VSP
5 4 3 2 1
5 4 3 2 1
Base on BDW PDDG Rev_0_73 H-side MOS: MDV1525URH

Module model information: Rds(on):
ISL95813 (for 15W & 28W CPU) 15W 28W <10.1mohm@Vgs=10V
<14.0mohm@Vgs=4.5V
TDC 14A TDC 19A Id :24A@Vgs=10V
Location MAX 32A MAX 40A Note

D D
L-side MOS: MDU1511RH
OCP 38.4A OCP 48A Rds(on):
<2.4mohm@Vgs=10V
Loadline=-2.0mv/A Loadline=-2.0mv/A <3.3mohm@Vgs=4.5V
+1.05VS_VTT Follow intel guideline
PR802 130_0402_1%
Id :100A@Vgs=10V
PR820 499 Ohm 619 Ohm OCP
1 2
PR816 1.27kOhm 1.58kOhm Droop
PC802
PC816 0.033uF 0.022uF RC Match -->20130828
1U_0402_6.3V6K PR803 54.9_0402_1% Choke: 0.15UH (Size:7*7*4)
1 2 1 2 PR804 90.9kOhm 113kOhm PROG1 SH00000U300
Rdc=0.66mohm +-7%
PR807 93.1kOhm 95.3kOhm IMON Heat Rating Current=36A
<11> VR_SVID_DATA
Saturation Current=45A
PC811 0.1uF ( 0402 ) 0.1uF ( 0402 ) RC Filter
Note:
VR_SVID_ALRT# Pull high on HW side
<11> VR_ALERT#
<11> VR_SVID_CLK 15W@ PR804 Note: CPU_B+

169K_0402_1% EMI@ PL801
1 2 PR804=113K HCB2012KF-121T50_0805 B+
C C
=>Icc(max)=40A
VR_SVID_ALRT#
VR_SVID_DATA
CPU_B+ 1 2
fsw=700KHz
VR_SVID_CLK
2200P_0402_50V7K
0.01U_0402_50V7K
<11> VR_ON
10U_0805_25V6K
10U_0805_25V6K
68U_25V_M_R0.36
28W@ PR804 1
EMI@ PC805
EMI@ PC806
PC807
205K_0402_1% Height 8 mm
PRGM1
1
+
PC804
PR805
AON7518_DFN8-5
100u_SF000000I80
1
PC803
1.91K_0402_1%
PQ801
1 2
2
PR806 2
2
0_0603_5% Height 6 mm
21
20
19
18
17
<11,8> VGATE PU801 1 2 4 68u_SF000000W00
SCLK
ALERT#
SDA
PRGM1
PAD
PC808 VR_ON 1 16 LAGTE

2013/12/13 update PL802 change PL802
3
2
1
1000P_0402_50V7K VR_ON LGATE Common part SH000011P00
1 2 0.15UH 20% PCME064T-R15MS0R667 36A
2 15 PHASE 1 4
PR807 PGOOD PHASE
+CPU_CORE
@EMI@ PR808
4.7_1206_5%
121K_0402_1% 2 3
1
1 2 IMON 3 14 UAGTE
IMON UGATE PR801 PC801 28W@
5
ISL95813HRZ-T_QFN20_3X4 2.2_0603_5% 0.22U_0603_16V7K PQ803 PQ802
AON6554_DFN5X6-8-5
AON6554_DFN5X6-8-5
1
<34> VR_HOT# VR_HOT_1# 4 13 BOOT 1 2 1 2
PH802 VR_HOT# BOOT PR809
2
47P_0402_50V8J
470K_0402_5%_ TSM0B474J4702RE PR810 3.65K_0603_1%

Over temperature protection: 1 2 1 2 NTC 5 12
NTC VCC +5VS
1
PC809
@EMI@ PC810
680P_0603_50V7K
4 4 TDC 19A
OTP Setting: 100C active
2
1
3.83K_0402_1%
Pin5 (NTC) voltage <0.88V, Protect PR811 COMP 6 11 PRGM2 MAX 40A
2
COMP PRGM2
1
Pin5 (NTC) voltage >0.92v, recovery 27.4K_0402_1% OCP 48A
ISUMN
ISUMP
2
1 2 PC811
Loadline=-2.0mv/A
RTN
3
2
1
3
2
1
124K_0402_1% 0.1U_0402_25V6
FB
2
1
PR812
B 2013/10/28 update PH802 chang B

7
10
Common part SL200002E00

1.91K_0402_1%
1
FB
ISUMN
ISUMP
Note:
PR813
33P_0402_50V8J PR812=124K
1
PC812
2K_0402_1%
10_0402_1%
=>Slew rate=53mV/us
6800P_0402_25V7K
2
@ PR815
15W@
Vboot = 1.7V
2
PR814
1
PC813
1.27K_0402_1%
1
PR816
2
1
4.99M_0402_1%
390P_0402_50V7K
1
1
330P_0402_50V7K
PR818
2
1
@ PC815
PR817
2.61K_0402_1%
RC Match
2
PC814
Droop
2
2
15W@
2
1
28W@ PR816
1.58K_0402_1% PC816 PC817 PR819
@ 0.033U_0402_16V7K 0.1U_0402_16V4Z 11K_0402_1%
2
1
<11> VCC_SENSE
28W@ PC816 PH801
28W@ PR820 OCP Setting 0.022U_0402_16V7K 10KB_0402_5%_ERTJ0ER103J
348_0402_1%
@ PC818 15W: 38A
2
1 2 28W: 48A
0.082U_0402_16V7K

@ PC819
330P_0402_50V7K
1
PR820 15W@ Common part SL200002G00

1 2
A A
2
PC820 316_0402_1%
1 2
0.01U_0402_50V7K
@ PC821 @ PR821
1 2 1 2
<11> VSS_SENSE 123
4700P_0402_25V7K 1.5K_0402_1% Title
Local sense put on HW site CPU_CORE/GFX_CORE

0.3
Z5WAH M/B LA-B162P
5 4 3 2 1
5 4 3 2 1
PWR Rule
需確認最新SPEC.
Modify 8/6.
D D
+CPU_CORE
30 X 22uF 0805
2012/10/23
22U_0603_6.3V6M
PC901
22U_0603_6.3V6M
PC902
22U_0603_6.3V6M
PC903
22U_0603_6.3V6M
PC904
22U_0603_6.3V6M
PC905
check the output cap Qty!!!
1
1
2012/10/24
23 pcs 22uF and reserve 7 pcs
2
2
2013/01/14
22uF*17 unpop:22uF*3
20130828
22U_0603_6.3V6M
PC906
22U_0603_6.3V6M
PC907
22U_0603_6.3V6M
PC908
22U_0603_6.3V6M
PC909
22U_0603_6.3V6M
PC910
1
1
15W: 22uF*14
28W: 22uF*16
2
C 2 C
22U_0603_6.3V6M
PC911
22U_0603_6.3V6M
PC912
22U_0603_6.3V6M
PC913
22U_0603_6.3V6M
PC914
22U_0603_6.3V6M
PC915
1
1
28W@
2
@
22U_0603_6.3V6M
PC916 28W@
22U_0603_6.3V6M
PC917
22U_0603_6.3V6M
PC918
22U_0603_6.3V6M
PC919
22U_0603_6.3V6M
PC920
1
1
2
B B
330U_D2_2V_Y
1
+
@ PC921
A A

CPU_CORE_CAP
5 4 3 2 Date: Wednesday, January 08, 2014 1 Sheet 47 of 54
5 4 3 2 1

TPS51212_V1.mdd for Single layer
TPS51212_V2.mdd for Dual layer
D D
VGA_EMI@ PL1001
HCB2012KF-121T50_0805
+1.5VSDGPUP_B+ 1 2
B+
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
PC1005
1
1
@EMI@ PC1002
PC1003
VGA@ PC1004
2
2
@
VGA_EMI@
VGA@
2013/10/20 update 4 PQ1001
AON7408L_DFN8-5
Setting OCP__PR1003-->102K VGA@ VGA@ PR1001 VGA@ PC1001 2013/10/28 update PL1002 change
PU1001 2.2_0603_5% 0.1U_0603_25V7K
VGA@ PR1003 1 10 1
BST_+1.5VSDGPUP 2 1 2 Common part 7*7*3 SH00000YV00
0.9% 1.51V
3
2
1
102K_0402_1% PGOOD VBST
VGA@ PR1004 1 2TRIP_+1.5VSDGPUP2 9 UG_+1.5VSDGPUP VGA@ PL1002
0_0402_5% TRIP DRVH 2.2UH_ETQP3W2R2WFN_8.5A_20%
<17,38> 1.5VS_DGPU_PWR_EN 1 2 EN_+1.5VSDGPUP 3 8 SW_+1.5VSDGPUP 1 2
EN SW
+1.5VSDGPUP
FB_+1.5VSDGPUP 4 7
VFB V5IN
+5VALW
1
0.1U_0402_16V7K
2013/10/28 update PC509 chang
PC1009 VGA@
C RF_+1.5VSDGPUP 5 6 LG_+1.5VSDGPUP @EMI@ C
TST DRVL
1
Common part SF000006S00 H4.5

PC1006
PR1005
330U_2.5V_M
11 4.7_1206_5%
AON7506_DFN33-8-5
TP 1
VGA@ PQ1002
VGA@ VGA@
2
2
PR1006 TPS51212DSCR_SON10_3X3 PC1007 4 +
1U_0603_6.3V6M
ESR=15m ohm
@ 470K_0402_1%
1
PC1010 @EMI@
2 680P_0402_50V7K 2
H=4.5
3
2
1
2
SF000002Z00
VGA@
PR1007
11.5K_0402_1%
1 2
1
VGA@
PR1008
10K_0402_1%
2
B B
@ PJ1001
+1.5VSDGPUP 1 2 +1.5VSDGPU
1 2
JUMP_43X118
MOSFET: 3x3 DFN @ PJ1002
+1.2V +1.05V 1 2
H/S Rds(on): 27mohm(Typ), 34mohm(Max) 1 2
Switching Frequency: 290kHz Switching Frequency: 290kHz L/S Rds(on): 22mohm(Typ), 13.5mohm(Max) JUMP_43X118
Imax=8A Imax=5.4A
OCP~10.5A Ipeak=6.5A Choke: 7x7x3
OVP: 120%~130% Iocp=7.8A Rdc=15.5mohm +/-15%
VFB=0.704V, Vout=1.207V OVP: 120%-130%
VFB=0.704V, Vout=1.055V Switching Frequency: 290kHz
Ipeak=10A
Delta I =2.16A
Vout PR1007 PR1008 PR1003 Iocp=12.14~16.67A
OVP: 120%~130%
+1.5V 11.5k 10k VFB=0.704V, Vout=1.51V
+1.35V 9.31k 10k

A A
+1.2V 7.15K 10k 105K
+1.05V 4.99k 10k 93.1k

Issued Date 2011/07/29 Deciphered Date Title
1.5VSDGPUP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.3
5 4 3 2 1
A B C D
Vboot=Vvref*Rref2/(Rref1+Rref2+Rboot) Current Limit threshold setting Different VGA Chip (different EDP-Peak Current) need select different solution
Rt=Rrefadj // (Rboot+Rref2) Rocset= (Ivalley * Rds(on) + 40 mV) / 10uA
Module model information:
Vmin= Vvref*[Rref2/(Rref2+Rboot)]*[Rt/(Rref1+Rt)] I_ripple=(19-0.9)*0.9/ VGA Chip N14P-GV N14P-GV2 N14M-GS N14M-LP N14P-LP N14P-GE N14P-GS N14P-GT N15S-GT N15V-GM
RT8813A_V1A for IC module (304.89Khz*0.36u*19)=7.811A
Vmax=Vvref*Rref2/[(Rref1//Rrefadj)+Rboot+Rref2]
RT8813A_V1B for SW module OpenVReg Configurations Config B Config B Config B Config B Config B Config B Config B Config B Config B Config C
Vout=Vmin+N*Vstep OCP=54A/2=27A per phase
Vstep=(Vmax-Vmin)/Nmax Ivalley=27A-7.811A/2=23.1A Rated TDP Power at Tj=102C 18W 25W 18W 13W 18.9W 25W 25.6W 35.5W 18W 18.16W
PWM-VID Spec and component Values Boosted GPU Total at Tj=102C 25W 32W 25W 20W 23W N/A 30W 40W 25W 24.72W
H-side MOS:AON6552 L-side MOS:AON6554
PWM-VID Spec Config B Config C Config D Rds(on): Rds(on): EDP-Continuous at Tj=102C 24A 32A 26A 22A 25A 27A 38A 45A 31A 29.2A
1 5.6mohm@Vgs=10V 3.2mohm@Vgs=10V 1
Vmin 0.6V 0.65V 0.9V 6.7mohm@Vgs=4.5V 3~3.8mohm@Vgs=4.5V EDP-Peak at Tj=102C 35A 55A 45A 35A 35A 40A 60A 75A 60A 44.3A
Vmax 1.2V 1.15V 1.15V Id :20A@Ta=25 degC Id :85A@Ta=25 degC
Vboot 0.9V 0.9V 1.028V Istep max (Evaluation) 15A 27A 25A 20A 14A 12A 31.5A 35A
Voltage step 6.25mV 25mV 12.5mV Choke: 0.22uH (Size:7*7*4)
Rdc=0.97mohm +-5% OCP Setting Current 42A 66A 54A 42A 42A 48A 72A 90A 72A 54A
N of Voltage level 96 20 20
Heat Rating Current=34A
Rrefadj PR1206 20K 39K 27K Saturation Current=25A Rocset 8.96K 12.45K 10.7K 8.96K 8.96K 9.83K 8.3K 9.39K 13K 10.2K
Rref1 PR1204 20K 30K 7.5K
Recommendation 2phase 1H1L 2phase 1H1L 2phase 1H1L 2phase 1H1L 2phase 1H1L 2phase 1H1L 2phase 1H2L 2phase 1H2L 2phase 1H1L 2phase 1H1L
Rboot PR1205 2K 3K 0 C=3*330uF (9mohm)=990uF
Rref2=PR1209 PR1209 18K 24K 6.2K Vripple=Iripple*ESR(min)=7.811A*3mohm=23.4mV 6mohm * 3 4.5mohm * 3
+PR1212 Polymer Cap (330uF) 6mohm * 2 9mohm * 3 9mohm * 3 6mohm * 2 6mohm * 2 6mohm * 2 (L=0.22uH) (L=0.15uH)
PR1212 0 3K 1.74K
C PC1209 2.7nf 1.8nf 5.6nf
Or OSCON (390uF) 10mohm * 3 10mohm * 3 10mohm * 3 10mohm * 3 10mohm * 3 10mohm * 3 NULL NULL GT@ GM@
N15S-GT N15V-GL N15V-GM @VGA@ PR1202
1K_0402_5%
1 2 +3VS
PWM VID and Output voltage control GM@ PR1204 GL@ PR1204 GM@ PR1206
7.5K_0402_1% 30K_0402_1% 27K_0402_1%
1.Boot mode
1 2 DGPU_VID <17>
2.Standby mode (don't support) GPU_B+
3.Normal mode @VGA@ PR1203
0_0402_1% Operation phase Number PSI Voltage setting
GL@ PR1206
39K_0402_1% 1 phase with DEM 0V to 0.8V VGA_EMI@ PL1201
1
VGA@ GM@ PR1205 GL@ PR1205 1 HCB2012KF-121T50_0805

B+
PC1202 0_0402_5% 3K_0402_1% Rref1 GT@ 1 phase with CCM 1.2V to 1.8V
1U_0402_6.3V6K PR1204 1 2
2
2 20K_0402_1% Active phase with CCM 2.4V to 5.5V 2
VGA@
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
Rboot Rrefadj
2
GT@ PSI Pull high on HW side PR1208

GT@PR1205
GT@PR1205 PR1206 @VGA@ PR1207 2.2_0603_5%
1
PSI <17>
@VGA_EMI@ PC1216
VGA_EMI@ PC1204
VGA@ PC1205
VGA@ PC1206
2K_0402_5% 20K_0402_1% 1 2 1
U2_BOOT1 2 VGA@
1 2 1 2
GM@ PR1209 GL@ PR1209 0_0402_1% PQ1201
+VGA_CORE
AON6552_DFN5X6-8-5
1
2
5
18K_0402_1%
GT@ PR1209
6.2K_0402_1% 24K_0402_1% @VGA@ PR1210 Pull high on HW side

1
EDP-Continuous 31A
2700P_0402_50V7K
GL@ PC1209 1K_0402_5% PC1207 VGA@

0.01U_0402_16V7K
PC1208
1800P_0402_50V7K 1 2 0.22U_0603_25V7K
2 EDP-Peak 60A
GPU_VID
PR1226 3VSDGPU_MAIN_EN <17,38>

1
1
OCP min 72A

GT@ PC1209
Rref2 0_0402_5%
1 2 U2_UGATE1 1 2 4
0.1U_0402_25V6
2
Dgpu_Pwr_En <38,7,8,9> VGA@ PR1211

2
1
2
GPU_REFADJ
@VGA@
@VGA@
GT@ PR1212
PC1210
0_0603_5%
U2_BOOT1
U2_UGATE1
1
0_0402_5%
GM@ PR1212 GL@ PR1212 C Reserve Location

GPU_PSI
1.74K_0402_1% 3K_0402_1% VGA@ PL1202

GPU_EN
3
2
1
GM@ PC1209 0.22UH 20% FDUE0640J -H 25A +VGA_CORE
5600P_0402_50V7K 1 4
2
GPU_FBRTN U2_PHASE1
2 3
VGA@ VGA@
6
5
PU1201 PQ1202
AON6554_DFN5X6-8-5
1
VGA@ PR1201 @VGA_EMI@
REFADJ
PSI
UGATE1
BOOT1
VID
EN
Rton 365K_0402_1% PR1213 2013/12/13 update PL1202 PL1203 change to

GPU_B+ 1 2 4.7_1206_5%
@VGA@ 1 GPU_REFIN 7 24 U2_PHASE1 Common part SH000011H00
PR1214 REFIN PHASE1 U2_LGATE1 4
2
<19> VSSSENSE_VGA 0_0402_1% @VGA@ GPU_VREF 8 23 U2_LGATE1
1 2 PC1201 VREF LGATE1 @VGA_EMI@
1
2 0.01UF_0402_25V7K
13K_0402_1%
GPU_TON 9 22 U2_PWM3 U2_PWM3 PC1211
TON GND/PWM3
GT@ PR1216
GM@ PR1216 GL@ PR1216 680P_0603_50V7K
3
2
1
1 2 GPU_FBRTN 10 21 10.2K_0402_1% 10.2K_0402_1%
2
RGND PVCC
Rocset
1
11 20
TALERT/ISEN2
VGA@ PR1215 @VGA@ U2_LGATE2
2
100_0402_1% PC1212 VSNS LAGTE2
TSNS/ISEN3
VCC/ISNE1
3 47P_0402_50V8J GPU_COMP 12 19 U2_PHASE2 3

2
SS PHASE2
UGATE2
PGOOD
@VGA@ PR1217
BOOT2
1 2 GPU_FB
GND
<19> VCCSENSE_VGA 0_0402_1%

@VGA@ PC1213 RT8813AGQW_WQFN24_4X4
25
13
14
15
16
17
18
1 2 Css 0.01U_0402_16V7K
+VGA_CORE 1 2
VGA@ PR1218 GPU_B+
GPU_DSBL/ISEN1
GPU_TSNS/ISEN3
GPU_HOT#
100_0402_1%
U2_UGATE2
VGA_PWROK
VGA@ PR1219 VGA@

U2_BOOT2
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
2.2_0603_5%
0.1U_0402_25V6
PQ1203
@VGA_EMI@
PC1217
PC1218
U2_BOOT2 1 2
AON6552_DFN5X6-8-5
5
VGA_EMI@
PC1215
1
1
PC1203
VGA@ PC1214
0.22U_0603_25V7K
2
GPU_VREF 2
VGA@
VGA@
1. VSNS Soft-Start time (Internal) is 0.7ms (PC1213 un-pop) U2_UGATE2 1 2 4
Tss=(Css*Vrefin)/Iss+2.3ms
18.7K_0402_1%
=0.01U*0.9V/5uA+2.3ms=4.1ms (PC1213 pop) VGA@ PR1220

1
+3VS 0_0603_5%
PR1221
VGA@ PL1203
3
2
1
VGA@
2. Switching frequency setting: +VGA_CORE

0.22UH 20% FDUE0640J -H 25A
470K_0402_5%_TSM0B474J4702RE
Fsw=(Vin-0.5)/(2*Vin*Rton*3.2p)=304.89Khz
1
U2_PHASE2 1 4
Common part SL200002E00
10K_0402_1%
VGA@ PR1222
2 3
3. Thermal monitoring: VGA@
1
5
PQ1204 @VGA_EMI@
1U_0402_6.3V6K
AON6554_DFN5X6-8-5
2
(VGPU_VREF-VTSNS)/PR23=VTSNS/Rth
1
+5VS PR1223
1
VGA@
VGA@ PH1201
PC1219
4.7_1206_5%
VGA_PWROK <17,38>
T_min T_typical T_max
2
VGA@ U2_LGATE2 4
1 2
4
PR1221=18.7K 96.73C 100C 103.1C PR1224
2.2_0603_5%
@VGA_EMI@
PC1220 4
1 2 680P_0603_50V7K
3
2
1
2
PR1221=13K 106.38C 110C 113.4C VGA@
PR1225
1
VGA@
+3VS 1 2 PC1221
1U_0402_6.3V6K
2
100K_0402_1%

RT8813
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.3
A B C D
5 4 3 2 1
+VGA_CORE
+VGA_CORE Under VGA Core
PC1305
PC1306
PC1307
PC1308
PC1309
PC1310
PC1311
PC1312
PC1313
PC1314
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
1
D D
2
2
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
N15x 2013/12/10
330U_D2_2V_Y
1 1 1
560U_2.5V_M
560U_2.5V_M
+ + + Under
PC1302
@ PC1303
PC1304
4.7uF_0603_10pcs
2 2 2 1uF_0402_4pcs
Near
VGA@
VGA@
47uF_0805_1pcs
22uF_0603_1pcs(2PCS unpop)
47U_0805_6.3V6M
4.7uF_0805_5pcs
1
PC1346
N15x2013/10/17
2
+VGA_CORE Under
4.7uF_0603_15pcs
C
Near VGA Core 1uF_0402_8pcs
C
Near
47uF_0805_0pcs
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
4.7uF_0805_5pcs
1
PC1326 @
PC1327 VGA@
PC1328 @
VGA@ PC1335
VGA@ PC1336
VGA@ PC1337
VGA@ PC1338
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
2
N15x2013/10/07
2
Under
4.7uF_0603_15pcs
1uF_0402_8pcs
Near
47uF_0805_0pcs
4.7uF_0805_5pcs
N15x2013/10/02
B
Under B
4.7uF_0603_15pcs
1uF_0402_8pcs
Near
47uF_0805_0pcs
22uF_0805_14pcs
4.7uF_0805_5pcs
4.7U_0805_6.3V6K N14x
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
VGA@ PC1341
VGA@ PC1342
VGA@ PC1343
VGA@ PC1344
VGA@ PC1345
Under
1
1
4.7uF_0603_10pcs
0.1uF_0402_4pcs
2
2
Near
47uF_0805_1pcs
22uF_0805_1pcs
4.7uF_0805_5pcs
A A

VGA_CORE CAP
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 2

for PWR
Item Fixed Issue Reason for change PG# Modify List Date Phase
P42 Add unpop PC428 PC427,22U_0603_6.3V6M_SE00000M000 11/29 EVT
1 P44 Add unpop PC615,22U_0603_6.3V6M_SE00000M000
D design update P44
D
PC609 PC610,SE00000PL00 change to 0603_6.3V6M_SE00000M000
P46 PL801 PC807,Swap positions.
P41 PL302,10uH_10104_SH000005Z80 change to 10uH_773_SH00000YB00
2 design update Update Common part P42 PR410_R-short change to PD401_SCS00000Z00
12/09 EVT
ADD 1pcs PC1346_47U_0805_6.3V6M_SE00000PL00

Del 5pcs PC1315~PC1319 4.7U_0603_6.3V6K_SE107475K80
design update VGA 29*29 change to 23*23
3 P50 Del 4pcs PC1331~PC1334 1U_0402_6.3V6K_SE000000K80 12/10 EVT
Del 6pcs PC1322~1325&PC1329~1330_22U_0603_6.3V6M_SE00000M000
PR1206_39K_0402_1% change to 27K_0402_1%(GL->GM)
PR1204_30K_0402_1% change to 7.5K_0402_1%(GL->GM)
design update PR1205_3K_0402_1% change to 0_0402_5%(GL->GM)
4 VGA 29*29 change to 23*23 PR1209_24K_0402_1% change to 6.2K_0402_1%(GL->GM) 12/12 EVT
(GM config SPEC change) PR1212_3K_0402_1% change to 1.74K_0402_1%(GL->GM)
C C
PC1209_1800P_0402_50V7K change to 5600P_0402_50V7K(GL->GM)
PR820_274_0402_SD00000EI80 change to 316_0402_SD000003480

PR814_2K_0402_1%_SD034200180 change to unpop
PC814_330P_0402_50V7K_SE074331K80 change to unpop
PR813_5.9K_0402_SD034590180 change to 1.91K_0402_SD000009O80
PR807_95.3K_0402_SD034953280 change to 121K_0402_SD034121380
PR817_Unpop change to 4.99M_0402_SD00000VO00
5 design update CPU Transient Test & Update Common part PL1202 PL1203_SH00000O200_7*7*4 change to Common part SH000011H00
PL802_SH00000U300_change to Common part SH000011P00
PC909 PC918 PC919 22U_0603_SE00000M000 SMT
PC914 22U_0603_SE00000M000,SMT change to 28W@ 12/12 EVT
PC913 22U_0603_SE00000M000 ,SMT change to @
PR227_30.9K_0402_1%_SD034309280 change to_30K_0402_1%_SD034300280
B PR1210 1K_0402_5%_SD028100180change to unpop B
PR1226 0_0402_5%_SD028000080change to SMT
A A

PIR (PWR)
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 2 of 2

for PWR
1 Module Design Module Design change 3/5V solution 3/5V Un-pop PR1 11/13 DVT
D 2 D
C C
12
B B
13
14
15
16
A 17 A

PIR (PWR)
5 4 3 2 1
A B C D E
DVT Version change list (P.I.R. List) Page 1 of 2 for HW
1 material update P28 L2503/2504/2505 Change P/N from SM01000GA00 to SM01000FH00 11/12 DVT
2 material update P34 L31/L32 Change P/N from SM010030010 to SM010009U00 11/12 DVT
1 3 design update P35 Delete D24, ON/OFF change to ON/OFFBTN# 11/12 DVT 1
4 for TP_INT# wake function P35

TP PIN1 VCC Connect to +3VALW, 11/12 DVT
schematics update add R462, R463@, pop D22, R633, R453
5 design change P10 Change USB port 5 for TS/port 6 for CCD / 11/12 DVT
port 7 for CR(USB)_FP
reserve RTCRST# to EC pin 27 for clear CMOS

6 DVT
P6 add R490, and Q52 reserve to EC_RTCRST# 11/12
design update
7 design update EC board ID P34 Pop R503(100K), R506(12K) 11/15 DVT
8 material update P36 change C2135, C2136 to 0603 size 11/15 DVT
9 material update P33 L24, L25 form SM070003Y00 to SM070003K00 11/15 DVT
2 2
10 material update P7 pop share rom 11/15 DVT

R415, R433 for LVDS EDID
11 design update Co-lay TS_I2C and LVDS EDID P25 R438, R439 for TS I2C 11/15 DVT
Add R491 reserve for RTD2132 EP_MODE
12 design update for LVDS EP mode SMbus2 change to SMbus3 P24 11/18 DVT
13 design update for TP_INT# wake function P34 GPIO55 change to GPIO13 11/18 DVT
14 design update for GC62.0 function P17 R2055 change to Pull high +3VSDGPU_AON 11/20 DVT
15 design update for +1.05VS_VTT leakage issue P38 +5VALW change to +3VLP 11/20 DVT
add level shift(Q2501)、R2503, R2502、R2549
Del R930
16 design update for IT 6513 leakage issue P27 IT6513 change to use 3VS 11/26 DVT
3 3
C153, C2, C3 to 15PF,
17 material update for TXC recommend P6 C2004, C2005, C2558, C2559 to 10PF 11/27 DVT
add R2550 10K pull high to +3V_LAN ,

18 design update for wake on LAN function P29 PCH side pull high reserve 12/04 DVT
19 design update for ESD request P37 add C413 0.1u to +5VS 12/04 DVT
add choke(L29,L30) and R(R456, R457,R462,R463)

20 design update for EMI request P33 co-lay for USB/B conn 12/04 DVT
add R2149, R2150( SM01000NH00), C2140, C2142(680PF)
21 design update for ESD request P36 D2008(SCA00001B00) change to SOT23 12/10
DVT
R2135,R2138 chagne to 60 ohm
DVT
SW3 SN100007700 chagne to SN100000K00
4
C408, C486 SF000002Y00 change to SF000006R00 4
C18, C118 SF000002Z00 change to SF000006S00 12/13 DVT

22 material update
P37 reserve R2551 0 ohm +3VALW to +3VLAN 12/20 DVT
23 design update reserve R2540 for disable PHY
PIR-HW
Custom 0.3
Z5WAH M/B LA-B162P
A B C D E
5 4 3 2 1
PVT Version change list (P.I.R. List) Page 2 of 2 for HW

1 design issue P28 U2052, U2503 change power rail to +HDMI_5V_OUT 12/31 PVT
2 material update PVT board ID P34 R506 change to 15K 12/31 PVT
3 design update modify DQS P/N pin P18 01/08 PVT
D
4 D
schematics update
5 design change
6
design update
7 design update
8 material update
9 material update
C 10 material update C
11 design update
12 design update
13 design update
14 design update
15 design update
16 design update
B B
17 material update
18 design update
19 design update
20 design update
21 design update
A
22 material update A
23 design update
PIR-HW
Custom 0.3
Z5WAH M/B LA-B162P
5 4 3 2 1

Acer Aspire e5-571g-39tx (z5wah La-b162p Rev 0.3) Схема

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Acer Aspire e5-571g-39tx (z5wah La-b162p Rev 0.3) Схема

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A B C D E

EA50_HB M/B Schematics Document

Security Classification Compal Secret Data Compal Electronics, Inc.

Card Reader RJ45 conn.

RTC CKT. Sub Board

LS-B163P Security Classification Compal Secret Data Compal Electronics, Inc.

Power Plane Description S1 S3 S5 Full ON HIGH HIGH HIGH HIGH ON ON ON ON

USB 3.0 Port EMC Component EMC@

Security Classification Compal Secret Data Compal Electronics, Inc.

C95 1 2 6.8P_0402_50V8C F62 XDP_TDO_R @ T163

XEMC@ BPM#0 H60 XDP_BPM#1_R @ T165

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR_A_D0 AH63 AU37

Security Classification Compal Secret Data Compal Electronics, Inc.

DVT modify 11/27

W=20mils trace width 10mil W=20mils 5 OF 19 Rev1p2

Security Classification Compal Secret Data Compal Electronics, Inc.

XTAL24_IN C43 A25 XTAL24_IN

CLK_PCIE_MINI1 C37 CLKOUT_PCIE_N3 CLKOUT_LPC_0 AP15 CLKOUT_LPC1 R395 2 BA@ 1 22_0402_5%

DVT modify 11/27

LPC_AD0 AU14 AN2 PCH_GPIO11

LPC_FRAME# AV12 SMBUS AN1 SML0CLK +3VALW_PCH

L2N7002LT1G_SOT23-3 Q2 AU3 SML1CLK SML0CLK RP8 1 8 2.2K_0804_8P4R_5%

3 1 VGA_CLKREQ# PCH_SPI_CLK AA3 SML1DATA/GPIO74 PCH_SMBDATA 3 6

PCH_SPI_CS1# Y4 AD2 @ T24

PCH_SPI_HOLD1# AF1 SPI_IO2

2ROM is SPI ROM 2M + 4M Byte

R208 MC74VHC1G08DFT2G_SC70-5 R207

A 4 VGATE_3V GC6_FB_EN 2 GC6@ 1 PCH_GPIO77 U6

R210 1 NGC6@ 2 PCH_GPIO77

A R214 R215 Z5W1H 0 1 A

Security Classification Compal Secret Data Compal Electronics, Inc.

RP23 1 8 PCH_GPIO87 RP36 1 8 EC_SMI#_SCI#

R306 GSPI0_MOSI / GPIO86 : Boot BIOS Strap SDIO_D0 / GPIO66 : Top‐Block Swap Override

DGPU_PRSNT# GPIO49 0: SPI ROM (Have internal PD) 0: DISABLED (Have internal PD)

R220 R221 2013/09/11 2013/09/24 Title

PEG_GTX_HRX_N0 C76 1 2 VGA@ 0.22U_0402_10V6K PEG_GTX_C_HRX_N0 F10 AN8 USB20_N0

PEG_HTX_C_GRX_N3 C90 1 2 VGA@ 0.22U_0402_10V6K PEG_HTX_GRX_N3 B22 AR13 USB20_N7

Security Classification Compal Secret Data Compal Electronics, Inc.

Shark Bay ULT have internal gate for VDDQ T37 @ L59 C36

+3VALW_PCH AY44 E35

2 0_0402_5% +VCCIO_OUT T40 @ AC58 RSVD VCC E45

T142 @ AD60 G41

R171 T143 @ AD59 G43

43_0402_1% T147 @ AG58 RSVD VCC G51

2 1 H_CPU_SVIDALRT# +1.05VS_VTT T145 @ U59 RSVD VCC G53

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

<5> DDRA_CKE0_DIMMA DDRA_CKE0_DIMMA 73 74 DDRA_CKE1_DIMMA DDRA_CKE1_DIMMA <5>

DDR_A_DQS#4 169 170

DDR_B_D26 33 VSS11 VSS12 34 DDR_B_D30

<5> DDRB_CKE0_DIMMB DDRB_CKE0_DIMMB 73 74 DDRB_CKE1_DIMMB DDRB_CKE1_DIMMB <5>

DDR_B_DQS#4 169 170

199 SA0 EVENT# 200 D_CK_SDATA

2 @ 1 PEX_TSTCLK_OUT- AE22 PEX_TSTCLK_OUT C11 XTALIN

SM010019400 3000ma 33ohm@100mhz DCR 0.05

SM010028480 1500ma 180ohm@100mhz DCR 0.18

U2001 VGA@ L2001 BLM18PG181SN1D_2P DVT modify 11/27

<34,35,8> PLT_RST# B X2000 from SJ100009700 change to SJ10000G300

4 180ohm(ESR0.2)x1 4.7U_0603_6.3V6K 22U_0603_6.3V6M 4

MC74VHC1G08DFT2G_SC70-5 0_0402_5% 10K_0402_5% Near GPU